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Diffstat (limited to 'src/mame/audio/rax.cpp')
-rw-r--r--src/mame/audio/rax.cpp60
1 files changed, 30 insertions, 30 deletions
diff --git a/src/mame/audio/rax.cpp b/src/mame/audio/rax.cpp
index ca285659913..5bccf4706fd 100644
--- a/src/mame/audio/rax.cpp
+++ b/src/mame/audio/rax.cpp
@@ -3,7 +3,7 @@
/***************************************************************************
Acclaim RAX Sound Board
-
+
****************************************************************************/
#include "emu.h"
@@ -93,7 +93,7 @@ READ16_MEMBER( acclaim_rax_device::adsp_control_r )
WRITE16_MEMBER( acclaim_rax_device::adsp_control_w )
{
m_control_regs[offset] = data;
-
+
switch (offset)
{
case 0x1:
@@ -116,9 +116,9 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w )
uint32_t dir = (m_control_regs[BDMA_CONTROL_REG] >> 2) & 1;
uint32_t type = m_control_regs[BDMA_CONTROL_REG] & 3;
uint32_t src_addr = (page << 14) | m_control_regs[BDMA_EXT_ADDR_REG];
-
+
uint32_t count = m_control_regs[BDMA_WORD_COUNT_REG];
-
+
address_space* addr_space = (type == 0 ? m_program : m_data);
if (dir == 0)
@@ -139,7 +139,7 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w )
else if (type == 1)
{
while (count)
- {
+ {
uint16_t src_word = (adsp_rom[src_addr + 0] << 8) | adsp_rom[src_addr + 1];
addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG] * 2, src_word);
@@ -152,9 +152,9 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w )
else
{
int shift = type == 2 ? 8 : 0;
-
+
while (count)
- {
+ {
uint16_t src_word = adsp_rom[src_addr] << shift;
addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG] * 2, src_word);
@@ -176,7 +176,7 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w )
break;
}
-
+
case S1_AUTOBUF_REG:
/* autobuffer off: nuke the timer, and disable the DAC */
if ((data & 0x0002) == 0)
@@ -184,7 +184,7 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w )
dmadac_enable(&m_dmadac[1], 1, 0);
}
break;
-
+
case S0_AUTOBUF_REG:
/* autobuffer off: nuke the timer, and disable the DAC */
if ((data & 0x0002) == 0)
@@ -193,7 +193,7 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w )
m_reg_timer[0]->reset();
}
break;
-
+
case S1_CONTROL_REG:
if (((data >> 4) & 3) == 2)
fatalerror("DCS: Oh no!, the data is compressed with u-law encoding\n");
@@ -220,7 +220,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( acclaim_rax_device::dma_timer_callback )
m_control_regs[BDMA_EXT_ADDR_REG] = param & 0x3fff;
m_control_regs[BDMA_CONTROL_REG] &= ~0xff00;
m_control_regs[BDMA_CONTROL_REG] |= ((param >> 14) & 0xff) << 8;
-
+
if (m_control_regs[BDMA_CONTROL_REG] & 8)
m_cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
else
@@ -298,10 +298,10 @@ void acclaim_rax_device::device_start()
m_dmadac[0] = subdevice<dmadac_sound_device>("dacl");
m_dmadac[1] = subdevice<dmadac_sound_device>("dacr");
-
+
m_reg_timer[0] = subdevice<timer_device>("adsp_reg_timer0");
m_dma_timer = subdevice<timer_device>("adsp_dma_timer");
-
+
// 1 bank for internal
membank("databank")->configure_entries(0, 5, auto_alloc_array(machine(), uint16_t, 0x2000 * 5), 0x2000*sizeof(uint16_t));
}
@@ -322,15 +322,15 @@ void acclaim_rax_device::device_reset()
m_adsp_snd_pf0 = 1;
m_rom_bank = 0;
-
+
/* initialize our state structure and install the transmit callback */
m_size[0] = 0;
m_incs[0] = 0;
m_ireg[0] = 0;
-
+
/* initialize the ADSP control regs */
memset(m_control_regs, 0, sizeof(m_control_regs));
-
+
m_dmovlay_val = 0;
m_data_bank = 0;
update_data_ram_bank();
@@ -344,10 +344,10 @@ void acclaim_rax_device::adsp_irq(int which)
/* get the index register */
int reg = m_cpu->state_int(ADSP2100_I0 + m_ireg[which]);
-
+
/* copy the current data into the buffer */
int count = m_size[which] / (4 * (m_incs[which] ? m_incs[which] : 1));
-
+
int16_t buffer[0x100];
for (uint32_t i = 0; i < count; i++)
@@ -378,15 +378,15 @@ TIMER_DEVICE_CALLBACK_MEMBER( acclaim_rax_device::adsp_irq0 )
void acclaim_rax_device::recompute_sample_rate(int which)
{
/* calculate how long until we generate an interrupt */
-
+
/* frequency the time per each bit sent */
attotime sample_period = attotime::from_hz(m_cpu->unscaled_clock()) * (1 * (m_control_regs[which ? S1_SCLKDIV_REG : S0_SCLKDIV_REG] + 1));
-
+
/* now put it down to samples, so we know what the channel frequency has to be */
sample_period = sample_period * (16 * 1);
dmadac_set_frequency(&m_dmadac[0], 2, ATTOSECONDS_TO_HZ(sample_period.attoseconds()));
dmadac_enable(&m_dmadac[0], 2, 1);
-
+
/* fire off a timer which will hit every half-buffer */
if (m_incs[which])
{
@@ -398,7 +398,7 @@ void acclaim_rax_device::recompute_sample_rate(int which)
WRITE32_MEMBER(acclaim_rax_device::adsp_sound_tx_callback)
{
int which = offset;
-
+
if (which != 0)
return;
@@ -413,27 +413,27 @@ WRITE32_MEMBER(acclaim_rax_device::adsp_sound_tx_callback)
/* get the autobuffer registers */
int mreg, lreg;
uint16_t source;
-
+
m_ireg[which] = (m_control_regs[autobuf_reg] >> 9) & 7;
mreg = (m_control_regs[autobuf_reg] >> 7) & 3;
mreg |= m_ireg[which] & 0x04; /* msb comes from ireg */
lreg = m_ireg[which];
-
+
/* now get the register contents in a more legible format */
/* we depend on register indexes to be continuous (which is the case in our core) */
source = m_cpu->state_int(ADSP2100_I0 + m_ireg[which]);
m_incs[which] = m_cpu->state_int(ADSP2100_M0 + mreg);
m_size[which] = m_cpu->state_int(ADSP2100_L0 + lreg);
-
+
/* get the base value, since we need to keep it around for wrapping */
source -= m_incs[which];
-
+
/* make it go back one so we dont lose the first sample */
m_cpu->set_state_int(ADSP2100_I0 + m_ireg[which], source);
-
+
/* save it as it is now */
m_ireg_base[which] = source;
-
+
/* recompute the sample rate and timer */
recompute_sample_rate(which);
return;
@@ -441,10 +441,10 @@ WRITE32_MEMBER(acclaim_rax_device::adsp_sound_tx_callback)
else
logerror( "ADSP SPORT1: trying to transmit and autobuffer not enabled!\n" );
}
-
+
/* if we get there, something went wrong. Disable playing */
dmadac_enable(&m_dmadac[0], 2, 0);
-
+
/* remove timer */
m_reg_timer[which]->reset();
}