diff options
author | 2016-10-22 13:13:17 +0200 | |
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committer | 2016-10-22 13:13:17 +0200 | |
commit | ddb290d5f615019c33c42b8d94e5a5254cabcf33 (patch) | |
tree | a70f688b0df3acd19da7b1151e5902e3c6af3fa5 /src/mame/drivers/calchase.cpp | |
parent | 333bff8de64dfaeb98134000412796b4fdef970b (diff) |
NOTICE (TYPE NAME CONSOLIDATION)
Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8
also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
Diffstat (limited to 'src/mame/drivers/calchase.cpp')
-rw-r--r-- | src/mame/drivers/calchase.cpp | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/src/mame/drivers/calchase.cpp b/src/mame/drivers/calchase.cpp index de72447a43d..0f014a7c846 100644 --- a/src/mame/drivers/calchase.cpp +++ b/src/mame/drivers/calchase.cpp @@ -148,12 +148,12 @@ public: { } - std::unique_ptr<UINT32[]> m_bios_ram; - std::unique_ptr<UINT32[]> m_bios_ext_ram; - UINT8 m_mtxc_config_reg[256]; - UINT8 m_piix4_config_reg[4][256]; + std::unique_ptr<uint32_t[]> m_bios_ram; + std::unique_ptr<uint32_t[]> m_bios_ext_ram; + uint8_t m_mtxc_config_reg[256]; + uint8_t m_piix4_config_reg[4][256]; - UINT32 m_idle_skip_ram; + uint32_t m_idle_skip_ram; DECLARE_WRITE32_MEMBER(bios_ext_ram_w); DECLARE_WRITE32_MEMBER(bios_ram_w); DECLARE_READ16_MEMBER(calchase_iocard1_r); @@ -173,7 +173,7 @@ public: // Intel 82439TX System Controller (MTXC) // TODO: change with a VIA82C585VPX (North Bridge - APOLLO Chipset) -static UINT8 mtxc_config_r(device_t *busdevice, device_t *device, int function, int reg) +static uint8_t mtxc_config_r(device_t *busdevice, device_t *device, int function, int reg) { calchase_state *state = busdevice->machine().driver_data<calchase_state>(); // osd_printf_debug("MTXC: read %d, %02X\n", function, reg); @@ -181,7 +181,7 @@ static UINT8 mtxc_config_r(device_t *busdevice, device_t *device, int function, return state->m_mtxc_config_reg[reg]; } -static void mtxc_config_w(device_t *busdevice, device_t *device, int function, int reg, UINT8 data) +static void mtxc_config_w(device_t *busdevice, device_t *device, int function, int reg, uint8_t data) { calchase_state *state = busdevice->machine().driver_data<calchase_state>(); // osd_printf_debug("%s:MTXC: write %d, %02X, %02X\n", machine.describe_context(), function, reg, data); @@ -221,9 +221,9 @@ void calchase_state::intel82439tx_init() m_mtxc_config_reg[0x65] = 0x02; } -static UINT32 intel82439tx_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask) +static uint32_t intel82439tx_pci_r(device_t *busdevice, device_t *device, int function, int reg, uint32_t mem_mask) { - UINT32 r = 0; + uint32_t r = 0; if(reg == 0) return 0x05851106; // VT82C585VPX, VIA @@ -247,7 +247,7 @@ static UINT32 intel82439tx_pci_r(device_t *busdevice, device_t *device, int func return r; } -static void intel82439tx_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask) +static void intel82439tx_pci_w(device_t *busdevice, device_t *device, int function, int reg, uint32_t data, uint32_t mem_mask) { if (ACCESSING_BITS_24_31) { @@ -270,23 +270,23 @@ static void intel82439tx_pci_w(device_t *busdevice, device_t *device, int functi // Intel 82371AB PCI-to-ISA / IDE bridge (PIIX4) //TODO: change with VIA82C586B (South Bridge - APOLLO Chipset) -static UINT8 piix4_config_r(device_t *busdevice, device_t *device, int function, int reg) +static uint8_t piix4_config_r(device_t *busdevice, device_t *device, int function, int reg) { calchase_state *state = busdevice->machine().driver_data<calchase_state>(); // osd_printf_debug("PIIX4: read %d, %02X\n", function, reg); return state->m_piix4_config_reg[function][reg]; } -static void piix4_config_w(device_t *busdevice, device_t *device, int function, int reg, UINT8 data) +static void piix4_config_w(device_t *busdevice, device_t *device, int function, int reg, uint8_t data) { calchase_state *state = busdevice->machine().driver_data<calchase_state>(); // osd_printf_debug("%s:PIIX4: write %d, %02X, %02X\n", machine.describe_context(), function, reg, data); state->m_piix4_config_reg[function][reg] = data; } -static UINT32 intel82371ab_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask) +static uint32_t intel82371ab_pci_r(device_t *busdevice, device_t *device, int function, int reg, uint32_t mem_mask) { - UINT32 r = 0; + uint32_t r = 0; if(reg == 0) return 0x30401106; // VT82C586B, VIA @@ -310,7 +310,7 @@ static UINT32 intel82371ab_pci_r(device_t *busdevice, device_t *device, int func return r; } -static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask) +static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int function, int reg, uint32_t data, uint32_t mem_mask) { if (ACCESSING_BITS_24_31) { @@ -626,8 +626,8 @@ INPUT_PORTS_END void calchase_state::machine_start() { - m_bios_ram = std::make_unique<UINT32[]>(0x10000/4); - m_bios_ext_ram = std::make_unique<UINT32[]>(0x10000/4); + m_bios_ram = std::make_unique<uint32_t[]>(0x10000/4); + m_bios_ext_ram = std::make_unique<uint32_t[]>(0x10000/4); } void calchase_state::machine_reset() @@ -712,7 +712,7 @@ WRITE32_MEMBER(calchase_state::calchase_idle_skip_w) DRIVER_INIT_MEMBER(calchase_state,calchase) { - m_bios_ram = std::make_unique<UINT32[]>(0x20000/4); + m_bios_ram = std::make_unique<uint32_t[]>(0x20000/4); intel82439tx_init(); @@ -721,7 +721,7 @@ DRIVER_INIT_MEMBER(calchase_state,calchase) DRIVER_INIT_MEMBER(calchase_state, hostinv) { - m_bios_ram = std::make_unique<UINT32[]>(0x20000/4); + m_bios_ram = std::make_unique<uint32_t[]>(0x20000/4); intel82439tx_init(); } |