diff options
author | 2016-10-22 13:13:17 +0200 | |
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committer | 2016-10-22 13:13:17 +0200 | |
commit | ddb290d5f615019c33c42b8d94e5a5254cabcf33 (patch) | |
tree | a70f688b0df3acd19da7b1151e5902e3c6af3fa5 /src/devices/cpu/scudsp/scudsp.h | |
parent | 333bff8de64dfaeb98134000412796b4fdef970b (diff) |
NOTICE (TYPE NAME CONSOLIDATION)
Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8
also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
Diffstat (limited to 'src/devices/cpu/scudsp/scudsp.h')
-rw-r--r-- | src/devices/cpu/scudsp/scudsp.h | 82 |
1 files changed, 41 insertions, 41 deletions
diff --git a/src/devices/cpu/scudsp/scudsp.h b/src/devices/cpu/scudsp/scudsp.h index a5827b05e41..423cf1df2f0 100644 --- a/src/devices/cpu/scudsp/scudsp.h +++ b/src/devices/cpu/scudsp/scudsp.h @@ -49,20 +49,20 @@ enum #define SCUDSP_RESET INPUT_LINE_RESET /* Non-Maskable */ union SCUDSPREG32 { - INT32 si; - UINT32 ui; + int32_t si; + uint32_t ui; }; union SCUDSPREG16 { - INT16 si; - UINT16 ui; + int16_t si; + uint16_t ui; }; class scudsp_cpu_device : public cpu_device { public: // construction/destruction - scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock); + scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock); template<class _Object> static devcb_base &set_out_irq_callback(device_t &device, _Object object) { return downcast<scudsp_cpu_device &>(device).m_out_irq_cb.set_callback(object); } template<class _Object> static devcb_base &set_in_dma_callback(device_t &device, _Object object) { return downcast<scudsp_cpu_device &>(device).m_in_dma_cb.set_callback(object); } @@ -86,9 +86,9 @@ protected: virtual void device_reset() override; // device_execute_interface overrides - virtual UINT32 execute_min_cycles() const override { return 1; } - virtual UINT32 execute_max_cycles() const override { return 7; } - virtual UINT32 execute_input_lines() const override { return 0; } + virtual uint32_t execute_min_cycles() const override { return 1; } + virtual uint32_t execute_max_cycles() const override { return 7; } + virtual uint32_t execute_input_lines() const override { return 0; } virtual void execute_run() override; virtual void execute_set_input(int inputnum, int state) override; @@ -99,9 +99,9 @@ protected: void state_string_export(const device_state_entry &entry, std::string &str) const override; // device_disasm_interface overrides - virtual UINT32 disasm_min_opcode_bytes() const override { return 4; } - virtual UINT32 disasm_max_opcode_bytes() const override { return 4; } - virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override; + virtual uint32_t disasm_min_opcode_bytes() const override { return 4; } + virtual uint32_t disasm_max_opcode_bytes() const override { return 4; } + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override; devcb_write_line m_out_irq_cb; devcb_read16 m_in_dma_cb; @@ -111,47 +111,47 @@ private: address_space_config m_program_config; address_space_config m_data_config; - UINT8 m_pc; /* registers */ - UINT32 m_flags; /* flags */ - UINT8 m_ra; - UINT8 m_ct0,m_ct1,m_ct2,m_ct3; - UINT8 m_delay; /* Delay */ - UINT8 m_top; /*Jump Command memory*/ - UINT16 m_lop; /*Counter Register*/ /*12-bits*/ + uint8_t m_pc; /* registers */ + uint32_t m_flags; /* flags */ + uint8_t m_ra; + uint8_t m_ct0,m_ct1,m_ct2,m_ct3; + uint8_t m_delay; /* Delay */ + uint8_t m_top; /*Jump Command memory*/ + uint16_t m_lop; /*Counter Register*/ /*12-bits*/ SCUDSPREG32 m_rx; /*X-Bus register*/ - INT64 m_mul; /*Multiplier register*//*48-bits*/ + int64_t m_mul; /*Multiplier register*//*48-bits*/ SCUDSPREG32 m_ry; /*Y-Bus register*/ - INT64 m_alu; /*ALU register*/ /*48-bits*/ + int64_t m_alu; /*ALU register*/ /*48-bits*/ SCUDSPREG16 m_ph; /*ALU high register*/ SCUDSPREG32 m_pl; /*ALU low register*/ SCUDSPREG16 m_ach; /*ALU external high register*/ SCUDSPREG32 m_acl; /*ALU external low register*/ - UINT32 m_ra0,m_wa0; /*DSP DMA registers*/ + uint32_t m_ra0,m_wa0; /*DSP DMA registers*/ struct{ - UINT32 src, dst; - UINT16 add; - UINT16 size, update, ex, dir, count; + uint32_t src, dst; + uint16_t add; + uint16_t size, update, ex, dir, count; }m_dma; address_space *m_program; address_space *m_data; int m_icount; - UINT8 m_update_mul; - - UINT32 scudsp_get_source_mem_reg_value( UINT32 mode ); - UINT32 scudsp_get_source_mem_value(UINT8 mode); - void scudsp_set_dest_mem_reg( UINT32 mode, UINT32 value ); - void scudsp_set_dest_mem_reg_2( UINT32 mode, UINT32 value ); - UINT32 scudsp_compute_condition( UINT32 condition ); - UINT32 scudsp_get_mem_source_dma( UINT32 memcode, UINT32 counter ); - void scudsp_set_dest_dma_mem( UINT32 memcode, UINT32 value, UINT32 counter ); - - void scudsp_illegal(UINT32 opcode); - void scudsp_operation(UINT32 opcode); - void scudsp_move_immediate(UINT32 opcode); - void scudsp_dma(UINT32 opcode); - void scudsp_jump(UINT32 opcode); - void scudsp_loop(UINT32 opcode); - void scudsp_end(UINT32 opcode); + uint8_t m_update_mul; + + uint32_t scudsp_get_source_mem_reg_value( uint32_t mode ); + uint32_t scudsp_get_source_mem_value(uint8_t mode); + void scudsp_set_dest_mem_reg( uint32_t mode, uint32_t value ); + void scudsp_set_dest_mem_reg_2( uint32_t mode, uint32_t value ); + uint32_t scudsp_compute_condition( uint32_t condition ); + uint32_t scudsp_get_mem_source_dma( uint32_t memcode, uint32_t counter ); + void scudsp_set_dest_dma_mem( uint32_t memcode, uint32_t value, uint32_t counter ); + + void scudsp_illegal(uint32_t opcode); + void scudsp_operation(uint32_t opcode); + void scudsp_move_immediate(uint32_t opcode); + void scudsp_dma(uint32_t opcode); + void scudsp_jump(uint32_t opcode); + void scudsp_loop(uint32_t opcode); + void scudsp_end(uint32_t opcode); void scudsp_exec_dma(); }; |