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author Vas Crabb <vas@vastheman.com>2016-11-19 05:35:54 +1100
committer Vas Crabb <vas@vastheman.com>2016-11-19 05:38:48 +1100
commit8179a84458204a5e767446fcf7d10f032a40fd0c (patch)
tree16105e1667f811dcb24dbf0fc255166cb06df5c2 /src/devices/cpu/mips/mips3.cpp
parent1b489fe83034072149fb0637b20c7ba57dc72a7a (diff)
Introduce u8/u16/u32/u64/s8/s16/s32/s64
* New abbreviated types are in osd and util namespaces, and also in global namespace for things that #include "emu.h" * Get rid of import of cstdint types to global namespace (C99 does this anyway) * Remove the cstdint types from everything in emu * Get rid of U64/S64 macros * Fix a bug in dps16 caused by incorrect use of macro * Fix debugcon not checking for "do " prefix case-insensitively * Fix a lot of messed up tabulation * More constexpr * Fix up many __names
Diffstat (limited to 'src/devices/cpu/mips/mips3.cpp')
-rw-r--r--src/devices/cpu/mips/mips3.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp
index c5ba79f2440..940e22d1892 100644
--- a/src/devices/cpu/mips/mips3.cpp
+++ b/src/devices/cpu/mips/mips3.cpp
@@ -2983,7 +2983,7 @@ void mips3_device::ldl_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) << shift;
+ uint64_t mask = 0xffffffffffffffffU << shift;
uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask >> shift) && RTREG)
@@ -2994,7 +2994,7 @@ void mips3_device::ldr_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t mask = 0xffffffffffffffffU >> shift;
uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask << shift) && RTREG)
@@ -3021,7 +3021,7 @@ void mips3_device::sdl_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t mask = 0xffffffffffffffffU >> shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 >> shift, mask);
}
@@ -3029,7 +3029,7 @@ void mips3_device::sdr_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) << shift;
+ uint64_t mask = 0xffffffffffffffffU << shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 << shift, mask);
}
@@ -3061,7 +3061,7 @@ void mips3_device::ldl_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) << shift;
+ uint64_t mask = 0xffffffffffffffffU << shift;
uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask >> shift) && RTREG)
@@ -3072,7 +3072,7 @@ void mips3_device::ldr_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t mask = 0xffffffffffffffffU >> shift;
uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask << shift) && RTREG)
@@ -3099,7 +3099,7 @@ void mips3_device::sdl_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t mask = 0xffffffffffffffffU >> shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 >> shift, mask);
}
@@ -3107,6 +3107,6 @@ void mips3_device::sdr_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- uint64_t mask = U64(0xffffffffffffffff) << shift;
+ uint64_t mask = 0xffffffffffffffffU << shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 << shift, mask);
}