From f7ff691bd25b95d1af1a2dbbaf2f20f6b3d49334 Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 9 Mar 2019 01:55:11 -0500 Subject: bus/gameboy, bus/snes: Simplify read/write handlers (nw) bus/snes: Add callback for fetching open bus (nw) --- src/devices/bus/gameboy/gb_slot.cpp | 16 +- src/devices/bus/gameboy/gb_slot.h | 16 +- src/devices/bus/gameboy/mbc.cpp | 132 ++++++++-------- src/devices/bus/gameboy/mbc.h | 132 ++++++++-------- src/devices/bus/gameboy/rom.cpp | 34 ++-- src/devices/bus/gameboy/rom.h | 34 ++-- src/devices/bus/psx/gamebooster.cpp | 8 +- src/devices/bus/snes/bsx.cpp | 38 ++--- src/devices/bus/snes/bsx.h | 32 ++-- src/devices/bus/snes/event.cpp | 12 +- src/devices/bus/snes/event.h | 12 +- src/devices/bus/snes/rom.cpp | 54 +++---- src/devices/bus/snes/rom.h | 54 +++---- src/devices/bus/snes/rom21.cpp | 8 +- src/devices/bus/snes/rom21.h | 8 +- src/devices/bus/snes/sa1.cpp | 78 +++++----- src/devices/bus/snes/sa1.h | 32 ++-- src/devices/bus/snes/sdd1.cpp | 14 +- src/devices/bus/snes/sdd1.h | 12 +- src/devices/bus/snes/sfx.cpp | 26 ++-- src/devices/bus/snes/sfx.h | 26 ++-- src/devices/bus/snes/sgb.cpp | 44 +++--- src/devices/bus/snes/sgb.h | 33 ++-- src/devices/bus/snes/snes_slot.cpp | 48 ++++-- src/devices/bus/snes/snes_slot.h | 36 +++-- src/devices/bus/snes/spc7110.cpp | 12 +- src/devices/bus/snes/spc7110.h | 20 +-- src/devices/bus/snes/sufami.cpp | 26 ++-- src/devices/bus/snes/sufami.h | 10 +- src/devices/bus/snes/upd.cpp | 24 +-- src/devices/bus/snes/upd.h | 24 +-- src/mame/drivers/gb.cpp | 20 +-- src/mame/drivers/snes.cpp | 299 ++++++++++++++++++------------------ src/mame/includes/snes.h | 1 - src/mame/machine/snes.cpp | 5 - 35 files changed, 696 insertions(+), 684 deletions(-) diff --git a/src/devices/bus/gameboy/gb_slot.cpp b/src/devices/bus/gameboy/gb_slot.cpp index 7ce626e67c7..a72eedc24d5 100644 --- a/src/devices/bus/gameboy/gb_slot.cpp +++ b/src/devices/bus/gameboy/gb_slot.cpp @@ -624,18 +624,18 @@ std::string megaduck_cart_slot_device::get_default_card_software(get_default_car read -------------------------------------------------*/ -READ8_MEMBER(gb_cart_slot_device_base::read_rom) +uint8_t gb_cart_slot_device_base::read_rom(offs_t offset) { if (m_cart) - return m_cart->read_rom(space, offset); + return m_cart->read_rom(offset); else return 0xff; } -READ8_MEMBER(gb_cart_slot_device_base::read_ram) +uint8_t gb_cart_slot_device_base::read_ram(offs_t offset) { if (m_cart) - return m_cart->read_ram(space, offset); + return m_cart->read_ram(offset); else return 0xff; } @@ -645,16 +645,16 @@ READ8_MEMBER(gb_cart_slot_device_base::read_ram) write -------------------------------------------------*/ -WRITE8_MEMBER(gb_cart_slot_device_base::write_bank) +void gb_cart_slot_device_base::write_bank(offs_t offset, uint8_t data) { if (m_cart) - m_cart->write_bank(space, offset, data); + m_cart->write_bank(offset, data); } -WRITE8_MEMBER(gb_cart_slot_device_base::write_ram) +void gb_cart_slot_device_base::write_ram(offs_t offset, uint8_t data) { if (m_cart) - m_cart->write_ram(space, offset, data); + m_cart->write_ram(offset, data); } diff --git a/src/devices/bus/gameboy/gb_slot.h b/src/devices/bus/gameboy/gb_slot.h index ef734e6f99e..5f420c60823 100644 --- a/src/devices/bus/gameboy/gb_slot.h +++ b/src/devices/bus/gameboy/gb_slot.h @@ -58,10 +58,10 @@ public: virtual ~device_gb_cart_interface(); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) { return 0xff; } - virtual DECLARE_WRITE8_MEMBER(write_bank) {} - virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; } - virtual DECLARE_WRITE8_MEMBER(write_ram) {} + virtual uint8_t read_rom(offs_t offset) { return 0xff; } + virtual void write_bank(offs_t offset, uint8_t data) {} + virtual uint8_t read_ram(offs_t offset) { return 0xff; } + virtual void write_ram(offs_t offset, uint8_t data) {} void rom_alloc(uint32_t size, const char *tag); void ram_alloc(uint32_t size); @@ -145,10 +145,10 @@ public: virtual std::string get_default_card_software(get_default_card_software_hook &hook) const override; // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom); - virtual DECLARE_WRITE8_MEMBER(write_bank); - virtual DECLARE_READ8_MEMBER(read_ram); - virtual DECLARE_WRITE8_MEMBER(write_ram); + virtual uint8_t read_rom(offs_t offset); + virtual void write_bank(offs_t offset, uint8_t data); + virtual uint8_t read_ram(offs_t offset); + virtual void write_ram(offs_t offset, uint8_t data); protected: diff --git a/src/devices/bus/gameboy/mbc.cpp b/src/devices/bus/gameboy/mbc.cpp index 286c2d90a1e..bd57a4da23b 100644 --- a/src/devices/bus/gameboy/mbc.cpp +++ b/src/devices/bus/gameboy/mbc.cpp @@ -347,12 +347,12 @@ void gb_rom_camera_device::device_reset() mapper specific handlers -------------------------------------------------*/ -READ8_MEMBER(gb_rom_mbc_device::read_rom) +uint8_t gb_rom_mbc_device::read_rom(offs_t offset) { return m_rom[rom_bank_map[m_latch_bank] + offset]; } -READ8_MEMBER(gb_rom_mbc_device::read_ram) +uint8_t gb_rom_mbc_device::read_ram(offs_t offset) { if (!m_ram.empty()) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset]; @@ -360,7 +360,7 @@ READ8_MEMBER(gb_rom_mbc_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mbc_device::write_ram) +void gb_rom_mbc_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty()) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset] = data; @@ -369,7 +369,7 @@ WRITE8_MEMBER(gb_rom_mbc_device::write_ram) // MBC1 -READ8_MEMBER(gb_rom_mbc1_device::read_rom) +uint8_t gb_rom_mbc1_device::read_rom(offs_t offset) { if (offset & 0x4000) /* RB1 */ return m_rom[rom_bank_map[(m_ram_bank << (5 + m_shift)) | m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; @@ -380,7 +380,7 @@ READ8_MEMBER(gb_rom_mbc1_device::read_rom) } } -WRITE8_MEMBER(gb_rom_mbc1_device::write_bank) +void gb_rom_mbc1_device::write_bank(offs_t offset, uint8_t data) { // the mapper only uses inputs A15..A13 switch (offset & 0xe000) @@ -402,7 +402,7 @@ WRITE8_MEMBER(gb_rom_mbc1_device::write_bank) } } -READ8_MEMBER(gb_rom_mbc1_device::read_ram) +uint8_t gb_rom_mbc1_device::read_ram(offs_t offset) { if (!m_ram.empty() && m_ram_enable) { @@ -413,7 +413,7 @@ READ8_MEMBER(gb_rom_mbc1_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mbc1_device::write_ram) +void gb_rom_mbc1_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty() && m_ram_enable) { @@ -425,7 +425,7 @@ WRITE8_MEMBER(gb_rom_mbc1_device::write_ram) // MBC2 -READ8_MEMBER(gb_rom_mbc2_device::read_rom) +uint8_t gb_rom_mbc2_device::read_rom(offs_t offset) { if (offset & 0x4000) /* RB1 */ return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; @@ -433,7 +433,7 @@ READ8_MEMBER(gb_rom_mbc2_device::read_rom) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_mbc2_device::write_bank) +void gb_rom_mbc2_device::write_bank(offs_t offset, uint8_t data) { // the mapper only has data lines D3..D0 data &= 0x0f; @@ -450,7 +450,7 @@ WRITE8_MEMBER(gb_rom_mbc2_device::write_bank) } } -READ8_MEMBER(gb_rom_mbc2_device::read_ram) +uint8_t gb_rom_mbc2_device::read_ram(offs_t offset) { if (!m_ram.empty() && m_ram_enable) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] | 0xf0; @@ -458,7 +458,7 @@ READ8_MEMBER(gb_rom_mbc2_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mbc2_device::write_ram) +void gb_rom_mbc2_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty() && m_ram_enable) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] = data & 0x0f; @@ -479,7 +479,7 @@ void gb_rom_mbc3_device::update_rtc() m_rtc_regs[4] = (m_rtc_regs[4] & 0xf0) | (curtime.local_time.day >> 8); } -READ8_MEMBER(gb_rom_mbc3_device::read_rom) +uint8_t gb_rom_mbc3_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -487,7 +487,7 @@ READ8_MEMBER(gb_rom_mbc3_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_mbc3_device::write_bank) +void gb_rom_mbc3_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; @@ -517,7 +517,7 @@ WRITE8_MEMBER(gb_rom_mbc3_device::write_bank) } } -READ8_MEMBER(gb_rom_mbc3_device::read_ram) +uint8_t gb_rom_mbc3_device::read_ram(offs_t offset) { if (m_ram_bank < 4 && m_ram_enable) { @@ -534,7 +534,7 @@ READ8_MEMBER(gb_rom_mbc3_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mbc3_device::write_ram) +void gb_rom_mbc3_device::write_ram(offs_t offset, uint8_t data) { if (m_ram_bank < 4 && m_ram_enable) { @@ -552,7 +552,7 @@ WRITE8_MEMBER(gb_rom_mbc3_device::write_ram) // MBC5 -READ8_MEMBER(gb_rom_mbc5_device::read_rom) +uint8_t gb_rom_mbc5_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -560,7 +560,7 @@ READ8_MEMBER(gb_rom_mbc5_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_mbc5_device::write_bank) +void gb_rom_mbc5_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; @@ -588,7 +588,7 @@ WRITE8_MEMBER(gb_rom_mbc5_device::write_bank) } } -READ8_MEMBER(gb_rom_mbc5_device::read_ram) +uint8_t gb_rom_mbc5_device::read_ram(offs_t offset) { if (!m_ram.empty() && m_ram_enable) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)]; @@ -596,7 +596,7 @@ READ8_MEMBER(gb_rom_mbc5_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mbc5_device::write_ram) +void gb_rom_mbc5_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty() && m_ram_enable) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; @@ -604,7 +604,7 @@ WRITE8_MEMBER(gb_rom_mbc5_device::write_ram) // MBC6 -READ8_MEMBER(gb_rom_mbc6_device::read_rom) +uint8_t gb_rom_mbc6_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -614,7 +614,7 @@ READ8_MEMBER(gb_rom_mbc6_device::read_rom) return m_rom[rom_bank_map[m_bank_6000 >> 1] * 0x4000 + (m_bank_6000 & 0x01) * 0x2000 + (offset & 0x1fff)]; } -WRITE8_MEMBER(gb_rom_mbc6_device::write_bank) +void gb_rom_mbc6_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) { @@ -636,7 +636,7 @@ WRITE8_MEMBER(gb_rom_mbc6_device::write_bank) } } -READ8_MEMBER(gb_rom_mbc6_device::read_ram) +uint8_t gb_rom_mbc6_device::read_ram(offs_t offset) { if (!m_ram.empty()) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)]; @@ -644,7 +644,7 @@ READ8_MEMBER(gb_rom_mbc6_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mbc6_device::write_ram) +void gb_rom_mbc6_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty()) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; @@ -652,7 +652,7 @@ WRITE8_MEMBER(gb_rom_mbc6_device::write_ram) // MBC7 -READ8_MEMBER(gb_rom_mbc7_device::read_rom) +uint8_t gb_rom_mbc7_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -660,7 +660,7 @@ READ8_MEMBER(gb_rom_mbc7_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_mbc7_device::write_bank) +void gb_rom_mbc7_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) { @@ -693,7 +693,7 @@ WRITE8_MEMBER(gb_rom_mbc7_device::write_bank) } } -READ8_MEMBER(gb_rom_mbc7_device::read_ram) +uint8_t gb_rom_mbc7_device::read_ram(offs_t offset) { if (!m_ram.empty()) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)]; @@ -701,7 +701,7 @@ READ8_MEMBER(gb_rom_mbc7_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mbc7_device::write_ram) +void gb_rom_mbc7_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty()) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; @@ -710,12 +710,12 @@ WRITE8_MEMBER(gb_rom_mbc7_device::write_ram) // M161 -READ8_MEMBER(gb_rom_m161_device::read_rom) +uint8_t gb_rom_m161_device::read_rom(offs_t offset) { return m_rom[rom_bank_map[m_base_bank] * 0x4000 + (offset & 0x7fff)]; } -WRITE8_MEMBER(gb_rom_m161_device::write_bank) +void gb_rom_m161_device::write_bank(offs_t offset, uint8_t data) { // the mapper (74HC161A) only has data lines D2..D0 data &= 0x07; @@ -736,7 +736,7 @@ WRITE8_MEMBER(gb_rom_m161_device::write_bank) // MMM01 -READ8_MEMBER(gb_rom_mmm01_device::read_rom) +uint8_t gb_rom_mmm01_device::read_rom(offs_t offset) { uint16_t romb = m_romb & ~(0x1e0 | m_romb_nwe); uint16_t romb_base = m_romb & (0x1e0 | m_romb_nwe); @@ -765,7 +765,7 @@ READ8_MEMBER(gb_rom_mmm01_device::read_rom) return m_rom[rom_bank_map[romb] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_mmm01_device::write_bank) +void gb_rom_mmm01_device::write_bank(offs_t offset, uint8_t data) { // the mapper only has data lines D6..D0 data &= 0x7f; @@ -810,7 +810,7 @@ WRITE8_MEMBER(gb_rom_mmm01_device::write_bank) } } -READ8_MEMBER(gb_rom_mmm01_device::read_ram) +uint8_t gb_rom_mmm01_device::read_ram(offs_t offset) { uint8_t ramb_masked = ((offset & 0x4000) | m_mode ? m_ramb : m_ramb & ~0x03); uint8_t ramb = ramb_masked; @@ -827,7 +827,7 @@ READ8_MEMBER(gb_rom_mmm01_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_mmm01_device::write_ram) +void gb_rom_mmm01_device::write_ram(offs_t offset, uint8_t data) { uint8_t ramb_masked = ((offset & 0x4000) | m_mode ? m_ramb : m_ramb & ~0x03); uint8_t ramb = ramb_masked; @@ -844,7 +844,7 @@ WRITE8_MEMBER(gb_rom_mmm01_device::write_ram) // Sachen MMC1 -READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom) +uint8_t gb_rom_sachen_mmc1_device::read_rom(offs_t offset) { uint16_t off_edit = offset; @@ -875,7 +875,7 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom) return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank & ~m_mask)] * 0x4000 + (off_edit & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank) +void gb_rom_sachen_mmc1_device::write_bank(offs_t offset, uint8_t data) { /* Only A15..A6, A4, A1..A0 are connected */ /* We only decode upper three bits */ @@ -916,7 +916,7 @@ WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank) // Sachen MMC2 -READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom) +uint8_t gb_rom_sachen_mmc2_device::read_rom(offs_t offset) { uint16_t off_edit = offset; @@ -954,7 +954,7 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom) return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank & ~m_mask)] * 0x4000 + (off_edit & 0x3fff)]; } -READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram) +uint8_t gb_rom_sachen_mmc2_device::read_ram(offs_t offset) { if (m_mode == MODE_LOCKED_DMG) { m_unlock_cnt = 0x00; @@ -964,7 +964,7 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram) } -WRITE8_MEMBER(gb_rom_sachen_mmc2_device::write_ram) +void gb_rom_sachen_mmc2_device::write_ram(offs_t offset, uint8_t data) { if (m_mode == MODE_LOCKED_DMG) { m_unlock_cnt = 0x00; @@ -976,7 +976,7 @@ WRITE8_MEMBER(gb_rom_sachen_mmc2_device::write_ram) // 188 in 1 pirate (only preliminary) -READ8_MEMBER(gb_rom_188in1_device::read_rom) +uint8_t gb_rom_188in1_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[m_game_base + rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -984,7 +984,7 @@ READ8_MEMBER(gb_rom_188in1_device::read_rom) return m_rom[m_game_base + rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_188in1_device::write_bank) +void gb_rom_188in1_device::write_bank(offs_t offset, uint8_t data) { if (offset == 0x7b00) { @@ -1003,24 +1003,24 @@ WRITE8_MEMBER(gb_rom_188in1_device::write_bank) printf("write to 0x%X data 0x%X\n", offset, data); } else - gb_rom_mbc1_device::write_bank(space, offset, data); + gb_rom_mbc1_device::write_bank(offset, data); } // MBC5 variant used by Li Cheng / Niutoude games -WRITE8_MEMBER(gb_rom_licheng_device::write_bank) +void gb_rom_licheng_device::write_bank(offs_t offset, uint8_t data) { if (offset > 0x2100 && offset < 0x3000) return; - gb_rom_mbc5_device::write_bank(space, offset, data); + gb_rom_mbc5_device::write_bank(offset, data); } // MBC5 variant used by Chong Wu Xiao Jing Ling (this appears to be a re-release of a Li Cheng / Niutoude game, // given that it contains the Niutoude logo, with most protection checks patched out) -READ8_MEMBER(gb_rom_chongwu_device::read_rom) +uint8_t gb_rom_chongwu_device::read_rom(offs_t offset) { // protection check at the first read here... if (offset == 0x41c3 && !m_protection_checked) @@ -1056,7 +1056,7 @@ void gb_rom_sintax_device::set_xor_for_bank(uint8_t bank) } } -READ8_MEMBER(gb_rom_sintax_device::read_rom) +uint8_t gb_rom_sintax_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -1064,7 +1064,7 @@ READ8_MEMBER(gb_rom_sintax_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)] ^ m_currentxor; } -WRITE8_MEMBER(gb_rom_sintax_device::write_bank) +void gb_rom_sintax_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; @@ -1113,7 +1113,7 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_bank) if (!m_sintax_mode) { m_sintax_mode = data; - write_bank(space, 0x2000, 1); //force a fake bank switch + write_bank(0x2000, 1); //force a fake bank switch } // printf("sintax mode %x\n", m_sintax_mode & 0xf); } @@ -1141,7 +1141,7 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_bank) } -READ8_MEMBER(gb_rom_sintax_device::read_ram) +uint8_t gb_rom_sintax_device::read_ram(offs_t offset) { if (!m_ram.empty() && m_ram_enable) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)]; @@ -1149,7 +1149,7 @@ READ8_MEMBER(gb_rom_sintax_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_sintax_device::write_ram) +void gb_rom_sintax_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty() && m_ram_enable) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; @@ -1169,7 +1169,7 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_ram) // MBC5 variant used by Digimon 2 (and maybe 4?) -READ8_MEMBER(gb_rom_digimon_device::read_rom) +uint8_t gb_rom_digimon_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -1177,7 +1177,7 @@ READ8_MEMBER(gb_rom_digimon_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_digimon_device::write_bank) +void gb_rom_digimon_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; @@ -1206,7 +1206,7 @@ WRITE8_MEMBER(gb_rom_digimon_device::write_bank) // printf("written $07 %X at %X\n", data, offset); } -READ8_MEMBER(gb_rom_digimon_device::read_ram) +uint8_t gb_rom_digimon_device::read_ram(offs_t offset) { if (!m_ram.empty() && m_ram_enable) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)]; @@ -1214,7 +1214,7 @@ READ8_MEMBER(gb_rom_digimon_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_digimon_device::write_ram) +void gb_rom_digimon_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty() && m_ram_enable) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; @@ -1223,7 +1223,7 @@ WRITE8_MEMBER(gb_rom_digimon_device::write_ram) // MBC1 variant used by Yong Yong for Rockman 8 -READ8_MEMBER(gb_rom_rockman8_device::read_rom) +uint8_t gb_rom_rockman8_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[m_latch_bank * 0x4000 + (offset & 0x3fff)]; @@ -1231,7 +1231,7 @@ READ8_MEMBER(gb_rom_rockman8_device::read_rom) return m_rom[m_latch_bank2 * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_rockman8_device::write_bank) +void gb_rom_rockman8_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) return; @@ -1248,7 +1248,7 @@ WRITE8_MEMBER(gb_rom_rockman8_device::write_bank) } } -READ8_MEMBER(gb_rom_rockman8_device::read_ram) +uint8_t gb_rom_rockman8_device::read_ram(offs_t offset) { if (!m_ram.empty()) return m_ram[offset]; @@ -1256,7 +1256,7 @@ READ8_MEMBER(gb_rom_rockman8_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_rockman8_device::write_ram) +void gb_rom_rockman8_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty()) m_ram[offset] = data; @@ -1291,7 +1291,7 @@ static uint8_t smb3_table1[0x20] = // however, no such a write ever happen (only bit4 is written, but changing mode with // bit4 breaks the gfx...) -READ8_MEMBER(gb_rom_sm3sp_device::read_rom) +uint8_t gb_rom_sm3sp_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[0] * 0x4000 + (offset & 0x3fff)]; @@ -1299,7 +1299,7 @@ READ8_MEMBER(gb_rom_sm3sp_device::read_rom) return m_rom[m_latch_bank2 * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_sm3sp_device::write_bank) +void gb_rom_sm3sp_device::write_bank(offs_t offset, uint8_t data) { // printf("write 0x%x at %x\n", data, offset); if (offset < 0x2000) @@ -1352,11 +1352,11 @@ WRITE8_MEMBER(gb_rom_sm3sp_device::write_bank) { // printf("write mode %x\n", data); m_mode = BIT(data, 5); -// write_bank(space, 0x2000, 1); +// write_bank(0x2000, 1); } } -READ8_MEMBER(gb_rom_sm3sp_device::read_ram) +uint8_t gb_rom_sm3sp_device::read_ram(offs_t offset) { if (!m_ram.empty()) return m_ram[offset]; @@ -1364,7 +1364,7 @@ READ8_MEMBER(gb_rom_sm3sp_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_sm3sp_device::write_ram) +void gb_rom_sm3sp_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty()) m_ram[offset] = data; @@ -1375,7 +1375,7 @@ void gb_rom_camera_device::update_camera() m_camera_regs[0] &= ~0x1; } -READ8_MEMBER(gb_rom_camera_device::read_rom) +uint8_t gb_rom_camera_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -1383,7 +1383,7 @@ READ8_MEMBER(gb_rom_camera_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_camera_device::write_bank) +void gb_rom_camera_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x2000) m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; @@ -1403,7 +1403,7 @@ WRITE8_MEMBER(gb_rom_camera_device::write_bank) } } -READ8_MEMBER(gb_rom_camera_device::read_ram) +uint8_t gb_rom_camera_device::read_ram(offs_t offset) { if ((m_ram_bank & 0x10) != 0) return (offset == 0) ? (m_camera_regs[0] & 0x7) : 0; @@ -1417,7 +1417,7 @@ READ8_MEMBER(gb_rom_camera_device::read_ram) return 0; } -WRITE8_MEMBER(gb_rom_camera_device::write_ram) +void gb_rom_camera_device::write_ram(offs_t offset, uint8_t data) { if ((m_ram_bank & 0x10) != 0) { diff --git a/src/devices/bus/gameboy/mbc.h b/src/devices/bus/gameboy/mbc.h index 4bc169488bf..9658369d6fb 100644 --- a/src/devices/bus/gameboy/mbc.h +++ b/src/devices/bus/gameboy/mbc.h @@ -13,9 +13,9 @@ class gb_rom_mbc_device : public device_t, { public: // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // construction/destruction @@ -40,10 +40,10 @@ public: // construction/destruction gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: enum { @@ -70,10 +70,10 @@ public: // construction/destruction gb_rom_mbc2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -89,10 +89,10 @@ public: // construction/destruction gb_rom_mbc3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -113,10 +113,10 @@ public: // construction/destruction gb_rom_mbc5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: gb_rom_mbc5_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -134,10 +134,10 @@ public: // construction/destruction gb_rom_mbc6_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -156,10 +156,10 @@ public: // construction/destruction gb_rom_mbc7_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -175,10 +175,10 @@ public: // construction/destruction gb_rom_m161_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override { return 0xff; } - virtual DECLARE_WRITE8_MEMBER(write_ram) override { } + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override { return 0xff; } + virtual void write_ram(offs_t offset, uint8_t data) override { } protected: // device-level overrides @@ -197,10 +197,10 @@ public: gb_rom_mmm01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -225,10 +225,10 @@ public: // construction/destruction gb_rom_sachen_mmc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override { return 0xff; } - virtual DECLARE_WRITE8_MEMBER(write_ram) override { } + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override { return 0xff; } + virtual void write_ram(offs_t offset, uint8_t data) override { } protected: enum { @@ -253,9 +253,9 @@ public: // construction/destruction gb_rom_sachen_mmc2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: enum { @@ -277,8 +277,8 @@ public: gb_rom_188in1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -297,10 +297,10 @@ public: gb_rom_sintax_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -321,7 +321,7 @@ public: // construction/destruction gb_rom_chongwu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; + virtual uint8_t read_rom(offs_t offset) override; protected: // device-level overrides @@ -339,7 +339,7 @@ public: // construction/destruction gb_rom_licheng_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_WRITE8_MEMBER(write_bank) override; + virtual void write_bank(offs_t offset, uint8_t data) override; }; // ======================> gb_rom_digimon_device @@ -350,15 +350,15 @@ public: // construction/destruction gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; protected: // device-level overrides virtual void device_start() override { shared_start(); } virtual void device_reset() override { shared_reset(); } - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual void write_ram(offs_t offset, uint8_t data) override; }; // ======================> gb_rom_rockman8_device @@ -369,10 +369,10 @@ public: gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -390,10 +390,10 @@ public: gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -410,10 +410,10 @@ public: // construction/destruction gb_rom_camera_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides diff --git a/src/devices/bus/gameboy/rom.cpp b/src/devices/bus/gameboy/rom.cpp index 47049bcd836..d3e90d73f51 100644 --- a/src/devices/bus/gameboy/rom.cpp +++ b/src/devices/bus/gameboy/rom.cpp @@ -145,13 +145,13 @@ void megaduck_rom_device::device_reset() mapper specific handlers -------------------------------------------------*/ -READ8_MEMBER(gb_rom_device::read_rom) +uint8_t gb_rom_device::read_rom(offs_t offset) { m_latch_bank = offset / 0x4000; return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; } -READ8_MEMBER(gb_rom_device::read_ram) +uint8_t gb_rom_device::read_ram(offs_t offset) { if (!m_ram.empty()) return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset]; @@ -159,7 +159,7 @@ READ8_MEMBER(gb_rom_device::read_ram) return 0xff; } -WRITE8_MEMBER(gb_rom_device::write_ram) +void gb_rom_device::write_ram(offs_t offset, uint8_t data) { if (!m_ram.empty()) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset] = data; @@ -168,7 +168,7 @@ WRITE8_MEMBER(gb_rom_device::write_ram) // Tamagotchi -READ8_MEMBER(gb_rom_tama5_device::read_rom) +uint8_t gb_rom_tama5_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -176,12 +176,12 @@ READ8_MEMBER(gb_rom_tama5_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -READ8_MEMBER(gb_rom_tama5_device::read_ram) +uint8_t gb_rom_tama5_device::read_ram(offs_t offset) { return m_rtc_reg; } -WRITE8_MEMBER(gb_rom_tama5_device::write_ram) +void gb_rom_tama5_device::write_ram(offs_t offset, uint8_t data) { switch (offset & 0x0001) { @@ -259,12 +259,12 @@ WRITE8_MEMBER(gb_rom_tama5_device::write_ram) // Wisdom Tree -READ8_MEMBER(gb_rom_wisdom_device::read_rom) +uint8_t gb_rom_wisdom_device::read_rom(offs_t offset) { return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + offset]; } -WRITE8_MEMBER(gb_rom_wisdom_device::write_bank) +void gb_rom_wisdom_device::write_bank(offs_t offset, uint8_t data) { if (offset < 0x4000) m_latch_bank = (offset << 1) & 0x1ff; @@ -273,7 +273,7 @@ WRITE8_MEMBER(gb_rom_wisdom_device::write_bank) // Yong Yong pirate -READ8_MEMBER(gb_rom_yong_device::read_rom) +uint8_t gb_rom_yong_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -281,7 +281,7 @@ READ8_MEMBER(gb_rom_yong_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_yong_device::write_bank) +void gb_rom_yong_device::write_bank(offs_t offset, uint8_t data) { if (offset == 0x2000) m_latch_bank2 = data; @@ -290,7 +290,7 @@ WRITE8_MEMBER(gb_rom_yong_device::write_bank) // ATV Racin pirate (incomplete) -READ8_MEMBER(gb_rom_atvrac_device::read_rom) +uint8_t gb_rom_atvrac_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -298,7 +298,7 @@ READ8_MEMBER(gb_rom_atvrac_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_atvrac_device::write_bank) +void gb_rom_atvrac_device::write_bank(offs_t offset, uint8_t data) { if (offset == 0x3f00) { @@ -312,7 +312,7 @@ WRITE8_MEMBER(gb_rom_atvrac_device::write_bank) // La Sa Ma pirate (incomplete) -READ8_MEMBER(gb_rom_lasama_device::read_rom) +uint8_t gb_rom_lasama_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -320,7 +320,7 @@ READ8_MEMBER(gb_rom_lasama_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(gb_rom_lasama_device::write_bank) +void gb_rom_lasama_device::write_bank(offs_t offset, uint8_t data) { if (offset == 0x2080) { @@ -341,7 +341,7 @@ WRITE8_MEMBER(gb_rom_lasama_device::write_bank) // MegaDuck carts -READ8_MEMBER(megaduck_rom_device::read_rom) +uint8_t megaduck_rom_device::read_rom(offs_t offset) { if (offset < 0x4000) return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; @@ -349,13 +349,13 @@ READ8_MEMBER(megaduck_rom_device::read_rom) return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } -WRITE8_MEMBER(megaduck_rom_device::write_bank) +void megaduck_rom_device::write_bank(offs_t offset, uint8_t data) { if (offset == 0x0001) m_latch_bank2 = data; } -WRITE8_MEMBER(megaduck_rom_device::write_ram) +void megaduck_rom_device::write_ram(offs_t offset, uint8_t data) { m_latch_bank = data * 2; m_latch_bank2 = data * 2 + 1; diff --git a/src/devices/bus/gameboy/rom.h b/src/devices/bus/gameboy/rom.h index a5439fba598..f2388446863 100644 --- a/src/devices/bus/gameboy/rom.h +++ b/src/devices/bus/gameboy/rom.h @@ -16,9 +16,9 @@ public: gb_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: gb_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -39,9 +39,9 @@ public: gb_rom_tama5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -61,8 +61,8 @@ public: gb_rom_wisdom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -78,8 +78,8 @@ public: gb_rom_yong_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -95,8 +95,8 @@ public: gb_rom_atvrac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -112,8 +112,8 @@ public: gb_rom_lasama_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -131,9 +131,9 @@ public: megaduck_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_rom) override; - virtual DECLARE_WRITE8_MEMBER(write_bank) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual void write_ram(offs_t offset, uint8_t data) override; protected: megaduck_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/psx/gamebooster.cpp b/src/devices/bus/psx/gamebooster.cpp index 3513f7714e2..309ff1949a3 100644 --- a/src/devices/bus/psx/gamebooster.cpp +++ b/src/devices/bus/psx/gamebooster.cpp @@ -82,8 +82,8 @@ READ16_MEMBER(psx_gamebooster_device::exp_r) offset -= 0x20000; uint16_t retval = 0;; - if (mem_mask & 0xff00) retval |= (m_cartslot->read_rom(space, (offset*2)+1))<<8; - if (mem_mask & 0x00ff) retval |= m_cartslot->read_rom(space, (offset*2)+0); + if (mem_mask & 0xff00) retval |= (m_cartslot->read_rom((offset*2)+1))<<8; + if (mem_mask & 0x00ff) retval |= m_cartslot->read_rom((offset*2)+0); return retval; } @@ -107,8 +107,8 @@ WRITE16_MEMBER(psx_gamebooster_device::exp_w) offset -= 0x20000; logerror("%s: psx_gamebooster_device::exp_w %04x %04x\n", machine().describe_context(), offset*2, data); - if (mem_mask & 0xff00) m_cartslot->write_bank(space, (offset*2)+1, data>>8); - if (mem_mask & 0x00ff) m_cartslot->write_bank(space, (offset*2)+0, data); // send this 2nd or it erases the bank with the above + if (mem_mask & 0xff00) m_cartslot->write_bank((offset*2)+1, data>>8); + if (mem_mask & 0x00ff) m_cartslot->write_bank((offset*2)+0, data); // send this 2nd or it erases the bank with the above } else diff --git a/src/devices/bus/snes/bsx.cpp b/src/devices/bus/snes/bsx.cpp index 1f6efc1af6c..6aacaa3ed2c 100644 --- a/src/devices/bus/snes/bsx.cpp +++ b/src/devices/bus/snes/bsx.cpp @@ -283,13 +283,13 @@ void sns_rom_bsx_device::access_update() } } -READ8_MEMBER(sns_rom_bsx_device::read_l) +uint8_t sns_rom_bsx_device::read_l(offs_t offset) { if (offset < 0x200000 && access_00_1f) { // 0x00-0x1f:0x8000-0xffff -> CART if (m_slot->m_cart && m_slot->m_cart->get_rom_size()) - return m_slot->m_cart->read_l(space, offset); + return m_slot->m_cart->read_l(offset); } if (offset >= 0x200000 && offset < 0x400000) { @@ -334,13 +334,13 @@ READ8_MEMBER(sns_rom_bsx_device::read_l) } -READ8_MEMBER(sns_rom_bsx_device::read_h) +uint8_t sns_rom_bsx_device::read_h(offs_t offset) { if (offset < 0x200000 && access_80_9f) { // 0x80-0x9f:0x8000-0xffff -> CART if (m_slot->m_cart && m_slot->m_cart->get_rom_size()) - return m_slot->m_cart->read_l(space, offset); + return m_slot->m_cart->read_l(offset); } // if not in any of the cases above... @@ -358,7 +358,7 @@ READ8_MEMBER(sns_rom_bsx_device::read_h) //return 0x00; } -WRITE8_MEMBER(sns_rom_bsx_device::write_l) +void sns_rom_bsx_device::write_l(offs_t offset, uint8_t data) { if (offset < 0x200000 && access_00_1f) { @@ -400,7 +400,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::write_l) } -WRITE8_MEMBER(sns_rom_bsx_device::write_h) +void sns_rom_bsx_device::write_h(offs_t offset, uint8_t data) { if (offset < 0x200000 && access_80_9f) { @@ -416,7 +416,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::write_h) } -READ8_MEMBER(sns_rom_bsx_device::chip_read) +uint8_t sns_rom_bsx_device::chip_read(offs_t offset) { if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0) return m_base_unit->read(offset & 0xffff); @@ -435,7 +435,7 @@ READ8_MEMBER(sns_rom_bsx_device::chip_read) return 0x00; } -WRITE8_MEMBER(sns_rom_bsx_device::chip_write) +void sns_rom_bsx_device::chip_write(offs_t offset, uint8_t data) { if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0) m_base_unit->write(offset & 0xffff, data); @@ -457,7 +457,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::chip_write) // LoROM cart w/BS-X slot -READ8_MEMBER(sns_rom_bsxlo_device::read_l) +uint8_t sns_rom_bsxlo_device::read_l(offs_t offset) { if (offset < 0x400000) { @@ -469,7 +469,7 @@ READ8_MEMBER(sns_rom_bsxlo_device::read_l) return 0x00; } -READ8_MEMBER(sns_rom_bsxlo_device::read_h) +uint8_t sns_rom_bsxlo_device::read_h(offs_t offset) { if (offset < 0x400000) { @@ -481,7 +481,7 @@ READ8_MEMBER(sns_rom_bsxlo_device::read_h) else if (offset < 0x700000) { if (m_slot->m_cart && m_slot->m_cart->get_rom_size()) - return m_slot->m_cart->read_h(space, offset); + return m_slot->m_cart->read_h(offset); } // RAM [70-7f] return 0x00; @@ -490,12 +490,12 @@ READ8_MEMBER(sns_rom_bsxlo_device::read_h) // HiROM cart w/BS-X slot -READ8_MEMBER(sns_rom_bsxhi_device::read_l) +uint8_t sns_rom_bsxhi_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_bsxhi_device::read_h) +uint8_t sns_rom_bsxhi_device::read_h(offs_t offset) { if (offset < 0x200000 && (offset & 0xffff) >= 0x8000) { @@ -505,7 +505,7 @@ READ8_MEMBER(sns_rom_bsxhi_device::read_h) if (offset >= 0x200000 && offset < 0x400000) { if (m_slot->m_cart && m_slot->m_cart->get_rom_size() && (offset & 0xffff) >= 0x8000) - return m_slot->m_cart->read_h(space, offset); + return m_slot->m_cart->read_h(offset); } if (offset >= 0x400000 && offset < 0x600000) { @@ -516,7 +516,7 @@ READ8_MEMBER(sns_rom_bsxhi_device::read_h) if (offset >= 0x600000) { if (m_slot->m_cart && m_slot->m_cart->get_rom_size()) - return m_slot->m_cart->read_h(space, offset); + return m_slot->m_cart->read_h(offset); } return 0xff; } @@ -530,18 +530,18 @@ READ8_MEMBER(sns_rom_bsxhi_device::read_h) // Hence, we use low read handler for ROM access in the 0x8000-0xffff range (i.e. mempack mapped as LoROM) and // hi read handler for ROM access in the 0x0000-0xffff range (i.e. mempack mapped as HiROM)... -READ8_MEMBER(sns_rom_bsmempak_device::read_l) +uint8_t sns_rom_bsmempak_device::read_l(offs_t offset) { int bank = offset / 0x10000; return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; } -READ8_MEMBER(sns_rom_bsmempak_device::read_h) +uint8_t sns_rom_bsmempak_device::read_h(offs_t offset) { int bank = offset / 0x8000; return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; } -WRITE8_MEMBER(sns_rom_bsmempak_device::write_l) +void sns_rom_bsmempak_device::write_l(offs_t offset, uint8_t data) { } diff --git a/src/devices/bus/snes/bsx.h b/src/devices/bus/snes/bsx.h index 24ce7b9f691..e144ff118ff 100644 --- a/src/devices/bus/snes/bsx.h +++ b/src/devices/bus/snes/bsx.h @@ -18,12 +18,12 @@ public: sns_rom_bsx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // additional reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_WRITE8_MEMBER(write_l) override; - virtual DECLARE_WRITE8_MEMBER(write_h) override; - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual void write_l(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, uint8_t data) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: class bsx_base @@ -84,8 +84,8 @@ public: sns_rom_bsxlo_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // additional reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; protected: // device-level overrides @@ -106,8 +106,8 @@ public: sns_rom_bsxhi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // additional reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; protected: // device-level overrides @@ -129,12 +129,12 @@ public: sns_rom_bsmempak_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // additional reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_WRITE8_MEMBER(write_l) override; -// virtual DECLARE_WRITE8_MEMBER(write_h); -// virtual DECLARE_READ8_MEMBER(chip_read); -// virtual DECLARE_WRITE8_MEMBER(chip_write); + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual void write_l(offs_t offset, uint8_t data) override; +// virtual void write_h(offs_t offset, uint8_t data) override; +// virtual uint8_t chip_read(offs_t offset) override; +// virtual void chip_write(offs_t offset, uint8_t data) override; protected: // device-level overrides diff --git a/src/devices/bus/snes/event.cpp b/src/devices/bus/snes/event.cpp index 34d064a03d0..3591a2a679a 100644 --- a/src/devices/bus/snes/event.cpp +++ b/src/devices/bus/snes/event.cpp @@ -60,7 +60,7 @@ void sns_pfest94_device::device_reset() mapper specific handlers -------------------------------------------------*/ -READ8_MEMBER(sns_pfest94_device::read_l) +uint8_t sns_pfest94_device::read_l(offs_t offset) { // menu if ((offset & 0x208000) == 0x208000) @@ -77,7 +77,7 @@ READ8_MEMBER(sns_pfest94_device::read_l) } } -READ8_MEMBER(sns_pfest94_device::read_h) +uint8_t sns_pfest94_device::read_h(offs_t offset) { // menu if ((offset & 0x208000) == 0x208000) @@ -103,7 +103,7 @@ READ8_MEMBER(sns_pfest94_device::read_h) // these are used for two diff effects: both to select game from menu and to access the DSP when running SMK! -READ8_MEMBER( sns_pfest94_device::chip_read ) +uint8_t sns_pfest94_device::chip_read(offs_t offset) { if (offset & 0x8000) { @@ -119,7 +119,7 @@ READ8_MEMBER( sns_pfest94_device::chip_read ) } -WRITE8_MEMBER( sns_pfest94_device::chip_write ) +void sns_pfest94_device::chip_write(offs_t offset, uint8_t data) { if (offset & 0x8000) { @@ -186,12 +186,12 @@ void sns_pfest94_device::speedup_addon_bios_access() // DSP dump contains prg at offset 0 and data at offset 0x2000 -READ32_MEMBER( sns_pfest94_device::necdsp_prg_r ) +uint32_t sns_pfest94_device::necdsp_prg_r(offs_t offset) { return get_prg(&m_bios[0], offset); } -READ16_MEMBER( sns_pfest94_device::necdsp_data_r ) +uint16_t sns_pfest94_device::necdsp_data_r(offs_t offset) { return get_data(&m_bios[0], offset + 0x2000/2); } diff --git a/src/devices/bus/snes/event.h b/src/devices/bus/snes/event.h index 812022b3799..dedd18f921a 100644 --- a/src/devices/bus/snes/event.h +++ b/src/devices/bus/snes/event.h @@ -32,13 +32,13 @@ protected: virtual void speedup_addon_bios_access() override; // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; - virtual DECLARE_READ32_MEMBER(necdsp_prg_r); - virtual DECLARE_READ16_MEMBER(necdsp_data_r); + virtual uint32_t necdsp_prg_r(offs_t offset); + virtual uint16_t necdsp_data_r(offs_t offset); private: required_device m_upd7725; diff --git a/src/devices/bus/snes/rom.cpp b/src/devices/bus/snes/rom.cpp index bae27f21fad..3308808a008 100644 --- a/src/devices/bus/snes/rom.cpp +++ b/src/devices/bus/snes/rom.cpp @@ -174,12 +174,12 @@ void sns_rom_20col_device::device_start() mapper specific handlers -------------------------------------------------*/ -READ8_MEMBER(sns_rom_device::read_l) +uint8_t sns_rom_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_device::read_h) +uint8_t sns_rom_device::read_h(offs_t offset) { int bank = offset / 0x10000; return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; @@ -200,7 +200,7 @@ READ8_MEMBER(sns_rom_device::read_h) ***********************************************************************************************************/ -READ8_MEMBER( sns_rom_obc1_device::chip_read ) +uint8_t sns_rom_obc1_device::chip_read(offs_t offset) { uint16_t address = offset & 0x1fff; uint8_t value; @@ -236,7 +236,7 @@ READ8_MEMBER( sns_rom_obc1_device::chip_read ) } -WRITE8_MEMBER( sns_rom_obc1_device::chip_write ) +void sns_rom_obc1_device::chip_write(offs_t offset, uint8_t data) { uint16_t address = offset & 0x1fff; uint8_t temp; @@ -289,12 +289,12 @@ WRITE8_MEMBER( sns_rom_obc1_device::chip_write ) // Pokemon (and many others): a byte is written and a permutation of its bits must be returned. // Address range for read/write depends on the game (check snes.xml) -READ8_MEMBER( sns_rom_pokemon_device::chip_read ) +uint8_t sns_rom_pokemon_device::chip_read(offs_t offset) { return bitswap<8>(m_latch,0,6,7,1,2,3,4,5); } -WRITE8_MEMBER( sns_rom_pokemon_device::chip_write ) +void sns_rom_pokemon_device::chip_write(offs_t offset, uint8_t data) { m_latch = data; } @@ -340,7 +340,7 @@ void sns_rom_tekken2_device::update_prot(uint32_t offset) } } -READ8_MEMBER( sns_rom_tekken2_device::chip_read ) +uint8_t sns_rom_tekken2_device::chip_read(offs_t offset) { update_prot(offset); @@ -362,10 +362,10 @@ READ8_MEMBER( sns_rom_tekken2_device::chip_read ) } } - return 0xff; // should be open_bus + return read_open_bus(); } -WRITE8_MEMBER( sns_rom_tekken2_device::chip_write ) +void sns_rom_tekken2_device::chip_write(offs_t offset, uint8_t data) { update_prot(offset); } @@ -373,7 +373,7 @@ WRITE8_MEMBER( sns_rom_tekken2_device::chip_write ) // Soul Blade: Adresses $xxx0-$xxx3 in banks $80-$bf always read $55, $0f, $aa, $f0. // Banks $c0-$ff return open bus. -READ8_MEMBER( sns_rom_soulblad_device::chip_read ) +uint8_t sns_rom_soulblad_device::chip_read(offs_t offset) { uint8_t value; offset &= 3; @@ -401,36 +401,36 @@ READ8_MEMBER( sns_rom_soulblad_device::chip_read ) // The actual banks depends on the last 8bits of the address accessed. // Type 1: bits0-4 of the address are used as base bank (256KB chunks) -READ8_MEMBER(sns_rom_mcpirate1_device::read_l) +uint8_t sns_rom_mcpirate1_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_mcpirate1_device::read_h) +uint8_t sns_rom_mcpirate1_device::read_h(offs_t offset) { int bank = (offset / 0x10000) + (m_base_bank * 8); return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; } -WRITE8_MEMBER( sns_rom_mcpirate1_device::chip_write ) +void sns_rom_mcpirate1_device::chip_write(offs_t offset, uint8_t data) { m_base_bank = offset & 0x1f; // printf("offset %X data %X bank %X\n", offset, data, m_base_bank); } // Type 2: bits0-3 & bit5 of the address are used as base bank (256KB chunks) -READ8_MEMBER(sns_rom_mcpirate2_device::read_l) +uint8_t sns_rom_mcpirate2_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_mcpirate2_device::read_h) +uint8_t sns_rom_mcpirate2_device::read_h(offs_t offset) { int bank = (offset / 0x10000) + (m_base_bank * 8); return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; } -WRITE8_MEMBER( sns_rom_mcpirate2_device::chip_write ) +void sns_rom_mcpirate2_device::chip_write(offs_t offset, uint8_t data) { m_base_bank = (offset & 0x0f) | ((offset & 0x20) >> 1); // printf("offset %X data %X bank %X\n", offset, data, m_base_bank); @@ -443,19 +443,19 @@ WRITE8_MEMBER( sns_rom_mcpirate2_device::chip_write ) // accesses in [01-3f] don't go to the only 32KB bank) // - bit 5 is always 0 // it's worth to notice that for FC games size of bank is twice the size of original FC PRG -READ8_MEMBER(sns_rom_20col_device::read_l) +uint8_t sns_rom_20col_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_20col_device::read_h) +uint8_t sns_rom_20col_device::read_h(offs_t offset) { int prg32k = (!BIT(m_base_bank, 6) && BIT(m_base_bank, 7)); int bank = prg32k ? 0 : (offset / 0x10000); return m_rom[((m_base_bank & 0x1f) + bank) * 0x8000 + (offset & 0x7fff)]; } -WRITE8_MEMBER( sns_rom_20col_device::chip_write ) +void sns_rom_20col_device::chip_write(offs_t offset, uint8_t data) { // [#] game - written bank value // [01] spartan x - c6 @@ -486,23 +486,23 @@ WRITE8_MEMBER( sns_rom_20col_device::chip_write ) // Work in progress (probably very wrong) -READ8_MEMBER( sns_rom_banana_device::chip_read ) +uint8_t sns_rom_banana_device::chip_read(offs_t offset) { return bitswap<8>(m_latch[0xf],0,6,7,1,2,3,4,5); } -WRITE8_MEMBER( sns_rom_banana_device::chip_write ) +void sns_rom_banana_device::chip_write(offs_t offset, uint8_t data) { // printf("write addr %X data %X\n", offset, data); m_latch[0xf] = data; } -READ8_MEMBER( sns_rom_bugs_device::chip_read ) +uint8_t sns_rom_bugs_device::chip_read(offs_t offset) { return bitswap<8>(m_latch[offset & 0xff],0,6,7,1,2,3,4,5); } -WRITE8_MEMBER( sns_rom_bugs_device::chip_write ) +void sns_rom_bugs_device::chip_write(offs_t offset, uint8_t data) { m_latch[offset & 0xff] = data; } diff --git a/src/devices/bus/snes/rom.h b/src/devices/bus/snes/rom.h index 9e95e4b8e00..d2a09b774c1 100644 --- a/src/devices/bus/snes/rom.h +++ b/src/devices/bus/snes/rom.h @@ -17,8 +17,8 @@ public: sns_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; protected: sns_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -36,8 +36,8 @@ public: sns_rom_obc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // additional reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -60,9 +60,9 @@ public: // construction/destruction sns_rom_pokemon_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device - virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device + // reading and writing (protection device) + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -80,9 +80,9 @@ public: // construction/destruction sns_rom_tekken2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device - virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device + // reading and writing (protection device) + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -104,8 +104,8 @@ public: // construction/destruction sns_rom_soulblad_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device + // reading and writing (protection device) + virtual uint8_t chip_read(offs_t offset) override; }; // ======================> sns_rom_mcpirate1_device @@ -117,9 +117,9 @@ public: sns_rom_mcpirate1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; // bankswitch device + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; // bankswitch device protected: // device-level overrides @@ -138,9 +138,9 @@ public: sns_rom_mcpirate2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; // bankswitch device + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; // bankswitch device protected: // device-level overrides @@ -159,9 +159,9 @@ public: sns_rom_20col_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; // bankswitch device + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; // bankswitch device protected: // device-level overrides @@ -178,9 +178,9 @@ public: // construction/destruction sns_rom_banana_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device - virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device + // reading and writing (protection device) + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -198,9 +198,9 @@ public: // construction/destruction sns_rom_bugs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device - virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device + // reading and writing (protection device) + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: // device-level overrides diff --git a/src/devices/bus/snes/rom21.cpp b/src/devices/bus/snes/rom21.cpp index 91c61394688..8cc1f6fddb6 100644 --- a/src/devices/bus/snes/rom21.cpp +++ b/src/devices/bus/snes/rom21.cpp @@ -66,14 +66,14 @@ void sns_rom21_srtc_device::device_reset() // low and hi reads are not the same! (different ROM banks are accessed) -READ8_MEMBER(sns_rom21_device::read_l) +uint8_t sns_rom21_device::read_l(offs_t offset) { // here ROM banks from 128 to 255, mirrored twice int bank = (offset & 0x3fffff) / 0x8000; return m_rom[rom_bank_map[bank + 0x80] * 0x8000 + (offset & 0x7fff)]; } -READ8_MEMBER(sns_rom21_device::read_h) +uint8_t sns_rom21_device::read_h(offs_t offset) { // here ROM banks from 0 to 127, mirrored twice int bank = (offset & 0x3fffff) / 0x8000; @@ -173,7 +173,7 @@ uint8_t sns_rom21_srtc_device::srtc_weekday( uint32_t year, uint32_t month, uint // this gets called only for accesses at 0x2800, // because for 0x2801 open bus gets returned... -READ8_MEMBER(sns_rom21_srtc_device::chip_read) +uint8_t sns_rom21_srtc_device::chip_read(offs_t offset) { if (m_mode != RTCM_Read) return 0x00; @@ -194,7 +194,7 @@ READ8_MEMBER(sns_rom21_srtc_device::chip_read) } // this gets called only for accesses at 0x2801 -WRITE8_MEMBER(sns_rom21_srtc_device::chip_write) +void sns_rom21_srtc_device::chip_write(offs_t offset, uint8_t data) { data &= 0x0f; // Only the low four bits are used diff --git a/src/devices/bus/snes/rom21.h b/src/devices/bus/snes/rom21.h index 545e2457ef3..fb9b0b6c65a 100644 --- a/src/devices/bus/snes/rom21.h +++ b/src/devices/bus/snes/rom21.h @@ -18,8 +18,8 @@ public: sns_rom21_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; protected: sns_rom21_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -38,8 +38,8 @@ public: sns_rom21_srtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: // S-RTC specific variables diff --git a/src/devices/bus/snes/sa1.cpp b/src/devices/bus/snes/sa1.cpp index 2c872866ed7..487f176fd86 100644 --- a/src/devices/bus/snes/sa1.cpp +++ b/src/devices/bus/snes/sa1.cpp @@ -204,7 +204,7 @@ void sns_sa1_device::recalc_irqs() // handle this separately to avoid accessing recursively the regs? -uint8_t sns_sa1_device::var_length_read(address_space &space, uint32_t offset) +uint8_t sns_sa1_device::var_length_read(uint32_t offset) { // handle 0xffea/0xffeb/0xffee/0xffef if ((offset & 0xffffe0) == 0x00ffe0) @@ -216,13 +216,13 @@ uint8_t sns_sa1_device::var_length_read(address_space &space, uint32_t offset) } if ((offset & 0xc08000) == 0x008000) //$00-3f:8000-ffff - return read_l(space, (offset & 0x7fffff)); + return read_l(offset & 0x7fffff); if ((offset & 0xc08000) == 0x808000) //$80-bf:8000-ffff - return read_h(space, (offset & 0x7fffff)); + return read_h(offset & 0x7fffff); if ((offset & 0xc00000) == 0xc00000) //$c0-ff:0000-ffff - return read_h(space, (offset & 0x7fffff)); + return read_h(offset & 0x7fffff); if ((offset & 0x40e000) == 0x006000) //$00-3f|80-bf:6000-7fff return read_bwram((m_bwram_snes * 0x2000) + (offset & 0x1fff)); @@ -239,7 +239,7 @@ uint8_t sns_sa1_device::var_length_read(address_space &space, uint32_t offset) return 0; } -void sns_sa1_device::dma_transfer(address_space &space) +void sns_sa1_device::dma_transfer() { // printf("DMA src %08x (%d), dst %08x (%d) cnt %d\n", m_src_addr, m_dma_ctrl & 3, m_dst_addr, m_dma_ctrl & 4, m_dma_cnt); @@ -260,15 +260,15 @@ void sns_sa1_device::dma_transfer(address_space &space) case 0: // ROM if ((dma_src & 0x408000) == 0x008000 && (dma_src & 0x800000) == 0x000000) { - data = read_l(space, (dma_src & 0x7fffff)); + data = read_l(dma_src & 0x7fffff); } if ((dma_src & 0x408000) == 0x008000 && (dma_src & 0x800000) == 0x800000) { - data = read_h(space, (dma_src & 0x7fffff)); + data = read_h(dma_src & 0x7fffff); } if ((dma_src & 0xc00000) == 0xc00000) { - data = read_h(space, (dma_src & 0x7fffff)); + data = read_h(dma_src & 0x7fffff); } break; @@ -311,17 +311,17 @@ void sns_sa1_device::dma_transfer(address_space &space) recalc_irqs(); } -void sns_sa1_device::dma_cctype1_transfer(address_space &space) +void sns_sa1_device::dma_cctype1_transfer() { m_scpu_flags |= SCPU_IRQ_CHARCONV; recalc_irqs(); } -void sns_sa1_device::dma_cctype2_transfer(address_space &space) +void sns_sa1_device::dma_cctype2_transfer() { } -uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset) +uint8_t sns_sa1_device::read_regs(uint32_t offset) { uint8_t value = 0xff; offset &= 0x1ff; // $2200 + offset gives the reg value to compare with docs @@ -383,8 +383,8 @@ uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset) case 0x10c: // Var-Length Read Port Low { - uint32_t data = (var_length_read(space, m_vda + 0) << 0) | (var_length_read(space, m_vda + 1) << 8) - | (var_length_read(space, m_vda + 2) << 16); + uint32_t data = (var_length_read(m_vda + 0) << 0) | (var_length_read(m_vda + 1) << 8) + | (var_length_read(m_vda + 2) << 16); data >>= m_vbit; value = (data >> 0) & 0xff; } @@ -392,8 +392,8 @@ uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset) case 0x10d: // Var-Length Read Port High { - uint32_t data = (var_length_read(space, m_vda + 0) << 0) | (var_length_read(space, m_vda + 1) << 8) - | (var_length_read(space, m_vda + 2) << 16); + uint32_t data = (var_length_read(m_vda + 0) << 0) | (var_length_read(m_vda + 1) << 8) + | (var_length_read(m_vda + 2) << 16); data >>= m_vbit; if (m_drm == 1) @@ -417,7 +417,7 @@ uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset) return value; } -void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t data) +void sns_sa1_device::write_regs(uint32_t offset, uint8_t data) { offset &= 0x1ff; // $2200 + offset gives the reg value to compare with docs @@ -669,14 +669,14 @@ void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t d { if (!(m_dma_ctrl & 0x20) && !(m_dma_ctrl & 0x04)) // Normal DMA to IRAM { - dma_transfer(space); + dma_transfer(); // printf("SA-1: normal DMA to IRAM\n"); } if (m_dma_ctrl & 0x20 && m_dma_ctrl & 0x10) // CC DMA Type 1 { // printf("SA-1: CC DMA type 1\n"); - dma_cctype1_transfer(space); + dma_cctype1_transfer(); } } break; @@ -688,7 +688,7 @@ void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t d if (!(m_dma_ctrl & 0x20) && m_dma_ctrl & 0x04) // Normal DMA to BWRAM { // printf("SA-1: normal DMA to BWRAM\n"); - dma_transfer(space); + dma_transfer(); } } break; @@ -729,7 +729,7 @@ void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t d if (m_dma_ctrl & 0x20 && !(m_dma_ctrl & 0x10)) // CC DMA Type 2 { // printf("SA-1: CC DMA type 2\n"); - dma_cctype2_transfer(space); + dma_cctype2_transfer(); } } break; @@ -901,7 +901,7 @@ void sns_sa1_device::write_bwram(uint32_t offset, uint8_t data) -------------------------------------------------*/ -READ8_MEMBER(sns_sa1_device::read_l) +uint8_t sns_sa1_device::read_l(offs_t offset) { int bank; @@ -936,7 +936,7 @@ READ8_MEMBER(sns_sa1_device::read_l) return 0; // this should not happen (the driver should only call read_l in the above case) } -READ8_MEMBER(sns_sa1_device::read_h) +uint8_t sns_sa1_device::read_h(offs_t offset) { int bank; @@ -972,20 +972,20 @@ READ8_MEMBER(sns_sa1_device::read_h) return m_rom[rom_bank_map[(m_bank_f_rom * 0x20) + ((offset - 0x700000) / 0x8000)] * 0x8000 + (offset & 0x7fff)]; } -WRITE8_MEMBER(sns_sa1_device::write_l) +void sns_sa1_device::write_l(offs_t offset, uint8_t data) { } -WRITE8_MEMBER(sns_sa1_device::write_h) +void sns_sa1_device::write_h(offs_t offset, uint8_t data) { } -READ8_MEMBER( sns_sa1_device::chip_read ) +uint8_t sns_sa1_device::chip_read(offs_t offset) { uint16_t address = offset & 0xffff; if (offset < 0x400000 && address >= 0x2200 && address < 0x2400) - return read_regs(space, address & 0x1ff); // SA-1 Regs + return read_regs(address & 0x1ff); // SA-1 Regs if (offset < 0x400000 && address >= 0x3000 && address < 0x3800) return read_iram(address & 0x7ff); // Internal SA-1 RAM (2K) @@ -1000,12 +1000,12 @@ READ8_MEMBER( sns_sa1_device::chip_read ) } -WRITE8_MEMBER( sns_sa1_device::chip_write ) +void sns_sa1_device::chip_write(offs_t offset, uint8_t data) { uint16_t address = offset & 0xffff; if (offset < 0x400000 && address >= 0x2200 && address < 0x2400) - write_regs(space, address & 0x1ff, data); // SA-1 Regs + write_regs(address & 0x1ff, data); // SA-1 Regs if (offset < 0x400000 && address >= 0x3000 && address < 0x3800) write_iram(address & 0x7ff, data); // Internal SA-1 RAM (2K) @@ -1026,7 +1026,7 @@ WRITE8_MEMBER( sns_sa1_device::chip_write ) // I/O regs or WRAM, and there are a few additional accesses to IRAM (in [00-3f][0000-07ff]) // and to BWRAM (in [60-6f][0000-ffff], so-called bitmap mode) -READ8_MEMBER( sns_sa1_device::sa1_hi_r ) +uint8_t sns_sa1_device::sa1_hi_r(offs_t offset) { uint16_t address = offset & 0xffff; @@ -1037,22 +1037,22 @@ READ8_MEMBER( sns_sa1_device::sa1_hi_r ) if (address < 0x0800) return read_iram(offset); // Internal SA-1 RAM (2K) else if (address >= 0x2200 && address < 0x2400) - return read_regs(space, offset & 0x1ff); // SA-1 Regs + return read_regs(offset & 0x1ff); // SA-1 Regs else if (address >= 0x3000 && address < 0x3800) return read_iram(offset); // Internal SA-1 RAM (2K) } else if (address < 0x8000) return read_bwram((m_bwram_sa1 * 0x2000) + (offset & 0x1fff) + (m_bwram_sa1_source * 0x100000)); // SA-1 BWRAM else - return read_h(space, offset); // ROM + return read_h(offset); // ROM return 0xff; // maybe open bus? same as the main system one or diff? (currently not accessible from carts anyway...) } else - return read_h(space, offset); // ROM + return read_h(offset); // ROM } -READ8_MEMBER( sns_sa1_device::sa1_lo_r ) +uint8_t sns_sa1_device::sa1_lo_r(offs_t offset) { uint16_t address = offset & 0xffff; @@ -1063,7 +1063,7 @@ READ8_MEMBER( sns_sa1_device::sa1_lo_r ) if (address < 0x0800) return read_iram(offset); // Internal SA-1 RAM (2K) else if (address >= 0x2200 && address < 0x2400) - return read_regs(space, offset & 0x1ff); // SA-1 Regs + return read_regs(offset & 0x1ff); // SA-1 Regs else if (address >= 0x3000 && address < 0x3800) return read_iram(offset); // Internal SA-1 RAM (2K) } @@ -1094,7 +1094,7 @@ READ8_MEMBER( sns_sa1_device::sa1_lo_r ) return m_sa1_reset>>8; } else - return read_l(space, offset); // ROM + return read_l(offset); // ROM return 0xff; // maybe open bus? same as the main system one or diff? (currently not accessible from carts anyway...) } @@ -1106,7 +1106,7 @@ READ8_MEMBER( sns_sa1_device::sa1_lo_r ) return 0xff; // nothing should be mapped here, so maybe open bus? } -WRITE8_MEMBER( sns_sa1_device::sa1_hi_w ) +void sns_sa1_device::sa1_hi_w(offs_t offset, uint8_t data) { uint16_t address = offset & 0xffff; if (offset < 0x400000) @@ -1116,7 +1116,7 @@ WRITE8_MEMBER( sns_sa1_device::sa1_hi_w ) if (address < 0x0800) write_iram(offset, data); // Internal SA-1 RAM (2K) else if (address >= 0x2200 && address < 0x2400) - write_regs(space, offset & 0x1ff, data); // SA-1 Regs + write_regs(offset & 0x1ff, data); // SA-1 Regs else if (address >= 0x3000 && address < 0x3800) write_iram(offset, data); // Internal SA-1 RAM (2K) } @@ -1125,14 +1125,14 @@ WRITE8_MEMBER( sns_sa1_device::sa1_hi_w ) } } -WRITE8_MEMBER( sns_sa1_device::sa1_lo_w ) +void sns_sa1_device::sa1_lo_w(offs_t offset, uint8_t data) { if (offset >= 0x400000 && offset < 0x500000) write_bwram(offset & 0xfffff, data); // SA-1 BWRAM (not mirrored above!) else if (offset >= 0x600000 && offset < 0x700000) write_bwram((offset & 0xfffff) + 0x100000, data); // SA-1 BWRAM Bitmap mode else - sa1_hi_w(space, offset, data); + sa1_hi_w(offset, data); } void sns_sa1_device::sa1_map(address_map &map) diff --git a/src/devices/bus/snes/sa1.h b/src/devices/bus/snes/sa1.h index 6ea8ae9b15a..e4fb646385a 100644 --- a/src/devices/bus/snes/sa1.h +++ b/src/devices/bus/snes/sa1.h @@ -26,25 +26,25 @@ protected: virtual void device_add_mconfig(machine_config &config) override; // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_WRITE8_MEMBER(write_l) override; - virtual DECLARE_WRITE8_MEMBER(write_h) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual void write_l(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, uint8_t data) override; // additional reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; private: - uint8_t var_length_read(address_space &space, uint32_t offset); - void dma_transfer(address_space &space); - void dma_cctype1_transfer(address_space &space); - void dma_cctype2_transfer(address_space &space); + uint8_t var_length_read(uint32_t offset); + void dma_transfer(); + void dma_cctype1_transfer(); + void dma_cctype2_transfer(); - uint8_t read_regs(address_space &space, uint32_t offset); + uint8_t read_regs(uint32_t offset); uint8_t read_iram(uint32_t offset); uint8_t read_bwram(uint32_t offset); - void write_regs(address_space &space, uint32_t offset, uint8_t data); + void write_regs(uint32_t offset, uint8_t data); void write_iram(uint32_t offset, uint8_t data); void write_bwram(uint32_t offset, uint8_t data); void recalc_irqs(); @@ -103,10 +103,10 @@ private: // $2302-$2305 uint16_t m_hcr, m_vcr; - DECLARE_READ8_MEMBER(sa1_lo_r); - DECLARE_READ8_MEMBER(sa1_hi_r); - DECLARE_WRITE8_MEMBER(sa1_lo_w); - DECLARE_WRITE8_MEMBER(sa1_hi_w); + uint8_t sa1_lo_r(offs_t offset); + uint8_t sa1_hi_r(offs_t offset); + void sa1_lo_w(offs_t offset, uint8_t data); + void sa1_hi_w(offs_t offset, uint8_t data); void sa1_map(address_map &map); }; diff --git a/src/devices/bus/snes/sdd1.cpp b/src/devices/bus/snes/sdd1.cpp index 6d13fcd97a8..94374d07681 100644 --- a/src/devices/bus/snes/sdd1.cpp +++ b/src/devices/bus/snes/sdd1.cpp @@ -470,7 +470,7 @@ void sns_rom_sdd1_device::device_reset() mapper specific handlers -------------------------------------------------*/ -READ8_MEMBER( sns_rom_sdd1_device::chip_read ) +uint8_t sns_rom_sdd1_device::chip_read(offs_t offset) { uint16_t addr = offset & 0xffff; @@ -491,7 +491,7 @@ READ8_MEMBER( sns_rom_sdd1_device::chip_read ) } -WRITE8_MEMBER( sns_rom_sdd1_device::chip_write ) +void sns_rom_sdd1_device::chip_write(offs_t offset, uint8_t data) { uint16_t addr = offset & 0xffff; @@ -589,7 +589,7 @@ uint8_t sns_rom_sdd1_device::read_helper(uint32_t addr) return m_rom[m_mmc[(addr >> 20) & 3] + (addr & 0x0fffff)]; } -READ8_MEMBER(sns_rom_sdd1_device::read_l) +uint8_t sns_rom_sdd1_device::read_l(offs_t offset) { if (offset < 0x400000) return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)]; @@ -597,21 +597,21 @@ READ8_MEMBER(sns_rom_sdd1_device::read_l) return m_rom[rom_bank_map[(offset - 0x400000) / 0x8000] * 0x8000 + (offset & 0x7fff)]; } -READ8_MEMBER(sns_rom_sdd1_device::read_h) +uint8_t sns_rom_sdd1_device::read_h(offs_t offset) { if (offset >= 0x400000) return read_helper(offset - 0x400000); else - return read_l(space, offset); + return read_l(offset); } -READ8_MEMBER( sns_rom_sdd1_device::read_ram ) +uint8_t sns_rom_sdd1_device::read_ram(offs_t offset) { return m_nvram[offset & 0x1fff]; } -WRITE8_MEMBER( sns_rom_sdd1_device::write_ram ) +void sns_rom_sdd1_device::write_ram(offs_t offset, uint8_t data) { m_nvram[offset & 0x1fff] = data; } diff --git a/src/devices/bus/snes/sdd1.h b/src/devices/bus/snes/sdd1.h index 6265e630bdc..5164a169f65 100644 --- a/src/devices/bus/snes/sdd1.h +++ b/src/devices/bus/snes/sdd1.h @@ -19,12 +19,12 @@ public: sns_rom_sdd1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: sns_rom_sdd1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/snes/sfx.cpp b/src/devices/bus/snes/sfx.cpp index cf9942ada4d..59908b9b06e 100644 --- a/src/devices/bus/snes/sfx.cpp +++ b/src/devices/bus/snes/sfx.cpp @@ -40,30 +40,30 @@ void sns_rom_superfx_device::device_reset() // LoROM + SuperFX (GSU-1,2) // TODO: mask sfx_ram based on the actual RAM... -READ8_MEMBER( sns_rom_superfx_device::superfx_r_bank1 ) +uint8_t sns_rom_superfx_device::superfx_r_bank1(offs_t offset) { return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)]; } -READ8_MEMBER( sns_rom_superfx_device::superfx_r_bank2 ) +uint8_t sns_rom_superfx_device::superfx_r_bank2(offs_t offset) { return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)]; } -READ8_MEMBER( sns_rom_superfx_device::superfx_r_bank3 ) +uint8_t sns_rom_superfx_device::superfx_r_bank3(offs_t offset) { return sfx_ram[offset & 0xfffff]; } -WRITE8_MEMBER( sns_rom_superfx_device::superfx_w_bank1 ) +void sns_rom_superfx_device::superfx_w_bank1(offs_t offset, uint8_t data) { } -WRITE8_MEMBER( sns_rom_superfx_device::superfx_w_bank2 ) +void sns_rom_superfx_device::superfx_w_bank2(offs_t offset, uint8_t data) { } -WRITE8_MEMBER( sns_rom_superfx_device::superfx_w_bank3 ) +void sns_rom_superfx_device::superfx_w_bank3(offs_t offset, uint8_t data) { sfx_ram[offset & 0xfffff] = data; } @@ -92,23 +92,23 @@ void sns_rom_superfx_device::device_add_mconfig(machine_config &config) m_superfx->irq().set(FUNC(sns_rom_superfx_device::snes_extern_irq_w)); /* IRQ line from cart */ } -READ8_MEMBER( sns_rom_superfx_device::chip_read ) +uint8_t sns_rom_superfx_device::chip_read(offs_t offset) { return m_superfx->mmio_read(offset); } -WRITE8_MEMBER( sns_rom_superfx_device::chip_write ) +void sns_rom_superfx_device::chip_write(offs_t offset, uint8_t data) { m_superfx->mmio_write(offset, data); } -READ8_MEMBER( sns_rom_superfx_device::read_l ) +uint8_t sns_rom_superfx_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_superfx_device::read_h) +uint8_t sns_rom_superfx_device::read_h(offs_t offset) { if (offset < 0x400000) return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)]; @@ -130,14 +130,14 @@ READ8_MEMBER(sns_rom_superfx_device::read_h) return 0xff; // this handler should never be called for [60-7f]/[e0-ff] ranges } -READ8_MEMBER( sns_rom_superfx_device::read_ram ) +uint8_t sns_rom_superfx_device::read_ram(offs_t offset) { if (m_superfx->access_ram()) return sfx_ram[offset & 0xfffff]; return 0xff; // should be open bus... } -WRITE8_MEMBER( sns_rom_superfx_device::write_ram ) +void sns_rom_superfx_device::write_ram(offs_t offset, uint8_t data) { if (m_superfx->access_ram()) sfx_ram[offset & 0xfffff] = data; diff --git a/src/devices/bus/snes/sfx.h b/src/devices/bus/snes/sfx.h index 253084be139..7c92e411749 100644 --- a/src/devices/bus/snes/sfx.h +++ b/src/devices/bus/snes/sfx.h @@ -26,19 +26,19 @@ protected: virtual DECLARE_WRITE_LINE_MEMBER(snes_extern_irq_w); // additional reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; - - virtual DECLARE_READ8_MEMBER(superfx_r_bank1); - virtual DECLARE_READ8_MEMBER(superfx_r_bank2); - virtual DECLARE_READ8_MEMBER(superfx_r_bank3); - virtual DECLARE_WRITE8_MEMBER(superfx_w_bank1); - virtual DECLARE_WRITE8_MEMBER(superfx_w_bank2); - virtual DECLARE_WRITE8_MEMBER(superfx_w_bank3); + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; + + uint8_t superfx_r_bank1(offs_t offset); + uint8_t superfx_r_bank2(offs_t offset); + uint8_t superfx_r_bank3(offs_t offset); + void superfx_w_bank1(offs_t offset, uint8_t data); + void superfx_w_bank2(offs_t offset, uint8_t data); + void superfx_w_bank3(offs_t offset, uint8_t data); private: required_device m_superfx; diff --git a/src/devices/bus/snes/sgb.cpp b/src/devices/bus/snes/sgb.cpp index 1a50f504f01..6c790a1c773 100644 --- a/src/devices/bus/snes/sgb.cpp +++ b/src/devices/bus/snes/sgb.cpp @@ -74,55 +74,55 @@ void sns_rom_sgb_device::device_reset() // ADDRESS_MAP( supergb_map ) //------------------------------------------------- -READ8_MEMBER(sns_rom_sgb_device::gb_cart_r) +uint8_t sns_rom_sgb_device::gb_cart_r(offs_t offset) { if (offset < 0x100 && !m_bios_disabled) { return m_region_bios->base()[offset]; } - return m_cartslot->read_rom(space, offset); + return m_cartslot->read_rom(offset); } -WRITE8_MEMBER(sns_rom_sgb_device::gb_bank_w) +void sns_rom_sgb_device::gb_bank_w(offs_t offset, uint8_t data) { - m_cartslot->write_bank(space, offset, data); + m_cartslot->write_bank(offset, data); } -READ8_MEMBER(sns_rom_sgb_device::gb_ram_r) +uint8_t sns_rom_sgb_device::gb_ram_r(offs_t offset) { - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); } -WRITE8_MEMBER(sns_rom_sgb_device::gb_ram_w) +void sns_rom_sgb_device::gb_ram_w(offs_t offset, uint8_t data) { - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); } -READ8_MEMBER(sns_rom_sgb_device::gb_echo_r) +uint8_t sns_rom_sgb_device::gb_echo_r(offs_t offset) { - return space.read_byte(0xc000 + offset); + return m_sgb_cpu->space(AS_PROGRAM).read_byte(0xc000 + offset); } -WRITE8_MEMBER(sns_rom_sgb_device::gb_echo_w) +void sns_rom_sgb_device::gb_echo_w(offs_t offset, uint8_t data) { - return space.write_byte(0xc000 + offset, data); + return m_sgb_cpu->space(AS_PROGRAM).write_byte(0xc000 + offset, data); } -READ8_MEMBER(sns_rom_sgb_device::gb_io_r) +uint8_t sns_rom_sgb_device::gb_io_r(offs_t offset) { return 0; } -WRITE8_MEMBER(sns_rom_sgb_device::gb_io_w) +void sns_rom_sgb_device::gb_io_w(offs_t offset, uint8_t data) { } -READ8_MEMBER(sns_rom_sgb_device::gb_ie_r) +uint8_t sns_rom_sgb_device::gb_ie_r(offs_t offset) { return m_sgb_cpu->get_ie(); } -WRITE8_MEMBER(sns_rom_sgb_device::gb_ie_w) +void sns_rom_sgb_device::gb_ie_w(offs_t offset, uint8_t data) { m_sgb_cpu->set_ie(data); } @@ -149,7 +149,7 @@ void sns_rom_sgb_device::supergb_map(address_map &map) -WRITE8_MEMBER( sns_rom_sgb_device::gb_timer_callback ) +void sns_rom_sgb_device::gb_timer_callback(uint8_t data) { } @@ -220,18 +220,18 @@ const tiny_rom_entry *sns_rom_sgb2_device::device_rom_region() const -------------------------------------------------*/ -READ8_MEMBER(sns_rom_sgb_device::read_l) +uint8_t sns_rom_sgb_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_sgb_device::read_h) +uint8_t sns_rom_sgb_device::read_h(offs_t offset) { int bank = offset / 0x10000; return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; } -READ8_MEMBER( sns_rom_sgb_device::chip_read ) +uint8_t sns_rom_sgb_device::chip_read(offs_t offset) { uint16_t address = offset & 0xffff; @@ -299,7 +299,7 @@ void sns_rom_sgb_device::lcd_render(uint32_t *source) } } -WRITE8_MEMBER( sns_rom_sgb_device::chip_write ) +void sns_rom_sgb_device::chip_write(offs_t offset, uint8_t data) { uint16_t address = offset & 0xffff; diff --git a/src/devices/bus/snes/sgb.h b/src/devices/bus/snes/sgb.h index c49ebaa44e3..db6782ddb98 100644 --- a/src/devices/bus/snes/sgb.h +++ b/src/devices/bus/snes/sgb.h @@ -21,8 +21,7 @@ class sns_rom_sgb_device : public sns_rom_device { public: - - virtual DECLARE_WRITE8_MEMBER(gb_timer_callback); + void gb_timer_callback(uint8_t data); protected: // construction/destruction @@ -33,21 +32,21 @@ protected: virtual void device_reset() override; // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; - - virtual DECLARE_READ8_MEMBER(gb_cart_r); - virtual DECLARE_WRITE8_MEMBER(gb_bank_w); - virtual DECLARE_READ8_MEMBER(gb_ram_r); - virtual DECLARE_WRITE8_MEMBER(gb_ram_w); - virtual DECLARE_READ8_MEMBER(gb_echo_r); - virtual DECLARE_WRITE8_MEMBER(gb_echo_w); - virtual DECLARE_READ8_MEMBER(gb_io_r); - virtual DECLARE_WRITE8_MEMBER(gb_io_w); - virtual DECLARE_READ8_MEMBER(gb_ie_r); - virtual DECLARE_WRITE8_MEMBER(gb_ie_w); + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; + + uint8_t gb_cart_r(offs_t offset); + void gb_bank_w(offs_t offset, uint8_t data); + uint8_t gb_ram_r(offs_t offset); + void gb_ram_w(offs_t offset, uint8_t data); + uint8_t gb_echo_r(offs_t offset); + void gb_echo_w(offs_t offset, uint8_t data); + uint8_t gb_io_r(offs_t offset); + void gb_io_w(offs_t offset, uint8_t data); + uint8_t gb_ie_r(offs_t offset); + void gb_ie_w(offs_t offset, uint8_t data); void supergb_map(address_map &map); diff --git a/src/devices/bus/snes/snes_slot.cpp b/src/devices/bus/snes/snes_slot.cpp index 4276378bf00..7af674e9f6d 100644 --- a/src/devices/bus/snes/snes_slot.cpp +++ b/src/devices/bus/snes/snes_slot.cpp @@ -177,6 +177,18 @@ WRITE_LINE_MEMBER(device_sns_cart_interface::write_irq) m_slot->write_irq(state); } +//------------------------------------------------- +// read_open_bus - read from the open bus +//------------------------------------------------- + +uint8_t device_sns_cart_interface::read_open_bus() +{ + if (m_slot != nullptr) + return m_slot->read_open_bus(); + + return 0xff; +} + //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -191,7 +203,8 @@ base_sns_cart_slot_device::base_sns_cart_slot_device(const machine_config &mconf m_addon(ADDON_NONE), m_type(SNES_MODE20), m_cart(nullptr), - m_irq_callback(*this) + m_irq_callback(*this), + m_open_bus_callback(*this) { } @@ -229,6 +242,7 @@ void base_sns_cart_slot_device::device_start() m_cart->m_slot = this; m_irq_callback.resolve_safe(); + m_open_bus_callback.resolve_safe(0xff); } @@ -1061,34 +1075,34 @@ std::string base_sns_cart_slot_device::get_default_card_software(get_default_car read -------------------------------------------------*/ -READ8_MEMBER(base_sns_cart_slot_device::read_l) +uint8_t base_sns_cart_slot_device::read_l(offs_t offset) { if (m_cart) - return m_cart->read_l(space, offset); + return m_cart->read_l(offset); else return 0xff; } -READ8_MEMBER(base_sns_cart_slot_device::read_h) +uint8_t base_sns_cart_slot_device::read_h(offs_t offset) { if (m_cart) - return m_cart->read_h(space, offset); + return m_cart->read_h(offset); else return 0xff; } -READ8_MEMBER(base_sns_cart_slot_device::read_ram) +uint8_t base_sns_cart_slot_device::read_ram(offs_t offset) { if (m_cart) - return m_cart->read_ram(space, offset); + return m_cart->read_ram(offset); else return 0xff; } -READ8_MEMBER(base_sns_cart_slot_device::chip_read) +uint8_t base_sns_cart_slot_device::chip_read(offs_t offset) { if (m_cart) - return m_cart->chip_read(space, offset); + return m_cart->chip_read(offset); else return 0xff; } @@ -1097,28 +1111,28 @@ READ8_MEMBER(base_sns_cart_slot_device::chip_read) write -------------------------------------------------*/ -WRITE8_MEMBER(base_sns_cart_slot_device::write_l) +void base_sns_cart_slot_device::write_l(offs_t offset, uint8_t data) { if (m_cart) - m_cart->write_l(space, offset, data); + m_cart->write_l(offset, data); } -WRITE8_MEMBER(base_sns_cart_slot_device::write_h) +void base_sns_cart_slot_device::write_h(offs_t offset, uint8_t data) { if (m_cart) - m_cart->write_h(space, offset, data); + m_cart->write_h(offset, data); } -WRITE8_MEMBER(base_sns_cart_slot_device::write_ram) +void base_sns_cart_slot_device::write_ram(offs_t offset, uint8_t data) { if (m_cart) - m_cart->write_ram(space, offset, data); + m_cart->write_ram(offset, data); } -WRITE8_MEMBER(base_sns_cart_slot_device::chip_write) +void base_sns_cart_slot_device::chip_write(offs_t offset, uint8_t data) { if (m_cart) - m_cart->chip_write(space, offset, data); + m_cart->chip_write(offset, data); } diff --git a/src/devices/bus/snes/snes_slot.h b/src/devices/bus/snes/snes_slot.h index 91f61e88f4d..9d63a1ba9c2 100644 --- a/src/devices/bus/snes/snes_slot.h +++ b/src/devices/bus/snes/snes_slot.h @@ -111,14 +111,14 @@ public: virtual ~device_sns_cart_interface(); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) { return 0xff; } // ROM access in range [00-7f] - virtual DECLARE_READ8_MEMBER(read_h) { return 0xff; } // ROM access in range [80-ff] - virtual DECLARE_READ8_MEMBER(read_ram) { if (!m_nvram.empty()) return m_nvram[offset & (m_nvram.size()-1)]; else return 0xff; } // NVRAM access - virtual DECLARE_WRITE8_MEMBER(write_l) { } // used by carts with subslots - virtual DECLARE_WRITE8_MEMBER(write_h) { } // used by carts with subslots - virtual DECLARE_WRITE8_MEMBER(write_ram) { if (!m_nvram.empty()) m_nvram[offset & (m_nvram.size()-1)] = data; } // NVRAM access - virtual DECLARE_READ8_MEMBER(chip_read) { return 0xff; } - virtual DECLARE_WRITE8_MEMBER(chip_write) { } + virtual uint8_t read_l(offs_t offset) { return 0xff; } // ROM access in range [00-7f] + virtual uint8_t read_h(offs_t offset) { return 0xff; } // ROM access in range [80-ff] + virtual uint8_t read_ram(offs_t offset) { if (!m_nvram.empty()) return m_nvram[offset & (m_nvram.size()-1)]; else return 0xff; } // NVRAM access + virtual void write_l(offs_t offset, uint8_t data) { } // used by carts with subslots + virtual void write_h(offs_t offset, uint8_t data) { } // used by carts with subslots + virtual void write_ram(offs_t offset, uint8_t data) { if (!m_nvram.empty()) m_nvram[offset & (m_nvram.size()-1)] = data; } // NVRAM access + virtual uint8_t chip_read(offs_t offset) { return 0xff; } + virtual void chip_write(offs_t offset, uint8_t data) { } virtual void speedup_addon_bios_access() {} void rom_alloc(uint32_t size, const char *tag); @@ -142,6 +142,7 @@ protected: device_sns_cart_interface(const machine_config &mconfig, device_t &device); DECLARE_WRITE_LINE_MEMBER(write_irq); + uint8_t read_open_bus(); // internal state uint8_t *m_rom; @@ -168,6 +169,7 @@ public: // configuration auto irq_callback() { return m_irq_callback.bind(); } + auto open_bus_callback() { return m_open_bus_callback.bind(); } // device-level overrides virtual void device_start() override; @@ -198,16 +200,17 @@ public: virtual std::string get_default_card_software(get_default_card_software_hook &hook) const override; // reading and writing - DECLARE_READ8_MEMBER(read_l); - DECLARE_READ8_MEMBER(read_h); - DECLARE_READ8_MEMBER(read_ram); - DECLARE_WRITE8_MEMBER(write_l); - DECLARE_WRITE8_MEMBER(write_h); - DECLARE_WRITE8_MEMBER(write_ram); - DECLARE_READ8_MEMBER(chip_read); - DECLARE_WRITE8_MEMBER(chip_write); + uint8_t read_l(offs_t offset); + uint8_t read_h(offs_t offset); + uint8_t read_ram(offs_t offset); + void write_l(offs_t offset, uint8_t data); + void write_h(offs_t offset, uint8_t data); + void write_ram(offs_t offset, uint8_t data); + uint8_t chip_read(offs_t offset); + void chip_write(offs_t offset, uint8_t data); DECLARE_WRITE_LINE_MEMBER(write_irq) { m_irq_callback(state); } + uint8_t read_open_bus() { return m_open_bus_callback(); } // in order to support legacy dumps + add-on CPU dump appended at the end of the file, we // check if the required data is present and update bank map accordingly @@ -230,6 +233,7 @@ protected: private: devcb_write_line m_irq_callback; + devcb_read8 m_open_bus_callback; }; // ======================> sns_cart_slot_device diff --git a/src/devices/bus/snes/spc7110.cpp b/src/devices/bus/snes/spc7110.cpp index a88c06e9250..20d59dc681a 100644 --- a/src/devices/bus/snes/spc7110.cpp +++ b/src/devices/bus/snes/spc7110.cpp @@ -1076,7 +1076,7 @@ void sns_rom_spc7110_device::spc7110_update_time(uint8_t offset) } } -READ8_MEMBER(sns_rom_spc7110_device::chip_read) +uint8_t sns_rom_spc7110_device::chip_read(offs_t offset) { uint8_t *ROM = get_rom_base(); uint32_t len = get_rom_size(); @@ -1262,7 +1262,7 @@ READ8_MEMBER(sns_rom_spc7110_device::chip_read) return 0xff; } -WRITE8_MEMBER(sns_rom_spc7110_device::chip_write) +void sns_rom_spc7110_device::chip_write(offs_t offset, uint8_t data) { uint8_t *ROM = get_rom_base(); uint32_t len = get_rom_size(); @@ -1648,7 +1648,7 @@ WRITE8_MEMBER(sns_rom_spc7110_device::chip_write) } } -READ8_MEMBER(sns_rom_spc7110_device::read_l) +uint8_t sns_rom_spc7110_device::read_l(offs_t offset) { if (offset < 0x400000) return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)]; @@ -1656,7 +1656,7 @@ READ8_MEMBER(sns_rom_spc7110_device::read_l) return 0xff; } -READ8_MEMBER(sns_rom_spc7110_device::read_h) +uint8_t sns_rom_spc7110_device::read_h(offs_t offset) { uint16_t address = offset & 0xfffff; @@ -1683,12 +1683,12 @@ READ8_MEMBER(sns_rom_spc7110_device::read_h) } -READ8_MEMBER( sns_rom_spc7110_device::read_ram ) +uint8_t sns_rom_spc7110_device::read_ram(offs_t offset) { return m_nvram[offset & 0x1fff]; } -WRITE8_MEMBER( sns_rom_spc7110_device::write_ram ) +void sns_rom_spc7110_device::write_ram(offs_t offset, uint8_t data) { m_nvram[offset & 0x1fff] = data; } diff --git a/src/devices/bus/snes/spc7110.h b/src/devices/bus/snes/spc7110.h index 249944c8ae7..a7c798244c1 100644 --- a/src/devices/bus/snes/spc7110.h +++ b/src/devices/bus/snes/spc7110.h @@ -18,13 +18,13 @@ public: sns_rom_spc7110_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_READ8_MEMBER(read_ram) override; - virtual DECLARE_WRITE8_MEMBER(write_ram) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; protected: sns_rom_spc7110_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -199,11 +199,11 @@ public: // reading and writing // we just use the spc7110 ones for the moment, pending the split of regs 0x4840-0x4842 (RTC) from the base add-on -// virtual DECLARE_READ8_MEMBER(read_l); -// virtual DECLARE_READ8_MEMBER(read_h); +// virtual uint8_t read_l(offs_t offset); +// virtual uint8_t read_h(offs_t offset); -// virtual DECLARE_READ8_MEMBER(chip_read); -// virtual DECLARE_WRITE8_MEMBER(chip_write); +// virtual uint8_t chip_read(offs_t offset); +// virtual void chip_write(offs_t offset, uint8_t data); protected: // device-level overrides diff --git a/src/devices/bus/snes/sufami.cpp b/src/devices/bus/snes/sufami.cpp index 3e163e150e5..7589fb84fa4 100644 --- a/src/devices/bus/snes/sufami.cpp +++ b/src/devices/bus/snes/sufami.cpp @@ -66,12 +66,12 @@ void sns_rom_sufami_device::device_add_mconfig(machine_config &config) mapper specific handlers -------------------------------------------------*/ -READ8_MEMBER(sns_rom_sufami_device::read_l) +uint8_t sns_rom_sufami_device::read_l(offs_t offset) { - return read_h(space, offset); + return read_h(offset); } -READ8_MEMBER(sns_rom_sufami_device::read_h) +uint8_t sns_rom_sufami_device::read_h(offs_t offset) { int bank; @@ -82,11 +82,11 @@ READ8_MEMBER(sns_rom_sufami_device::read_h) } if (offset >= 0x200000 && offset < 0x400000) // SLOT1 STROM { - return m_slot1->read_l(space, offset - 0x200000); + return m_slot1->read_l(offset - 0x200000); } if (offset >= 0x400000 && offset < 0x600000) // SLOT2 STROM { - return m_slot2->read_l(space, offset - 0x400000); + return m_slot2->read_l(offset - 0x400000); } if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM { @@ -94,7 +94,7 @@ READ8_MEMBER(sns_rom_sufami_device::read_h) { offset -= 0x600000; bank = offset / 0x10000; - return m_slot1->read_ram(space, bank * 0x8000 + (offset & 0x7fff)); + return m_slot1->read_ram(bank * 0x8000 + (offset & 0x7fff)); } } if (offset >= 0x700000 && offset < 0x740000) // SLOT2 RAM @@ -103,19 +103,19 @@ READ8_MEMBER(sns_rom_sufami_device::read_h) { offset -= 0x700000; bank = offset / 0x10000; - return m_slot2->read_ram(space, bank * 0x8000 + (offset & 0x7fff)); + return m_slot2->read_ram(bank * 0x8000 + (offset & 0x7fff)); } } return 0xff; } -WRITE8_MEMBER(sns_rom_sufami_device::write_l) +void sns_rom_sufami_device::write_l(offs_t offset, uint8_t data) { - write_h(space, offset, data); + write_h(offset, data); } -WRITE8_MEMBER(sns_rom_sufami_device::write_h) +void sns_rom_sufami_device::write_h(offs_t offset, uint8_t data) { int bank; if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM @@ -124,7 +124,7 @@ WRITE8_MEMBER(sns_rom_sufami_device::write_h) { offset -= 0x600000; bank = offset / 0x10000; - m_slot1->write_ram(space, bank * 0x8000 + (offset & 0x7fff), data); + m_slot1->write_ram(bank * 0x8000 + (offset & 0x7fff), data); } } @@ -134,7 +134,7 @@ WRITE8_MEMBER(sns_rom_sufami_device::write_h) { offset -= 0x700000; bank = offset / 0x10000; - m_slot2->write_ram(space, bank * 0x8000 + (offset & 0x7fff), data); + m_slot2->write_ram(bank * 0x8000 + (offset & 0x7fff), data); } } @@ -144,7 +144,7 @@ WRITE8_MEMBER(sns_rom_sufami_device::write_h) Sufami Turbo 'minicart' emulation -------------------------------------------------*/ -READ8_MEMBER(sns_rom_strom_device::read_l) +uint8_t sns_rom_strom_device::read_l(offs_t offset) { if (offset < 0x200000) { diff --git a/src/devices/bus/snes/sufami.h b/src/devices/bus/snes/sufami.h index 6b4b3df3bea..1b231131a2b 100644 --- a/src/devices/bus/snes/sufami.h +++ b/src/devices/bus/snes/sufami.h @@ -18,10 +18,10 @@ public: sns_rom_sufami_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // additional reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; - virtual DECLARE_READ8_MEMBER(read_h) override; - virtual DECLARE_WRITE8_MEMBER(write_l) override; - virtual DECLARE_WRITE8_MEMBER(write_h) override; + virtual uint8_t read_l(offs_t offset) override; + virtual uint8_t read_h(offs_t offset) override; + virtual void write_l(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, uint8_t data) override; protected: // device-level overrides @@ -43,7 +43,7 @@ public: sns_rom_strom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // additional reading and writing - virtual DECLARE_READ8_MEMBER(read_l) override; + virtual uint8_t read_l(offs_t offset) override; protected: // device-level overrides diff --git a/src/devices/bus/snes/upd.cpp b/src/devices/bus/snes/upd.cpp index d9d81837c30..70396938e89 100644 --- a/src/devices/bus/snes/upd.cpp +++ b/src/devices/bus/snes/upd.cpp @@ -97,12 +97,12 @@ void sns_rom_setadsp_device::device_start() // Lo-ROM // DSP dump contains prg at offset 0 and data at offset 0x2000 -READ32_MEMBER( sns_rom20_necdsp_device::necdsp_prg_r ) +uint32_t sns_rom20_necdsp_device::necdsp_prg_r(offs_t offset) { return get_prg(&m_bios[0], offset); } -READ16_MEMBER( sns_rom20_necdsp_device::necdsp_data_r ) +uint16_t sns_rom20_necdsp_device::necdsp_data_r(offs_t offset) { return get_data(&m_bios[0], offset + 0x2000/2); } @@ -139,14 +139,14 @@ void sns_rom20_necdsp_device::device_add_mconfig(machine_config &config) m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp_device::dsp_data_map_lorom); } -READ8_MEMBER( sns_rom20_necdsp_device::chip_read ) +uint8_t sns_rom20_necdsp_device::chip_read(offs_t offset) { offset &= 0x7fff; return m_upd7725->snesdsp_read(offset < 0x4000); } -WRITE8_MEMBER( sns_rom20_necdsp_device::chip_write ) +void sns_rom20_necdsp_device::chip_write(offs_t offset, uint8_t data) { offset &= 0x7fff; m_upd7725->snesdsp_write(offset < 0x4000, data); @@ -156,12 +156,12 @@ WRITE8_MEMBER( sns_rom20_necdsp_device::chip_write ) // Hi-ROM // DSP dump contains prg at offset 0 and data at offset 0x2000 -READ32_MEMBER( sns_rom21_necdsp_device::necdsp_prg_r ) +uint32_t sns_rom21_necdsp_device::necdsp_prg_r(offs_t offset) { return get_prg(&m_bios[0], offset); } -READ16_MEMBER( sns_rom21_necdsp_device::necdsp_data_r ) +uint16_t sns_rom21_necdsp_device::necdsp_data_r(offs_t offset) { return get_data(&m_bios[0], offset + 0x2000/2); } @@ -197,14 +197,14 @@ void sns_rom21_necdsp_device::device_add_mconfig(machine_config &config) m_upd7725->set_addrmap(AS_DATA, &sns_rom21_necdsp_device::dsp_data_map_hirom); } -READ8_MEMBER( sns_rom21_necdsp_device::chip_read ) +uint8_t sns_rom21_necdsp_device::chip_read(offs_t offset) { offset &= 0x1fff; return m_upd7725->snesdsp_read(offset < 0x1000); } -WRITE8_MEMBER( sns_rom21_necdsp_device::chip_write ) +void sns_rom21_necdsp_device::chip_write(offs_t offset, uint8_t data) { offset &= 0x1fff; m_upd7725->snesdsp_write(offset < 0x1000, data); @@ -217,7 +217,7 @@ WRITE8_MEMBER( sns_rom21_necdsp_device::chip_write ) // same as above but additional read/write handling for the add-on chip -READ8_MEMBER( sns_rom_setadsp_device::chip_read ) +uint8_t sns_rom_setadsp_device::chip_read(offs_t offset) { if (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000) m_upd96050->snesdsp_read((offset & 0x01) ? false : true); @@ -236,7 +236,7 @@ READ8_MEMBER( sns_rom_setadsp_device::chip_read ) } -WRITE8_MEMBER( sns_rom_setadsp_device::chip_write ) +void sns_rom_setadsp_device::chip_write(offs_t offset, uint8_t data) { if (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000) { @@ -267,12 +267,12 @@ WRITE8_MEMBER( sns_rom_setadsp_device::chip_write ) // DSP dump contains prg at offset 0 and data at offset 0x10000 -READ32_MEMBER( sns_rom_setadsp_device::setadsp_prg_r ) +uint32_t sns_rom_setadsp_device::setadsp_prg_r(offs_t offset) { return get_prg(&m_bios[0], offset); } -READ16_MEMBER( sns_rom_setadsp_device::setadsp_data_r ) +uint16_t sns_rom_setadsp_device::setadsp_data_r(offs_t offset) { return get_data(&m_bios[0], offset + 0x10000/2); } diff --git a/src/devices/bus/snes/upd.h b/src/devices/bus/snes/upd.h index 0d21335861c..65dd780c725 100644 --- a/src/devices/bus/snes/upd.h +++ b/src/devices/bus/snes/upd.h @@ -28,11 +28,11 @@ protected: virtual void speedup_addon_bios_access() override; // additional reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; - virtual DECLARE_READ32_MEMBER(necdsp_prg_r); - virtual DECLARE_READ16_MEMBER(necdsp_data_r); + uint32_t necdsp_prg_r(offs_t offset); + uint16_t necdsp_data_r(offs_t offset); void dsp_data_map_lorom(address_map &map); void dsp_prg_map_lorom(address_map &map); @@ -62,11 +62,11 @@ protected: virtual void speedup_addon_bios_access() override; // additional reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; - virtual DECLARE_READ32_MEMBER(necdsp_prg_r); - virtual DECLARE_READ16_MEMBER(necdsp_data_r); + uint32_t necdsp_prg_r(offs_t offset); + uint16_t necdsp_data_r(offs_t offset); void dsp_data_map_hirom(address_map &map); void dsp_prg_map_hirom(address_map &map); @@ -93,11 +93,11 @@ protected: virtual void device_start() override; // additional reading and writing - virtual DECLARE_READ8_MEMBER(chip_read) override; - virtual DECLARE_WRITE8_MEMBER(chip_write) override; + virtual uint8_t chip_read(offs_t offset) override; + virtual void chip_write(offs_t offset, uint8_t data) override; - virtual DECLARE_READ32_MEMBER(setadsp_prg_r); - virtual DECLARE_READ16_MEMBER(setadsp_data_r); + virtual uint32_t setadsp_prg_r(offs_t offset); + virtual uint16_t setadsp_data_r(offs_t offset); void st01x_data_map(address_map &map); void st01x_prg_map(address_map &map); diff --git a/src/mame/drivers/gb.cpp b/src/mame/drivers/gb.cpp index b7219a8633b..ec88044b7e9 100644 --- a/src/mame/drivers/gb.cpp +++ b/src/mame/drivers/gb.cpp @@ -289,7 +289,7 @@ space. This mapper uses 32KB sized banks. READ8_MEMBER(gb_state::gb_cart_r) { if (m_bios_disable && m_cartslot) - return m_cartslot->read_rom(space, offset); + return m_cartslot->read_rom(offset); else { if (offset < 0x100) @@ -309,7 +309,7 @@ READ8_MEMBER(gb_state::gb_cart_r) } else if (m_cartslot) { - return m_cartslot->read_rom(space, offset); + return m_cartslot->read_rom(offset); } else return 0xff; @@ -319,7 +319,7 @@ READ8_MEMBER(gb_state::gb_cart_r) READ8_MEMBER(gb_state::gbc_cart_r) { if (m_bios_disable && m_cartslot) - return m_cartslot->read_rom(space, offset); + return m_cartslot->read_rom(offset); else { if (offset < 0x100) @@ -344,7 +344,7 @@ READ8_MEMBER(gb_state::gbc_cart_r) } else if (m_cartslot) { - return m_cartslot->read_rom(space, offset); + return m_cartslot->read_rom(offset); } else return 0xff; @@ -354,13 +354,13 @@ READ8_MEMBER(gb_state::gbc_cart_r) WRITE8_MEMBER(gb_state::gb_bank_w) { if (m_cartslot) - m_cartslot->write_bank(space, offset, data); + m_cartslot->write_bank(offset, data); } READ8_MEMBER(gb_state::gb_ram_r) { if (m_cartslot) - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); else return 0xff; } @@ -368,7 +368,7 @@ READ8_MEMBER(gb_state::gb_ram_r) WRITE8_MEMBER(gb_state::gb_ram_w) { if (m_cartslot) - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); } READ8_MEMBER(gb_state::gb_echo_r) @@ -384,7 +384,7 @@ WRITE8_MEMBER(gb_state::gb_echo_w) READ8_MEMBER(megaduck_state::cart_r) { if (m_cartslot) - return m_cartslot->read_rom(space, offset); + return m_cartslot->read_rom(offset); else return 0xff; } @@ -392,13 +392,13 @@ READ8_MEMBER(megaduck_state::cart_r) WRITE8_MEMBER(megaduck_state::bank1_w) { if (m_cartslot) - m_cartslot->write_bank(space, offset, data); + m_cartslot->write_bank(offset, data); } WRITE8_MEMBER(megaduck_state::bank2_w) { if (m_cartslot) - m_cartslot->write_ram(space, offset, data); /* used for bankswitch, but we re-use GB name */ + m_cartslot->write_ram(offset, data); /* used for bankswitch, but we re-use GB name */ } diff --git a/src/mame/drivers/snes.cpp b/src/mame/drivers/snes.cpp index 19510acecb0..a5103b41fcb 100644 --- a/src/mame/drivers/snes.cpp +++ b/src/mame/drivers/snes.cpp @@ -154,10 +154,10 @@ READ8_MEMBER( snes_console_state::snes20_hi_r ) // take care of add-on IO if ((m_cartslot->get_type() == SNES_ST010 || m_cartslot->get_type() == SNES_ST011) && (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000)) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else if ((m_cartslot->get_type() == SNES_ST010 || m_cartslot->get_type() == SNES_ST011) && (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x8000)) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else if (m_cartslot->get_type() == SNES_CX4 && (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) // hack until we emulate the real CPU return CX4_read((offset & 0xffff) - 0x6000); @@ -169,37 +169,37 @@ READ8_MEMBER( snes_console_state::snes20_hi_r ) else if (address < 0x6000) return snes_r_io(space, address); else if (address < 0x8000) - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } else if (offset < 0x700000) { if (address < 0x8000) - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } else { if (m_type == SNES_SUFAMITURBO && address >= 0x8000 && offset < 0x740000) - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); // here usually there is SRAM mirrored in the whole range, but if ROM is very large then arrives here too (see tokimeki and wizardg4) if (m_cartslot->m_cart->get_rom_size() > 0x200000 && address >= 0x8000) - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); else { if (m_cartslot->m_cart->get_nvram_size() > 0x8000) { // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc. offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff); - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); } else if (m_cartslot->m_cart->get_nvram_size() > 0) - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } } } @@ -211,16 +211,16 @@ WRITE8_MEMBER( snes_console_state::snes20_hi_w ) // take care of add-on IO if ((m_cartslot->get_type() == SNES_ST010 || m_cartslot->get_type() == SNES_ST011) && (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000)) - { m_cartslot->chip_write(space, offset, data); return; } + { m_cartslot->chip_write(offset, data); return; } else if ((m_cartslot->get_type() == SNES_ST010 || m_cartslot->get_type() == SNES_ST011) && (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x8000)) - { m_cartslot->chip_write(space, offset, data); return; } + { m_cartslot->chip_write(offset, data); return; } else if (m_cartslot->get_type() == SNES_CX4 && (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) // hack until we emulate the real CPU { CX4_write(machine(), (offset & 0xffff) - 0x6000, data); return; } else if (m_type == SNES_SUFAMITURBO && address >= 0x8000 && ((offset >= 0x600000 && offset < 0x640000) || (offset >= 0x700000 && offset < 0x740000))) - { m_cartslot->write_h(space, offset, data); return; } + { m_cartslot->write_h(offset, data); return; } if (offset < 0x400000) { @@ -235,10 +235,10 @@ WRITE8_MEMBER( snes_console_state::snes20_hi_w ) { // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc. offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff); - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); } else if (m_cartslot->m_cart->get_nvram_size() > 0) - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); } } @@ -249,10 +249,10 @@ READ8_MEMBER( snes_console_state::snes20_lo_r ) // take care of add-on IO if ((m_cartslot->get_type() == SNES_ST010 /*|| m_cartslot->get_type() == SNES_ST011*/) // why does this break moritash? && (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000)) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else if ((m_cartslot->get_type() == SNES_ST010 || m_cartslot->get_type() == SNES_ST011) && (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x8000)) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else if (m_cartslot->get_type() == SNES_CX4 && (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) // hack until we emulate the real CPU return CX4_read((offset & 0xffff) - 0x6000); @@ -264,37 +264,37 @@ READ8_MEMBER( snes_console_state::snes20_lo_r ) else if (address < 0x6000) return snes_r_io(space, address); else if (address < 0x8000) - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } else if (offset < 0x700000) { if (address < 0x8000) - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } else { if (m_type == SNES_SUFAMITURBO && address >= 0x8000 && offset < 0x740000) - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); // here usually there is SRAM mirrored in the whole range, but if ROM is very large then arrives here too (see tokimeki and wizardg4) if (m_cartslot->m_cart->get_rom_size() > 0x200000 && address >= 0x8000) - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); else { if (m_cartslot->m_cart->get_nvram_size() > 0x8000) { // In this case, SRAM is mapped in 0x8000 chunks at diff offsets: 0x700000-0x707fff, 0x710000-0x717fff, etc. offset = ((offset - 0x700000) / 0x10000) * 0x8000 + (offset & 0x7fff); - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); } else if (m_cartslot->m_cart->get_nvram_size() > 0) - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } } } @@ -303,7 +303,7 @@ WRITE8_MEMBER( snes_console_state::snes20_lo_w ) { if (m_type == SNES_SUFAMITURBO && (offset & 0xffff) >= 0x8000 && ((offset >= 0x600000 && offset < 0x640000) || (offset >= 0x700000 && offset < 0x740000))) - { m_cartslot->write_l(space, offset, data); return; } + { m_cartslot->write_l(offset, data); return; } // other add-on writes matches the hi handler snes20_hi_w(space, offset, data, 0xff); @@ -329,7 +329,7 @@ READ8_MEMBER( snes_console_state::snes21_lo_r ) if (m_type == SNES_BSXHI && m_cartslot->m_cart->get_nvram_size() && offset >= 0x200000) { int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; - return m_cartslot->read_ram(space, (offset - 0x6000) & mask); + return m_cartslot->read_ram((offset - 0x6000) & mask); } if (m_cartslot->m_cart->get_nvram_size() && offset >= 0x300000) @@ -337,15 +337,15 @@ READ8_MEMBER( snes_console_state::snes21_lo_r ) /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */ /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */ int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */ - return m_cartslot->read_ram(space, (offset - 0x6000) & mask); + return m_cartslot->read_ram((offset - 0x6000) & mask); } else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } } // ROM access - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } WRITE8_MEMBER( snes_console_state::snes21_lo_w ) @@ -362,7 +362,7 @@ WRITE8_MEMBER( snes_console_state::snes21_lo_w ) if (m_type == SNES_BSXHI && m_cartslot->m_cart->get_nvram_size() && offset >= 0x200000) { int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; - m_cartslot->write_ram(space, (offset - 0x6000) & mask, data); + m_cartslot->write_ram((offset - 0x6000) & mask, data); return; } if (m_cartslot->m_cart->get_nvram_size() && offset >= 0x300000) @@ -370,7 +370,7 @@ WRITE8_MEMBER( snes_console_state::snes21_lo_w ) /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */ /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */ int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */ - m_cartslot->write_ram(space, (offset - 0x6000) & mask, data); + m_cartslot->write_ram((offset - 0x6000) & mask, data); } } } @@ -391,7 +391,7 @@ READ8_MEMBER( snes_console_state::snes21_hi_r ) if (m_type == SNES_BSXHI && m_cartslot->m_cart->get_nvram_size() && offset >= 0x200000) { int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; - return m_cartslot->read_ram(space, (offset - 0x6000) & mask); + return m_cartslot->read_ram((offset - 0x6000) & mask); } if (m_cartslot->m_cart->get_nvram_size() && offset >= 0x300000) @@ -399,15 +399,15 @@ READ8_MEMBER( snes_console_state::snes21_hi_r ) /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */ /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */ int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */ - return m_cartslot->read_ram(space, (offset - 0x6000) & mask); + return m_cartslot->read_ram((offset - 0x6000) & mask); } else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } } // ROM access - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } WRITE8_MEMBER( snes_console_state::snes21_hi_w ) @@ -424,7 +424,7 @@ WRITE8_MEMBER( snes_console_state::snes21_hi_w ) if (m_type == SNES_BSXHI && m_cartslot->m_cart->get_nvram_size() && offset >= 0x200000) { int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; - m_cartslot->write_ram(space, (offset - 0x6000) & mask, data); + m_cartslot->write_ram((offset - 0x6000) & mask, data); return; } if (m_cartslot->m_cart->get_nvram_size() && offset >= 0x300000) @@ -432,7 +432,7 @@ WRITE8_MEMBER( snes_console_state::snes21_hi_w ) /* Donkey Kong Country checks this and detects a copier if 0x800 is not masked out due to sram size */ /* OTOH Secret of Mana does not work properly if sram is not mirrored on later banks */ int mask = (m_cartslot->m_cart->get_nvram_size() - 1) & 0x7fff; /* Limit SRAM size to what's actually present */ - m_cartslot->write_ram(space, (offset - 0x6000) & mask, data); + m_cartslot->write_ram((offset - 0x6000) & mask, data); } } } @@ -453,19 +453,19 @@ READ8_MEMBER( snes_console_state::snessfx_hi_r ) else if (address < 0x6000) { if (address >= 0x3000 && address < 0x3300) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else return snes_r_io(space, address); } else if (address < 0x8000) - return m_cartslot->read_ram(space, offset & 0x1fff); + return m_cartslot->read_ram(offset & 0x1fff); else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } else if (offset < 0x600000) - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); else - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); } READ8_MEMBER( snes_console_state::snessfx_lo_r ) @@ -479,19 +479,19 @@ READ8_MEMBER( snes_console_state::snessfx_lo_r ) else if (address < 0x6000) { if (address >= 0x3000 && address < 0x3300) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else return snes_r_io(space, address); } else if (address < 0x8000) - return m_cartslot->read_ram(space, offset & 0x1fff); + return m_cartslot->read_ram(offset & 0x1fff); else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } else if (offset < 0x600000) - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); else - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); } WRITE8_MEMBER( snes_console_state::snessfx_hi_w ) @@ -504,15 +504,15 @@ WRITE8_MEMBER( snes_console_state::snessfx_hi_w ) else if (address < 0x6000) { if (address >= 0x3000 && address < 0x3300) - m_cartslot->chip_write(space, offset, data); + m_cartslot->chip_write(offset, data); else snes_w_io(space, address, data); } else if (address < 0x8000) - m_cartslot->write_ram(space, offset & 0x1fff, data); + m_cartslot->write_ram(offset & 0x1fff, data); } else if (offset >= 0x600000) - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); } WRITE8_MEMBER( snes_console_state::snessfx_lo_w ) @@ -535,19 +535,19 @@ READ8_MEMBER( snes_console_state::snessa1_hi_r ) else if (address < 0x6000) { if (address >= 0x2200 && address < 0x2400) - return m_cartslot->chip_read(space, offset); // SA-1 Regs + return m_cartslot->chip_read(offset); // SA-1 Regs else if (address >= 0x3000 && address < 0x3800) - return m_cartslot->chip_read(space, offset); // Internal SA-1 RAM (2K) + return m_cartslot->chip_read(offset); // Internal SA-1 RAM (2K) else return snes_r_io(space, address); } else if (address < 0x8000) - return m_cartslot->chip_read(space, offset); // SA-1 BWRAM + return m_cartslot->chip_read(offset); // SA-1 BWRAM else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } READ8_MEMBER( snes_console_state::snessa1_lo_r ) @@ -561,19 +561,19 @@ READ8_MEMBER( snes_console_state::snessa1_lo_r ) else if (address < 0x6000) { if (address >= 0x2200 && address < 0x2400) - return m_cartslot->chip_read(space, offset); // SA-1 Regs + return m_cartslot->chip_read(offset); // SA-1 Regs else if (address >= 0x3000 && address < 0x3800) - return m_cartslot->chip_read(space, offset); // Internal SA-1 RAM (2K) + return m_cartslot->chip_read(offset); // Internal SA-1 RAM (2K) else return snes_r_io(space, address); } else if (address < 0x8000) - return m_cartslot->chip_read(space, offset); // SA-1 BWRAM + return m_cartslot->chip_read(offset); // SA-1 BWRAM else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } else if (offset < 0x500000) - return m_cartslot->chip_read(space, offset); // SA-1 BWRAM (not mirrored above!) + return m_cartslot->chip_read(offset); // SA-1 BWRAM (not mirrored above!) else return snes_r_io(space, address); // nothing mapped here! } @@ -588,21 +588,21 @@ WRITE8_MEMBER( snes_console_state::snessa1_hi_w ) else if (address < 0x6000) { if (address >= 0x2200 && address < 0x2400) - m_cartslot->chip_write(space, offset, data); // SA-1 Regs + m_cartslot->chip_write(offset, data); // SA-1 Regs else if (address >= 0x3000 && address < 0x3800) - m_cartslot->chip_write(space, offset, data); // Internal SA-1 RAM (2K) + m_cartslot->chip_write(offset, data); // Internal SA-1 RAM (2K) else snes_w_io(space, address, data); } else if (address < 0x8000) - m_cartslot->chip_write(space, offset, data); // SA-1 BWRAM + m_cartslot->chip_write(offset, data); // SA-1 BWRAM } } WRITE8_MEMBER( snes_console_state::snessa1_lo_w ) { if (offset >= 0x400000 && offset < 0x500000) - m_cartslot->chip_write(space, offset, data); // SA-1 BWRAM (not mirrored above!) + m_cartslot->chip_write(offset, data); // SA-1 BWRAM (not mirrored above!) else snessa1_hi_w(space, offset, data, 0xff); } @@ -623,21 +623,21 @@ READ8_MEMBER( snes_console_state::snes7110_hi_r ) { uint16_t limit = (m_cartslot->get_type() == SNES_SPC7110_RTC) ? 0x4843 : 0x4840; if (address >= 0x4800 && address < limit) - return m_cartslot->chip_read(space, address); + return m_cartslot->chip_read(address); return snes_r_io(space, address); } else if (address < 0x8000) { if (offset < 0x10000) - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); if (offset >= 0x300000 && offset < 0x310000) - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); } else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } READ8_MEMBER( snes_console_state::snes7110_lo_r ) @@ -652,24 +652,24 @@ READ8_MEMBER( snes_console_state::snes7110_lo_r ) { uint16_t limit = (m_cartslot->get_type() == SNES_SPC7110_RTC) ? 0x4843 : 0x4840; if (address >= 0x4800 && address < limit) - return m_cartslot->chip_read(space, address); + return m_cartslot->chip_read(address); return snes_r_io(space, address); } else if (address < 0x8000) { if (offset < 0x10000) - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); if (offset >= 0x300000 && offset < 0x310000) - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); } else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } if (offset >= 0x500000 && offset < 0x510000) - return m_cartslot->chip_read(space, 0x4800); + return m_cartslot->chip_read(0x4800); - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } WRITE8_MEMBER( snes_console_state::snes7110_hi_w ) @@ -689,7 +689,7 @@ WRITE8_MEMBER( snes_console_state::snes7110_lo_w ) uint16_t limit = (m_cartslot->get_type() == SNES_SPC7110_RTC) ? 0x4843 : 0x4840; if (address >= 0x4800 && address < limit) { - m_cartslot->chip_write(space, address, data); + m_cartslot->chip_write(address, data); return; } snes_w_io(space, address, data); @@ -697,9 +697,9 @@ WRITE8_MEMBER( snes_console_state::snes7110_lo_w ) else if (address < 0x8000) { if (offset < 0x10000) - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); if (offset >= 0x300000 && offset < 0x310000) - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); } } } @@ -720,25 +720,25 @@ READ8_MEMBER( snes_console_state::snessdd1_lo_r ) else if (address < 0x6000) { if (address >= 0x4800 && address < 0x4808) - return m_cartslot->chip_read(space, address); + return m_cartslot->chip_read(address); return snes_r_io(space, address); } else if (address < 0x8000) - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } else if (offset >= 0x700000 && address < 0x8000 && m_cartslot->m_cart->get_nvram_size()) // NVRAM access - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); else // ROM access - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } READ8_MEMBER( snes_console_state::snessdd1_hi_r ) { if (offset >= 0x400000) - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); else return snessdd1_lo_r(space, offset, 0xff); } @@ -759,19 +759,19 @@ WRITE8_MEMBER( snes_console_state::snessdd1_hi_w ) { if (address >= 0x4300 && address < 0x4380) { - m_cartslot->chip_write(space, address, data); + m_cartslot->chip_write(address, data); // here we don't return, but we let the w_io happen... } if (address >= 0x4800 && address < 0x4808) { - m_cartslot->chip_write(space, address, data); + m_cartslot->chip_write(address, data); return; } snes_w_io(space, address, data); } } if (offset >= 0x700000 && address < 0x8000 && m_cartslot->m_cart->get_nvram_size()) - return m_cartslot->write_ram(space, offset, data); + return m_cartslot->write_ram(offset, data); } @@ -790,22 +790,22 @@ READ8_MEMBER( snes_console_state::snesbsx_hi_r ) else if (address < 0x6000) { if (address >= 0x2188 && address < 0x21a0) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); if (address >= 0x5000) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); return snes_r_io(space, address); } else if (address < 0x8000) { if (offset >= 0x200000) - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } WRITE8_MEMBER( snes_console_state::snesbsx_hi_w ) @@ -819,12 +819,12 @@ WRITE8_MEMBER( snes_console_state::snesbsx_hi_w ) { if (address >= 0x2188 && address < 0x21a0) { - m_cartslot->chip_write(space, offset, data); + m_cartslot->chip_write(offset, data); return; } if (address >= 0x5000) { - m_cartslot->chip_write(space, offset, data); + m_cartslot->chip_write(offset, data); return; } snes_w_io(space, address, data); @@ -832,12 +832,12 @@ WRITE8_MEMBER( snes_console_state::snesbsx_hi_w ) else if (address < 0x8000) { if (offset >= 0x200000) - return m_cartslot->write_l(space, offset, data); + return m_cartslot->write_l(offset, data); } else - return m_cartslot->write_l(space, offset, data); + return m_cartslot->write_l(offset, data); } - return m_cartslot->write_l(space, offset, data); + return m_cartslot->write_l(offset, data); } READ8_MEMBER( snes_console_state::snesbsx_lo_r ) @@ -851,22 +851,22 @@ READ8_MEMBER( snes_console_state::snesbsx_lo_r ) else if (address < 0x6000) { if (address >= 0x2188 && address < 0x21a0) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); if (address >= 0x5000) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); return snes_r_io(space, address); } else if (address < 0x8000) { if (offset >= 0x200000) - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } WRITE8_MEMBER( snes_console_state::snesbsx_lo_w ) @@ -890,14 +890,14 @@ READ8_MEMBER( snes_console_state::snessgb_hi_r ) else if (address < 0x6000) return snes_r_io(space, address); else if (address < 0x8000) - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } else if (address >= 0x8000) - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } READ8_MEMBER( snes_console_state::snessgb_lo_r ) @@ -915,7 +915,7 @@ WRITE8_MEMBER( snes_console_state::snessgb_hi_w ) else if (address < 0x6000) snes_w_io(space, address, data); else if (address < 0x8000) - m_cartslot->chip_write(space, offset, data); + m_cartslot->chip_write(offset, data); } } @@ -941,18 +941,18 @@ READ8_MEMBER( snes_console_state::pfest94_hi_r ) else if (address < 0x8000) { if (offset < 0x100000) // DSP access - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else if (offset == 0x106000) // menu access - return m_cartslot->chip_read(space, offset + 0x8000); + return m_cartslot->chip_read(offset + 0x8000); else if (offset >= 0x300000 && m_cartslot->m_cart->get_nvram_size()) // NVRAM access - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } else - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } - return m_cartslot->read_h(space, offset); + return m_cartslot->read_h(offset); } WRITE8_MEMBER( snes_console_state::pfest94_hi_w ) @@ -967,11 +967,11 @@ WRITE8_MEMBER( snes_console_state::pfest94_hi_w ) else if (address < 0x8000) { if (offset < 0x100000) // DSP access - m_cartslot->chip_write(space, offset, data); + m_cartslot->chip_write(offset, data); else if (offset == 0x206000) // menu access - m_cartslot->chip_write(space, offset + 0x8000, data); + m_cartslot->chip_write(offset + 0x8000, data); else if (offset >= 0x300000 && m_cartslot->m_cart->get_nvram_size()) // NVRAM access - m_cartslot->write_ram(space, offset, data); + m_cartslot->write_ram(offset, data); } } } @@ -989,16 +989,16 @@ READ8_MEMBER( snes_console_state::pfest94_lo_r ) else if (address < 0x8000) { if (offset < 0x100000) // DSP access - return m_cartslot->chip_read(space, offset); + return m_cartslot->chip_read(offset); else if (offset == 0x106000) // menu access - return m_cartslot->chip_read(space, offset + 0x8000); + return m_cartslot->chip_read(offset + 0x8000); else if (offset >= 0x300000 && m_cartslot->m_cart->get_nvram_size()) // NVRAM access - return m_cartslot->read_ram(space, offset); + return m_cartslot->read_ram(offset); else - return snes_open_bus_r(space, 0); + return snes_open_bus_r(); } else - return m_cartslot->read_l(space, offset); + return m_cartslot->read_l(offset); } return 0xff; // or open_bus? } @@ -1234,20 +1234,20 @@ void snes_console_state::machine_start() m_maincpu->set_5a22_map(); break; case SNES_DSP: - m_maincpu->space(AS_PROGRAM).install_read_handler(0x208000, 0x20ffff, 0, 0x9f0000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x208000, 0x20ffff, 0, 0x9f0000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x208000, 0x20ffff, 0, 0x9f0000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x208000, 0x20ffff, 0, 0x9f0000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_DSP_2MB: - m_maincpu->space(AS_PROGRAM).install_read_handler(0x600000, 0x607fff, 0, 0x8f0000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x600000, 0x607fff, 0, 0x8f0000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x600000, 0x607fff, 0, 0x8f0000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x600000, 0x607fff, 0, 0x8f0000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_DSP4: - m_maincpu->space(AS_PROGRAM).install_read_handler(0x308000, 0x30ffff, 0, 0x8f0000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x308000, 0x30ffff, 0, 0x8f0000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x308000, 0x30ffff, 0, 0x8f0000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x308000, 0x30ffff, 0, 0x8f0000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_OBC1: - m_maincpu->space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0xbf0000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0xbf0000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0xbf0000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0xbf0000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_SFX: m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snessfx_lo_r),this), write8_delegate(FUNC(snes_console_state::snessfx_lo_w),this)); @@ -1274,15 +1274,15 @@ void snes_console_state::machine_start() case SNES_DSP_MODE21: m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),this), write8_delegate(FUNC(snes_console_state::snes21_lo_w),this)); m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),this), write8_delegate(FUNC(snes_console_state::snes21_hi_w),this)); - m_maincpu->space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0x9f0000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0x9f0000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0x9f0000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0x9f0000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); m_maincpu->set_5a22_map(); break; case SNES_SRTC: m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),this), write8_delegate(FUNC(snes_console_state::snes21_lo_w),this)); m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),this), write8_delegate(FUNC(snes_console_state::snes21_hi_w),this)); - m_maincpu->space(AS_PROGRAM).install_read_handler(0x002800, 0x002800, 0, 0xbf0000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x002801, 0x002801, 0, 0xbf0000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x002800, 0x002800, 0, 0xbf0000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x002801, 0x002801, 0, 0xbf0000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); m_maincpu->set_5a22_map(); break; case SNES_SPC7110: @@ -1298,29 +1298,29 @@ void snes_console_state::machine_start() break; // pirate 'mappers' case SNES_POKEMON: - m_maincpu->space(AS_PROGRAM).install_read_handler(0x800000, 0x80ffff, 0, 0x780000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x800000, 0x80ffff, 0, 0x780000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x800000, 0x80ffff, 0, 0x780000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x800000, 0x80ffff, 0, 0x780000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_TEKKEN2: - m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x8087ff, 0, 0x3f0000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x808000, 0x8087ff, 0, 0x3f0000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x8087ff, 0, 0x3f0000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x808000, 0x8087ff, 0, 0x3f0000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_MCPIR1: case SNES_MCPIR2: - m_maincpu->space(AS_PROGRAM).install_write_handler(0xffff00, 0xffffff, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0xffff00, 0xffffff, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_20COL: - m_maincpu->space(AS_PROGRAM).install_write_handler(0x008000, 0x008fff, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x008000, 0x008fff, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); break; case SNES_SOULBLAD: // reads from xxx0-xxx3in range [80-bf] return a fixed sequence of 4bits; reads in range [c0-ff] return open bus - m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x808003, 0, 0x3f7ff0, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); - m_maincpu->space(AS_PROGRAM).install_read_handler(0xc00000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes_open_bus_r),this)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x808003, 0, 0x3f7ff0, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0xc00000, 0xffffff, read8smo_delegate(FUNC(snes_console_state::snes_open_bus_r),this)); break; case SNES_BUGS: case SNES_BANANA: -// m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x80ffff, 0, 0x780000, 0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); -// m_maincpu->space(AS_PROGRAM).install_write_handler(0x808000, 0x80ffff, 0, 0x780000, 0, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); +// m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x80ffff, 0, 0x780000, 0, read8sm_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)m_cartslot)); +// m_maincpu->space(AS_PROGRAM).install_write_handler(0x808000, 0x80ffff, 0, 0x780000, 0, write8sm_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)m_cartslot)); // m_maincpu->set_5a22_map(); break; } @@ -1353,7 +1353,7 @@ void snes_console_state::snes(machine_config &config) m_screen->set_screen_update(FUNC(snes_state::screen_update)); SNES_PPU(config, m_ppu, MCLK_NTSC); - m_ppu->open_bus_callback().set([this] { return snes_open_bus_r(); }); // lambda because overloaded function name + m_ppu->open_bus_callback().set(FUNC(snes_console_state::snes_open_bus_r)); m_ppu->set_screen("screen"); SNES_CONTROL_PORT(config, m_ctrl1, snes_control_port_devices, "joypad"); @@ -1371,6 +1371,7 @@ void snes_console_state::snes(machine_config &config) SNS_CART_SLOT(config, m_cartslot, MCLK_NTSC, snes_cart, nullptr); m_cartslot->irq_callback().set_inputline(m_maincpu, G65816_LINE_IRQ); + m_cartslot->open_bus_callback().set(FUNC(snes_console_state::snes_open_bus_r)); SOFTWARE_LIST(config, "cart_list").set_original("snes"); SOFTWARE_LIST(config, "bsx_list").set_original("snes_bspack"); diff --git a/src/mame/includes/snes.h b/src/mame/includes/snes.h index 287a519c21e..cfaaefc4e4c 100644 --- a/src/mame/includes/snes.h +++ b/src/mame/includes/snes.h @@ -421,7 +421,6 @@ protected: DECLARE_WRITE8_MEMBER(snes_w_bank1); DECLARE_WRITE8_MEMBER(snes_w_bank2); uint8_t snes_open_bus_r(); - DECLARE_READ8_MEMBER(snes_open_bus_r); TIMER_CALLBACK_MEMBER(snes_nmi_tick); TIMER_CALLBACK_MEMBER(snes_hirq_tick_callback); TIMER_CALLBACK_MEMBER(snes_reset_oam_address); diff --git a/src/mame/machine/snes.cpp b/src/mame/machine/snes.cpp index de0e730da04..40d7584ea55 100644 --- a/src/mame/machine/snes.cpp +++ b/src/mame/machine/snes.cpp @@ -260,11 +260,6 @@ TIMER_CALLBACK_MEMBER(snes_state::snes_hblank_tick) *************************************/ -READ8_MEMBER( snes_state::snes_open_bus_r ) -{ - return snes_open_bus_r(); -} - uint8_t snes_state::snes_open_bus_r() { static uint8_t recurse = 0; -- cgit v1.2.3