From f3537b3b307cc6aae3ea62133420f636cce3fcf4 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Thu, 26 Jul 2018 01:58:31 +0100 Subject: tlcs870 updates (#3787) * tlcs870 updates * basic devcb3 stuff to make a start on the ports (nw) --- src/devices/cpu/tlcs870/tlcs870.cpp | 177 ++++++++- src/devices/cpu/tlcs870/tlcs870.h | 71 +++- src/devices/cpu/tlcs870/tlcs870_ops.cpp | 480 ++++++++++++++++++----- src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp | 124 +++--- src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp | 365 +++++++++++++----- src/devices/cpu/tlcs870/tlcs870_ops_src.cpp | 575 +++++++++++++++++++++++++--- src/mame/drivers/hng64.cpp | 37 +- src/mame/includes/hng64.h | 20 + 8 files changed, 1535 insertions(+), 314 deletions(-) diff --git a/src/devices/cpu/tlcs870/tlcs870.cpp b/src/devices/cpu/tlcs870/tlcs870.cpp index e893cf69e0b..db201179719 100644 --- a/src/devices/cpu/tlcs870/tlcs870.cpp +++ b/src/devices/cpu/tlcs870/tlcs870.cpp @@ -22,7 +22,6 @@ DEFINE_DEVICE_TYPE(TMP87PH40AN, tmp87ph40an_device, "tmp87ph40an", "Toshiba TMP8 void tlcs870_device::tmp87ph40an_mem(address_map &map) { -#if 0 map(0x0000, 0x0000).rw(FUNC(tlcs870_device::port0_r), FUNC(tlcs870_device::port0_w)); map(0x0001, 0x0001).rw(FUNC(tlcs870_device::port1_r), FUNC(tlcs870_device::port1_w)); map(0x0002, 0x0002).rw(FUNC(tlcs870_device::port2_r), FUNC(tlcs870_device::port2_w)); @@ -37,6 +36,7 @@ void tlcs870_device::tmp87ph40an_mem(address_map &map) map(0x000b, 0x000b).w(FUNC(tlcs870_device::p1cr_w)); // Port 1 I/O control map(0x000c, 0x000c).w(FUNC(tlcs870_device::p6cr_w)); // Port 6 I/O control map(0x000d, 0x000d).w(FUNC(tlcs870_device::p7cr_w)); // Port 7 I/O control +#if 0 map(0x000e, 0x000e).rw(FUNC(tlcs870_device::adccr_r), FUNC(tlcs870_device::adccr_w)); // A/D converter control map(0x000f, 0x000f).r(FUNC(tlcs870_device::adcdr_r)); // A/D converter result @@ -107,6 +107,8 @@ tlcs870_device::tlcs870_device(const machine_config &mconfig, device_type optype , m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, program_map) , m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0) , m_intram(*this, "intram") + , m_port_in_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}} + , m_port_out_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}} { } @@ -129,6 +131,147 @@ bool tlcs870_device::stream_arg(std::ostream &stream, uint32_t pc, const char *p return false; } +// NOT using templates here because there are subtle differences in the port behavior (the ports are multi-purpose) that still need implementing +READ8_MEMBER(tlcs870_device::port0_r) +{ + // need to use P0CR (0x000a) to control direction + + if (m_read_input_port) + return m_port_in_cb[0](); + else + return m_port_out_latch[0]; +} + +READ8_MEMBER(tlcs870_device::port1_r) +{ + // need to use P1CR (0x000b) to control direction + + if (m_read_input_port) + return m_port_in_cb[1](); + else + return m_port_out_latch[1]; +} + +READ8_MEMBER(tlcs870_device::port2_r) // 3-bit port +{ + if (m_read_input_port) + return m_port_in_cb[2]() | 0xf8; + else + return m_port_out_latch[2]; +} + +READ8_MEMBER(tlcs870_device::port3_r) +{ + if (m_read_input_port) + return m_port_in_cb[3](); + else + return m_port_out_latch[3]; +} + +READ8_MEMBER(tlcs870_device::port4_r) +{ + if (m_read_input_port) + return m_port_in_cb[4](); + else + return m_port_out_latch[4]; +} + +READ8_MEMBER(tlcs870_device::port5_r) // 5-bit port +{ + if (m_read_input_port) + return m_port_in_cb[5]() | 0xe0; + else + return m_port_out_latch[5]; +} + +READ8_MEMBER(tlcs870_device::port6_r) // doubles up as analog? +{ + // need to use P6CR (0x000c) to control direction + + if (m_read_input_port) + return m_port_in_cb[6](); + else + return m_port_out_latch[6]; +} + +READ8_MEMBER(tlcs870_device::port7_r) +{ + // need to use P7CR (0x000d) to control direction + + if (m_read_input_port) + return m_port_in_cb[7](); + else + return m_port_out_latch[7]; +} + +WRITE8_MEMBER(tlcs870_device::port0_w) +{ + m_port_out_latch[0] = data; + m_port_out_cb[0](data); +} + +WRITE8_MEMBER(tlcs870_device::port1_w) +{ + m_port_out_latch[1] = data; + m_port_out_cb[1](data); +} + +WRITE8_MEMBER(tlcs870_device::port2_w) +{ + m_port_out_latch[2] = data; + m_port_out_cb[2](data); +} + +WRITE8_MEMBER(tlcs870_device::port3_w) +{ + m_port_out_latch[3] = data; + m_port_out_cb[3](data); +} + +WRITE8_MEMBER(tlcs870_device::port4_w) +{ + m_port_out_latch[4] = data; + m_port_out_cb[4](data); +} + +WRITE8_MEMBER(tlcs870_device::port5_w) +{ + m_port_out_latch[5] = data; + m_port_out_cb[5](data); +} + +WRITE8_MEMBER(tlcs870_device::port6_w) +{ + m_port_out_latch[6] = data; + m_port_out_cb[6](data); +} + +WRITE8_MEMBER(tlcs870_device::port7_w) +{ + m_port_out_latch[7] = data; + m_port_out_cb[7](data); +} + +WRITE8_MEMBER(tlcs870_device::p0cr_w) +{ + m_port0_cr = data; +} + +WRITE8_MEMBER(tlcs870_device::p1cr_w) +{ + m_port1_cr = data; +} + +WRITE8_MEMBER(tlcs870_device::p6cr_w) +{ + m_port6_cr = data; +} + +WRITE8_MEMBER(tlcs870_device::p7cr_w) +{ + m_port7_cr = data; +} + void tlcs870_device::execute_set_input(int inputnum, int state) { #if 0 @@ -151,7 +294,7 @@ void tlcs870_device::execute_set_input(int inputnum, int state) void tlcs870_device::execute_run() { - m_cycles = 1; + while (m_icount > 0) { @@ -161,10 +304,19 @@ void tlcs870_device::execute_run() //check_interrupts(); m_addr = m_pc.d; m_tmppc = m_addr; // used for jumps etc. + m_cycles = 0; + m_read_input_port = 1; // some operations force the output latches to read from the memory mapped ports, not input ports decode(); m_pc.d = m_addr; - m_icount -= m_cycles * 4; // 1 machine cycle = 4 clock cycles? + if (m_cycles) + { + m_icount -= m_cycles * 4; // 1 machine cycle = 4 clock cycles? + } + else + { + fatalerror("m_cycles == 0 after PC %04x\n", m_tmppc); + } }; } @@ -172,6 +324,20 @@ void tlcs870_device::device_reset() { m_pc.d = RM16(0xfffe); m_RBS = 0; + + m_port_out_latch[0] = 0x00; + m_port_out_latch[1] = 0x00; + m_port_out_latch[2] = 0xff; + m_port_out_latch[3] = 0xff; + m_port_out_latch[4] = 0xff; + m_port_out_latch[5] = 0xff; + m_port_out_latch[6] = 0x00; + m_port_out_latch[7] = 0x00; + + m_port0_cr = 0xff; + m_port1_cr = 0xff; + m_port6_cr = 0xff; + m_port7_cr = 0xff; } void tlcs870_device::state_import(const device_state_entry &entry) @@ -315,6 +481,11 @@ void tlcs870_device::device_start() state_add(STATE_GENFLAGS, "GENFLAGS", m_F).formatstr("%8s").noshow(); set_icountptr(m_icount); + + for (auto &cb : m_port_in_cb) + cb.resolve_safe(0xff); + for (auto &cb : m_port_out_cb) + cb.resolve_safe(); } diff --git a/src/devices/cpu/tlcs870/tlcs870.h b/src/devices/cpu/tlcs870/tlcs870.h index 8b3c9d83bd3..7b8c8c256be 100644 --- a/src/devices/cpu/tlcs870/tlcs870.h +++ b/src/devices/cpu/tlcs870/tlcs870.h @@ -7,6 +7,25 @@ class tlcs870_device : public cpu_device { +public: + auto p0_in_cb() { return m_port_in_cb[0].bind(); } + auto p1_in_cb() { return m_port_in_cb[1].bind(); } + auto p2_in_cb() { return m_port_in_cb[2].bind(); } + auto p3_in_cb() { return m_port_in_cb[3].bind(); } + auto p4_in_cb() { return m_port_in_cb[4].bind(); } + auto p5_in_cb() { return m_port_in_cb[5].bind(); } + auto p6_in_cb() { return m_port_in_cb[6].bind(); } + auto p7_in_cb() { return m_port_in_cb[7].bind(); } + + auto p0_out_cb() { return m_port_out_cb[0].bind(); } + auto p1_out_cb() { return m_port_out_cb[1].bind(); } + auto p2_out_cb() { return m_port_out_cb[2].bind(); } + auto p3_out_cb() { return m_port_out_cb[3].bind(); } + auto p4_out_cb() { return m_port_out_cb[4].bind(); } + auto p5_out_cb() { return m_port_out_cb[5].bind(); } + auto p6_out_cb() { return m_port_out_cb[6].bind(); } + auto p7_out_cb() { return m_port_out_cb[7].bind(); } + protected: // construction/destruction tlcs870_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map); @@ -110,6 +129,35 @@ private: address_space *m_io; int m_icount; + devcb_read8 m_port_in_cb[8]; + devcb_write8 m_port_out_cb[8]; + uint8_t m_port_out_latch[8]; + int m_read_input_port; + uint8_t m_port0_cr, m_port1_cr, m_port6_cr, m_port7_cr; + + DECLARE_READ8_MEMBER(port0_r); + DECLARE_READ8_MEMBER(port1_r); + DECLARE_READ8_MEMBER(port2_r); + DECLARE_READ8_MEMBER(port3_r); + DECLARE_READ8_MEMBER(port4_r); + DECLARE_READ8_MEMBER(port5_r); + DECLARE_READ8_MEMBER(port6_r); + DECLARE_READ8_MEMBER(port7_r); + + DECLARE_WRITE8_MEMBER(port0_w); + DECLARE_WRITE8_MEMBER(port1_w); + DECLARE_WRITE8_MEMBER(port2_w); + DECLARE_WRITE8_MEMBER(port3_w); + DECLARE_WRITE8_MEMBER(port4_w); + DECLARE_WRITE8_MEMBER(port5_w); + DECLARE_WRITE8_MEMBER(port6_w); + DECLARE_WRITE8_MEMBER(port7_w); + + DECLARE_WRITE8_MEMBER(p0cr_w); + DECLARE_WRITE8_MEMBER(p1cr_w); + DECLARE_WRITE8_MEMBER(p6cr_w); + DECLARE_WRITE8_MEMBER(p7cr_w); + // Work registers uint8_t m_cycles; uint16_t m_tmppc; @@ -162,6 +210,8 @@ private: int is_CF() const { return ((m_F & FLAG_C) ? 1 : 0); } int is_HF() const { return ((m_F & FLAG_H) ? 1 : 0); } + int get_base_srcdst_cycles(int i) const { const int SRC_DST_CYCLES[8] = { 1, 2, 0, 0, 2, 2, 1, 1 }; return SRC_DST_CYCLES[i]; } + bool stream_arg(std::ostream &stream, uint32_t pc, const char *pre, const uint16_t mode, const uint16_t r, const uint16_t rb); // tlcs870_ops.cpp @@ -232,12 +282,7 @@ private: // tlcs870_ops_src.cpp - void do_e0_opcode(const uint8_t opbyte0); - void do_e1_to_e3_opcode(const uint8_t opbyte0); - void do_e4_opcode(const uint8_t opbyte0); - void do_e5_to_e7_opcode(const uint8_t opbyte0); - - void do_e0_to_e7_opcode(uint8_t opbyte0, uint16_t srcaddr); + void do_srcprefixtype_opcode(const uint8_t opbyte0); void do_e0_to_e7_oprand_illegal(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr); @@ -266,13 +311,7 @@ private: uint16_t do_alu(int op, uint16_t param1, uint16_t param2); // tlcs870_ops_dst.cpp - - void do_f0_opcode(const uint8_t opbyte0); - void do_f2_to_f3_opcode(const uint8_t opbyte0); - void do_f4_opcode(const uint8_t opbyte0); - void do_f6_to_f7_opcode(const uint8_t opbyte0); - - void do_f0_to_f7_opcode(const uint8_t opbyte0, const uint16_t dstaddr); + void do_dstprefixtype_opcode(const uint8_t opbyte0); void do_f0_to_f7_oprand_illegal_opcode(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr); @@ -310,9 +349,9 @@ private: void do_ALUOP_g_n(const uint8_t opbyte0, const uint8_t opbyte1); void do_SET_inppbit(const uint8_t opbyte0, const uint8_t opbyte1); void do_CLR_inppbit(const uint8_t opbyte0, const uint8_t opbyte1); - void do_CPL_inppbit(const uint8_t opbyte0, const uint8_t opbyte1); - void do_LD_inppbit_CF(const uint8_t opbyte0, const uint8_t opbyte1); - void do_LD_CF_inppbit(const uint8_t opbyte0, const uint8_t opbyte1); + void do_CPL_inpp_indirectbit(const uint8_t opbyte0, const uint8_t opbyte1); + void do_LD_inpp_indirectbit_CF(const uint8_t opbyte0, const uint8_t opbyte1); + void do_LD_CF_inpp_indirectbit(const uint8_t opbyte0, const uint8_t opbyte1); void do_XCH_r_g(const uint8_t opbyte0, const uint8_t opbyte1); void do_CPL_gbit(const uint8_t opbyte0, const uint8_t opbyte1); void do_LD_gbit_CF(const uint8_t opbyte0, const uint8_t opbyte1); diff --git a/src/devices/cpu/tlcs870/tlcs870_ops.cpp b/src/devices/cpu/tlcs870/tlcs870_ops.cpp index a2ab06ca962..034d967bca6 100644 --- a/src/devices/cpu/tlcs870/tlcs870_ops.cpp +++ b/src/devices/cpu/tlcs870/tlcs870_ops.cpp @@ -4,20 +4,7 @@ Toshiba TLCS-870 Series MCUs - (src) prefix ops (e0 to e7 subtable) - - (src) address depends on the first byte of the opcode - - E0 (x) - E1 (PC+A) - E2 (DE) - E3 (HL) - E4 (HL+d) - E5 (HL+) - E6 (-HL) - - note, in cases where the address is an immediate value, not a register (x) and (HL+d) the - immediate value is directly after the first byte of the opcode + direct opcodes, no prefix *************************************************************************************************************/ @@ -136,24 +123,12 @@ void tlcs870_device::decode() do_JR_cc_a(opbyte0); break; case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf: do_LD_CF_inxbit(opbyte0); break; - case 0xe0: - do_e0_opcode(opbyte0); break; - case 0xe1: case 0xe2: case 0xe3: - do_e1_to_e3_opcode(opbyte0); break; - case 0xe4: - do_e4_opcode(opbyte0); break; - case 0xe5: case 0xe6: case 0xe7: - do_e5_to_e7_opcode(opbyte0); break; + case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: + do_srcprefixtype_opcode(opbyte0); break; case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: do_regprefixtype_opcode(opbyte0); break; - case 0xf0: - do_f0_opcode(opbyte0); break; - case 0xf2: case 0xf3: - do_f2_to_f3_opcode(opbyte0); break; - case 0xf4: - do_f4_opcode(opbyte0); break; - case 0xf6: case 0xf7: - do_f6_to_f7_opcode(opbyte0); break; + case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: + do_dstprefixtype_opcode(opbyte0); break; case 0xfa: do_LD_SP_mn(opbyte0); break; case 0xfb: @@ -175,36 +150,62 @@ void tlcs870_device::decode() void tlcs870_device::do_illegal(const uint8_t opbyte0) { + m_cycles = 1; logerror("illegal opcode %02x\n", opbyte0); } void tlcs870_device::do_NOP(const uint8_t opbyte0) { - // NOP + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + NOP 0000 0000 - - - - 1 + */ + m_cycles = 1; } void tlcs870_device::do_SWAP_A(const uint8_t opbyte0) { - // SWAP A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SWAP A 0000 0001 1 - - - 3 + */ + m_cycles = 3; + handle_swap(REG_A); } void tlcs870_device::do_MUL_W_A(const uint8_t opbyte0) { - // MUL W,A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + MUL W, A 0000 0010 Z Z - - 7 + */ + m_cycles = 7; + handle_mul(REG_WA); } void tlcs870_device::do_DIV_WA_C(const uint8_t opbyte0) { - // DIV WA,C + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DIV WA, C 0000 0011 Z Z C - 7 + */ + m_cycles = 7; + handle_div(REG_WA); } void tlcs870_device::do_RETI(const uint8_t opbyte0) { - // RETI - // Return from maskable interrupt service (how does this differ from RETN?) + /* + Return from maskable interrupt service (how does this differ from RETN?) + + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + RETI 0000 0100 * * * * 6 + */ + m_cycles = 6; + m_sp.d += 3; m_addr = RM16(m_sp.d - 2); set_PSW(RM8(m_sp.d - 1)); @@ -212,14 +213,24 @@ void tlcs870_device::do_RETI(const uint8_t opbyte0) void tlcs870_device::do_RET(const uint8_t opbyte0) { - // RET + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + RET 0000 0101 - - - - 6 + */ + m_cycles = 6; + m_sp.d += 2; m_addr = RM16(m_sp.d - 1); }; void tlcs870_device::do_POP_PSW(const uint8_t opbyte0) { - // POP PSW + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + POP PSW 0000 0110 * * * * 3 + */ + m_cycles = 3; + m_sp.d += 2; const uint16_t val = RM16(m_sp.d - 1); set_PSW(val); @@ -227,7 +238,12 @@ void tlcs870_device::do_POP_PSW(const uint8_t opbyte0) void tlcs870_device::do_PUSH_PSW(const uint8_t opbyte0) { - // PUSH PSW: + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + POP PSW 0000 0111 - - - - 2 + */ + m_cycles = 2; + const uint16_t val = get_PSW(); WM16(m_sp.d - 1, val); m_sp.d -= 2; @@ -235,7 +251,12 @@ void tlcs870_device::do_PUSH_PSW(const uint8_t opbyte0) void tlcs870_device::do_DAA_A(const uint8_t opbyte0) { - // DAA A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DAA A 0000 1010 C Z C H 2 + */ + m_cycles = 2; + uint8_t val = get_reg8(REG_A); val = handle_DAA(val); @@ -245,7 +266,12 @@ void tlcs870_device::do_DAA_A(const uint8_t opbyte0) void tlcs870_device::do_DAS_A(const uint8_t opbyte0) { - // DAS A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DAS A 0000 1011 C Z C H 2 + */ + m_cycles = 2; + uint8_t val = get_reg8(REG_A); val = handle_DAS(val); @@ -255,21 +281,36 @@ void tlcs870_device::do_DAS_A(const uint8_t opbyte0) void tlcs870_device::do_CLR_CF(const uint8_t opbyte0) { - // CLR CF + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CLR CF 0000 1100 1 - 0 - 1 + */ + m_cycles = 1; + clear_CF(); set_JF(); } void tlcs870_device::do_SET_CF(const uint8_t opbyte0) { - // SET CF + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SET CF 0000 1101 0 - 1 - 1 + */ + m_cycles = 1; + set_CF(); clear_JF(); } void tlcs870_device::do_CPL_CF(const uint8_t opbyte0) { - // CPL CF + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CPL CF 0000 1110 * - * - 1 + */ + m_cycles = 1; + if (is_CF()) { set_JF(); @@ -284,7 +325,12 @@ void tlcs870_device::do_CPL_CF(const uint8_t opbyte0) void tlcs870_device::do_LD_RBS_n(const uint8_t opbyte0) // register bank switching { - // LD RBS,n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD RBS, n 0000 1111 0000 nnnn 1 - - - 4 + */ + m_cycles = 4; + const uint8_t param = READ8(); m_RBS = param & 0x0f; set_JF(); @@ -293,7 +339,12 @@ void tlcs870_device::do_LD_RBS_n(const uint8_t opbyte0) // register bank switchi void tlcs870_device::do_INC_rr(const uint8_t opbyte0) { - // INC rr + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + INC rr 0001 00rr C Z - - 2 + */ + m_cycles = 2; + const int reg = opbyte0 & 3; uint16_t temp = get_reg16(reg); temp++; @@ -315,7 +366,12 @@ void tlcs870_device::do_INC_rr(const uint8_t opbyte0) void tlcs870_device::do_LD_rr_mn(const uint8_t opbyte0) { - // LD rr,mn + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD rr,mn 0001 01rr nnnn nnnn mmmm mmmm 1 - - - 3 + */ + m_cycles = 3; + const uint16_t val = READ16(); // 16-bit set_reg16(opbyte0 & 3, val); set_JF(); @@ -324,7 +380,12 @@ void tlcs870_device::do_LD_rr_mn(const uint8_t opbyte0) void tlcs870_device::do_DEC_rr(const uint8_t opbyte0) { - // DEC rr + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DEC rr 0001 10rr C Z - - 2 + */ + m_cycles = 2; + const int reg = opbyte0 & 3; uint16_t temp = get_reg16(reg); temp--; @@ -353,7 +414,12 @@ void tlcs870_device::do_DEC_rr(const uint8_t opbyte0) void tlcs870_device::do_SHLC_A(const uint8_t opbyte0) { - // SHLC A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SHLC A 0001 1100 C Z * - 1 + */ + m_cycles = 1; + uint8_t val = get_reg8(REG_A); val = handle_SHLC(val); @@ -363,7 +429,12 @@ void tlcs870_device::do_SHLC_A(const uint8_t opbyte0) void tlcs870_device::do_SHRC_A(const uint8_t opbyte0) { - // SHRC A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SHRC A 0001 1101 C Z * - 1 + */ + m_cycles = 1; + uint8_t val = get_reg8(REG_A); val = handle_SHRC(val); @@ -373,7 +444,12 @@ void tlcs870_device::do_SHRC_A(const uint8_t opbyte0) void tlcs870_device::do_ROLC_A(const uint8_t opbyte0) { - // ROLC A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ROLC A 0001 1110 C Z * - 1 + */ + m_cycles = 1; + uint8_t val = get_reg8(REG_A); val = handle_ROLC(val); @@ -383,7 +459,12 @@ void tlcs870_device::do_ROLC_A(const uint8_t opbyte0) void tlcs870_device::do_RORC_A(const uint8_t opbyte0) { - // RORC A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + RORC A 0001 1111 C Z * - 1 + */ + m_cycles = 1; + uint8_t val = get_reg8(REG_A); val = handle_RORC(val); @@ -393,7 +474,12 @@ void tlcs870_device::do_RORC_A(const uint8_t opbyte0) void tlcs870_device::do_INC_inx(const uint8_t opbyte0) { - // INC (x) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + INC (x) 0010 0000 xxxx xxxx C Z - - 5 + */ + m_cycles = 5; + const uint16_t srcaddr = READ8(); uint8_t val = RM8(srcaddr); @@ -416,7 +502,12 @@ void tlcs870_device::do_INC_inx(const uint8_t opbyte0) void tlcs870_device::do_INC_inHL(const uint8_t opbyte0) { - // INC (HL) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + INC (HL) 0010 0001 C Z - - 4 + */ + m_cycles = 4; + const uint16_t addr = get_reg16(REG_HL); uint8_t val = RM8(addr); @@ -438,7 +529,12 @@ void tlcs870_device::do_INC_inHL(const uint8_t opbyte0) void tlcs870_device::do_LD_A_inx(const uint8_t opbyte0) { - // LD A,(x) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD A, (x) 0010 0010 xxxx xxxx 1 Z - - 3 + */ + m_cycles = 3; + const uint16_t srcaddr = READ8(); const uint8_t val = RM8(srcaddr); @@ -452,7 +548,12 @@ void tlcs870_device::do_LD_A_inx(const uint8_t opbyte0) void tlcs870_device::do_LD_A_inHL(const uint8_t opbyte0) { - // LD A,(HL) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD A, (HL) 0010 0011 1 Z - - 2 + */ + m_cycles = 2; + const uint16_t srcaddr = get_reg16(REG_HL); const uint8_t val = RM8(srcaddr); @@ -466,7 +567,12 @@ void tlcs870_device::do_LD_A_inHL(const uint8_t opbyte0) void tlcs870_device::do_LD_inx_iny(const uint8_t opbyte0) { - // LD (x),(y) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x), (y) 0010 0110 yyyy yyyy xxxx xxxx 1 Z - - 5 + */ + m_cycles = 5; + const uint16_t srcaddr = READ8(); const uint16_t dstaddr = READ8(); @@ -482,7 +588,12 @@ void tlcs870_device::do_LD_inx_iny(const uint8_t opbyte0) void tlcs870_device::do_DEC_inx(const uint8_t opbyte0) { - // DEC (x) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DEC (x) 0010 1000 xxxx xxxx C Z - - 5 + */ + m_cycles = 5; + const uint16_t addr = READ8(); uint8_t temp = RM8(addr); @@ -511,7 +622,12 @@ void tlcs870_device::do_DEC_inx(const uint8_t opbyte0) void tlcs870_device::do_DEC_inHL(const uint8_t opbyte0) { - // DEC (HL) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DEC (HL) 0010 1001 C Z - - 4 + */ + m_cycles = 4; + const uint16_t addr = get_reg16(REG_HL); uint8_t temp = RM8(addr); @@ -540,7 +656,12 @@ void tlcs870_device::do_DEC_inHL(const uint8_t opbyte0) void tlcs870_device::do_LD_inx_A(const uint8_t opbyte0) { - // LD (x),A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x), A 0010 1010 xxxx xxxx 1 - - - 3 + */ + m_cycles = 3; + const uint16_t dstaddr = READ8(); const uint8_t val = get_reg8(REG_A); @@ -554,7 +675,12 @@ void tlcs870_device::do_LD_inx_A(const uint8_t opbyte0) void tlcs870_device::do_LD_inHL_A(const uint8_t opbyte0) { - // LD (HL),A + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (HL), A 0010 1011 1 - - - 2 + */ + m_cycles = 2; + const uint8_t val = get_reg8(REG_A); set_JF(); @@ -565,7 +691,12 @@ void tlcs870_device::do_LD_inHL_A(const uint8_t opbyte0) void tlcs870_device::do_LD_inx_n(const uint8_t opbyte0) { - // LD (x),n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x), n 0010 1100 xxxx xxxx nnnn nnnn 1 - - - 4 + */ + m_cycles = 4; + const uint16_t dstaddr = READ8(); const uint8_t val = READ8(); @@ -576,7 +707,12 @@ void tlcs870_device::do_LD_inx_n(const uint8_t opbyte0) void tlcs870_device::do_LD_inHL_n(const uint8_t opbyte0) { - // LD (HL),n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (HL), n 0010 1101 nnnn nnnn 1 - - - 3 + */ + m_cycles = 3; + const uint8_t val = READ8(); const uint16_t addr = get_reg16(REG_HL); @@ -587,7 +723,12 @@ void tlcs870_device::do_LD_inHL_n(const uint8_t opbyte0) void tlcs870_device::do_CLR_inx(const uint8_t opbyte0) { - // CLR (x) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CLR (x) 0010 1110 xxxx xxxx 1 - - - 4 + */ + m_cycles = 4; + const uint16_t addr = READ8(); WM8(addr, 0); @@ -597,7 +738,12 @@ void tlcs870_device::do_CLR_inx(const uint8_t opbyte0) void tlcs870_device::do_CLR_inHL(const uint8_t opbyte0) { - // CLR (HL) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CLR (HL) 0010 1111 1 - - - 2 + */ + m_cycles = 2; + const uint16_t addr = get_reg16(REG_HL); WM8(addr, 0); @@ -606,7 +752,12 @@ void tlcs870_device::do_CLR_inHL(const uint8_t opbyte0) void tlcs870_device::do_LD_r_n(const uint8_t opbyte0) { - // LD r,n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD r,n 0011 0rrr nnnn nnnn 1 - - - 2 + */ + m_cycles = 2; + const uint8_t param1 = opbyte0 & 7; const uint8_t param2 = READ8(); @@ -617,10 +768,14 @@ void tlcs870_device::do_LD_r_n(const uint8_t opbyte0) void tlcs870_device::do_SET_inxbit(const uint8_t opbyte0) { - // SET (x).b - // 0100 0bbb xxxx xxxx + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SET (x).b 0100 0bbb xxxx xxxx Z * - - 5 + + (opbyte0 == 0x40) && (opval == 0x3a) is EI + */ + m_cycles = 5; - // (opbyte0 == 0x40) && (opval == 0x3a) is EI const uint8_t srcaddr = READ8(); uint8_t val = RM8(srcaddr); @@ -646,10 +801,14 @@ void tlcs870_device::do_SET_inxbit(const uint8_t opbyte0) void tlcs870_device::do_CLR_inxbit(const uint8_t opbyte0) { - // CLR (x).b - // 0100 1bbb xxxx xxxx + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CLR (x).b 0100 1bbb xxxx xxxx Z * - - 5 + + (opbyte0 == 0x48) && (opval == 0x3a) is DI + */ + m_cycles = 5; - // (opbyte0 == 0x48) && (opval == 0x3a) is DI const uint8_t srcaddr = READ8(); uint8_t val = RM8(srcaddr); @@ -675,8 +834,12 @@ void tlcs870_device::do_CLR_inxbit(const uint8_t opbyte0) void tlcs870_device::do_LD_A_r(const uint8_t opbyte0) { - // LD A,r - // 0101 0rrr + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD A, r 0101 0rrr 1 Z - - 1 + */ + m_cycles = 1; + const uint8_t val = get_reg8(opbyte0 & 0x7); set_reg8(REG_A, val); @@ -688,8 +851,12 @@ void tlcs870_device::do_LD_A_r(const uint8_t opbyte0) void tlcs870_device::do_LD_r_A(const uint8_t opbyte0) { - // LD r,A - // 0101 1rrr + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD r, A 0101 1rrr 1 Z - - 1 + */ + m_cycles = 1; + const uint8_t val = get_reg8(REG_A); set_reg8(opbyte0 & 0x7, val); @@ -701,7 +868,12 @@ void tlcs870_device::do_LD_r_A(const uint8_t opbyte0) void tlcs870_device::do_INC_r(const uint8_t opbyte0) { - // INC r + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + INC r 0110 0rrr C Z - - 1 + */ + m_cycles = 1; + const int reg = opbyte0 & 7; uint8_t temp = get_reg8(reg); temp++; @@ -722,7 +894,12 @@ void tlcs870_device::do_INC_r(const uint8_t opbyte0) void tlcs870_device::do_DEC_r(const uint8_t opbyte0) { - // DEC r + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DEC r 0110 1rrr C Z - - 1 + */ + m_cycles = 1; + const int reg = opbyte0 & 7; uint8_t temp = get_reg8(reg); temp--; @@ -750,16 +927,22 @@ void tlcs870_device::do_DEC_r(const uint8_t opbyte0) void tlcs870_device::do_JRS_T_a(const uint8_t opbyte0) { - // JRS T,a - const int param1 = 6; + /* + Jump Relative Short, if True + + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + JRS T, a 100d dddd 1 - - - 4 (2 if not taken) + */ + m_cycles = 2; int val = opbyte0 & 0x1f; if (val & 0x10) val -= 0x20; - const bool takejump = check_jump_condition(param1); + const bool takejump = check_jump_condition(COND_T); if (takejump) { + m_cycles += 2; m_addr = m_tmppc + 2 + val; set_JF(); } @@ -767,16 +950,22 @@ void tlcs870_device::do_JRS_T_a(const uint8_t opbyte0) void tlcs870_device::do_JRS_F_a(const uint8_t opbyte0) { - // JRS F,a - const int param1 = 7; + /* + Jump Relative Short, if False + + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + JRS F, a 101d dddd 1 - - - 4 (2 if not taken) + */ + m_cycles = 2; int val = opbyte0 & 0x1f; if (val & 0x10) val -= 0x20; - const bool takejump = check_jump_condition(param1); + const bool takejump = check_jump_condition(COND_F); if (takejump) { + m_cycles += 2; m_addr = m_tmppc + 2 + val; set_JF(); } @@ -784,7 +973,14 @@ void tlcs870_device::do_JRS_F_a(const uint8_t opbyte0) void tlcs870_device::do_CALLV_n(const uint8_t opbyte0) { - // CALLV n + /* + Call Vector + + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CALLV n 1100 nnnn - - - - 7 + */ + m_cycles = 7; + const uint16_t addr = 0xffc0 + ((opbyte0 & 0xf) * 2); WM16(m_sp.d - 1, m_addr); @@ -795,7 +991,19 @@ void tlcs870_device::do_CALLV_n(const uint8_t opbyte0) void tlcs870_device::do_JR_cc_a(const uint8_t opbyte0) { - // JR cc,a + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + JR T, a 1101 0110 dddd dddd 1 - - - 4 (2 if not taken) + JR F, a 1101 0111 dddd dddd 1 - - - 4 (2 if not taken) + JR EQ, a (Z, a) 1101 0000 dddd dddd 1 - - - 4 (2 if not taken) + JR NE, a (NZ, a) 1101 0001 dddd dddd 1 - - - 4 (2 if not taken) + JR CS, a (LT, a) 1101 0010 dddd dddd 1 - - - 4 (2 if not taken) + JR CC, a (GE, a) 1101 0011 dddd dddd 1 - - - 4 (2 if not taken) + JR LE, a 1101 0100 dddd dddd 1 - - - 4 (2 if not taken) + JR GT, a 1101 0101 dddd dddd 1 - - - 4 (2 if not taken) + */ + m_cycles = 2; + const int param1 = opbyte0 & 0x7; int val = READ8(); @@ -805,6 +1013,7 @@ void tlcs870_device::do_JR_cc_a(const uint8_t opbyte0) if (takejump) { + m_cycles += 2; m_addr = m_tmppc + 2 + val; set_JF(); } @@ -812,14 +1021,21 @@ void tlcs870_device::do_JR_cc_a(const uint8_t opbyte0) void tlcs870_device::do_LD_CF_inxbit(const uint8_t opbyte0) { - // LD CF, (x).b aka TEST (x).b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD CF, (x).b 1101 1bbb xxxx xxxx ~C - * - 4 + + aka TEST (x).b + */ + m_cycles = 4; + const uint16_t srcaddr = READ8(); const uint8_t val = RM8(srcaddr); const uint8_t bitpos = opbyte0 & 0x7; const int bitused = (1 << bitpos); - uint8_t bit = val & bitused; + const uint8_t bit = val & bitused; bit ? set_CF() : clear_CF(); // for this optype of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag @@ -828,8 +1044,12 @@ void tlcs870_device::do_LD_CF_inxbit(const uint8_t opbyte0) void tlcs870_device::do_LD_SP_mn(const uint8_t opbyte0) { - // LD SP,mn - // Flags / Cycles 1--- / 3 + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD SP ,mn 1111 1010 nnnn nnnn mmmm mmmm 1 - - - 3 + */ + m_cycles = 3; + const uint16_t param = READ16(); m_sp.d = param; set_JF(); @@ -837,7 +1057,12 @@ void tlcs870_device::do_LD_SP_mn(const uint8_t opbyte0) void tlcs870_device::do_JR_a(const uint8_t opbyte0) { - // JR a + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + JR a 1111 1011 dddd dddd 1 - - - 4 + */ + m_cycles = 4; + int val = READ8(); if (val & 0x80) val -= 0x100; @@ -848,7 +1073,12 @@ void tlcs870_device::do_JR_a(const uint8_t opbyte0) void tlcs870_device::do_CALL_mn(const uint8_t opbyte0) { - // CALL mn + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CALL mn 1111 1100 nnnn nnnn mmmm mmmm - - - - 6 + */ + m_cycles = 6; + const uint16_t addr = READ16(); WM16(m_sp.d - 1, m_addr); @@ -859,7 +1089,12 @@ void tlcs870_device::do_CALL_mn(const uint8_t opbyte0) void tlcs870_device::do_CALLP_n(const uint8_t opbyte0) { - // CALLP n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CALLP n 1111 1101 nnnn nnnn - - - - 6 + */ + m_cycles = 6; + const uint16_t addr = READ8() + 0xff00; WM16(m_sp.d - 1, m_addr); @@ -870,7 +1105,12 @@ void tlcs870_device::do_CALLP_n(const uint8_t opbyte0) void tlcs870_device::do_JP_mn(const uint8_t opbyte0) { - // JP mn + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + JP mn 1111 1110 nnnn nnnn mmmm mmmm 1 - - - 4 + */ + m_cycles = 4; + const int param2 = READ16(); m_addr = param2; set_JF(); @@ -878,7 +1118,12 @@ void tlcs870_device::do_JP_mn(const uint8_t opbyte0) void tlcs870_device::do_ff_opcode(const uint8_t opbyte0) { - // SWI + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SWI 1111 1111 - - - - 9 (1 if already in NMI) + */ + m_cycles = 9; // TODO: 1 if in NMI (acts as NOP?) + handle_take_interrupt(0x0e); } @@ -888,9 +1133,18 @@ void tlcs870_device::do_ff_opcode(const uint8_t opbyte0) void tlcs870_device::do_ALUOP_A_n(const uint8_t opbyte0) { - // (ALU OP) A,n - // 0111 0000 nnnn nnnn ADDC A,n - // 0111 0001 nnnn nnnn ADD A,n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC A, n 0111 0000 nnnn nnnn C Z C H 2 + ADD A, n 0111 0001 nnnn nnnn C Z C H 2 + SUBB A, n 0111 0010 nnnn nnnn C Z C H 2 + SUB A, n 0111 0011 nnnn nnnn C Z C H 2 + AND A, n 0111 0100 nnnn nnnn Z Z - - 2 + XOR A, n 0111 0101 nnnn nnnn Z Z - - 2 + OR A, n 0111 0110 nnnn nnnn Z Z - - 2 + CMP A, n 0111 0111 nnnn nnnn Z Z C H 2 + */ + m_cycles = 2; const int aluop = (opbyte0 & 0x7); const uint8_t val = READ8(); @@ -905,9 +1159,18 @@ void tlcs870_device::do_ALUOP_A_n(const uint8_t opbyte0) void tlcs870_device::do_ALUOP_A_inx(const uint8_t opbyte0) { - // (ALU OP) A,(x) - // 0111 1000 nnnn nnnn ADDC A,(x) - // 0111 1001 nnnn nnnn ADD A,(x) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC A, (x) 0111 1000 xxxx xxxx C Z C H 4 + ADD A, (x) 0111 1001 xxxx xxxx C Z C H 4 + SUBB A, (x) 0111 1010 xxxx xxxx C Z C H 4 + SUB A, (x) 0111 1011 xxxx xxxx C Z C H 4 + AND A, (x) 0111 1100 xxxx xxxx Z Z - - 4 + XOR A, (x) 0111 1101 xxxx xxxx Z Z - - 4 + OR A, (x) 0111 1110 xxxx xxxx Z Z - - 4 + CMP A, (x) 0111 1111 xxxx xxxx Z Z C H 4 + */ + m_cycles = 4; const int aluop = (opbyte0 & 0x7); const uint16_t addr = READ8(); @@ -927,7 +1190,12 @@ void tlcs870_device::do_ALUOP_A_inx(const uint8_t opbyte0) void tlcs870_device::do_LDW_inx_mn(const uint8_t opbyte0) { - // LDW (x),mn + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LDW (x), mn 0010 0100 xxxx xxxx nnnn nnnn mmmm mmmm 1 - - - 6 + */ + m_cycles = 6; + const uint16_t dstaddr = READ8(); const uint16_t val = READ16(); @@ -939,8 +1207,12 @@ void tlcs870_device::do_LDW_inx_mn(const uint8_t opbyte0) void tlcs870_device::do_LDW_inHL_mn(const uint8_t opbyte0) { - // LDW (HL),mn - // m_op = LDW; + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LDW (HL), mn 0010 0101 nnnn nnnn mmmm mmmm 1 - - - 5 + */ + m_cycles = 5; + const uint16_t dstaddr = get_reg16(REG_HL); const uint16_t val = READ16(); diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp index 6eee0ff72bc..3f5a77d0217 100644 --- a/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp +++ b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp @@ -13,8 +13,9 @@ F2 (DE) F3 (HL) F4 (HL+d) - F5 invalid (would be (HL+) based on the src table, check for undefined behavior?) - F6 (-HL) + F5 invalid (would be (HL+C) based on the src table, check for undefined behavior?) + F6 (HL+) + F7 (-HL) note, in cases where the address is an immediate value, not a register (x) and (HL+d) the immediate value is directly after the first byte of the opcode @@ -28,47 +29,31 @@ // Main dispatch handlers for these -void tlcs870_device::do_f0_opcode(const uint8_t opbyte0) -{ - // 1111 0000 xxxx xxxx 0101 0rrr - // destination memory prefix (dst) - const uint16_t dstaddr = get_addr((opbyte0 & 0x7), READ8()); - do_f0_to_f7_opcode(opbyte0, dstaddr); -} - -void tlcs870_device::do_f2_to_f3_opcode(const uint8_t opbyte0) -{ - // 0xf2: 1111 001p 0101 0rrr - // 0xf3: 1111 001p 0101 0rrr - // destination memory prefix (dst) - const uint16_t dstaddr = get_addr((opbyte0 & 0x7), 0); - do_f0_to_f7_opcode(opbyte0, dstaddr); -} - - -void tlcs870_device::do_f4_opcode(const uint8_t opbyte0) +// f0 - f7 use this table +// note, the manual shows both src/dst opcodes in the same table as there's no overlap, but they're not compatible +void tlcs870_device::do_dstprefixtype_opcode(const uint8_t opbyte0) { - // 0xf4: 1111 0100 dddd dddd 0101 0rrr - // destination memory prefix (dst) - const uint16_t dstaddr = get_addr((opbyte0 & 0x7), READ8()); - do_f0_to_f7_opcode(opbyte0, dstaddr); -} + m_cycles = get_base_srcdst_cycles(opbyte0 & 0x7); // set base number of cycles based on dst prefix mode -void tlcs870_device::do_f6_to_f7_opcode(const uint8_t opbyte0) -{ - // 0xf6: 1110 0110 0101 0rrr - // 0xf7: 1111 0111 0101 0rrr - // destination memory prefix (dst) - const uint16_t dstaddr = get_addr((opbyte0 & 0x7), 0); - do_f0_to_f7_opcode(opbyte0, dstaddr); -} + uint16_t dstaddr; + // (x) and (HL+d) require an immediate value + if ((opbyte0 == 0xf0) || (opbyte0 == 0xf4)) + { + dstaddr = get_addr((opbyte0 & 0x7), READ8()); + } + else + { + dstaddr = get_addr((opbyte0 & 0x7), 0); + } -// f0 - f7 use this table -// note, same table is shown as above in manual, there's no overlap between src/dest, but they're not compatible -void tlcs870_device::do_f0_to_f7_opcode(const uint8_t opbyte0, const uint16_t dstaddr) -{ const uint8_t opbyte1 = READ8(); + // these are illegal prefixes for dst, undefined behavior at least + if ((opbyte0 == 0xf1) || (opbyte0 == 0xf5)) + { + do_f0_to_f7_oprand_illegal_opcode(opbyte0, opbyte1, dstaddr); + } + switch (opbyte1) { case 0x10: case 0x11: case 0x12: case 0x13: @@ -82,6 +67,12 @@ void tlcs870_device::do_f0_to_f7_opcode(const uint8_t opbyte0, const uint16_t ds } } +void tlcs870_device::do_f0_to_f7_oprand_illegal_opcode(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr) +{ + m_cycles += 1; + logerror("illegal dst prefix opcode %02x %02x (dst addr %04x)\n", opbyte0, opbyte1, dstaddr); +} + // Actual handlers /**********************************************************************************************************************/ @@ -90,8 +81,22 @@ void tlcs870_device::do_f0_to_f7_opcode(const uint8_t opbyte0, const uint16_t ds void tlcs870_device::do_LD_indst_rr(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr) { - // LD (dst),rr - // (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ? + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x), rr 1111 0000 xxxx xxxx 0001 00rr 1 - - - 5 + LD (PC+A), rr invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? + LD (DE), rr 1111 0010 0001 00rr 1 - - - 4 + LD (HL), rr 1111 0011 0001 00rr 1 - - - 4 + LD (HL+d), rr 1111 0100 dddd dddd 0001 00rr 1 - - - 6 + LD (HL+C), rr invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? + LD (HL+), rr not listed, invalid due to 16-bit op? ? ? ? ? ? + LD (-HL), rr not listed, invalid due to 16-bit op? ? ? ? ? ? + + aka LD (dst),rr + (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ? + */ + m_cycles += 4; + const uint16_t val = get_reg16(opbyte1 & 0x3); WM16(dstaddr, val); @@ -104,8 +109,22 @@ void tlcs870_device::do_LD_indst_rr(const uint8_t opbyte0, const uint8_t opbyte1 void tlcs870_device::do_LD_indst_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr) { - // LD (dst),n - // (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings? + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x), n not listed, redundant encoding? ? ? ? ? ? + LD (PC+A), n invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? + LD (DE), n 1111 0010 0010 1100 nnnn nnnn 1 - - - 4 + LD (HL), n not listed, redundant encoding? ? ? ? ? ? + LD (HL+d), n 1111 0100 dddd dddd 0010 1100 nnnn nnnn 1 - - - 6 + LD (HL+C), n invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? + LD (HL+), n 1111 0110 0010 1100 nnnn nnnn 1 - - - 5 + LD (-HL), n 1111 0111 0010 1100 nnnn nnnn 1 - - - 5 + + aka (dst),n + (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings? + */ + m_cycles += 4; + const uint16_t n = READ8(); WM8(dstaddr, n); @@ -114,14 +133,23 @@ void tlcs870_device::do_LD_indst_n(const uint8_t opbyte0, const uint8_t opbyte1, void tlcs870_device::do_LD_indst_r(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr) { - // LD (dst),r + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x), r 1111 0000 xxxx xxxx 0101 1rrr 1 - - - 4 + LD (PC+A), r invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? + LD (DE), r 1111 0010 0101 1rrr 1 - - - 3 + LD (HL), r 1111 0011 0101 1rrr 1 - - - 3 + LD (HL+d), r 1111 0100 dddd dddd 0101 1rrr 1 - - - 5 + LD (HL+C), r invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? + LD (HL+), r 1111 0110 0101 0rrr 1 - - - 4 (invalid if r is H or L) + LD (-HL), r 1111 0111 0101 0rrr 1 - - - 4 + + aka LD (dst),r + */ + m_cycles += 3; + const uint8_t reg = get_reg8(opbyte1 & 0x7); WM8(dstaddr, reg); set_JF(); } - -void tlcs870_device::do_f0_to_f7_oprand_illegal_opcode(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t dstaddr) -{ - logerror("illegal dst prefix opcode %02x %02x (dst addr %04x)\n", opbyte0, opbyte1, dstaddr); -} diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp index e9073bc4c49..4bcc361c51d 100644 --- a/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp +++ b/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp @@ -97,11 +97,11 @@ void tlcs870_device::do_regprefixtype_opcode(const uint8_t opbyte0) case 0x8a: case 0x8b: do_CLR_inppbit(opbyte0, opbyte1); break; case 0x92: case 0x93: - do_CPL_inppbit(opbyte0, opbyte1); break; + do_CPL_inpp_indirectbit(opbyte0, opbyte1); break; case 0x9a: case 0x9b: - do_LD_inppbit_CF(opbyte0, opbyte1); break; + do_LD_inpp_indirectbit_CF(opbyte0, opbyte1); break; case 0x9e: case 0x9f: - do_LD_CF_inppbit(opbyte0, opbyte1); break; + do_LD_CF_inpp_indirectbit(opbyte0, opbyte1); break; case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf: do_XCH_r_g(opbyte0, opbyte1); break; case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: @@ -134,6 +134,7 @@ void tlcs870_device::do_regprefixtype_opcode(const uint8_t opbyte0) void tlcs870_device::do_regprefixtype_oprand_illegal(const uint8_t opbyte0, const uint8_t opbyte1) { + m_cycles = 1; logerror("illegal reg prefix opcode %02x %02x\n", opbyte0, opbyte1); } @@ -143,8 +144,13 @@ void tlcs870_device::do_RETN(const uint8_t opbyte0, const uint8_t opbyte1) // with E8 only if (opbyte0 == 0xe8) { - // RETN - // Return from non-maskable interrupt service (how does this differ from RETI?) + /* + Return from non-maskable interrupt service (how does this differ from RETI?) + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + RETN 1110 1000 0000 0100 * * * * 7 + */ + m_cycles = 7; + m_sp.d += 3; m_addr = RM16(m_sp.d - 2); set_PSW(RM8(m_sp.d - 1)); @@ -161,15 +167,24 @@ void tlcs870_device::do_RETN(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_SWAP_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // SWAP g + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SWAP g 1110 1ggg 0000 0001 1 - - - 4 + */ + m_cycles = 4; + const uint8_t reg = opbyte0 & 0x7; handle_swap(reg); } void tlcs870_device::do_DAA_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // DAA g - // 1110 1ggg 0000 1010 + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DAS g 1110 1ggg 0000 1010 C Z C H 3 + */ + m_cycles = 3; + uint8_t val = get_reg8(opbyte0 & 0x7); val = handle_DAA(val); @@ -180,8 +195,12 @@ void tlcs870_device::do_DAA_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_DAS_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // DAS g - // 1110 1ggg 0000 1011 + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DAS g 1110 1ggg 0000 1011 C Z C H 3 + */ + m_cycles = 3; + uint8_t val = get_reg8(opbyte0 & 0x7); val = handle_DAS(val); @@ -192,8 +211,13 @@ void tlcs870_device::do_DAS_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_SHLC_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // SHLC g - // Logical Shift Left with Carry Flag + /* + Logical Shift Left with Carry Flag + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SHLC g 1110 1ggg 0001 1100 C Z * - 2 + */ + m_cycles = 2; + uint8_t val = get_reg8(opbyte0 & 0x7); val = handle_SHLC(val); @@ -203,8 +227,12 @@ void tlcs870_device::do_SHLC_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_SHRC_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // SHRC g - // Logical Shift Right with Carry Flag + /* + Logical Shift Right with Carry Flag + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SHRC g 1110 1ggg 0001 1101 C Z * - 2 + */ + m_cycles = 2; uint8_t val = get_reg8(opbyte0 & 0x7); @@ -215,8 +243,13 @@ void tlcs870_device::do_SHRC_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_ROLC_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // ROLC g - // Rotate Left through Carry flag + /* + Rotate Left through Carry flag + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ROLC g 1110 1ggg 0001 1110 C Z * - 2 + */ + m_cycles = 2; + uint8_t val = get_reg8(opbyte0 & 0x7); val = handle_ROLC(val); @@ -227,8 +260,13 @@ void tlcs870_device::do_ROLC_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_RORC_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // RORC g - // Rotate Right through Carry flag + /* + Rotate Right through Carry flag + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + RORC g 1110 1ggg 0001 1111 C Z * - 2 + */ + m_cycles = 2; + uint8_t val = get_reg8(opbyte0 & 0x7); val = handle_RORC(val); @@ -239,8 +277,12 @@ void tlcs870_device::do_RORC_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_LD_r_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD r,g - // 1110 1ggg 0101 1rrr + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD r, g 1110 1ggg 0101 1rrr 1 Z - - 2 + */ + m_cycles = 2; + const uint8_t val = get_reg8(opbyte0 & 0x7); set_reg8(opbyte1 & 0x7, val); @@ -252,8 +294,12 @@ void tlcs870_device::do_LD_r_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_XCH_r_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // XCH r,g - // 1110 1ggg 1010 1rrr + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + XCG r, g 1110 1ggg 1010 1rrr 1 Z - - 3 + */ + m_cycles = 3; + const uint8_t val = get_reg8(opbyte0 & 0x7); const uint8_t r = get_reg8(opbyte1 & 0x7); @@ -272,17 +318,18 @@ void tlcs870_device::do_XCH_r_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_ALUOP_A_g(const uint8_t opbyte0, const uint8_t opbyte1) { - // (ALU OP) A,g /* - 1110 1ggg 0110 0000 ADDC A,g - 1110 1ggg 0110 0001 ADD A,g - 1110 1ggg 0110 0010 SUBB A,g - 1110 1ggg 0110 0011 SUB A,g - 1110 1ggg 0110 0100 AND A,g - 1110 1ggg 0110 0101 XOR A,g - 1110 1ggg 0110 0110 OR A,g - 1110 1ggg 0110 0111 CMP A,g + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC A, g 1110 1ggg 0110 0000 C Z C H 2 + ADD A, g 1110 1ggg 0110 0001 C Z C H 2 + SUBB A, g 1110 1ggg 0110 0010 C Z C H 2 + SUB A, g 1110 1ggg 0110 0011 C Z C H 2 + AND A, g 1110 1ggg 0110 0100 Z Z - - 2 + XOR A, g 1110 1ggg 0110 0101 Z Z - - 2 + OR A, g 1110 1ggg 0110 0110 Z Z - - 2 + CMP A, g 1110 1ggg 0110 0111 Z Z C H 2 */ + m_cycles = 2; const int aluop = (opbyte1 & 0x7); @@ -296,17 +343,18 @@ void tlcs870_device::do_ALUOP_A_g(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_ALUOP_g_A(const uint8_t opbyte0, const uint8_t opbyte1) { - // (ALU OP) g,A /* - 1110 1ggg 0110 1000 ADDC A,g - 1110 1ggg 0110 1001 ADD A,g - 1110 1ggg 0110 1010 SUBB A,g - 1110 1ggg 0110 1011 SUB A,g - 1110 1ggg 0110 1100 AND A,g - 1110 1ggg 0110 1101 XOR A,g - 1110 1ggg 0110 1110 OR A,g - 1110 1ggg 0110 1111 CMP A,g + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC g, A 1110 1ggg 0110 1000 C Z C H 3 + ADD g, A 1110 1ggg 0110 1001 C Z C H 3 + SUBB g, A 1110 1ggg 0110 1010 C Z C H 3 + SUB g, A 1110 1ggg 0110 1011 C Z C H 3 + AND g, A 1110 1ggg 0110 1100 Z Z - - 3 + XOR g, A 1110 1ggg 0110 1101 Z Z - - 3 + OR g, A 1110 1ggg 0110 1110 Z Z - - 3 + CMP g, A 1110 1ggg 0110 1111 Z Z C H 3 */ + m_cycles = 3; const int aluop = (opbyte1 & 0x7); const uint8_t result = do_alu(aluop, get_reg8(opbyte0 & 0x7), get_reg8(REG_A)); @@ -319,7 +367,19 @@ void tlcs870_device::do_ALUOP_g_A(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_ALUOP_g_n(const uint8_t opbyte0, const uint8_t opbyte1) { - // (ALU OP) g,n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC g, n 1110 1ggg 0111 0000 nnnn nnnn C Z C H 3 + ADD g, n 1110 1ggg 0111 0001 nnnn nnnn C Z C H 3 + SUBB g, n 1110 1ggg 0111 0010 nnnn nnnn C Z C H 3 + SUB g, n 1110 1ggg 0111 0011 nnnn nnnn C Z C H 3 + AND g, n 1110 1ggg 0111 0100 nnnn nnnn Z Z - - 3 + XOR g, n 1110 1ggg 0111 0101 nnnn nnnn Z Z - - 3 + OR g, n 1110 1ggg 0111 0110 nnnn nnnn Z Z - - 3 + CMP g, n 1110 1ggg 0111 0111 nnnn nnnn Z Z C H 3 + */ + m_cycles = 3; + const int aluop = (opbyte1 & 0x7); const uint8_t n = READ8(); @@ -338,17 +398,18 @@ void tlcs870_device::do_ALUOP_g_n(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_ALUOP_WA_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // (ALU OP) WA,gg /* - 1110 10gg 0011 0000 ADDC WA,gg - 1110 10gg 0011 0001 ADD WA,gg - 1110 10gg 0011 0010 SUBB WA,gg - 1110 10gg 0011 0011 SUB WA,gg - 1110 10gg 0011 0100 AND WA,gg - 1110 10gg 0011 0101 XOR WA,gg - 1110 10gg 0011 0110 OR WA,gg - 1110 10gg 0011 0111 CMP WA,gg + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC WA, gg 1110 10gg 0011 0000 C Z C U 4 + ADD WA, gg 1110 10gg 0011 0001 C Z C U 4 + SUBB WA, gg 1110 10gg 0011 0010 C Z C U 4 + SUB WA, gg 1110 10gg 0011 0011 C Z C U 4 + AND WA, gg 1110 10gg 0011 0100 Z Z - - 4 + XOR WA, gg 1110 10gg 0011 0101 Z Z - - 4 + OR WA, gg 1110 10gg 0011 0110 Z Z - - 4 + CMP WA, gg 1110 10gg 0011 0111 Z Z C U 4 */ + m_cycles = 4; const int aluop = (opbyte1 & 0x7); @@ -363,7 +424,19 @@ void tlcs870_device::do_ALUOP_WA_gg(const uint8_t opbyte0, const uint8_t opbyte1 void tlcs870_device::do_ALUOP_gg_mn(const uint8_t opbyte0, const uint8_t opbyte1) { - // (ALU OP) gg,mn + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC gg, mn 1110 10gg 0011 1000 nnnn nnnn mmmm mmmm C Z C U 4 + ADD gg, mn 1110 10gg 0011 1001 nnnn nnnn mmmm mmmm C Z C U 4 + SUBB gg, mn 1110 10gg 0011 1010 nnnn nnnn mmmm mmmm C Z C U 4 + SUB gg, mn 1110 10gg 0011 1011 nnnn nnnn mmmm mmmm C Z C U 4 + AND gg, mn 1110 10gg 0011 1100 nnnn nnnn mmmm mmmm Z Z - - 4 + XOR gg, mn 1110 10gg 0011 1101 nnnn nnnn mmmm mmmm Z Z - - 4 + OR gg, mn 1110 10gg 0011 1110 nnnn nnnn mmmm mmmm Z Z - - 4 + CMP gg, mn 1110 10gg 0011 1111 nnnn nnnn mmmm mmmm Z Z C U 4 + */ + m_cycles = 4; + const int aluop = (opbyte1 & 0x7); const uint16_t mn = READ16(); @@ -384,8 +457,14 @@ void tlcs870_device::do_ALUOP_gg_mn(const uint8_t opbyte0, const uint8_t opbyte1 void tlcs870_device::do_SET_inppbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // SET (pp).g - const uint8_t bitpos = opbyte0 & 7; + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SET (DE).g 1110 1ggg 1000 0010 Z * - - 5 + SET (HL).g 1110 1ggg 1000 0011 Z * - - 5 + */ + m_cycles = 5; + + const uint8_t bitpos = get_reg8(opbyte0 & 7) & 0x7; const uint8_t bitused = 1 << bitpos; const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL uint8_t val = RM8(addr); @@ -408,8 +487,14 @@ void tlcs870_device::do_SET_inppbit(const uint8_t opbyte0, const uint8_t opbyte1 void tlcs870_device::do_CLR_inppbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // CLR (pp).g - const uint8_t bitpos = opbyte0 & 7; + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CLR (DE).g 1110 1ggg 1000 1010 Z * - - 5 + CLR (HL).g 1110 1ggg 1000 1011 Z * - - 5 + */ + m_cycles = 5; + + const uint8_t bitpos = get_reg8(opbyte0 & 7) & 0x7; const uint8_t bitused = 1 << bitpos; const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL uint8_t val = RM8(addr); @@ -430,10 +515,16 @@ void tlcs870_device::do_CLR_inppbit(const uint8_t opbyte0, const uint8_t opbyte1 WM8(addr, val); } -void tlcs870_device::do_CPL_inppbit(const uint8_t opbyte0, const uint8_t opbyte1) +void tlcs870_device::do_CPL_inpp_indirectbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // CPL (pp).g - const uint8_t bitpos = opbyte0 & 7; + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CPL (DE).g 1110 1ggg 1001 0010 Z * - - 5 + CPL (HL).g 1110 1ggg 1001 0011 Z * - - 5 + */ + m_cycles = 5; + + const uint8_t bitpos = get_reg8(opbyte0 & 7) & 0x7; const uint8_t bitused = 1 << bitpos; const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL uint8_t val = RM8(addr); @@ -458,10 +549,16 @@ void tlcs870_device::do_CPL_inppbit(const uint8_t opbyte0, const uint8_t opbyte1 WM8(addr, val); } -void tlcs870_device::do_LD_inppbit_CF(const uint8_t opbyte0, const uint8_t opbyte1) +void tlcs870_device::do_LD_inpp_indirectbit_CF(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD (pp).g,CF - const uint8_t bitpos = opbyte0 & 7; + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (DE).g, CF 1110 1ggg 1001 1010 1 - - - 5 + LD (HL).g, CF 1110 1ggg 1001 1011 1 - - - 5 + */ + m_cycles = 5; + + const uint8_t bitpos = get_reg8(opbyte0 & 7) & 0x7; const uint8_t bitused = 1 << bitpos; const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL uint8_t val = RM8(addr); @@ -482,11 +579,18 @@ void tlcs870_device::do_LD_inppbit_CF(const uint8_t opbyte0, const uint8_t opbyt } -void tlcs870_device::do_LD_CF_inppbit(const uint8_t opbyte0, const uint8_t opbyte1) +void tlcs870_device::do_LD_CF_inpp_indirectbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD CF,(pp).g aka TEST (pp).g - // 1110 1ggg 1001 111p - const uint8_t bitpos = opbyte0 & 7; + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD CF, (DE).g 1110 1ggg 1001 1110 ~C - * - 4 + LD CF, (HL).g 1110 1ggg 1001 1111 ~C - * - 4 + + aka aka TEST (pp).g + */ + m_cycles = 4; + + const uint8_t bitpos = get_reg8(opbyte0 & 7) & 0x7; const uint8_t bitused = 1 << bitpos; const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL const uint8_t val = RM8(addr); @@ -502,8 +606,12 @@ void tlcs870_device::do_LD_CF_inppbit(const uint8_t opbyte0, const uint8_t opbyt void tlcs870_device::do_SET_gbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // SET g.b - // 1110 1ggg 0100 0bbb + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SET g.b 1110 1ggg 0100 0bbb Z * - - 3 + */ + m_cycles = 3; + uint8_t val = get_reg8(opbyte0 & 0x7); const uint8_t bitpos = opbyte1 & 0x7; @@ -527,8 +635,12 @@ void tlcs870_device::do_SET_gbit(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_CLR_gbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // CLR g.b - // 1110 1ggg 0100 1bbb + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CLR g.b 1110 1ggg 0100 1bbb Z * - - 3 + */ + m_cycles = 3; + uint8_t val = get_reg8(opbyte0 & 0x7); const uint8_t bitpos = opbyte1 & 0x7; @@ -552,8 +664,12 @@ void tlcs870_device::do_CLR_gbit(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_CPL_gbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // CPL g.b - // 1110 1ggg 1100 0bbb + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CPL g.b 1110 1ggg 1100 0bbb Z * - - 3 + */ + m_cycles = 3; + uint8_t val = get_reg8(opbyte0 & 0x7); const uint8_t bitpos = opbyte1 & 0x7; @@ -581,9 +697,12 @@ void tlcs870_device::do_CPL_gbit(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_LD_gbit_CF(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD g.b,CF - // m_op = LD; // Flags / Cycles 1--- / 2 - //m_flagsaffected |= FLAG_J; + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD g.b, CF 1110 1ggg 1100 1bbb 1 - - - 2 + */ + m_cycles = 2; + uint8_t val = get_reg8(opbyte0 & 0x7); const uint8_t bitpos = opbyte1 & 0x7; @@ -607,7 +726,12 @@ void tlcs870_device::do_LD_gbit_CF(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_XOR_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // XOR CF,g.b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + XOR CF, g.b 1110 1ggg 1101 0bbb ~C - * - 2 + */ + m_cycles = 2; + const uint8_t bitpos = opbyte1 & 0x7; const uint8_t bitused = 1 << bitpos; @@ -648,7 +772,14 @@ void tlcs870_device::do_XOR_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1 void tlcs870_device::do_LD_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD CF,g.b aka TEST g.b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD CF, g.b 1110 1ggg 1101 1bbb ~C - * - 2 + + aka TEST g.b + */ + m_cycles = 2; + const uint8_t bitpos = opbyte1 & 0x7; const uint8_t bitused = 1 << bitpos; @@ -667,23 +798,44 @@ void tlcs870_device::do_LD_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_MUL_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // MUL ggH, ggL (odd syntax, basically MUL gg) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + MUL W, A not listed (redundant encoding?) ? ? ? ? ? + MUL B, C 1110 1010 0000 0010 Z Z - - 8 + MUL D, E 1110 1010 0000 0010 Z Z - - 8 + MUL H, L 1110 1011 0000 0010 Z Z - - 8 + + aka MUL ggH, ggL (odd syntax, basically MUL gg) + */ + m_cycles = 8; + const uint8_t reg = opbyte0 & 0x3; // opbyte0 & 4 = invalid? handle_mul(reg); // flag changes in handler } void tlcs870_device::do_DIV_gg_C(const uint8_t opbyte0, const uint8_t opbyte1) { - // DIV gg,C - // (DIV BC,C is presumably an illegal / undefined result) - // (DIV WA,C is a redundant encoding) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DIV WA, C not listed (redundant encoding?) ? ? ? ? ? + DIV BC, C not listed (illegal?) ? ? ? ? ? + DIV DE, C 1110 1010 0000 0011 Z Z C - 8 + DIV HL, C 1110 1011 0000 0011 Z Z C - 8 + */ + m_cycles = 8; + const uint8_t reg = opbyte0 & 0x3; // opbyte0 & 4 = invalid? handle_div(reg); // flag changes in handler } void tlcs870_device::do_POP_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // POP gg + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + POP gg 1110 10gg 0000 0110 - - - - 5 + */ + m_cycles = 5; + m_sp.d += 2; const uint16_t val = RM16(m_sp.d - 1); set_reg16(opbyte0 & 3, val); @@ -692,7 +844,12 @@ void tlcs870_device::do_POP_gg(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_PUSH_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // PUSH gg + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + PUSH gg 1110 10gg 0000 0111 - - - - 4 + */ + m_cycles = 4; + const uint16_t val = get_reg16(opbyte0 & 3); WM16(m_sp.d - 1, val); m_sp.d -= 2; @@ -702,21 +859,36 @@ void tlcs870_device::do_PUSH_gg(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_LD_SP_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD SP,gg + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD SP, gg 1110 10gg 1111 1010 1 - - - 3 + */ + m_cycles = 3; + m_sp.d = get_reg16(opbyte0 & 0x3); set_JF(); // no other flag changes for this type of LD } void tlcs870_device::do_LD_gg_SP(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD gg,SP + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD gg, SP 1110 10gg 1111 1011 1 - - - 3 + */ + m_cycles = 3; + set_reg16(opbyte0 & 0x3, m_sp.d); set_JF(); // no other flag changes for this type of LD } void tlcs870_device::do_LD_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // LD rr,gg + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD rr, gg 1110 10gg 0001 00rr 1 - - - 2 + */ + m_cycles = 2; + const uint16_t gg = get_reg16(opbyte0 & 0x3); set_reg16(opbyte1 & 0x3, gg); @@ -726,20 +898,30 @@ void tlcs870_device::do_LD_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_XCH_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // XCH rr,gg + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + XCH rr, gg 1110 10gg 0001 01rr 1 - - - 3 + */ + m_cycles = 3; + const uint16_t gg = get_reg16(opbyte0 & 0x3); const uint16_t rr = get_reg16(opbyte1 & 0x3); set_reg16(opbyte1 & 0x3, gg); set_reg16(opbyte0 & 0x3, rr); - // flags not done + set_JF(); } void tlcs870_device::do_CALL_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // CALL gg + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CALL gg 1110 10gg 1111 1100 - - - - 6 + */ + m_cycles = 6; + const uint16_t val = get_reg16(opbyte0 & 3); WM16(m_sp.d - 1, m_addr); @@ -752,7 +934,12 @@ void tlcs870_device::do_CALL_gg(const uint8_t opbyte0, const uint8_t opbyte1) void tlcs870_device::do_JP_gg(const uint8_t opbyte0, const uint8_t opbyte1) { - // JP gg + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + JP gg 1110 10gg 1111 1110 1 - - - 3 + */ + m_cycles = 3; + const uint16_t val = get_reg16(opbyte0 & 3); m_addr = val; diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp index afb1c0c9ac0..22c718a2078 100644 --- a/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp +++ b/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp @@ -29,33 +29,18 @@ // Main dispatch handlers for these -void tlcs870_device::do_e0_opcode(const uint8_t opbyte0) -{ - const uint16_t srcaddr = get_addr((opbyte0 & 0x7), READ8()); - do_e0_to_e7_opcode(opbyte0, srcaddr); -} - -void tlcs870_device::do_e1_to_e3_opcode(const uint8_t opbyte0) -{ - const uint16_t srcaddr = get_addr((opbyte0 & 0x7), 0); - do_e0_to_e7_opcode(opbyte0, srcaddr); -} - -void tlcs870_device::do_e4_opcode(const uint8_t opbyte0) +// e0 - e7 use this table +void tlcs870_device::do_srcprefixtype_opcode(const uint8_t opbyte0) { - const uint16_t srcaddr = get_addr((opbyte0 & 0x7), READ8()); - do_e0_to_e7_opcode(opbyte0, srcaddr); -} + m_cycles = get_base_srcdst_cycles(opbyte0 & 0x7); // set base number of cycles based on src prefix mode -void tlcs870_device::do_e5_to_e7_opcode(const uint8_t opbyte0) -{ - const uint16_t srcaddr = get_addr((opbyte0 & 0x7), 0); - do_e0_to_e7_opcode(opbyte0, srcaddr); -} + uint16_t srcaddr; + // (x) and (HL+d) require an immediate value + if ((opbyte0 == 0xe0) || (opbyte0 == 0xe4)) + srcaddr = get_addr((opbyte0 & 0x7), READ8()); + else + srcaddr = get_addr((opbyte0 & 0x7), 0); -// e0 - e7 use this table -void tlcs870_device::do_e0_to_e7_opcode(uint8_t opbyte0, uint16_t srcaddr) -{ const uint8_t opbyte1 = READ8(); switch (opbyte1) @@ -112,6 +97,7 @@ void tlcs870_device::do_e0_to_e7_opcode(uint8_t opbyte0, uint16_t srcaddr) void tlcs870_device::do_e0_to_e7_oprand_illegal(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { + m_cycles += 1; logerror("illegal src prefix opcode %02x %02x (src addr %04x)\n", opbyte0, opbyte1, srcaddr); } @@ -121,7 +107,21 @@ void tlcs870_device::do_e0_to_e7_oprand_illegal(const uint8_t opbyte0, const uin void tlcs870_device::do_LD_rr_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // LD rr, (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD rr, (x) 1110 0000 xxxx xxxx 0001 01rr 1 - - - 5 + LD rr, (PC+A) 1110 0001 0001 01rr 1 - - - 6 + LD rr, (DE) 1110 0010 0001 01rr 1 - - - 4 + LD rr, (HL) 1110 0011 0001 01rr 1 - - - 4 + LD rr, (HL+d) 1110 0100 dddd dddd 0001 01rr 1 - - - 6 + LD rr, (HL+C) 1110 0101 0001 01rr 1 - - - 6 + LD rr, (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ? + LD rr, (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ? + + aka LD rr, (src) + */ + m_cycles += 4; + const uint16_t val = RM16(srcaddr); set_reg16(opbyte1 & 0x3, val); set_JF(); @@ -133,7 +133,21 @@ void tlcs870_device::do_LD_rr_insrc(const uint8_t opbyte0, const uint8_t opbyte1 void tlcs870_device::do_INC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // INC (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + INC (x) not listed, redundant encoding? ? ? ? ? ? + INC (PC+A) 1110 0001 0010 0000 C Z - - 6 + INC (DE) 1110 0010 0010 0000 C Z - - 4 + INC (HL) not listed, redundant encoding? ? ? ? ? ? + INC (HL+d) 1110 0100 dddd dddd 0010 0000 C Z - - 6 + INC (HL+C) 1110 0101 0010 0000 C Z - - 6 + INC (HL+) 1110 0110 0010 0000 C Z - - 5 + INC (-HL) 1110 0111 0010 0000 C Z - - 5 + + aka INC (src) + */ + m_cycles += 4; + uint8_t val = RM8(srcaddr); val++; @@ -153,7 +167,21 @@ void tlcs870_device::do_INC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, void tlcs870_device::do_DEC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // DEC (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + DEC (x) not listed, redundant encoding? ? ? ? ? ? + DEC (PC+A) 1110 0001 0010 1000 C Z - - 6 + DEC (DE) 1110 0010 0010 1000 C Z - - 4 + DEC (HL) not listed, redundant encoding? ? ? ? ? ? + DEC (HL+d) 1110 0100 dddd dddd 0010 1000 C Z - - 6 + DEC (HL+C) 1110 0101 0010 1000 C Z - - 6 + DEC (HL+) 1110 0110 0010 1000 C Z - - 5 + DEC (-HL) 1110 0111 0010 1000 C Z - - 5 + + aka DEC (src) + */ + m_cycles += 4; + uint8_t val = RM8(srcaddr); val--; @@ -173,7 +201,7 @@ void tlcs870_device::do_DEC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, } else { - set_ZF(); + clear_ZF(); } WM8(srcaddr, val); @@ -181,8 +209,22 @@ void tlcs870_device::do_DEC_insrc(const uint8_t opbyte0, const uint8_t opbyte1, void tlcs870_device::do_ROLD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // ROLD A,(src) - // 12-bit left rotation using lower 4 bits of REG_A and content of (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ROLD A, (x) 1110 0000 xxxx xxxx 0000 1000 1 0 0 0 8 + ROLD A, (PC+A) not listed, invalid? ? ? ? ? ? + ROLD A, (DE) 1110 0010 0000 1000 1 0 0 0 7 + ROLD A, (HL) 1110 0011 0000 1000 1 0 0 0 7 + ROLD A, (HL+d) 1110 0100 dddd dddd 0000 1000 1 0 0 0 9 + ROLD A, (HL+C) 1110 0101 0000 1000 1 0 0 0 9 + ROLD A, (HL+) 1110 0110 0000 1000 1 0 0 0 8 + ROLD A, (-HL) 1110 0111 0000 1000 1 0 0 0 8 + + aka ROLD A,(src) + 12-bit left rotation using lower 4 bits of REG_A and content of (src) + */ + m_cycles += 7; + const uint8_t val = RM8(srcaddr); const uint8_t reg = get_reg8(REG_A); @@ -193,13 +235,27 @@ void tlcs870_device::do_ROLD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte set_reg8(REG_A, tempa); WM8(srcaddr, tempval); - // TODO: flags + set_JF(); } void tlcs870_device::do_RORD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // RORD A,(src) - // 12-bit right rotation using lower 4 bits of REG_A and content of (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + RORD A, (x) 1110 0000 xxxx xxxx 0000 1001 1 0 0 0 8 + RORD A, (PC+A) not listed, invalid? ? ? ? ? ? + RORD A, (DE) 1110 0010 0000 1001 1 0 0 0 7 + RORD A, (HL) 1110 0011 0000 1001 1 0 0 0 7 + RORD A, (HL+d) 1110 0100 dddd dddd 0000 1001 1 0 0 0 9 + RORD A, (HL+C) 1110 0101 0000 1001 1 0 0 0 9 + RORD A, (HL+) 1110 0110 0000 1001 1 0 0 0 8 + RORD A, (-HL) 1110 0111 0000 1001 1 0 0 0 8 + + aka RORD A,(src) + 12-bit right rotation using lower 4 bits of REG_A and content of (src) + */ + m_cycles += 7; + const uint8_t val = RM8(srcaddr); const uint8_t reg = get_reg8(REG_A); @@ -210,15 +266,28 @@ void tlcs870_device::do_RORD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte set_reg8(REG_A, tempa); WM8(srcaddr, tempval); - // TODO: flags + set_JF(); } void tlcs870_device::do_LD_inx_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // LD (x),(src) - // invalid if (src) is also (x) ? (not specified) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x), (x) not listed, invalid? or redundant? ? ? ? ? ? + LD (x), (PC+A) 1110 0001 0010 0110 xxxx xxxx 1 U - - 7 + LD (x), (DE) 1110 0010 0010 0110 xxxx xxxx 1 U - - 5 + LD (x), (HL) 1110 0011 0010 0110 xxxx xxxx 1 U - - 5 + LD (x), (HL+d) 1110 0100 dddd dddd 0010 0110 xxxx xxxx 1 U - - 7 + LD (x), (HL+C) 1110 0101 0010 0110 xxxx xxxx 1 U - - 7 + LD (x), (HL+) not listed, invalid? ? ? ? ? ? + LD (x), (-HL) not listed, invalid? ? ? ? ? ? + + aka LD (x),(src) + */ + m_cycles += 5; + const uint16_t x = READ8(); // get address x const uint8_t val = RM8(srcaddr); WM8(x, val); @@ -229,11 +298,23 @@ void tlcs870_device::do_LD_inx_insrc(const uint8_t opbyte0, const uint8_t opbyte void tlcs870_device::do_LD_inHL_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // LD (HL),(src) - const uint8_t val = RM8(srcaddr); + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (HL), (x) 1110 0000 xxxx xxxx 0010 0111 1 Z - - 5 + LD (HL), (PC+A) 1110 0001 0010 0111 1 Z - - 6 + LD (HL), (DE) 1110 0010 0010 0111 1 Z - - 4 + LD (HL), (HL) 1110 0011 0010 0111 1 Z - - 4 + LD (HL), (HL+d) 1110 0100 dddd dddd 0010 0111 1 Z - - 6 + LD (HL), (HL+C) 1110 0101 0010 0111 1 Z - - 6 + LD (HL), (HL+) not listed, invalid? ? ? ? ? ? + LD (HL), (-HL) not listed, invalid? ? ? ? ? ? + + aka LD (HL),(src) + */ + m_cycles += 4; + const uint8_t val = RM8(srcaddr); const uint16_t dstaddr = get_reg16(REG_HL); - WM8(dstaddr, val); set_JF(); @@ -244,7 +325,21 @@ void tlcs870_device::do_LD_inHL_insrc(const uint8_t opbyte0, const uint8_t opbyt void tlcs870_device::do_LD_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // LD r, (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD r, (x) 1110 0000 xxxx xxxx 0101 1rrr 1 Z - - 4 + LD r, (PC+A) 1110 0001 0101 1rrr 1 Z - - 5 + LD r, (DE) 1110 0010 0101 1rrr 1 Z - - 3 + LD r, (HL) 1110 0011 0101 1rrr 1 Z - - 3 + LD r, (HL+d) 1110 0100 dddd dddd 0101 1rrr 1 Z - - 5 + LD r, (HL+C) 1110 0101 0101 1rrr 1 Z - - 5 + LD r, (HL+) 1110 0110 0101 1rrr 1 Z - - 4 (invalid if r is H or L) + LD r, (-HL) 1110 0111 0101 1rrr 1 Z - - 4 + + aka LD r, (src) + */ + m_cycles += 3; + const uint8_t val = RM8(srcaddr); set_reg8(opbyte1 & 0x7, val); @@ -257,7 +352,21 @@ void tlcs870_device::do_LD_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1, void tlcs870_device::do_MCMP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // MCMP (src), n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + MCMP (x), n 1110 0000 xxxx xxxx 0010 1111 nnnn nnnn Z Z C H 6 + MCMP (PC+A), n 1110 0001 0010 1111 nnnn nnnn Z Z C H 7 + MCMP (DE), n 1110 0010 0010 1111 nnnn nnnn Z Z C H 5 + MCMP (HL), n 1110 0011 0010 1111 nnnn nnnn Z Z C H 5 + MCMP (HL+d), n 1110 0100 dddd dddd 0010 1111 nnnn nnnn Z Z C H 7 + MCMP (HL+C), n 1110 0101 0010 1111 nnnn nnnn Z Z C H 7 + MCMP (HL+), n 1110 0110 0010 1111 nnnn nnnn Z Z C H 6 + MCMP (-HL), n 1110 0111 0010 1111 nnnn nnnn Z Z C H 6 + + aka MCMP (src), n + */ + m_cycles += 5; + const uint8_t n = READ8(); const uint8_t val = RM8(srcaddr); @@ -292,7 +401,21 @@ void tlcs870_device::do_MCMP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte void tlcs870_device::do_XCH_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // XCH r,(src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + XCH r, (x) 1110 0000 xxxx xxxx 1010 1rrr 1 Z - - 5 + XCH r, (PC+A) 1110 0001 1010 1rrr 1 Z - - 6 + XCH r, (DE) 1110 0010 1010 1rrr 1 Z - - 4 + XCH r, (HL) 1110 0011 1010 1rrr 1 Z - - 4 + XCH r, (HL+d) 1110 0100 dddd dddd 1010 1rrr 1 Z - - 6 + XCH r, (HL+C) 1110 0101 1010 1rrr 1 Z - - 6 + XCH r, (HL+) 1110 0110 1010 1rrr 1 Z - - 5 (invalid if r is H or L) + XCH r, (-HL) 1110 0111 1010 1rrr 1 Z - - 5 + + aka XCH r,(src) + */ + m_cycles += 4; + const uint8_t val = RM8(srcaddr); const uint8_t temp = get_reg8(opbyte1 & 0x7); @@ -318,7 +441,84 @@ void tlcs870_device::do_XCH_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1 void tlcs870_device::do_ALUOP_insrc_inHL(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // (ALU OP) (src), (HL) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC (x), (HL) 1110 0000 xxxx xxxx 0110 0000 C Z C H 7 + ADDC (PC+A), (HL) 1110 0001 0110 0000 C Z C H 8 + ADDC (DE), (HL) 1110 0010 0110 0000 C Z C H 6 + ADDC (HL), (HL) 1110 0011 0110 0000 C Z C H 6 + ADDC (HL+d), (HL) 1110 0100 dddd dddd 0110 0000 C Z C H 8 + ADDC (HL+C), (HL) 1110 0101 0110 0000 C Z C H 8 + ADDC (HL+), (HL) not listed, invalid? ? ? ? ? ? + ADDC (-HL), (HL) not listed, invalid? ? ? ? ? ? + + ADD (x), (HL) 1110 0000 xxxx xxxx 0110 0001 C Z C H 7 + ADD (PC+A), (HL) 1110 0001 0110 0001 C Z C H 8 + ADD (DE), (HL) 1110 0010 0110 0001 C Z C H 6 + ADD (HL), (HL) 1110 0011 0110 0001 C Z C H 6 + ADD (HL+d), (HL) 1110 0100 dddd dddd 0110 0001 C Z C H 8 + ADD (HL+C), (HL) 1110 0101 0110 0001 C Z C H 8 + ADD (HL+), (HL) not listed, invalid? ? ? ? ? ? + ADD (-HL), (HL) not listed, invalid? ? ? ? ? ? + + SUBB (x), (HL) 1110 0000 xxxx xxxx 0110 0010 C Z C H 7 + SUBB (PC+A), (HL) 1110 0001 0110 0010 C Z C H 8 + SUBB (DE), (HL) 1110 0010 0110 0010 C Z C H 6 + SUBB (HL), (HL) 1110 0011 0110 0010 C Z C H 6 + SUBB (HL+d), (HL) 1110 0100 dddd dddd 0110 0010 C Z C H 8 + SUBB (HL+C), (HL) 1110 0101 0110 0010 C Z C H 8 + SUBB (HL+), (HL) not listed, invalid? ? ? ? ? ? + SUBB (-HL), (HL) not listed, invalid? ? ? ? ? ? + + SUB (x), (HL) 1110 0000 xxxx xxxx 0110 0011 C Z C H 7 + SUB (PC+A), (HL) 1110 0001 0110 0011 C Z C H 8 + SUB (DE), (HL) 1110 0010 0110 0011 C Z C H 6 + SUB (HL), (HL) 1110 0011 0110 0011 C Z C H 6 + SUB (HL+d), (HL) 1110 0100 dddd dddd 0110 0011 C Z C H 8 + SUB (HL+C), (HL) 1110 0101 0110 0011 C Z C H 8 + SUB (HL+), (HL) not listed, invalid? ? ? ? ? ? + SUB (-HL), (HL) not listed, invalid? ? ? ? ? ? + + AND (x), (HL) 1110 0000 xxxx xxxx 0110 0100 Z Z - - 7 + AND (PC+A), (HL) 1110 0001 0110 0100 Z Z - - 8 + AND (DE), (HL) 1110 0010 0110 0100 Z Z - - 6 + AND (HL), (HL) 1110 0011 0110 0100 Z Z - - 6 + AND (HL+d), (HL) 1110 0100 dddd dddd 0110 0100 Z Z - - 8 + AND (HL+C), (HL) 1110 0101 0110 0100 Z Z - - 8 + AND (HL+), (HL) not listed, invalid? ? ? ? ? ? + AND (-HL), (HL) not listed, invalid? ? ? ? ? ? + + XOR (x), (HL) 1110 0000 xxxx xxxx 0110 0101 Z Z - - 7 + XOR (PC+A), (HL) 1110 0001 0110 0101 Z Z - - 8 + XOR (DE), (HL) 1110 0010 0110 0101 Z Z - - 6 + XOR (HL), (HL) 1110 0011 0110 0101 Z Z - - 6 + XOR (HL+d), (HL) 1110 0100 dddd dddd 0110 0101 Z Z - - 8 + XOR (HL+C), (HL) 1110 0101 0110 0101 Z Z - - 8 + XOR (HL+), (HL) not listed, invalid? ? ? ? ? ? + XOR (-HL), (HL) not listed, invalid? ? ? ? ? ? + + OR (x), (HL) 1110 0000 xxxx xxxx 0110 0110 Z Z - - 7 + OR (PC+A), (HL) 1110 0001 0110 0110 Z Z - - 8 + OR (DE), (HL) 1110 0010 0110 0110 Z Z - - 6 + OR (HL), (HL) 1110 0011 0110 0110 Z Z - - 6 + OR (HL+d), (HL) 1110 0100 dddd dddd 0110 0110 Z Z - - 8 + OR (HL+C), (HL) 1110 0101 0110 0110 Z Z - - 8 + OR (HL+), (HL) not listed, invalid? ? ? ? ? ? + OR (-HL), (HL) not listed, invalid? ? ? ? ? ? + + CMP (x), (HL) 1110 0000 xxxx xxxx 0110 0111 Z Z C H 6 + CMP (PC+A), (HL) 1110 0001 0110 0111 Z Z C H 7 + CMP (DE), (HL) 1110 0010 0110 0111 Z Z C H 5 + CMP (HL), (HL) 1110 0011 0110 0111 Z Z C H 5 + CMP (HL+d), (HL) 1110 0100 dddd dddd 0110 0111 Z Z C H 7 + CMP (HL+C), (HL) 1110 0101 0110 0111 Z Z C H 7 + CMP (HL+), (HL) not listed, invalid? ? ? ? ? ? + CMP (-HL), (HL) not listed, invalid? ? ? ? ? ? + + aka (ALU OP) (src), (HL) + */ + m_cycles += 6; + const int aluop = (opbyte1 & 0x7); const uint8_t val = RM8(srcaddr); @@ -328,13 +528,91 @@ void tlcs870_device::do_ALUOP_insrc_inHL(const uint8_t opbyte0, const uint8_t op if (aluop != 0x07) // CMP doesn't write back { + m_cycles -= 1; // one less for CMP here? WM8(srcaddr, result); } } void tlcs870_device::do_ALUOP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // (ALU OP) (src), n + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC (x), n 1110 0000 xxxx xxxx 0111 0000 nnnn nnnn C Z C H 6 + ADDC (PC+A), n 1110 0001 0111 0000 nnnn nnnn C Z C H 7 + ADDC (DE), n 1110 0010 0111 0000 nnnn nnnn C Z C H 5 + ADDC (HL), n 1110 0011 0111 0000 nnnn nnnn C Z C H 5 + ADDC (HL+d), n 1110 0100 dddd dddd 0111 0000 nnnn nnnn C Z C H 7 + ADDC (HL+C), n 1110 0101 0111 0000 nnnn nnnn C Z C H 7 + ADDC (HL+), n 1110 0110 0111 0000 nnnn nnnn C Z C H 6 + ADDC (-HL), n 1110 0111 0111 0000 nnnn nnnn C Z C H 6 + + ADD (x), n 1110 0000 xxxx xxxx 0111 0001 nnnn nnnn C Z C H 6 + ADD (PC+A), n 1110 0001 0111 0001 nnnn nnnn C Z C H 7 + ADD (DE), n 1110 0010 0111 0001 nnnn nnnn C Z C H 5 + ADD (HL), n 1110 0011 0111 0001 nnnn nnnn C Z C H 5 + ADD (HL+d), n 1110 0100 dddd dddd 0111 0001 nnnn nnnn C Z C H 7 + ADD (HL+C), n 1110 0101 0111 0001 nnnn nnnn C Z C H 7 + ADD (HL+), n 1110 0110 0111 0001 nnnn nnnn C Z C H 6 + ADD (-HL), n 1110 0111 0111 0001 nnnn nnnn C Z C H 6 + + SUBB (x), n 1110 0000 xxxx xxxx 0111 0010 nnnn nnnn C Z C H 6 + SUBB (PC+A), n 1110 0001 0111 0010 nnnn nnnn C Z C H 7 + SUBB (DE), n 1110 0010 0111 0010 nnnn nnnn C Z C H 5 + SUBB (HL), n 1110 0011 0111 0010 nnnn nnnn C Z C H 5 + SUBB (HL+d), n 1110 0100 dddd dddd 0111 0010 nnnn nnnn C Z C H 7 + SUBB (HL+C), n 1110 0101 0111 0010 nnnn nnnn C Z C H 7 + SUBB (HL+), n 1110 0110 0111 0010 nnnn nnnn C Z C H 6 + SUBB (-HL), n 1110 0111 0111 0010 nnnn nnnn C Z C H 6 + + SUB (x), n 1110 0000 xxxx xxxx 0111 0011 nnnn nnnn C Z C H 6 + SUB (PC+A), n 1110 0001 0111 0011 nnnn nnnn C Z C H 7 + SUB (DE), n 1110 0010 0111 0011 nnnn nnnn C Z C H 5 + SUB (HL), n 1110 0011 0111 0011 nnnn nnnn C Z C H 5 + SUB (HL+d), n 1110 0100 dddd dddd 0111 0011 nnnn nnnn C Z C H 7 + SUB (HL+C), n 1110 0101 0111 0011 nnnn nnnn C Z C H 7 + SUB (HL+), n 1110 0110 0111 0011 nnnn nnnn C Z C H 6 + SUB (-HL), n 1110 0111 0111 0011 nnnn nnnn C Z C H 6 + + AND (x), n 1110 0000 xxxx xxxx 0111 0100 nnnn nnnn Z Z - - 6 + AND (PC+A), n 1110 0001 0111 0100 nnnn nnnn Z Z - - 7 + AND (DE), n 1110 0010 0111 0100 nnnn nnnn Z Z - - 5 + AND (HL), n 1110 0011 0111 0100 nnnn nnnn Z Z - - 5 + AND (HL+d), n 1110 0100 dddd dddd 0111 0100 nnnn nnnn Z Z - - 7 + AND (HL+C), n 1110 0101 0111 0100 nnnn nnnn Z Z - - 7 + AND (HL+), n 1110 0110 0111 0100 nnnn nnnn Z Z - - 6 + AND (-HL), n 1110 0111 0111 0100 nnnn nnnn Z Z - - 6 + + XOR (x), n 1110 0000 xxxx xxxx 0111 0101 nnnn nnnn Z Z - - 6 + XOR (PC+A), n 1110 0001 0111 0101 nnnn nnnn Z Z - - 7 + XOR (DE), n 1110 0010 0111 0101 nnnn nnnn Z Z - - 5 + XOR (HL), n 1110 0011 0111 0101 nnnn nnnn Z Z - - 5 + XOR (HL+d), n 1110 0100 dddd dddd 0111 0101 nnnn nnnn Z Z - - 7 + XOR (HL+C), n 1110 0101 0111 0101 nnnn nnnn Z Z - - 7 + XOR (HL+), n 1110 0110 0111 0101 nnnn nnnn Z Z - - 6 + XOR (-HL), n 1110 0111 0111 0101 nnnn nnnn Z Z - - 6 + + OR (x), n 1110 0000 xxxx xxxx 0111 0110 nnnn nnnn Z Z - - 6 + OR (PC+A), n 1110 0001 0111 0110 nnnn nnnn Z Z - - 7 + OR (DE), n 1110 0010 0111 0110 nnnn nnnn Z Z - - 5 + OR (HL), n 1110 0011 0111 0110 nnnn nnnn Z Z - - 5 + OR (HL+d), n 1110 0100 dddd dddd 0111 0110 nnnn nnnn Z Z - - 7 + OR (HL+C), n 1110 0101 0111 0110 nnnn nnnn Z Z - - 7 + OR (HL+), n 1110 0110 0111 0110 nnnn nnnn Z Z - - 6 + OR (-HL), n 1110 0111 0111 0110 nnnn nnnn Z Z - - 6 + + CMP (x), n 1110 0000 xxxx xxxx 0111 0111 nnnn nnnn Z Z C H 5 + CMP (PC+A), n 1110 0001 0111 0111 nnnn nnnn Z Z C H 6 + CMP (DE), n 1110 0010 0111 0111 nnnn nnnn Z Z C H 4 + CMP (HL), n 1110 0011 0111 0111 nnnn nnnn Z Z C H 4 + CMP (HL+d), n 1110 0100 dddd dddd 0111 0111 nnnn nnnn Z Z C H 6 + CMP (HL+C), n 1110 0101 0111 0111 nnnn nnnn Z Z C H 6 + CMP (HL+), n 1110 0110 0111 0111 nnnn nnnn Z Z C H 5 + CMP (-HL), n 1110 0111 0111 0111 nnnn nnnn Z Z C H 5 + + aka (ALU OP) (src), n + */ + m_cycles += 5; + const uint8_t n = READ8(); const int aluop = (opbyte1 & 0x7); @@ -344,13 +622,91 @@ void tlcs870_device::do_ALUOP_insrc_n(const uint8_t opbyte0, const uint8_t opbyt if (aluop != 0x07) // CMP doesn't write back { + m_cycles -= 1; // one less for CMP here? WM8(srcaddr, result); } } void tlcs870_device::do_ALUOP_A_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // (ALU OP) A, (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + ADDC A, (x) 1110 0000 xxxx xxxx 0111 1000 C Z C H 4 + ADDC A, (PC+A) 1110 0001 0111 1000 C Z C H 5 + ADDC A, (DE) 1110 0010 0111 1000 C Z C H 3 + ADDC A, (HL) 1110 0011 0111 1000 C Z C H 3 + ADDC A, (HL+d) 1110 0100 dddd dddd 0111 1000 C Z C H 5 + ADDC A, (HL+C) 1110 0101 0111 1000 C Z C H 5 + ADDC A, (HL+) 1110 0110 0111 1000 C Z C H 4 + ADDC A, (-HL) 1110 0111 0111 1000 C Z C H 4 + + ADD A, (x) 1110 0000 xxxx xxxx 0111 1001 C Z C H 4 + ADD A, (PC+A) 1110 0001 0111 1001 C Z C H 5 + ADD A, (DE) 1110 0010 0111 1001 C Z C H 3 + ADD A, (HL) 1110 0011 0111 1001 C Z C H 3 + ADD A, (HL+d) 1110 0100 dddd dddd 0111 1001 C Z C H 5 + ADD A, (HL+C) 1110 0101 0111 1001 C Z C H 5 + ADD A, (HL+) 1110 0110 0111 1001 C Z C H 4 + ADD A, (-HL) 1110 0111 0111 1001 C Z C H 4 + + SUBB A, (x) 1110 0000 xxxx xxxx 0111 1010 C Z C H 4 + SUBB A, (PC+A) 1110 0001 0111 1010 C Z C H 5 + SUBB A, (DE) 1110 0010 0111 1010 C Z C H 3 + SUBB A, (HL) 1110 0011 0111 1010 C Z C H 3 + SUBB A, (HL+d) 1110 0100 dddd dddd 0111 1010 C Z C H 5 + SUBB A, (HL+C) 1110 0101 0111 1010 C Z C H 5 + SUBB A, (HL+) 1110 0110 0111 1010 C Z C H 4 + SUBB A, (-HL) 1110 0111 0111 1010 C Z C H 4 + + SUB A, (x) 1110 0000 xxxx xxxx 0111 1011 C Z C H 4 + SUB A, (PC+A) 1110 0001 0111 1011 C Z C H 5 + SUB A, (DE) 1110 0010 0111 1011 C Z C H 3 + SUB A, (HL) 1110 0011 0111 1011 C Z C H 3 + SUB A, (HL+d) 1110 0100 dddd dddd 0111 1011 C Z C H 5 + SUB A, (HL+C) 1110 0101 0111 1011 C Z C H 5 + SUB A, (HL+) 1110 0110 0111 1011 C Z C H 4 + SUB A, (-HL) 1110 0111 0111 1011 C Z C H 4 + + AND A, (x) 1110 0000 xxxx xxxx 0111 1100 Z Z - - 4 + AND A, (PC+A) 1110 0001 0111 1100 Z Z - - 5 + AND A, (DE) 1110 0010 0111 1100 Z Z - - 3 + AND A, (HL) 1110 0011 0111 1100 Z Z - - 3 + AND A, (HL+d) 1110 0100 dddd dddd 0111 1100 Z Z - - 5 + AND A, (HL+C) 1110 0101 0111 1100 Z Z - - 5 + AND A, (HL+) 1110 0110 0111 1100 Z Z - - 4 + AND A, (-HL) 1110 0111 0111 1100 Z Z - - 4 + + XOR A, (x) 1110 0000 xxxx xxxx 0111 1101 Z Z - - 4 + XOR A, (PC+A) 1110 0001 0111 1101 Z Z - - 5 + XOR A, (DE) 1110 0010 0111 1101 Z Z - - 3 + XOR A, (HL) 1110 0011 0111 1101 Z Z - - 3 + XOR A, (HL+d) 1110 0100 dddd dddd 0111 1101 Z Z - - 5 + XOR A, (HL+C) 1110 0101 0111 1101 Z Z - - 5 + XOR A, (HL+) 1110 0110 0111 1101 Z Z - - 4 + XOR A, (-HL) 1110 0111 0111 1101 Z Z - - 4 + + OR A, (x) 1110 0000 xxxx xxxx 0111 1110 Z Z - - 4 + OR A, (PC+A) 1110 0001 0111 1110 Z Z - - 5 + OR A, (DE) 1110 0010 0111 1110 Z Z - - 3 + OR A, (HL) 1110 0011 0111 1110 Z Z - - 3 + OR A, (HL+d) 1110 0100 dddd dddd 0111 1110 Z Z - - 5 + OR A, (HL+C) 1110 0101 0111 1110 Z Z - - 5 + OR A, (HL+) 1110 0110 0111 1110 Z Z - - 4 + OR A, (-HL) 1110 0111 0111 1110 Z Z - - 4 + + CMP A, (x) 1110 0000 xxxx xxxx 0111 1111 Z Z C H 4 + CMP A, (PC+A) 1110 0001 0111 1111 Z Z C H 5 + CMP A, (DE) 1110 0010 0111 1111 Z Z C H 3 + CMP A, (HL) 1110 0011 0111 1111 Z Z C H 3 + CMP A, (HL+d) 1110 0100 dddd dddd 0111 1111 Z Z C H 5 + CMP A, (HL+C) 1110 0101 0111 1111 Z Z C H 5 + CMP A, (HL+) 1110 0110 0111 1111 Z Z C H 4 + CMP A, (-HL) 1110 0111 0111 1111 Z Z C H 4 + + aka (ALU OP) A, (src) + */ + m_cycles += 3; + const int aluop = (opbyte1 & 0x7); const uint8_t val = RM8(srcaddr); @@ -358,6 +714,7 @@ void tlcs870_device::do_ALUOP_A_insrc(const uint8_t opbyte0, const uint8_t opbyt if (aluop != 0x07) // CMP doesn't write back { + // NOT one less for CMP here? set_reg8(REG_A, result); } } @@ -368,7 +725,21 @@ void tlcs870_device::do_ALUOP_A_insrc(const uint8_t opbyte0, const uint8_t opbyt void tlcs870_device::do_CALL_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // CALL (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CALL (x) 1110 0000 xxxx xxxx 1111 1100 - - - - 9 + CALL (PC+A) 1110 0001 1111 1100 - - - - 10 + CALL (DE) 1110 0010 1111 1100 - - - - 8 + CALL (HL) 1110 0011 1111 1100 - - - - 8 + CALL (HL+d) 1110 0100 dddd dddd 1111 1100 - - - - 10 + CALL (HL+C) 1110 0101 1111 1100 - - - - 10 + CALL (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ? + CALL (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ? + + aka CALL (src) + */ + m_cycles += 8; + const uint16_t val = RM16(srcaddr); WM16(m_sp.d - 1, m_addr); @@ -381,7 +752,21 @@ void tlcs870_device::do_CALL_insrc(const uint8_t opbyte0, const uint8_t opbyte1, void tlcs870_device::do_JP_insrc(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // JP (src) + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + JP (x) 1110 0000 xxxx xxxx 1111 1110 1 - - - 6 + JP (PC+A) 1110 0001 1111 1110 1 - - - 7 + JP (DE) 1110 0010 1111 1110 1 - - - 5 + JP (HL) 1110 0011 1111 1110 1 - - - 5 + JP (HL+d) 1110 0100 dddd dddd 1111 1110 1 - - - 7 + JP (HL+C) 1110 0101 1111 1110 1 - - - 7 + JP (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ? + JP (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ? + + aka JP (src) + */ + m_cycles += 5; + const uint16_t val = RM16(srcaddr); m_addr = val; set_JF(); @@ -393,7 +778,21 @@ void tlcs870_device::do_JP_insrc(const uint8_t opbyte0, const uint8_t opbyte1, c void tlcs870_device::do_XOR_CF_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // XOR CF,(src).b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + XOR CF, (x).b 1110 0000 xxxx xxxx 1101 0bbb ~C - * - 4 + XOR CF, (PC+A).b 1110 0001 1101 0bbb ~C - * - 5 + XOR CF, (DE).b 1110 0010 1101 0bbb ~C - * - 3 + XOR CF, (HL).b 1110 0011 1101 0bbb ~C - * - 3 + XOR CF, (HL+d).b 1110 0100 dddd dddd 1101 0bbb ~C - * - 5 + XOR CF, (HL+C).b 1110 0101 1101 0bbb ~C - * - 5 + XOR CF, (HL+).b 1110 0110 1101 0bbb ~C - * - 4 + XOR CF, (-HL).b 1110 0111 1101 0bbb ~C - * - 4 + + aka XOR CF,(src).b + */ + m_cycles += 3; + const uint8_t val = RM8(srcaddr); const uint8_t bitpos = opbyte1 & 0x7; @@ -434,7 +833,21 @@ void tlcs870_device::do_XOR_CF_insrcbit(const uint8_t opbyte0, const uint8_t opb void tlcs870_device::do_LD_insrcbit_CF(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // LD (src).b,CF + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD (x).b, CF 1110 0000 xxxx xxxx 1100 1bbb 1 - - - 5 + LD (PC+A).b, CF 1110 0001 1100 1bbb 1 - - - 6 + LD (DE).b, CF 1110 0010 1100 1bbb 1 - - - 4 + LD (HL).b, CF 1110 0011 1100 1bbb 1 - - - 4 + LD (HL+d).b, CF 1110 0100 dddd dddd 1100 1bbb 1 - - - 6 + LD (HL+C).b, CF 1110 0101 1100 1bbb 1 - - - 6 + LD (HL+).b, CF 1110 0110 1100 1bbb 1 - - - 5 + LD (-HL).b, CF 1110 0111 1100 1bbb 1 - - - 5 + + aka LD (src).b,CF + */ + m_cycles += 4; + uint8_t val = RM8(srcaddr); const uint8_t bitpos = opbyte1 & 0x7; @@ -457,7 +870,21 @@ void tlcs870_device::do_LD_insrcbit_CF(const uint8_t opbyte0, const uint8_t opby void tlcs870_device::do_CPL_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // CPL (src).b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CPL (x).b 1110 0000 xxxx xxxx 1100 0bbb Z * - - 5 + CPL (PC+A).b 1110 0001 1100 0bbb Z * - - 6 + CPL (DE).b 1110 0010 1100 0bbb Z * - - 4 + CPL (HL).b 1110 0011 1100 0bbb Z * - - 4 + CPL (HL+d).b 1110 0100 dddd dddd 1100 0bbb Z * - - 6 + CPL (HL+C).b 1110 0101 1100 0bbb Z * - - 6 + CPL (HL+).b 1110 0110 1100 0bbb Z * - - 5 + CPL (-HL).b 1110 0111 1100 0bbb Z * - - 5 + + aka CPL (src).b + */ + m_cycles += 4; + uint8_t val = RM8(srcaddr); const uint8_t bitpos = opbyte1 & 0x7; @@ -485,7 +912,21 @@ void tlcs870_device::do_CPL_insrcbit(const uint8_t opbyte0, const uint8_t opbyte void tlcs870_device::do_LD_CF_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // LD CF,(src).b aka TEST (src).b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + LD CF, (x).b 1110 0000 xxxx xxxx 1101 1bbb ~C - * - 4 + LD CF, (PC+A).b 1110 0001 1101 1bbb ~C - * - 5 + LD CF, (DE).b 1110 0010 1101 1bbb ~C - * - 3 + LD CF, (HL).b 1110 0011 1101 1bbb ~C - * - 3 + LD CF, (HL+d).b 1110 0100 dddd dddd 1101 1bbb ~C - * - 5 + LD CF, (HL+C).b 1110 0101 1101 1bbb ~C - * - 5 + LD CF, (HL+).b 1110 0110 1101 1bbb ~C - * - 4 + LD CF, (-HL).b 1110 0111 1101 1bbb ~C - * - 4 + + aka LD CF,(src).b or TEST (src).b + */ + m_cycles += 3; + const uint8_t val = RM8(srcaddr); const uint8_t bitpos = opbyte1 & 0x7; @@ -500,7 +941,21 @@ void tlcs870_device::do_LD_CF_insrcbit(const uint8_t opbyte0, const uint8_t opby void tlcs870_device::do_SET_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // SET (src).b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + SET (x).b 1110 0000 xxxx xxxx 0100 0bbb Z * - - 5 + SET (PC+A).b 1110 0001 0100 0bbb Z * - - 6 + SET (DE).b 1110 0010 0100 0bbb Z * - - 4 + SET (HL).b 1110 0011 0100 0bbb Z * - - 4 + SET (HL+d).b 1110 0100 dddd dddd 0100 0bbb Z * - - 6 + SET (HL+C).b 1110 0101 0100 0bbb Z * - - 6 + SET (HL+).b 1110 0110 0100 0bbb Z * - - 5 + SET (-HL).b 1110 0111 0100 0bbb Z * - - 5 + + aka SET (src).b + */ + m_cycles += 4; + uint8_t val = RM8(srcaddr); const uint8_t bitpos = opbyte1 & 0x7; @@ -524,7 +979,21 @@ void tlcs870_device::do_SET_insrcbit(const uint8_t opbyte0, const uint8_t opbyte void tlcs870_device::do_CLR_insrcbit(const uint8_t opbyte0, const uint8_t opbyte1, const uint16_t srcaddr) { - // CLR (src).b + /* + OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles + CLR (x).b 1110 0000 xxxx xxxx 0100 1bbb Z * - - 5 + CLR (PC+A).b 1110 0001 0100 1bbb Z * - - 6 + CLR (DE).b 1110 0010 0100 1bbb Z * - - 4 + CLR (HL).b 1110 0011 0100 1bbb Z * - - 4 + CLR (HL+d).b 1110 0100 dddd dddd 0100 1bbb Z * - - 6 + CLR (HL+C).b 1110 0101 0100 1bbb Z * - - 6 + CLR (HL+).b 1110 0110 0100 1bbb Z * - - 5 + CLR (-HL).b 1110 0111 0100 1bbb Z * - - 5 + + aka CLR (src).b + */ + m_cycles += 4; + uint8_t val = RM8(srcaddr); const uint8_t bitpos = opbyte1 & 0x7; diff --git a/src/mame/drivers/hng64.cpp b/src/mame/drivers/hng64.cpp index 6c4df6876cc..0ca4a5ea2e2 100644 --- a/src/mame/drivers/hng64.cpp +++ b/src/mame/drivers/hng64.cpp @@ -1532,6 +1532,25 @@ void hng64_state::machine_reset() reset_sound(); } +READ8_MEMBER(hng64_state::ioport0_r) { logerror("ioport0_r\n"); return 0xff; } +READ8_MEMBER(hng64_state::ioport1_r) { logerror("ioport1_r\n"); return 0xff; } +READ8_MEMBER(hng64_state::ioport2_r) { logerror("ioport2_r\n"); return 0xff; } +READ8_MEMBER(hng64_state::ioport3_r) { logerror("ioport3_r\n"); return 0xff; } +READ8_MEMBER(hng64_state::ioport4_r) { logerror("ioport4_r\n"); return 0xff; } +READ8_MEMBER(hng64_state::ioport5_r) { logerror("ioport5_r\n"); return 0xff; } +READ8_MEMBER(hng64_state::ioport6_r) { logerror("ioport6_r\n"); return 0xff; } +READ8_MEMBER(hng64_state::ioport7_r) { logerror("ioport7_r\n"); return 0xff; } + +WRITE8_MEMBER(hng64_state::ioport0_w) { logerror("ioport0_w %02x\n", data); } +WRITE8_MEMBER(hng64_state::ioport1_w) { logerror("ioport1_w %02x\n", data); } +WRITE8_MEMBER(hng64_state::ioport2_w) { logerror("ioport2_w %02x\n", data); } +WRITE8_MEMBER(hng64_state::ioport3_w) { logerror("ioport3_w %02x\n", data); } +WRITE8_MEMBER(hng64_state::ioport4_w) { logerror("ioport4_w %02x\n", data); } +WRITE8_MEMBER(hng64_state::ioport5_w) { logerror("ioport5_w %02x\n", data); } +WRITE8_MEMBER(hng64_state::ioport6_w) { logerror("ioport6_w %02x\n", data); } +WRITE8_MEMBER(hng64_state::ioport7_w) { logerror("ioport7_w %02x\n", data); } + + MACHINE_CONFIG_START(hng64_state::hng64) /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", VR4300BE, HNG64_MASTER_CLOCK) // actually R4300 @@ -1557,7 +1576,23 @@ MACHINE_CONFIG_START(hng64_state::hng64) hng64_audio(config); hng64_network(config); - MCFG_DEVICE_ADD("iomcu", TMP87PH40AN, 8000000) + tmp87ph40an_device &iomcu(TMP87PH40AN(config, m_iomcu, 8_MHz_XTAL)); + iomcu.p0_in_cb().set(FUNC(hng64_state::ioport0_r)); + iomcu.p1_in_cb().set(FUNC(hng64_state::ioport1_r)); + iomcu.p2_in_cb().set(FUNC(hng64_state::ioport2_r)); + iomcu.p3_in_cb().set(FUNC(hng64_state::ioport3_r)); + iomcu.p4_in_cb().set(FUNC(hng64_state::ioport4_r)); + iomcu.p5_in_cb().set(FUNC(hng64_state::ioport5_r)); + iomcu.p6_in_cb().set(FUNC(hng64_state::ioport6_r)); + iomcu.p7_in_cb().set(FUNC(hng64_state::ioport7_r)); + iomcu.p0_out_cb().set(FUNC(hng64_state::ioport0_w)); + iomcu.p1_out_cb().set(FUNC(hng64_state::ioport1_w)); + iomcu.p2_out_cb().set(FUNC(hng64_state::ioport2_w)); + iomcu.p3_out_cb().set(FUNC(hng64_state::ioport3_w)); + iomcu.p4_out_cb().set(FUNC(hng64_state::ioport4_w)); + iomcu.p5_out_cb().set(FUNC(hng64_state::ioport5_w)); + iomcu.p6_out_cb().set(FUNC(hng64_state::ioport6_w)); + iomcu.p7_out_cb().set(FUNC(hng64_state::ioport7_w)); MACHINE_CONFIG_END diff --git a/src/mame/includes/hng64.h b/src/mame/includes/hng64.h index 058b04f8e80..0e8ccfb1df7 100644 --- a/src/mame/includes/hng64.h +++ b/src/mame/includes/hng64.h @@ -143,6 +143,7 @@ public: m_palette(*this, "palette"), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), + m_iomcu(*this, "iomcu"), m_dsp(*this, "l7a1045"), m_comm(*this, "network"), m_rtc(*this, "rtc"), @@ -185,6 +186,7 @@ public: private: required_device m_maincpu; required_device m_audiocpu; + required_device m_iomcu; required_device m_dsp; required_device m_comm; required_device m_rtc; @@ -303,6 +305,24 @@ private: DECLARE_READ8_MEMBER(hng64_comm_mmu_r); DECLARE_WRITE8_MEMBER(hng64_comm_mmu_w); + DECLARE_READ8_MEMBER(ioport0_r); + DECLARE_READ8_MEMBER(ioport1_r); + DECLARE_READ8_MEMBER(ioport2_r); + DECLARE_READ8_MEMBER(ioport3_r); + DECLARE_READ8_MEMBER(ioport4_r); + DECLARE_READ8_MEMBER(ioport5_r); + DECLARE_READ8_MEMBER(ioport6_r); + DECLARE_READ8_MEMBER(ioport7_r); + + DECLARE_WRITE8_MEMBER(ioport0_w); + DECLARE_WRITE8_MEMBER(ioport1_w); + DECLARE_WRITE8_MEMBER(ioport2_w); + DECLARE_WRITE8_MEMBER(ioport3_w); + DECLARE_WRITE8_MEMBER(ioport4_w); + DECLARE_WRITE8_MEMBER(ioport5_w); + DECLARE_WRITE8_MEMBER(ioport6_w); + DECLARE_WRITE8_MEMBER(ioport7_w); + void init_hng64_reorder_gfx(); void set_irq(uint32_t irq_vector); -- cgit v1.2.3