From ea3b4dc307b0467a5c5a3c1035290b3e8fe2b0c2 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Fri, 4 Mar 2022 16:30:38 +0200 Subject: abc1600: Fix hard disk DMA write. [Curt Coder] --- src/mame/drivers/abc1600.cpp | 18 ++++++++++++------ src/mame/includes/abc1600.h | 9 --------- src/mame/machine/abc1600mac.cpp | 33 ++++++++++++++++++++++----------- src/mame/machine/abc1600mac.h | 29 +++++++++++++++++++---------- 4 files changed, 53 insertions(+), 36 deletions(-) diff --git a/src/mame/drivers/abc1600.cpp b/src/mame/drivers/abc1600.cpp index 90d686a82dd..312146da43f 100644 --- a/src/mame/drivers/abc1600.cpp +++ b/src/mame/drivers/abc1600.cpp @@ -869,12 +869,18 @@ void abc1600_state::abc1600(machine_config &config) m_mac->set_addrmap(AS_PROGRAM, &abc1600_state::mac_mem); m_mac->fc_cb().set(m_maincpu, FUNC(m68000_base_device::get_fc)); m_mac->buserr_cb().set(FUNC(abc1600_state::buserr_w)); + m_mac->in_tren0_cb().set(m_bus0i, FUNC(abcbus_slot_device::read_tren)); // TODO bus0x + m_mac->out_tren0_cb().set(m_bus0i, FUNC(abcbus_slot_device::write_tren)); // TODO bus0x + m_mac->in_tren1_cb().set(m_bus1, FUNC(abcbus_slot_device::read_tren)); + m_mac->out_tren1_cb().set(m_bus1, FUNC(abcbus_slot_device::write_tren)); + m_mac->in_tren2_cb().set(m_bus2, FUNC(abcbus_slot_device::read_tren)); + m_mac->out_tren2_cb().set(m_bus2, FUNC(abcbus_slot_device::write_tren)); Z80DMA(config, m_dma0, 64_MHz_XTAL / 16); m_dma0->out_busreq_callback().set(FUNC(abc1600_state::dbrq_w)); m_dma0->out_bao_callback().set(m_dma1, FUNC(z80dma_device::bai_w)); - m_dma0->in_mreq_callback().set(FUNC(abc1600_state::dma0_mreq_r)); - m_dma0->out_mreq_callback().set(FUNC(abc1600_state::dma0_mreq_w)); + m_dma0->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_mreq_r)); + m_dma0->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_mreq_w)); m_dma0->out_ieo_callback().set(m_bus0i, FUNC(abcbus_slot_device::prac_w)).exor(1); //m_dma0->out_ieo_callback().set(m_bus0x, FUNC(abcbus_slot_device::prac_w)).exor(1); m_dma0->in_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_iorq_r)); @@ -883,16 +889,16 @@ void abc1600_state::abc1600(machine_config &config) Z80DMA(config, m_dma1, 64_MHz_XTAL / 16); m_dma1->out_busreq_callback().set(FUNC(abc1600_state::dbrq_w)); m_dma1->out_bao_callback().set(m_dma2, FUNC(z80dma_device::bai_w)); - m_dma1->in_mreq_callback().set(FUNC(abc1600_state::dma1_mreq_r)); - m_dma1->out_mreq_callback().set(FUNC(abc1600_state::dma1_mreq_w)); + m_dma1->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_mreq_r)); + m_dma1->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_mreq_w)); m_dma1->out_ieo_callback().set(m_bus1, FUNC(abcbus_slot_device::prac_w)).exor(1); m_dma1->in_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_iorq_r)); m_dma1->out_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_iorq_w)); Z80DMA(config, m_dma2, 64_MHz_XTAL / 16); m_dma2->out_busreq_callback().set(FUNC(abc1600_state::dbrq_w)); - m_dma2->in_mreq_callback().set(FUNC(abc1600_state::dma2_mreq_r)); - m_dma2->out_mreq_callback().set(FUNC(abc1600_state::dma2_mreq_w)); + m_dma2->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_mreq_r)); + m_dma2->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_mreq_w)); m_dma2->out_ieo_callback().set(m_bus2, FUNC(abcbus_slot_device::prac_w)).exor(1); m_dma2->in_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_iorq_r)); m_dma2->out_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_iorq_w)); diff --git a/src/mame/includes/abc1600.h b/src/mame/includes/abc1600.h index 9422d715d62..fdfd32ac2f8 100644 --- a/src/mame/includes/abc1600.h +++ b/src/mame/includes/abc1600.h @@ -122,15 +122,6 @@ public: void dbrq_w(int state); - uint8_t dma0_mreq_r(offs_t offset) { return m_mac->dma0_mreq_r(offset, m_bus0i->read_tren() & m_bus0x->read_tren()); } - void dma0_mreq_w(offs_t offset, uint8_t data) { m_mac->dma0_mreq_w(offset, data); m_bus0i->write_tren(data); m_bus0x->write_tren(data); } - - uint8_t dma1_mreq_r(offs_t offset) { return m_mac->dma1_mreq_r(offset, m_bus1->read_tren()); } - void dma1_mreq_w(offs_t offset, uint8_t data) { m_mac->dma1_mreq_w(offset, data); m_bus1->write_tren(data); } - - uint8_t dma2_mreq_r(offs_t offset) { return m_mac->dma2_mreq_r(offset, m_bus2->read_tren()); } - void dma2_mreq_w(offs_t offset, uint8_t data) { m_mac->dma2_mreq_w(offset, data); m_bus2->write_tren(data); } - uint8_t cio_pa_r(); uint8_t cio_pb_r(); void cio_pb_w(uint8_t data); diff --git a/src/mame/machine/abc1600mac.cpp b/src/mame/machine/abc1600mac.cpp index 98c1c03bd49..fd604e7d746 100644 --- a/src/mame/machine/abc1600mac.cpp +++ b/src/mame/machine/abc1600mac.cpp @@ -102,6 +102,8 @@ abc1600_mac_device::abc1600_mac_device(const machine_config &mconfig, const char m_watchdog(*this, "watchdog"), m_read_fc(*this), m_write_buserr(*this), + m_read_tren(*this), + m_write_tren(*this), m_boote(0), m_magic(0), m_task(0), @@ -119,6 +121,8 @@ void abc1600_mac_device::device_start() // resolve callbacks m_read_fc.resolve_safe(0); m_write_buserr.resolve_safe(); + m_read_tren.resolve_all_safe(0xff); + m_write_tren.resolve_all_safe(); // state saving save_item(NAME(m_boote)); @@ -564,22 +568,29 @@ offs_t abc1600_mac_device::get_dma_address(int index, offs_t offset, bool &rw) // dma_mreq_r - DMA memory read //------------------------------------------------- -uint8_t abc1600_mac_device::dma_mreq_r(int index, offs_t offset, uint8_t data) +uint8_t abc1600_mac_device::dma_mreq_r(int index, int dmamap, offs_t offset) { bool rw; - offs_t virtual_offset = get_dma_address(index, offset, rw); + offs_t virtual_offset = get_dma_address(dmamap, offset, rw); if (LOG_DMA) logerror("%s DMRQ R %04x:%06x %c\n", machine().describe_context(), offset, virtual_offset, rw ? 'R' : 'W'); - + + uint8_t data = 0xff; + if (rw) { - return space().read_byte(virtual_offset); + data = space().read_byte(virtual_offset); + + m_write_tren[index](data); } else { + data = m_read_tren[index](data); + space().write_byte(virtual_offset, data); - return data; } + + return data; } @@ -587,10 +598,10 @@ uint8_t abc1600_mac_device::dma_mreq_r(int index, offs_t offset, uint8_t data) // dma_mreq_w - DMA memory write //------------------------------------------------- -void abc1600_mac_device::dma_mreq_w(int index, offs_t offset, uint8_t data) +void abc1600_mac_device::dma_mreq_w(int index, int dmamap, offs_t offset, uint8_t data) { bool rw; - offs_t virtual_offset = get_dma_address(index, offset, rw); + offs_t virtual_offset = get_dma_address(dmamap, offset, rw); if (LOG_DMA) logerror("%s DMRQ W %04x:%06x %c\n", machine().describe_context(), offset, virtual_offset, rw ? 'R' : 'W'); @@ -605,10 +616,10 @@ void abc1600_mac_device::dma_mreq_w(int index, offs_t offset, uint8_t data) // dma_iorq_r - DMA I/O read //------------------------------------------------- -uint8_t abc1600_mac_device::dma_iorq_r(int index, offs_t offset) +uint8_t abc1600_mac_device::dma_iorq_r(int dmamap, offs_t offset) { bool rw; - offs_t virtual_offset = 0x1fe000 | get_dma_address(index, offset, rw); + offs_t virtual_offset = 0x1fe000 | get_dma_address(dmamap, offset, rw); if (LOG_DMA) logerror("%s DIORQ R %04x:%06x\n", machine().describe_context(), offset, virtual_offset); @@ -620,10 +631,10 @@ uint8_t abc1600_mac_device::dma_iorq_r(int index, offs_t offset) // dma_iorq_w - DMA I/O write //------------------------------------------------- -void abc1600_mac_device::dma_iorq_w(int index, offs_t offset, uint8_t data) +void abc1600_mac_device::dma_iorq_w(int dmamap, offs_t offset, uint8_t data) { bool rw; - offs_t virtual_offset = 0x1fe000 | get_dma_address(index, offset, rw); + offs_t virtual_offset = 0x1fe000 | get_dma_address(dmamap, offset, rw); if (LOG_DMA) logerror("%s DIORQ W %04x:%06x\n", machine().describe_context(), offset, virtual_offset); diff --git a/src/mame/machine/abc1600mac.h b/src/mame/machine/abc1600mac.h index a3ca68f5370..0ce71fe1beb 100644 --- a/src/mame/machine/abc1600mac.h +++ b/src/mame/machine/abc1600mac.h @@ -37,6 +37,12 @@ public: auto fc_cb() { return m_read_fc.bind(); } auto buserr_cb() { return m_write_buserr.bind(); } + auto in_tren0_cb() { return m_read_tren[0].bind(); } + auto out_tren0_cb() { return m_write_tren[0].bind(); } + auto in_tren1_cb() { return m_read_tren[1].bind(); } + auto out_tren1_cb() { return m_write_tren[1].bind(); } + auto in_tren2_cb() { return m_read_tren[2].bind(); } + auto out_tren2_cb() { return m_write_tren[2].bind(); } uint8_t read(offs_t offset); void write(offs_t offset, uint8_t data); @@ -51,18 +57,18 @@ public: void page_hi_w(offs_t offset, uint8_t data); void dmamap_w(offs_t offset, uint8_t data); - uint8_t dma0_mreq_r(offs_t offset, uint8_t data) { return dma_mreq_r(DMAMAP_R0_LO, offset, data); } - void dma0_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(DMAMAP_R0_LO, offset, data); } + uint8_t dma0_mreq_r(offs_t offset) { return dma_mreq_r(0, DMAMAP_R0_LO, offset); } + void dma0_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(0, DMAMAP_R0_LO, offset, data); } uint8_t dma0_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R0_LO, offset); } void dma0_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R0_LO, offset, data); } - uint8_t dma1_mreq_r(offs_t offset, uint8_t data) { return dma_mreq_r(DMAMAP_R1_LO, offset, data); } - void dma1_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(DMAMAP_R1_LO, offset, data); } + uint8_t dma1_mreq_r(offs_t offset) { return dma_mreq_r(1, DMAMAP_R1_LO, offset); } + void dma1_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(1, DMAMAP_R1_LO, offset, data); } uint8_t dma1_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R1_LO, offset); } void dma1_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R1_LO, offset, data); } - uint8_t dma2_mreq_r(offs_t offset, uint8_t data) { return dma_mreq_r(DMAMAP_R2_LO, offset, data); } - void dma2_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(DMAMAP_R2_LO, offset, data); } + uint8_t dma2_mreq_r(offs_t offset) { return dma_mreq_r(2, DMAMAP_R2_LO, offset); } + void dma2_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(2, DMAMAP_R2_LO, offset, data); } uint8_t dma2_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R2_LO, offset); } void dma2_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R2_LO, offset, data); } @@ -94,10 +100,10 @@ private: offs_t get_physical_offset(offs_t offset, int task, bool &nonx, bool &wp); offs_t get_dma_address(int index, offs_t offset, bool &rw); - uint8_t dma_mreq_r(int index, offs_t offset, uint8_t data); - void dma_mreq_w(int index, offs_t offset, uint8_t data); - uint8_t dma_iorq_r(int index, offs_t offset); - void dma_iorq_w(int index, offs_t offset, uint8_t data); + uint8_t dma_mreq_r(int index, int dmamap, offs_t offset); + void dma_mreq_w(int index, int dmamap, offs_t offset, uint8_t data); + uint8_t dma_iorq_r(int dmamap, offs_t offset); + void dma_iorq_w(int dmamap, offs_t offset, uint8_t data); void program_map(address_map &map); void mac_map(address_map &map); @@ -113,6 +119,9 @@ private: devcb_read8 m_read_fc; devcb_write8 m_write_buserr; + devcb_read8::array<3> m_read_tren; + devcb_write8::array<3> m_write_tren; + bool m_boote; bool m_magic; int m_task; -- cgit v1.2.3