From e1fcb43459aa29bd822ad3006f2e0d94b3b00261 Mon Sep 17 00:00:00 2001 From: AJR Date: Fri, 28 Aug 2020 20:58:59 -0400 Subject: concept: Add note about baud rates --- src/mame/drivers/concept.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mame/drivers/concept.cpp b/src/mame/drivers/concept.cpp index 32fffc75a68..edb2b62c563 100644 --- a/src/mame/drivers/concept.cpp +++ b/src/mame/drivers/concept.cpp @@ -29,6 +29,12 @@ Raphael Nabet, Brett Wyer, 2003-2005 Major reworking by R. Belmont 2012-2013 resulting in bootable floppies + + ACIA baud rates are 1.36% slower than normal by design. The clock division + used as the BRG input for all three is about 1.818 MHz, not the standard + 1.8432 MHz. The schematics indicate a PCB option to leave the 74LS161 at + U212 unpopulated and use a secondary XTAL as the baud rate clock. This + XTAL is also specified as 1.818 MHz. */ #include "emu.h" -- cgit v1.2.3