From e0ee20fbd473e6dd59a85e1745971d283524e558 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 3 Mar 2017 23:32:37 +1100 Subject: fix some device validation errors, also fix uninitialised members in some devices using constructor delegation (nw) --- src/devices/bus/nes/namcot.cpp | 4 +- src/devices/bus/pc_kbd/keytro.cpp | 22 +- src/devices/bus/pc_kbd/keytro.h | 21 +- src/devices/bus/scv/rom.cpp | 4 +- src/devices/bus/sunkbd/hlekbd.cpp | 6 +- src/devices/bus/vc4000/slot.cpp | 2 +- src/devices/cpu/clipper/clipper.cpp | 6 +- src/devices/cpu/hphybrid/hphybrid.cpp | 1050 ++++++++++++++++----------------- src/devices/cpu/mcs51/mcs51.cpp | 2 +- src/devices/cpu/nec/nec.cpp | 2 +- src/devices/cpu/sh2/sh2.cpp | 4 +- src/devices/machine/68561mpcc.cpp | 56 +- src/devices/machine/ataflash.cpp | 2 +- src/devices/machine/z80scc.cpp | 30 +- 14 files changed, 591 insertions(+), 620 deletions(-) diff --git a/src/devices/bus/nes/namcot.cpp b/src/devices/bus/nes/namcot.cpp index 8b443efcbd2..edb1eff11e5 100644 --- a/src/devices/bus/nes/namcot.cpp +++ b/src/devices/bus/nes/namcot.cpp @@ -75,12 +75,12 @@ nes_namcot340_device::nes_namcot340_device(const machine_config &mconfig, device } nes_namcot340_device::nes_namcot340_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : nes_nrom_device(mconfig, NES_NAMCOT175, "NES Cart Namcot 340 PCB", tag, owner, clock, "nes_namcot340", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr) + : nes_nrom_device(mconfig, NES_NAMCOT340, "NES Cart Namcot 340 PCB", tag, owner, clock, "nes_namcot340", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr) { } nes_namcot175_device::nes_namcot175_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : nes_namcot340_device(mconfig, NES_NAMCOT340, "NES Cart Namcot 175 PCB", tag, owner, clock, "nes_namcot175", __FILE__), m_wram_protect(0) + : nes_namcot340_device(mconfig, NES_NAMCOT175, "NES Cart Namcot 175 PCB", tag, owner, clock, "nes_namcot175", __FILE__), m_wram_protect(0) { } diff --git a/src/devices/bus/pc_kbd/keytro.cpp b/src/devices/bus/pc_kbd/keytro.cpp index cd2b1ce79bd..7c7d30ed53a 100644 --- a/src/devices/bus/pc_kbd/keytro.cpp +++ b/src/devices/bus/pc_kbd/keytro.cpp @@ -378,13 +378,33 @@ ROM_END pc_kbd_keytronic_pc3270_device::pc_kbd_keytronic_pc3270_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, PC_KBD_KEYTRONIC_PC3270, "Keytronic PC3270", tag, owner, clock, "keytronic_pc3270", __FILE__), + pc_kbd_keytronic_pc3270_device(mconfig, PC_KBD_KEYTRONIC_PC3270, "Keytronic PC3270", tag, owner, clock, "keytronic_pc3270", __FILE__) +{ +} + + +pc_kbd_keytronic_pc3270_device::pc_kbd_keytronic_pc3270_device( + machine_config const &mconfig, + device_type type, + char const *name, + char const *tag, + device_t *owner, + uint32_t clock, + char const *shortname, + char const *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), device_pc_kbd_interface(mconfig, *this), m_cpu(*this, "kb_keytr"), m_p1(0), m_p1_data(0), m_p2(0), m_p3(0), m_last_write_addr(0) { } +pc_kbd_keytronic_pc3270_at_device::pc_kbd_keytronic_pc3270_at_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + pc_kbd_keytronic_pc3270_device(mconfig, PC_KBD_KEYTRONIC_PC3270_AT, "Keytronic PC3270 AT", tag, owner, clock, "keytronic_pc3270_at", __FILE__) +{ +} + + //------------------------------------------------- // device_start - device-specific startup //------------------------------------------------- diff --git a/src/devices/bus/pc_kbd/keytro.h b/src/devices/bus/pc_kbd/keytro.h index 938a09edf89..11970b71884 100644 --- a/src/devices/bus/pc_kbd/keytro.h +++ b/src/devices/bus/pc_kbd/keytro.h @@ -6,8 +6,8 @@ ***************************************************************************/ -#ifndef __KB_KEYTRO_H__ -#define __KB_KEYTRO_H__ +#ifndef MAME_BUS_PC_KBD_KEYTRO_H +#define MAME_BUS_PC_KBD_KEYTRO_H #include "pc_kbdc.h" @@ -44,6 +44,16 @@ public: DECLARE_WRITE8_MEMBER( p3_write ); protected: + pc_kbd_keytronic_pc3270_device( + machine_config const &mconfig, + device_type type, + char const *name, + char const *tag, + device_t *owner, + uint32_t clock, + char const *shortname, + char const *source); + // device-level overrides virtual void device_start() override; virtual void device_reset() override; @@ -60,10 +70,7 @@ class pc_kbd_keytronic_pc3270_at_device : public pc_kbd_keytronic_pc3270_device { public: // construction/destruction - pc_kbd_keytronic_pc3270_at_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : pc_kbd_keytronic_pc3270_device(mconfig, tag, owner, clock) - { - } + pc_kbd_keytronic_pc3270_at_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ioport_constructor device_input_ports() const override; }; @@ -73,4 +80,4 @@ public: extern const device_type PC_KBD_KEYTRONIC_PC3270; extern const device_type PC_KBD_KEYTRONIC_PC3270_AT; -#endif /* __KB_KEYTRO_H__ */ +#endif // MAME_BUS_PC_KBD_KEYTRO_H diff --git a/src/devices/bus/scv/rom.cpp b/src/devices/bus/scv/rom.cpp index a4e42cf46fb..2507219be4a 100644 --- a/src/devices/bus/scv/rom.cpp +++ b/src/devices/bus/scv/rom.cpp @@ -54,12 +54,12 @@ scv_rom32ram8_device::scv_rom32ram8_device(const machine_config &mconfig, const } scv_rom64_device::scv_rom64_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : scv_rom8_device(mconfig, SCV_ROM16K, "SCV 64K Carts", tag, owner, clock, "scv_rom64", __FILE__), m_bank_base(0) + : scv_rom8_device(mconfig, SCV_ROM64K, "SCV 64K Carts", tag, owner, clock, "scv_rom64", __FILE__), m_bank_base(0) { } scv_rom128_device::scv_rom128_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : scv_rom8_device(mconfig, SCV_ROM32K, "SCV 128K Carts", tag, owner, clock, "scv_rom128", __FILE__), m_bank_base(0) + : scv_rom8_device(mconfig, SCV_ROM128K, "SCV 128K Carts", tag, owner, clock, "scv_rom128", __FILE__), m_bank_base(0) { } diff --git a/src/devices/bus/sunkbd/hlekbd.cpp b/src/devices/bus/sunkbd/hlekbd.cpp index 9a289375fd9..101546ba6fa 100644 --- a/src/devices/bus/sunkbd/hlekbd.cpp +++ b/src/devices/bus/sunkbd/hlekbd.cpp @@ -1211,7 +1211,7 @@ hle_type5_gb_device::hle_type5_gb_device( uint32_t clock) : hle_type4_device_base( mconfig, - SUN_TYPE5_HLE_KEYBOARD, + SUN_TYPE5_GB_HLE_KEYBOARD, "Sun Type 5 Keyboard (Great Britain - HLE)", tag, owner, @@ -1250,7 +1250,7 @@ hle_type5_se_device::hle_type5_se_device( uint32_t clock) : hle_type4_device_base( mconfig, - SUN_TYPE5_HLE_KEYBOARD, + SUN_TYPE5_SE_HLE_KEYBOARD, "Sun Type 5 Keyboard (Sweden - HLE)", tag, owner, @@ -1289,7 +1289,7 @@ hle_type5_jp_device::hle_type5_jp_device( uint32_t clock) : hle_type4_device_base( mconfig, - SUN_TYPE5_HLE_KEYBOARD, + SUN_TYPE5_JP_HLE_KEYBOARD, "Sun Type 5 Keyboard (Japan - HLE)", tag, owner, diff --git a/src/devices/bus/vc4000/slot.cpp b/src/devices/bus/vc4000/slot.cpp index 82764eaa1d1..cbacf7d8716 100644 --- a/src/devices/bus/vc4000/slot.cpp +++ b/src/devices/bus/vc4000/slot.cpp @@ -87,7 +87,7 @@ vc4000_cart_slot_device::vc4000_cart_slot_device( uint32_t clock, const char *shortname, const char *source) - : device_t(mconfig, VC4000_CART_SLOT, name, tag, owner, clock, shortname, source) + : device_t(mconfig, type, name, tag, owner, clock, shortname, source) , device_image_interface(mconfig, *this) , device_slot_interface(mconfig, *this) , m_type(VC4000_STD) diff --git a/src/devices/cpu/clipper/clipper.cpp b/src/devices/cpu/clipper/clipper.cpp index 86093bb4e88..cd1c6ff7764 100644 --- a/src/devices/cpu/clipper/clipper.cpp +++ b/src/devices/cpu/clipper/clipper.cpp @@ -33,13 +33,13 @@ const device_type CLIPPER_C300 = device_creator; const device_type CLIPPER_C400 = device_creator; clipper_c100_device::clipper_c100_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : clipper_device(mconfig, CLIPPER_C100, "C100 CLIPPER", tag, owner, clock, "C100", __FILE__) { } + : clipper_device(mconfig, CLIPPER_C100, "C100 CLIPPER", tag, owner, clock, "c100", __FILE__) { } clipper_c300_device::clipper_c300_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : clipper_device(mconfig, CLIPPER_C300, "C300 CLIPPER", tag, owner, clock, "C300", __FILE__) { } + : clipper_device(mconfig, CLIPPER_C300, "C300 CLIPPER", tag, owner, clock, "c300", __FILE__) { } clipper_c400_device::clipper_c400_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : clipper_device(mconfig, CLIPPER_C400, "C400 CLIPPER", tag, owner, clock, "C400", __FILE__) { } + : clipper_device(mconfig, CLIPPER_C400, "C400 CLIPPER", tag, owner, clock, "c400", __FILE__) { } clipper_device::clipper_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source) : cpu_device(mconfig, type, name, tag, owner, clock, shortname, source), diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 47477503f05..f3e73ba938a 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -36,33 +36,33 @@ #include "hphybrid.h" enum { - HPHYBRID_A, - HPHYBRID_B, - HPHYBRID_C, - HPHYBRID_D, - HPHYBRID_P, - HPHYBRID_R, - HPHYBRID_IV, - HPHYBRID_PA, - HPHYBRID_DMAPA, - HPHYBRID_DMAMA, - HPHYBRID_DMAC, - HPHYBRID_I, - HPHYBRID_W, - HPHYBRID_AR2, - HPHYBRID_AR2_2, - HPHYBRID_AR2_3, - HPHYBRID_AR2_4, - HPHYBRID_SE, - HPHYBRID_R25, - HPHYBRID_R26, - HPHYBRID_R27, - HPHYBRID_R32, - HPHYBRID_R33, - HPHYBRID_R34, - HPHYBRID_R35, - HPHYBRID_R36, - HPHYBRID_R37 + HPHYBRID_A, + HPHYBRID_B, + HPHYBRID_C, + HPHYBRID_D, + HPHYBRID_P, + HPHYBRID_R, + HPHYBRID_IV, + HPHYBRID_PA, + HPHYBRID_DMAPA, + HPHYBRID_DMAMA, + HPHYBRID_DMAC, + HPHYBRID_I, + HPHYBRID_W, + HPHYBRID_AR2, + HPHYBRID_AR2_2, + HPHYBRID_AR2_3, + HPHYBRID_AR2_4, + HPHYBRID_SE, + HPHYBRID_R25, + HPHYBRID_R26, + HPHYBRID_R27, + HPHYBRID_R32, + HPHYBRID_R33, + HPHYBRID_R34, + HPHYBRID_R35, + HPHYBRID_R36, + HPHYBRID_R37 }; #define BIT_MASK(n) (1U << (n)) @@ -106,152 +106,147 @@ const device_type HP_5061_3011 = device_creator; WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w) { - if (state) { - BIT_SET(m_flags , HPHYBRID_DMAR_BIT); - } else { - BIT_CLR(m_flags , HPHYBRID_DMAR_BIT); - } + if (state) + BIT_SET(m_flags , HPHYBRID_DMAR_BIT); + else + BIT_CLR(m_flags , HPHYBRID_DMAR_BIT); } WRITE_LINE_MEMBER(hp_hybrid_cpu_device::halt_w) { - if (state) { - BIT_SET(m_flags , HPHYBRID_HALT_BIT); - } else { - BIT_CLR(m_flags , HPHYBRID_HALT_BIT); - } + if (state) + BIT_SET(m_flags , HPHYBRID_HALT_BIT); + else + BIT_CLR(m_flags , HPHYBRID_HALT_BIT); } WRITE_LINE_MEMBER(hp_hybrid_cpu_device::status_w) { - if (state) { - BIT_SET(m_flags , HPHYBRID_STS_BIT); - } else { - BIT_CLR(m_flags , HPHYBRID_STS_BIT); - } + if (state) + BIT_SET(m_flags , HPHYBRID_STS_BIT); + else + BIT_CLR(m_flags , HPHYBRID_STS_BIT); } WRITE_LINE_MEMBER(hp_hybrid_cpu_device::flag_w) { - if (state) { - BIT_SET(m_flags , HPHYBRID_FLG_BIT); - } else { - BIT_CLR(m_flags , HPHYBRID_FLG_BIT); - } + if (state) + BIT_SET(m_flags , HPHYBRID_FLG_BIT); + else + BIT_CLR(m_flags , HPHYBRID_FLG_BIT); } uint8_t hp_hybrid_cpu_device::pa_r(void) const { - return CURRENT_PA; + return CURRENT_PA; } hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname , uint8_t addrwidth) - : cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__), - m_pa_changed_func(*this), - m_program_config("program", ENDIANNESS_BIG, 16, addrwidth, -1), - m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) + : cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__) + , m_pa_changed_func(*this) + , m_program_config("program", ENDIANNESS_BIG, 16, addrwidth, -1) + , m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) { } void hp_hybrid_cpu_device::device_start() { - m_reg_A = 0; - m_reg_B = 0; - m_reg_P = HP_RESET_ADDR; - m_reg_R = 0; - m_reg_C = 0; - m_reg_D = 0; - m_reg_IV = 0; - m_reg_PA[ 0 ] = 0; - m_reg_PA[ 1 ] = 0; - m_reg_PA[ 2 ] = 0; - m_reg_W = 0; - m_flags = 0; - m_dmapa = 0; - m_dmama = 0; - m_dmac = 0; - m_reg_I = 0; - m_forced_bsc_25 = false; - - { - state_add(HPHYBRID_A, "A", m_reg_A); - state_add(HPHYBRID_B, "B", m_reg_B); - state_add(HPHYBRID_C, "C", m_reg_C); - state_add(HPHYBRID_D, "D", m_reg_D); - state_add(HPHYBRID_P, "P", m_reg_P); - state_add(STATE_GENPC, "GENPC", m_genpc).noshow(); - state_add(STATE_GENPCBASE, "CURPC", m_genpc).noshow(); - state_add(HPHYBRID_R, "R", m_reg_R); - state_add(STATE_GENSP, "GENSP", m_reg_R).noshow(); - state_add(HPHYBRID_IV, "IV", m_reg_IV); - state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]); - state_add(HPHYBRID_W, "W", m_reg_W).noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s"); - state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow(); - state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow(); - state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow(); - state_add(HPHYBRID_I , "I" , m_reg_I).noshow(); - } + m_reg_A = 0; + m_reg_B = 0; + m_reg_P = HP_RESET_ADDR; + m_reg_R = 0; + m_reg_C = 0; + m_reg_D = 0; + m_reg_IV = 0; + m_reg_PA[ 0 ] = 0; + m_reg_PA[ 1 ] = 0; + m_reg_PA[ 2 ] = 0; + m_reg_W = 0; + m_flags = 0; + m_dmapa = 0; + m_dmama = 0; + m_dmac = 0; + m_reg_I = 0; + m_forced_bsc_25 = false; + + { + state_add(HPHYBRID_A, "A", m_reg_A); + state_add(HPHYBRID_B, "B", m_reg_B); + state_add(HPHYBRID_C, "C", m_reg_C); + state_add(HPHYBRID_D, "D", m_reg_D); + state_add(HPHYBRID_P, "P", m_reg_P); + state_add(STATE_GENPC, "GENPC", m_genpc).noshow(); + state_add(STATE_GENPCBASE, "CURPC", m_genpc).noshow(); + state_add(HPHYBRID_R, "R", m_reg_R); + state_add(STATE_GENSP, "GENSP", m_reg_R).noshow(); + state_add(HPHYBRID_IV, "IV", m_reg_IV); + state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]); + state_add(HPHYBRID_W, "W", m_reg_W).noshow(); + state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s"); + state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow(); + state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow(); + state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow(); + state_add(HPHYBRID_I , "I" , m_reg_I).noshow(); + } - m_program = &space(AS_PROGRAM); - m_direct = &m_program->direct(); - m_io = &space(AS_IO); - - save_item(NAME(m_reg_A)); - save_item(NAME(m_reg_B)); - save_item(NAME(m_reg_C)); - save_item(NAME(m_reg_D)); - save_item(NAME(m_reg_P)); - save_item(NAME(m_reg_R)); - save_item(NAME(m_reg_IV)); - save_item(NAME(m_reg_PA[0])); - save_item(NAME(m_reg_PA[1])); - save_item(NAME(m_reg_PA[2])); - save_item(NAME(m_reg_W)); - save_item(NAME(m_flags)); - save_item(NAME(m_dmapa)); - save_item(NAME(m_dmama)); - save_item(NAME(m_dmac)); - save_item(NAME(m_reg_I)); - save_item(NAME(m_forced_bsc_25)); - - m_icountptr = &m_icount; - - m_pa_changed_func.resolve_safe(); + m_program = &space(AS_PROGRAM); + m_direct = &m_program->direct(); + m_io = &space(AS_IO); + + save_item(NAME(m_reg_A)); + save_item(NAME(m_reg_B)); + save_item(NAME(m_reg_C)); + save_item(NAME(m_reg_D)); + save_item(NAME(m_reg_P)); + save_item(NAME(m_reg_R)); + save_item(NAME(m_reg_IV)); + save_item(NAME(m_reg_PA[0])); + save_item(NAME(m_reg_PA[1])); + save_item(NAME(m_reg_PA[2])); + save_item(NAME(m_reg_W)); + save_item(NAME(m_flags)); + save_item(NAME(m_dmapa)); + save_item(NAME(m_dmama)); + save_item(NAME(m_dmac)); + save_item(NAME(m_reg_I)); + save_item(NAME(m_forced_bsc_25)); + + m_icountptr = &m_icount; + + m_pa_changed_func.resolve_safe(); } void hp_hybrid_cpu_device::device_reset() { - m_reg_P = HP_RESET_ADDR; - m_reg_I = fetch(); - m_flags = 0; + m_reg_P = HP_RESET_ADDR; + m_reg_I = fetch(); + m_flags = 0; } void hp_hybrid_cpu_device::execute_run() { - do { - if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) { - handle_dma(); - } else { - debugger_instruction_hook(this, m_genpc); + do { + if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) { + handle_dma(); + } else { + debugger_instruction_hook(this, m_genpc); - // Check for interrupts - check_for_interrupts(); + // Check for interrupts + check_for_interrupts(); - m_reg_I = execute_one(m_reg_I); - } - } while (m_icount > 0); + m_reg_I = execute_one(m_reg_I); + } + } while (m_icount > 0); } void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state) { - if (inputnum < HPHYBRID_INT_LVLS) { - if (state) { - BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum); - } else { - BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum); - } - } + if (inputnum < HPHYBRID_INT_LVLS) { + if (state) + BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum); + else + BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum); + } } /** @@ -1096,181 +1091,181 @@ void hp_hybrid_cpu_device::enter_isr(void) void hp_hybrid_cpu_device::handle_dma(void) { - // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing - bool tc = BIT(--m_dmac , 15) != 0; - uint16_t tmp; - - if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { - // "Outward" DMA: memory -> peripheral - tmp = RM(AEC_CASE_D , m_dmama++); - WIO(m_dmapa , tc ? 2 : 0 , tmp); - m_icount -= 10; - } else { - // "Inward" DMA: peripheral -> memory - tmp = RIO(m_dmapa , tc ? 2 : 0); - WM(AEC_CASE_D , m_dmama++ , tmp); - m_icount -= 9; - } + // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing + bool tc = BIT(--m_dmac , 15) != 0; + uint16_t tmp; + + if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { + // "Outward" DMA: memory -> peripheral + tmp = RM(AEC_CASE_D , m_dmama++); + WIO(m_dmapa , tc ? 2 : 0 , tmp); + m_icount -= 10; + } else { + // "Inward" DMA: peripheral -> memory + tmp = RIO(m_dmapa , tc ? 2 : 0); + WM(AEC_CASE_D , m_dmama++ , tmp); + m_icount -= 9; + } - // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work) + // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work) } uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic) { - return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1); + return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1); } void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v) { - m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v); + m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v); } hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hp_hybrid_cpu_device(mconfig, HP_5061_3001, "HP-5061-3001", tag, owner, clock, "5061-3001", 22), - m_boot_mode(false) + : hp_hybrid_cpu_device(mconfig, HP_5061_3001, "HP-5061-3001", tag, owner, clock, "5061_3001", 22) + , m_boot_mode(false) { } void hp_5061_3001_cpu_device::device_start() { - hp_hybrid_cpu_device::device_start(); - - state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]); - state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]); - state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]); - state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]); - state_add(HPHYBRID_SE, "SE" , m_reg_se); - state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow(); - state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow(); - state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow(); - state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]); - state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]); - state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]); - state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]); - state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]); - state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]); - - save_item(NAME(m_reg_ar2[ 0 ])); - save_item(NAME(m_reg_ar2[ 1 ])); - save_item(NAME(m_reg_ar2[ 2 ])); - save_item(NAME(m_reg_ar2[ 3 ])); - save_item(NAME(m_reg_se)); - save_item(NAME(m_reg_r25)); - save_item(NAME(m_reg_r26)); - save_item(NAME(m_reg_r27)); - save_item(NAME(m_reg_aec[ 0 ])); - save_item(NAME(m_reg_aec[ 1 ])); - save_item(NAME(m_reg_aec[ 2 ])); - save_item(NAME(m_reg_aec[ 3 ])); - save_item(NAME(m_reg_aec[ 4 ])); - save_item(NAME(m_reg_aec[ 5 ])); + hp_hybrid_cpu_device::device_start(); + + state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]); + state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]); + state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]); + state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]); + state_add(HPHYBRID_SE, "SE" , m_reg_se); + state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow(); + state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow(); + state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow(); + state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]); + state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]); + state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]); + state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]); + state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]); + state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]); + + save_item(NAME(m_reg_ar2[ 0 ])); + save_item(NAME(m_reg_ar2[ 1 ])); + save_item(NAME(m_reg_ar2[ 2 ])); + save_item(NAME(m_reg_ar2[ 3 ])); + save_item(NAME(m_reg_se)); + save_item(NAME(m_reg_r25)); + save_item(NAME(m_reg_r26)); + save_item(NAME(m_reg_r27)); + save_item(NAME(m_reg_aec[ 0 ])); + save_item(NAME(m_reg_aec[ 1 ])); + save_item(NAME(m_reg_aec[ 2 ])); + save_item(NAME(m_reg_aec[ 3 ])); + save_item(NAME(m_reg_aec[ 4 ])); + save_item(NAME(m_reg_aec[ 5 ])); } void hp_5061_3001_cpu_device::device_reset() { - // Initial state of AEC registers: - // R32 0 - // R33 5 - // R34 0 - // R35 0 - // R36 0 - // R37 0 - m_reg_aec[ 0 ] = 0; - m_reg_aec[ 1 ] = 5; - m_reg_aec[ 2 ] = 0; - m_reg_aec[ 3 ] = 0; - m_reg_aec[ 4 ] = 0; - m_reg_aec[ 5 ] = 0; - - m_forced_bsc_25 = m_boot_mode; - - hp_hybrid_cpu_device::device_reset(); + // Initial state of AEC registers: + // R32 0 + // R33 5 + // R34 0 + // R35 0 + // R36 0 + // R37 0 + m_reg_aec[ 0 ] = 0; + m_reg_aec[ 1 ] = 5; + m_reg_aec[ 2 ] = 0; + m_reg_aec[ 3 ] = 0; + m_reg_aec[ 4 ] = 0; + m_reg_aec[ 5 ] = 0; + + m_forced_bsc_25 = m_boot_mode; + + hp_hybrid_cpu_device::device_reset(); } uint8_t hp_5061_3001_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa) { - uint8_t d12 = (uint8_t)(mantissa & 0xf); + uint8_t d12 = (uint8_t)(mantissa & 0xf); - mantissa = (mantissa >> 4) | ((uint64_t)d1 << 44); + mantissa = (mantissa >> 4) | ((uint64_t)d1 << 44); - return d12; + return d12; } uint8_t hp_5061_3001_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa) { - uint8_t d1 = (uint8_t)((mantissa >> 44) & 0xf); + uint8_t d1 = (uint8_t)((mantissa >> 44) & 0xf); - mantissa = (mantissa << 4) | ((uint64_t)d12); - mantissa &= 0xffffffffffffULL; + mantissa = (mantissa << 4) | ((uint64_t)d12); + mantissa &= 0xffffffffffffULL; - return d1; + return d1; } uint64_t hp_5061_3001_cpu_device::get_ar1(void) { - uint32_t addr; - uint64_t tmp; + uint32_t addr; + uint64_t tmp; - addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 1); - tmp = (uint64_t)RM(addr++); - tmp <<= 16; - tmp |= (uint64_t)RM(addr++); - tmp <<= 16; - tmp |= (uint64_t)RM(addr); + addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 1); + tmp = (uint64_t)RM(addr++); + tmp <<= 16; + tmp |= (uint64_t)RM(addr++); + tmp <<= 16; + tmp |= (uint64_t)RM(addr); - return tmp; + return tmp; } void hp_5061_3001_cpu_device::set_ar1(uint64_t v) { - uint32_t addr; - - addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 3); - WM(addr-- , (uint16_t)(v & 0xffff)); - v >>= 16; - WM(addr-- , (uint16_t)(v & 0xffff)); - v >>= 16; - WM(addr , (uint16_t)(v & 0xffff)); + uint32_t addr; + + addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 3); + WM(addr-- , (uint16_t)(v & 0xffff)); + v >>= 16; + WM(addr-- , (uint16_t)(v & 0xffff)); + v >>= 16; + WM(addr , (uint16_t)(v & 0xffff)); } uint64_t hp_5061_3001_cpu_device::get_ar2(void) const { - uint64_t tmp; + uint64_t tmp; - tmp = (uint64_t)m_reg_ar2[ 1 ]; - tmp <<= 16; - tmp |= (uint64_t)m_reg_ar2[ 2 ]; - tmp <<= 16; - tmp |= (uint64_t)m_reg_ar2[ 3 ]; + tmp = (uint64_t)m_reg_ar2[ 1 ]; + tmp <<= 16; + tmp |= (uint64_t)m_reg_ar2[ 2 ]; + tmp <<= 16; + tmp |= (uint64_t)m_reg_ar2[ 3 ]; - return tmp; + return tmp; } void hp_5061_3001_cpu_device::set_ar2(uint64_t v) { - m_reg_ar2[ 3 ] = (uint16_t)(v & 0xffff); - v >>= 16; - m_reg_ar2[ 2 ] = (uint16_t)(v & 0xffff); - v >>= 16; - m_reg_ar2[ 1 ] = (uint16_t)(v & 0xffff); + m_reg_ar2[ 3 ] = (uint16_t)(v & 0xffff); + v >>= 16; + m_reg_ar2[ 2 ] = (uint16_t)(v & 0xffff); + v >>= 16; + m_reg_ar2[ 1 ] = (uint16_t)(v & 0xffff); } uint64_t hp_5061_3001_cpu_device::do_mrxy(uint64_t ar) { - uint8_t n; - - n = m_reg_B & 0xf; - m_reg_A &= 0xf; - m_reg_se = m_reg_A; - while (n--) { - m_reg_se = do_dec_shift_r(m_reg_A , ar); - m_reg_A = 0; - m_icount -= 4; - } - m_reg_A = m_reg_se; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); + uint8_t n; + + n = m_reg_B & 0xf; + m_reg_A &= 0xf; + m_reg_se = m_reg_A; + while (n--) { + m_reg_se = do_dec_shift_r(m_reg_A , ar); + m_reg_A = 0; + m_icount -= 4; + } + m_reg_A = m_reg_se; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); - return ar; + return ar; } bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t b) @@ -1308,232 +1303,229 @@ bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t void hp_5061_3001_cpu_device::do_mpy(void) { - int32_t a = (int16_t)m_reg_A; - int32_t b = (int16_t)m_reg_B; - int32_t p = a * b; + int32_t a = (int16_t)m_reg_A; + int32_t b = (int16_t)m_reg_B; + int32_t p = a * b; - m_reg_A = (uint16_t)(p & 0xffff); - m_reg_B = (uint16_t)((p >> 16) & 0xffff); + m_reg_A = (uint16_t)(p & 0xffff); + m_reg_B = (uint16_t)((p >> 16) & 0xffff); - // Not entirely correct, timing depends on initial content of A register - m_icount -= 65; + // Not entirely correct, timing depends on initial content of A register + m_icount -= 65; } uint16_t hp_5061_3001_cpu_device::execute_no_bpc_ioc(uint16_t opcode) { - // EMC instructions - uint8_t n; - uint16_t tmp1; - uint16_t tmp2; - uint64_t tmp_ar; - uint64_t tmp_ar2; - bool carry; - - switch (opcode & 0xfff0) { - case 0x7300: - // XFR - tmp1 = m_reg_A; - tmp2 = m_reg_B; - n = (opcode & 0xf) + 1; - m_icount -= 21; - while (n--) { - m_icount -= 12; - WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1)); - tmp1++; - tmp2++; - } - break; - - case 0x7380: - // CLR - tmp1 = m_reg_A; - n = (opcode & 0xf) + 1; - m_icount -= 16; - while (n--) { - m_icount -= 6; - WM(AEC_CASE_C , tmp1 , 0); - tmp1++; - } - break; - - default: - switch (opcode) { - case 0x7200: - // MWA - m_icount -= 28; - tmp_ar2 = get_ar2(); - carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , m_reg_B); - set_ar2(tmp_ar2); - if (carry) { - BIT_SET(m_flags, HPHYBRID_DC_BIT); - } else { - BIT_CLR(m_flags, HPHYBRID_DC_BIT); - } - break; - - case 0x7220: - // CMY - m_icount -= 23; - tmp_ar2 = get_ar2(); - tmp_ar2 = 0x999999999999ULL - tmp_ar2; - do_dec_add(true , tmp_ar2 , 0); - set_ar2(tmp_ar2); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7260: - // CMX - m_icount -= 59; - tmp_ar = get_ar1(); - tmp_ar = 0x999999999999ULL - tmp_ar; - do_dec_add(true , tmp_ar , 0); - set_ar1(tmp_ar); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7280: - // FXA - m_icount -= 40; - tmp_ar2 = get_ar2(); - carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , get_ar1()); - set_ar2(tmp_ar2); - if (carry) { - BIT_SET(m_flags, HPHYBRID_DC_BIT); - } else { - BIT_CLR(m_flags, HPHYBRID_DC_BIT); - } - break; - - case 0x7340: - // NRM - tmp_ar2 = get_ar2(); - m_icount -= 23; - for (n = 0; n < 12 && (tmp_ar2 & 0xf00000000000ULL) == 0; n++) { - do_dec_shift_l(0 , tmp_ar2); - m_icount--; - } - m_reg_B = n; - if (n < 12) { - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - set_ar2(tmp_ar2); - } else { - BIT_SET(m_flags , HPHYBRID_DC_BIT); - // When ar2 is 0, total time is 69 cycles - // (salcazzo che cosa fa per altri 34 cicli) - m_icount -= 34; - } - break; - - case 0x73c0: - // CDC - m_icount -= 11; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7a00: - // FMP - m_icount -= 42; - m_reg_A = 0; - tmp_ar = get_ar1(); - tmp_ar2 = get_ar2(); - for (n = m_reg_B & 0xf; n > 0; n--) { - m_icount -= 13; - if (do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { - m_reg_A++; - } - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - } - set_ar2(tmp_ar2); - break; - - case 0x7a21: - // FDV - // No doc mentions any limit on the iterations done by this instruction. - // Here we stop at 15 (after all there are only 4 bits in the loop counter). But is it correct? - m_icount -= 37; - m_reg_B = 0; - tmp_ar = get_ar1(); - tmp_ar2 = get_ar2(); - while (m_reg_B < 15 && !do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { - m_icount -= 13; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - m_reg_B++; - } - set_ar2(tmp_ar2); - break; - - case 0x7b00: - // MRX - set_ar1(do_mrxy(get_ar1())); - m_icount -= 62; - break; - - case 0x7b21: - // DRS - tmp_ar = get_ar1(); - m_icount -= 56; - m_reg_A = m_reg_se = do_dec_shift_r(0 , tmp_ar); - set_ar1(tmp_ar); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7b40: - // MRY - set_ar2(do_mrxy(get_ar2())); - m_icount -= 33; - break; + // EMC instructions + uint8_t n; + uint16_t tmp1; + uint16_t tmp2; + uint64_t tmp_ar; + uint64_t tmp_ar2; + bool carry; + + switch (opcode & 0xfff0) { + case 0x7300: + // XFR + tmp1 = m_reg_A; + tmp2 = m_reg_B; + n = (opcode & 0xf) + 1; + m_icount -= 21; + while (n--) { + m_icount -= 12; + WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1)); + tmp1++; + tmp2++; + } + break; - case 0x7b61: - // MLY - tmp_ar2 = get_ar2(); - m_icount -= 32; - m_reg_A = m_reg_se = do_dec_shift_l(m_reg_A & 0xf , tmp_ar2); - set_ar2(tmp_ar2); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; + case 0x7380: + // CLR + tmp1 = m_reg_A; + n = (opcode & 0xf) + 1; + m_icount -= 16; + while (n--) { + m_icount -= 6; + WM(AEC_CASE_C , tmp1 , 0); + tmp1++; + } + break; - case 0x7b8f: - // MPY - do_mpy(); - break; + default: + switch (opcode) { + case 0x7200: + // MWA + m_icount -= 28; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , m_reg_B); + set_ar2(tmp_ar2); + if (carry) + BIT_SET(m_flags, HPHYBRID_DC_BIT); + else + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + break; + + case 0x7220: + // CMY + m_icount -= 23; + tmp_ar2 = get_ar2(); + tmp_ar2 = 0x999999999999ULL - tmp_ar2; + do_dec_add(true , tmp_ar2 , 0); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7260: + // CMX + m_icount -= 59; + tmp_ar = get_ar1(); + tmp_ar = 0x999999999999ULL - tmp_ar; + do_dec_add(true , tmp_ar , 0); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7280: + // FXA + m_icount -= 40; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , get_ar1()); + set_ar2(tmp_ar2); + if (carry) + BIT_SET(m_flags, HPHYBRID_DC_BIT); + else + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + break; - case 0x7026: - // CIM - // Undocumented instruction, see beginning of this file - // Probably "Clear Interrupt Mode" - // No idea at all about exec. time: make it 9 cycles - m_icount -= 9; - BIT_CLR(m_flags, HPHYBRID_IM_BIT); - //logerror("hp-5061-3001: CIM, P = %06x flags = %05x\n" , m_genpc , m_flags); - break; - - case 0x7027: - // SIM - // Undocumented instruction, see beginning of this file - // Probably "Set Interrupt Mode" - // No idea at all about exec. time: make it 9 cycles - m_icount -= 9; - BIT_SET(m_flags, HPHYBRID_IM_BIT); - //logerror("hp-5061-3001: SIM, P = %06x flags = %05x\n" , m_genpc , m_flags); - break; + case 0x7340: + // NRM + tmp_ar2 = get_ar2(); + m_icount -= 23; + for (n = 0; n < 12 && (tmp_ar2 & 0xf00000000000ULL) == 0; n++) { + do_dec_shift_l(0 , tmp_ar2); + m_icount--; + } + m_reg_B = n; + if (n < 12) { + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + set_ar2(tmp_ar2); + } else { + BIT_SET(m_flags , HPHYBRID_DC_BIT); + // When ar2 is 0, total time is 69 cycles + // (salcazzo che cosa fa per altri 34 cicli) + m_icount -= 34; + } + break; + + case 0x73c0: + // CDC + m_icount -= 11; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7a00: + // FMP + m_icount -= 42; + m_reg_A = 0; + tmp_ar = get_ar1(); + tmp_ar2 = get_ar2(); + for (n = m_reg_B & 0xf; n > 0; n--) { + m_icount -= 13; + if (do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) + m_reg_A++; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + } + set_ar2(tmp_ar2); + break; + + case 0x7a21: + // FDV + // No doc mentions any limit on the iterations done by this instruction. + // Here we stop at 15 (after all there are only 4 bits in the loop counter). But is it correct? + m_icount -= 37; + m_reg_B = 0; + tmp_ar = get_ar1(); + tmp_ar2 = get_ar2(); + while (m_reg_B < 15 && !do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { + m_icount -= 13; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + m_reg_B++; + } + set_ar2(tmp_ar2); + break; + + case 0x7b00: + // MRX + set_ar1(do_mrxy(get_ar1())); + m_icount -= 62; + break; + + case 0x7b21: + // DRS + tmp_ar = get_ar1(); + m_icount -= 56; + m_reg_A = m_reg_se = do_dec_shift_r(0 , tmp_ar); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b40: + // MRY + set_ar2(do_mrxy(get_ar2())); + m_icount -= 33; + break; + + case 0x7b61: + // MLY + tmp_ar2 = get_ar2(); + m_icount -= 32; + m_reg_A = m_reg_se = do_dec_shift_l(m_reg_A & 0xf , tmp_ar2); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b8f: + // MPY + do_mpy(); + break; + + case 0x7026: + // CIM + // Undocumented instruction, see beginning of this file + // Probably "Clear Interrupt Mode" + // No idea at all about exec. time: make it 9 cycles + m_icount -= 9; + BIT_CLR(m_flags, HPHYBRID_IM_BIT); + //logerror("hp-5061-3001: CIM, P = %06x flags = %05x\n" , m_genpc , m_flags); + break; + + case 0x7027: + // SIM + // Undocumented instruction, see beginning of this file + // Probably "Set Interrupt Mode" + // No idea at all about exec. time: make it 9 cycles + m_icount -= 9; + BIT_SET(m_flags, HPHYBRID_IM_BIT); + //logerror("hp-5061-3001: SIM, P = %06x flags = %05x\n" , m_genpc , m_flags); + break; - default: - if ((opcode & 0xfec0) == 0x74c0) { - // SDS - // SDC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_DC_BIT)); - } else { - // Unrecognized instructions: NOP - // Execution time is fictional - logerror("hp-5061-3001: unknown opcode %04x @ %06x\n" , opcode , m_genpc); - m_icount -= 6; - } - break; - } + default: + if ((opcode & 0xfec0) == 0x74c0) { + // SDS + // SDC + m_icount -= 14; + return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_DC_BIT)); + } else { + // Unrecognized instructions: NOP + // Execution time is fictional + logerror("hp-5061-3001: unknown opcode %04x @ %06x\n" , opcode , m_genpc); + m_icount -= 6; + } + break; } + } - return m_reg_P + 1; + return m_reg_P + 1; } offs_t hp_5061_3001_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) @@ -1614,76 +1606,76 @@ uint32_t hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) uint16_t hp_5061_3001_cpu_device::read_non_common_reg(uint16_t addr) { - switch (addr) { - case HP_REG_AR2_ADDR: - case HP_REG_AR2_ADDR + 1: - case HP_REG_AR2_ADDR + 2: - case HP_REG_AR2_ADDR + 3: - return m_reg_ar2[ addr - HP_REG_AR2_ADDR ]; + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + return m_reg_ar2[ addr - HP_REG_AR2_ADDR ]; - case HP_REG_SE_ADDR: - return m_reg_se; + case HP_REG_SE_ADDR: + return m_reg_se; - case HP_REG_R25_ADDR: - return m_reg_r25; + case HP_REG_R25_ADDR: + return m_reg_r25; - case HP_REG_R26_ADDR: - return m_reg_r26; + case HP_REG_R26_ADDR: + return m_reg_r26; - case HP_REG_R27_ADDR: - return m_reg_r27; + case HP_REG_R27_ADDR: + return m_reg_r27; - case HP_REG_R32_ADDR: - case HP_REG_R33_ADDR: - case HP_REG_R34_ADDR: - case HP_REG_R35_ADDR: - case HP_REG_R36_ADDR: - case HP_REG_R37_ADDR: - return m_reg_aec[ addr - HP_REG_R32_ADDR ]; + case HP_REG_R32_ADDR: + case HP_REG_R33_ADDR: + case HP_REG_R34_ADDR: + case HP_REG_R35_ADDR: + case HP_REG_R36_ADDR: + case HP_REG_R37_ADDR: + return m_reg_aec[ addr - HP_REG_R32_ADDR ]; - default: - return 0; - } + default: + return 0; + } } void hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) { - switch (addr) { - case HP_REG_AR2_ADDR: - case HP_REG_AR2_ADDR + 1: - case HP_REG_AR2_ADDR + 2: - case HP_REG_AR2_ADDR + 3: - m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v; - break; + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v; + break; - case HP_REG_SE_ADDR: - m_reg_se = v & HP_REG_SE_MASK; - break; + case HP_REG_SE_ADDR: + m_reg_se = v & HP_REG_SE_MASK; + break; - case HP_REG_R25_ADDR: - m_reg_r25 = v; - break; + case HP_REG_R25_ADDR: + m_reg_r25 = v; + break; - case HP_REG_R26_ADDR: - m_reg_r26 = v; - break; + case HP_REG_R26_ADDR: + m_reg_r26 = v; + break; - case HP_REG_R27_ADDR: - m_reg_r27 = v; - break; + case HP_REG_R27_ADDR: + m_reg_r27 = v; + break; - case HP_REG_R32_ADDR: - case HP_REG_R33_ADDR: - case HP_REG_R34_ADDR: - case HP_REG_R35_ADDR: - case HP_REG_R36_ADDR: - case HP_REG_R37_ADDR: - m_reg_aec[ addr - HP_REG_R32_ADDR ] = v; - break; + case HP_REG_R32_ADDR: + case HP_REG_R33_ADDR: + case HP_REG_R34_ADDR: + case HP_REG_R35_ADDR: + case HP_REG_R36_ADDR: + case HP_REG_R37_ADDR: + m_reg_aec[ addr - HP_REG_R32_ADDR ] = v; + break; - default: - break; - } + default: + break; + } } void hp_5061_3001_cpu_device::enter_isr(void) @@ -1693,32 +1685,32 @@ void hp_5061_3001_cpu_device::enter_isr(void) } hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP-5061-3011", tag, owner, clock, "5061-3011", 16) + : hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP-5061-3011", tag, owner, clock, "5061_3011", 16) { } uint16_t hp_5061_3011_cpu_device::execute_no_bpc_ioc(uint16_t opcode) { - // Unrecognized instructions: NOP - // Execution time is fictional - m_icount -= 6; + // Unrecognized instructions: NOP + // Execution time is fictional + m_icount -= 6; - return m_reg_P + 1; + return m_reg_P + 1; } uint32_t hp_5061_3011_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) { - // No MAE on 3011 - return addr; + // No MAE on 3011 + return addr; } uint16_t hp_5061_3011_cpu_device::read_non_common_reg(uint16_t addr) { - // Non-existing registers are returned as 0 - return 0; + // Non-existing registers are returned as 0 + return 0; } void hp_5061_3011_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) { - // Non-existing registers are silently discarded + // Non-existing registers are silently discarded } diff --git a/src/devices/cpu/mcs51/mcs51.cpp b/src/devices/cpu/mcs51/mcs51.cpp index 30ea8d0198c..dadbf3113f3 100644 --- a/src/devices/cpu/mcs51/mcs51.cpp +++ b/src/devices/cpu/mcs51/mcs51.cpp @@ -350,7 +350,7 @@ i80c52_device::i80c52_device(const machine_config &mconfig, device_type type, co } i80c52_device::i80c52_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : i8052_device(mconfig, I80C52, "I80C52", tag, owner, clock, "i80C52", 13, 8, FEATURE_I80C52 | FEATURE_CMOS) + : i8052_device(mconfig, I80C52, "I80C52", tag, owner, clock, "i80c52", 13, 8, FEATURE_I80C52 | FEATURE_CMOS) { } diff --git a/src/devices/cpu/nec/nec.cpp b/src/devices/cpu/nec/nec.cpp index 10bab677918..5e3ca395d0a 100644 --- a/src/devices/cpu/nec/nec.cpp +++ b/src/devices/cpu/nec/nec.cpp @@ -156,7 +156,7 @@ v33_device::v33_device(const machine_config &mconfig, const char *tag, device_t v33a_device::v33a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : nec_common_device(mconfig, V33A, "V33A", tag, owner, clock, "v33A", __FILE__, true, BYTE_XOR_LE(0), 6, 1, V33_TYPE) + : nec_common_device(mconfig, V33A, "V33A", tag, owner, clock, "v33a", __FILE__, true, BYTE_XOR_LE(0), 6, 1, V33_TYPE) { } diff --git a/src/devices/cpu/sh2/sh2.cpp b/src/devices/cpu/sh2/sh2.cpp index b4a10a079cc..fb9e564fe73 100644 --- a/src/devices/cpu/sh2/sh2.cpp +++ b/src/devices/cpu/sh2/sh2.cpp @@ -229,12 +229,12 @@ sh2_device::sh2_device(const machine_config &mconfig, device_type type, const ch } sh2a_device::sh2a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : sh2_device(mconfig, SH1, "SH-2A", tag, owner, clock, "sh2a", __FILE__, CPU_TYPE_SH2, ADDRESS_MAP_NAME(sh7021_map), 28 ) + : sh2_device(mconfig, SH2A, "SH-2A", tag, owner, clock, "sh2a", __FILE__, CPU_TYPE_SH2, ADDRESS_MAP_NAME(sh7021_map), 28) { } sh1_device::sh1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : sh2_device(mconfig, SH1, "SH-1", tag, owner, clock, "sh1", __FILE__, CPU_TYPE_SH1, ADDRESS_MAP_NAME(sh7032_map), 28 ) + : sh2_device(mconfig, SH1, "SH-1", tag, owner, clock, "sh1", __FILE__, CPU_TYPE_SH1, ADDRESS_MAP_NAME(sh7032_map), 28) { } diff --git a/src/devices/machine/68561mpcc.cpp b/src/devices/machine/68561mpcc.cpp index ce96d058dab..b783e436758 100644 --- a/src/devices/machine/68561mpcc.cpp +++ b/src/devices/machine/68561mpcc.cpp @@ -141,59 +141,29 @@ mpcc_device::mpcc_device(const machine_config &mconfig, device_type type, const } mpcc_device::mpcc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, MPCC, "Rockwell MPCC", tag, owner, clock, "mpcc", __FILE__), - device_serial_interface(mconfig, *this), - m_variant(TYPE_MPCC), - m_rxc(0), - m_txc(0), - m_brg_rate(0), - m_rcv(0), - m_rxd(0), - m_tra(0), - m_out_txd_cb(*this), - m_out_dtr_cb(*this), - m_out_rts_cb(*this), - m_out_rtxc_cb(*this), - m_out_trxc_cb(*this), - m_out_int_cb(*this), - m_rsr(0), - m_rcr(0), - m_rdr(0), - m_rivnr(0), - m_rier(0), - m_tsr(0), - m_tcr(0), - m_tdr(0), - m_tivnr(0), - m_tier(0), - m_sisr(0), - m_sicr(0), - m_sivnr(0), - m_sier(0), - m_psr1(0), - m_psr2(0), - m_ar1(0), - m_ar2(0), - m_brdr1(0), - m_brdr2(0), - m_ccr(0), - m_ecr(0) + : mpcc_device(mconfig, MPCC, "Rockwell MPCC", tag, owner, clock, TYPE_MPCC, "mpcc", __FILE__) { - for (auto & elem : m_int_state) - elem = 0; } mpcc68560_device::mpcc68560_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mpcc_device(mconfig, MPCC68560, "MPCC 68560", tag, owner, clock, TYPE_MPCC68560, "mpcc68560", __FILE__){ } + : mpcc_device(mconfig, MPCC68560, "MPCC 68560", tag, owner, clock, TYPE_MPCC68560, "mpcc68560", __FILE__) +{ +} mpcc68560A_device::mpcc68560A_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mpcc_device(mconfig, MPCC68560A, "MPCC 68560A", tag, owner, clock, TYPE_MPCC68560A, "mpcc68560A", __FILE__){ } + : mpcc_device(mconfig, MPCC68560A, "MPCC 68560A", tag, owner, clock, TYPE_MPCC68560A, "mpcc68560a", __FILE__) +{ +} mpcc68561_device::mpcc68561_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mpcc_device(mconfig, MPCC68561, "MPCC 68561", tag, owner, clock, TYPE_MPCC68561, "mpcc68561", __FILE__){ } + : mpcc_device(mconfig, MPCC68561, "MPCC 68561", tag, owner, clock, TYPE_MPCC68561, "mpcc68561", __FILE__) +{ +} mpcc68561A_device::mpcc68561A_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mpcc_device(mconfig, MPCC68561A, "MPCC 68561A", tag, owner, clock, TYPE_MPCC68561A, "mpcc68561A", __FILE__){ } + : mpcc_device(mconfig, MPCC68561A, "MPCC 68561A", tag, owner, clock, TYPE_MPCC68561A, "mpcc68561a", __FILE__) +{ +} //------------------------------------------------- // device_start - device-specific startup diff --git a/src/devices/machine/ataflash.cpp b/src/devices/machine/ataflash.cpp index 3ecbf3488ae..a8e67c06fd5 100644 --- a/src/devices/machine/ataflash.cpp +++ b/src/devices/machine/ataflash.cpp @@ -211,7 +211,7 @@ bool taito_pccard1_device::is_ready() const device_type TAITO_PCCARD2 = device_creator; taito_pccard2_device::taito_pccard2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - ata_flash_pccard_device(mconfig, TAITO_PCCARD1, "Taito PC-CARD (Type 2)", tag, owner, clock, "taito_pccard2", __FILE__), + ata_flash_pccard_device(mconfig, TAITO_PCCARD2, "Taito PC-CARD (Type 2)", tag, owner, clock, "taito_pccard2", __FILE__), m_locked(false) { } diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp index 06ccfbe3812..ffa82cacffb 100644 --- a/src/devices/machine/z80scc.cpp +++ b/src/devices/machine/z80scc.cpp @@ -191,32 +191,14 @@ z80scc_device::z80scc_device(const machine_config &mconfig, device_type type, co m_out_rxdrqb_cb(*this), m_out_txdrqb_cb(*this), m_variant(variant), - m_wr0_ptrbits(0){ + m_wr0_ptrbits(0) +{ for (auto & elem : m_int_state) elem = 0; } z80scc_device::z80scc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, Z80SCC, "Z80 SCC", tag, owner, clock, "z80scc", __FILE__), - device_z80daisy_interface(mconfig, *this), - m_chanA(*this, CHANA_TAG), - m_chanB(*this, CHANB_TAG), - m_out_txda_cb(*this), - m_out_dtra_cb(*this), - m_out_rtsa_cb(*this), - m_out_wrdya_cb(*this), - m_out_synca_cb(*this), - m_out_txdb_cb(*this), - m_out_dtrb_cb(*this), - m_out_rtsb_cb(*this), - m_out_wrdyb_cb(*this), - m_out_syncb_cb(*this), - m_out_int_cb(*this), - m_out_rxdrqa_cb(*this), - m_out_txdrqa_cb(*this), - m_out_rxdrqb_cb(*this), - m_out_txdrqb_cb(*this), - m_variant(TYPE_Z80SCC) + : z80scc_device(mconfig, Z80SCC, "Z80 SCC", tag, owner, clock, TYPE_Z80SCC, "z80scc", __FILE__) { for (auto & elem : m_int_state) elem = 0; @@ -226,7 +208,7 @@ scc8030_device::scc8030_device(const machine_config &mconfig, const char *tag, d : z80scc_device(mconfig, SCC8030, "SCC 8030", tag, owner, clock, TYPE_SCC8030, "scc8030", __FILE__){ } scc80C30_device::scc80C30_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : z80scc_device(mconfig, SCC80C30, "SCC 80C30", tag, owner, clock, TYPE_SCC80C30, "scc80C30", __FILE__){ } + : z80scc_device(mconfig, SCC80C30, "SCC 80C30", tag, owner, clock, TYPE_SCC80C30, "scc80c30", __FILE__){ } scc80230_device::scc80230_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : z80scc_device(mconfig, SCC80230, "SCC 80230", tag, owner, clock, TYPE_SCC80230, "scc80230", __FILE__){ } @@ -235,7 +217,7 @@ scc8530_device::scc8530_device(const machine_config &mconfig, const char *tag, d : z80scc_device(mconfig, SCC8530N, "SCC 8530", tag, owner, clock, TYPE_SCC8530, "scc8530", __FILE__){ } scc85C30_device::scc85C30_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : z80scc_device(mconfig, SCC85C30, "SCC 85C30", tag, owner, clock, TYPE_SCC85C30, "scc85C30", __FILE__){ } + : z80scc_device(mconfig, SCC85C30, "SCC 85C30", tag, owner, clock, TYPE_SCC85C30, "scc85c30", __FILE__){ } scc85230_device::scc85230_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : z80scc_device(mconfig, SCC85230, "SCC 85230", tag, owner, clock, TYPE_SCC85230, "scc85230", __FILE__){ } @@ -244,7 +226,7 @@ scc85233_device::scc85233_device(const machine_config &mconfig, const char *tag, : z80scc_device(mconfig, SCC85233, "SCC 85233", tag, owner, clock, TYPE_SCC85233, "scc85233", __FILE__){ } scc8523L_device::scc8523L_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : z80scc_device(mconfig, SCC8523L, "SCC 8523L", tag, owner, clock, TYPE_SCC8523L, "scc8523L", __FILE__){ } + : z80scc_device(mconfig, SCC8523L, "SCC 8523L", tag, owner, clock, TYPE_SCC8523L, "scc8523l", __FILE__){ } //------------------------------------------------- // device_start - device-specific startup -- cgit v1.2.3