From dfd60e11debd36a2b744ca84e4c01119bebab4a0 Mon Sep 17 00:00:00 2001 From: Brice Onken <32155223+briceonk@users.noreply.github.com> Date: Sun, 26 Feb 2023 09:14:47 -0800 Subject: sony/news_r3k.cpp: Added support for the NWS-3410/ (#10476) New working systems ------------------- Sony NWS-3410 [Brice Onken, Stefano Sanna] --- src/mame/mame.lst | 1 + src/mame/sony/news_r3k.cpp | 227 ++++++++++++++++++++++++++++++++------------- 2 files changed, 162 insertions(+), 66 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 9498aa6b23e..c055a8704e5 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -41493,6 +41493,7 @@ nws1580 // Sony NEWS NWS-1580 @source:sony/news_r3k.cpp nws3260 // Sony NEWS NWS-3260 +nws3410 // Sony NEWS NWS-3410 @source:sony/news_r4k.cpp nws5000x // Sony NEWS NWS-5000X diff --git a/src/mame/sony/news_r3k.cpp b/src/mame/sony/news_r3k.cpp index 6213d454a11..b301020f2b3 100644 --- a/src/mame/sony/news_r3k.cpp +++ b/src/mame/sony/news_r3k.cpp @@ -6,6 +6,8 @@ * * Sources: * - https://github.com/robohack/ucb-csrg-bsd/blob/master/sys/news3400/ + * - https://www.mmcc.it/resources/docs/NWS-3410_3460_ServiceManual_MMCC.PDF + * - https://www.mmcc.it/resources/docs/Sony_NEWS_NWS-3260_ROM_Monitor_User_Guide_r2.pdf * * TODO: * - lcd controller @@ -56,10 +58,10 @@ namespace { -class news_r3k_state : public driver_device +class news_r3k_base_state : public driver_device { public: - news_r3k_state(machine_config const &mconfig, device_type type, char const *tag) + news_r3k_base_state(machine_config const &mconfig, device_type type, char const *tag) : driver_device(mconfig, type, tag) , m_cpu(*this, "cpu") , m_ram(*this, "ram") @@ -68,12 +70,10 @@ public: , m_scc(*this, "scc") , m_net(*this, "net") , m_fdc(*this, "fdc") - , m_lcd(*this, "lcd") , m_hid(*this, "hid") , m_scsi(*this, "scsi:7:cxd1185") , m_serial(*this, "serial%u", 0U) , m_scsibus(*this, "scsi") - , m_vram(*this, "vram") , m_led(*this, "led%u", 0U) { } @@ -90,13 +90,9 @@ protected: void common(machine_config &config); public: - void nws3260(machine_config &config); - void init_common(); protected: - u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect); - void inten_w(offs_t offset, u16 data, u16 mem_mask); u16 inten_r() { return m_inten; } u16 intst_r() { return m_intst; } @@ -139,14 +135,12 @@ protected: required_device m_net; required_device m_fdc; - required_device m_lcd; required_device m_hid; required_device m_scsi; required_device_array m_serial; required_device m_scsibus; - required_shared_ptr m_vram; output_finder<4> m_led; std::unique_ptr m_net_ram; @@ -158,11 +152,58 @@ protected: u8 m_debug = 0; bool m_int_state[4]{}; +}; + +class nws3260_state : public news_r3k_base_state +{ +public: + nws3260_state(machine_config const &mconfig, device_type type, char const *tag) + : news_r3k_base_state(mconfig, type, tag) + , m_lcd(*this, "lcd") + , m_vram(*this, "vram") + { + } + + void nws3260(machine_config &config); + +protected: + virtual void machine_start() override; + + void nws3260_map(address_map &map); + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect); + + required_device m_lcd; + required_shared_ptr m_vram; + bool m_lcd_enable = false; bool m_lcd_dim = false; }; -void news_r3k_state::machine_start() +class nws3410_state : public news_r3k_base_state +{ +public: + nws3410_state(machine_config const &mconfig, device_type type, char const *tag) + : news_r3k_base_state(mconfig, type, tag) + { + } + + void nws3410(machine_config &config); + +protected: + void nws3410_map(address_map &map); +}; + +void nws3260_state::machine_start() +{ + news_r3k_base_state::machine_start(); + + save_item(NAME(m_lcd_enable)); + save_item(NAME(m_lcd_dim)); + m_lcd_enable = false; + m_lcd_dim = false; +} + +void news_r3k_base_state::machine_start() { m_led.resolve(); @@ -173,25 +214,21 @@ void news_r3k_state::machine_start() save_item(NAME(m_intst)); save_item(NAME(m_debug)); save_item(NAME(m_int_state)); - save_item(NAME(m_lcd_enable)); - save_item(NAME(m_lcd_dim)); - m_itimer = timer_alloc(FUNC(news_r3k_state::itimer), this); + m_itimer = timer_alloc(FUNC(news_r3k_base_state::itimer), this); for (bool &int_state : m_int_state) int_state = false; - m_lcd_enable = false; - m_lcd_dim = false; m_inten = 0; m_intst = 0; } -void news_r3k_state::machine_reset() +void news_r3k_base_state::machine_reset() { } -void news_r3k_state::init_common() +void news_r3k_base_state::init_common() { // map the configured ram m_cpu->space(0).install_ram(0x00000000, m_ram->mask(), m_ram->pointer()); @@ -203,27 +240,37 @@ void news_r3k_state::init_common() m_scsi->port_w(0x02); } -void news_r3k_state::cpu_map(address_map &map) +void nws3260_state::nws3260_map(address_map &map) { - map.unmap_value_high(); - + cpu_map(map); map(0x10000000, 0x101fffff).rom().region("krom", 0); - map(0x10000000, 0x10000003).lw32([this](u32 data) { m_lcd_enable = bool(data); }, "lcd_enable_w"); - map(0x10100000, 0x10100003).lw32([this](u32 data) { m_lcd_dim = BIT(data, 0); }, "lcd_dim_w"); + map(0x10000000, 0x10000003).lw32([this] (u32 data) { m_lcd_enable = bool(data); }, "lcd_enable_w"); + map(0x10100000, 0x10100003).lw32([this] (u32 data) { m_lcd_dim = BIT(data, 0); }, "lcd_dim_w"); map(0x10200000, 0x1021ffff).ram().share("vram").mirror(0xa0000000); + map(0x1ff60000, 0x1ff6001b).lw8([this] (offs_t offset, u8 data) { LOG("crtc offset %x 0x%02x\n", offset, data); }, "lfbm_crtc_w"); // TODO: HD64646FS +} - map(0x18000000, 0x18ffffff).r(FUNC(news_r3k_state::bus_error)); +void nws3410_state::nws3410_map(address_map &map) +{ + cpu_map(map); +} + +void news_r3k_base_state::cpu_map(address_map &map) +{ + map.unmap_value_high(); + + map(0x18000000, 0x18ffffff).r(FUNC(news_r3k_base_state::bus_error)); map(0x1fc00000, 0x1fc1ffff).rom().region("eprom", 0); //map(0x1fc40004, 0x1fc40007).w().umask32(0xff); ?? // 1fc40007 // power/reboot/PARK? - map(0x1fc80000, 0x1fc80001).rw(FUNC(news_r3k_state::inten_r), FUNC(news_r3k_state::inten_w)); - map(0x1fc80002, 0x1fc80003).r(FUNC(news_r3k_state::intst_r)); - map(0x1fc80004, 0x1fc80005).w(FUNC(news_r3k_state::intclr_w)); - map(0x1fc80006, 0x1fc80006).w(FUNC(news_r3k_state::itimer_w)); + map(0x1fc80000, 0x1fc80001).rw(FUNC(news_r3k_base_state::inten_r), FUNC(news_r3k_base_state::inten_w)); + map(0x1fc80002, 0x1fc80003).r(FUNC(news_r3k_base_state::intst_r)); + map(0x1fc80004, 0x1fc80005).w(FUNC(news_r3k_base_state::intclr_w)); + map(0x1fc80006, 0x1fc80006).w(FUNC(news_r3k_base_state::itimer_w)); // 1fcc0000 // cstrobe? // 1fcc0002 // sccstatus0? - map(0x1fcc0003, 0x1fcc0003).rw(FUNC(news_r3k_state::debug_r), FUNC(news_r3k_state::debug_w)); + map(0x1fcc0003, 0x1fcc0003).rw(FUNC(news_r3k_base_state::debug_r), FUNC(news_r3k_base_state::debug_w)); // 1fcc0007 // sccvect? map(0x1fd00000, 0x1fd00007).m(m_hid, FUNC(news_hid_hle_device::map)); @@ -232,7 +279,7 @@ void news_r3k_state::cpu_map(address_map &map) map(0x1fe00000, 0x1fe0000f).m(m_dma, FUNC(dmac_0448_device::map)); map(0x1fe00100, 0x1fe0010f).m(m_scsi, FUNC(cxd1185_device::map)); map(0x1fe00200, 0x1fe00203).m(m_fdc, FUNC(upd72067_device::map)); - map(0x1fe00300, 0x1fe00300).lr8([]() { return 0xff; }, "sound_r"); // HACK: disable sound + map(0x1fe00300, 0x1fe00300).lr8([] () { return 0xff; }, "sound_r"); // HACK: disable sound //map(0x1fe00300, 0x1fe00307); // sound map(0x1fe40000, 0x1fe40003).portr("SW2"); //map(0x1fe70000, 0x1fe9ffff).ram(); // ?? @@ -240,11 +287,11 @@ void news_r3k_state::cpu_map(address_map &map) map(0x1fec0000, 0x1fec0003).rw(m_scc, FUNC(z80scc_device::ab_dc_r), FUNC(z80scc_device::ab_dc_w)); map(0x1ff40000, 0x1ff407ff).rw(m_rtc, FUNC(m48t02_device::read), FUNC(m48t02_device::write)); - map(0x1ff60000, 0x1ff6001b).lw8([this](offs_t offset, u8 data) { LOG("crtc offset %x 0x%02x\n", offset, data); }, "lfbm_crtc_w"); // TODO: HD64646FS + map(0x1ff80000, 0x1ff80003).rw(m_net, FUNC(am7990_device::regs_r), FUNC(am7990_device::regs_w)); map(0x1ffc0000, 0x1ffc3fff).lrw16( - [this](offs_t offset) { return m_net_ram[offset]; }, "net_ram_r", - [this](offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_net_ram[offset]); }, "net_ram_w"); + [this] (offs_t offset) { return m_net_ram[offset]; }, "net_ram_r", + [this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_net_ram[offset]); }, "net_ram_w"); } static INPUT_PORTS_START(nws3260) @@ -277,7 +324,30 @@ static INPUT_PORTS_START(nws3260) PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) INPUT_PORTS_END -u32 news_r3k_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect) +static INPUT_PORTS_START(nws3410) + PORT_START("SW2") + PORT_DIPNAME(0x07000000, 0x02000000, "Console") PORT_DIPLOCATION("SW2:1,2,3") + PORT_DIPSETTING(0x00000000, "Serial") + PORT_DIPSETTING(0x02000000, "NWB-252/NWB-253") // NWB-252 (color) or NWB-253 (monochrome) NWS-3400 series bitmap board + PORT_DIPSETTING(0x07000000, "NWB-514/NWB-251") // NWB-514 (monochrome) or NWB-251 (color) expansion framebuffer + PORT_DIPNAME(0x08000000, 0x00000000, "Boot Device") PORT_DIPLOCATION("SW2:4") + PORT_DIPSETTING(0x00000000, "Disk") + PORT_DIPSETTING(0x08000000, "Network") + PORT_DIPNAME(0x10000000, 0x00000000, "Automatic Boot") PORT_DIPLOCATION("SW2:5") + PORT_DIPSETTING(0x00000000, DEF_STR(Off)) + PORT_DIPSETTING(0x10000000, DEF_STR(On)) + PORT_DIPNAME(0x20000000, 0x00000000, "Diagnostic Mode") PORT_DIPLOCATION("SW2:6") + PORT_DIPSETTING(0x00000000, DEF_STR(Off)) + PORT_DIPSETTING(0x20000000, DEF_STR(On)) + PORT_DIPNAME(0x40000000, 0x00000000, "RAM") PORT_DIPLOCATION("SW2:7") // Controls "No Memory Mode" for testing, forces monitor to use RTC RAM instead + PORT_DIPSETTING(0x00000000, "Enabled") + PORT_DIPSETTING(0x40000000, "Disabled") + PORT_DIPNAME(0x80000000, 0x00000000, "Console Baud") PORT_DIPLOCATION("SW2:8") + PORT_DIPSETTING(0x00000000, "9600") + PORT_DIPSETTING(0x80000000, "1200") +INPUT_PORTS_END + +u32 nws3260_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect) { if (!m_lcd_enable) return 0; @@ -301,14 +371,14 @@ u32 news_r3k_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, r return 0; } -void news_r3k_state::inten_w(offs_t offset, u16 data, u16 mem_mask) +void news_r3k_base_state::inten_w(offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_inten); int_check(); } -template void news_r3k_state::irq_w(int state) +template void news_r3k_base_state::irq_w(int state) { LOG("irq number %d state %d\n", Number, state); @@ -320,14 +390,14 @@ template void news_r3k_state::irq_w(int stat int_check(); } -void news_r3k_state::intclr_w(offs_t offset, u16 data, u16 mem_mask) +void news_r3k_base_state::intclr_w(offs_t offset, u16 data, u16 mem_mask) { m_intst &= ~(data & mem_mask); int_check(); } -void news_r3k_state::int_check() +void news_r3k_base_state::int_check() { // TODO: assume 44422222 11100000 static int const int_line[] = { INPUT_LINE_IRQ0, INPUT_LINE_IRQ1, INPUT_LINE_IRQ2, INPUT_LINE_IRQ4 }; @@ -345,7 +415,7 @@ void news_r3k_state::int_check() } } -u32 news_r3k_state::bus_error() +u32 news_r3k_base_state::bus_error() { if (!machine().side_effects_disabled()) irq_w(ASSERT_LINE); @@ -353,7 +423,7 @@ u32 news_r3k_state::bus_error() return 0; } -void news_r3k_state::itimer_w(u8 data) +void news_r3k_base_state::itimer_w(u8 data) { LOG("itimer_w 0x%02x (%s)\n", data, machine().describe_context()); @@ -363,12 +433,12 @@ void news_r3k_state::itimer_w(u8 data) m_itimer->adjust(attotime::from_ticks(ticks, 800), 0, attotime::from_ticks(ticks, 800)); } -void news_r3k_state::itimer(s32 param) +void news_r3k_base_state::itimer(s32 param) { irq_w(ASSERT_LINE); } -void news_r3k_state::debug_w(u8 data) +void news_r3k_base_state::debug_w(u8 data) { /* * The low four bits of this register control the diagnostic LEDs labelled 1-4 @@ -403,21 +473,11 @@ static void news_scsi_devices(device_slot_interface &device) device.option_add("cdrom", NSCSI_CDROM); } -void news_r3k_state::common(machine_config &config) +void news_r3k_base_state::common(machine_config &config) { - R3000A(config, m_cpu, 20_MHz_XTAL, 32768, 32768); - m_cpu->set_addrmap(AS_PROGRAM, &news_r3k_state::cpu_map); - m_cpu->set_fpu(mips1_device_base::MIPS_R3010Av4); - - // 3 banks of 4x30-pin SIMMs with parity, first bank is soldered - RAM(config, m_ram); - m_ram->set_default_size("16M"); - // TODO: confirm each bank supports 4x1M or 4x4M - m_ram->set_extra_options("4M,8M,12M,20M,24M,32M,36M,48M"); - DMAC_0448(config, m_dma, 0); m_dma->set_bus(m_cpu, 0); - m_dma->out_int_cb().set(FUNC(news_r3k_state::irq_w)); + m_dma->out_int_cb().set(FUNC(news_r3k_base_state::irq_w)); m_dma->dma_r_cb<1>().set(m_fdc, FUNC(upd72067_device::dma_r)); m_dma->dma_w_cb<1>().set(m_fdc, FUNC(upd72067_device::dma_w)); // TODO: channel 2 audio @@ -426,7 +486,7 @@ void news_r3k_state::common(machine_config &config) M48T02(config, m_rtc); SCC85C30(config, m_scc, 4.9152_MHz_XTAL); - m_scc->out_int_callback().set(FUNC(news_r3k_state::irq_w)); + m_scc->out_int_callback().set(FUNC(news_r3k_base_state::irq_w)); // scc channel A RS232_PORT(config, m_serial[0], default_rs232_devices, nullptr); @@ -445,7 +505,7 @@ void news_r3k_state::common(machine_config &config) m_scc->out_txdb_callback().set(m_serial[1], FUNC(rs232_port_device::write_txd)); AM7990(config, m_net); - m_net->intr_out().set(FUNC(news_r3k_state::irq_w)).invert(); + m_net->intr_out().set(FUNC(news_r3k_base_state::irq_w)).invert(); m_net->dma_in().set([this](offs_t offset) { return m_net_ram[offset >> 1]; }); m_net->dma_out().set([this](offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_net_ram[offset >> 1]); }); @@ -467,14 +527,14 @@ void news_r3k_state::common(machine_config &config) // scsi host adapter NSCSI_CONNECTOR(config, "scsi:7").option_set("cxd1185", CXD1185).clock(16_MHz_XTAL).machine_config( - [this](device_t *device) + [this] (device_t *device) { cxd1185_device &adapter = downcast(*device); adapter.irq_out_cb().set(m_dma, FUNC(dmac_0448_device::irq<0>)); adapter.drq_out_cb().set(m_dma, FUNC(dmac_0448_device::drq<0>)); adapter.port_out_cb().set( - [this](u8 data) + [this] (u8 data) { LOG("floppy %s\n", BIT(data, 0) ? "mount" : "eject"); }); @@ -483,18 +543,43 @@ void news_r3k_state::common(machine_config &config) subdevice(":dma")->dma_w_cb<0>().set(adapter, FUNC(cxd1185_device::dma_w)); }); + NEWS_HID_HLE(config, m_hid); + m_hid->irq_out().set(FUNC(news_r3k_base_state::irq_w)); + m_hid->irq_out().set(FUNC(news_r3k_base_state::irq_w)); +} + +void nws3260_state::nws3260(machine_config &config) +{ + R3000A(config, m_cpu, 20_MHz_XTAL, 32768, 32768); + m_cpu->set_fpu(mips1_device_base::MIPS_R3010Av4); + m_cpu->set_addrmap(AS_PROGRAM, &nws3260_state::nws3260_map); + + // 3 banks of 4x30-pin SIMMs with parity, first bank is soldered + RAM(config, m_ram); + m_ram->set_default_size("16M"); + // TODO: confirm each bank supports 4x1M or 4x4M + m_ram->set_extra_options("4M,8M,12M,20M,24M,32M,36M,48M"); + common(config); + + // Integrated LCD panel SCREEN(config, m_lcd, SCREEN_TYPE_LCD); m_lcd->set_raw(52416000, 1120, 0, 1120, 780, 0, 780); - m_lcd->set_screen_update(FUNC(news_r3k_state::screen_update)); - - NEWS_HID_HLE(config, m_hid); - m_hid->irq_out().set(FUNC(news_r3k_state::irq_w)); - m_hid->irq_out().set(FUNC(news_r3k_state::irq_w)); + m_lcd->set_screen_update(FUNC(nws3260_state::screen_update)); } -void news_r3k_state::nws3260(machine_config &config) +void nws3410_state::nws3410(machine_config &config) { + R3000A(config, m_cpu, 20_MHz_XTAL, 65536, 65536); + m_cpu->set_fpu(mips1_device_base::MIPS_R3010Av4); + m_cpu->set_addrmap(AS_PROGRAM, &nws3410_state::nws3410_map); + + // Per the service manual, one or more NWA-029 4MB expansion kits can be used to increase from the base 8M up to 16M + RAM(config, m_ram); + m_ram->set_default_size("8M"); + m_ram->set_extra_options("12M,16M"); common(config); + + m_serial[0]->set_default_option("terminal"); // No framebuffer emulation yet } ROM_START(nws3260) @@ -523,8 +608,18 @@ ROM_START(nws3260) ROM_LOAD("idrom.bin", 0x000, 0x100, CRC(17a3d9c6) SHA1(d300e6908210f540951211802c38ad7f8037aa15) BAD_DUMP) ROM_END +ROM_START(nws3410) + ROM_REGION32_BE(0x20000, "eprom", 0) + ROM_SYSTEM_BIOS(0, "nws3410", "NWS-3410 v2.0") + ROMX_LOAD("sony_nws-3410_mpu-12_v2_rom.bin", 0x00000, 0x20000, CRC(48a726c4) SHA1(5c6e9e6bccaaa3d63bc136355a436c17c49c9876), ROM_BIOS(0)) + + ROM_REGION32_BE(0x100, "idrom", 0) + ROM_LOAD("idrom.bin", 0x000, 0x100, CRC(661e2516) SHA1(f0dca34174747321dad6f48c466e1c549b797d2e) BAD_DUMP) +ROM_END + } // anonymous namespace -/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP(1991, nws3260, 0, 0, nws3260, nws3260, news_r3k_state, init_common, "Sony", "NWS-3260", MACHINE_NO_SOUND) +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP(1991, nws3260, 0, 0, nws3260, nws3260, nws3260_state, init_common, "Sony", "NWS-3260", MACHINE_NO_SOUND) +COMP(1991, nws3410, 0, 0, nws3410, nws3410, nws3410_state, init_common, "Sony", "NWS-3410", MACHINE_NO_SOUND) -- cgit v1.2.3