From c563c79ccc020358247ca89c1d9abe3de7a5a1a7 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Tue, 11 Nov 2014 15:55:41 +0100 Subject: i6300esb: More more more [O. Galibert] --- src/emu/machine/i6300esb.c | 286 +++++++++++++++++++++++++++++++++++++++++++-- src/emu/machine/i6300esb.h | 49 +++++++- src/emu/machine/i82875p.c | 3 +- src/emu/machine/pci.c | 42 +++++-- src/emu/machine/pci.h | 4 + 5 files changed, 359 insertions(+), 25 deletions(-) diff --git a/src/emu/machine/i6300esb.c b/src/emu/machine/i6300esb.c index 5b594f115ee..21ccf4c1445 100644 --- a/src/emu/machine/i6300esb.c +++ b/src/emu/machine/i6300esb.c @@ -20,16 +20,43 @@ void i6300esb_watchdog_device::device_start() void i6300esb_watchdog_device::device_reset() { pci_device::device_reset(); + command = 0x000f; + command_mask = 0x0140; + status = 0x0280; } DEVICE_ADDRESS_MAP_START(config_map, 32, i6300esb_lpc_device) - AM_RANGE(0x58, 0x5b) AM_READWRITE (gpio_base_r, gpio_base_w) - AM_RANGE(0x5c, 0x5f) AM_READWRITE8 (gpio_cntl_r, gpio_cntl_w, 0x000000ff) - AM_RANGE(0xe4, 0xe7) AM_READWRITE16(gen1_dec_r, gen1_dec_w, 0x0000ffff) - AM_RANGE(0xe4, 0xe7) AM_READWRITE16(lpc_en_r, lpc_en_w, 0xffff0000) - AM_RANGE(0xe8, 0xeb) AM_READWRITE (fwh_sel1_r, fwh_sel1_w) - AM_RANGE(0xfc, 0xff) AM_READWRITE (unk_fc_r, unk_fc_w) + AM_RANGE(0x40, 0x43) AM_READWRITE (pmbase_r, pmbase_w) + AM_RANGE(0x44, 0x47) AM_READWRITE8 (acpi_cntl_r, acpi_cntl_w, 0x000000ff) + AM_RANGE(0x4c, 0x4f) AM_READWRITE16(bios_cntl_r, bios_cntl_w, 0xffff0000) + AM_RANGE(0x54, 0x57) AM_READWRITE8 (tco_cntl_r, tco_cntl_w, 0x000000ff) + AM_RANGE(0x58, 0x5b) AM_READWRITE (gpio_base_r, gpio_base_w) + AM_RANGE(0x5c, 0x5f) AM_READWRITE8 (gpio_cntl_r, gpio_cntl_w, 0x000000ff) + AM_RANGE(0x60, 0x63) AM_READWRITE8 (pirq_rout_r, pirq_rout_w, 0xffffffff) + AM_RANGE(0x64, 0x67) AM_READWRITE8 (serirq_cntl_r, serirq_cntl_w, 0x000000ff) + AM_RANGE(0x68, 0x6b) AM_READWRITE8 (pirq2_rout_r, pirq2_rout_w, 0xffffffff) + AM_RANGE(0x88, 0x8b) AM_READWRITE8 (d31_err_cfg_r, d31_err_cfg_w, 0x000000ff) + AM_RANGE(0x88, 0x8b) AM_READWRITE8 (d31_err_sts_r, d31_err_sts_w, 0x00ff0000) + AM_RANGE(0x90, 0x93) AM_READWRITE16(pci_dma_cfg_r, pci_dma_cfg_w, 0x0000ffff) + AM_RANGE(0xd0, 0xd3) AM_READWRITE (gen_cntl_r, gen_cntl_w) + AM_RANGE(0xd4, 0xd7) AM_READWRITE8 (gen_sta_r, gen_sta_w, 0x000000ff) + AM_RANGE(0xd4, 0xd7) AM_READWRITE8 (back_cntl_r, back_cntl_w, 0x0000ff00) + AM_RANGE(0xd8, 0xdb) AM_READWRITE8 (rtc_conf_r, rtc_conf_w, 0x000000ff) + AM_RANGE(0xe0, 0xe3) AM_READWRITE8 (lpc_if_com_range_r, lpc_if_com_range_w, 0x000000ff) + AM_RANGE(0xe0, 0xe3) AM_READWRITE8 (lpc_if_fdd_lpt_range_r, lpc_if_fdd_lpt_range_w, 0x0000ff00) + AM_RANGE(0xe0, 0xe3) AM_READWRITE8 (lpc_if_sound_range_r, lpc_if_sound_range_w, 0x00ff0000) + AM_RANGE(0xe0, 0xe3) AM_READWRITE8 (fwh_dec_en1_r, fwh_dec_en1_w, 0xff000000) + AM_RANGE(0xe4, 0xe7) AM_READWRITE16(gen1_dec_r, gen1_dec_w, 0x0000ffff) + AM_RANGE(0xe4, 0xe7) AM_READWRITE16(lpc_en_r, lpc_en_w, 0xffff0000) + AM_RANGE(0xe8, 0xeb) AM_READWRITE (fwh_sel1_r, fwh_sel1_w) + AM_RANGE(0xec, 0xef) AM_READWRITE16(gen2_dec_r, gen2_dec_w, 0x0000ffff) + AM_RANGE(0xec, 0xef) AM_READWRITE16(fwh_sel2_r, fwh_sel2_w, 0xffff0000) + AM_RANGE(0xf0, 0xf3) AM_READWRITE8 (fwh_dec_en2_r, fwh_dec_en2_w, 0x000000ff) + AM_RANGE(0xf0, 0xf3) AM_READWRITE16(func_dis_r, func_dis_w, 0xffff0000) + AM_RANGE(0xf4, 0xf7) AM_READWRITE (etr1_r, etr1_w) + AM_RANGE(0xf8, 0xfb) AM_READ (mfid_r) + AM_RANGE(0xfc, 0xff) AM_READWRITE (unk_fc_r, unk_fc_w) AM_INHERIT_FROM(pci_device::config_map) ADDRESS_MAP_END @@ -58,21 +85,85 @@ void i6300esb_lpc_device::device_start() void i6300esb_lpc_device::device_reset() { pci_device::device_reset(); + tco_cntl = 0x00; + serirq_cntl = 0x10; + memset(pirq_rout, 0x80, sizeof(pirq_rout)); + d31_err_cfg = 0x00; + d31_err_sts = 0x00; + pci_dma_cfg = 0x0000; + rtc_conf = 0x00; + func_dis = 0x0080; + etr1 = 0x00000000; siu_config_port = 0; siu_config_state = 0; } void i6300esb_lpc_device::reset_all_mappings() { + pci_device::reset_all_mappings(); + + pmbase = 0; + acpi_cntl = 0; gpio_base = 0; gpio_cntl = 0x00; + back_cntl = 0x0f; lpc_if_com_range = 0x00; lpc_if_fdd_lpt_range = 0x00; lpc_if_sound_range = 0x00; fwh_dec_en1 = 0xff; + fwh_dec_en2 = 0x0f; gen1_dec = 0x0000; lpc_en = 0x0000; fwh_sel1 = 0x00112233; + gen_cntl = 0x00000080; +} + +READ32_MEMBER (i6300esb_lpc_device::pmbase_r) +{ + return pmbase | 1; +} + +WRITE32_MEMBER(i6300esb_lpc_device::pmbase_w) +{ + COMBINE_DATA(&pmbase); + pmbase &= 0x0000ff80; + logerror("%s: pmbase = %08x\n", tag(), pmbase); + remap_cb(); +} + +READ8_MEMBER (i6300esb_lpc_device::acpi_cntl_r) +{ + return acpi_cntl; +} + +WRITE8_MEMBER(i6300esb_lpc_device::acpi_cntl_w) +{ + acpi_cntl = data; + logerror("%s: acpi_cntl = %08x\n", tag(), acpi_cntl); + remap_cb(); +} + +READ16_MEMBER (i6300esb_lpc_device::bios_cntl_r) +{ + return pmbase | 1; +} + +WRITE16_MEMBER(i6300esb_lpc_device::bios_cntl_w) +{ + COMBINE_DATA(&bios_cntl); + logerror("%s: bios_cntl = %08x\n", tag(), bios_cntl); + remap_cb(); +} + +READ8_MEMBER (i6300esb_lpc_device::tco_cntl_r) +{ + return tco_cntl; +} + +WRITE8_MEMBER (i6300esb_lpc_device::tco_cntl_w) +{ + tco_cntl = data; + logerror("%s: tco_cntl = %02x\n", tag(), tco_cntl); } READ32_MEMBER (i6300esb_lpc_device::gpio_base_r) @@ -95,11 +186,121 @@ READ8_MEMBER (i6300esb_lpc_device::gpio_cntl_r) WRITE8_MEMBER (i6300esb_lpc_device::gpio_cntl_w) { - COMBINE_DATA(&gpio_cntl); + gpio_cntl = data; logerror("%s: gpio_cntl = %02x\n", tag(), gpio_cntl); remap_cb(); } +READ8_MEMBER (i6300esb_lpc_device::pirq_rout_r) +{ + return pirq_rout[offset]; +} + +WRITE8_MEMBER (i6300esb_lpc_device::pirq_rout_w) +{ + pirq_rout[offset] = data; + logerror("%s: pirq_rout[%d] = %02x\n", tag(), offset, pirq_rout[offset]); +} + +READ8_MEMBER (i6300esb_lpc_device::serirq_cntl_r) +{ + return serirq_cntl; +} + +WRITE8_MEMBER (i6300esb_lpc_device::serirq_cntl_w) +{ + serirq_cntl = data; + logerror("%s: serirq_cntl = %02x\n", tag(), serirq_cntl); +} + +READ8_MEMBER (i6300esb_lpc_device::pirq2_rout_r) +{ + return pirq_rout_r(space, offset+4); +} + +WRITE8_MEMBER (i6300esb_lpc_device::pirq2_rout_w) +{ + pirq_rout_w(space, offset+4, data); +} + +READ8_MEMBER (i6300esb_lpc_device::d31_err_cfg_r) +{ + return d31_err_cfg; +} + +WRITE8_MEMBER (i6300esb_lpc_device::d31_err_cfg_w) +{ + d31_err_cfg = data; + logerror("%s: d31_err_cfg = %02x\n", tag(), d31_err_cfg); +} + +READ8_MEMBER (i6300esb_lpc_device::d31_err_sts_r) +{ + return d31_err_sts; +} + +WRITE8_MEMBER (i6300esb_lpc_device::d31_err_sts_w) +{ + d31_err_sts &= ~data; + logerror("%s: d31_err_sts = %02x\n", tag(), d31_err_sts); +} + +READ16_MEMBER (i6300esb_lpc_device::pci_dma_cfg_r) +{ + return pci_dma_cfg; +} + +WRITE16_MEMBER(i6300esb_lpc_device::pci_dma_cfg_w) +{ + COMBINE_DATA(&pci_dma_cfg); + logerror("%s: pci_dma_cfg = %04x\n", tag(), pci_dma_cfg); +} + +READ32_MEMBER (i6300esb_lpc_device::gen_cntl_r) +{ + return gen_cntl; +} + +WRITE32_MEMBER(i6300esb_lpc_device::gen_cntl_w) +{ + COMBINE_DATA(&gen_cntl); + logerror("%s: gen_cntl = %08x\n", tag(), gen_cntl); +} + +READ8_MEMBER (i6300esb_lpc_device::gen_sta_r) +{ + return gen_sta; +} + +WRITE8_MEMBER (i6300esb_lpc_device::gen_sta_w) +{ + gen_sta = data; + logerror("%s: gen_sta = %02x\n", tag(), gen_sta); +} + +READ8_MEMBER (i6300esb_lpc_device::back_cntl_r) +{ + return back_cntl; +} + +WRITE8_MEMBER (i6300esb_lpc_device::back_cntl_w) +{ + back_cntl = data; + logerror("%s: back_cntl = %02x\n", tag(), back_cntl); + remap_cb(); +} + +READ8_MEMBER (i6300esb_lpc_device::rtc_conf_r) +{ + return rtc_conf; +} + +WRITE8_MEMBER (i6300esb_lpc_device::rtc_conf_w) +{ + rtc_conf = data; + logerror("%s: rtc_conf = %02x\n", tag(), rtc_conf); +} + READ8_MEMBER (i6300esb_lpc_device::lpc_if_com_range_r) { return lpc_if_com_range; @@ -107,8 +308,8 @@ READ8_MEMBER (i6300esb_lpc_device::lpc_if_com_range_r) WRITE8_MEMBER (i6300esb_lpc_device::lpc_if_com_range_w) { - COMBINE_DATA(&lpc_if_com_range); - logerror("%s: lpc_if_com_range = %02x\n", tag(), lpc_if_com_range); + lpc_if_com_range = data; + logerror("%s: lpc_if_com_range = %02x\n", tag(), lpc_if_com_range); remap_cb(); } @@ -184,6 +385,68 @@ WRITE32_MEMBER(i6300esb_lpc_device::fwh_sel1_w) remap_cb(); } +READ16_MEMBER (i6300esb_lpc_device::gen2_dec_r) +{ + return gen2_dec; +} + +WRITE16_MEMBER(i6300esb_lpc_device::gen2_dec_w) +{ + COMBINE_DATA(&gen2_dec); + logerror("%s: gen2_dec = %04x\n", tag(), gen2_dec); + remap_cb(); +} + +READ16_MEMBER (i6300esb_lpc_device::fwh_sel2_r) +{ + return fwh_sel2; +} + +WRITE16_MEMBER(i6300esb_lpc_device::fwh_sel2_w) +{ + COMBINE_DATA(&fwh_sel2); + logerror("%s: fwh_sel2 = %04x\n", tag(), fwh_sel2); + remap_cb(); +} + +READ8_MEMBER (i6300esb_lpc_device::fwh_dec_en2_r) +{ + return fwh_dec_en2; +} + +WRITE8_MEMBER (i6300esb_lpc_device::fwh_dec_en2_w) +{ + fwh_dec_en2 = data; + logerror("%s: fwh_dec_en2 = %02x\n", tag(), fwh_dec_en2); + remap_cb(); +} + +READ16_MEMBER (i6300esb_lpc_device::func_dis_r) +{ + return func_dis; +} + +WRITE16_MEMBER(i6300esb_lpc_device::func_dis_w) +{ + COMBINE_DATA(&func_dis); + logerror("%s: func_dis = %04x\n", tag(), func_dis); +} + +READ32_MEMBER (i6300esb_lpc_device::etr1_r) +{ + return etr1; +} + +WRITE32_MEMBER(i6300esb_lpc_device::etr1_w) +{ + logerror("%s: etr1 = %08x\n", tag(), data); +} + +READ32_MEMBER (i6300esb_lpc_device::mfid_r) +{ + return 0xf66; +} + READ32_MEMBER (i6300esb_lpc_device::unk_fc_r) { logerror("%s: read undocumented config reg fc\n", tag()); @@ -289,5 +552,10 @@ void i6300esb_lpc_device::map_extra(UINT64 memory_window_start, UINT64 memory_wi } io_space->install_device(0, 0xffff, *this, &i6300esb_lpc_device::internal_io_map); + + if(acpi_cntl & 0x10) + logerror("%s: Warning: acpi range enabled at %04x-%04x\n", tag(), pmbase, pmbase+127); + if(gpio_cntl & 0x10) + logerror("%s: Warning: gpio range enabled at %04x-%04x\n", tag(), gpio_base, gpio_base+63); } diff --git a/src/emu/machine/i6300esb.h b/src/emu/machine/i6300esb.h index ec6dfbb5995..87065d0701c 100644 --- a/src/emu/machine/i6300esb.h +++ b/src/emu/machine/i6300esb.h @@ -29,19 +29,48 @@ protected: private: DECLARE_ADDRESS_MAP(internal_io_map, 32); - UINT32 gpio_base, fwh_sel1; - UINT16 gen1_dec, lpc_en; - UINT8 gpio_cntl, lpc_if_com_range, lpc_if_fdd_lpt_range, lpc_if_sound_range, fwh_dec_en1, siu_config_port; + UINT32 pmbase, gpio_base, fwh_sel1, gen_cntl, etr1; + UINT16 bios_cntl, pci_dma_cfg, gen1_dec, lpc_en, gen2_dec, fwh_sel2, func_dis; + UINT8 pirq_rout[8]; + UINT8 acpi_cntl, tco_cntl, gpio_cntl, serirq_cntl, d31_err_cfg, d31_err_sts, gen_sta, back_cntl, rtc_conf; + UINT8 lpc_if_com_range, lpc_if_fdd_lpt_range, lpc_if_sound_range, fwh_dec_en1, fwh_dec_en2, siu_config_port; int siu_config_state; DECLARE_WRITE8_MEMBER (nop_w); // configuration space registers + DECLARE_READ32_MEMBER (pmbase_r); // 40 + DECLARE_WRITE32_MEMBER(pmbase_w); + DECLARE_READ8_MEMBER (acpi_cntl_r); // 44 + DECLARE_WRITE8_MEMBER (acpi_cntl_w); + DECLARE_READ16_MEMBER (bios_cntl_r); // 4e + DECLARE_WRITE16_MEMBER(bios_cntl_w); + DECLARE_READ8_MEMBER (tco_cntl_r); // 54 + DECLARE_WRITE8_MEMBER (tco_cntl_w); DECLARE_READ32_MEMBER (gpio_base_r); // 58 DECLARE_WRITE32_MEMBER(gpio_base_w); DECLARE_READ8_MEMBER (gpio_cntl_r); // 5c DECLARE_WRITE8_MEMBER (gpio_cntl_w); - + DECLARE_READ8_MEMBER (pirq_rout_r); // 60-63 + DECLARE_WRITE8_MEMBER (pirq_rout_w); + DECLARE_READ8_MEMBER (serirq_cntl_r); // 64 + DECLARE_WRITE8_MEMBER (serirq_cntl_w); + DECLARE_READ8_MEMBER (pirq2_rout_r); // 68-6b + DECLARE_WRITE8_MEMBER (pirq2_rout_w); + DECLARE_READ8_MEMBER (d31_err_cfg_r); // 88 + DECLARE_WRITE8_MEMBER (d31_err_cfg_w); + DECLARE_READ8_MEMBER (d31_err_sts_r); // 8a + DECLARE_WRITE8_MEMBER (d31_err_sts_w); + DECLARE_READ16_MEMBER (pci_dma_cfg_r); // 90 + DECLARE_WRITE16_MEMBER(pci_dma_cfg_w); + DECLARE_READ32_MEMBER (gen_cntl_r); // d0 + DECLARE_WRITE32_MEMBER(gen_cntl_w); + DECLARE_READ8_MEMBER (gen_sta_r); // d4 + DECLARE_WRITE8_MEMBER (gen_sta_w); + DECLARE_READ8_MEMBER (back_cntl_r); // d5 + DECLARE_WRITE8_MEMBER (back_cntl_w); + DECLARE_READ8_MEMBER (rtc_conf_r); // d8 + DECLARE_WRITE8_MEMBER (rtc_conf_w); DECLARE_READ8_MEMBER (lpc_if_com_range_r); // e0 DECLARE_WRITE8_MEMBER (lpc_if_com_range_w); DECLARE_READ8_MEMBER (lpc_if_fdd_lpt_range_r); // e1 @@ -56,7 +85,17 @@ private: DECLARE_WRITE16_MEMBER(lpc_en_w); DECLARE_READ32_MEMBER (fwh_sel1_r); // e8 DECLARE_WRITE32_MEMBER(fwh_sel1_w); - + DECLARE_READ16_MEMBER (gen2_dec_r); // ec + DECLARE_WRITE16_MEMBER(gen2_dec_w); + DECLARE_READ16_MEMBER (fwh_sel2_r); // ee + DECLARE_WRITE16_MEMBER(fwh_sel2_w); + DECLARE_READ8_MEMBER (fwh_dec_en2_r); // f0 + DECLARE_WRITE8_MEMBER (fwh_dec_en2_w); + DECLARE_READ16_MEMBER (func_dis_r); // f2 + DECLARE_WRITE16_MEMBER(func_dis_w); + DECLARE_READ32_MEMBER (etr1_r); // f4 + DECLARE_WRITE32_MEMBER(etr1_w); + DECLARE_READ32_MEMBER (mfid_r); // f8 DECLARE_READ32_MEMBER (unk_fc_r); // fc DECLARE_WRITE32_MEMBER(unk_fc_w); diff --git a/src/emu/machine/i82875p.c b/src/emu/machine/i82875p.c index ca95608d13d..a3985cc606c 100644 --- a/src/emu/machine/i82875p.c +++ b/src/emu/machine/i82875p.c @@ -71,6 +71,7 @@ void i82875p_host_device::device_start() io_window_start = 0; io_window_end = 0xffff; io_offset = 0; + status = 0x0010; ram.resize(ram_size/4); @@ -339,7 +340,7 @@ void i82875p_host_device::map_extra(UINT64 memory_window_start, UINT64 memory_wi if(top > ram_size) top = ram_size; - memory_space->install_ram (0x00000000, 0x0007ffff, &ram[0x00000000/4]); + memory_space->install_ram (0x00000000, 0x0009ffff, &ram[0x00000000/4]); if(smram & 0x40) memory_space->install_ram (0x000a0000, 0x000bffff, &ram[0x000a0000/4]); diff --git a/src/emu/machine/pci.c b/src/emu/machine/pci.c index 7900a5b08a7..13ae0cd26a2 100644 --- a/src/emu/machine/pci.c +++ b/src/emu/machine/pci.c @@ -4,19 +4,21 @@ const device_type PCI_ROOT = &device_creator; const device_type PCI_BRIDGE = &device_creator; DEVICE_ADDRESS_MAP_START(config_map, 32, pci_device) - AM_RANGE(0x00, 0x03) AM_READ16(vendor_r, 0x0000ffff) - AM_RANGE(0x00, 0x03) AM_READ16(device_r, 0xffff0000) + AM_RANGE(0x00, 0x03) AM_READ16 (vendor_r, 0x0000ffff) + AM_RANGE(0x00, 0x03) AM_READ16 (device_r, 0xffff0000) + AM_RANGE(0x04, 0x07) AM_READWRITE16(command_r, command_w, 0x0000ffff) + AM_RANGE(0x04, 0x07) AM_READ16 (status_r, 0xffff0000) - AM_RANGE(0x08, 0x0b) AM_READ (class_rev_r) - AM_RANGE(0x0c, 0x0f) AM_READ8 (cache_line_size_r, 0x000000ff) - AM_RANGE(0x0c, 0x0f) AM_READ8 (latency_timer_r, 0x0000ff00) - AM_RANGE(0x0c, 0x0f) AM_READ8 (header_type_r, 0x00ff0000) - AM_RANGE(0x0c, 0x0f) AM_READ8 (bist_r, 0xff000000) + AM_RANGE(0x08, 0x0b) AM_READ (class_rev_r) + AM_RANGE(0x0c, 0x0f) AM_READ8 (cache_line_size_r, 0x000000ff) + AM_RANGE(0x0c, 0x0f) AM_READ8 (latency_timer_r, 0x0000ff00) + AM_RANGE(0x0c, 0x0f) AM_READ8 (header_type_r, 0x00ff0000) + AM_RANGE(0x0c, 0x0f) AM_READ8 (bist_r, 0xff000000) - AM_RANGE(0x2c, 0x2f) AM_READ16(subvendor_r, 0x0000ffff) - AM_RANGE(0x2c, 0x2f) AM_READ16(subsystem_r, 0xffff0000) + AM_RANGE(0x2c, 0x2f) AM_READ16 (subvendor_r, 0x0000ffff) + AM_RANGE(0x2c, 0x2f) AM_READ16 (subsystem_r, 0xffff0000) - AM_RANGE(0x34, 0x37) AM_READ8 (capptr_r, 0x000000ff) + AM_RANGE(0x34, 0x37) AM_READ8 (capptr_r, 0x000000ff) ADDRESS_MAP_END pci_device::pci_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) @@ -38,6 +40,9 @@ void pci_device::set_ids(UINT32 _main_id, UINT8 _revision, UINT32 _pclass, UINT3 void pci_device::device_start() { + command = 0x0080; + command_mask = 0x01bf; + status = 0x0000; } void pci_device::device_reset() @@ -54,6 +59,23 @@ READ16_MEMBER(pci_device::device_r) return main_id; } +READ16_MEMBER(pci_device::command_r) +{ + return command; +} + +WRITE16_MEMBER(pci_device::command_w) +{ + mem_mask &= command_mask; + COMBINE_DATA(&command); + logerror("%s: command = %04x\n", tag(), command); +} + +READ16_MEMBER(pci_device::status_r) +{ + return status; +} + READ32_MEMBER(pci_device::class_rev_r) { return (pclass << 8) | revision; diff --git a/src/emu/machine/pci.h b/src/emu/machine/pci.h index a14e90959a4..456a15b672e 100644 --- a/src/emu/machine/pci.h +++ b/src/emu/machine/pci.h @@ -45,6 +45,9 @@ public: DECLARE_READ16_MEMBER(vendor_r); DECLARE_READ16_MEMBER(device_r); + DECLARE_READ16_MEMBER(command_r); + DECLARE_WRITE16_MEMBER(command_w); + DECLARE_READ16_MEMBER(status_r); DECLARE_READ32_MEMBER(class_rev_r); virtual DECLARE_READ8_MEMBER(cache_line_size_r); virtual DECLARE_READ8_MEMBER(latency_timer_r); @@ -66,6 +69,7 @@ protected: UINT32 main_id, subsystem_id; UINT32 pclass; UINT8 revision; + UINT16 command, command_mask, status; virtual void device_start(); virtual void device_reset(); -- cgit v1.2.3