From bd592b0049e79eeba060f009653f981721e7a217 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Thu, 19 Jan 2023 13:56:37 +0100 Subject: m68000: Correct when interrupt testing happens, fixes stop --- src/devices/cpu/m68000/m68000-sdf.cpp | 3497 ++++++++++++++--------------- src/devices/cpu/m68000/m68000-sdfm.cpp | 3497 ++++++++++++++--------------- src/devices/cpu/m68000/m68000-sdp.cpp | 3773 ++++++++++++++++---------------- src/devices/cpu/m68000/m68000-sdpm.cpp | 3773 ++++++++++++++++---------------- src/devices/cpu/m68000/m68000-sif.cpp | 3497 ++++++++++++++--------------- src/devices/cpu/m68000/m68000-sifm.cpp | 3497 ++++++++++++++--------------- src/devices/cpu/m68000/m68000-sip.cpp | 3773 ++++++++++++++++---------------- src/devices/cpu/m68000/m68000-sipm.cpp | 3773 ++++++++++++++++---------------- src/devices/cpu/m68000/m68000gen.py | 2 +- 9 files changed, 14849 insertions(+), 14233 deletions(-) diff --git a/src/devices/cpu/m68000/m68000-sdf.cpp b/src/devices/cpu/m68000/m68000-sdf.cpp index 159ee1ba03d..23bd9b11bb2 100644 --- a/src/devices/cpu/m68000/m68000-sdf.cpp +++ b/src/devices/cpu/m68000/m68000-sdf.cpp @@ -10,6 +10,7 @@ void m68000_device::state_reset_df() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -139,11 +140,11 @@ void m68000_device::state_reset_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -258,6 +259,7 @@ void m68000_device::state_bus_error_df() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -416,11 +418,11 @@ void m68000_device::state_bus_error_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -535,6 +537,7 @@ void m68000_device::state_address_error_df() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -693,11 +696,11 @@ void m68000_device::state_address_error_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -796,10 +799,10 @@ void m68000_device::state_interrupt_df() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -918,11 +921,11 @@ void m68000_device::state_interrupt_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1101,11 +1104,11 @@ void m68000_device::state_trace_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1284,11 +1287,11 @@ void m68000_device::state_illegal_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1467,11 +1470,11 @@ void m68000_device::state_priviledge_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1650,11 +1653,11 @@ void m68000_device::state_linea_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1833,11 +1836,11 @@ void m68000_device::state_linef_df() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1893,13 +1896,13 @@ void m68000_device::ori_b_imm8_ds_df() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1980,7 +1983,6 @@ void m68000_device::ori_b_imm8_ais_df() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2007,6 +2009,7 @@ void m68000_device::ori_b_imm8_ais_df() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2085,7 +2088,6 @@ void m68000_device::ori_b_imm8_aips_df() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2112,6 +2114,7 @@ void m68000_device::ori_b_imm8_aips_df() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2192,7 +2195,6 @@ void m68000_device::ori_b_imm8_pais_df() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2219,6 +2221,7 @@ void m68000_device::ori_b_imm8_pais_df() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2315,7 +2318,6 @@ void m68000_device::ori_b_imm8_das_df() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2342,6 +2344,7 @@ void m68000_device::ori_b_imm8_das_df() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2478,7 +2481,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2505,6 +2507,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2600,7 +2603,6 @@ void m68000_device::ori_b_imm8_adr16_df() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2627,6 +2629,7 @@ void m68000_device::ori_b_imm8_adr16_df() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2744,7 +2747,6 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2771,6 +2773,7 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2865,12 +2868,12 @@ void m68000_device::ori_imm8_ccr_df() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2927,13 +2930,13 @@ void m68000_device::ori_w_imm16_ds_df() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3017,7 +3020,6 @@ void m68000_device::ori_w_imm16_ais_df() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3044,6 +3046,7 @@ void m68000_device::ori_w_imm16_ais_df() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3130,7 +3133,6 @@ void m68000_device::ori_w_imm16_aips_df() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3157,6 +3159,7 @@ void m68000_device::ori_w_imm16_aips_df() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3245,7 +3248,6 @@ void m68000_device::ori_w_imm16_pais_df() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3272,6 +3274,7 @@ void m68000_device::ori_w_imm16_pais_df() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3376,7 +3379,6 @@ void m68000_device::ori_w_imm16_das_df() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3403,6 +3405,7 @@ void m68000_device::ori_w_imm16_das_df() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3547,7 +3550,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3574,6 +3576,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3677,7 +3680,6 @@ void m68000_device::ori_w_imm16_adr16_df() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3704,6 +3706,7 @@ void m68000_device::ori_w_imm16_adr16_df() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3829,7 +3832,6 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3856,6 +3858,7 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3961,12 +3964,12 @@ void m68000_device::ori_i16u_sr_df() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4045,7 +4048,6 @@ void m68000_device::ori_l_imm32_ds_df() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4078,6 +4080,7 @@ void m68000_device::ori_l_imm32_ds_df() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4187,7 +4190,6 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4237,6 +4239,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4365,7 +4368,6 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4415,6 +4417,7 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4544,7 +4547,6 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4594,6 +4596,7 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4740,7 +4743,6 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4790,6 +4792,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4976,7 +4979,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5026,6 +5028,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -5175,7 +5178,6 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5225,6 +5227,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -5396,7 +5399,6 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5446,6 +5448,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -5479,7 +5482,6 @@ void m68000_device::btst_dd_ds_df() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -5517,6 +5519,7 @@ void m68000_device::btst_dd_ds_df() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -5530,6 +5533,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -5588,7 +5592,6 @@ void m68000_device::movep_w_das_dd_df() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -5608,6 +5611,7 @@ void m68000_device::movep_w_das_dd_df() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5666,7 +5670,6 @@ void m68000_device::btst_dd_ais_df() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5674,6 +5677,7 @@ void m68000_device::btst_dd_ais_df() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5734,7 +5738,6 @@ void m68000_device::btst_dd_aips_df() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5742,6 +5745,7 @@ void m68000_device::btst_dd_aips_df() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5804,7 +5808,6 @@ void m68000_device::btst_dd_pais_df() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5812,6 +5815,7 @@ void m68000_device::btst_dd_pais_df() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5890,7 +5894,6 @@ void m68000_device::btst_dd_das_df() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5898,6 +5901,7 @@ void m68000_device::btst_dd_das_df() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6016,7 +6020,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6024,6 +6027,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6101,7 +6105,6 @@ void m68000_device::btst_dd_adr16_df() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6109,6 +6112,7 @@ void m68000_device::btst_dd_adr16_df() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6208,7 +6212,6 @@ void m68000_device::btst_dd_adr32_df() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6216,6 +6219,7 @@ void m68000_device::btst_dd_adr32_df() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6293,7 +6297,6 @@ void m68000_device::btst_dd_dpc_df() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6301,6 +6304,7 @@ void m68000_device::btst_dd_dpc_df() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6418,7 +6422,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6426,6 +6429,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6483,7 +6487,6 @@ void m68000_device::btst_dd_imm_df() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -6519,6 +6522,7 @@ void m68000_device::btst_dd_imm_df() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -6532,6 +6536,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -6550,7 +6555,6 @@ void m68000_device::bchg_dd_ds_df() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6588,6 +6592,7 @@ void m68000_device::bchg_dd_ds_df() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6606,6 +6611,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6702,7 +6708,6 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -6722,6 +6727,7 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6780,7 +6786,6 @@ void m68000_device::bchg_dd_ais_df() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6807,6 +6812,7 @@ void m68000_device::bchg_dd_ais_df() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6863,7 +6869,6 @@ void m68000_device::bchg_dd_aips_df() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6890,6 +6895,7 @@ void m68000_device::bchg_dd_aips_df() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6948,7 +6954,6 @@ void m68000_device::bchg_dd_pais_df() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6975,6 +6980,7 @@ void m68000_device::bchg_dd_pais_df() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7049,7 +7055,6 @@ void m68000_device::bchg_dd_das_df() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7076,6 +7081,7 @@ void m68000_device::bchg_dd_das_df() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7190,7 +7196,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7217,6 +7222,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7290,7 +7296,6 @@ void m68000_device::bchg_dd_adr16_df() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7317,6 +7322,7 @@ void m68000_device::bchg_dd_adr16_df() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7412,7 +7418,6 @@ void m68000_device::bchg_dd_adr32_df() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7439,6 +7444,7 @@ void m68000_device::bchg_dd_adr32_df() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7468,7 +7474,6 @@ void m68000_device::bclr_dd_ds_df() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7510,6 +7515,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7532,6 +7538,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7573,7 +7580,6 @@ void m68000_device::movep_w_dd_das_df() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7607,12 +7613,12 @@ void m68000_device::movep_w_dd_das_df() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7668,7 +7674,6 @@ void m68000_device::bclr_dd_ais_df() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7699,6 +7704,7 @@ void m68000_device::bclr_dd_ais_df() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7755,7 +7761,6 @@ void m68000_device::bclr_dd_aips_df() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7786,6 +7791,7 @@ void m68000_device::bclr_dd_aips_df() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7844,7 +7850,6 @@ void m68000_device::bclr_dd_pais_df() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7875,6 +7880,7 @@ void m68000_device::bclr_dd_pais_df() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7949,7 +7955,6 @@ void m68000_device::bclr_dd_das_df() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7980,6 +7985,7 @@ void m68000_device::bclr_dd_das_df() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8094,7 +8100,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8125,6 +8130,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8198,7 +8204,6 @@ void m68000_device::bclr_dd_adr16_df() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8229,6 +8234,7 @@ void m68000_device::bclr_dd_adr16_df() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8324,7 +8330,6 @@ void m68000_device::bclr_dd_adr32_df() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8355,6 +8360,7 @@ void m68000_device::bclr_dd_adr32_df() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8384,7 +8390,6 @@ void m68000_device::bset_dd_ds_df() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8422,6 +8427,7 @@ void m68000_device::bset_dd_ds_df() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8440,6 +8446,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8513,7 +8520,6 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8547,12 +8553,12 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8608,7 +8614,6 @@ void m68000_device::bset_dd_ais_df() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8635,6 +8640,7 @@ void m68000_device::bset_dd_ais_df() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8691,7 +8697,6 @@ void m68000_device::bset_dd_aips_df() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8718,6 +8723,7 @@ void m68000_device::bset_dd_aips_df() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8776,7 +8782,6 @@ void m68000_device::bset_dd_pais_df() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8803,6 +8808,7 @@ void m68000_device::bset_dd_pais_df() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8877,7 +8883,6 @@ void m68000_device::bset_dd_das_df() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8904,6 +8909,7 @@ void m68000_device::bset_dd_das_df() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9018,7 +9024,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9045,6 +9050,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9118,7 +9124,6 @@ void m68000_device::bset_dd_adr16_df() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9145,6 +9150,7 @@ void m68000_device::bset_dd_adr16_df() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9240,7 +9246,6 @@ void m68000_device::bset_dd_adr32_df() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9267,6 +9272,7 @@ void m68000_device::bset_dd_adr32_df() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9319,13 +9325,13 @@ void m68000_device::andi_b_imm8_ds_df() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9406,7 +9412,6 @@ void m68000_device::andi_b_imm8_ais_df() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9433,6 +9438,7 @@ void m68000_device::andi_b_imm8_ais_df() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9511,7 +9517,6 @@ void m68000_device::andi_b_imm8_aips_df() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9538,6 +9543,7 @@ void m68000_device::andi_b_imm8_aips_df() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9618,7 +9624,6 @@ void m68000_device::andi_b_imm8_pais_df() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9645,6 +9650,7 @@ void m68000_device::andi_b_imm8_pais_df() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9741,7 +9747,6 @@ void m68000_device::andi_b_imm8_das_df() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9768,6 +9773,7 @@ void m68000_device::andi_b_imm8_das_df() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9904,7 +9910,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9931,6 +9936,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10026,7 +10032,6 @@ void m68000_device::andi_b_imm8_adr16_df() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10053,6 +10058,7 @@ void m68000_device::andi_b_imm8_adr16_df() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10170,7 +10176,6 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10197,6 +10202,7 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10291,12 +10297,12 @@ void m68000_device::andi_imm8_ccr_df() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10353,13 +10359,13 @@ void m68000_device::andi_w_imm16_ds_df() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10443,7 +10449,6 @@ void m68000_device::andi_w_imm16_ais_df() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10470,6 +10475,7 @@ void m68000_device::andi_w_imm16_ais_df() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10556,7 +10562,6 @@ void m68000_device::andi_w_imm16_aips_df() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10583,6 +10588,7 @@ void m68000_device::andi_w_imm16_aips_df() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10671,7 +10677,6 @@ void m68000_device::andi_w_imm16_pais_df() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10698,6 +10703,7 @@ void m68000_device::andi_w_imm16_pais_df() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10802,7 +10808,6 @@ void m68000_device::andi_w_imm16_das_df() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10829,6 +10834,7 @@ void m68000_device::andi_w_imm16_das_df() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10973,7 +10979,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11000,6 +11005,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11103,7 +11109,6 @@ void m68000_device::andi_w_imm16_adr16_df() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11130,6 +11135,7 @@ void m68000_device::andi_w_imm16_adr16_df() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11255,7 +11261,6 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11282,6 +11287,7 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11387,12 +11393,12 @@ void m68000_device::andi_i16u_sr_df() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11471,7 +11477,6 @@ void m68000_device::andi_l_imm32_ds_df() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -11504,6 +11509,7 @@ void m68000_device::andi_l_imm32_ds_df() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -11613,7 +11619,6 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11663,6 +11668,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11791,7 +11797,6 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11841,6 +11846,7 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11970,7 +11976,6 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12020,6 +12025,7 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12166,7 +12172,6 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12216,6 +12221,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12402,7 +12408,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12452,6 +12457,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12601,7 +12607,6 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12651,6 +12656,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12822,7 +12828,6 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12872,6 +12877,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12927,13 +12933,13 @@ void m68000_device::subi_b_imm8_ds_df() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13011,7 +13017,6 @@ void m68000_device::subi_b_imm8_ais_df() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13038,6 +13043,7 @@ void m68000_device::subi_b_imm8_ais_df() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13112,7 +13118,6 @@ void m68000_device::subi_b_imm8_aips_df() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13139,6 +13144,7 @@ void m68000_device::subi_b_imm8_aips_df() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13215,7 +13221,6 @@ void m68000_device::subi_b_imm8_pais_df() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13242,6 +13247,7 @@ void m68000_device::subi_b_imm8_pais_df() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13334,7 +13340,6 @@ void m68000_device::subi_b_imm8_das_df() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13361,6 +13366,7 @@ void m68000_device::subi_b_imm8_das_df() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13491,7 +13497,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13518,6 +13523,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13609,7 +13615,6 @@ void m68000_device::subi_b_imm8_adr16_df() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13636,6 +13641,7 @@ void m68000_device::subi_b_imm8_adr16_df() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13748,7 +13754,6 @@ void m68000_device::subi_b_imm8_adr32_df() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13775,6 +13780,7 @@ void m68000_device::subi_b_imm8_adr32_df() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13824,13 +13830,13 @@ void m68000_device::subi_w_imm16_ds_df() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13911,7 +13917,6 @@ void m68000_device::subi_w_imm16_ais_df() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13938,6 +13943,7 @@ void m68000_device::subi_w_imm16_ais_df() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14020,7 +14026,6 @@ void m68000_device::subi_w_imm16_aips_df() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14047,6 +14052,7 @@ void m68000_device::subi_w_imm16_aips_df() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14131,7 +14137,6 @@ void m68000_device::subi_w_imm16_pais_df() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14158,6 +14163,7 @@ void m68000_device::subi_w_imm16_pais_df() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14258,7 +14264,6 @@ void m68000_device::subi_w_imm16_das_df() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14285,6 +14290,7 @@ void m68000_device::subi_w_imm16_das_df() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14423,7 +14429,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14450,6 +14455,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14549,7 +14555,6 @@ void m68000_device::subi_w_imm16_adr16_df() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14576,6 +14581,7 @@ void m68000_device::subi_w_imm16_adr16_df() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14696,7 +14702,6 @@ void m68000_device::subi_w_imm16_adr32_df() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14723,6 +14728,7 @@ void m68000_device::subi_w_imm16_adr32_df() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14798,7 +14804,6 @@ void m68000_device::subi_l_imm32_ds_df() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -14830,6 +14835,7 @@ void m68000_device::subi_l_imm32_ds_df() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -14935,7 +14941,6 @@ void m68000_device::subi_l_imm32_ais_df() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14985,6 +14990,7 @@ void m68000_device::subi_l_imm32_ais_df() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15108,7 +15114,6 @@ void m68000_device::subi_l_imm32_aips_df() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15158,6 +15163,7 @@ void m68000_device::subi_l_imm32_aips_df() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15282,7 +15288,6 @@ void m68000_device::subi_l_imm32_pais_df() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15332,6 +15337,7 @@ void m68000_device::subi_l_imm32_pais_df() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15473,7 +15479,6 @@ void m68000_device::subi_l_imm32_das_df() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15523,6 +15528,7 @@ void m68000_device::subi_l_imm32_das_df() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15702,7 +15708,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15752,6 +15757,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15895,7 +15901,6 @@ void m68000_device::subi_l_imm32_adr16_df() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15945,6 +15950,7 @@ void m68000_device::subi_l_imm32_adr16_df() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -16109,7 +16115,6 @@ void m68000_device::subi_l_imm32_adr32_df() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16159,6 +16164,7 @@ void m68000_device::subi_l_imm32_adr32_df() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -16213,13 +16219,13 @@ void m68000_device::addi_b_imm8_ds_df() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16297,7 +16303,6 @@ void m68000_device::addi_b_imm8_ais_df() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16324,6 +16329,7 @@ void m68000_device::addi_b_imm8_ais_df() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16398,7 +16404,6 @@ void m68000_device::addi_b_imm8_aips_df() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16425,6 +16430,7 @@ void m68000_device::addi_b_imm8_aips_df() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16501,7 +16507,6 @@ void m68000_device::addi_b_imm8_pais_df() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16528,6 +16533,7 @@ void m68000_device::addi_b_imm8_pais_df() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16620,7 +16626,6 @@ void m68000_device::addi_b_imm8_das_df() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16647,6 +16652,7 @@ void m68000_device::addi_b_imm8_das_df() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16777,7 +16783,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16804,6 +16809,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16895,7 +16901,6 @@ void m68000_device::addi_b_imm8_adr16_df() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16922,6 +16927,7 @@ void m68000_device::addi_b_imm8_adr16_df() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17034,7 +17040,6 @@ void m68000_device::addi_b_imm8_adr32_df() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17061,6 +17066,7 @@ void m68000_device::addi_b_imm8_adr32_df() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17110,13 +17116,13 @@ void m68000_device::addi_w_imm16_ds_df() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17197,7 +17203,6 @@ void m68000_device::addi_w_imm16_ais_df() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17224,6 +17229,7 @@ void m68000_device::addi_w_imm16_ais_df() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17306,7 +17312,6 @@ void m68000_device::addi_w_imm16_aips_df() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17333,6 +17338,7 @@ void m68000_device::addi_w_imm16_aips_df() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17417,7 +17423,6 @@ void m68000_device::addi_w_imm16_pais_df() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17444,6 +17449,7 @@ void m68000_device::addi_w_imm16_pais_df() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17544,7 +17550,6 @@ void m68000_device::addi_w_imm16_das_df() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17571,6 +17576,7 @@ void m68000_device::addi_w_imm16_das_df() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17709,7 +17715,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17736,6 +17741,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17835,7 +17841,6 @@ void m68000_device::addi_w_imm16_adr16_df() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17862,6 +17867,7 @@ void m68000_device::addi_w_imm16_adr16_df() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17982,7 +17988,6 @@ void m68000_device::addi_w_imm16_adr32_df() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18009,6 +18014,7 @@ void m68000_device::addi_w_imm16_adr32_df() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18084,7 +18090,6 @@ void m68000_device::addi_l_imm32_ds_df() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -18116,6 +18121,7 @@ void m68000_device::addi_l_imm32_ds_df() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -18221,7 +18227,6 @@ void m68000_device::addi_l_imm32_ais_df() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18271,6 +18276,7 @@ void m68000_device::addi_l_imm32_ais_df() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18394,7 +18400,6 @@ void m68000_device::addi_l_imm32_aips_df() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18444,6 +18449,7 @@ void m68000_device::addi_l_imm32_aips_df() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18568,7 +18574,6 @@ void m68000_device::addi_l_imm32_pais_df() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18618,6 +18623,7 @@ void m68000_device::addi_l_imm32_pais_df() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18759,7 +18765,6 @@ void m68000_device::addi_l_imm32_das_df() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18809,6 +18814,7 @@ void m68000_device::addi_l_imm32_das_df() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18988,7 +18994,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19038,6 +19043,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -19181,7 +19187,6 @@ void m68000_device::addi_l_imm32_adr16_df() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19231,6 +19236,7 @@ void m68000_device::addi_l_imm32_adr16_df() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -19395,7 +19401,6 @@ void m68000_device::addi_l_imm32_adr32_df() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19445,6 +19450,7 @@ void m68000_device::addi_l_imm32_adr32_df() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -19500,7 +19506,6 @@ void m68000_device::btst_imm8_ds_df() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -19538,6 +19543,7 @@ void m68000_device::btst_imm8_ds_df() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -19551,6 +19557,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -19614,7 +19621,6 @@ void m68000_device::btst_imm8_ais_df() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19622,6 +19628,7 @@ void m68000_device::btst_imm8_ais_df() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19705,7 +19712,6 @@ void m68000_device::btst_imm8_aips_df() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19713,6 +19719,7 @@ void m68000_device::btst_imm8_aips_df() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19798,7 +19805,6 @@ void m68000_device::btst_imm8_pais_df() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19806,6 +19812,7 @@ void m68000_device::btst_imm8_pais_df() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19907,7 +19914,6 @@ void m68000_device::btst_imm8_das_df() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19915,6 +19921,7 @@ void m68000_device::btst_imm8_das_df() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20056,7 +20063,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20064,6 +20070,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20164,7 +20171,6 @@ void m68000_device::btst_imm8_adr16_df() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20172,6 +20178,7 @@ void m68000_device::btst_imm8_adr16_df() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20294,7 +20301,6 @@ void m68000_device::btst_imm8_adr32_df() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20302,6 +20308,7 @@ void m68000_device::btst_imm8_adr32_df() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20402,7 +20409,6 @@ void m68000_device::btst_imm8_dpc_df() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20410,6 +20416,7 @@ void m68000_device::btst_imm8_dpc_df() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20550,7 +20557,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20558,6 +20564,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20614,7 +20621,6 @@ void m68000_device::bchg_imm8_ds_df() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -20652,6 +20658,7 @@ void m68000_device::bchg_imm8_ds_df() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20670,6 +20677,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20734,7 +20742,6 @@ void m68000_device::bchg_imm8_ais_df() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20761,6 +20768,7 @@ void m68000_device::bchg_imm8_ais_df() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20840,7 +20848,6 @@ void m68000_device::bchg_imm8_aips_df() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20867,6 +20874,7 @@ void m68000_device::bchg_imm8_aips_df() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20948,7 +20956,6 @@ void m68000_device::bchg_imm8_pais_df() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20975,6 +20982,7 @@ void m68000_device::bchg_imm8_pais_df() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21072,7 +21080,6 @@ void m68000_device::bchg_imm8_das_df() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21099,6 +21106,7 @@ void m68000_device::bchg_imm8_das_df() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21236,7 +21244,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21263,6 +21270,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21359,7 +21367,6 @@ void m68000_device::bchg_imm8_adr16_df() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21386,6 +21393,7 @@ void m68000_device::bchg_imm8_adr16_df() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21504,7 +21512,6 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21531,6 +21538,7 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21583,7 +21591,6 @@ void m68000_device::bclr_imm8_ds_df() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -21625,6 +21632,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21647,6 +21655,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21711,7 +21720,6 @@ void m68000_device::bclr_imm8_ais_df() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21742,6 +21750,7 @@ void m68000_device::bclr_imm8_ais_df() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21821,7 +21830,6 @@ void m68000_device::bclr_imm8_aips_df() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21852,6 +21860,7 @@ void m68000_device::bclr_imm8_aips_df() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21933,7 +21942,6 @@ void m68000_device::bclr_imm8_pais_df() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21964,6 +21972,7 @@ void m68000_device::bclr_imm8_pais_df() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22061,7 +22070,6 @@ void m68000_device::bclr_imm8_das_df() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22092,6 +22100,7 @@ void m68000_device::bclr_imm8_das_df() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22229,7 +22238,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22260,6 +22268,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22356,7 +22365,6 @@ void m68000_device::bclr_imm8_adr16_df() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22387,6 +22395,7 @@ void m68000_device::bclr_imm8_adr16_df() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22505,7 +22514,6 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22536,6 +22544,7 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22588,7 +22597,6 @@ void m68000_device::bset_imm8_ds_df() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22626,6 +22634,7 @@ void m68000_device::bset_imm8_ds_df() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22644,6 +22653,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22708,7 +22718,6 @@ void m68000_device::bset_imm8_ais_df() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -22735,6 +22744,7 @@ void m68000_device::bset_imm8_ais_df() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22814,7 +22824,6 @@ void m68000_device::bset_imm8_aips_df() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -22841,6 +22850,7 @@ void m68000_device::bset_imm8_aips_df() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22922,7 +22932,6 @@ void m68000_device::bset_imm8_pais_df() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -22949,6 +22958,7 @@ void m68000_device::bset_imm8_pais_df() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23046,7 +23056,6 @@ void m68000_device::bset_imm8_das_df() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23073,6 +23082,7 @@ void m68000_device::bset_imm8_das_df() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23210,7 +23220,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23237,6 +23246,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23333,7 +23343,6 @@ void m68000_device::bset_imm8_adr16_df() // 08f8 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23360,6 +23369,7 @@ void m68000_device::bset_imm8_adr16_df() // 08f8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23478,7 +23488,6 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23505,6 +23514,7 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23557,13 +23567,13 @@ void m68000_device::eori_b_imm8_ds_df() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23644,7 +23654,6 @@ void m68000_device::eori_b_imm8_ais_df() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23671,6 +23680,7 @@ void m68000_device::eori_b_imm8_ais_df() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23749,7 +23759,6 @@ void m68000_device::eori_b_imm8_aips_df() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23776,6 +23785,7 @@ void m68000_device::eori_b_imm8_aips_df() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23856,7 +23866,6 @@ void m68000_device::eori_b_imm8_pais_df() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23883,6 +23892,7 @@ void m68000_device::eori_b_imm8_pais_df() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23979,7 +23989,6 @@ void m68000_device::eori_b_imm8_das_df() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24006,6 +24015,7 @@ void m68000_device::eori_b_imm8_das_df() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24142,7 +24152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24169,6 +24178,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24264,7 +24274,6 @@ void m68000_device::eori_b_imm8_adr16_df() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24291,6 +24300,7 @@ void m68000_device::eori_b_imm8_adr16_df() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24408,7 +24418,6 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24435,6 +24444,7 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24529,12 +24539,12 @@ void m68000_device::eori_imm8_ccr_df() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24591,13 +24601,13 @@ void m68000_device::eori_w_imm16_ds_df() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24681,7 +24691,6 @@ void m68000_device::eori_w_imm16_ais_df() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24708,6 +24717,7 @@ void m68000_device::eori_w_imm16_ais_df() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -24794,7 +24804,6 @@ void m68000_device::eori_w_imm16_aips_df() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24821,6 +24830,7 @@ void m68000_device::eori_w_imm16_aips_df() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -24909,7 +24919,6 @@ void m68000_device::eori_w_imm16_pais_df() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24936,6 +24945,7 @@ void m68000_device::eori_w_imm16_pais_df() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25040,7 +25050,6 @@ void m68000_device::eori_w_imm16_das_df() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25067,6 +25076,7 @@ void m68000_device::eori_w_imm16_das_df() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25211,7 +25221,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25238,6 +25247,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25341,7 +25351,6 @@ void m68000_device::eori_w_imm16_adr16_df() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25368,6 +25377,7 @@ void m68000_device::eori_w_imm16_adr16_df() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25493,7 +25503,6 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25520,6 +25529,7 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25625,12 +25635,12 @@ void m68000_device::eori_i16u_sr_df() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25709,7 +25719,6 @@ void m68000_device::eori_l_imm32_ds_df() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -25742,6 +25751,7 @@ void m68000_device::eori_l_imm32_ds_df() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -25851,7 +25861,6 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25901,6 +25910,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26029,7 +26039,6 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26079,6 +26088,7 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26208,7 +26218,6 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26258,6 +26267,7 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26404,7 +26414,6 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26454,6 +26463,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26640,7 +26650,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26690,6 +26699,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26839,7 +26849,6 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26889,6 +26898,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -27060,7 +27070,6 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27110,6 +27119,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -27165,13 +27175,13 @@ void m68000_device::cmpi_b_imm8_ds_df() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27248,7 +27258,6 @@ void m68000_device::cmpi_b_imm8_ais_df() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27256,6 +27265,7 @@ void m68000_device::cmpi_b_imm8_ais_df() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27335,7 +27345,6 @@ void m68000_device::cmpi_b_imm8_aips_df() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27343,6 +27352,7 @@ void m68000_device::cmpi_b_imm8_aips_df() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27424,7 +27434,6 @@ void m68000_device::cmpi_b_imm8_pais_df() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27432,6 +27441,7 @@ void m68000_device::cmpi_b_imm8_pais_df() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27529,7 +27539,6 @@ void m68000_device::cmpi_b_imm8_das_df() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27537,6 +27546,7 @@ void m68000_device::cmpi_b_imm8_das_df() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27672,7 +27682,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27680,6 +27689,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27776,7 +27786,6 @@ void m68000_device::cmpi_b_imm8_adr16_df() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27784,6 +27793,7 @@ void m68000_device::cmpi_b_imm8_adr16_df() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27901,7 +27911,6 @@ void m68000_device::cmpi_b_imm8_adr32_df() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27909,6 +27918,7 @@ void m68000_device::cmpi_b_imm8_adr32_df() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27963,13 +27973,13 @@ void m68000_device::cmpi_w_imm16_ds_df() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28049,7 +28059,6 @@ void m68000_device::cmpi_w_imm16_ais_df() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28057,6 +28066,7 @@ void m68000_device::cmpi_w_imm16_ais_df() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28139,7 +28149,6 @@ void m68000_device::cmpi_w_imm16_aips_df() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28147,6 +28156,7 @@ void m68000_device::cmpi_w_imm16_aips_df() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28231,7 +28241,6 @@ void m68000_device::cmpi_w_imm16_pais_df() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28239,6 +28248,7 @@ void m68000_device::cmpi_w_imm16_pais_df() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28339,7 +28349,6 @@ void m68000_device::cmpi_w_imm16_das_df() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28347,6 +28356,7 @@ void m68000_device::cmpi_w_imm16_das_df() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28485,7 +28495,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28493,6 +28502,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28592,7 +28602,6 @@ void m68000_device::cmpi_w_imm16_adr16_df() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28600,6 +28609,7 @@ void m68000_device::cmpi_w_imm16_adr16_df() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28720,7 +28730,6 @@ void m68000_device::cmpi_w_imm16_adr32_df() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28728,6 +28737,7 @@ void m68000_device::cmpi_w_imm16_adr32_df() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28804,7 +28814,6 @@ void m68000_device::cmpi_l_imm32_ds_df() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -28833,6 +28842,7 @@ void m68000_device::cmpi_l_imm32_ds_df() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -28937,7 +28947,6 @@ void m68000_device::cmpi_l_imm32_ais_df() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28945,6 +28954,7 @@ void m68000_device::cmpi_l_imm32_ais_df() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29071,7 +29081,6 @@ void m68000_device::cmpi_l_imm32_aips_df() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29079,6 +29088,7 @@ void m68000_device::cmpi_l_imm32_aips_df() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29206,7 +29216,6 @@ void m68000_device::cmpi_l_imm32_pais_df() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29214,6 +29223,7 @@ void m68000_device::cmpi_l_imm32_pais_df() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29358,7 +29368,6 @@ void m68000_device::cmpi_l_imm32_das_df() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29366,6 +29375,7 @@ void m68000_device::cmpi_l_imm32_das_df() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29548,7 +29558,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29556,6 +29565,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29702,7 +29712,6 @@ void m68000_device::cmpi_l_imm32_adr16_df() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29710,6 +29719,7 @@ void m68000_device::cmpi_l_imm32_adr16_df() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29877,7 +29887,6 @@ void m68000_device::cmpi_l_imm32_adr32_df() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29885,6 +29894,7 @@ void m68000_device::cmpi_l_imm32_adr32_df() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29920,7 +29930,6 @@ void m68000_device::move_b_ds_dd_df() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -29929,6 +29938,7 @@ void m68000_device::move_b_ds_dd_df() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29984,7 +29994,6 @@ void m68000_device::move_b_ais_dd_df() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -29993,6 +30002,7 @@ void m68000_device::move_b_ais_dd_df() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30050,7 +30060,6 @@ void m68000_device::move_b_aips_dd_df() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30059,6 +30068,7 @@ void m68000_device::move_b_aips_dd_df() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30118,7 +30128,6 @@ void m68000_device::move_b_pais_dd_df() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30127,6 +30136,7 @@ void m68000_device::move_b_pais_dd_df() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30202,7 +30212,6 @@ void m68000_device::move_b_das_dd_df() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30211,6 +30220,7 @@ void m68000_device::move_b_das_dd_df() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30324,7 +30334,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30333,6 +30342,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30407,7 +30417,6 @@ void m68000_device::move_b_adr16_dd_df() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30416,6 +30425,7 @@ void m68000_device::move_b_adr16_dd_df() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30511,7 +30521,6 @@ void m68000_device::move_b_adr32_dd_df() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30520,6 +30529,7 @@ void m68000_device::move_b_adr32_dd_df() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30594,7 +30604,6 @@ void m68000_device::move_b_dpc_dd_df() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30603,6 +30612,7 @@ void m68000_device::move_b_dpc_dd_df() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30715,7 +30725,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30724,6 +30733,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30779,7 +30789,6 @@ void m68000_device::move_b_imm8_dd_df() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -30788,6 +30797,7 @@ void m68000_device::move_b_imm8_dd_df() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30822,7 +30832,6 @@ void m68000_device::move_b_ds_aid_df() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -30843,10 +30852,10 @@ void m68000_device::move_b_ds_aid_df() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30919,10 +30928,10 @@ void m68000_device::move_b_ais_aid_df() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30999,10 +31008,10 @@ void m68000_device::move_b_aips_aid_df() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31081,10 +31090,10 @@ void m68000_device::move_b_pais_aid_df() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31179,10 +31188,10 @@ void m68000_device::move_b_das_aid_df() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31315,10 +31324,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31412,10 +31421,10 @@ void m68000_device::move_b_adr16_aid_df() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31530,10 +31539,10 @@ void m68000_device::move_b_adr32_aid_df() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31627,10 +31636,10 @@ void m68000_device::move_b_dpc_aid_df() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31762,10 +31771,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31821,7 +31830,6 @@ void m68000_device::move_b_imm8_aid_df() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31842,10 +31850,10 @@ void m68000_device::move_b_imm8_aid_df() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31878,7 +31886,6 @@ void m68000_device::move_b_ds_aipd_df() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31899,6 +31906,7 @@ void m68000_device::move_b_ds_aipd_df() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31954,7 +31962,6 @@ void m68000_device::move_b_ais_aipd_df() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31975,6 +31982,7 @@ void m68000_device::move_b_ais_aipd_df() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32034,7 +32042,6 @@ void m68000_device::move_b_aips_aipd_df() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32055,6 +32062,7 @@ void m68000_device::move_b_aips_aipd_df() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32116,7 +32124,6 @@ void m68000_device::move_b_pais_aipd_df() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32137,6 +32144,7 @@ void m68000_device::move_b_pais_aipd_df() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32214,7 +32222,6 @@ void m68000_device::move_b_das_aipd_df() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32235,6 +32242,7 @@ void m68000_device::move_b_das_aipd_df() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32350,7 +32358,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32371,6 +32378,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32447,7 +32455,6 @@ void m68000_device::move_b_adr16_aipd_df() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32468,6 +32475,7 @@ void m68000_device::move_b_adr16_aipd_df() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32565,7 +32573,6 @@ void m68000_device::move_b_adr32_aipd_df() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32586,6 +32593,7 @@ void m68000_device::move_b_adr32_aipd_df() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32662,7 +32670,6 @@ void m68000_device::move_b_dpc_aipd_df() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32683,6 +32690,7 @@ void m68000_device::move_b_dpc_aipd_df() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32797,7 +32805,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32818,6 +32825,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32875,7 +32883,6 @@ void m68000_device::move_b_imm8_aipd_df() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32896,6 +32903,7 @@ void m68000_device::move_b_imm8_aipd_df() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32930,7 +32938,6 @@ void m68000_device::move_b_ds_paid_df() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32957,6 +32964,7 @@ void m68000_device::move_b_ds_paid_df() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33006,7 +33014,6 @@ void m68000_device::move_b_ais_paid_df() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33033,6 +33040,7 @@ void m68000_device::move_b_ais_paid_df() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33086,7 +33094,6 @@ void m68000_device::move_b_aips_paid_df() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33113,6 +33120,7 @@ void m68000_device::move_b_aips_paid_df() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33168,7 +33176,6 @@ void m68000_device::move_b_pais_paid_df() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33195,6 +33202,7 @@ void m68000_device::move_b_pais_paid_df() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33266,7 +33274,6 @@ void m68000_device::move_b_das_paid_df() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33293,6 +33300,7 @@ void m68000_device::move_b_das_paid_df() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33402,7 +33410,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33429,6 +33436,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33499,7 +33507,6 @@ void m68000_device::move_b_adr16_paid_df() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33526,6 +33533,7 @@ void m68000_device::move_b_adr16_paid_df() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33617,7 +33625,6 @@ void m68000_device::move_b_adr32_paid_df() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33644,6 +33651,7 @@ void m68000_device::move_b_adr32_paid_df() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33714,7 +33722,6 @@ void m68000_device::move_b_dpc_paid_df() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33741,6 +33748,7 @@ void m68000_device::move_b_dpc_paid_df() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33849,7 +33857,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33876,6 +33883,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33927,7 +33935,6 @@ void m68000_device::move_b_imm8_paid_df() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33954,6 +33961,7 @@ void m68000_device::move_b_imm8_paid_df() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34003,7 +34011,6 @@ void m68000_device::move_b_ds_dad_df() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34023,11 +34030,11 @@ void m68000_device::move_b_ds_dad_df() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34105,6 +34112,7 @@ void m68000_device::move_b_ais_dad_df() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34124,11 +34132,11 @@ void m68000_device::move_b_ais_dad_df() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34210,6 +34218,7 @@ void m68000_device::move_b_aips_dad_df() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34229,11 +34238,11 @@ void m68000_device::move_b_aips_dad_df() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34317,6 +34326,7 @@ void m68000_device::move_b_pais_dad_df() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34336,11 +34346,11 @@ void m68000_device::move_b_pais_dad_df() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34440,6 +34450,7 @@ void m68000_device::move_b_das_dad_df() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34459,11 +34470,11 @@ void m68000_device::move_b_das_dad_df() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34601,6 +34612,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34620,11 +34632,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34723,6 +34735,7 @@ void m68000_device::move_b_adr16_dad_df() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34742,11 +34755,11 @@ void m68000_device::move_b_adr16_dad_df() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34866,6 +34879,7 @@ void m68000_device::move_b_adr32_dad_df() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34885,11 +34899,11 @@ void m68000_device::move_b_adr32_dad_df() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34988,6 +35002,7 @@ void m68000_device::move_b_dpc_dad_df() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35007,11 +35022,11 @@ void m68000_device::move_b_dpc_dad_df() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35148,6 +35163,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35167,11 +35183,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35248,7 +35264,6 @@ void m68000_device::move_b_imm8_dad_df() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35268,11 +35283,11 @@ void m68000_device::move_b_imm8_dad_df() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35365,7 +35380,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35385,11 +35399,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35505,6 +35519,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35524,11 +35539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35648,6 +35663,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35667,11 +35683,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35793,6 +35809,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35812,11 +35829,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35954,6 +35971,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35973,11 +35991,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36153,6 +36171,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36172,11 +36191,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36313,6 +36332,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36332,11 +36352,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36494,6 +36514,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36513,11 +36534,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36654,6 +36675,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36673,11 +36695,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36852,6 +36874,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36871,11 +36894,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36991,7 +37014,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37011,11 +37033,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37072,6 +37094,7 @@ void m68000_device::move_b_ds_adr16_df() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37091,11 +37114,11 @@ void m68000_device::move_b_ds_adr16_df() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37172,6 +37195,7 @@ void m68000_device::move_b_ais_adr16_df() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37191,11 +37215,11 @@ void m68000_device::move_b_ais_adr16_df() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37276,6 +37300,7 @@ void m68000_device::move_b_aips_adr16_df() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37295,11 +37320,11 @@ void m68000_device::move_b_aips_adr16_df() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37382,6 +37407,7 @@ void m68000_device::move_b_pais_adr16_df() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37401,11 +37427,11 @@ void m68000_device::move_b_pais_adr16_df() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37504,6 +37530,7 @@ void m68000_device::move_b_das_adr16_df() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37523,11 +37550,11 @@ void m68000_device::move_b_das_adr16_df() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37664,6 +37691,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37683,11 +37711,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37785,6 +37813,7 @@ void m68000_device::move_b_adr16_adr16_df() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37804,11 +37833,11 @@ void m68000_device::move_b_adr16_adr16_df() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37927,6 +37956,7 @@ void m68000_device::move_b_adr32_adr16_df() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37946,11 +37976,11 @@ void m68000_device::move_b_adr32_adr16_df() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38048,6 +38078,7 @@ void m68000_device::move_b_dpc_adr16_df() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38067,11 +38098,11 @@ void m68000_device::move_b_dpc_adr16_df() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38207,6 +38238,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38226,11 +38258,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38310,6 +38342,7 @@ void m68000_device::move_b_imm8_adr16_df() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38329,11 +38362,11 @@ void m68000_device::move_b_imm8_adr16_df() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38411,6 +38444,7 @@ void m68000_device::move_b_ds_adr32_df() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38430,11 +38464,11 @@ void m68000_device::move_b_ds_adr32_df() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38511,7 +38545,6 @@ void m68000_device::move_b_ais_adr32_df() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38552,11 +38585,11 @@ void m68000_device::move_b_ais_adr32_df() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38637,7 +38670,6 @@ void m68000_device::move_b_aips_adr32_df() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38678,11 +38710,11 @@ void m68000_device::move_b_aips_adr32_df() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38765,7 +38797,6 @@ void m68000_device::move_b_pais_adr32_df() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38806,11 +38837,11 @@ void m68000_device::move_b_pais_adr32_df() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38909,7 +38940,6 @@ void m68000_device::move_b_das_adr32_df() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38950,11 +38980,11 @@ void m68000_device::move_b_das_adr32_df() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39091,7 +39121,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39132,11 +39161,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39234,7 +39263,6 @@ void m68000_device::move_b_adr16_adr32_df() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39275,11 +39303,11 @@ void m68000_device::move_b_adr16_adr32_df() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39398,7 +39426,6 @@ void m68000_device::move_b_adr32_adr32_df() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39439,11 +39466,11 @@ void m68000_device::move_b_adr32_adr32_df() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39541,7 +39568,6 @@ void m68000_device::move_b_dpc_adr32_df() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39582,11 +39608,11 @@ void m68000_device::move_b_dpc_adr32_df() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39722,7 +39748,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39763,11 +39788,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39868,6 +39893,7 @@ void m68000_device::move_b_imm8_adr32_df() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39887,11 +39913,11 @@ void m68000_device::move_b_imm8_adr32_df() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39924,7 +39950,6 @@ void m68000_device::move_l_ds_dd_df() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39933,6 +39958,7 @@ void m68000_device::move_l_ds_dd_df() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39969,7 +39995,6 @@ void m68000_device::move_l_as_dd_df() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39978,6 +40003,7 @@ void m68000_device::move_l_as_dd_df() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40059,7 +40085,6 @@ void m68000_device::move_l_ais_dd_df() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40068,6 +40093,7 @@ void m68000_device::move_l_ais_dd_df() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40152,7 +40178,6 @@ void m68000_device::move_l_aips_dd_df() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40161,6 +40186,7 @@ void m68000_device::move_l_aips_dd_df() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40246,7 +40272,6 @@ void m68000_device::move_l_pais_dd_df() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40255,6 +40280,7 @@ void m68000_device::move_l_pais_dd_df() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40357,7 +40383,6 @@ void m68000_device::move_l_das_dd_df() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40366,6 +40391,7 @@ void m68000_device::move_l_das_dd_df() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40506,7 +40532,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40515,6 +40540,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40619,7 +40645,6 @@ void m68000_device::move_l_adr16_dd_df() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40628,6 +40653,7 @@ void m68000_device::move_l_adr16_dd_df() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40753,7 +40779,6 @@ void m68000_device::move_l_adr32_dd_df() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40762,6 +40787,7 @@ void m68000_device::move_l_adr32_dd_df() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40863,7 +40889,6 @@ void m68000_device::move_l_dpc_dd_df() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40872,6 +40897,7 @@ void m68000_device::move_l_dpc_dd_df() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41011,7 +41037,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41020,6 +41045,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41100,7 +41126,6 @@ void m68000_device::move_l_imm32_dd_df() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -41109,6 +41134,7 @@ void m68000_device::move_l_imm32_dd_df() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41145,7 +41171,6 @@ void m68000_device::movea_l_ds_ad_df() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41153,6 +41178,7 @@ void m68000_device::movea_l_ds_ad_df() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41188,7 +41214,6 @@ void m68000_device::movea_l_as_ad_df() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41196,6 +41221,7 @@ void m68000_device::movea_l_as_ad_df() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41276,7 +41302,6 @@ void m68000_device::movea_l_ais_ad_df() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41284,6 +41309,7 @@ void m68000_device::movea_l_ais_ad_df() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41367,7 +41393,6 @@ void m68000_device::movea_l_aips_ad_df() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41375,6 +41400,7 @@ void m68000_device::movea_l_aips_ad_df() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41459,7 +41485,6 @@ void m68000_device::movea_l_pais_ad_df() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41467,6 +41492,7 @@ void m68000_device::movea_l_pais_ad_df() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41568,7 +41594,6 @@ void m68000_device::movea_l_das_ad_df() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41576,6 +41601,7 @@ void m68000_device::movea_l_das_ad_df() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41715,7 +41741,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41723,6 +41748,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41826,7 +41852,6 @@ void m68000_device::movea_l_adr16_ad_df() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41834,6 +41859,7 @@ void m68000_device::movea_l_adr16_ad_df() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41958,7 +41984,6 @@ void m68000_device::movea_l_adr32_ad_df() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41966,6 +41991,7 @@ void m68000_device::movea_l_adr32_ad_df() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42066,7 +42092,6 @@ void m68000_device::movea_l_dpc_ad_df() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42074,6 +42099,7 @@ void m68000_device::movea_l_dpc_ad_df() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42212,7 +42238,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42220,6 +42245,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42299,7 +42325,6 @@ void m68000_device::movea_l_imm32_ad_df() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -42307,6 +42332,7 @@ void m68000_device::movea_l_imm32_ad_df() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42364,7 +42390,6 @@ void m68000_device::move_l_ds_aid_df() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42389,6 +42414,7 @@ void m68000_device::move_l_ds_aid_df() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42448,7 +42474,6 @@ void m68000_device::move_l_as_aid_df() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42473,6 +42498,7 @@ void m68000_device::move_l_as_aid_df() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42579,7 +42605,6 @@ void m68000_device::move_l_ais_aid_df() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42604,10 +42629,10 @@ void m68000_device::move_l_ais_aid_df() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42712,7 +42737,6 @@ void m68000_device::move_l_aips_aid_df() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42737,10 +42761,10 @@ void m68000_device::move_l_aips_aid_df() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42846,7 +42870,6 @@ void m68000_device::move_l_pais_aid_df() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42871,10 +42894,10 @@ void m68000_device::move_l_pais_aid_df() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42997,7 +43020,6 @@ void m68000_device::move_l_das_aid_df() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43022,10 +43044,10 @@ void m68000_device::move_l_das_aid_df() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43186,7 +43208,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43211,10 +43232,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43339,7 +43360,6 @@ void m68000_device::move_l_adr16_aid_df() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43364,10 +43384,10 @@ void m68000_device::move_l_adr16_aid_df() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43513,7 +43533,6 @@ void m68000_device::move_l_adr32_aid_df() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43538,10 +43557,10 @@ void m68000_device::move_l_adr32_aid_df() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43663,7 +43682,6 @@ void m68000_device::move_l_dpc_aid_df() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43688,10 +43706,10 @@ void m68000_device::move_l_dpc_aid_df() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43851,7 +43869,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43876,10 +43893,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43978,7 +43995,6 @@ void m68000_device::move_l_imm32_aid_df() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44003,6 +44019,7 @@ void m68000_device::move_l_imm32_aid_df() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44062,7 +44079,6 @@ void m68000_device::move_l_ds_aipd_df() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44087,6 +44103,7 @@ void m68000_device::move_l_ds_aipd_df() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44146,7 +44163,6 @@ void m68000_device::move_l_as_aipd_df() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44171,6 +44187,7 @@ void m68000_device::move_l_as_aipd_df() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44277,7 +44294,6 @@ void m68000_device::move_l_ais_aipd_df() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44302,6 +44318,7 @@ void m68000_device::move_l_ais_aipd_df() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44408,7 +44425,6 @@ void m68000_device::move_l_aips_aipd_df() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44433,6 +44449,7 @@ void m68000_device::move_l_aips_aipd_df() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44540,7 +44557,6 @@ void m68000_device::move_l_pais_aipd_df() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44565,6 +44581,7 @@ void m68000_device::move_l_pais_aipd_df() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44689,7 +44706,6 @@ void m68000_device::move_l_das_aipd_df() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44714,6 +44730,7 @@ void m68000_device::move_l_das_aipd_df() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44876,7 +44893,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44901,6 +44917,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45027,7 +45044,6 @@ void m68000_device::move_l_adr16_aipd_df() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45052,6 +45068,7 @@ void m68000_device::move_l_adr16_aipd_df() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45199,7 +45216,6 @@ void m68000_device::move_l_adr32_aipd_df() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45224,6 +45240,7 @@ void m68000_device::move_l_adr32_aipd_df() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45347,7 +45364,6 @@ void m68000_device::move_l_dpc_aipd_df() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45372,6 +45388,7 @@ void m68000_device::move_l_dpc_aipd_df() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45533,7 +45550,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45558,6 +45574,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45658,7 +45675,6 @@ void m68000_device::move_l_imm32_aipd_df() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45683,6 +45699,7 @@ void m68000_device::move_l_imm32_aipd_df() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45720,7 +45737,6 @@ void m68000_device::move_l_ds_paid_df() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45770,6 +45786,7 @@ void m68000_device::move_l_ds_paid_df() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45803,7 +45820,6 @@ void m68000_device::move_l_as_paid_df() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45853,6 +45869,7 @@ void m68000_device::move_l_as_paid_df() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45931,7 +45948,6 @@ void m68000_device::move_l_ais_paid_df() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45981,6 +45997,7 @@ void m68000_device::move_l_ais_paid_df() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46062,7 +46079,6 @@ void m68000_device::move_l_aips_paid_df() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46112,6 +46128,7 @@ void m68000_device::move_l_aips_paid_df() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46194,7 +46211,6 @@ void m68000_device::move_l_pais_paid_df() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46244,6 +46260,7 @@ void m68000_device::move_l_pais_paid_df() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46343,7 +46360,6 @@ void m68000_device::move_l_das_paid_df() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46393,6 +46409,7 @@ void m68000_device::move_l_das_paid_df() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46530,7 +46547,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46580,6 +46596,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46681,7 +46698,6 @@ void m68000_device::move_l_adr16_paid_df() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46731,6 +46747,7 @@ void m68000_device::move_l_adr16_paid_df() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46853,7 +46870,6 @@ void m68000_device::move_l_adr32_paid_df() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46903,6 +46919,7 @@ void m68000_device::move_l_adr32_paid_df() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47001,7 +47018,6 @@ void m68000_device::move_l_dpc_paid_df() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47051,6 +47067,7 @@ void m68000_device::move_l_dpc_paid_df() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47187,7 +47204,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47237,6 +47253,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47314,7 +47331,6 @@ void m68000_device::move_l_imm32_paid_df() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47364,6 +47380,7 @@ void m68000_device::move_l_imm32_paid_df() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47442,7 +47459,6 @@ void m68000_device::move_l_ds_dad_df() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47467,6 +47483,7 @@ void m68000_device::move_l_ds_dad_df() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47549,7 +47566,6 @@ void m68000_device::move_l_as_dad_df() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47574,6 +47590,7 @@ void m68000_device::move_l_as_dad_df() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47704,6 +47721,7 @@ void m68000_device::move_l_ais_dad_df() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47728,11 +47746,11 @@ void m68000_device::move_l_ais_dad_df() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47861,6 +47879,7 @@ void m68000_device::move_l_aips_dad_df() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47885,11 +47904,11 @@ void m68000_device::move_l_aips_dad_df() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48019,6 +48038,7 @@ void m68000_device::move_l_pais_dad_df() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48043,11 +48063,11 @@ void m68000_device::move_l_pais_dad_df() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48194,6 +48214,7 @@ void m68000_device::move_l_das_dad_df() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48218,11 +48239,11 @@ void m68000_device::move_l_das_dad_df() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48407,6 +48428,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48431,11 +48453,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48584,6 +48606,7 @@ void m68000_device::move_l_adr16_dad_df() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48608,11 +48631,11 @@ void m68000_device::move_l_adr16_dad_df() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48782,6 +48805,7 @@ void m68000_device::move_l_adr32_dad_df() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48806,11 +48830,11 @@ void m68000_device::move_l_adr32_dad_df() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48956,6 +48980,7 @@ void m68000_device::move_l_dpc_dad_df() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48980,11 +49005,11 @@ void m68000_device::move_l_dpc_dad_df() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49168,6 +49193,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49192,11 +49218,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49318,7 +49344,6 @@ void m68000_device::move_l_imm32_dad_df() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49343,6 +49368,7 @@ void m68000_device::move_l_imm32_dad_df() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49464,7 +49490,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49489,6 +49514,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49610,7 +49636,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49635,6 +49660,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49803,6 +49829,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49827,11 +49854,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49998,6 +50025,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50022,11 +50050,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50194,6 +50222,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50218,11 +50247,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50407,6 +50436,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50431,11 +50461,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50658,6 +50688,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50682,11 +50713,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50873,6 +50904,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50897,11 +50929,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51109,6 +51141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51133,11 +51166,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51321,6 +51354,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51345,11 +51379,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51571,6 +51605,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51595,11 +51630,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51760,7 +51795,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51785,6 +51819,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51870,6 +51905,7 @@ void m68000_device::move_l_ds_adr16_df() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51894,11 +51930,11 @@ void m68000_device::move_l_ds_adr16_df() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51979,6 +52015,7 @@ void m68000_device::move_l_as_adr16_df() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52003,11 +52040,11 @@ void m68000_device::move_l_as_adr16_df() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52132,6 +52169,7 @@ void m68000_device::move_l_ais_adr16_df() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52156,11 +52194,11 @@ void m68000_device::move_l_ais_adr16_df() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52288,6 +52326,7 @@ void m68000_device::move_l_aips_adr16_df() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52312,11 +52351,11 @@ void m68000_device::move_l_aips_adr16_df() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52445,6 +52484,7 @@ void m68000_device::move_l_pais_adr16_df() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52469,11 +52509,11 @@ void m68000_device::move_l_pais_adr16_df() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52619,6 +52659,7 @@ void m68000_device::move_l_das_adr16_df() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52643,11 +52684,11 @@ void m68000_device::move_l_das_adr16_df() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52831,6 +52872,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52855,11 +52897,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53007,6 +53049,7 @@ void m68000_device::move_l_adr16_adr16_df() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53031,11 +53074,11 @@ void m68000_device::move_l_adr16_adr16_df() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53204,6 +53247,7 @@ void m68000_device::move_l_adr32_adr16_df() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53228,11 +53272,11 @@ void m68000_device::move_l_adr32_adr16_df() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53377,6 +53421,7 @@ void m68000_device::move_l_dpc_adr16_df() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53401,11 +53446,11 @@ void m68000_device::move_l_dpc_adr16_df() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53588,6 +53633,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53612,11 +53658,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53741,6 +53787,7 @@ void m68000_device::move_l_imm32_adr16_df() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53765,11 +53812,11 @@ void m68000_device::move_l_imm32_adr16_df() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53871,6 +53918,7 @@ void m68000_device::move_l_ds_adr32_df() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53895,11 +53943,11 @@ void m68000_device::move_l_ds_adr32_df() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54001,6 +54049,7 @@ void m68000_device::move_l_as_adr32_df() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54025,11 +54074,11 @@ void m68000_device::move_l_as_adr32_df() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54153,7 +54202,6 @@ void m68000_device::move_l_ais_adr32_df() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54202,11 +54250,11 @@ void m68000_device::move_l_ais_adr32_df() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54333,7 +54381,6 @@ void m68000_device::move_l_aips_adr32_df() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54382,11 +54429,11 @@ void m68000_device::move_l_aips_adr32_df() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54514,7 +54561,6 @@ void m68000_device::move_l_pais_adr32_df() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54563,11 +54609,11 @@ void m68000_device::move_l_pais_adr32_df() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54712,7 +54758,6 @@ void m68000_device::move_l_das_adr32_df() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54761,11 +54806,11 @@ void m68000_device::move_l_das_adr32_df() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54948,7 +54993,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54997,11 +55041,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55148,7 +55192,6 @@ void m68000_device::move_l_adr16_adr32_df() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55197,11 +55240,11 @@ void m68000_device::move_l_adr16_adr32_df() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55369,7 +55412,6 @@ void m68000_device::move_l_adr32_adr32_df() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55418,11 +55460,11 @@ void m68000_device::move_l_adr32_adr32_df() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55566,7 +55608,6 @@ void m68000_device::move_l_dpc_adr32_df() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55615,11 +55656,11 @@ void m68000_device::move_l_dpc_adr32_df() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55801,7 +55842,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55850,11 +55890,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56000,6 +56040,7 @@ void m68000_device::move_l_imm32_adr32_df() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -56024,11 +56065,11 @@ void m68000_device::move_l_imm32_adr32_df() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56061,7 +56102,6 @@ void m68000_device::move_w_ds_dd_df() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56070,6 +56110,7 @@ void m68000_device::move_w_ds_dd_df() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56104,7 +56145,6 @@ void m68000_device::move_w_as_dd_df() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56113,6 +56153,7 @@ void m68000_device::move_w_as_dd_df() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56171,7 +56212,6 @@ void m68000_device::move_w_ais_dd_df() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56180,6 +56220,7 @@ void m68000_device::move_w_ais_dd_df() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56240,7 +56281,6 @@ void m68000_device::move_w_aips_dd_df() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56249,6 +56289,7 @@ void m68000_device::move_w_aips_dd_df() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56311,7 +56352,6 @@ void m68000_device::move_w_pais_dd_df() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56320,6 +56360,7 @@ void m68000_device::move_w_pais_dd_df() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56398,7 +56439,6 @@ void m68000_device::move_w_das_dd_df() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56407,6 +56447,7 @@ void m68000_device::move_w_das_dd_df() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56523,7 +56564,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56532,6 +56572,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56609,7 +56650,6 @@ void m68000_device::move_w_adr16_dd_df() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56618,6 +56658,7 @@ void m68000_device::move_w_adr16_dd_df() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56716,7 +56757,6 @@ void m68000_device::move_w_adr32_dd_df() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56725,6 +56765,7 @@ void m68000_device::move_w_adr32_dd_df() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56802,7 +56843,6 @@ void m68000_device::move_w_dpc_dd_df() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56811,6 +56851,7 @@ void m68000_device::move_w_dpc_dd_df() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56926,7 +56967,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56935,6 +56975,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56990,7 +57031,6 @@ void m68000_device::move_w_imm16_dd_df() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -56999,6 +57039,7 @@ void m68000_device::move_w_imm16_dd_df() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57033,12 +57074,12 @@ void m68000_device::movea_w_ds_ad_df() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57074,12 +57115,12 @@ void m68000_device::movea_w_as_ad_df() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57139,12 +57180,12 @@ void m68000_device::movea_w_ais_ad_df() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57205,12 +57246,12 @@ void m68000_device::movea_w_aips_ad_df() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57273,12 +57314,12 @@ void m68000_device::movea_w_pais_ad_df() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57357,12 +57398,12 @@ void m68000_device::movea_w_das_ad_df() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57479,12 +57520,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57562,12 +57603,12 @@ void m68000_device::movea_w_adr16_ad_df() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57666,12 +57707,12 @@ void m68000_device::movea_w_adr32_ad_df() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57749,12 +57790,12 @@ void m68000_device::movea_w_dpc_ad_df() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57870,12 +57911,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57931,12 +57972,12 @@ void m68000_device::movea_w_imm16_ad_df() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57972,7 +58013,6 @@ void m68000_device::move_w_ds_aid_df() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -57998,10 +58038,10 @@ void m68000_device::move_w_ds_aid_df() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58034,7 +58074,6 @@ void m68000_device::move_w_as_aid_df() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -58060,10 +58099,10 @@ void m68000_device::move_w_as_aid_df() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58144,10 +58183,10 @@ void m68000_device::move_w_ais_aid_df() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58232,10 +58271,10 @@ void m68000_device::move_w_aips_aid_df() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58322,10 +58361,10 @@ void m68000_device::move_w_pais_aid_df() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58428,10 +58467,10 @@ void m68000_device::move_w_das_aid_df() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58572,10 +58611,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58677,10 +58716,10 @@ void m68000_device::move_w_adr16_aid_df() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58803,10 +58842,10 @@ void m68000_device::move_w_adr32_aid_df() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58908,10 +58947,10 @@ void m68000_device::move_w_dpc_aid_df() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59051,10 +59090,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59110,7 +59149,6 @@ void m68000_device::move_w_imm16_aid_df() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59136,10 +59174,10 @@ void m68000_device::move_w_imm16_aid_df() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59172,7 +59210,6 @@ void m68000_device::move_w_ds_aipd_df() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59198,6 +59235,7 @@ void m68000_device::move_w_ds_aipd_df() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59232,7 +59270,6 @@ void m68000_device::move_w_as_aipd_df() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59258,6 +59295,7 @@ void m68000_device::move_w_as_aipd_df() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59316,7 +59354,6 @@ void m68000_device::move_w_ais_aipd_df() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59342,6 +59379,7 @@ void m68000_device::move_w_ais_aipd_df() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59404,7 +59442,6 @@ void m68000_device::move_w_aips_aipd_df() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59430,6 +59467,7 @@ void m68000_device::move_w_aips_aipd_df() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59494,7 +59532,6 @@ void m68000_device::move_w_pais_aipd_df() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59520,6 +59557,7 @@ void m68000_device::move_w_pais_aipd_df() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59600,7 +59638,6 @@ void m68000_device::move_w_das_aipd_df() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59626,6 +59663,7 @@ void m68000_device::move_w_das_aipd_df() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59744,7 +59782,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59770,6 +59807,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59849,7 +59887,6 @@ void m68000_device::move_w_adr16_aipd_df() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59875,6 +59912,7 @@ void m68000_device::move_w_adr16_aipd_df() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59975,7 +60013,6 @@ void m68000_device::move_w_adr32_aipd_df() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60001,6 +60038,7 @@ void m68000_device::move_w_adr32_aipd_df() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60080,7 +60118,6 @@ void m68000_device::move_w_dpc_aipd_df() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60106,6 +60143,7 @@ void m68000_device::move_w_dpc_aipd_df() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60223,7 +60261,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60249,6 +60286,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60306,7 +60344,6 @@ void m68000_device::move_w_imm16_aipd_df() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60332,6 +60369,7 @@ void m68000_device::move_w_imm16_aipd_df() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60366,7 +60404,6 @@ void m68000_device::move_w_ds_paid_df() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60393,6 +60430,7 @@ void m68000_device::move_w_ds_paid_df() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60426,7 +60464,6 @@ void m68000_device::move_w_as_paid_df() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60453,6 +60490,7 @@ void m68000_device::move_w_as_paid_df() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60510,7 +60548,6 @@ void m68000_device::move_w_ais_paid_df() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60537,6 +60574,7 @@ void m68000_device::move_w_ais_paid_df() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60598,7 +60636,6 @@ void m68000_device::move_w_aips_paid_df() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60625,6 +60662,7 @@ void m68000_device::move_w_aips_paid_df() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60688,7 +60726,6 @@ void m68000_device::move_w_pais_paid_df() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60715,6 +60752,7 @@ void m68000_device::move_w_pais_paid_df() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60794,7 +60832,6 @@ void m68000_device::move_w_das_paid_df() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60821,6 +60858,7 @@ void m68000_device::move_w_das_paid_df() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60938,7 +60976,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60965,6 +61002,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61043,7 +61081,6 @@ void m68000_device::move_w_adr16_paid_df() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61070,6 +61107,7 @@ void m68000_device::move_w_adr16_paid_df() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61169,7 +61207,6 @@ void m68000_device::move_w_adr32_paid_df() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61196,6 +61233,7 @@ void m68000_device::move_w_adr32_paid_df() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61274,7 +61312,6 @@ void m68000_device::move_w_dpc_paid_df() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61301,6 +61338,7 @@ void m68000_device::move_w_dpc_paid_df() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61417,7 +61455,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61444,6 +61481,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61500,7 +61538,6 @@ void m68000_device::move_w_imm16_paid_df() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61527,6 +61564,7 @@ void m68000_device::move_w_imm16_paid_df() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61581,7 +61619,6 @@ void m68000_device::move_w_ds_dad_df() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61606,11 +61643,11 @@ void m68000_device::move_w_ds_dad_df() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61664,7 +61701,6 @@ void m68000_device::move_w_as_dad_df() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61689,11 +61725,11 @@ void m68000_device::move_w_as_dad_df() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61774,6 +61810,7 @@ void m68000_device::move_w_ais_dad_df() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61798,11 +61835,11 @@ void m68000_device::move_w_ais_dad_df() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61887,6 +61924,7 @@ void m68000_device::move_w_aips_dad_df() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61911,11 +61949,11 @@ void m68000_device::move_w_aips_dad_df() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62002,6 +62040,7 @@ void m68000_device::move_w_pais_dad_df() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62026,11 +62065,11 @@ void m68000_device::move_w_pais_dad_df() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62133,6 +62172,7 @@ void m68000_device::move_w_das_dad_df() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62157,11 +62197,11 @@ void m68000_device::move_w_das_dad_df() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62302,6 +62342,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62326,11 +62367,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62432,6 +62473,7 @@ void m68000_device::move_w_adr16_dad_df() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62456,11 +62498,11 @@ void m68000_device::move_w_adr16_dad_df() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62583,6 +62625,7 @@ void m68000_device::move_w_adr32_dad_df() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62607,11 +62650,11 @@ void m68000_device::move_w_adr32_dad_df() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62713,6 +62756,7 @@ void m68000_device::move_w_dpc_dad_df() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62737,11 +62781,11 @@ void m68000_device::move_w_dpc_dad_df() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62881,6 +62925,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62905,11 +62950,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62986,7 +63031,6 @@ void m68000_device::move_w_imm16_dad_df() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63011,11 +63055,11 @@ void m68000_device::move_w_imm16_dad_df() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63108,7 +63152,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63133,11 +63176,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63230,7 +63273,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63255,11 +63297,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63378,6 +63420,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63402,11 +63445,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63529,6 +63572,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63553,11 +63597,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63682,6 +63726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63706,11 +63751,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63851,6 +63896,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63875,11 +63921,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64058,6 +64104,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64082,11 +64129,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64226,6 +64273,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64250,11 +64298,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64415,6 +64463,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64439,11 +64488,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64583,6 +64632,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64607,11 +64657,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64789,6 +64839,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64813,11 +64864,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64933,7 +64984,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64958,11 +65008,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65019,6 +65069,7 @@ void m68000_device::move_w_ds_adr16_df() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65043,11 +65094,11 @@ void m68000_device::move_w_ds_adr16_df() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65104,6 +65155,7 @@ void m68000_device::move_w_as_adr16_df() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65128,11 +65180,11 @@ void m68000_device::move_w_as_adr16_df() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65212,6 +65264,7 @@ void m68000_device::move_w_ais_adr16_df() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65236,11 +65289,11 @@ void m68000_device::move_w_ais_adr16_df() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65324,6 +65377,7 @@ void m68000_device::move_w_aips_adr16_df() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65348,11 +65402,11 @@ void m68000_device::move_w_aips_adr16_df() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65438,6 +65492,7 @@ void m68000_device::move_w_pais_adr16_df() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65462,11 +65517,11 @@ void m68000_device::move_w_pais_adr16_df() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65568,6 +65623,7 @@ void m68000_device::move_w_das_adr16_df() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65592,11 +65648,11 @@ void m68000_device::move_w_das_adr16_df() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65736,6 +65792,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65760,11 +65817,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65865,6 +65922,7 @@ void m68000_device::move_w_adr16_adr16_df() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65889,11 +65947,11 @@ void m68000_device::move_w_adr16_adr16_df() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66015,6 +66073,7 @@ void m68000_device::move_w_adr32_adr16_df() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66039,11 +66098,11 @@ void m68000_device::move_w_adr32_adr16_df() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66144,6 +66203,7 @@ void m68000_device::move_w_dpc_adr16_df() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66168,11 +66228,11 @@ void m68000_device::move_w_dpc_adr16_df() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66311,6 +66371,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66335,11 +66396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66419,6 +66480,7 @@ void m68000_device::move_w_imm16_adr16_df() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66443,11 +66505,11 @@ void m68000_device::move_w_imm16_adr16_df() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66525,6 +66587,7 @@ void m68000_device::move_w_ds_adr32_df() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66549,11 +66612,11 @@ void m68000_device::move_w_ds_adr32_df() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66631,6 +66694,7 @@ void m68000_device::move_w_as_adr32_df() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66655,11 +66719,11 @@ void m68000_device::move_w_as_adr32_df() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66739,7 +66803,6 @@ void m68000_device::move_w_ais_adr32_df() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66785,11 +66848,11 @@ void m68000_device::move_w_ais_adr32_df() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66873,7 +66936,6 @@ void m68000_device::move_w_aips_adr32_df() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66919,11 +66981,11 @@ void m68000_device::move_w_aips_adr32_df() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67009,7 +67071,6 @@ void m68000_device::move_w_pais_adr32_df() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67055,11 +67116,11 @@ void m68000_device::move_w_pais_adr32_df() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67161,7 +67222,6 @@ void m68000_device::move_w_das_adr32_df() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67207,11 +67267,11 @@ void m68000_device::move_w_das_adr32_df() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67351,7 +67411,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67397,11 +67456,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67502,7 +67561,6 @@ void m68000_device::move_w_adr16_adr32_df() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67548,11 +67606,11 @@ void m68000_device::move_w_adr16_adr32_df() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67674,7 +67732,6 @@ void m68000_device::move_w_adr32_adr32_df() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67720,11 +67777,11 @@ void m68000_device::move_w_adr32_adr32_df() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67825,7 +67882,6 @@ void m68000_device::move_w_dpc_adr32_df() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67871,11 +67927,11 @@ void m68000_device::move_w_dpc_adr32_df() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68014,7 +68070,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -68060,11 +68115,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68165,6 +68220,7 @@ void m68000_device::move_w_imm16_adr32_df() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -68189,11 +68245,11 @@ void m68000_device::move_w_imm16_adr32_df() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68225,7 +68281,6 @@ void m68000_device::negx_b_ds_df() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68233,6 +68288,7 @@ void m68000_device::negx_b_ds_df() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68287,7 +68343,6 @@ void m68000_device::negx_b_ais_df() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68314,6 +68369,7 @@ void m68000_device::negx_b_ais_df() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68365,7 +68421,6 @@ void m68000_device::negx_b_aips_df() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68392,6 +68447,7 @@ void m68000_device::negx_b_aips_df() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68445,7 +68501,6 @@ void m68000_device::negx_b_pais_df() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68472,6 +68527,7 @@ void m68000_device::negx_b_pais_df() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68541,7 +68597,6 @@ void m68000_device::negx_b_das_df() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68568,6 +68623,7 @@ void m68000_device::negx_b_das_df() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68675,7 +68731,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68702,6 +68757,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68770,7 +68826,6 @@ void m68000_device::negx_b_adr16_df() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68797,6 +68852,7 @@ void m68000_device::negx_b_adr16_df() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68886,7 +68942,6 @@ void m68000_device::negx_b_adr32_df() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68913,6 +68968,7 @@ void m68000_device::negx_b_adr32_df() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68939,7 +68995,6 @@ void m68000_device::negx_w_ds_df() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68947,6 +69002,7 @@ void m68000_device::negx_w_ds_df() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69004,7 +69060,6 @@ void m68000_device::negx_w_ais_df() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69031,6 +69086,7 @@ void m68000_device::negx_w_ais_df() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69090,7 +69146,6 @@ void m68000_device::negx_w_aips_df() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69117,6 +69172,7 @@ void m68000_device::negx_w_aips_df() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69178,7 +69234,6 @@ void m68000_device::negx_w_pais_df() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69205,6 +69260,7 @@ void m68000_device::negx_w_pais_df() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69282,7 +69338,6 @@ void m68000_device::negx_w_das_df() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69309,6 +69364,7 @@ void m68000_device::negx_w_das_df() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69424,7 +69480,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69451,6 +69506,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69527,7 +69583,6 @@ void m68000_device::negx_w_adr16_df() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69554,6 +69609,7 @@ void m68000_device::negx_w_adr16_df() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69651,7 +69707,6 @@ void m68000_device::negx_w_adr32_df() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69678,6 +69733,7 @@ void m68000_device::negx_w_adr32_df() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69709,7 +69765,6 @@ void m68000_device::negx_l_ds_df() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -69740,6 +69795,7 @@ void m68000_device::negx_l_ds_df() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -69801,7 +69857,6 @@ void m68000_device::negx_l_ais_df() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69851,6 +69906,7 @@ void m68000_device::negx_l_ais_df() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69930,7 +69986,6 @@ void m68000_device::negx_l_aips_df() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69980,6 +70035,7 @@ void m68000_device::negx_l_aips_df() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70060,7 +70116,6 @@ void m68000_device::negx_l_pais_df() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70110,6 +70165,7 @@ void m68000_device::negx_l_pais_df() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70207,7 +70263,6 @@ void m68000_device::negx_l_das_df() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70257,6 +70312,7 @@ void m68000_device::negx_l_das_df() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70392,7 +70448,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70442,6 +70497,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70541,7 +70597,6 @@ void m68000_device::negx_l_adr16_df() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70591,6 +70646,7 @@ void m68000_device::negx_l_adr16_df() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70711,7 +70767,6 @@ void m68000_device::negx_l_adr32_df() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70761,6 +70816,7 @@ void m68000_device::negx_l_adr32_df() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70792,7 +70848,6 @@ void m68000_device::move_sr_ds_df() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -70817,6 +70872,7 @@ void m68000_device::move_sr_ds_df() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -70856,7 +70912,6 @@ void m68000_device::move_sr_ais_df() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70884,6 +70939,7 @@ void m68000_device::move_sr_ais_df() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70943,7 +70999,6 @@ void m68000_device::move_sr_aips_df() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70971,6 +71026,7 @@ void m68000_device::move_sr_aips_df() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71032,7 +71088,6 @@ void m68000_device::move_sr_pais_df() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71060,6 +71115,7 @@ void m68000_device::move_sr_pais_df() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71137,7 +71193,6 @@ void m68000_device::move_sr_das_df() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71165,6 +71220,7 @@ void m68000_device::move_sr_das_df() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71280,7 +71336,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71308,6 +71363,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71384,7 +71440,6 @@ void m68000_device::move_sr_adr16_df() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71412,6 +71467,7 @@ void m68000_device::move_sr_adr16_df() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71509,7 +71565,6 @@ void m68000_device::move_sr_adr32_df() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71537,6 +71592,7 @@ void m68000_device::move_sr_adr32_df() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71734,7 +71790,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71749,6 +71804,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -71776,7 +71832,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71978,7 +72033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71993,6 +72047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72020,7 +72075,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72226,7 +72280,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72241,6 +72294,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72268,7 +72322,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72476,7 +72529,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72491,6 +72543,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72518,7 +72571,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72742,7 +72794,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72757,6 +72808,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72784,7 +72836,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73046,7 +73097,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73061,6 +73111,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73088,7 +73139,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73311,7 +73361,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73326,6 +73375,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73353,7 +73403,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73597,7 +73646,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73612,6 +73660,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73639,7 +73688,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73862,7 +73910,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73877,6 +73924,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73904,7 +73952,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74165,7 +74212,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74180,6 +74226,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74207,7 +74254,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74408,7 +74454,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74423,6 +74468,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74450,7 +74496,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74463,13 +74508,13 @@ void m68000_device::lea_ais_ad_df() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74527,11 +74572,11 @@ void m68000_device::lea_das_ad_df() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74627,11 +74672,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74684,11 +74729,11 @@ void m68000_device::lea_adr16_ad_df() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74764,11 +74809,11 @@ void m68000_device::lea_adr32_ad_df() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74823,11 +74868,11 @@ void m68000_device::lea_dpc_ad_df() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74922,11 +74967,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74958,7 +75003,6 @@ void m68000_device::clr_b_ds_df() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -74966,6 +75010,7 @@ void m68000_device::clr_b_ds_df() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75022,7 +75067,6 @@ void m68000_device::clr_b_ais_df() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75049,6 +75093,7 @@ void m68000_device::clr_b_ais_df() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75103,7 +75148,6 @@ void m68000_device::clr_b_aips_df() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75130,6 +75174,7 @@ void m68000_device::clr_b_aips_df() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75186,7 +75231,6 @@ void m68000_device::clr_b_pais_df() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75213,6 +75257,7 @@ void m68000_device::clr_b_pais_df() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75285,7 +75330,6 @@ void m68000_device::clr_b_das_df() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75312,6 +75356,7 @@ void m68000_device::clr_b_das_df() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75424,7 +75469,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75451,6 +75495,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75522,7 +75567,6 @@ void m68000_device::clr_b_adr16_df() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75549,6 +75593,7 @@ void m68000_device::clr_b_adr16_df() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75642,7 +75687,6 @@ void m68000_device::clr_b_adr32_df() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75669,6 +75713,7 @@ void m68000_device::clr_b_adr32_df() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75696,7 +75741,6 @@ void m68000_device::clr_w_ds_df() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -75704,6 +75748,7 @@ void m68000_device::clr_w_ds_df() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75763,7 +75808,6 @@ void m68000_device::clr_w_ais_df() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75790,6 +75834,7 @@ void m68000_device::clr_w_ais_df() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -75852,7 +75897,6 @@ void m68000_device::clr_w_aips_df() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75879,6 +75923,7 @@ void m68000_device::clr_w_aips_df() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -75943,7 +75988,6 @@ void m68000_device::clr_w_pais_df() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75970,6 +76014,7 @@ void m68000_device::clr_w_pais_df() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76050,7 +76095,6 @@ void m68000_device::clr_w_das_df() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76077,6 +76121,7 @@ void m68000_device::clr_w_das_df() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76197,7 +76242,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76224,6 +76268,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76303,7 +76348,6 @@ void m68000_device::clr_w_adr16_df() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76330,6 +76374,7 @@ void m68000_device::clr_w_adr16_df() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76431,7 +76476,6 @@ void m68000_device::clr_w_adr32_df() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76458,6 +76502,7 @@ void m68000_device::clr_w_adr32_df() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76490,7 +76535,6 @@ void m68000_device::clr_l_ds_df() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -76521,6 +76565,7 @@ void m68000_device::clr_l_ds_df() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -76584,7 +76629,6 @@ void m68000_device::clr_l_ais_df() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76634,6 +76678,7 @@ void m68000_device::clr_l_ais_df() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76716,7 +76761,6 @@ void m68000_device::clr_l_aips_df() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76766,6 +76810,7 @@ void m68000_device::clr_l_aips_df() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76849,7 +76894,6 @@ void m68000_device::clr_l_pais_df() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76899,6 +76943,7 @@ void m68000_device::clr_l_pais_df() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76999,7 +77044,6 @@ void m68000_device::clr_l_das_df() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77049,6 +77093,7 @@ void m68000_device::clr_l_das_df() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77189,7 +77234,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77239,6 +77283,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77342,7 +77387,6 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77392,6 +77436,7 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77517,7 +77562,6 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77567,6 +77611,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77599,7 +77644,6 @@ void m68000_device::neg_b_ds_df() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -77607,6 +77651,7 @@ void m68000_device::neg_b_ds_df() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77661,7 +77706,6 @@ void m68000_device::neg_b_ais_df() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77688,6 +77732,7 @@ void m68000_device::neg_b_ais_df() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77739,7 +77784,6 @@ void m68000_device::neg_b_aips_df() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77766,6 +77810,7 @@ void m68000_device::neg_b_aips_df() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77819,7 +77864,6 @@ void m68000_device::neg_b_pais_df() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77846,6 +77890,7 @@ void m68000_device::neg_b_pais_df() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77915,7 +77960,6 @@ void m68000_device::neg_b_das_df() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77942,6 +77986,7 @@ void m68000_device::neg_b_das_df() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78049,7 +78094,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78076,6 +78120,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78144,7 +78189,6 @@ void m68000_device::neg_b_adr16_df() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78171,6 +78215,7 @@ void m68000_device::neg_b_adr16_df() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78260,7 +78305,6 @@ void m68000_device::neg_b_adr32_df() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78287,6 +78331,7 @@ void m68000_device::neg_b_adr32_df() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78313,7 +78358,6 @@ void m68000_device::neg_w_ds_df() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -78321,6 +78365,7 @@ void m68000_device::neg_w_ds_df() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78378,7 +78423,6 @@ void m68000_device::neg_w_ais_df() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78405,6 +78449,7 @@ void m68000_device::neg_w_ais_df() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78464,7 +78509,6 @@ void m68000_device::neg_w_aips_df() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78491,6 +78535,7 @@ void m68000_device::neg_w_aips_df() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78552,7 +78597,6 @@ void m68000_device::neg_w_pais_df() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78579,6 +78623,7 @@ void m68000_device::neg_w_pais_df() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78656,7 +78701,6 @@ void m68000_device::neg_w_das_df() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78683,6 +78727,7 @@ void m68000_device::neg_w_das_df() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78798,7 +78843,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78825,6 +78869,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78901,7 +78946,6 @@ void m68000_device::neg_w_adr16_df() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78928,6 +78972,7 @@ void m68000_device::neg_w_adr16_df() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79025,7 +79070,6 @@ void m68000_device::neg_w_adr32_df() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79052,6 +79096,7 @@ void m68000_device::neg_w_adr32_df() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79083,7 +79128,6 @@ void m68000_device::neg_l_ds_df() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -79114,6 +79158,7 @@ void m68000_device::neg_l_ds_df() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79175,7 +79220,6 @@ void m68000_device::neg_l_ais_df() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79225,6 +79269,7 @@ void m68000_device::neg_l_ais_df() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79304,7 +79349,6 @@ void m68000_device::neg_l_aips_df() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79354,6 +79398,7 @@ void m68000_device::neg_l_aips_df() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79434,7 +79479,6 @@ void m68000_device::neg_l_pais_df() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79484,6 +79528,7 @@ void m68000_device::neg_l_pais_df() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79581,7 +79626,6 @@ void m68000_device::neg_l_das_df() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79631,6 +79675,7 @@ void m68000_device::neg_l_das_df() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79766,7 +79811,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79816,6 +79860,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79915,7 +79960,6 @@ void m68000_device::neg_l_adr16_df() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79965,6 +80009,7 @@ void m68000_device::neg_l_adr16_df() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -80085,7 +80130,6 @@ void m68000_device::neg_l_adr32_df() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80135,6 +80179,7 @@ void m68000_device::neg_l_adr32_df() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -80198,11 +80243,11 @@ void m68000_device::move_ds_ccr_df() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80290,11 +80335,11 @@ void m68000_device::move_ais_ccr_df() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80386,11 +80431,11 @@ void m68000_device::move_aips_ccr_df() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80484,11 +80529,11 @@ void m68000_device::move_pais_ccr_df() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80598,11 +80643,11 @@ void m68000_device::move_das_ccr_df() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80750,11 +80795,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80863,11 +80908,11 @@ void m68000_device::move_adr16_ccr_df() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80997,11 +81042,11 @@ void m68000_device::move_adr32_ccr_df() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81110,11 +81155,11 @@ void m68000_device::move_dpc_ccr_df() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81261,11 +81306,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81352,11 +81397,11 @@ void m68000_device::move_imm8_ccr_df() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81388,7 +81433,6 @@ void m68000_device::not_b_ds_df() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -81396,6 +81440,7 @@ void m68000_device::not_b_ds_df() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81450,7 +81495,6 @@ void m68000_device::not_b_ais_df() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81477,6 +81521,7 @@ void m68000_device::not_b_ais_df() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81528,7 +81573,6 @@ void m68000_device::not_b_aips_df() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81555,6 +81599,7 @@ void m68000_device::not_b_aips_df() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81608,7 +81653,6 @@ void m68000_device::not_b_pais_df() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81635,6 +81679,7 @@ void m68000_device::not_b_pais_df() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81704,7 +81749,6 @@ void m68000_device::not_b_das_df() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81731,6 +81775,7 @@ void m68000_device::not_b_das_df() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81838,7 +81883,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81865,6 +81909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81933,7 +81978,6 @@ void m68000_device::not_b_adr16_df() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81960,6 +82004,7 @@ void m68000_device::not_b_adr16_df() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82049,7 +82094,6 @@ void m68000_device::not_b_adr32_df() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82076,6 +82120,7 @@ void m68000_device::not_b_adr32_df() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82102,7 +82147,6 @@ void m68000_device::not_w_ds_df() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82110,6 +82154,7 @@ void m68000_device::not_w_ds_df() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82167,7 +82212,6 @@ void m68000_device::not_w_ais_df() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82194,6 +82238,7 @@ void m68000_device::not_w_ais_df() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82253,7 +82298,6 @@ void m68000_device::not_w_aips_df() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82280,6 +82324,7 @@ void m68000_device::not_w_aips_df() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82341,7 +82386,6 @@ void m68000_device::not_w_pais_df() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82368,6 +82412,7 @@ void m68000_device::not_w_pais_df() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82445,7 +82490,6 @@ void m68000_device::not_w_das_df() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82472,6 +82516,7 @@ void m68000_device::not_w_das_df() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82587,7 +82632,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82614,6 +82658,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82690,7 +82735,6 @@ void m68000_device::not_w_adr16_df() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82717,6 +82761,7 @@ void m68000_device::not_w_adr16_df() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82814,7 +82859,6 @@ void m68000_device::not_w_adr32_df() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82841,6 +82885,7 @@ void m68000_device::not_w_adr32_df() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82872,7 +82917,6 @@ void m68000_device::not_l_ds_df() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82903,6 +82947,7 @@ void m68000_device::not_l_ds_df() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -82964,7 +83009,6 @@ void m68000_device::not_l_ais_df() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83014,6 +83058,7 @@ void m68000_device::not_l_ais_df() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83093,7 +83138,6 @@ void m68000_device::not_l_aips_df() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83143,6 +83187,7 @@ void m68000_device::not_l_aips_df() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83223,7 +83268,6 @@ void m68000_device::not_l_pais_df() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83273,6 +83317,7 @@ void m68000_device::not_l_pais_df() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83370,7 +83415,6 @@ void m68000_device::not_l_das_df() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83420,6 +83464,7 @@ void m68000_device::not_l_das_df() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83555,7 +83600,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83605,6 +83649,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83704,7 +83749,6 @@ void m68000_device::not_l_adr16_df() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83754,6 +83798,7 @@ void m68000_device::not_l_adr16_df() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83874,7 +83919,6 @@ void m68000_device::not_l_adr32_df() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83924,6 +83968,7 @@ void m68000_device::not_l_adr32_df() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83993,11 +84038,11 @@ void m68000_device::move_ds_sr_df() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84091,11 +84136,11 @@ void m68000_device::move_ais_sr_df() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84193,11 +84238,11 @@ void m68000_device::move_aips_sr_df() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84297,11 +84342,11 @@ void m68000_device::move_pais_sr_df() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84417,11 +84462,11 @@ void m68000_device::move_das_sr_df() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84575,11 +84620,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84694,11 +84739,11 @@ void m68000_device::move_adr16_sr_df() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84834,11 +84879,11 @@ void m68000_device::move_adr32_sr_df() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84953,11 +84998,11 @@ void m68000_device::move_dpc_sr_df() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -85110,11 +85155,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -85207,11 +85252,11 @@ void m68000_device::move_i16u_sr_df() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -85243,7 +85288,6 @@ void m68000_device::nbcd_b_ds_df() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -85272,6 +85316,7 @@ void m68000_device::nbcd_b_ds_df() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -85309,7 +85354,6 @@ void m68000_device::nbcd_b_ais_df() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85338,6 +85382,7 @@ void m68000_device::nbcd_b_ais_df() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85389,7 +85434,6 @@ void m68000_device::nbcd_b_aips_df() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85418,6 +85462,7 @@ void m68000_device::nbcd_b_aips_df() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85471,7 +85516,6 @@ void m68000_device::nbcd_b_pais_df() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85500,6 +85544,7 @@ void m68000_device::nbcd_b_pais_df() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85569,7 +85614,6 @@ void m68000_device::nbcd_b_das_df() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85598,6 +85642,7 @@ void m68000_device::nbcd_b_das_df() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85705,7 +85750,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85734,6 +85778,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85802,7 +85847,6 @@ void m68000_device::nbcd_b_adr16_df() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85831,6 +85875,7 @@ void m68000_device::nbcd_b_adr16_df() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85920,7 +85965,6 @@ void m68000_device::nbcd_b_adr32_df() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85949,6 +85993,7 @@ void m68000_device::nbcd_b_adr32_df() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85975,7 +86020,6 @@ void m68000_device::swap_ds_df() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -85984,6 +86028,7 @@ void m68000_device::swap_ds_df() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86020,7 +86065,6 @@ void m68000_device::pea_ais_df() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86068,6 +86112,7 @@ void m68000_device::pea_ais_df() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86123,7 +86168,6 @@ void m68000_device::pea_das_df() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86173,6 +86217,7 @@ void m68000_device::pea_das_df() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86262,7 +86307,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86314,6 +86358,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86387,6 +86432,7 @@ void m68000_device::pea_adr16_df() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86411,11 +86457,11 @@ void m68000_device::pea_adr16_df() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86510,6 +86556,7 @@ void m68000_device::pea_adr32_df() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86534,11 +86581,11 @@ void m68000_device::pea_adr32_df() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86593,7 +86640,6 @@ void m68000_device::pea_dpc_df() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86643,6 +86689,7 @@ void m68000_device::pea_dpc_df() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86731,7 +86778,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86783,6 +86829,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86814,7 +86861,6 @@ void m68000_device::ext_w_ds_df() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -86822,6 +86868,7 @@ void m68000_device::ext_w_ds_df() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86914,10 +86961,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87010,11 +87057,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87128,10 +87175,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87283,10 +87330,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87400,10 +87447,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87538,10 +87585,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87573,7 +87620,6 @@ void m68000_device::ext_l_ds_df() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -87581,6 +87627,7 @@ void m68000_device::ext_l_ds_df() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87693,10 +87740,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87810,11 +87857,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87948,10 +87995,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88123,10 +88170,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88260,10 +88307,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88418,10 +88465,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88453,7 +88500,6 @@ void m68000_device::tst_b_ds_df() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -88462,6 +88508,7 @@ void m68000_device::tst_b_ds_df() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88516,7 +88563,6 @@ void m68000_device::tst_b_ais_df() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88524,6 +88570,7 @@ void m68000_device::tst_b_ais_df() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88583,7 +88630,6 @@ void m68000_device::tst_b_aips_df() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88591,6 +88637,7 @@ void m68000_device::tst_b_aips_df() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88652,7 +88699,6 @@ void m68000_device::tst_b_pais_df() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88660,6 +88706,7 @@ void m68000_device::tst_b_pais_df() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88737,7 +88784,6 @@ void m68000_device::tst_b_das_df() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88745,6 +88791,7 @@ void m68000_device::tst_b_das_df() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88862,7 +88909,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88870,6 +88916,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88946,7 +88993,6 @@ void m68000_device::tst_b_adr16_df() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88954,6 +89000,7 @@ void m68000_device::tst_b_adr16_df() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89052,7 +89099,6 @@ void m68000_device::tst_b_adr32_df() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89060,6 +89106,7 @@ void m68000_device::tst_b_adr32_df() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89092,7 +89139,6 @@ void m68000_device::tst_w_ds_df() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89101,6 +89147,7 @@ void m68000_device::tst_w_ds_df() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89158,7 +89205,6 @@ void m68000_device::tst_w_ais_df() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89166,6 +89212,7 @@ void m68000_device::tst_w_ais_df() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89228,7 +89275,6 @@ void m68000_device::tst_w_aips_df() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89236,6 +89282,7 @@ void m68000_device::tst_w_aips_df() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89300,7 +89347,6 @@ void m68000_device::tst_w_pais_df() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89308,6 +89354,7 @@ void m68000_device::tst_w_pais_df() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89388,7 +89435,6 @@ void m68000_device::tst_w_das_df() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89396,6 +89442,7 @@ void m68000_device::tst_w_das_df() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89516,7 +89563,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89524,6 +89570,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89603,7 +89650,6 @@ void m68000_device::tst_w_adr16_df() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89611,6 +89657,7 @@ void m68000_device::tst_w_adr16_df() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89712,7 +89759,6 @@ void m68000_device::tst_w_adr32_df() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89720,6 +89766,7 @@ void m68000_device::tst_w_adr32_df() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89752,7 +89799,6 @@ void m68000_device::tst_l_ds_df() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89761,6 +89807,7 @@ void m68000_device::tst_l_ds_df() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89841,7 +89888,6 @@ void m68000_device::tst_l_ais_df() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89849,6 +89895,7 @@ void m68000_device::tst_l_ais_df() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89933,7 +89980,6 @@ void m68000_device::tst_l_aips_df() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89941,6 +89987,7 @@ void m68000_device::tst_l_aips_df() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90026,7 +90073,6 @@ void m68000_device::tst_l_pais_df() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90034,6 +90080,7 @@ void m68000_device::tst_l_pais_df() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90136,7 +90183,6 @@ void m68000_device::tst_l_das_df() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90144,6 +90190,7 @@ void m68000_device::tst_l_das_df() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90286,7 +90333,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90294,6 +90340,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90399,7 +90446,6 @@ void m68000_device::tst_l_adr16_df() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90407,6 +90453,7 @@ void m68000_device::tst_l_adr16_df() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90534,7 +90581,6 @@ void m68000_device::tst_l_adr32_df() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90542,6 +90588,7 @@ void m68000_device::tst_l_adr32_df() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90576,13 +90623,13 @@ void m68000_device::tas_ds_df() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90668,12 +90715,12 @@ void m68000_device::tas_ais_df() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90760,12 +90807,12 @@ void m68000_device::tas_aips_df() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90854,12 +90901,12 @@ void m68000_device::tas_pais_df() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90964,12 +91011,12 @@ void m68000_device::tas_das_df() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91114,12 +91161,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91223,12 +91270,12 @@ void m68000_device::tas_adr16_df() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91354,12 +91401,12 @@ void m68000_device::tas_adr32_df() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91473,10 +91520,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91531,7 +91578,6 @@ void m68000_device::movem_w_aips_list_df() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); @@ -91594,6 +91640,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91729,10 +91776,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91905,10 +91952,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92042,10 +92089,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92203,10 +92250,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92341,10 +92388,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92516,10 +92563,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92653,10 +92700,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92711,7 +92758,6 @@ void m68000_device::movem_l_aips_list_df() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); @@ -92795,6 +92841,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92951,10 +92998,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93148,10 +93195,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93306,10 +93353,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93488,10 +93535,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93647,10 +93694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93843,10 +93890,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94022,11 +94069,11 @@ void m68000_device::trap_imm4_df() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94084,7 +94131,6 @@ void m68000_device::link_as_imm16_df() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -94127,6 +94173,7 @@ void m68000_device::link_as_imm16_df() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94183,7 +94230,6 @@ void m68000_device::unlk_as_df() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94209,6 +94255,7 @@ void m68000_device::unlk_as_df() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94245,13 +94292,13 @@ void m68000_device::move_as_usp_df() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94289,13 +94336,13 @@ void m68000_device::move_usp_as_df() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94331,6 +94378,7 @@ void m68000_device::reset_df() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94340,7 +94388,6 @@ void m68000_device::reset_df() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -94361,6 +94408,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94392,11 +94440,11 @@ void m68000_device::nop_df() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94430,6 +94478,7 @@ void m68000_device::stop_i16u_df() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94439,6 +94488,7 @@ void m68000_device::stop_i16u_df() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -94551,11 +94601,11 @@ void m68000_device::rte_df() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94650,11 +94700,11 @@ void m68000_device::rts_df() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94685,7 +94735,6 @@ void m68000_device::trapv_df() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -94696,6 +94745,7 @@ void m68000_device::trapv_df() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94882,11 +94932,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95007,11 +95057,11 @@ void m68000_device::rtr_df() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95085,7 +95135,6 @@ void m68000_device::jsr_ais_df() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95107,11 +95156,11 @@ void m68000_device::jsr_ais_df() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95191,7 +95240,6 @@ void m68000_device::jsr_das_df() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95213,11 +95261,11 @@ void m68000_device::jsr_das_df() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95317,7 +95365,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95339,11 +95386,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95419,7 +95466,6 @@ void m68000_device::jsr_adr16_df() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95441,11 +95487,11 @@ void m68000_device::jsr_adr16_df() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95540,7 +95586,6 @@ void m68000_device::jsr_adr32_df() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95562,11 +95607,11 @@ void m68000_device::jsr_adr32_df() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95645,7 +95690,6 @@ void m68000_device::jsr_dpc_df() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95667,11 +95711,11 @@ void m68000_device::jsr_dpc_df() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95770,7 +95814,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95792,11 +95835,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95848,11 +95891,11 @@ void m68000_device::jmp_ais_df() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95908,11 +95951,11 @@ void m68000_device::jmp_das_df() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95988,11 +96031,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96046,11 +96089,11 @@ void m68000_device::jmp_adr16_df() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96122,11 +96165,11 @@ void m68000_device::jmp_adr32_df() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96181,11 +96224,11 @@ void m68000_device::jmp_dpc_df() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96260,11 +96303,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96296,7 +96339,6 @@ void m68000_device::addq_b_imm3_ds_df() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -96304,6 +96346,7 @@ void m68000_device::addq_b_imm3_ds_df() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96358,7 +96401,6 @@ void m68000_device::addq_b_imm3_ais_df() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96386,6 +96428,7 @@ void m68000_device::addq_b_imm3_ais_df() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96437,7 +96480,6 @@ void m68000_device::addq_b_imm3_aips_df() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96465,6 +96507,7 @@ void m68000_device::addq_b_imm3_aips_df() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96518,7 +96561,6 @@ void m68000_device::addq_b_imm3_pais_df() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96546,6 +96588,7 @@ void m68000_device::addq_b_imm3_pais_df() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96615,7 +96658,6 @@ void m68000_device::addq_b_imm3_das_df() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96643,6 +96685,7 @@ void m68000_device::addq_b_imm3_das_df() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96750,7 +96793,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96778,6 +96820,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96846,7 +96889,6 @@ void m68000_device::addq_b_imm3_adr16_df() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96874,6 +96916,7 @@ void m68000_device::addq_b_imm3_adr16_df() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96963,7 +97006,6 @@ void m68000_device::addq_b_imm3_adr32_df() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96991,6 +97033,7 @@ void m68000_device::addq_b_imm3_adr32_df() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -97017,7 +97060,6 @@ void m68000_device::addq_w_imm3_ds_df() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97025,6 +97067,7 @@ void m68000_device::addq_w_imm3_ds_df() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97058,7 +97101,6 @@ void m68000_device::addq_w_imm3_as_df() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97089,6 +97131,7 @@ void m68000_device::addq_w_imm3_as_df() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97129,7 +97172,6 @@ void m68000_device::addq_w_imm3_ais_df() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97157,6 +97199,7 @@ void m68000_device::addq_w_imm3_ais_df() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97216,7 +97259,6 @@ void m68000_device::addq_w_imm3_aips_df() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97244,6 +97286,7 @@ void m68000_device::addq_w_imm3_aips_df() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97305,7 +97348,6 @@ void m68000_device::addq_w_imm3_pais_df() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97333,6 +97375,7 @@ void m68000_device::addq_w_imm3_pais_df() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97410,7 +97453,6 @@ void m68000_device::addq_w_imm3_das_df() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97438,6 +97480,7 @@ void m68000_device::addq_w_imm3_das_df() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97553,7 +97596,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97581,6 +97623,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97657,7 +97700,6 @@ void m68000_device::addq_w_imm3_adr16_df() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97685,6 +97727,7 @@ void m68000_device::addq_w_imm3_adr16_df() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97782,7 +97825,6 @@ void m68000_device::addq_w_imm3_adr32_df() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97810,6 +97852,7 @@ void m68000_device::addq_w_imm3_adr32_df() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97841,7 +97884,6 @@ void m68000_device::addq_l_imm3_ds_df() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97874,6 +97916,7 @@ void m68000_device::addq_l_imm3_ds_df() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97890,7 +97933,6 @@ void m68000_device::addq_l_imm3_as_df() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97921,6 +97963,7 @@ void m68000_device::addq_l_imm3_as_df() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97982,7 +98025,6 @@ void m68000_device::addq_l_imm3_ais_df() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98033,6 +98075,7 @@ void m68000_device::addq_l_imm3_ais_df() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98112,7 +98155,6 @@ void m68000_device::addq_l_imm3_aips_df() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98163,6 +98205,7 @@ void m68000_device::addq_l_imm3_aips_df() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98243,7 +98286,6 @@ void m68000_device::addq_l_imm3_pais_df() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98294,6 +98336,7 @@ void m68000_device::addq_l_imm3_pais_df() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98391,7 +98434,6 @@ void m68000_device::addq_l_imm3_das_df() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98442,6 +98484,7 @@ void m68000_device::addq_l_imm3_das_df() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98577,7 +98620,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98628,6 +98670,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98727,7 +98770,6 @@ void m68000_device::addq_l_imm3_adr16_df() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98778,6 +98820,7 @@ void m68000_device::addq_l_imm3_adr16_df() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98898,7 +98941,6 @@ void m68000_device::addq_l_imm3_adr32_df() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98949,6 +98991,7 @@ void m68000_device::addq_l_imm3_adr32_df() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98980,7 +99023,6 @@ void m68000_device::st_ds_df() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -98992,6 +99034,7 @@ void m68000_device::st_ds_df() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99043,6 +99086,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -99104,6 +99148,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -99135,12 +99180,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99169,12 +99214,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99205,6 +99250,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99259,7 +99305,6 @@ void m68000_device::st_ais_df() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99321,6 +99366,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99375,7 +99421,6 @@ void m68000_device::st_aips_df() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99437,6 +99482,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99493,7 +99539,6 @@ void m68000_device::st_pais_df() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99555,6 +99600,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99627,7 +99673,6 @@ void m68000_device::st_das_df() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99689,6 +99734,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99801,7 +99847,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99863,6 +99908,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99934,7 +99980,6 @@ void m68000_device::st_adr16_df() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99996,6 +100041,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100089,7 +100135,6 @@ void m68000_device::st_adr32_df() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -100151,6 +100196,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100178,7 +100224,6 @@ void m68000_device::subq_b_imm3_ds_df() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100186,6 +100231,7 @@ void m68000_device::subq_b_imm3_ds_df() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100240,7 +100286,6 @@ void m68000_device::subq_b_imm3_ais_df() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100268,6 +100313,7 @@ void m68000_device::subq_b_imm3_ais_df() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100319,7 +100365,6 @@ void m68000_device::subq_b_imm3_aips_df() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100347,6 +100392,7 @@ void m68000_device::subq_b_imm3_aips_df() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100400,7 +100446,6 @@ void m68000_device::subq_b_imm3_pais_df() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100428,6 +100473,7 @@ void m68000_device::subq_b_imm3_pais_df() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100497,7 +100543,6 @@ void m68000_device::subq_b_imm3_das_df() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100525,6 +100570,7 @@ void m68000_device::subq_b_imm3_das_df() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100632,7 +100678,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100660,6 +100705,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100728,7 +100774,6 @@ void m68000_device::subq_b_imm3_adr16_df() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100756,6 +100801,7 @@ void m68000_device::subq_b_imm3_adr16_df() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100845,7 +100891,6 @@ void m68000_device::subq_b_imm3_adr32_df() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100873,6 +100918,7 @@ void m68000_device::subq_b_imm3_adr32_df() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100899,7 +100945,6 @@ void m68000_device::subq_w_imm3_ds_df() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100907,6 +100952,7 @@ void m68000_device::subq_w_imm3_ds_df() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100940,7 +100986,6 @@ void m68000_device::subq_w_imm3_as_df() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -100971,6 +101016,7 @@ void m68000_device::subq_w_imm3_as_df() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101011,7 +101057,6 @@ void m68000_device::subq_w_imm3_ais_df() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101039,6 +101084,7 @@ void m68000_device::subq_w_imm3_ais_df() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101098,7 +101144,6 @@ void m68000_device::subq_w_imm3_aips_df() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101126,6 +101171,7 @@ void m68000_device::subq_w_imm3_aips_df() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101187,7 +101233,6 @@ void m68000_device::subq_w_imm3_pais_df() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101215,6 +101260,7 @@ void m68000_device::subq_w_imm3_pais_df() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101292,7 +101338,6 @@ void m68000_device::subq_w_imm3_das_df() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101320,6 +101365,7 @@ void m68000_device::subq_w_imm3_das_df() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101435,7 +101481,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101463,6 +101508,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101539,7 +101585,6 @@ void m68000_device::subq_w_imm3_adr16_df() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101567,6 +101612,7 @@ void m68000_device::subq_w_imm3_adr16_df() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101664,7 +101710,6 @@ void m68000_device::subq_w_imm3_adr32_df() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101692,6 +101737,7 @@ void m68000_device::subq_w_imm3_adr32_df() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101723,7 +101769,6 @@ void m68000_device::subq_l_imm3_ds_df() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -101756,6 +101801,7 @@ void m68000_device::subq_l_imm3_ds_df() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101772,7 +101818,6 @@ void m68000_device::subq_l_imm3_as_df() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -101803,6 +101848,7 @@ void m68000_device::subq_l_imm3_as_df() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101864,7 +101910,6 @@ void m68000_device::subq_l_imm3_ais_df() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101915,6 +101960,7 @@ void m68000_device::subq_l_imm3_ais_df() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101994,7 +102040,6 @@ void m68000_device::subq_l_imm3_aips_df() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102045,6 +102090,7 @@ void m68000_device::subq_l_imm3_aips_df() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102125,7 +102171,6 @@ void m68000_device::subq_l_imm3_pais_df() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102176,6 +102221,7 @@ void m68000_device::subq_l_imm3_pais_df() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102273,7 +102319,6 @@ void m68000_device::subq_l_imm3_das_df() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102324,6 +102369,7 @@ void m68000_device::subq_l_imm3_das_df() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102459,7 +102505,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102510,6 +102555,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102609,7 +102655,6 @@ void m68000_device::subq_l_imm3_adr16_df() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102660,6 +102705,7 @@ void m68000_device::subq_l_imm3_adr16_df() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102780,7 +102826,6 @@ void m68000_device::subq_l_imm3_adr32_df() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102831,6 +102876,7 @@ void m68000_device::subq_l_imm3_adr32_df() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102862,7 +102908,6 @@ void m68000_device::sf_ds_df() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -102874,6 +102919,7 @@ void m68000_device::sf_ds_df() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102925,6 +102971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -102986,6 +103033,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -103017,12 +103065,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -103051,12 +103099,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -103087,6 +103135,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -103141,7 +103190,6 @@ void m68000_device::sf_ais_df() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103203,6 +103251,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103257,7 +103306,6 @@ void m68000_device::sf_aips_df() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103319,6 +103367,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103375,7 +103424,6 @@ void m68000_device::sf_pais_df() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103437,6 +103485,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103509,7 +103558,6 @@ void m68000_device::sf_das_df() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103571,6 +103619,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103683,7 +103732,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103745,6 +103793,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103816,7 +103865,6 @@ void m68000_device::sf_adr16_df() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103878,6 +103926,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103971,7 +104020,6 @@ void m68000_device::sf_adr32_df() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104033,6 +104081,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104060,7 +104109,6 @@ void m68000_device::shi_ds_df() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104072,6 +104120,7 @@ void m68000_device::shi_ds_df() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104123,6 +104172,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -104184,6 +104234,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -104215,12 +104266,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104249,12 +104300,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104285,6 +104336,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104339,7 +104391,6 @@ void m68000_device::shi_ais_df() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104401,6 +104452,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104455,7 +104507,6 @@ void m68000_device::shi_aips_df() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104517,6 +104568,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104573,7 +104625,6 @@ void m68000_device::shi_pais_df() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104635,6 +104686,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104707,7 +104759,6 @@ void m68000_device::shi_das_df() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104769,6 +104820,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104881,7 +104933,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104943,6 +104994,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105014,7 +105066,6 @@ void m68000_device::shi_adr16_df() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105076,6 +105127,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105169,7 +105221,6 @@ void m68000_device::shi_adr32_df() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105231,6 +105282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105258,7 +105310,6 @@ void m68000_device::sls_ds_df() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105270,6 +105321,7 @@ void m68000_device::sls_ds_df() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105321,6 +105373,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -105382,6 +105435,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -105413,12 +105467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105447,12 +105501,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105483,6 +105537,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105537,7 +105592,6 @@ void m68000_device::sls_ais_df() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105599,6 +105653,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105653,7 +105708,6 @@ void m68000_device::sls_aips_df() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105715,6 +105769,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105771,7 +105826,6 @@ void m68000_device::sls_pais_df() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105833,6 +105887,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105905,7 +105960,6 @@ void m68000_device::sls_das_df() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105967,6 +106021,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106079,7 +106134,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106141,6 +106195,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106212,7 +106267,6 @@ void m68000_device::sls_adr16_df() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106274,6 +106328,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106367,7 +106422,6 @@ void m68000_device::sls_adr32_df() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106429,6 +106483,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106456,7 +106511,6 @@ void m68000_device::scc_ds_df() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106468,6 +106522,7 @@ void m68000_device::scc_ds_df() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106519,6 +106574,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -106580,6 +106636,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -106611,12 +106668,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106645,12 +106702,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106681,6 +106738,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106735,7 +106793,6 @@ void m68000_device::scc_ais_df() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106797,6 +106854,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106851,7 +106909,6 @@ void m68000_device::scc_aips_df() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106913,6 +106970,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106969,7 +107027,6 @@ void m68000_device::scc_pais_df() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107031,6 +107088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107103,7 +107161,6 @@ void m68000_device::scc_das_df() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107165,6 +107222,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107277,7 +107335,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107339,6 +107396,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107410,7 +107468,6 @@ void m68000_device::scc_adr16_df() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107472,6 +107529,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107565,7 +107623,6 @@ void m68000_device::scc_adr32_df() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107627,6 +107684,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107654,7 +107712,6 @@ void m68000_device::scs_ds_df() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107666,6 +107723,7 @@ void m68000_device::scs_ds_df() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107717,6 +107775,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -107778,6 +107837,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -107809,12 +107869,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107843,12 +107903,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107879,6 +107939,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107933,7 +107994,6 @@ void m68000_device::scs_ais_df() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107995,6 +108055,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108049,7 +108110,6 @@ void m68000_device::scs_aips_df() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108111,6 +108171,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108167,7 +108228,6 @@ void m68000_device::scs_pais_df() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108229,6 +108289,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108301,7 +108362,6 @@ void m68000_device::scs_das_df() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108363,6 +108423,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108475,7 +108536,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108537,6 +108597,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108608,7 +108669,6 @@ void m68000_device::scs_adr16_df() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108670,6 +108730,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108763,7 +108824,6 @@ void m68000_device::scs_adr32_df() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108825,6 +108885,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108852,7 +108913,6 @@ void m68000_device::sne_ds_df() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108864,6 +108924,7 @@ void m68000_device::sne_ds_df() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -108915,6 +108976,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -108976,6 +109038,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -109007,12 +109070,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -109041,12 +109104,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -109077,6 +109140,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -109131,7 +109195,6 @@ void m68000_device::sne_ais_df() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109193,6 +109256,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109247,7 +109311,6 @@ void m68000_device::sne_aips_df() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109309,6 +109372,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109365,7 +109429,6 @@ void m68000_device::sne_pais_df() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109427,6 +109490,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109499,7 +109563,6 @@ void m68000_device::sne_das_df() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109561,6 +109624,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109673,7 +109737,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109735,6 +109798,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109806,7 +109870,6 @@ void m68000_device::sne_adr16_df() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109868,6 +109931,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109961,7 +110025,6 @@ void m68000_device::sne_adr32_df() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110023,6 +110086,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110050,7 +110114,6 @@ void m68000_device::seq_ds_df() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110062,6 +110125,7 @@ void m68000_device::seq_ds_df() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110113,6 +110177,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -110174,6 +110239,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -110205,12 +110271,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110239,12 +110305,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110275,6 +110341,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110329,7 +110396,6 @@ void m68000_device::seq_ais_df() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110391,6 +110457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110445,7 +110512,6 @@ void m68000_device::seq_aips_df() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110507,6 +110573,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110563,7 +110630,6 @@ void m68000_device::seq_pais_df() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110625,6 +110691,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110697,7 +110764,6 @@ void m68000_device::seq_das_df() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110759,6 +110825,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110871,7 +110938,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110933,6 +110999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111004,7 +111071,6 @@ void m68000_device::seq_adr16_df() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111066,6 +111132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111159,7 +111226,6 @@ void m68000_device::seq_adr32_df() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111221,6 +111287,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111248,7 +111315,6 @@ void m68000_device::svc_ds_df() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111260,6 +111326,7 @@ void m68000_device::svc_ds_df() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111311,6 +111378,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -111372,6 +111440,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -111403,12 +111472,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111437,12 +111506,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111473,6 +111542,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111527,7 +111597,6 @@ void m68000_device::svc_ais_df() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111589,6 +111658,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111643,7 +111713,6 @@ void m68000_device::svc_aips_df() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111705,6 +111774,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111761,7 +111831,6 @@ void m68000_device::svc_pais_df() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111823,6 +111892,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111895,7 +111965,6 @@ void m68000_device::svc_das_df() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111957,6 +112026,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112069,7 +112139,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112131,6 +112200,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112202,7 +112272,6 @@ void m68000_device::svc_adr16_df() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112264,6 +112333,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112357,7 +112427,6 @@ void m68000_device::svc_adr32_df() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112419,6 +112488,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112446,7 +112516,6 @@ void m68000_device::svs_ds_df() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112458,6 +112527,7 @@ void m68000_device::svs_ds_df() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112509,6 +112579,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112570,6 +112641,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112601,12 +112673,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112635,12 +112707,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112671,6 +112743,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112725,7 +112798,6 @@ void m68000_device::svs_ais_df() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112787,6 +112859,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112841,7 +112914,6 @@ void m68000_device::svs_aips_df() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112903,6 +112975,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112959,7 +113032,6 @@ void m68000_device::svs_pais_df() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113021,6 +113093,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113093,7 +113166,6 @@ void m68000_device::svs_das_df() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113155,6 +113227,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113267,7 +113340,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113329,6 +113401,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113400,7 +113473,6 @@ void m68000_device::svs_adr16_df() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113462,6 +113534,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113555,7 +113628,6 @@ void m68000_device::svs_adr32_df() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113617,6 +113689,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113644,7 +113717,6 @@ void m68000_device::spl_ds_df() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113656,6 +113728,7 @@ void m68000_device::spl_ds_df() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113707,6 +113780,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -113768,6 +113842,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -113799,12 +113874,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113833,12 +113908,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113869,6 +113944,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113923,7 +113999,6 @@ void m68000_device::spl_ais_df() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113985,6 +114060,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114039,7 +114115,6 @@ void m68000_device::spl_aips_df() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114101,6 +114176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114157,7 +114233,6 @@ void m68000_device::spl_pais_df() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114219,6 +114294,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114291,7 +114367,6 @@ void m68000_device::spl_das_df() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114353,6 +114428,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114465,7 +114541,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114527,6 +114602,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114598,7 +114674,6 @@ void m68000_device::spl_adr16_df() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114660,6 +114735,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114753,7 +114829,6 @@ void m68000_device::spl_adr32_df() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114815,6 +114890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114842,7 +114918,6 @@ void m68000_device::smi_ds_df() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114854,6 +114929,7 @@ void m68000_device::smi_ds_df() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -114905,6 +114981,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -114966,6 +115043,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -114997,12 +115075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -115031,12 +115109,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -115067,6 +115145,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -115121,7 +115200,6 @@ void m68000_device::smi_ais_df() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115183,6 +115261,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115237,7 +115316,6 @@ void m68000_device::smi_aips_df() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115299,6 +115377,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115355,7 +115434,6 @@ void m68000_device::smi_pais_df() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115417,6 +115495,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115489,7 +115568,6 @@ void m68000_device::smi_das_df() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115551,6 +115629,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115663,7 +115742,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115725,6 +115803,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115796,7 +115875,6 @@ void m68000_device::smi_adr16_df() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115858,6 +115936,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115951,7 +116030,6 @@ void m68000_device::smi_adr32_df() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116013,6 +116091,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116040,7 +116119,6 @@ void m68000_device::sge_ds_df() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116052,6 +116130,7 @@ void m68000_device::sge_ds_df() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116103,6 +116182,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -116164,6 +116244,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -116195,12 +116276,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116229,12 +116310,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116265,6 +116346,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116319,7 +116401,6 @@ void m68000_device::sge_ais_df() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116381,6 +116462,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116435,7 +116517,6 @@ void m68000_device::sge_aips_df() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116497,6 +116578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116553,7 +116635,6 @@ void m68000_device::sge_pais_df() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116615,6 +116696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116687,7 +116769,6 @@ void m68000_device::sge_das_df() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116749,6 +116830,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116861,7 +116943,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116923,6 +117004,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116994,7 +117076,6 @@ void m68000_device::sge_adr16_df() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117056,6 +117137,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117149,7 +117231,6 @@ void m68000_device::sge_adr32_df() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117211,6 +117292,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117238,7 +117320,6 @@ void m68000_device::slt_ds_df() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117250,6 +117331,7 @@ void m68000_device::slt_ds_df() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117301,6 +117383,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117362,6 +117445,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117393,12 +117477,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117427,12 +117511,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117463,6 +117547,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117517,7 +117602,6 @@ void m68000_device::slt_ais_df() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117579,6 +117663,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117633,7 +117718,6 @@ void m68000_device::slt_aips_df() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117695,6 +117779,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117751,7 +117836,6 @@ void m68000_device::slt_pais_df() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117813,6 +117897,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117885,7 +117970,6 @@ void m68000_device::slt_das_df() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117947,6 +118031,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118059,7 +118144,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118121,6 +118205,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118192,7 +118277,6 @@ void m68000_device::slt_adr16_df() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118254,6 +118338,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118347,7 +118432,6 @@ void m68000_device::slt_adr32_df() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118409,6 +118493,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118436,7 +118521,6 @@ void m68000_device::sgt_ds_df() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118448,6 +118532,7 @@ void m68000_device::sgt_ds_df() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118499,6 +118584,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118560,6 +118646,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118591,12 +118678,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118625,12 +118712,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118661,6 +118748,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118715,7 +118803,6 @@ void m68000_device::sgt_ais_df() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118777,6 +118864,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118831,7 +118919,6 @@ void m68000_device::sgt_aips_df() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118893,6 +118980,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118949,7 +119037,6 @@ void m68000_device::sgt_pais_df() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119011,6 +119098,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119083,7 +119171,6 @@ void m68000_device::sgt_das_df() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119145,6 +119232,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119257,7 +119345,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119319,6 +119406,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119390,7 +119478,6 @@ void m68000_device::sgt_adr16_df() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119452,6 +119539,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119545,7 +119633,6 @@ void m68000_device::sgt_adr32_df() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119607,6 +119694,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119634,7 +119722,6 @@ void m68000_device::sle_ds_df() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119646,6 +119733,7 @@ void m68000_device::sle_ds_df() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119697,6 +119785,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119758,6 +119847,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -119789,12 +119879,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119823,12 +119913,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119859,6 +119949,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119913,7 +120004,6 @@ void m68000_device::sle_ais_df() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119975,6 +120065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120029,7 +120120,6 @@ void m68000_device::sle_aips_df() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120091,6 +120181,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120147,7 +120238,6 @@ void m68000_device::sle_pais_df() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120209,6 +120299,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120281,7 +120372,6 @@ void m68000_device::sle_das_df() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120343,6 +120433,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120455,7 +120546,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120517,6 +120607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120588,7 +120679,6 @@ void m68000_device::sle_adr16_df() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120650,6 +120740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120743,7 +120834,6 @@ void m68000_device::sle_adr32_df() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120805,6 +120895,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120839,6 +120930,7 @@ void m68000_device::bra_rel16_df() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120896,11 +120988,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -120939,6 +121031,7 @@ void m68000_device::bra_rel8_df() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120972,11 +121065,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121078,11 +121171,11 @@ void m68000_device::bsr_rel16_df() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121184,11 +121277,11 @@ void m68000_device::bsr_rel8_df() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121227,6 +121320,7 @@ void m68000_device::bhi_rel16_df() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121284,11 +121378,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121327,6 +121421,7 @@ void m68000_device::bhi_rel8_df() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121360,11 +121455,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121403,6 +121498,7 @@ void m68000_device::bls_rel16_df() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121460,11 +121556,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121503,6 +121599,7 @@ void m68000_device::bls_rel8_df() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121536,11 +121633,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121579,6 +121676,7 @@ void m68000_device::bcc_rel16_df() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121636,11 +121734,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121679,6 +121777,7 @@ void m68000_device::bcc_rel8_df() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121712,11 +121811,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121755,6 +121854,7 @@ void m68000_device::bcs_rel16_df() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121812,11 +121912,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121855,6 +121955,7 @@ void m68000_device::bcs_rel8_df() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121888,11 +121989,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121931,6 +122032,7 @@ void m68000_device::bne_rel16_df() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121988,11 +122090,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122031,6 +122133,7 @@ void m68000_device::bne_rel8_df() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122064,11 +122167,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122107,6 +122210,7 @@ void m68000_device::beq_rel16_df() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122164,11 +122268,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122207,6 +122311,7 @@ void m68000_device::beq_rel8_df() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122240,11 +122345,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122283,6 +122388,7 @@ void m68000_device::bvc_rel16_df() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122340,11 +122446,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122383,6 +122489,7 @@ void m68000_device::bvc_rel8_df() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122416,11 +122523,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122459,6 +122566,7 @@ void m68000_device::bvs_rel16_df() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122516,11 +122624,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122559,6 +122667,7 @@ void m68000_device::bvs_rel8_df() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122592,11 +122701,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122635,6 +122744,7 @@ void m68000_device::bpl_rel16_df() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122692,11 +122802,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122735,6 +122845,7 @@ void m68000_device::bpl_rel8_df() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122768,11 +122879,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122811,6 +122922,7 @@ void m68000_device::bmi_rel16_df() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122868,11 +122980,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122911,6 +123023,7 @@ void m68000_device::bmi_rel8_df() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122944,11 +123057,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122987,6 +123100,7 @@ void m68000_device::bge_rel16_df() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123044,11 +123158,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123087,6 +123201,7 @@ void m68000_device::bge_rel8_df() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123120,11 +123235,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123163,6 +123278,7 @@ void m68000_device::blt_rel16_df() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123220,11 +123336,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123263,6 +123379,7 @@ void m68000_device::blt_rel8_df() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123296,11 +123413,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123339,6 +123456,7 @@ void m68000_device::bgt_rel16_df() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123396,11 +123514,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123439,6 +123557,7 @@ void m68000_device::bgt_rel8_df() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123472,11 +123591,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123515,6 +123634,7 @@ void m68000_device::ble_rel16_df() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123572,11 +123692,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123615,6 +123735,7 @@ void m68000_device::ble_rel8_df() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123648,11 +123769,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123684,7 +123805,6 @@ void m68000_device::moveq_imm8o_dd_df() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -123693,6 +123813,7 @@ void m68000_device::moveq_imm8o_dd_df() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123725,7 +123846,6 @@ void m68000_device::or_b_ds_dd_df() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -123733,6 +123853,7 @@ void m68000_device::or_b_ds_dd_df() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123790,7 +123911,6 @@ void m68000_device::or_b_ais_dd_df() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123798,6 +123918,7 @@ void m68000_device::or_b_ais_dd_df() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123860,7 +123981,6 @@ void m68000_device::or_b_aips_dd_df() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123868,6 +123988,7 @@ void m68000_device::or_b_aips_dd_df() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123932,7 +124053,6 @@ void m68000_device::or_b_pais_dd_df() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123940,6 +124060,7 @@ void m68000_device::or_b_pais_dd_df() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124020,7 +124141,6 @@ void m68000_device::or_b_das_dd_df() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124028,6 +124148,7 @@ void m68000_device::or_b_das_dd_df() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124148,7 +124269,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124156,6 +124276,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124235,7 +124356,6 @@ void m68000_device::or_b_adr16_dd_df() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124243,6 +124363,7 @@ void m68000_device::or_b_adr16_dd_df() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124344,7 +124465,6 @@ void m68000_device::or_b_adr32_dd_df() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124352,6 +124472,7 @@ void m68000_device::or_b_adr32_dd_df() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124431,7 +124552,6 @@ void m68000_device::or_b_dpc_dd_df() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124439,6 +124559,7 @@ void m68000_device::or_b_dpc_dd_df() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124558,7 +124679,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124566,6 +124686,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124625,7 +124746,6 @@ void m68000_device::or_b_imm8_dd_df() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -124633,6 +124753,7 @@ void m68000_device::or_b_imm8_dd_df() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124668,7 +124789,6 @@ void m68000_device::or_w_ds_dd_df() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -124676,6 +124796,7 @@ void m68000_device::or_w_ds_dd_df() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124736,7 +124857,6 @@ void m68000_device::or_w_ais_dd_df() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124744,6 +124864,7 @@ void m68000_device::or_w_ais_dd_df() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124809,7 +124930,6 @@ void m68000_device::or_w_aips_dd_df() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124817,6 +124937,7 @@ void m68000_device::or_w_aips_dd_df() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124884,7 +125005,6 @@ void m68000_device::or_w_pais_dd_df() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124892,6 +125012,7 @@ void m68000_device::or_w_pais_dd_df() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124975,7 +125096,6 @@ void m68000_device::or_w_das_dd_df() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124983,6 +125103,7 @@ void m68000_device::or_w_das_dd_df() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125106,7 +125227,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125114,6 +125234,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125196,7 +125317,6 @@ void m68000_device::or_w_adr16_dd_df() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125204,6 +125324,7 @@ void m68000_device::or_w_adr16_dd_df() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125308,7 +125429,6 @@ void m68000_device::or_w_adr32_dd_df() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125316,6 +125436,7 @@ void m68000_device::or_w_adr32_dd_df() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125398,7 +125519,6 @@ void m68000_device::or_w_dpc_dd_df() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125406,6 +125526,7 @@ void m68000_device::or_w_dpc_dd_df() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125528,7 +125649,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125536,6 +125656,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125595,7 +125716,6 @@ void m68000_device::or_w_imm16_dd_df() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -125603,6 +125723,7 @@ void m68000_device::or_w_imm16_dd_df() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125638,7 +125759,6 @@ void m68000_device::or_l_ds_dd_df() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -125672,6 +125792,7 @@ void m68000_device::or_l_ds_dd_df() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125736,7 +125857,6 @@ void m68000_device::or_l_ais_dd_df() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125767,6 +125887,7 @@ void m68000_device::or_l_ais_dd_df() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125835,7 +125956,6 @@ void m68000_device::or_l_aips_dd_df() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125866,6 +125986,7 @@ void m68000_device::or_l_aips_dd_df() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125935,7 +126056,6 @@ void m68000_device::or_l_pais_dd_df() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125966,6 +126086,7 @@ void m68000_device::or_l_pais_dd_df() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126052,7 +126173,6 @@ void m68000_device::or_l_das_dd_df() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126083,6 +126203,7 @@ void m68000_device::or_l_das_dd_df() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126209,7 +126330,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126240,6 +126360,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126329,7 +126450,6 @@ void m68000_device::or_l_adr16_dd_df() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126360,6 +126480,7 @@ void m68000_device::or_l_adr16_dd_df() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126471,7 +126592,6 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126502,6 +126622,7 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126587,7 +126708,6 @@ void m68000_device::or_l_dpc_dd_df() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126618,6 +126738,7 @@ void m68000_device::or_l_dpc_dd_df() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126743,7 +126864,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126774,6 +126894,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126838,7 +126959,6 @@ void m68000_device::or_l_imm32_dd_df() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -126872,6 +126992,7 @@ void m68000_device::or_l_imm32_dd_df() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -127069,11 +127190,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127101,10 +127222,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127214,7 +127335,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127224,7 +127344,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127234,6 +127353,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127473,11 +127593,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127505,10 +127625,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127618,7 +127738,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127628,7 +127747,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127638,6 +127756,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127881,11 +128000,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127913,10 +128032,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128026,7 +128145,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128036,7 +128154,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128046,6 +128163,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128291,11 +128409,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128323,10 +128441,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128436,7 +128554,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128446,7 +128563,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128456,6 +128572,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128717,11 +128834,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128749,10 +128866,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128862,7 +128979,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128872,7 +128988,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128882,6 +128997,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129181,11 +129297,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129213,10 +129329,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129326,7 +129442,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129336,7 +129451,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129346,6 +129460,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129606,11 +129721,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129638,10 +129753,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129751,7 +129866,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129761,7 +129875,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129771,6 +129884,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130052,11 +130166,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130084,10 +130198,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130197,7 +130311,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130207,7 +130320,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130217,6 +130329,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130477,11 +130590,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130509,10 +130622,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130622,7 +130735,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130632,7 +130744,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130642,6 +130753,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130940,11 +131052,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130972,10 +131084,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131085,7 +131197,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131095,7 +131206,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131105,6 +131215,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131343,11 +131454,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131375,10 +131486,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131488,7 +131599,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131498,7 +131608,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131508,6 +131617,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131544,7 +131654,6 @@ void m68000_device::sbcd_ds_dd_df() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -131573,6 +131682,7 @@ void m68000_device::sbcd_ds_dd_df() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -131617,7 +131727,6 @@ void m68000_device::sbcd_pais_paid_df() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -131664,6 +131773,7 @@ void m68000_device::sbcd_pais_paid_df() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131713,7 +131823,6 @@ void m68000_device::or_b_dd_ais_df() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131740,6 +131849,7 @@ void m68000_device::or_b_dd_ais_df() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131795,7 +131905,6 @@ void m68000_device::or_b_dd_aips_df() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131822,6 +131931,7 @@ void m68000_device::or_b_dd_aips_df() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131879,7 +131989,6 @@ void m68000_device::or_b_dd_pais_df() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131906,6 +132015,7 @@ void m68000_device::or_b_dd_pais_df() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131979,7 +132089,6 @@ void m68000_device::or_b_dd_das_df() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132006,6 +132115,7 @@ void m68000_device::or_b_dd_das_df() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132119,7 +132229,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132146,6 +132255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132218,7 +132328,6 @@ void m68000_device::or_b_dd_adr16_df() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132245,6 +132354,7 @@ void m68000_device::or_b_dd_adr16_df() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132339,7 +132449,6 @@ void m68000_device::or_b_dd_adr32_df() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132366,6 +132475,7 @@ void m68000_device::or_b_dd_adr32_df() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132419,7 +132529,6 @@ void m68000_device::or_w_dd_ais_df() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132446,6 +132555,7 @@ void m68000_device::or_w_dd_ais_df() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132509,7 +132619,6 @@ void m68000_device::or_w_dd_aips_df() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132536,6 +132645,7 @@ void m68000_device::or_w_dd_aips_df() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132601,7 +132711,6 @@ void m68000_device::or_w_dd_pais_df() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132628,6 +132737,7 @@ void m68000_device::or_w_dd_pais_df() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132709,7 +132819,6 @@ void m68000_device::or_w_dd_das_df() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132736,6 +132845,7 @@ void m68000_device::or_w_dd_das_df() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132857,7 +132967,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132884,6 +132993,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132964,7 +133074,6 @@ void m68000_device::or_w_dd_adr16_df() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132991,6 +133100,7 @@ void m68000_device::or_w_dd_adr16_df() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133093,7 +133203,6 @@ void m68000_device::or_w_dd_adr32_df() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133120,6 +133229,7 @@ void m68000_device::or_w_dd_adr32_df() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133199,7 +133309,6 @@ void m68000_device::or_l_dd_ais_df() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133249,6 +133358,7 @@ void m68000_device::or_l_dd_ais_df() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133332,7 +133442,6 @@ void m68000_device::or_l_dd_aips_df() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133382,6 +133491,7 @@ void m68000_device::or_l_dd_aips_df() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133466,7 +133576,6 @@ void m68000_device::or_l_dd_pais_df() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133516,6 +133625,7 @@ void m68000_device::or_l_dd_pais_df() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133617,7 +133727,6 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133667,6 +133776,7 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133808,7 +133918,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133858,6 +133967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133962,7 +134072,6 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134012,6 +134121,7 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -134138,7 +134248,6 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134188,6 +134297,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -134408,11 +134518,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134481,7 +134591,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -134494,6 +134603,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134621,7 +134731,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -134652,7 +134761,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -134684,6 +134792,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134713,14 +134822,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -134947,11 +135054,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135020,7 +135127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135033,6 +135139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135160,7 +135267,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135191,7 +135297,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135223,6 +135328,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135252,14 +135358,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -135490,11 +135594,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135563,7 +135667,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135576,6 +135679,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135703,7 +135807,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135734,7 +135837,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135766,6 +135868,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135795,14 +135898,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136035,11 +136136,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136108,7 +136209,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136121,6 +136221,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136248,7 +136349,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136279,7 +136379,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136311,6 +136410,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136340,14 +136440,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136596,11 +136694,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136669,7 +136767,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136682,6 +136779,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136809,7 +136907,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136840,7 +136937,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136872,6 +136968,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136901,14 +136998,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137195,11 +137290,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137268,7 +137363,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137281,6 +137375,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137408,7 +137503,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137439,7 +137533,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -137471,6 +137564,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137500,14 +137594,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137755,11 +137847,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137828,7 +137920,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137841,6 +137932,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137968,7 +138060,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137999,7 +138090,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138031,6 +138121,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138060,14 +138151,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138336,11 +138425,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138409,7 +138498,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138422,6 +138510,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138549,7 +138638,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -138580,7 +138668,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138612,6 +138699,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138641,14 +138729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138896,11 +138982,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138969,7 +139055,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138982,6 +139067,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139109,7 +139195,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139140,7 +139225,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139172,6 +139256,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139201,14 +139286,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -139494,11 +139577,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139567,7 +139650,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -139580,6 +139662,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139707,7 +139790,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139738,7 +139820,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139770,6 +139851,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139799,14 +139881,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140032,11 +140112,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140105,7 +140185,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -140118,6 +140197,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140245,7 +140325,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -140276,7 +140355,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -140308,6 +140386,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140337,14 +140416,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140360,7 +140437,6 @@ void m68000_device::sub_b_ds_dd_df() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140368,6 +140444,7 @@ void m68000_device::sub_b_ds_dd_df() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140423,7 +140500,6 @@ void m68000_device::sub_b_ais_dd_df() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140431,6 +140507,7 @@ void m68000_device::sub_b_ais_dd_df() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140490,7 +140567,6 @@ void m68000_device::sub_b_aips_dd_df() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140498,6 +140574,7 @@ void m68000_device::sub_b_aips_dd_df() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140559,7 +140636,6 @@ void m68000_device::sub_b_pais_dd_df() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140567,6 +140643,7 @@ void m68000_device::sub_b_pais_dd_df() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140644,7 +140721,6 @@ void m68000_device::sub_b_das_dd_df() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140652,6 +140728,7 @@ void m68000_device::sub_b_das_dd_df() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140767,7 +140844,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140775,6 +140851,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140851,7 +140928,6 @@ void m68000_device::sub_b_adr16_dd_df() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140859,6 +140935,7 @@ void m68000_device::sub_b_adr16_dd_df() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140956,7 +141033,6 @@ void m68000_device::sub_b_adr32_dd_df() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140964,6 +141040,7 @@ void m68000_device::sub_b_adr32_dd_df() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141040,7 +141117,6 @@ void m68000_device::sub_b_dpc_dd_df() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141048,6 +141124,7 @@ void m68000_device::sub_b_dpc_dd_df() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141162,7 +141239,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141170,6 +141246,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141227,7 +141304,6 @@ void m68000_device::sub_b_imm8_dd_df() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141235,6 +141311,7 @@ void m68000_device::sub_b_imm8_dd_df() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141269,7 +141346,6 @@ void m68000_device::sub_w_ds_dd_df() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141277,6 +141353,7 @@ void m68000_device::sub_w_ds_dd_df() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141311,7 +141388,6 @@ void m68000_device::sub_w_as_dd_df() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -141319,6 +141395,7 @@ void m68000_device::sub_w_as_dd_df() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141377,7 +141454,6 @@ void m68000_device::sub_w_ais_dd_df() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141385,6 +141461,7 @@ void m68000_device::sub_w_ais_dd_df() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141447,7 +141524,6 @@ void m68000_device::sub_w_aips_dd_df() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141455,6 +141531,7 @@ void m68000_device::sub_w_aips_dd_df() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141519,7 +141596,6 @@ void m68000_device::sub_w_pais_dd_df() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141527,6 +141603,7 @@ void m68000_device::sub_w_pais_dd_df() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141607,7 +141684,6 @@ void m68000_device::sub_w_das_dd_df() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141615,6 +141691,7 @@ void m68000_device::sub_w_das_dd_df() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141733,7 +141810,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141741,6 +141817,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141820,7 +141897,6 @@ void m68000_device::sub_w_adr16_dd_df() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141828,6 +141904,7 @@ void m68000_device::sub_w_adr16_dd_df() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141928,7 +142005,6 @@ void m68000_device::sub_w_adr32_dd_df() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141936,6 +142012,7 @@ void m68000_device::sub_w_adr32_dd_df() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142015,7 +142092,6 @@ void m68000_device::sub_w_dpc_dd_df() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142023,6 +142099,7 @@ void m68000_device::sub_w_dpc_dd_df() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142140,7 +142217,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142148,6 +142224,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142205,7 +142282,6 @@ void m68000_device::sub_w_imm16_dd_df() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142213,6 +142289,7 @@ void m68000_device::sub_w_imm16_dd_df() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142247,7 +142324,6 @@ void m68000_device::sub_l_ds_dd_df() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142280,6 +142356,7 @@ void m68000_device::sub_l_ds_dd_df() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142297,7 +142374,6 @@ void m68000_device::sub_l_as_dd_df() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -142330,6 +142406,7 @@ void m68000_device::sub_l_as_dd_df() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142392,7 +142469,6 @@ void m68000_device::sub_l_ais_dd_df() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142423,6 +142499,7 @@ void m68000_device::sub_l_ais_dd_df() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142488,7 +142565,6 @@ void m68000_device::sub_l_aips_dd_df() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142519,6 +142595,7 @@ void m68000_device::sub_l_aips_dd_df() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142585,7 +142662,6 @@ void m68000_device::sub_l_pais_dd_df() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142616,6 +142692,7 @@ void m68000_device::sub_l_pais_dd_df() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142699,7 +142776,6 @@ void m68000_device::sub_l_das_dd_df() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142730,6 +142806,7 @@ void m68000_device::sub_l_das_dd_df() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142851,7 +142928,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142882,6 +142958,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142967,7 +143044,6 @@ void m68000_device::sub_l_adr16_dd_df() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142998,6 +143074,7 @@ void m68000_device::sub_l_adr16_dd_df() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143104,7 +143181,6 @@ void m68000_device::sub_l_adr32_dd_df() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143135,6 +143211,7 @@ void m68000_device::sub_l_adr32_dd_df() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143217,7 +143294,6 @@ void m68000_device::sub_l_dpc_dd_df() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143248,6 +143324,7 @@ void m68000_device::sub_l_dpc_dd_df() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143368,7 +143445,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143399,6 +143475,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143460,7 +143537,6 @@ void m68000_device::sub_l_imm32_dd_df() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -143493,6 +143569,7 @@ void m68000_device::sub_l_imm32_dd_df() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143510,7 +143587,6 @@ void m68000_device::suba_w_ds_ad_df() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -143541,6 +143617,7 @@ void m68000_device::suba_w_ds_ad_df() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143558,7 +143635,6 @@ void m68000_device::suba_w_as_ad_df() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -143589,6 +143665,7 @@ void m68000_device::suba_w_as_ad_df() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143630,7 +143707,6 @@ void m68000_device::suba_w_ais_ad_df() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143661,6 +143737,7 @@ void m68000_device::suba_w_ais_ad_df() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143706,7 +143783,6 @@ void m68000_device::suba_w_aips_ad_df() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143737,6 +143813,7 @@ void m68000_device::suba_w_aips_ad_df() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143784,7 +143861,6 @@ void m68000_device::suba_w_pais_ad_df() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143815,6 +143891,7 @@ void m68000_device::suba_w_pais_ad_df() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143878,7 +143955,6 @@ void m68000_device::suba_w_das_ad_df() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143909,6 +143985,7 @@ void m68000_device::suba_w_das_ad_df() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144010,7 +144087,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144041,6 +144117,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144103,7 +144180,6 @@ void m68000_device::suba_w_adr16_ad_df() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144134,6 +144210,7 @@ void m68000_device::suba_w_adr16_ad_df() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144217,7 +144294,6 @@ void m68000_device::suba_w_adr32_ad_df() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144248,6 +144324,7 @@ void m68000_device::suba_w_adr32_ad_df() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144310,7 +144387,6 @@ void m68000_device::suba_w_dpc_ad_df() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144341,6 +144417,7 @@ void m68000_device::suba_w_dpc_ad_df() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144441,7 +144518,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144472,6 +144548,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144512,7 +144589,6 @@ void m68000_device::suba_w_imm16_ad_df() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -144543,6 +144619,7 @@ void m68000_device::suba_w_imm16_ad_df() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144560,7 +144637,6 @@ void m68000_device::subx_b_ds_dd_df() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -144568,6 +144644,7 @@ void m68000_device::subx_b_ds_dd_df() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144629,7 +144706,6 @@ void m68000_device::subx_b_pais_paid_df() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -144674,6 +144750,7 @@ void m68000_device::subx_b_pais_paid_df() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144722,7 +144799,6 @@ void m68000_device::sub_b_dd_ais_df() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144749,6 +144825,7 @@ void m68000_device::sub_b_dd_ais_df() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144801,7 +144878,6 @@ void m68000_device::sub_b_dd_aips_df() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144828,6 +144904,7 @@ void m68000_device::sub_b_dd_aips_df() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144882,7 +144959,6 @@ void m68000_device::sub_b_dd_pais_df() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144909,6 +144985,7 @@ void m68000_device::sub_b_dd_pais_df() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144979,7 +145056,6 @@ void m68000_device::sub_b_dd_das_df() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145006,6 +145082,7 @@ void m68000_device::sub_b_dd_das_df() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145114,7 +145191,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145141,6 +145217,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145210,7 +145287,6 @@ void m68000_device::sub_b_dd_adr16_df() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145237,6 +145313,7 @@ void m68000_device::sub_b_dd_adr16_df() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145327,7 +145404,6 @@ void m68000_device::sub_b_dd_adr32_df() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145354,6 +145430,7 @@ void m68000_device::sub_b_dd_adr32_df() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145381,7 +145458,6 @@ void m68000_device::subx_w_ds_dd_df() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -145389,6 +145465,7 @@ void m68000_device::subx_w_ds_dd_df() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145453,7 +145530,6 @@ void m68000_device::subx_w_pais_paid_df() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145501,6 +145577,7 @@ void m68000_device::subx_w_pais_paid_df() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145557,7 +145634,6 @@ void m68000_device::sub_w_dd_ais_df() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145584,6 +145660,7 @@ void m68000_device::sub_w_dd_ais_df() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145644,7 +145721,6 @@ void m68000_device::sub_w_dd_aips_df() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145671,6 +145747,7 @@ void m68000_device::sub_w_dd_aips_df() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145733,7 +145810,6 @@ void m68000_device::sub_w_dd_pais_df() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145760,6 +145836,7 @@ void m68000_device::sub_w_dd_pais_df() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145838,7 +145915,6 @@ void m68000_device::sub_w_dd_das_df() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145865,6 +145941,7 @@ void m68000_device::sub_w_dd_das_df() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145981,7 +146058,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146008,6 +146084,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146085,7 +146162,6 @@ void m68000_device::sub_w_dd_adr16_df() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146112,6 +146188,7 @@ void m68000_device::sub_w_dd_adr16_df() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146210,7 +146287,6 @@ void m68000_device::sub_w_dd_adr32_df() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146237,6 +146313,7 @@ void m68000_device::sub_w_dd_adr32_df() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146269,7 +146346,6 @@ void m68000_device::subx_l_ds_dd_df() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -146302,6 +146378,7 @@ void m68000_device::subx_l_ds_dd_df() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -146416,7 +146493,6 @@ void m68000_device::subx_l_pais_paid_df() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146462,6 +146538,7 @@ void m68000_device::subx_l_pais_paid_df() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146539,7 +146616,6 @@ void m68000_device::sub_l_dd_ais_df() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146589,6 +146665,7 @@ void m68000_device::sub_l_dd_ais_df() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146669,7 +146746,6 @@ void m68000_device::sub_l_dd_aips_df() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146719,6 +146795,7 @@ void m68000_device::sub_l_dd_aips_df() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146800,7 +146877,6 @@ void m68000_device::sub_l_dd_pais_df() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146850,6 +146926,7 @@ void m68000_device::sub_l_dd_pais_df() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146948,7 +147025,6 @@ void m68000_device::sub_l_dd_das_df() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146998,6 +147074,7 @@ void m68000_device::sub_l_dd_das_df() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147134,7 +147211,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -147184,6 +147260,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147284,7 +147361,6 @@ void m68000_device::sub_l_dd_adr16_df() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -147334,6 +147410,7 @@ void m68000_device::sub_l_dd_adr16_df() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147455,7 +147532,6 @@ void m68000_device::sub_l_dd_adr32_df() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -147505,6 +147581,7 @@ void m68000_device::sub_l_dd_adr32_df() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147537,7 +147614,6 @@ void m68000_device::suba_l_ds_ad_df() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -147568,6 +147644,7 @@ void m68000_device::suba_l_ds_ad_df() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147585,7 +147662,6 @@ void m68000_device::suba_l_as_ad_df() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -147616,6 +147692,7 @@ void m68000_device::suba_l_as_ad_df() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147678,7 +147755,6 @@ void m68000_device::suba_l_ais_ad_df() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147707,6 +147783,7 @@ void m68000_device::suba_l_ais_ad_df() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147772,7 +147849,6 @@ void m68000_device::suba_l_aips_ad_df() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147801,6 +147877,7 @@ void m68000_device::suba_l_aips_ad_df() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147867,7 +147944,6 @@ void m68000_device::suba_l_pais_ad_df() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147896,6 +147972,7 @@ void m68000_device::suba_l_pais_ad_df() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147979,7 +148056,6 @@ void m68000_device::suba_l_das_ad_df() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148008,6 +148084,7 @@ void m68000_device::suba_l_das_ad_df() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148129,7 +148206,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148158,6 +148234,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148243,7 +148320,6 @@ void m68000_device::suba_l_adr16_ad_df() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148272,6 +148348,7 @@ void m68000_device::suba_l_adr16_ad_df() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148378,7 +148455,6 @@ void m68000_device::suba_l_adr32_ad_df() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148407,6 +148483,7 @@ void m68000_device::suba_l_adr32_ad_df() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148489,7 +148566,6 @@ void m68000_device::suba_l_dpc_ad_df() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148518,6 +148594,7 @@ void m68000_device::suba_l_dpc_ad_df() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148638,7 +148715,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148667,6 +148743,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148728,7 +148805,6 @@ void m68000_device::suba_l_imm32_ad_df() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -148759,6 +148835,7 @@ void m68000_device::suba_l_imm32_ad_df() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148776,7 +148853,6 @@ void m68000_device::cmp_b_ds_dd_df() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -148784,6 +148860,7 @@ void m68000_device::cmp_b_ds_dd_df() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -148838,7 +148915,6 @@ void m68000_device::cmp_b_ais_dd_df() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148846,6 +148922,7 @@ void m68000_device::cmp_b_ais_dd_df() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -148904,7 +148981,6 @@ void m68000_device::cmp_b_aips_dd_df() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148912,6 +148988,7 @@ void m68000_device::cmp_b_aips_dd_df() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -148972,7 +149049,6 @@ void m68000_device::cmp_b_pais_dd_df() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148980,6 +149056,7 @@ void m68000_device::cmp_b_pais_dd_df() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149056,7 +149133,6 @@ void m68000_device::cmp_b_das_dd_df() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149064,6 +149140,7 @@ void m68000_device::cmp_b_das_dd_df() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149178,7 +149255,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149186,6 +149262,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149261,7 +149338,6 @@ void m68000_device::cmp_b_adr16_dd_df() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149269,6 +149345,7 @@ void m68000_device::cmp_b_adr16_dd_df() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149365,7 +149442,6 @@ void m68000_device::cmp_b_adr32_dd_df() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149373,6 +149449,7 @@ void m68000_device::cmp_b_adr32_dd_df() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149448,7 +149525,6 @@ void m68000_device::cmp_b_dpc_dd_df() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149456,6 +149532,7 @@ void m68000_device::cmp_b_dpc_dd_df() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149569,7 +149646,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149577,6 +149653,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149633,7 +149710,6 @@ void m68000_device::cmp_b_imm8_dd_df() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -149641,6 +149717,7 @@ void m68000_device::cmp_b_imm8_dd_df() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149674,7 +149751,6 @@ void m68000_device::cmp_w_ds_dd_df() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149682,6 +149758,7 @@ void m68000_device::cmp_w_ds_dd_df() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149715,7 +149792,6 @@ void m68000_device::cmp_w_as_dd_df() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -149723,6 +149799,7 @@ void m68000_device::cmp_w_as_dd_df() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149780,7 +149857,6 @@ void m68000_device::cmp_w_ais_dd_df() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149788,6 +149864,7 @@ void m68000_device::cmp_w_ais_dd_df() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149849,7 +149926,6 @@ void m68000_device::cmp_w_aips_dd_df() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149857,6 +149933,7 @@ void m68000_device::cmp_w_aips_dd_df() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149920,7 +149997,6 @@ void m68000_device::cmp_w_pais_dd_df() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149928,6 +150004,7 @@ void m68000_device::cmp_w_pais_dd_df() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150007,7 +150084,6 @@ void m68000_device::cmp_w_das_dd_df() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150015,6 +150091,7 @@ void m68000_device::cmp_w_das_dd_df() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150132,7 +150209,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150140,6 +150216,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150218,7 +150295,6 @@ void m68000_device::cmp_w_adr16_dd_df() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150226,6 +150302,7 @@ void m68000_device::cmp_w_adr16_dd_df() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150325,7 +150402,6 @@ void m68000_device::cmp_w_adr32_dd_df() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150333,6 +150409,7 @@ void m68000_device::cmp_w_adr32_dd_df() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150411,7 +150488,6 @@ void m68000_device::cmp_w_dpc_dd_df() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150419,6 +150495,7 @@ void m68000_device::cmp_w_dpc_dd_df() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150535,7 +150612,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150543,6 +150619,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150599,7 +150676,6 @@ void m68000_device::cmp_w_imm16_dd_df() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -150607,6 +150683,7 @@ void m68000_device::cmp_w_imm16_dd_df() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150640,7 +150717,6 @@ void m68000_device::cmp_l_ds_dd_df() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -150670,6 +150746,7 @@ void m68000_device::cmp_l_ds_dd_df() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150686,7 +150763,6 @@ void m68000_device::cmp_l_as_dd_df() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -150716,6 +150792,7 @@ void m68000_device::cmp_l_as_dd_df() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150777,7 +150854,6 @@ void m68000_device::cmp_l_ais_dd_df() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150807,6 +150883,7 @@ void m68000_device::cmp_l_ais_dd_df() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150871,7 +150948,6 @@ void m68000_device::cmp_l_aips_dd_df() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150901,6 +150977,7 @@ void m68000_device::cmp_l_aips_dd_df() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150966,7 +151043,6 @@ void m68000_device::cmp_l_pais_dd_df() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150996,6 +151072,7 @@ void m68000_device::cmp_l_pais_dd_df() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151078,7 +151155,6 @@ void m68000_device::cmp_l_das_dd_df() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151108,6 +151184,7 @@ void m68000_device::cmp_l_das_dd_df() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151228,7 +151305,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151258,6 +151334,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151342,7 +151419,6 @@ void m68000_device::cmp_l_adr16_dd_df() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151372,6 +151448,7 @@ void m68000_device::cmp_l_adr16_dd_df() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151477,7 +151554,6 @@ void m68000_device::cmp_l_adr32_dd_df() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151507,6 +151583,7 @@ void m68000_device::cmp_l_adr32_dd_df() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151588,7 +151665,6 @@ void m68000_device::cmp_l_dpc_dd_df() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151618,6 +151694,7 @@ void m68000_device::cmp_l_dpc_dd_df() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151737,7 +151814,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151767,6 +151843,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151827,7 +151904,6 @@ void m68000_device::cmp_l_imm32_dd_df() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -151857,6 +151933,7 @@ void m68000_device::cmp_l_imm32_dd_df() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151873,7 +151950,6 @@ void m68000_device::cmpa_w_ds_ad_df() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -151903,6 +151979,7 @@ void m68000_device::cmpa_w_ds_ad_df() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151919,7 +151996,6 @@ void m68000_device::cmpa_w_as_ad_df() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -151949,6 +152025,7 @@ void m68000_device::cmpa_w_as_ad_df() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151989,7 +152066,6 @@ void m68000_device::cmpa_w_ais_ad_df() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152019,6 +152095,7 @@ void m68000_device::cmpa_w_ais_ad_df() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152063,7 +152140,6 @@ void m68000_device::cmpa_w_aips_ad_df() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152093,6 +152169,7 @@ void m68000_device::cmpa_w_aips_ad_df() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152139,7 +152216,6 @@ void m68000_device::cmpa_w_pais_ad_df() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152169,6 +152245,7 @@ void m68000_device::cmpa_w_pais_ad_df() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152231,7 +152308,6 @@ void m68000_device::cmpa_w_das_ad_df() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152261,6 +152337,7 @@ void m68000_device::cmpa_w_das_ad_df() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152361,7 +152438,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152391,6 +152467,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152452,7 +152529,6 @@ void m68000_device::cmpa_w_adr16_ad_df() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152482,6 +152558,7 @@ void m68000_device::cmpa_w_adr16_ad_df() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152564,7 +152641,6 @@ void m68000_device::cmpa_w_adr32_ad_df() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152594,6 +152670,7 @@ void m68000_device::cmpa_w_adr32_ad_df() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152655,7 +152732,6 @@ void m68000_device::cmpa_w_dpc_ad_df() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152685,6 +152761,7 @@ void m68000_device::cmpa_w_dpc_ad_df() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152784,7 +152861,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152814,6 +152890,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152853,7 +152930,6 @@ void m68000_device::cmpa_w_imm16_ad_df() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -152883,6 +152959,7 @@ void m68000_device::cmpa_w_imm16_ad_df() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152899,13 +152976,13 @@ void m68000_device::eor_b_dd_ds_df() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -152963,7 +153040,6 @@ void m68000_device::cmpm_b_aips_aipd_df() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -152984,6 +153060,7 @@ void m68000_device::cmpm_b_aips_aipd_df() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153043,7 +153120,6 @@ void m68000_device::eor_b_dd_ais_df() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153070,6 +153146,7 @@ void m68000_device::eor_b_dd_ais_df() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153125,7 +153202,6 @@ void m68000_device::eor_b_dd_aips_df() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153152,6 +153228,7 @@ void m68000_device::eor_b_dd_aips_df() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153209,7 +153286,6 @@ void m68000_device::eor_b_dd_pais_df() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153236,6 +153312,7 @@ void m68000_device::eor_b_dd_pais_df() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153309,7 +153386,6 @@ void m68000_device::eor_b_dd_das_df() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153336,6 +153412,7 @@ void m68000_device::eor_b_dd_das_df() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153449,7 +153526,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153476,6 +153552,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153548,7 +153625,6 @@ void m68000_device::eor_b_dd_adr16_df() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153575,6 +153651,7 @@ void m68000_device::eor_b_dd_adr16_df() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153669,7 +153746,6 @@ void m68000_device::eor_b_dd_adr32_df() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153696,6 +153772,7 @@ void m68000_device::eor_b_dd_adr32_df() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153724,13 +153801,13 @@ void m68000_device::eor_w_dd_ds_df() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153791,7 +153868,6 @@ void m68000_device::cmpm_w_aips_aipd_df() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153815,6 +153891,7 @@ void m68000_device::cmpm_w_aips_aipd_df() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153877,7 +153954,6 @@ void m68000_device::eor_w_dd_ais_df() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153904,6 +153980,7 @@ void m68000_device::eor_w_dd_ais_df() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -153967,7 +154044,6 @@ void m68000_device::eor_w_dd_aips_df() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153994,6 +154070,7 @@ void m68000_device::eor_w_dd_aips_df() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154059,7 +154136,6 @@ void m68000_device::eor_w_dd_pais_df() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154086,6 +154162,7 @@ void m68000_device::eor_w_dd_pais_df() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154167,7 +154244,6 @@ void m68000_device::eor_w_dd_das_df() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154194,6 +154270,7 @@ void m68000_device::eor_w_dd_das_df() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154315,7 +154392,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154342,6 +154418,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154422,7 +154499,6 @@ void m68000_device::eor_w_dd_adr16_df() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154449,6 +154525,7 @@ void m68000_device::eor_w_dd_adr16_df() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154551,7 +154628,6 @@ void m68000_device::eor_w_dd_adr32_df() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154578,6 +154654,7 @@ void m68000_device::eor_w_dd_adr32_df() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154611,7 +154688,6 @@ void m68000_device::eor_l_dd_ds_df() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -154644,6 +154720,7 @@ void m68000_device::eor_l_dd_ds_df() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -154708,7 +154785,6 @@ void m68000_device::cmpm_l_aips_aipd_df() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154759,6 +154835,7 @@ void m68000_device::cmpm_l_aips_aipd_df() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154840,7 +154917,6 @@ void m68000_device::eor_l_dd_ais_df() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154890,6 +154966,7 @@ void m68000_device::eor_l_dd_ais_df() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154973,7 +155050,6 @@ void m68000_device::eor_l_dd_aips_df() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155023,6 +155099,7 @@ void m68000_device::eor_l_dd_aips_df() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155107,7 +155184,6 @@ void m68000_device::eor_l_dd_pais_df() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155157,6 +155233,7 @@ void m68000_device::eor_l_dd_pais_df() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155258,7 +155335,6 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155308,6 +155384,7 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155449,7 +155526,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155499,6 +155575,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155603,7 +155680,6 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155653,6 +155729,7 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155779,7 +155856,6 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155829,6 +155905,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155862,7 +155939,6 @@ void m68000_device::cmpa_l_ds_ad_df() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -155892,6 +155968,7 @@ void m68000_device::cmpa_l_ds_ad_df() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155908,7 +155985,6 @@ void m68000_device::cmpa_l_as_ad_df() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -155938,6 +156014,7 @@ void m68000_device::cmpa_l_as_ad_df() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155999,7 +156076,6 @@ void m68000_device::cmpa_l_ais_ad_df() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156029,6 +156105,7 @@ void m68000_device::cmpa_l_ais_ad_df() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156093,7 +156170,6 @@ void m68000_device::cmpa_l_aips_ad_df() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156123,6 +156199,7 @@ void m68000_device::cmpa_l_aips_ad_df() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156188,7 +156265,6 @@ void m68000_device::cmpa_l_pais_ad_df() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156218,6 +156294,7 @@ void m68000_device::cmpa_l_pais_ad_df() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156300,7 +156377,6 @@ void m68000_device::cmpa_l_das_ad_df() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156330,6 +156406,7 @@ void m68000_device::cmpa_l_das_ad_df() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156450,7 +156527,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156480,6 +156556,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156564,7 +156641,6 @@ void m68000_device::cmpa_l_adr16_ad_df() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156594,6 +156670,7 @@ void m68000_device::cmpa_l_adr16_ad_df() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156699,7 +156776,6 @@ void m68000_device::cmpa_l_adr32_ad_df() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156729,6 +156805,7 @@ void m68000_device::cmpa_l_adr32_ad_df() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156810,7 +156887,6 @@ void m68000_device::cmpa_l_dpc_ad_df() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156840,6 +156916,7 @@ void m68000_device::cmpa_l_dpc_ad_df() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156959,7 +157036,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156989,6 +157065,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157049,7 +157126,6 @@ void m68000_device::cmpa_l_imm32_ad_df() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -157079,6 +157155,7 @@ void m68000_device::cmpa_l_imm32_ad_df() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157095,7 +157172,6 @@ void m68000_device::and_b_ds_dd_df() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -157103,6 +157179,7 @@ void m68000_device::and_b_ds_dd_df() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157160,7 +157237,6 @@ void m68000_device::and_b_ais_dd_df() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157168,6 +157244,7 @@ void m68000_device::and_b_ais_dd_df() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157230,7 +157307,6 @@ void m68000_device::and_b_aips_dd_df() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157238,6 +157314,7 @@ void m68000_device::and_b_aips_dd_df() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157302,7 +157379,6 @@ void m68000_device::and_b_pais_dd_df() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157310,6 +157386,7 @@ void m68000_device::and_b_pais_dd_df() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157390,7 +157467,6 @@ void m68000_device::and_b_das_dd_df() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157398,6 +157474,7 @@ void m68000_device::and_b_das_dd_df() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157518,7 +157595,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157526,6 +157602,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157605,7 +157682,6 @@ void m68000_device::and_b_adr16_dd_df() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157613,6 +157689,7 @@ void m68000_device::and_b_adr16_dd_df() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157714,7 +157791,6 @@ void m68000_device::and_b_adr32_dd_df() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157722,6 +157798,7 @@ void m68000_device::and_b_adr32_dd_df() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157801,7 +157878,6 @@ void m68000_device::and_b_dpc_dd_df() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157809,6 +157885,7 @@ void m68000_device::and_b_dpc_dd_df() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157928,7 +158005,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157936,6 +158012,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157995,7 +158072,6 @@ void m68000_device::and_b_imm8_dd_df() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158003,6 +158079,7 @@ void m68000_device::and_b_imm8_dd_df() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158038,7 +158115,6 @@ void m68000_device::and_w_ds_dd_df() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158046,6 +158122,7 @@ void m68000_device::and_w_ds_dd_df() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158106,7 +158183,6 @@ void m68000_device::and_w_ais_dd_df() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158114,6 +158190,7 @@ void m68000_device::and_w_ais_dd_df() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158179,7 +158256,6 @@ void m68000_device::and_w_aips_dd_df() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158187,6 +158263,7 @@ void m68000_device::and_w_aips_dd_df() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158254,7 +158331,6 @@ void m68000_device::and_w_pais_dd_df() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158262,6 +158338,7 @@ void m68000_device::and_w_pais_dd_df() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158345,7 +158422,6 @@ void m68000_device::and_w_das_dd_df() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158353,6 +158429,7 @@ void m68000_device::and_w_das_dd_df() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158476,7 +158553,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158484,6 +158560,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158566,7 +158643,6 @@ void m68000_device::and_w_adr16_dd_df() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158574,6 +158650,7 @@ void m68000_device::and_w_adr16_dd_df() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158678,7 +158755,6 @@ void m68000_device::and_w_adr32_dd_df() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158686,6 +158762,7 @@ void m68000_device::and_w_adr32_dd_df() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158768,7 +158845,6 @@ void m68000_device::and_w_dpc_dd_df() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158776,6 +158852,7 @@ void m68000_device::and_w_dpc_dd_df() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158898,7 +158975,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158906,6 +158982,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158965,7 +159042,6 @@ void m68000_device::and_w_imm16_dd_df() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158973,6 +159049,7 @@ void m68000_device::and_w_imm16_dd_df() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -159008,7 +159085,6 @@ void m68000_device::and_l_ds_dd_df() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159042,6 +159118,7 @@ void m68000_device::and_l_ds_dd_df() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159106,7 +159183,6 @@ void m68000_device::and_l_ais_dd_df() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159137,6 +159213,7 @@ void m68000_device::and_l_ais_dd_df() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159205,7 +159282,6 @@ void m68000_device::and_l_aips_dd_df() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159236,6 +159312,7 @@ void m68000_device::and_l_aips_dd_df() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159305,7 +159382,6 @@ void m68000_device::and_l_pais_dd_df() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159336,6 +159412,7 @@ void m68000_device::and_l_pais_dd_df() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159422,7 +159499,6 @@ void m68000_device::and_l_das_dd_df() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159453,6 +159529,7 @@ void m68000_device::and_l_das_dd_df() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159579,7 +159656,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159610,6 +159686,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159699,7 +159776,6 @@ void m68000_device::and_l_adr16_dd_df() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159730,6 +159806,7 @@ void m68000_device::and_l_adr16_dd_df() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159841,7 +159918,6 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159872,6 +159948,7 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159957,7 +160034,6 @@ void m68000_device::and_l_dpc_dd_df() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159988,6 +160064,7 @@ void m68000_device::and_l_dpc_dd_df() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160113,7 +160190,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160144,6 +160220,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160208,7 +160285,6 @@ void m68000_device::and_l_imm32_dd_df() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160242,6 +160318,7 @@ void m68000_device::and_l_imm32_dd_df() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160260,7 +160337,6 @@ void m68000_device::mulu_w_ds_dd_df() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -160318,6 +160394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160363,7 +160440,6 @@ void m68000_device::mulu_w_ais_dd_df() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160421,6 +160497,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160470,7 +160547,6 @@ void m68000_device::mulu_w_aips_dd_df() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160528,6 +160604,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160579,7 +160656,6 @@ void m68000_device::mulu_w_pais_dd_df() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160637,6 +160713,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160704,7 +160781,6 @@ void m68000_device::mulu_w_das_dd_df() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160762,6 +160838,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160867,7 +160944,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160925,6 +161001,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160991,7 +161068,6 @@ void m68000_device::mulu_w_adr16_dd_df() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161049,6 +161125,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161136,7 +161213,6 @@ void m68000_device::mulu_w_adr32_dd_df() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161194,6 +161270,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161260,7 +161337,6 @@ void m68000_device::mulu_w_dpc_dd_df() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161318,6 +161394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161422,7 +161499,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161480,6 +161556,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161524,7 +161601,6 @@ void m68000_device::mulu_w_imm16_dd_df() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -161582,6 +161658,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161603,7 +161680,6 @@ void m68000_device::abcd_ds_dd_df() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161632,6 +161708,7 @@ void m68000_device::abcd_ds_dd_df() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161676,7 +161753,6 @@ void m68000_device::abcd_pais_paid_df() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -161723,6 +161799,7 @@ void m68000_device::abcd_pais_paid_df() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161772,7 +161849,6 @@ void m68000_device::and_b_dd_ais_df() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -161799,6 +161875,7 @@ void m68000_device::and_b_dd_ais_df() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161854,7 +161931,6 @@ void m68000_device::and_b_dd_aips_df() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -161881,6 +161957,7 @@ void m68000_device::and_b_dd_aips_df() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161938,7 +162015,6 @@ void m68000_device::and_b_dd_pais_df() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -161965,6 +162041,7 @@ void m68000_device::and_b_dd_pais_df() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162038,7 +162115,6 @@ void m68000_device::and_b_dd_das_df() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162065,6 +162141,7 @@ void m68000_device::and_b_dd_das_df() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162178,7 +162255,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162205,6 +162281,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162277,7 +162354,6 @@ void m68000_device::and_b_dd_adr16_df() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162304,6 +162380,7 @@ void m68000_device::and_b_dd_adr16_df() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162398,7 +162475,6 @@ void m68000_device::and_b_dd_adr32_df() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162425,6 +162501,7 @@ void m68000_device::and_b_dd_adr32_df() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162453,7 +162530,6 @@ void m68000_device::exg_dd_ds_df() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162481,6 +162557,7 @@ void m68000_device::exg_dd_ds_df() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162497,7 +162574,6 @@ void m68000_device::exg_ad_as_df() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162525,6 +162601,7 @@ void m68000_device::exg_ad_as_df() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162566,7 +162643,6 @@ void m68000_device::and_w_dd_ais_df() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162593,6 +162669,7 @@ void m68000_device::and_w_dd_ais_df() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -162656,7 +162733,6 @@ void m68000_device::and_w_dd_aips_df() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162683,6 +162759,7 @@ void m68000_device::and_w_dd_aips_df() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -162748,7 +162825,6 @@ void m68000_device::and_w_dd_pais_df() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162775,6 +162851,7 @@ void m68000_device::and_w_dd_pais_df() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -162856,7 +162933,6 @@ void m68000_device::and_w_dd_das_df() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162883,6 +162959,7 @@ void m68000_device::and_w_dd_das_df() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163004,7 +163081,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163031,6 +163107,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163111,7 +163188,6 @@ void m68000_device::and_w_dd_adr16_df() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163138,6 +163214,7 @@ void m68000_device::and_w_dd_adr16_df() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163240,7 +163317,6 @@ void m68000_device::and_w_dd_adr32_df() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163267,6 +163343,7 @@ void m68000_device::and_w_dd_adr32_df() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163300,7 +163377,6 @@ void m68000_device::exg_dd_as_df() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -163328,6 +163404,7 @@ void m68000_device::exg_dd_as_df() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -163390,7 +163467,6 @@ void m68000_device::and_l_dd_ais_df() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163440,6 +163516,7 @@ void m68000_device::and_l_dd_ais_df() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163523,7 +163600,6 @@ void m68000_device::and_l_dd_aips_df() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163573,6 +163649,7 @@ void m68000_device::and_l_dd_aips_df() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163657,7 +163734,6 @@ void m68000_device::and_l_dd_pais_df() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163707,6 +163783,7 @@ void m68000_device::and_l_dd_pais_df() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163808,7 +163885,6 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163858,6 +163934,7 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163999,7 +164076,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -164049,6 +164125,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -164153,7 +164230,6 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -164203,6 +164279,7 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -164329,7 +164406,6 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -164379,6 +164455,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -164412,7 +164489,6 @@ void m68000_device::muls_w_ds_dd_df() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -164472,6 +164548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164524,7 +164601,6 @@ void m68000_device::muls_w_ais_dd_df() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164584,6 +164660,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164640,7 +164717,6 @@ void m68000_device::muls_w_aips_dd_df() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164700,6 +164776,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164758,7 +164835,6 @@ void m68000_device::muls_w_pais_dd_df() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164818,6 +164894,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164892,7 +164969,6 @@ void m68000_device::muls_w_das_dd_df() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164952,6 +165028,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165064,7 +165141,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165124,6 +165200,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165197,7 +165274,6 @@ void m68000_device::muls_w_adr16_dd_df() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165257,6 +165333,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165351,7 +165428,6 @@ void m68000_device::muls_w_adr32_dd_df() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165411,6 +165487,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165484,7 +165561,6 @@ void m68000_device::muls_w_dpc_dd_df() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165544,6 +165620,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165655,7 +165732,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165715,6 +165791,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165766,7 +165843,6 @@ void m68000_device::muls_w_imm16_dd_df() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -165826,6 +165902,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165854,7 +165931,6 @@ void m68000_device::add_b_ds_dd_df() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165862,6 +165938,7 @@ void m68000_device::add_b_ds_dd_df() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -165917,7 +165994,6 @@ void m68000_device::add_b_ais_dd_df() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165925,6 +166001,7 @@ void m68000_device::add_b_ais_dd_df() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -165984,7 +166061,6 @@ void m68000_device::add_b_aips_dd_df() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165992,6 +166068,7 @@ void m68000_device::add_b_aips_dd_df() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166053,7 +166130,6 @@ void m68000_device::add_b_pais_dd_df() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166061,6 +166137,7 @@ void m68000_device::add_b_pais_dd_df() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166138,7 +166215,6 @@ void m68000_device::add_b_das_dd_df() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166146,6 +166222,7 @@ void m68000_device::add_b_das_dd_df() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166261,7 +166338,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166269,6 +166345,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166345,7 +166422,6 @@ void m68000_device::add_b_adr16_dd_df() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166353,6 +166429,7 @@ void m68000_device::add_b_adr16_dd_df() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166450,7 +166527,6 @@ void m68000_device::add_b_adr32_dd_df() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166458,6 +166534,7 @@ void m68000_device::add_b_adr32_dd_df() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166534,7 +166611,6 @@ void m68000_device::add_b_dpc_dd_df() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166542,6 +166618,7 @@ void m68000_device::add_b_dpc_dd_df() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166656,7 +166733,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166664,6 +166740,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166721,7 +166798,6 @@ void m68000_device::add_b_imm8_dd_df() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -166729,6 +166805,7 @@ void m68000_device::add_b_imm8_dd_df() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166763,7 +166840,6 @@ void m68000_device::add_w_ds_dd_df() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -166771,6 +166847,7 @@ void m68000_device::add_w_ds_dd_df() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166805,7 +166882,6 @@ void m68000_device::add_w_as_dd_df() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -166813,6 +166889,7 @@ void m68000_device::add_w_as_dd_df() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166871,7 +166948,6 @@ void m68000_device::add_w_ais_dd_df() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166879,6 +166955,7 @@ void m68000_device::add_w_ais_dd_df() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166941,7 +167018,6 @@ void m68000_device::add_w_aips_dd_df() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166949,6 +167025,7 @@ void m68000_device::add_w_aips_dd_df() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167013,7 +167090,6 @@ void m68000_device::add_w_pais_dd_df() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167021,6 +167097,7 @@ void m68000_device::add_w_pais_dd_df() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167101,7 +167178,6 @@ void m68000_device::add_w_das_dd_df() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167109,6 +167185,7 @@ void m68000_device::add_w_das_dd_df() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167227,7 +167304,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167235,6 +167311,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167314,7 +167391,6 @@ void m68000_device::add_w_adr16_dd_df() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167322,6 +167398,7 @@ void m68000_device::add_w_adr16_dd_df() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167422,7 +167499,6 @@ void m68000_device::add_w_adr32_dd_df() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167430,6 +167506,7 @@ void m68000_device::add_w_adr32_dd_df() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167509,7 +167586,6 @@ void m68000_device::add_w_dpc_dd_df() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167517,6 +167593,7 @@ void m68000_device::add_w_dpc_dd_df() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167634,7 +167711,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167642,6 +167718,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167699,7 +167776,6 @@ void m68000_device::add_w_imm16_dd_df() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -167707,6 +167783,7 @@ void m68000_device::add_w_imm16_dd_df() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167741,7 +167818,6 @@ void m68000_device::add_l_ds_dd_df() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -167774,6 +167850,7 @@ void m68000_device::add_l_ds_dd_df() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167791,7 +167868,6 @@ void m68000_device::add_l_as_dd_df() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -167824,6 +167900,7 @@ void m68000_device::add_l_as_dd_df() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167886,7 +167963,6 @@ void m68000_device::add_l_ais_dd_df() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167917,6 +167993,7 @@ void m68000_device::add_l_ais_dd_df() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167982,7 +168059,6 @@ void m68000_device::add_l_aips_dd_df() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168013,6 +168089,7 @@ void m68000_device::add_l_aips_dd_df() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168079,7 +168156,6 @@ void m68000_device::add_l_pais_dd_df() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168110,6 +168186,7 @@ void m68000_device::add_l_pais_dd_df() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168193,7 +168270,6 @@ void m68000_device::add_l_das_dd_df() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168224,6 +168300,7 @@ void m68000_device::add_l_das_dd_df() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168345,7 +168422,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168376,6 +168452,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168461,7 +168538,6 @@ void m68000_device::add_l_adr16_dd_df() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168492,6 +168568,7 @@ void m68000_device::add_l_adr16_dd_df() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168598,7 +168675,6 @@ void m68000_device::add_l_adr32_dd_df() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168629,6 +168705,7 @@ void m68000_device::add_l_adr32_dd_df() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168711,7 +168788,6 @@ void m68000_device::add_l_dpc_dd_df() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168742,6 +168818,7 @@ void m68000_device::add_l_dpc_dd_df() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168862,7 +168939,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168893,6 +168969,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168954,7 +169031,6 @@ void m68000_device::add_l_imm32_dd_df() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -168987,6 +169063,7 @@ void m68000_device::add_l_imm32_dd_df() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169004,7 +169081,6 @@ void m68000_device::adda_w_ds_ad_df() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -169035,6 +169111,7 @@ void m68000_device::adda_w_ds_ad_df() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169052,7 +169129,6 @@ void m68000_device::adda_w_as_ad_df() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -169083,6 +169159,7 @@ void m68000_device::adda_w_as_ad_df() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169124,7 +169201,6 @@ void m68000_device::adda_w_ais_ad_df() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169155,6 +169231,7 @@ void m68000_device::adda_w_ais_ad_df() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169200,7 +169277,6 @@ void m68000_device::adda_w_aips_ad_df() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169231,6 +169307,7 @@ void m68000_device::adda_w_aips_ad_df() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169278,7 +169355,6 @@ void m68000_device::adda_w_pais_ad_df() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169309,6 +169385,7 @@ void m68000_device::adda_w_pais_ad_df() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169372,7 +169449,6 @@ void m68000_device::adda_w_das_ad_df() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169403,6 +169479,7 @@ void m68000_device::adda_w_das_ad_df() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169504,7 +169581,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169535,6 +169611,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169597,7 +169674,6 @@ void m68000_device::adda_w_adr16_ad_df() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169628,6 +169704,7 @@ void m68000_device::adda_w_adr16_ad_df() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169711,7 +169788,6 @@ void m68000_device::adda_w_adr32_ad_df() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169742,6 +169818,7 @@ void m68000_device::adda_w_adr32_ad_df() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169804,7 +169881,6 @@ void m68000_device::adda_w_dpc_ad_df() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169835,6 +169911,7 @@ void m68000_device::adda_w_dpc_ad_df() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169935,7 +170012,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169966,6 +170042,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170006,7 +170083,6 @@ void m68000_device::adda_w_imm16_ad_df() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -170037,6 +170113,7 @@ void m68000_device::adda_w_imm16_ad_df() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170054,7 +170131,6 @@ void m68000_device::addx_b_ds_dd_df() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170062,6 +170138,7 @@ void m68000_device::addx_b_ds_dd_df() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170126,7 +170203,6 @@ void m68000_device::addx_b_pais_paid_df() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -170172,6 +170248,7 @@ void m68000_device::addx_b_pais_paid_df() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170221,7 +170298,6 @@ void m68000_device::add_b_dd_ais_df() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170248,6 +170324,7 @@ void m68000_device::add_b_dd_ais_df() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170300,7 +170377,6 @@ void m68000_device::add_b_dd_aips_df() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170327,6 +170403,7 @@ void m68000_device::add_b_dd_aips_df() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170381,7 +170458,6 @@ void m68000_device::add_b_dd_pais_df() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170408,6 +170484,7 @@ void m68000_device::add_b_dd_pais_df() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170478,7 +170555,6 @@ void m68000_device::add_b_dd_das_df() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170505,6 +170581,7 @@ void m68000_device::add_b_dd_das_df() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170613,7 +170690,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170640,6 +170716,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170709,7 +170786,6 @@ void m68000_device::add_b_dd_adr16_df() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170736,6 +170812,7 @@ void m68000_device::add_b_dd_adr16_df() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170826,7 +170903,6 @@ void m68000_device::add_b_dd_adr32_df() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170853,6 +170929,7 @@ void m68000_device::add_b_dd_adr32_df() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170880,7 +170957,6 @@ void m68000_device::addx_w_ds_dd_df() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170888,6 +170964,7 @@ void m68000_device::addx_w_ds_dd_df() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170955,7 +171032,6 @@ void m68000_device::addx_w_pais_paid_df() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171004,6 +171080,7 @@ void m68000_device::addx_w_pais_paid_df() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171061,7 +171138,6 @@ void m68000_device::add_w_dd_ais_df() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171088,6 +171164,7 @@ void m68000_device::add_w_dd_ais_df() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171148,7 +171225,6 @@ void m68000_device::add_w_dd_aips_df() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171175,6 +171251,7 @@ void m68000_device::add_w_dd_aips_df() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171237,7 +171314,6 @@ void m68000_device::add_w_dd_pais_df() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171264,6 +171340,7 @@ void m68000_device::add_w_dd_pais_df() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171342,7 +171419,6 @@ void m68000_device::add_w_dd_das_df() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171369,6 +171445,7 @@ void m68000_device::add_w_dd_das_df() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171485,7 +171562,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171512,6 +171588,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171589,7 +171666,6 @@ void m68000_device::add_w_dd_adr16_df() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171616,6 +171692,7 @@ void m68000_device::add_w_dd_adr16_df() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171714,7 +171791,6 @@ void m68000_device::add_w_dd_adr32_df() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171741,6 +171817,7 @@ void m68000_device::add_w_dd_adr32_df() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171773,7 +171850,6 @@ void m68000_device::addx_l_ds_dd_df() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -171807,6 +171883,7 @@ void m68000_device::addx_l_ds_dd_df() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -171926,7 +172003,6 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171973,6 +172049,7 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172051,7 +172128,6 @@ void m68000_device::add_l_dd_ais_df() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172101,6 +172177,7 @@ void m68000_device::add_l_dd_ais_df() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172181,7 +172258,6 @@ void m68000_device::add_l_dd_aips_df() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172231,6 +172307,7 @@ void m68000_device::add_l_dd_aips_df() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172312,7 +172389,6 @@ void m68000_device::add_l_dd_pais_df() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172362,6 +172438,7 @@ void m68000_device::add_l_dd_pais_df() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172460,7 +172537,6 @@ void m68000_device::add_l_dd_das_df() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172510,6 +172586,7 @@ void m68000_device::add_l_dd_das_df() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172646,7 +172723,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172696,6 +172772,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172796,7 +172873,6 @@ void m68000_device::add_l_dd_adr16_df() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172846,6 +172922,7 @@ void m68000_device::add_l_dd_adr16_df() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172967,7 +173044,6 @@ void m68000_device::add_l_dd_adr32_df() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -173017,6 +173093,7 @@ void m68000_device::add_l_dd_adr32_df() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -173049,7 +173126,6 @@ void m68000_device::adda_l_ds_ad_df() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -173080,6 +173156,7 @@ void m68000_device::adda_l_ds_ad_df() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173097,7 +173174,6 @@ void m68000_device::adda_l_as_ad_df() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -173128,6 +173204,7 @@ void m68000_device::adda_l_as_ad_df() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173190,7 +173267,6 @@ void m68000_device::adda_l_ais_ad_df() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173219,6 +173295,7 @@ void m68000_device::adda_l_ais_ad_df() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173284,7 +173361,6 @@ void m68000_device::adda_l_aips_ad_df() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173313,6 +173389,7 @@ void m68000_device::adda_l_aips_ad_df() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173379,7 +173456,6 @@ void m68000_device::adda_l_pais_ad_df() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173408,6 +173484,7 @@ void m68000_device::adda_l_pais_ad_df() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173491,7 +173568,6 @@ void m68000_device::adda_l_das_ad_df() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173520,6 +173596,7 @@ void m68000_device::adda_l_das_ad_df() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173641,7 +173718,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173670,6 +173746,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173755,7 +173832,6 @@ void m68000_device::adda_l_adr16_ad_df() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173784,6 +173860,7 @@ void m68000_device::adda_l_adr16_ad_df() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173890,7 +173967,6 @@ void m68000_device::adda_l_adr32_ad_df() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173919,6 +173995,7 @@ void m68000_device::adda_l_adr32_ad_df() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174001,7 +174078,6 @@ void m68000_device::adda_l_dpc_ad_df() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174030,6 +174106,7 @@ void m68000_device::adda_l_dpc_ad_df() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174150,7 +174227,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174179,6 +174255,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174240,7 +174317,6 @@ void m68000_device::adda_l_imm32_ad_df() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -174271,6 +174347,7 @@ void m68000_device::adda_l_imm32_ad_df() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174287,7 +174364,6 @@ void m68000_device::asr_b_imm3_ds_df() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174336,6 +174412,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174352,7 +174429,6 @@ void m68000_device::lsr_b_imm3_ds_df() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174401,6 +174477,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174417,7 +174494,6 @@ void m68000_device::roxr_b_imm3_ds_df() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174466,6 +174542,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174482,7 +174559,6 @@ void m68000_device::ror_b_imm3_ds_df() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174531,6 +174607,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174548,7 +174625,6 @@ void m68000_device::asr_b_dd_ds_df() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174597,6 +174673,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174614,7 +174691,6 @@ void m68000_device::lsr_b_dd_ds_df() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174663,6 +174739,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174680,7 +174757,6 @@ void m68000_device::roxr_b_dd_ds_df() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174729,6 +174805,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174746,7 +174823,6 @@ void m68000_device::ror_b_dd_ds_df() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174795,6 +174871,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174811,7 +174888,6 @@ void m68000_device::asr_w_imm3_ds_df() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174860,6 +174936,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174876,7 +174953,6 @@ void m68000_device::lsr_w_imm3_ds_df() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174925,6 +175001,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174941,7 +175018,6 @@ void m68000_device::roxr_w_imm3_ds_df() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174990,6 +175066,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175006,7 +175083,6 @@ void m68000_device::ror_w_imm3_ds_df() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175055,6 +175131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175072,7 +175149,6 @@ void m68000_device::asr_w_dd_ds_df() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175121,6 +175197,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175138,7 +175215,6 @@ void m68000_device::lsr_w_dd_ds_df() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175187,6 +175263,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175204,7 +175281,6 @@ void m68000_device::roxr_w_dd_ds_df() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175253,6 +175329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175270,7 +175347,6 @@ void m68000_device::ror_w_dd_ds_df() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175319,6 +175395,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175335,7 +175412,6 @@ void m68000_device::asr_l_imm3_ds_df() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175388,6 +175464,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175406,7 +175483,6 @@ void m68000_device::lsr_l_imm3_ds_df() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175459,6 +175535,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175477,7 +175554,6 @@ void m68000_device::roxr_l_imm3_ds_df() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175530,6 +175606,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175548,7 +175625,6 @@ void m68000_device::ror_l_imm3_ds_df() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175601,6 +175677,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175620,7 +175697,6 @@ void m68000_device::asr_l_dd_ds_df() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175673,6 +175749,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175692,7 +175769,6 @@ void m68000_device::lsr_l_dd_ds_df() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175745,6 +175821,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175764,7 +175841,6 @@ void m68000_device::roxr_l_dd_ds_df() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175817,6 +175893,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175836,7 +175913,6 @@ void m68000_device::ror_l_dd_ds_df() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175889,6 +175965,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175932,7 +176009,6 @@ void m68000_device::asr_ais_df() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -175964,6 +176040,7 @@ void m68000_device::asr_ais_df() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176024,7 +176101,6 @@ void m68000_device::asr_aips_df() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176056,6 +176132,7 @@ void m68000_device::asr_aips_df() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176118,7 +176195,6 @@ void m68000_device::asr_pais_df() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176150,6 +176226,7 @@ void m68000_device::asr_pais_df() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176228,7 +176305,6 @@ void m68000_device::asr_das_df() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176260,6 +176336,7 @@ void m68000_device::asr_das_df() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176376,7 +176453,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176408,6 +176484,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176485,7 +176562,6 @@ void m68000_device::asr_adr16_df() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176517,6 +176593,7 @@ void m68000_device::asr_adr16_df() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176615,7 +176692,6 @@ void m68000_device::asr_adr32_df() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176647,6 +176723,7 @@ void m68000_device::asr_adr32_df() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176678,7 +176755,6 @@ void m68000_device::asl_b_imm3_ds_df() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176727,6 +176803,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176743,7 +176820,6 @@ void m68000_device::lsl_b_imm3_ds_df() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176792,6 +176868,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -176809,7 +176886,6 @@ void m68000_device::roxl_b_imm3_ds_df() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -176858,6 +176934,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176874,7 +176951,6 @@ void m68000_device::rol_b_imm3_ds_df() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176923,6 +176999,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176940,7 +177017,6 @@ void m68000_device::asl_b_dd_ds_df() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176989,6 +177065,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177006,7 +177083,6 @@ void m68000_device::lsl_b_dd_ds_df() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177055,6 +177131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -177073,7 +177150,6 @@ void m68000_device::roxl_b_dd_ds_df() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177122,6 +177198,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177139,7 +177216,6 @@ void m68000_device::rol_b_dd_ds_df() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177188,6 +177264,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177204,7 +177281,6 @@ void m68000_device::asl_w_imm3_ds_df() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177253,6 +177329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177269,7 +177346,6 @@ void m68000_device::lsl_w_imm3_ds_df() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177318,6 +177394,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177335,7 +177412,6 @@ void m68000_device::roxl_w_imm3_ds_df() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177384,6 +177460,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177400,7 +177477,6 @@ void m68000_device::rol_w_imm3_ds_df() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177449,6 +177525,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177466,7 +177543,6 @@ void m68000_device::asl_w_dd_ds_df() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177515,6 +177591,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177532,7 +177609,6 @@ void m68000_device::lsl_w_dd_ds_df() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177581,6 +177657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177599,7 +177676,6 @@ void m68000_device::roxl_w_dd_ds_df() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177648,6 +177724,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177665,7 +177742,6 @@ void m68000_device::rol_w_dd_ds_df() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177714,6 +177790,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177730,7 +177807,6 @@ void m68000_device::asl_l_imm3_ds_df() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177783,6 +177859,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177801,7 +177878,6 @@ void m68000_device::lsl_l_imm3_ds_df() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177856,6 +177932,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177874,7 +177951,6 @@ void m68000_device::roxl_l_imm3_ds_df() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177927,6 +178003,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -177945,7 +178022,6 @@ void m68000_device::rol_l_imm3_ds_df() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177998,6 +178074,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178017,7 +178094,6 @@ void m68000_device::asl_l_dd_ds_df() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178070,6 +178146,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178089,7 +178166,6 @@ void m68000_device::lsl_l_dd_ds_df() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178144,6 +178220,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178163,7 +178240,6 @@ void m68000_device::roxl_l_dd_ds_df() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -178216,6 +178292,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -178235,7 +178312,6 @@ void m68000_device::rol_l_dd_ds_df() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178288,6 +178364,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178331,7 +178408,6 @@ void m68000_device::asl_ais_df() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178363,6 +178439,7 @@ void m68000_device::asl_ais_df() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178423,7 +178500,6 @@ void m68000_device::asl_aips_df() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178455,6 +178531,7 @@ void m68000_device::asl_aips_df() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178517,7 +178594,6 @@ void m68000_device::asl_pais_df() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178549,6 +178625,7 @@ void m68000_device::asl_pais_df() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178627,7 +178704,6 @@ void m68000_device::asl_das_df() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178659,6 +178735,7 @@ void m68000_device::asl_das_df() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178775,7 +178852,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178807,6 +178883,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178884,7 +178961,6 @@ void m68000_device::asl_adr16_df() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178916,6 +178992,7 @@ void m68000_device::asl_adr16_df() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179014,7 +179091,6 @@ void m68000_device::asl_adr32_df() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179046,6 +179122,7 @@ void m68000_device::asl_adr32_df() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179102,7 +179179,6 @@ void m68000_device::lsr_ais_df() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179134,6 +179210,7 @@ void m68000_device::lsr_ais_df() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179194,7 +179271,6 @@ void m68000_device::lsr_aips_df() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179226,6 +179302,7 @@ void m68000_device::lsr_aips_df() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179288,7 +179365,6 @@ void m68000_device::lsr_pais_df() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179320,6 +179396,7 @@ void m68000_device::lsr_pais_df() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179398,7 +179475,6 @@ void m68000_device::lsr_das_df() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179430,6 +179506,7 @@ void m68000_device::lsr_das_df() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179546,7 +179623,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179578,6 +179654,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179655,7 +179732,6 @@ void m68000_device::lsr_adr16_df() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179687,6 +179763,7 @@ void m68000_device::lsr_adr16_df() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179785,7 +179862,6 @@ void m68000_device::lsr_adr32_df() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179817,6 +179893,7 @@ void m68000_device::lsr_adr32_df() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179874,7 +179951,6 @@ void m68000_device::lsl_ais_df() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179906,6 +179982,7 @@ void m68000_device::lsl_ais_df() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179969,7 +180046,6 @@ void m68000_device::lsl_aips_df() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180001,6 +180077,7 @@ void m68000_device::lsl_aips_df() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180066,7 +180143,6 @@ void m68000_device::lsl_pais_df() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180098,6 +180174,7 @@ void m68000_device::lsl_pais_df() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180179,7 +180256,6 @@ void m68000_device::lsl_das_df() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180211,6 +180287,7 @@ void m68000_device::lsl_das_df() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180332,7 +180409,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180364,6 +180440,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180444,7 +180521,6 @@ void m68000_device::lsl_adr16_df() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180476,6 +180552,7 @@ void m68000_device::lsl_adr16_df() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180578,7 +180655,6 @@ void m68000_device::lsl_adr32_df() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180610,6 +180686,7 @@ void m68000_device::lsl_adr32_df() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180667,7 +180744,6 @@ void m68000_device::roxr_ais_df() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180699,6 +180775,7 @@ void m68000_device::roxr_ais_df() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180759,7 +180836,6 @@ void m68000_device::roxr_aips_df() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180791,6 +180867,7 @@ void m68000_device::roxr_aips_df() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180853,7 +180930,6 @@ void m68000_device::roxr_pais_df() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180885,6 +180961,7 @@ void m68000_device::roxr_pais_df() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180963,7 +181040,6 @@ void m68000_device::roxr_das_df() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180995,6 +181071,7 @@ void m68000_device::roxr_das_df() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181111,7 +181188,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181143,6 +181219,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181220,7 +181297,6 @@ void m68000_device::roxr_adr16_df() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181252,6 +181328,7 @@ void m68000_device::roxr_adr16_df() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181350,7 +181427,6 @@ void m68000_device::roxr_adr32_df() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181382,6 +181458,7 @@ void m68000_device::roxr_adr32_df() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181438,7 +181515,6 @@ void m68000_device::roxl_ais_df() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181470,6 +181546,7 @@ void m68000_device::roxl_ais_df() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181530,7 +181607,6 @@ void m68000_device::roxl_aips_df() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181562,6 +181638,7 @@ void m68000_device::roxl_aips_df() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181624,7 +181701,6 @@ void m68000_device::roxl_pais_df() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181656,6 +181732,7 @@ void m68000_device::roxl_pais_df() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181734,7 +181811,6 @@ void m68000_device::roxl_das_df() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181766,6 +181842,7 @@ void m68000_device::roxl_das_df() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181882,7 +181959,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181914,6 +181990,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181991,7 +182068,6 @@ void m68000_device::roxl_adr16_df() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182023,6 +182099,7 @@ void m68000_device::roxl_adr16_df() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182121,7 +182198,6 @@ void m68000_device::roxl_adr32_df() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182153,6 +182229,7 @@ void m68000_device::roxl_adr32_df() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182209,7 +182286,6 @@ void m68000_device::ror_ais_df() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182241,6 +182317,7 @@ void m68000_device::ror_ais_df() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182301,7 +182378,6 @@ void m68000_device::ror_aips_df() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182333,6 +182409,7 @@ void m68000_device::ror_aips_df() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182395,7 +182472,6 @@ void m68000_device::ror_pais_df() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182427,6 +182503,7 @@ void m68000_device::ror_pais_df() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182505,7 +182582,6 @@ void m68000_device::ror_das_df() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182537,6 +182613,7 @@ void m68000_device::ror_das_df() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182653,7 +182730,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182685,6 +182761,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182762,7 +182839,6 @@ void m68000_device::ror_adr16_df() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182794,6 +182870,7 @@ void m68000_device::ror_adr16_df() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182892,7 +182969,6 @@ void m68000_device::ror_adr32_df() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182924,6 +183000,7 @@ void m68000_device::ror_adr32_df() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182980,7 +183057,6 @@ void m68000_device::rol_ais_df() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183012,6 +183088,7 @@ void m68000_device::rol_ais_df() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183072,7 +183149,6 @@ void m68000_device::rol_aips_df() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183104,6 +183180,7 @@ void m68000_device::rol_aips_df() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183166,7 +183243,6 @@ void m68000_device::rol_pais_df() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183198,6 +183274,7 @@ void m68000_device::rol_pais_df() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183276,7 +183353,6 @@ void m68000_device::rol_das_df() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183308,6 +183384,7 @@ void m68000_device::rol_das_df() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183424,7 +183501,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183456,6 +183532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183533,7 +183610,6 @@ void m68000_device::rol_adr16_df() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183565,6 +183641,7 @@ void m68000_device::rol_adr16_df() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183663,7 +183740,6 @@ void m68000_device::rol_adr32_df() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183695,6 +183771,7 @@ void m68000_device::rol_adr32_df() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); diff --git a/src/devices/cpu/m68000/m68000-sdfm.cpp b/src/devices/cpu/m68000/m68000-sdfm.cpp index ada095c2b11..1a72581ea4b 100644 --- a/src/devices/cpu/m68000/m68000-sdfm.cpp +++ b/src/devices/cpu/m68000/m68000-sdfm.cpp @@ -10,6 +10,7 @@ void m68000_device::state_reset_dfm() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -139,11 +140,11 @@ void m68000_device::state_reset_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -258,6 +259,7 @@ void m68000_device::state_bus_error_dfm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -416,11 +418,11 @@ void m68000_device::state_bus_error_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -535,6 +537,7 @@ void m68000_device::state_address_error_dfm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -693,11 +696,11 @@ void m68000_device::state_address_error_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -796,10 +799,10 @@ void m68000_device::state_interrupt_dfm() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -918,11 +921,11 @@ void m68000_device::state_interrupt_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1101,11 +1104,11 @@ void m68000_device::state_trace_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1284,11 +1287,11 @@ void m68000_device::state_illegal_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1467,11 +1470,11 @@ void m68000_device::state_priviledge_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1650,11 +1653,11 @@ void m68000_device::state_linea_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1833,11 +1836,11 @@ void m68000_device::state_linef_dfm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1893,13 +1896,13 @@ void m68000_device::ori_b_imm8_ds_dfm() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -1980,7 +1983,6 @@ void m68000_device::ori_b_imm8_ais_dfm() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2007,6 +2009,7 @@ void m68000_device::ori_b_imm8_ais_dfm() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2085,7 +2088,6 @@ void m68000_device::ori_b_imm8_aips_dfm() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2112,6 +2114,7 @@ void m68000_device::ori_b_imm8_aips_dfm() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2192,7 +2195,6 @@ void m68000_device::ori_b_imm8_pais_dfm() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2219,6 +2221,7 @@ void m68000_device::ori_b_imm8_pais_dfm() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2315,7 +2318,6 @@ void m68000_device::ori_b_imm8_das_dfm() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2342,6 +2344,7 @@ void m68000_device::ori_b_imm8_das_dfm() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2478,7 +2481,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2505,6 +2507,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2600,7 +2603,6 @@ void m68000_device::ori_b_imm8_adr16_dfm() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2627,6 +2629,7 @@ void m68000_device::ori_b_imm8_adr16_dfm() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2744,7 +2747,6 @@ void m68000_device::ori_b_imm8_adr32_dfm() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2771,6 +2773,7 @@ void m68000_device::ori_b_imm8_adr32_dfm() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2865,12 +2868,12 @@ void m68000_device::ori_imm8_ccr_dfm() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -2927,13 +2930,13 @@ void m68000_device::ori_w_imm16_ds_dfm() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3017,7 +3020,6 @@ void m68000_device::ori_w_imm16_ais_dfm() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3044,6 +3046,7 @@ void m68000_device::ori_w_imm16_ais_dfm() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3130,7 +3133,6 @@ void m68000_device::ori_w_imm16_aips_dfm() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3157,6 +3159,7 @@ void m68000_device::ori_w_imm16_aips_dfm() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3245,7 +3248,6 @@ void m68000_device::ori_w_imm16_pais_dfm() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3272,6 +3274,7 @@ void m68000_device::ori_w_imm16_pais_dfm() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3376,7 +3379,6 @@ void m68000_device::ori_w_imm16_das_dfm() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3403,6 +3405,7 @@ void m68000_device::ori_w_imm16_das_dfm() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3547,7 +3550,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3574,6 +3576,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3677,7 +3680,6 @@ void m68000_device::ori_w_imm16_adr16_dfm() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3704,6 +3706,7 @@ void m68000_device::ori_w_imm16_adr16_dfm() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3829,7 +3832,6 @@ void m68000_device::ori_w_imm16_adr32_dfm() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -3856,6 +3858,7 @@ void m68000_device::ori_w_imm16_adr32_dfm() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -3961,12 +3964,12 @@ void m68000_device::ori_i16u_sr_dfm() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4045,7 +4048,6 @@ void m68000_device::ori_l_imm32_ds_dfm() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4078,6 +4080,7 @@ void m68000_device::ori_l_imm32_ds_dfm() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4187,7 +4190,6 @@ void m68000_device::ori_l_imm32_ais_dfm() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4237,6 +4239,7 @@ void m68000_device::ori_l_imm32_ais_dfm() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4365,7 +4368,6 @@ void m68000_device::ori_l_imm32_aips_dfm() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4415,6 +4417,7 @@ void m68000_device::ori_l_imm32_aips_dfm() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4544,7 +4547,6 @@ void m68000_device::ori_l_imm32_pais_dfm() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4594,6 +4596,7 @@ void m68000_device::ori_l_imm32_pais_dfm() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4740,7 +4743,6 @@ void m68000_device::ori_l_imm32_das_dfm() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -4790,6 +4792,7 @@ void m68000_device::ori_l_imm32_das_dfm() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -4976,7 +4979,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5026,6 +5028,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -5175,7 +5178,6 @@ void m68000_device::ori_l_imm32_adr16_dfm() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5225,6 +5227,7 @@ void m68000_device::ori_l_imm32_adr16_dfm() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -5396,7 +5399,6 @@ void m68000_device::ori_l_imm32_adr32_dfm() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5446,6 +5448,7 @@ void m68000_device::ori_l_imm32_adr32_dfm() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -5479,7 +5482,6 @@ void m68000_device::btst_dd_ds_dfm() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -5517,6 +5519,7 @@ void m68000_device::btst_dd_ds_dfm() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -5530,6 +5533,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -5588,7 +5592,6 @@ void m68000_device::movep_w_das_dd_dfm() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -5608,6 +5611,7 @@ void m68000_device::movep_w_das_dd_dfm() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5666,7 +5670,6 @@ void m68000_device::btst_dd_ais_dfm() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5674,6 +5677,7 @@ void m68000_device::btst_dd_ais_dfm() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5734,7 +5738,6 @@ void m68000_device::btst_dd_aips_dfm() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5742,6 +5745,7 @@ void m68000_device::btst_dd_aips_dfm() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5804,7 +5808,6 @@ void m68000_device::btst_dd_pais_dfm() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5812,6 +5815,7 @@ void m68000_device::btst_dd_pais_dfm() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -5890,7 +5894,6 @@ void m68000_device::btst_dd_das_dfm() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5898,6 +5901,7 @@ void m68000_device::btst_dd_das_dfm() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6016,7 +6020,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6024,6 +6027,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6101,7 +6105,6 @@ void m68000_device::btst_dd_adr16_dfm() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6109,6 +6112,7 @@ void m68000_device::btst_dd_adr16_dfm() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6208,7 +6212,6 @@ void m68000_device::btst_dd_adr32_dfm() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6216,6 +6219,7 @@ void m68000_device::btst_dd_adr32_dfm() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6293,7 +6297,6 @@ void m68000_device::btst_dd_dpc_dfm() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6301,6 +6304,7 @@ void m68000_device::btst_dd_dpc_dfm() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6418,7 +6422,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6426,6 +6429,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6483,7 +6487,6 @@ void m68000_device::btst_dd_imm_dfm() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -6519,6 +6522,7 @@ void m68000_device::btst_dd_imm_dfm() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -6532,6 +6536,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -6550,7 +6555,6 @@ void m68000_device::bchg_dd_ds_dfm() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6588,6 +6592,7 @@ void m68000_device::bchg_dd_ds_dfm() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6606,6 +6611,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6702,7 +6708,6 @@ void m68000_device::movep_l_das_dd_dfm() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -6722,6 +6727,7 @@ void m68000_device::movep_l_das_dd_dfm() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6780,7 +6786,6 @@ void m68000_device::bchg_dd_ais_dfm() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6807,6 +6812,7 @@ void m68000_device::bchg_dd_ais_dfm() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6863,7 +6869,6 @@ void m68000_device::bchg_dd_aips_dfm() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6890,6 +6895,7 @@ void m68000_device::bchg_dd_aips_dfm() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6948,7 +6954,6 @@ void m68000_device::bchg_dd_pais_dfm() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -6975,6 +6980,7 @@ void m68000_device::bchg_dd_pais_dfm() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7049,7 +7055,6 @@ void m68000_device::bchg_dd_das_dfm() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7076,6 +7081,7 @@ void m68000_device::bchg_dd_das_dfm() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7190,7 +7196,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7217,6 +7222,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7290,7 +7296,6 @@ void m68000_device::bchg_dd_adr16_dfm() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7317,6 +7322,7 @@ void m68000_device::bchg_dd_adr16_dfm() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7412,7 +7418,6 @@ void m68000_device::bchg_dd_adr32_dfm() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7439,6 +7444,7 @@ void m68000_device::bchg_dd_adr32_dfm() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7468,7 +7474,6 @@ void m68000_device::bclr_dd_ds_dfm() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7510,6 +7515,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7532,6 +7538,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7573,7 +7580,6 @@ void m68000_device::movep_w_dd_das_dfm() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7607,12 +7613,12 @@ void m68000_device::movep_w_dd_das_dfm() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -7668,7 +7674,6 @@ void m68000_device::bclr_dd_ais_dfm() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7699,6 +7704,7 @@ void m68000_device::bclr_dd_ais_dfm() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7755,7 +7761,6 @@ void m68000_device::bclr_dd_aips_dfm() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7786,6 +7791,7 @@ void m68000_device::bclr_dd_aips_dfm() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7844,7 +7850,6 @@ void m68000_device::bclr_dd_pais_dfm() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7875,6 +7880,7 @@ void m68000_device::bclr_dd_pais_dfm() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7949,7 +7955,6 @@ void m68000_device::bclr_dd_das_dfm() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7980,6 +7985,7 @@ void m68000_device::bclr_dd_das_dfm() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8094,7 +8100,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8125,6 +8130,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8198,7 +8204,6 @@ void m68000_device::bclr_dd_adr16_dfm() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8229,6 +8234,7 @@ void m68000_device::bclr_dd_adr16_dfm() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8324,7 +8330,6 @@ void m68000_device::bclr_dd_adr32_dfm() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8355,6 +8360,7 @@ void m68000_device::bclr_dd_adr32_dfm() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8384,7 +8390,6 @@ void m68000_device::bset_dd_ds_dfm() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8422,6 +8427,7 @@ void m68000_device::bset_dd_ds_dfm() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8440,6 +8446,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8513,7 +8520,6 @@ void m68000_device::movep_l_dd_das_dfm() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8547,12 +8553,12 @@ void m68000_device::movep_l_dd_das_dfm() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8608,7 +8614,6 @@ void m68000_device::bset_dd_ais_dfm() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8635,6 +8640,7 @@ void m68000_device::bset_dd_ais_dfm() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8691,7 +8697,6 @@ void m68000_device::bset_dd_aips_dfm() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8718,6 +8723,7 @@ void m68000_device::bset_dd_aips_dfm() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8776,7 +8782,6 @@ void m68000_device::bset_dd_pais_dfm() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8803,6 +8808,7 @@ void m68000_device::bset_dd_pais_dfm() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8877,7 +8883,6 @@ void m68000_device::bset_dd_das_dfm() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -8904,6 +8909,7 @@ void m68000_device::bset_dd_das_dfm() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9018,7 +9024,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9045,6 +9050,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9118,7 +9124,6 @@ void m68000_device::bset_dd_adr16_dfm() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9145,6 +9150,7 @@ void m68000_device::bset_dd_adr16_dfm() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9240,7 +9246,6 @@ void m68000_device::bset_dd_adr32_dfm() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9267,6 +9272,7 @@ void m68000_device::bset_dd_adr32_dfm() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9319,13 +9325,13 @@ void m68000_device::andi_b_imm8_ds_dfm() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9406,7 +9412,6 @@ void m68000_device::andi_b_imm8_ais_dfm() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9433,6 +9438,7 @@ void m68000_device::andi_b_imm8_ais_dfm() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9511,7 +9517,6 @@ void m68000_device::andi_b_imm8_aips_dfm() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9538,6 +9543,7 @@ void m68000_device::andi_b_imm8_aips_dfm() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9618,7 +9624,6 @@ void m68000_device::andi_b_imm8_pais_dfm() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9645,6 +9650,7 @@ void m68000_device::andi_b_imm8_pais_dfm() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9741,7 +9747,6 @@ void m68000_device::andi_b_imm8_das_dfm() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9768,6 +9773,7 @@ void m68000_device::andi_b_imm8_das_dfm() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9904,7 +9910,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -9931,6 +9936,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10026,7 +10032,6 @@ void m68000_device::andi_b_imm8_adr16_dfm() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10053,6 +10058,7 @@ void m68000_device::andi_b_imm8_adr16_dfm() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10170,7 +10176,6 @@ void m68000_device::andi_b_imm8_adr32_dfm() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10197,6 +10202,7 @@ void m68000_device::andi_b_imm8_adr32_dfm() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10291,12 +10297,12 @@ void m68000_device::andi_imm8_ccr_dfm() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10353,13 +10359,13 @@ void m68000_device::andi_w_imm16_ds_dfm() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10443,7 +10449,6 @@ void m68000_device::andi_w_imm16_ais_dfm() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10470,6 +10475,7 @@ void m68000_device::andi_w_imm16_ais_dfm() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10556,7 +10562,6 @@ void m68000_device::andi_w_imm16_aips_dfm() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10583,6 +10588,7 @@ void m68000_device::andi_w_imm16_aips_dfm() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10671,7 +10677,6 @@ void m68000_device::andi_w_imm16_pais_dfm() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10698,6 +10703,7 @@ void m68000_device::andi_w_imm16_pais_dfm() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10802,7 +10808,6 @@ void m68000_device::andi_w_imm16_das_dfm() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -10829,6 +10834,7 @@ void m68000_device::andi_w_imm16_das_dfm() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -10973,7 +10979,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11000,6 +11005,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11103,7 +11109,6 @@ void m68000_device::andi_w_imm16_adr16_dfm() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11130,6 +11135,7 @@ void m68000_device::andi_w_imm16_adr16_dfm() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11255,7 +11261,6 @@ void m68000_device::andi_w_imm16_adr32_dfm() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11282,6 +11287,7 @@ void m68000_device::andi_w_imm16_adr32_dfm() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11387,12 +11393,12 @@ void m68000_device::andi_i16u_sr_dfm() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11471,7 +11477,6 @@ void m68000_device::andi_l_imm32_ds_dfm() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -11504,6 +11509,7 @@ void m68000_device::andi_l_imm32_ds_dfm() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -11613,7 +11619,6 @@ void m68000_device::andi_l_imm32_ais_dfm() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11663,6 +11668,7 @@ void m68000_device::andi_l_imm32_ais_dfm() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11791,7 +11797,6 @@ void m68000_device::andi_l_imm32_aips_dfm() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -11841,6 +11846,7 @@ void m68000_device::andi_l_imm32_aips_dfm() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -11970,7 +11976,6 @@ void m68000_device::andi_l_imm32_pais_dfm() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12020,6 +12025,7 @@ void m68000_device::andi_l_imm32_pais_dfm() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12166,7 +12172,6 @@ void m68000_device::andi_l_imm32_das_dfm() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12216,6 +12221,7 @@ void m68000_device::andi_l_imm32_das_dfm() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12402,7 +12408,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12452,6 +12457,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12601,7 +12607,6 @@ void m68000_device::andi_l_imm32_adr16_dfm() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12651,6 +12656,7 @@ void m68000_device::andi_l_imm32_adr16_dfm() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12822,7 +12828,6 @@ void m68000_device::andi_l_imm32_adr32_dfm() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -12872,6 +12877,7 @@ void m68000_device::andi_l_imm32_adr32_dfm() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -12927,13 +12933,13 @@ void m68000_device::subi_b_imm8_ds_dfm() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13011,7 +13017,6 @@ void m68000_device::subi_b_imm8_ais_dfm() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13038,6 +13043,7 @@ void m68000_device::subi_b_imm8_ais_dfm() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13112,7 +13118,6 @@ void m68000_device::subi_b_imm8_aips_dfm() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13139,6 +13144,7 @@ void m68000_device::subi_b_imm8_aips_dfm() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13215,7 +13221,6 @@ void m68000_device::subi_b_imm8_pais_dfm() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13242,6 +13247,7 @@ void m68000_device::subi_b_imm8_pais_dfm() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13334,7 +13340,6 @@ void m68000_device::subi_b_imm8_das_dfm() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13361,6 +13366,7 @@ void m68000_device::subi_b_imm8_das_dfm() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13491,7 +13497,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13518,6 +13523,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13609,7 +13615,6 @@ void m68000_device::subi_b_imm8_adr16_dfm() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13636,6 +13641,7 @@ void m68000_device::subi_b_imm8_adr16_dfm() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13748,7 +13754,6 @@ void m68000_device::subi_b_imm8_adr32_dfm() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13775,6 +13780,7 @@ void m68000_device::subi_b_imm8_adr32_dfm() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13824,13 +13830,13 @@ void m68000_device::subi_w_imm16_ds_dfm() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13911,7 +13917,6 @@ void m68000_device::subi_w_imm16_ais_dfm() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -13938,6 +13943,7 @@ void m68000_device::subi_w_imm16_ais_dfm() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14020,7 +14026,6 @@ void m68000_device::subi_w_imm16_aips_dfm() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14047,6 +14052,7 @@ void m68000_device::subi_w_imm16_aips_dfm() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14131,7 +14137,6 @@ void m68000_device::subi_w_imm16_pais_dfm() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14158,6 +14163,7 @@ void m68000_device::subi_w_imm16_pais_dfm() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14258,7 +14264,6 @@ void m68000_device::subi_w_imm16_das_dfm() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14285,6 +14290,7 @@ void m68000_device::subi_w_imm16_das_dfm() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14423,7 +14429,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14450,6 +14455,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14549,7 +14555,6 @@ void m68000_device::subi_w_imm16_adr16_dfm() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14576,6 +14581,7 @@ void m68000_device::subi_w_imm16_adr16_dfm() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14696,7 +14702,6 @@ void m68000_device::subi_w_imm16_adr32_dfm() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14723,6 +14728,7 @@ void m68000_device::subi_w_imm16_adr32_dfm() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -14798,7 +14804,6 @@ void m68000_device::subi_l_imm32_ds_dfm() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -14830,6 +14835,7 @@ void m68000_device::subi_l_imm32_ds_dfm() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -14935,7 +14941,6 @@ void m68000_device::subi_l_imm32_ais_dfm() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -14985,6 +14990,7 @@ void m68000_device::subi_l_imm32_ais_dfm() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15108,7 +15114,6 @@ void m68000_device::subi_l_imm32_aips_dfm() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15158,6 +15163,7 @@ void m68000_device::subi_l_imm32_aips_dfm() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15282,7 +15288,6 @@ void m68000_device::subi_l_imm32_pais_dfm() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15332,6 +15337,7 @@ void m68000_device::subi_l_imm32_pais_dfm() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15473,7 +15479,6 @@ void m68000_device::subi_l_imm32_das_dfm() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15523,6 +15528,7 @@ void m68000_device::subi_l_imm32_das_dfm() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15702,7 +15708,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15752,6 +15757,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -15895,7 +15901,6 @@ void m68000_device::subi_l_imm32_adr16_dfm() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -15945,6 +15950,7 @@ void m68000_device::subi_l_imm32_adr16_dfm() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -16109,7 +16115,6 @@ void m68000_device::subi_l_imm32_adr32_dfm() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16159,6 +16164,7 @@ void m68000_device::subi_l_imm32_adr32_dfm() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -16213,13 +16219,13 @@ void m68000_device::addi_b_imm8_ds_dfm() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16297,7 +16303,6 @@ void m68000_device::addi_b_imm8_ais_dfm() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16324,6 +16329,7 @@ void m68000_device::addi_b_imm8_ais_dfm() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16398,7 +16404,6 @@ void m68000_device::addi_b_imm8_aips_dfm() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16425,6 +16430,7 @@ void m68000_device::addi_b_imm8_aips_dfm() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16501,7 +16507,6 @@ void m68000_device::addi_b_imm8_pais_dfm() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16528,6 +16533,7 @@ void m68000_device::addi_b_imm8_pais_dfm() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16620,7 +16626,6 @@ void m68000_device::addi_b_imm8_das_dfm() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16647,6 +16652,7 @@ void m68000_device::addi_b_imm8_das_dfm() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16777,7 +16783,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16804,6 +16809,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16895,7 +16901,6 @@ void m68000_device::addi_b_imm8_adr16_dfm() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -16922,6 +16927,7 @@ void m68000_device::addi_b_imm8_adr16_dfm() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17034,7 +17040,6 @@ void m68000_device::addi_b_imm8_adr32_dfm() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17061,6 +17066,7 @@ void m68000_device::addi_b_imm8_adr32_dfm() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17110,13 +17116,13 @@ void m68000_device::addi_w_imm16_ds_dfm() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17197,7 +17203,6 @@ void m68000_device::addi_w_imm16_ais_dfm() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17224,6 +17229,7 @@ void m68000_device::addi_w_imm16_ais_dfm() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17306,7 +17312,6 @@ void m68000_device::addi_w_imm16_aips_dfm() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17333,6 +17338,7 @@ void m68000_device::addi_w_imm16_aips_dfm() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17417,7 +17423,6 @@ void m68000_device::addi_w_imm16_pais_dfm() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17444,6 +17449,7 @@ void m68000_device::addi_w_imm16_pais_dfm() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17544,7 +17550,6 @@ void m68000_device::addi_w_imm16_das_dfm() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17571,6 +17576,7 @@ void m68000_device::addi_w_imm16_das_dfm() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17709,7 +17715,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17736,6 +17741,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17835,7 +17841,6 @@ void m68000_device::addi_w_imm16_adr16_dfm() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -17862,6 +17867,7 @@ void m68000_device::addi_w_imm16_adr16_dfm() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -17982,7 +17988,6 @@ void m68000_device::addi_w_imm16_adr32_dfm() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18009,6 +18014,7 @@ void m68000_device::addi_w_imm16_adr32_dfm() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18084,7 +18090,6 @@ void m68000_device::addi_l_imm32_ds_dfm() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -18116,6 +18121,7 @@ void m68000_device::addi_l_imm32_ds_dfm() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -18221,7 +18227,6 @@ void m68000_device::addi_l_imm32_ais_dfm() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18271,6 +18276,7 @@ void m68000_device::addi_l_imm32_ais_dfm() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18394,7 +18400,6 @@ void m68000_device::addi_l_imm32_aips_dfm() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18444,6 +18449,7 @@ void m68000_device::addi_l_imm32_aips_dfm() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18568,7 +18574,6 @@ void m68000_device::addi_l_imm32_pais_dfm() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18618,6 +18623,7 @@ void m68000_device::addi_l_imm32_pais_dfm() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18759,7 +18765,6 @@ void m68000_device::addi_l_imm32_das_dfm() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -18809,6 +18814,7 @@ void m68000_device::addi_l_imm32_das_dfm() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -18988,7 +18994,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19038,6 +19043,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -19181,7 +19187,6 @@ void m68000_device::addi_l_imm32_adr16_dfm() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19231,6 +19236,7 @@ void m68000_device::addi_l_imm32_adr16_dfm() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -19395,7 +19401,6 @@ void m68000_device::addi_l_imm32_adr32_dfm() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19445,6 +19450,7 @@ void m68000_device::addi_l_imm32_adr32_dfm() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -19500,7 +19506,6 @@ void m68000_device::btst_imm8_ds_dfm() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -19538,6 +19543,7 @@ void m68000_device::btst_imm8_ds_dfm() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -19551,6 +19557,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -19614,7 +19621,6 @@ void m68000_device::btst_imm8_ais_dfm() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19622,6 +19628,7 @@ void m68000_device::btst_imm8_ais_dfm() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19705,7 +19712,6 @@ void m68000_device::btst_imm8_aips_dfm() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19713,6 +19719,7 @@ void m68000_device::btst_imm8_aips_dfm() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19798,7 +19805,6 @@ void m68000_device::btst_imm8_pais_dfm() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19806,6 +19812,7 @@ void m68000_device::btst_imm8_pais_dfm() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -19907,7 +19914,6 @@ void m68000_device::btst_imm8_das_dfm() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19915,6 +19921,7 @@ void m68000_device::btst_imm8_das_dfm() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20056,7 +20063,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20064,6 +20070,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20164,7 +20171,6 @@ void m68000_device::btst_imm8_adr16_dfm() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20172,6 +20178,7 @@ void m68000_device::btst_imm8_adr16_dfm() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20294,7 +20301,6 @@ void m68000_device::btst_imm8_adr32_dfm() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20302,6 +20308,7 @@ void m68000_device::btst_imm8_adr32_dfm() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20402,7 +20409,6 @@ void m68000_device::btst_imm8_dpc_dfm() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20410,6 +20416,7 @@ void m68000_device::btst_imm8_dpc_dfm() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20550,7 +20557,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20558,6 +20564,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20614,7 +20621,6 @@ void m68000_device::bchg_imm8_ds_dfm() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -20652,6 +20658,7 @@ void m68000_device::bchg_imm8_ds_dfm() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20670,6 +20677,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20734,7 +20742,6 @@ void m68000_device::bchg_imm8_ais_dfm() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20761,6 +20768,7 @@ void m68000_device::bchg_imm8_ais_dfm() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20840,7 +20848,6 @@ void m68000_device::bchg_imm8_aips_dfm() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20867,6 +20874,7 @@ void m68000_device::bchg_imm8_aips_dfm() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20948,7 +20956,6 @@ void m68000_device::bchg_imm8_pais_dfm() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -20975,6 +20982,7 @@ void m68000_device::bchg_imm8_pais_dfm() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21072,7 +21080,6 @@ void m68000_device::bchg_imm8_das_dfm() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21099,6 +21106,7 @@ void m68000_device::bchg_imm8_das_dfm() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21236,7 +21244,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21263,6 +21270,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21359,7 +21367,6 @@ void m68000_device::bchg_imm8_adr16_dfm() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21386,6 +21393,7 @@ void m68000_device::bchg_imm8_adr16_dfm() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21504,7 +21512,6 @@ void m68000_device::bchg_imm8_adr32_dfm() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -21531,6 +21538,7 @@ void m68000_device::bchg_imm8_adr32_dfm() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21583,7 +21591,6 @@ void m68000_device::bclr_imm8_ds_dfm() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -21625,6 +21632,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21647,6 +21655,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21711,7 +21720,6 @@ void m68000_device::bclr_imm8_ais_dfm() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21742,6 +21750,7 @@ void m68000_device::bclr_imm8_ais_dfm() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21821,7 +21830,6 @@ void m68000_device::bclr_imm8_aips_dfm() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21852,6 +21860,7 @@ void m68000_device::bclr_imm8_aips_dfm() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21933,7 +21942,6 @@ void m68000_device::bclr_imm8_pais_dfm() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21964,6 +21972,7 @@ void m68000_device::bclr_imm8_pais_dfm() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22061,7 +22070,6 @@ void m68000_device::bclr_imm8_das_dfm() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22092,6 +22100,7 @@ void m68000_device::bclr_imm8_das_dfm() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22229,7 +22238,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22260,6 +22268,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22356,7 +22365,6 @@ void m68000_device::bclr_imm8_adr16_dfm() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22387,6 +22395,7 @@ void m68000_device::bclr_imm8_adr16_dfm() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22505,7 +22514,6 @@ void m68000_device::bclr_imm8_adr32_dfm() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22536,6 +22544,7 @@ void m68000_device::bclr_imm8_adr32_dfm() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22588,7 +22597,6 @@ void m68000_device::bset_imm8_ds_dfm() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22626,6 +22634,7 @@ void m68000_device::bset_imm8_ds_dfm() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22644,6 +22653,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22708,7 +22718,6 @@ void m68000_device::bset_imm8_ais_dfm() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -22735,6 +22744,7 @@ void m68000_device::bset_imm8_ais_dfm() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22814,7 +22824,6 @@ void m68000_device::bset_imm8_aips_dfm() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -22841,6 +22850,7 @@ void m68000_device::bset_imm8_aips_dfm() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22922,7 +22932,6 @@ void m68000_device::bset_imm8_pais_dfm() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -22949,6 +22958,7 @@ void m68000_device::bset_imm8_pais_dfm() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23046,7 +23056,6 @@ void m68000_device::bset_imm8_das_dfm() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23073,6 +23082,7 @@ void m68000_device::bset_imm8_das_dfm() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23210,7 +23220,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23237,6 +23246,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23333,7 +23343,6 @@ void m68000_device::bset_imm8_adr16_dfm() // 08f8 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23360,6 +23369,7 @@ void m68000_device::bset_imm8_adr16_dfm() // 08f8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23478,7 +23488,6 @@ void m68000_device::bset_imm8_adr32_dfm() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23505,6 +23514,7 @@ void m68000_device::bset_imm8_adr32_dfm() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23557,13 +23567,13 @@ void m68000_device::eori_b_imm8_ds_dfm() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23644,7 +23654,6 @@ void m68000_device::eori_b_imm8_ais_dfm() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23671,6 +23680,7 @@ void m68000_device::eori_b_imm8_ais_dfm() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23749,7 +23759,6 @@ void m68000_device::eori_b_imm8_aips_dfm() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23776,6 +23785,7 @@ void m68000_device::eori_b_imm8_aips_dfm() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23856,7 +23866,6 @@ void m68000_device::eori_b_imm8_pais_dfm() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -23883,6 +23892,7 @@ void m68000_device::eori_b_imm8_pais_dfm() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23979,7 +23989,6 @@ void m68000_device::eori_b_imm8_das_dfm() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24006,6 +24015,7 @@ void m68000_device::eori_b_imm8_das_dfm() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24142,7 +24152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24169,6 +24178,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24264,7 +24274,6 @@ void m68000_device::eori_b_imm8_adr16_dfm() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24291,6 +24300,7 @@ void m68000_device::eori_b_imm8_adr16_dfm() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24408,7 +24418,6 @@ void m68000_device::eori_b_imm8_adr32_dfm() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24435,6 +24444,7 @@ void m68000_device::eori_b_imm8_adr32_dfm() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24529,12 +24539,12 @@ void m68000_device::eori_imm8_ccr_dfm() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24591,13 +24601,13 @@ void m68000_device::eori_w_imm16_ds_dfm() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24681,7 +24691,6 @@ void m68000_device::eori_w_imm16_ais_dfm() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24708,6 +24717,7 @@ void m68000_device::eori_w_imm16_ais_dfm() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -24794,7 +24804,6 @@ void m68000_device::eori_w_imm16_aips_dfm() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24821,6 +24830,7 @@ void m68000_device::eori_w_imm16_aips_dfm() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -24909,7 +24919,6 @@ void m68000_device::eori_w_imm16_pais_dfm() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -24936,6 +24945,7 @@ void m68000_device::eori_w_imm16_pais_dfm() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25040,7 +25050,6 @@ void m68000_device::eori_w_imm16_das_dfm() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25067,6 +25076,7 @@ void m68000_device::eori_w_imm16_das_dfm() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25211,7 +25221,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25238,6 +25247,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25341,7 +25351,6 @@ void m68000_device::eori_w_imm16_adr16_dfm() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25368,6 +25377,7 @@ void m68000_device::eori_w_imm16_adr16_dfm() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25493,7 +25503,6 @@ void m68000_device::eori_w_imm16_adr32_dfm() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25520,6 +25529,7 @@ void m68000_device::eori_w_imm16_adr32_dfm() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -25625,12 +25635,12 @@ void m68000_device::eori_i16u_sr_dfm() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25709,7 +25719,6 @@ void m68000_device::eori_l_imm32_ds_dfm() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -25742,6 +25751,7 @@ void m68000_device::eori_l_imm32_ds_dfm() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -25851,7 +25861,6 @@ void m68000_device::eori_l_imm32_ais_dfm() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -25901,6 +25910,7 @@ void m68000_device::eori_l_imm32_ais_dfm() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26029,7 +26039,6 @@ void m68000_device::eori_l_imm32_aips_dfm() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26079,6 +26088,7 @@ void m68000_device::eori_l_imm32_aips_dfm() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26208,7 +26218,6 @@ void m68000_device::eori_l_imm32_pais_dfm() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26258,6 +26267,7 @@ void m68000_device::eori_l_imm32_pais_dfm() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26404,7 +26414,6 @@ void m68000_device::eori_l_imm32_das_dfm() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26454,6 +26463,7 @@ void m68000_device::eori_l_imm32_das_dfm() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26640,7 +26650,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26690,6 +26699,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -26839,7 +26849,6 @@ void m68000_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -26889,6 +26898,7 @@ void m68000_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -27060,7 +27070,6 @@ void m68000_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27110,6 +27119,7 @@ void m68000_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -27165,13 +27175,13 @@ void m68000_device::cmpi_b_imm8_ds_dfm() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27248,7 +27258,6 @@ void m68000_device::cmpi_b_imm8_ais_dfm() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27256,6 +27265,7 @@ void m68000_device::cmpi_b_imm8_ais_dfm() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27335,7 +27345,6 @@ void m68000_device::cmpi_b_imm8_aips_dfm() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27343,6 +27352,7 @@ void m68000_device::cmpi_b_imm8_aips_dfm() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27424,7 +27434,6 @@ void m68000_device::cmpi_b_imm8_pais_dfm() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27432,6 +27441,7 @@ void m68000_device::cmpi_b_imm8_pais_dfm() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27529,7 +27539,6 @@ void m68000_device::cmpi_b_imm8_das_dfm() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27537,6 +27546,7 @@ void m68000_device::cmpi_b_imm8_das_dfm() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27672,7 +27682,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27680,6 +27689,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27776,7 +27786,6 @@ void m68000_device::cmpi_b_imm8_adr16_dfm() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27784,6 +27793,7 @@ void m68000_device::cmpi_b_imm8_adr16_dfm() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27901,7 +27911,6 @@ void m68000_device::cmpi_b_imm8_adr32_dfm() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27909,6 +27918,7 @@ void m68000_device::cmpi_b_imm8_adr32_dfm() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -27963,13 +27973,13 @@ void m68000_device::cmpi_w_imm16_ds_dfm() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28049,7 +28059,6 @@ void m68000_device::cmpi_w_imm16_ais_dfm() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28057,6 +28066,7 @@ void m68000_device::cmpi_w_imm16_ais_dfm() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28139,7 +28149,6 @@ void m68000_device::cmpi_w_imm16_aips_dfm() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28147,6 +28156,7 @@ void m68000_device::cmpi_w_imm16_aips_dfm() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28231,7 +28241,6 @@ void m68000_device::cmpi_w_imm16_pais_dfm() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28239,6 +28248,7 @@ void m68000_device::cmpi_w_imm16_pais_dfm() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28339,7 +28349,6 @@ void m68000_device::cmpi_w_imm16_das_dfm() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28347,6 +28356,7 @@ void m68000_device::cmpi_w_imm16_das_dfm() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28485,7 +28495,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28493,6 +28502,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28592,7 +28602,6 @@ void m68000_device::cmpi_w_imm16_adr16_dfm() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28600,6 +28609,7 @@ void m68000_device::cmpi_w_imm16_adr16_dfm() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28720,7 +28730,6 @@ void m68000_device::cmpi_w_imm16_adr32_dfm() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28728,6 +28737,7 @@ void m68000_device::cmpi_w_imm16_adr32_dfm() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -28804,7 +28814,6 @@ void m68000_device::cmpi_l_imm32_ds_dfm() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -28833,6 +28842,7 @@ void m68000_device::cmpi_l_imm32_ds_dfm() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -28937,7 +28947,6 @@ void m68000_device::cmpi_l_imm32_ais_dfm() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28945,6 +28954,7 @@ void m68000_device::cmpi_l_imm32_ais_dfm() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29071,7 +29081,6 @@ void m68000_device::cmpi_l_imm32_aips_dfm() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29079,6 +29088,7 @@ void m68000_device::cmpi_l_imm32_aips_dfm() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29206,7 +29216,6 @@ void m68000_device::cmpi_l_imm32_pais_dfm() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29214,6 +29223,7 @@ void m68000_device::cmpi_l_imm32_pais_dfm() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29358,7 +29368,6 @@ void m68000_device::cmpi_l_imm32_das_dfm() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29366,6 +29375,7 @@ void m68000_device::cmpi_l_imm32_das_dfm() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29548,7 +29558,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29556,6 +29565,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29702,7 +29712,6 @@ void m68000_device::cmpi_l_imm32_adr16_dfm() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29710,6 +29719,7 @@ void m68000_device::cmpi_l_imm32_adr16_dfm() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29877,7 +29887,6 @@ void m68000_device::cmpi_l_imm32_adr32_dfm() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29885,6 +29894,7 @@ void m68000_device::cmpi_l_imm32_adr32_dfm() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29920,7 +29930,6 @@ void m68000_device::move_b_ds_dd_dfm() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -29929,6 +29938,7 @@ void m68000_device::move_b_ds_dd_dfm() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -29984,7 +29994,6 @@ void m68000_device::move_b_ais_dd_dfm() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -29993,6 +30002,7 @@ void m68000_device::move_b_ais_dd_dfm() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30050,7 +30060,6 @@ void m68000_device::move_b_aips_dd_dfm() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30059,6 +30068,7 @@ void m68000_device::move_b_aips_dd_dfm() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30118,7 +30128,6 @@ void m68000_device::move_b_pais_dd_dfm() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30127,6 +30136,7 @@ void m68000_device::move_b_pais_dd_dfm() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30202,7 +30212,6 @@ void m68000_device::move_b_das_dd_dfm() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30211,6 +30220,7 @@ void m68000_device::move_b_das_dd_dfm() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30324,7 +30334,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30333,6 +30342,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30407,7 +30417,6 @@ void m68000_device::move_b_adr16_dd_dfm() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30416,6 +30425,7 @@ void m68000_device::move_b_adr16_dd_dfm() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30511,7 +30521,6 @@ void m68000_device::move_b_adr32_dd_dfm() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30520,6 +30529,7 @@ void m68000_device::move_b_adr32_dd_dfm() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30594,7 +30604,6 @@ void m68000_device::move_b_dpc_dd_dfm() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30603,6 +30612,7 @@ void m68000_device::move_b_dpc_dd_dfm() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30715,7 +30725,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30724,6 +30733,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30779,7 +30789,6 @@ void m68000_device::move_b_imm8_dd_dfm() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -30788,6 +30797,7 @@ void m68000_device::move_b_imm8_dd_dfm() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30822,7 +30832,6 @@ void m68000_device::move_b_ds_aid_dfm() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -30843,10 +30852,10 @@ void m68000_device::move_b_ds_aid_dfm() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30919,10 +30928,10 @@ void m68000_device::move_b_ais_aid_dfm() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -30999,10 +31008,10 @@ void m68000_device::move_b_aips_aid_dfm() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31081,10 +31090,10 @@ void m68000_device::move_b_pais_aid_dfm() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31179,10 +31188,10 @@ void m68000_device::move_b_das_aid_dfm() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31315,10 +31324,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31412,10 +31421,10 @@ void m68000_device::move_b_adr16_aid_dfm() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31530,10 +31539,10 @@ void m68000_device::move_b_adr32_aid_dfm() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31627,10 +31636,10 @@ void m68000_device::move_b_dpc_aid_dfm() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31762,10 +31771,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31821,7 +31830,6 @@ void m68000_device::move_b_imm8_aid_dfm() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31842,10 +31850,10 @@ void m68000_device::move_b_imm8_aid_dfm() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31878,7 +31886,6 @@ void m68000_device::move_b_ds_aipd_dfm() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31899,6 +31906,7 @@ void m68000_device::move_b_ds_aipd_dfm() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -31954,7 +31962,6 @@ void m68000_device::move_b_ais_aipd_dfm() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31975,6 +31982,7 @@ void m68000_device::move_b_ais_aipd_dfm() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32034,7 +32042,6 @@ void m68000_device::move_b_aips_aipd_dfm() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32055,6 +32062,7 @@ void m68000_device::move_b_aips_aipd_dfm() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32116,7 +32124,6 @@ void m68000_device::move_b_pais_aipd_dfm() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32137,6 +32144,7 @@ void m68000_device::move_b_pais_aipd_dfm() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32214,7 +32222,6 @@ void m68000_device::move_b_das_aipd_dfm() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32235,6 +32242,7 @@ void m68000_device::move_b_das_aipd_dfm() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32350,7 +32358,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32371,6 +32378,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32447,7 +32455,6 @@ void m68000_device::move_b_adr16_aipd_dfm() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32468,6 +32475,7 @@ void m68000_device::move_b_adr16_aipd_dfm() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32565,7 +32573,6 @@ void m68000_device::move_b_adr32_aipd_dfm() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32586,6 +32593,7 @@ void m68000_device::move_b_adr32_aipd_dfm() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32662,7 +32670,6 @@ void m68000_device::move_b_dpc_aipd_dfm() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32683,6 +32690,7 @@ void m68000_device::move_b_dpc_aipd_dfm() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32797,7 +32805,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32818,6 +32825,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32875,7 +32883,6 @@ void m68000_device::move_b_imm8_aipd_dfm() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32896,6 +32903,7 @@ void m68000_device::move_b_imm8_aipd_dfm() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32930,7 +32938,6 @@ void m68000_device::move_b_ds_paid_dfm() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -32957,6 +32964,7 @@ void m68000_device::move_b_ds_paid_dfm() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33006,7 +33014,6 @@ void m68000_device::move_b_ais_paid_dfm() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33033,6 +33040,7 @@ void m68000_device::move_b_ais_paid_dfm() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33086,7 +33094,6 @@ void m68000_device::move_b_aips_paid_dfm() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33113,6 +33120,7 @@ void m68000_device::move_b_aips_paid_dfm() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33168,7 +33176,6 @@ void m68000_device::move_b_pais_paid_dfm() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33195,6 +33202,7 @@ void m68000_device::move_b_pais_paid_dfm() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33266,7 +33274,6 @@ void m68000_device::move_b_das_paid_dfm() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33293,6 +33300,7 @@ void m68000_device::move_b_das_paid_dfm() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33402,7 +33410,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33429,6 +33436,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33499,7 +33507,6 @@ void m68000_device::move_b_adr16_paid_dfm() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33526,6 +33533,7 @@ void m68000_device::move_b_adr16_paid_dfm() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33617,7 +33625,6 @@ void m68000_device::move_b_adr32_paid_dfm() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33644,6 +33651,7 @@ void m68000_device::move_b_adr32_paid_dfm() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33714,7 +33722,6 @@ void m68000_device::move_b_dpc_paid_dfm() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33741,6 +33748,7 @@ void m68000_device::move_b_dpc_paid_dfm() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33849,7 +33857,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33876,6 +33883,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33927,7 +33935,6 @@ void m68000_device::move_b_imm8_paid_dfm() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -33954,6 +33961,7 @@ void m68000_device::move_b_imm8_paid_dfm() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34003,7 +34011,6 @@ void m68000_device::move_b_ds_dad_dfm() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34023,11 +34030,11 @@ void m68000_device::move_b_ds_dad_dfm() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34105,6 +34112,7 @@ void m68000_device::move_b_ais_dad_dfm() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34124,11 +34132,11 @@ void m68000_device::move_b_ais_dad_dfm() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34210,6 +34218,7 @@ void m68000_device::move_b_aips_dad_dfm() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34229,11 +34238,11 @@ void m68000_device::move_b_aips_dad_dfm() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34317,6 +34326,7 @@ void m68000_device::move_b_pais_dad_dfm() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34336,11 +34346,11 @@ void m68000_device::move_b_pais_dad_dfm() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34440,6 +34450,7 @@ void m68000_device::move_b_das_dad_dfm() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34459,11 +34470,11 @@ void m68000_device::move_b_das_dad_dfm() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34601,6 +34612,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34620,11 +34632,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34723,6 +34735,7 @@ void m68000_device::move_b_adr16_dad_dfm() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34742,11 +34755,11 @@ void m68000_device::move_b_adr16_dad_dfm() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34866,6 +34879,7 @@ void m68000_device::move_b_adr32_dad_dfm() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34885,11 +34899,11 @@ void m68000_device::move_b_adr32_dad_dfm() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -34988,6 +35002,7 @@ void m68000_device::move_b_dpc_dad_dfm() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35007,11 +35022,11 @@ void m68000_device::move_b_dpc_dad_dfm() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35148,6 +35163,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35167,11 +35183,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35248,7 +35264,6 @@ void m68000_device::move_b_imm8_dad_dfm() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35268,11 +35283,11 @@ void m68000_device::move_b_imm8_dad_dfm() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35365,7 +35380,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35385,11 +35399,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35505,6 +35519,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35524,11 +35539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35648,6 +35663,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35667,11 +35683,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35793,6 +35809,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35812,11 +35829,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -35954,6 +35971,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35973,11 +35991,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36153,6 +36171,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36172,11 +36191,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36313,6 +36332,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36332,11 +36352,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36494,6 +36514,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36513,11 +36534,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36654,6 +36675,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36673,11 +36695,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36852,6 +36874,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36871,11 +36894,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -36991,7 +37014,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37011,11 +37033,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37072,6 +37094,7 @@ void m68000_device::move_b_ds_adr16_dfm() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37091,11 +37114,11 @@ void m68000_device::move_b_ds_adr16_dfm() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37172,6 +37195,7 @@ void m68000_device::move_b_ais_adr16_dfm() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37191,11 +37215,11 @@ void m68000_device::move_b_ais_adr16_dfm() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37276,6 +37300,7 @@ void m68000_device::move_b_aips_adr16_dfm() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37295,11 +37320,11 @@ void m68000_device::move_b_aips_adr16_dfm() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37382,6 +37407,7 @@ void m68000_device::move_b_pais_adr16_dfm() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37401,11 +37427,11 @@ void m68000_device::move_b_pais_adr16_dfm() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37504,6 +37530,7 @@ void m68000_device::move_b_das_adr16_dfm() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37523,11 +37550,11 @@ void m68000_device::move_b_das_adr16_dfm() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37664,6 +37691,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37683,11 +37711,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37785,6 +37813,7 @@ void m68000_device::move_b_adr16_adr16_dfm() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37804,11 +37833,11 @@ void m68000_device::move_b_adr16_adr16_dfm() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -37927,6 +37956,7 @@ void m68000_device::move_b_adr32_adr16_dfm() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37946,11 +37976,11 @@ void m68000_device::move_b_adr32_adr16_dfm() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38048,6 +38078,7 @@ void m68000_device::move_b_dpc_adr16_dfm() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38067,11 +38098,11 @@ void m68000_device::move_b_dpc_adr16_dfm() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38207,6 +38238,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38226,11 +38258,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38310,6 +38342,7 @@ void m68000_device::move_b_imm8_adr16_dfm() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38329,11 +38362,11 @@ void m68000_device::move_b_imm8_adr16_dfm() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38411,6 +38444,7 @@ void m68000_device::move_b_ds_adr32_dfm() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38430,11 +38464,11 @@ void m68000_device::move_b_ds_adr32_dfm() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38511,7 +38545,6 @@ void m68000_device::move_b_ais_adr32_dfm() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38552,11 +38585,11 @@ void m68000_device::move_b_ais_adr32_dfm() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38637,7 +38670,6 @@ void m68000_device::move_b_aips_adr32_dfm() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38678,11 +38710,11 @@ void m68000_device::move_b_aips_adr32_dfm() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38765,7 +38797,6 @@ void m68000_device::move_b_pais_adr32_dfm() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38806,11 +38837,11 @@ void m68000_device::move_b_pais_adr32_dfm() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -38909,7 +38940,6 @@ void m68000_device::move_b_das_adr32_dfm() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38950,11 +38980,11 @@ void m68000_device::move_b_das_adr32_dfm() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39091,7 +39121,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39132,11 +39161,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39234,7 +39263,6 @@ void m68000_device::move_b_adr16_adr32_dfm() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39275,11 +39303,11 @@ void m68000_device::move_b_adr16_adr32_dfm() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39398,7 +39426,6 @@ void m68000_device::move_b_adr32_adr32_dfm() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39439,11 +39466,11 @@ void m68000_device::move_b_adr32_adr32_dfm() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39541,7 +39568,6 @@ void m68000_device::move_b_dpc_adr32_dfm() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39582,11 +39608,11 @@ void m68000_device::move_b_dpc_adr32_dfm() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39722,7 +39748,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39763,11 +39788,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39868,6 +39893,7 @@ void m68000_device::move_b_imm8_adr32_dfm() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39887,11 +39913,11 @@ void m68000_device::move_b_imm8_adr32_dfm() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39924,7 +39950,6 @@ void m68000_device::move_l_ds_dd_dfm() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39933,6 +39958,7 @@ void m68000_device::move_l_ds_dd_dfm() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -39969,7 +39995,6 @@ void m68000_device::move_l_as_dd_dfm() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39978,6 +40003,7 @@ void m68000_device::move_l_as_dd_dfm() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40059,7 +40085,6 @@ void m68000_device::move_l_ais_dd_dfm() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40068,6 +40093,7 @@ void m68000_device::move_l_ais_dd_dfm() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40152,7 +40178,6 @@ void m68000_device::move_l_aips_dd_dfm() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40161,6 +40186,7 @@ void m68000_device::move_l_aips_dd_dfm() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40246,7 +40272,6 @@ void m68000_device::move_l_pais_dd_dfm() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40255,6 +40280,7 @@ void m68000_device::move_l_pais_dd_dfm() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40357,7 +40383,6 @@ void m68000_device::move_l_das_dd_dfm() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40366,6 +40391,7 @@ void m68000_device::move_l_das_dd_dfm() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40506,7 +40532,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40515,6 +40540,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40619,7 +40645,6 @@ void m68000_device::move_l_adr16_dd_dfm() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40628,6 +40653,7 @@ void m68000_device::move_l_adr16_dd_dfm() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40753,7 +40779,6 @@ void m68000_device::move_l_adr32_dd_dfm() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40762,6 +40787,7 @@ void m68000_device::move_l_adr32_dd_dfm() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -40863,7 +40889,6 @@ void m68000_device::move_l_dpc_dd_dfm() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40872,6 +40897,7 @@ void m68000_device::move_l_dpc_dd_dfm() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41011,7 +41037,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41020,6 +41045,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41100,7 +41126,6 @@ void m68000_device::move_l_imm32_dd_dfm() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -41109,6 +41134,7 @@ void m68000_device::move_l_imm32_dd_dfm() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41145,7 +41171,6 @@ void m68000_device::movea_l_ds_ad_dfm() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41153,6 +41178,7 @@ void m68000_device::movea_l_ds_ad_dfm() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41188,7 +41214,6 @@ void m68000_device::movea_l_as_ad_dfm() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41196,6 +41221,7 @@ void m68000_device::movea_l_as_ad_dfm() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41276,7 +41302,6 @@ void m68000_device::movea_l_ais_ad_dfm() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41284,6 +41309,7 @@ void m68000_device::movea_l_ais_ad_dfm() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41367,7 +41393,6 @@ void m68000_device::movea_l_aips_ad_dfm() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41375,6 +41400,7 @@ void m68000_device::movea_l_aips_ad_dfm() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41459,7 +41485,6 @@ void m68000_device::movea_l_pais_ad_dfm() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41467,6 +41492,7 @@ void m68000_device::movea_l_pais_ad_dfm() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41568,7 +41594,6 @@ void m68000_device::movea_l_das_ad_dfm() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41576,6 +41601,7 @@ void m68000_device::movea_l_das_ad_dfm() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41715,7 +41741,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41723,6 +41748,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41826,7 +41852,6 @@ void m68000_device::movea_l_adr16_ad_dfm() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41834,6 +41859,7 @@ void m68000_device::movea_l_adr16_ad_dfm() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -41958,7 +41984,6 @@ void m68000_device::movea_l_adr32_ad_dfm() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41966,6 +41991,7 @@ void m68000_device::movea_l_adr32_ad_dfm() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42066,7 +42092,6 @@ void m68000_device::movea_l_dpc_ad_dfm() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42074,6 +42099,7 @@ void m68000_device::movea_l_dpc_ad_dfm() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42212,7 +42238,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42220,6 +42245,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42299,7 +42325,6 @@ void m68000_device::movea_l_imm32_ad_dfm() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -42307,6 +42332,7 @@ void m68000_device::movea_l_imm32_ad_dfm() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42364,7 +42390,6 @@ void m68000_device::move_l_ds_aid_dfm() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42389,6 +42414,7 @@ void m68000_device::move_l_ds_aid_dfm() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42448,7 +42474,6 @@ void m68000_device::move_l_as_aid_dfm() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42473,6 +42498,7 @@ void m68000_device::move_l_as_aid_dfm() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42579,7 +42605,6 @@ void m68000_device::move_l_ais_aid_dfm() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42604,10 +42629,10 @@ void m68000_device::move_l_ais_aid_dfm() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42712,7 +42737,6 @@ void m68000_device::move_l_aips_aid_dfm() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42737,10 +42761,10 @@ void m68000_device::move_l_aips_aid_dfm() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42846,7 +42870,6 @@ void m68000_device::move_l_pais_aid_dfm() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -42871,10 +42894,10 @@ void m68000_device::move_l_pais_aid_dfm() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -42997,7 +43020,6 @@ void m68000_device::move_l_das_aid_dfm() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43022,10 +43044,10 @@ void m68000_device::move_l_das_aid_dfm() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43186,7 +43208,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43211,10 +43232,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43339,7 +43360,6 @@ void m68000_device::move_l_adr16_aid_dfm() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43364,10 +43384,10 @@ void m68000_device::move_l_adr16_aid_dfm() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43513,7 +43533,6 @@ void m68000_device::move_l_adr32_aid_dfm() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43538,10 +43557,10 @@ void m68000_device::move_l_adr32_aid_dfm() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43663,7 +43682,6 @@ void m68000_device::move_l_dpc_aid_dfm() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43688,10 +43706,10 @@ void m68000_device::move_l_dpc_aid_dfm() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43851,7 +43869,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -43876,10 +43893,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -43978,7 +43995,6 @@ void m68000_device::move_l_imm32_aid_dfm() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44003,6 +44019,7 @@ void m68000_device::move_l_imm32_aid_dfm() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44062,7 +44079,6 @@ void m68000_device::move_l_ds_aipd_dfm() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44087,6 +44103,7 @@ void m68000_device::move_l_ds_aipd_dfm() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44146,7 +44163,6 @@ void m68000_device::move_l_as_aipd_dfm() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44171,6 +44187,7 @@ void m68000_device::move_l_as_aipd_dfm() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44277,7 +44294,6 @@ void m68000_device::move_l_ais_aipd_dfm() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44302,6 +44318,7 @@ void m68000_device::move_l_ais_aipd_dfm() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44408,7 +44425,6 @@ void m68000_device::move_l_aips_aipd_dfm() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44433,6 +44449,7 @@ void m68000_device::move_l_aips_aipd_dfm() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44540,7 +44557,6 @@ void m68000_device::move_l_pais_aipd_dfm() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44565,6 +44581,7 @@ void m68000_device::move_l_pais_aipd_dfm() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44689,7 +44706,6 @@ void m68000_device::move_l_das_aipd_dfm() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44714,6 +44730,7 @@ void m68000_device::move_l_das_aipd_dfm() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -44876,7 +44893,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -44901,6 +44917,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45027,7 +45044,6 @@ void m68000_device::move_l_adr16_aipd_dfm() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45052,6 +45068,7 @@ void m68000_device::move_l_adr16_aipd_dfm() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45199,7 +45216,6 @@ void m68000_device::move_l_adr32_aipd_dfm() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45224,6 +45240,7 @@ void m68000_device::move_l_adr32_aipd_dfm() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45347,7 +45364,6 @@ void m68000_device::move_l_dpc_aipd_dfm() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45372,6 +45388,7 @@ void m68000_device::move_l_dpc_aipd_dfm() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45533,7 +45550,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45558,6 +45574,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45658,7 +45675,6 @@ void m68000_device::move_l_imm32_aipd_dfm() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45683,6 +45699,7 @@ void m68000_device::move_l_imm32_aipd_dfm() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45720,7 +45737,6 @@ void m68000_device::move_l_ds_paid_dfm() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45770,6 +45786,7 @@ void m68000_device::move_l_ds_paid_dfm() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45803,7 +45820,6 @@ void m68000_device::move_l_as_paid_dfm() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45853,6 +45869,7 @@ void m68000_device::move_l_as_paid_dfm() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -45931,7 +45948,6 @@ void m68000_device::move_l_ais_paid_dfm() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -45981,6 +45997,7 @@ void m68000_device::move_l_ais_paid_dfm() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46062,7 +46079,6 @@ void m68000_device::move_l_aips_paid_dfm() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46112,6 +46128,7 @@ void m68000_device::move_l_aips_paid_dfm() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46194,7 +46211,6 @@ void m68000_device::move_l_pais_paid_dfm() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46244,6 +46260,7 @@ void m68000_device::move_l_pais_paid_dfm() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46343,7 +46360,6 @@ void m68000_device::move_l_das_paid_dfm() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46393,6 +46409,7 @@ void m68000_device::move_l_das_paid_dfm() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46530,7 +46547,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46580,6 +46596,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46681,7 +46698,6 @@ void m68000_device::move_l_adr16_paid_dfm() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46731,6 +46747,7 @@ void m68000_device::move_l_adr16_paid_dfm() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -46853,7 +46870,6 @@ void m68000_device::move_l_adr32_paid_dfm() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -46903,6 +46919,7 @@ void m68000_device::move_l_adr32_paid_dfm() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47001,7 +47018,6 @@ void m68000_device::move_l_dpc_paid_dfm() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47051,6 +47067,7 @@ void m68000_device::move_l_dpc_paid_dfm() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47187,7 +47204,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47237,6 +47253,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47314,7 +47331,6 @@ void m68000_device::move_l_imm32_paid_dfm() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47364,6 +47380,7 @@ void m68000_device::move_l_imm32_paid_dfm() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47442,7 +47459,6 @@ void m68000_device::move_l_ds_dad_dfm() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47467,6 +47483,7 @@ void m68000_device::move_l_ds_dad_dfm() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47549,7 +47566,6 @@ void m68000_device::move_l_as_dad_dfm() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47574,6 +47590,7 @@ void m68000_device::move_l_as_dad_dfm() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47704,6 +47721,7 @@ void m68000_device::move_l_ais_dad_dfm() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47728,11 +47746,11 @@ void m68000_device::move_l_ais_dad_dfm() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -47861,6 +47879,7 @@ void m68000_device::move_l_aips_dad_dfm() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -47885,11 +47904,11 @@ void m68000_device::move_l_aips_dad_dfm() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48019,6 +48038,7 @@ void m68000_device::move_l_pais_dad_dfm() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48043,11 +48063,11 @@ void m68000_device::move_l_pais_dad_dfm() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48194,6 +48214,7 @@ void m68000_device::move_l_das_dad_dfm() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48218,11 +48239,11 @@ void m68000_device::move_l_das_dad_dfm() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48407,6 +48428,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48431,11 +48453,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48584,6 +48606,7 @@ void m68000_device::move_l_adr16_dad_dfm() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48608,11 +48631,11 @@ void m68000_device::move_l_adr16_dad_dfm() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48782,6 +48805,7 @@ void m68000_device::move_l_adr32_dad_dfm() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48806,11 +48830,11 @@ void m68000_device::move_l_adr32_dad_dfm() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -48956,6 +48980,7 @@ void m68000_device::move_l_dpc_dad_dfm() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -48980,11 +49005,11 @@ void m68000_device::move_l_dpc_dad_dfm() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49168,6 +49193,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49192,11 +49218,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49318,7 +49344,6 @@ void m68000_device::move_l_imm32_dad_dfm() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49343,6 +49368,7 @@ void m68000_device::move_l_imm32_dad_dfm() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49464,7 +49490,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49489,6 +49514,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49610,7 +49636,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49635,6 +49660,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49803,6 +49829,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -49827,11 +49854,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -49998,6 +50025,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50022,11 +50050,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50194,6 +50222,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50218,11 +50247,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50407,6 +50436,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50431,11 +50461,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50658,6 +50688,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50682,11 +50713,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -50873,6 +50904,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -50897,11 +50929,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51109,6 +51141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51133,11 +51166,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51321,6 +51354,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51345,11 +51379,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51571,6 +51605,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51595,11 +51630,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51760,7 +51795,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51785,6 +51819,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51870,6 +51905,7 @@ void m68000_device::move_l_ds_adr16_dfm() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -51894,11 +51930,11 @@ void m68000_device::move_l_ds_adr16_dfm() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -51979,6 +52015,7 @@ void m68000_device::move_l_as_adr16_dfm() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52003,11 +52040,11 @@ void m68000_device::move_l_as_adr16_dfm() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52132,6 +52169,7 @@ void m68000_device::move_l_ais_adr16_dfm() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52156,11 +52194,11 @@ void m68000_device::move_l_ais_adr16_dfm() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52288,6 +52326,7 @@ void m68000_device::move_l_aips_adr16_dfm() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52312,11 +52351,11 @@ void m68000_device::move_l_aips_adr16_dfm() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52445,6 +52484,7 @@ void m68000_device::move_l_pais_adr16_dfm() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52469,11 +52509,11 @@ void m68000_device::move_l_pais_adr16_dfm() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52619,6 +52659,7 @@ void m68000_device::move_l_das_adr16_dfm() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52643,11 +52684,11 @@ void m68000_device::move_l_das_adr16_dfm() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -52831,6 +52872,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -52855,11 +52897,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53007,6 +53049,7 @@ void m68000_device::move_l_adr16_adr16_dfm() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53031,11 +53074,11 @@ void m68000_device::move_l_adr16_adr16_dfm() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53204,6 +53247,7 @@ void m68000_device::move_l_adr32_adr16_dfm() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53228,11 +53272,11 @@ void m68000_device::move_l_adr32_adr16_dfm() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53377,6 +53421,7 @@ void m68000_device::move_l_dpc_adr16_dfm() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53401,11 +53446,11 @@ void m68000_device::move_l_dpc_adr16_dfm() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53588,6 +53633,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53612,11 +53658,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53741,6 +53787,7 @@ void m68000_device::move_l_imm32_adr16_dfm() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53765,11 +53812,11 @@ void m68000_device::move_l_imm32_adr16_dfm() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -53871,6 +53918,7 @@ void m68000_device::move_l_ds_adr32_dfm() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -53895,11 +53943,11 @@ void m68000_device::move_l_ds_adr32_dfm() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54001,6 +54049,7 @@ void m68000_device::move_l_as_adr32_dfm() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54025,11 +54074,11 @@ void m68000_device::move_l_as_adr32_dfm() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54153,7 +54202,6 @@ void m68000_device::move_l_ais_adr32_dfm() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54202,11 +54250,11 @@ void m68000_device::move_l_ais_adr32_dfm() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54333,7 +54381,6 @@ void m68000_device::move_l_aips_adr32_dfm() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54382,11 +54429,11 @@ void m68000_device::move_l_aips_adr32_dfm() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54514,7 +54561,6 @@ void m68000_device::move_l_pais_adr32_dfm() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54563,11 +54609,11 @@ void m68000_device::move_l_pais_adr32_dfm() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54712,7 +54758,6 @@ void m68000_device::move_l_das_adr32_dfm() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54761,11 +54806,11 @@ void m68000_device::move_l_das_adr32_dfm() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -54948,7 +54993,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -54997,11 +55041,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55148,7 +55192,6 @@ void m68000_device::move_l_adr16_adr32_dfm() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55197,11 +55240,11 @@ void m68000_device::move_l_adr16_adr32_dfm() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55369,7 +55412,6 @@ void m68000_device::move_l_adr32_adr32_dfm() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55418,11 +55460,11 @@ void m68000_device::move_l_adr32_adr32_dfm() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55566,7 +55608,6 @@ void m68000_device::move_l_dpc_adr32_dfm() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55615,11 +55656,11 @@ void m68000_device::move_l_dpc_adr32_dfm() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -55801,7 +55842,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -55850,11 +55890,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56000,6 +56040,7 @@ void m68000_device::move_l_imm32_adr32_dfm() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -56024,11 +56065,11 @@ void m68000_device::move_l_imm32_adr32_dfm() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56061,7 +56102,6 @@ void m68000_device::move_w_ds_dd_dfm() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56070,6 +56110,7 @@ void m68000_device::move_w_ds_dd_dfm() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56104,7 +56145,6 @@ void m68000_device::move_w_as_dd_dfm() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56113,6 +56153,7 @@ void m68000_device::move_w_as_dd_dfm() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56171,7 +56212,6 @@ void m68000_device::move_w_ais_dd_dfm() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56180,6 +56220,7 @@ void m68000_device::move_w_ais_dd_dfm() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56240,7 +56281,6 @@ void m68000_device::move_w_aips_dd_dfm() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56249,6 +56289,7 @@ void m68000_device::move_w_aips_dd_dfm() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56311,7 +56352,6 @@ void m68000_device::move_w_pais_dd_dfm() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56320,6 +56360,7 @@ void m68000_device::move_w_pais_dd_dfm() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56398,7 +56439,6 @@ void m68000_device::move_w_das_dd_dfm() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56407,6 +56447,7 @@ void m68000_device::move_w_das_dd_dfm() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56523,7 +56564,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56532,6 +56572,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56609,7 +56650,6 @@ void m68000_device::move_w_adr16_dd_dfm() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56618,6 +56658,7 @@ void m68000_device::move_w_adr16_dd_dfm() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56716,7 +56757,6 @@ void m68000_device::move_w_adr32_dd_dfm() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56725,6 +56765,7 @@ void m68000_device::move_w_adr32_dd_dfm() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56802,7 +56843,6 @@ void m68000_device::move_w_dpc_dd_dfm() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56811,6 +56851,7 @@ void m68000_device::move_w_dpc_dd_dfm() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56926,7 +56967,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56935,6 +56975,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -56990,7 +57031,6 @@ void m68000_device::move_w_imm16_dd_dfm() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -56999,6 +57039,7 @@ void m68000_device::move_w_imm16_dd_dfm() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57033,12 +57074,12 @@ void m68000_device::movea_w_ds_ad_dfm() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57074,12 +57115,12 @@ void m68000_device::movea_w_as_ad_dfm() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57139,12 +57180,12 @@ void m68000_device::movea_w_ais_ad_dfm() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57205,12 +57246,12 @@ void m68000_device::movea_w_aips_ad_dfm() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57273,12 +57314,12 @@ void m68000_device::movea_w_pais_ad_dfm() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57357,12 +57398,12 @@ void m68000_device::movea_w_das_ad_dfm() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57479,12 +57520,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57562,12 +57603,12 @@ void m68000_device::movea_w_adr16_ad_dfm() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57666,12 +57707,12 @@ void m68000_device::movea_w_adr32_ad_dfm() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57749,12 +57790,12 @@ void m68000_device::movea_w_dpc_ad_dfm() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57870,12 +57911,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57931,12 +57972,12 @@ void m68000_device::movea_w_imm16_ad_dfm() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -57972,7 +58013,6 @@ void m68000_device::move_w_ds_aid_dfm() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -57998,10 +58038,10 @@ void m68000_device::move_w_ds_aid_dfm() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58034,7 +58074,6 @@ void m68000_device::move_w_as_aid_dfm() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -58060,10 +58099,10 @@ void m68000_device::move_w_as_aid_dfm() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58144,10 +58183,10 @@ void m68000_device::move_w_ais_aid_dfm() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58232,10 +58271,10 @@ void m68000_device::move_w_aips_aid_dfm() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58322,10 +58361,10 @@ void m68000_device::move_w_pais_aid_dfm() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58428,10 +58467,10 @@ void m68000_device::move_w_das_aid_dfm() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58572,10 +58611,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58677,10 +58716,10 @@ void m68000_device::move_w_adr16_aid_dfm() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58803,10 +58842,10 @@ void m68000_device::move_w_adr32_aid_dfm() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -58908,10 +58947,10 @@ void m68000_device::move_w_dpc_aid_dfm() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59051,10 +59090,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59110,7 +59149,6 @@ void m68000_device::move_w_imm16_aid_dfm() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59136,10 +59174,10 @@ void m68000_device::move_w_imm16_aid_dfm() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59172,7 +59210,6 @@ void m68000_device::move_w_ds_aipd_dfm() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59198,6 +59235,7 @@ void m68000_device::move_w_ds_aipd_dfm() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59232,7 +59270,6 @@ void m68000_device::move_w_as_aipd_dfm() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59258,6 +59295,7 @@ void m68000_device::move_w_as_aipd_dfm() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59316,7 +59354,6 @@ void m68000_device::move_w_ais_aipd_dfm() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59342,6 +59379,7 @@ void m68000_device::move_w_ais_aipd_dfm() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59404,7 +59442,6 @@ void m68000_device::move_w_aips_aipd_dfm() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59430,6 +59467,7 @@ void m68000_device::move_w_aips_aipd_dfm() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59494,7 +59532,6 @@ void m68000_device::move_w_pais_aipd_dfm() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59520,6 +59557,7 @@ void m68000_device::move_w_pais_aipd_dfm() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59600,7 +59638,6 @@ void m68000_device::move_w_das_aipd_dfm() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59626,6 +59663,7 @@ void m68000_device::move_w_das_aipd_dfm() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59744,7 +59782,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59770,6 +59807,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59849,7 +59887,6 @@ void m68000_device::move_w_adr16_aipd_dfm() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -59875,6 +59912,7 @@ void m68000_device::move_w_adr16_aipd_dfm() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -59975,7 +60013,6 @@ void m68000_device::move_w_adr32_aipd_dfm() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60001,6 +60038,7 @@ void m68000_device::move_w_adr32_aipd_dfm() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60080,7 +60118,6 @@ void m68000_device::move_w_dpc_aipd_dfm() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60106,6 +60143,7 @@ void m68000_device::move_w_dpc_aipd_dfm() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60223,7 +60261,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60249,6 +60286,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60306,7 +60344,6 @@ void m68000_device::move_w_imm16_aipd_dfm() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60332,6 +60369,7 @@ void m68000_device::move_w_imm16_aipd_dfm() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60366,7 +60404,6 @@ void m68000_device::move_w_ds_paid_dfm() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60393,6 +60430,7 @@ void m68000_device::move_w_ds_paid_dfm() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60426,7 +60464,6 @@ void m68000_device::move_w_as_paid_dfm() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60453,6 +60490,7 @@ void m68000_device::move_w_as_paid_dfm() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60510,7 +60548,6 @@ void m68000_device::move_w_ais_paid_dfm() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60537,6 +60574,7 @@ void m68000_device::move_w_ais_paid_dfm() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60598,7 +60636,6 @@ void m68000_device::move_w_aips_paid_dfm() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60625,6 +60662,7 @@ void m68000_device::move_w_aips_paid_dfm() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60688,7 +60726,6 @@ void m68000_device::move_w_pais_paid_dfm() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60715,6 +60752,7 @@ void m68000_device::move_w_pais_paid_dfm() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60794,7 +60832,6 @@ void m68000_device::move_w_das_paid_dfm() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60821,6 +60858,7 @@ void m68000_device::move_w_das_paid_dfm() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -60938,7 +60976,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -60965,6 +61002,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61043,7 +61081,6 @@ void m68000_device::move_w_adr16_paid_dfm() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61070,6 +61107,7 @@ void m68000_device::move_w_adr16_paid_dfm() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61169,7 +61207,6 @@ void m68000_device::move_w_adr32_paid_dfm() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61196,6 +61233,7 @@ void m68000_device::move_w_adr32_paid_dfm() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61274,7 +61312,6 @@ void m68000_device::move_w_dpc_paid_dfm() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61301,6 +61338,7 @@ void m68000_device::move_w_dpc_paid_dfm() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61417,7 +61455,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61444,6 +61481,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61500,7 +61538,6 @@ void m68000_device::move_w_imm16_paid_dfm() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61527,6 +61564,7 @@ void m68000_device::move_w_imm16_paid_dfm() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61581,7 +61619,6 @@ void m68000_device::move_w_ds_dad_dfm() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61606,11 +61643,11 @@ void m68000_device::move_w_ds_dad_dfm() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61664,7 +61701,6 @@ void m68000_device::move_w_as_dad_dfm() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61689,11 +61725,11 @@ void m68000_device::move_w_as_dad_dfm() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61774,6 +61810,7 @@ void m68000_device::move_w_ais_dad_dfm() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61798,11 +61835,11 @@ void m68000_device::move_w_ais_dad_dfm() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -61887,6 +61924,7 @@ void m68000_device::move_w_aips_dad_dfm() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -61911,11 +61949,11 @@ void m68000_device::move_w_aips_dad_dfm() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62002,6 +62040,7 @@ void m68000_device::move_w_pais_dad_dfm() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62026,11 +62065,11 @@ void m68000_device::move_w_pais_dad_dfm() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62133,6 +62172,7 @@ void m68000_device::move_w_das_dad_dfm() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62157,11 +62197,11 @@ void m68000_device::move_w_das_dad_dfm() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62302,6 +62342,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62326,11 +62367,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62432,6 +62473,7 @@ void m68000_device::move_w_adr16_dad_dfm() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62456,11 +62498,11 @@ void m68000_device::move_w_adr16_dad_dfm() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62583,6 +62625,7 @@ void m68000_device::move_w_adr32_dad_dfm() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62607,11 +62650,11 @@ void m68000_device::move_w_adr32_dad_dfm() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62713,6 +62756,7 @@ void m68000_device::move_w_dpc_dad_dfm() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62737,11 +62781,11 @@ void m68000_device::move_w_dpc_dad_dfm() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62881,6 +62925,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -62905,11 +62950,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -62986,7 +63031,6 @@ void m68000_device::move_w_imm16_dad_dfm() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63011,11 +63055,11 @@ void m68000_device::move_w_imm16_dad_dfm() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63108,7 +63152,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63133,11 +63176,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63230,7 +63273,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63255,11 +63297,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63378,6 +63420,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63402,11 +63445,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63529,6 +63572,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63553,11 +63597,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63682,6 +63726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63706,11 +63751,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -63851,6 +63896,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -63875,11 +63921,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64058,6 +64104,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64082,11 +64129,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64226,6 +64273,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64250,11 +64298,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64415,6 +64463,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64439,11 +64488,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64583,6 +64632,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64607,11 +64657,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64789,6 +64839,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64813,11 +64864,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -64933,7 +64984,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -64958,11 +65008,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65019,6 +65069,7 @@ void m68000_device::move_w_ds_adr16_dfm() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65043,11 +65094,11 @@ void m68000_device::move_w_ds_adr16_dfm() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65104,6 +65155,7 @@ void m68000_device::move_w_as_adr16_dfm() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65128,11 +65180,11 @@ void m68000_device::move_w_as_adr16_dfm() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65212,6 +65264,7 @@ void m68000_device::move_w_ais_adr16_dfm() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65236,11 +65289,11 @@ void m68000_device::move_w_ais_adr16_dfm() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65324,6 +65377,7 @@ void m68000_device::move_w_aips_adr16_dfm() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65348,11 +65402,11 @@ void m68000_device::move_w_aips_adr16_dfm() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65438,6 +65492,7 @@ void m68000_device::move_w_pais_adr16_dfm() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65462,11 +65517,11 @@ void m68000_device::move_w_pais_adr16_dfm() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65568,6 +65623,7 @@ void m68000_device::move_w_das_adr16_dfm() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65592,11 +65648,11 @@ void m68000_device::move_w_das_adr16_dfm() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65736,6 +65792,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65760,11 +65817,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -65865,6 +65922,7 @@ void m68000_device::move_w_adr16_adr16_dfm() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -65889,11 +65947,11 @@ void m68000_device::move_w_adr16_adr16_dfm() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66015,6 +66073,7 @@ void m68000_device::move_w_adr32_adr16_dfm() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66039,11 +66098,11 @@ void m68000_device::move_w_adr32_adr16_dfm() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66144,6 +66203,7 @@ void m68000_device::move_w_dpc_adr16_dfm() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66168,11 +66228,11 @@ void m68000_device::move_w_dpc_adr16_dfm() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66311,6 +66371,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66335,11 +66396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66419,6 +66480,7 @@ void m68000_device::move_w_imm16_adr16_dfm() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66443,11 +66505,11 @@ void m68000_device::move_w_imm16_adr16_dfm() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66525,6 +66587,7 @@ void m68000_device::move_w_ds_adr32_dfm() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66549,11 +66612,11 @@ void m68000_device::move_w_ds_adr32_dfm() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66631,6 +66694,7 @@ void m68000_device::move_w_as_adr32_dfm() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66655,11 +66719,11 @@ void m68000_device::move_w_as_adr32_dfm() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66739,7 +66803,6 @@ void m68000_device::move_w_ais_adr32_dfm() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66785,11 +66848,11 @@ void m68000_device::move_w_ais_adr32_dfm() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -66873,7 +66936,6 @@ void m68000_device::move_w_aips_adr32_dfm() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -66919,11 +66981,11 @@ void m68000_device::move_w_aips_adr32_dfm() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67009,7 +67071,6 @@ void m68000_device::move_w_pais_adr32_dfm() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67055,11 +67116,11 @@ void m68000_device::move_w_pais_adr32_dfm() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67161,7 +67222,6 @@ void m68000_device::move_w_das_adr32_dfm() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67207,11 +67267,11 @@ void m68000_device::move_w_das_adr32_dfm() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67351,7 +67411,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67397,11 +67456,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67502,7 +67561,6 @@ void m68000_device::move_w_adr16_adr32_dfm() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67548,11 +67606,11 @@ void m68000_device::move_w_adr16_adr32_dfm() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67674,7 +67732,6 @@ void m68000_device::move_w_adr32_adr32_dfm() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67720,11 +67777,11 @@ void m68000_device::move_w_adr32_adr32_dfm() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -67825,7 +67882,6 @@ void m68000_device::move_w_dpc_adr32_dfm() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -67871,11 +67927,11 @@ void m68000_device::move_w_dpc_adr32_dfm() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68014,7 +68070,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -68060,11 +68115,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68165,6 +68220,7 @@ void m68000_device::move_w_imm16_adr32_dfm() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -68189,11 +68245,11 @@ void m68000_device::move_w_imm16_adr32_dfm() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68225,7 +68281,6 @@ void m68000_device::negx_b_ds_dfm() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68233,6 +68288,7 @@ void m68000_device::negx_b_ds_dfm() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68287,7 +68343,6 @@ void m68000_device::negx_b_ais_dfm() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68314,6 +68369,7 @@ void m68000_device::negx_b_ais_dfm() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68365,7 +68421,6 @@ void m68000_device::negx_b_aips_dfm() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68392,6 +68447,7 @@ void m68000_device::negx_b_aips_dfm() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68445,7 +68501,6 @@ void m68000_device::negx_b_pais_dfm() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68472,6 +68527,7 @@ void m68000_device::negx_b_pais_dfm() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68541,7 +68597,6 @@ void m68000_device::negx_b_das_dfm() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68568,6 +68623,7 @@ void m68000_device::negx_b_das_dfm() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68675,7 +68731,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68702,6 +68757,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68770,7 +68826,6 @@ void m68000_device::negx_b_adr16_dfm() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68797,6 +68852,7 @@ void m68000_device::negx_b_adr16_dfm() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68886,7 +68942,6 @@ void m68000_device::negx_b_adr32_dfm() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -68913,6 +68968,7 @@ void m68000_device::negx_b_adr32_dfm() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68939,7 +68995,6 @@ void m68000_device::negx_w_ds_dfm() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68947,6 +69002,7 @@ void m68000_device::negx_w_ds_dfm() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69004,7 +69060,6 @@ void m68000_device::negx_w_ais_dfm() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69031,6 +69086,7 @@ void m68000_device::negx_w_ais_dfm() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69090,7 +69146,6 @@ void m68000_device::negx_w_aips_dfm() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69117,6 +69172,7 @@ void m68000_device::negx_w_aips_dfm() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69178,7 +69234,6 @@ void m68000_device::negx_w_pais_dfm() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69205,6 +69260,7 @@ void m68000_device::negx_w_pais_dfm() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69282,7 +69338,6 @@ void m68000_device::negx_w_das_dfm() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69309,6 +69364,7 @@ void m68000_device::negx_w_das_dfm() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69424,7 +69480,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69451,6 +69506,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69527,7 +69583,6 @@ void m68000_device::negx_w_adr16_dfm() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69554,6 +69609,7 @@ void m68000_device::negx_w_adr16_dfm() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69651,7 +69707,6 @@ void m68000_device::negx_w_adr32_dfm() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69678,6 +69733,7 @@ void m68000_device::negx_w_adr32_dfm() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69709,7 +69765,6 @@ void m68000_device::negx_l_ds_dfm() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -69740,6 +69795,7 @@ void m68000_device::negx_l_ds_dfm() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -69801,7 +69857,6 @@ void m68000_device::negx_l_ais_dfm() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69851,6 +69906,7 @@ void m68000_device::negx_l_ais_dfm() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -69930,7 +69986,6 @@ void m68000_device::negx_l_aips_dfm() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -69980,6 +70035,7 @@ void m68000_device::negx_l_aips_dfm() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70060,7 +70116,6 @@ void m68000_device::negx_l_pais_dfm() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70110,6 +70165,7 @@ void m68000_device::negx_l_pais_dfm() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70207,7 +70263,6 @@ void m68000_device::negx_l_das_dfm() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70257,6 +70312,7 @@ void m68000_device::negx_l_das_dfm() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70392,7 +70448,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70442,6 +70497,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70541,7 +70597,6 @@ void m68000_device::negx_l_adr16_dfm() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70591,6 +70646,7 @@ void m68000_device::negx_l_adr16_dfm() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70711,7 +70767,6 @@ void m68000_device::negx_l_adr32_dfm() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -70761,6 +70816,7 @@ void m68000_device::negx_l_adr32_dfm() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70792,7 +70848,6 @@ void m68000_device::move_sr_ds_dfm() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -70817,6 +70872,7 @@ void m68000_device::move_sr_ds_dfm() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -70856,7 +70912,6 @@ void m68000_device::move_sr_ais_dfm() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70884,6 +70939,7 @@ void m68000_device::move_sr_ais_dfm() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -70943,7 +70999,6 @@ void m68000_device::move_sr_aips_dfm() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70971,6 +71026,7 @@ void m68000_device::move_sr_aips_dfm() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71032,7 +71088,6 @@ void m68000_device::move_sr_pais_dfm() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71060,6 +71115,7 @@ void m68000_device::move_sr_pais_dfm() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71137,7 +71193,6 @@ void m68000_device::move_sr_das_dfm() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71165,6 +71220,7 @@ void m68000_device::move_sr_das_dfm() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71280,7 +71336,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71308,6 +71363,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71384,7 +71440,6 @@ void m68000_device::move_sr_adr16_dfm() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71412,6 +71467,7 @@ void m68000_device::move_sr_adr16_dfm() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71509,7 +71565,6 @@ void m68000_device::move_sr_adr32_dfm() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71537,6 +71592,7 @@ void m68000_device::move_sr_adr32_dfm() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -71734,7 +71790,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71749,6 +71804,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -71776,7 +71832,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71978,7 +72033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71993,6 +72047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72020,7 +72075,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72226,7 +72280,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72241,6 +72294,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72268,7 +72322,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72476,7 +72529,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72491,6 +72543,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72518,7 +72571,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72742,7 +72794,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72757,6 +72808,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -72784,7 +72836,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73046,7 +73097,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73061,6 +73111,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73088,7 +73139,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73311,7 +73361,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73326,6 +73375,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73353,7 +73403,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73597,7 +73646,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73612,6 +73660,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73639,7 +73688,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73862,7 +73910,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73877,6 +73924,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -73904,7 +73952,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74165,7 +74212,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74180,6 +74226,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74207,7 +74254,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74408,7 +74454,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74423,6 +74468,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74450,7 +74496,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74463,13 +74508,13 @@ void m68000_device::lea_ais_ad_dfm() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74527,11 +74572,11 @@ void m68000_device::lea_das_ad_dfm() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74627,11 +74672,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74684,11 +74729,11 @@ void m68000_device::lea_adr16_ad_dfm() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74764,11 +74809,11 @@ void m68000_device::lea_adr32_ad_dfm() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74823,11 +74868,11 @@ void m68000_device::lea_dpc_ad_dfm() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74922,11 +74967,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -74958,7 +75003,6 @@ void m68000_device::clr_b_ds_dfm() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -74966,6 +75010,7 @@ void m68000_device::clr_b_ds_dfm() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75022,7 +75067,6 @@ void m68000_device::clr_b_ais_dfm() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75049,6 +75093,7 @@ void m68000_device::clr_b_ais_dfm() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75103,7 +75148,6 @@ void m68000_device::clr_b_aips_dfm() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75130,6 +75174,7 @@ void m68000_device::clr_b_aips_dfm() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75186,7 +75231,6 @@ void m68000_device::clr_b_pais_dfm() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75213,6 +75257,7 @@ void m68000_device::clr_b_pais_dfm() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75285,7 +75330,6 @@ void m68000_device::clr_b_das_dfm() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75312,6 +75356,7 @@ void m68000_device::clr_b_das_dfm() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75424,7 +75469,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75451,6 +75495,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75522,7 +75567,6 @@ void m68000_device::clr_b_adr16_dfm() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75549,6 +75593,7 @@ void m68000_device::clr_b_adr16_dfm() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75642,7 +75687,6 @@ void m68000_device::clr_b_adr32_dfm() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75669,6 +75713,7 @@ void m68000_device::clr_b_adr32_dfm() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75696,7 +75741,6 @@ void m68000_device::clr_w_ds_dfm() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -75704,6 +75748,7 @@ void m68000_device::clr_w_ds_dfm() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75763,7 +75808,6 @@ void m68000_device::clr_w_ais_dfm() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75790,6 +75834,7 @@ void m68000_device::clr_w_ais_dfm() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -75852,7 +75897,6 @@ void m68000_device::clr_w_aips_dfm() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75879,6 +75923,7 @@ void m68000_device::clr_w_aips_dfm() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -75943,7 +75988,6 @@ void m68000_device::clr_w_pais_dfm() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -75970,6 +76014,7 @@ void m68000_device::clr_w_pais_dfm() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76050,7 +76095,6 @@ void m68000_device::clr_w_das_dfm() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76077,6 +76121,7 @@ void m68000_device::clr_w_das_dfm() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76197,7 +76242,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76224,6 +76268,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76303,7 +76348,6 @@ void m68000_device::clr_w_adr16_dfm() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76330,6 +76374,7 @@ void m68000_device::clr_w_adr16_dfm() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76431,7 +76476,6 @@ void m68000_device::clr_w_adr32_dfm() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76458,6 +76502,7 @@ void m68000_device::clr_w_adr32_dfm() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76490,7 +76535,6 @@ void m68000_device::clr_l_ds_dfm() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -76521,6 +76565,7 @@ void m68000_device::clr_l_ds_dfm() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -76584,7 +76629,6 @@ void m68000_device::clr_l_ais_dfm() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76634,6 +76678,7 @@ void m68000_device::clr_l_ais_dfm() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76716,7 +76761,6 @@ void m68000_device::clr_l_aips_dfm() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76766,6 +76810,7 @@ void m68000_device::clr_l_aips_dfm() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76849,7 +76894,6 @@ void m68000_device::clr_l_pais_dfm() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -76899,6 +76943,7 @@ void m68000_device::clr_l_pais_dfm() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -76999,7 +77044,6 @@ void m68000_device::clr_l_das_dfm() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77049,6 +77093,7 @@ void m68000_device::clr_l_das_dfm() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77189,7 +77234,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77239,6 +77283,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77342,7 +77387,6 @@ void m68000_device::clr_l_adr16_dfm() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77392,6 +77436,7 @@ void m68000_device::clr_l_adr16_dfm() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77517,7 +77562,6 @@ void m68000_device::clr_l_adr32_dfm() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77567,6 +77611,7 @@ void m68000_device::clr_l_adr32_dfm() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -77599,7 +77644,6 @@ void m68000_device::neg_b_ds_dfm() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -77607,6 +77651,7 @@ void m68000_device::neg_b_ds_dfm() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77661,7 +77706,6 @@ void m68000_device::neg_b_ais_dfm() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77688,6 +77732,7 @@ void m68000_device::neg_b_ais_dfm() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77739,7 +77784,6 @@ void m68000_device::neg_b_aips_dfm() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77766,6 +77810,7 @@ void m68000_device::neg_b_aips_dfm() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77819,7 +77864,6 @@ void m68000_device::neg_b_pais_dfm() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77846,6 +77890,7 @@ void m68000_device::neg_b_pais_dfm() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77915,7 +77960,6 @@ void m68000_device::neg_b_das_dfm() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -77942,6 +77986,7 @@ void m68000_device::neg_b_das_dfm() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78049,7 +78094,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78076,6 +78120,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78144,7 +78189,6 @@ void m68000_device::neg_b_adr16_dfm() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78171,6 +78215,7 @@ void m68000_device::neg_b_adr16_dfm() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78260,7 +78305,6 @@ void m68000_device::neg_b_adr32_dfm() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78287,6 +78331,7 @@ void m68000_device::neg_b_adr32_dfm() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78313,7 +78358,6 @@ void m68000_device::neg_w_ds_dfm() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -78321,6 +78365,7 @@ void m68000_device::neg_w_ds_dfm() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78378,7 +78423,6 @@ void m68000_device::neg_w_ais_dfm() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78405,6 +78449,7 @@ void m68000_device::neg_w_ais_dfm() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78464,7 +78509,6 @@ void m68000_device::neg_w_aips_dfm() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78491,6 +78535,7 @@ void m68000_device::neg_w_aips_dfm() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78552,7 +78597,6 @@ void m68000_device::neg_w_pais_dfm() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78579,6 +78623,7 @@ void m68000_device::neg_w_pais_dfm() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78656,7 +78701,6 @@ void m68000_device::neg_w_das_dfm() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78683,6 +78727,7 @@ void m68000_device::neg_w_das_dfm() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78798,7 +78843,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78825,6 +78869,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -78901,7 +78946,6 @@ void m68000_device::neg_w_adr16_dfm() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -78928,6 +78972,7 @@ void m68000_device::neg_w_adr16_dfm() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79025,7 +79070,6 @@ void m68000_device::neg_w_adr32_dfm() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79052,6 +79096,7 @@ void m68000_device::neg_w_adr32_dfm() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79083,7 +79128,6 @@ void m68000_device::neg_l_ds_dfm() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -79114,6 +79158,7 @@ void m68000_device::neg_l_ds_dfm() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79175,7 +79220,6 @@ void m68000_device::neg_l_ais_dfm() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79225,6 +79269,7 @@ void m68000_device::neg_l_ais_dfm() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79304,7 +79349,6 @@ void m68000_device::neg_l_aips_dfm() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79354,6 +79398,7 @@ void m68000_device::neg_l_aips_dfm() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79434,7 +79479,6 @@ void m68000_device::neg_l_pais_dfm() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79484,6 +79528,7 @@ void m68000_device::neg_l_pais_dfm() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79581,7 +79626,6 @@ void m68000_device::neg_l_das_dfm() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79631,6 +79675,7 @@ void m68000_device::neg_l_das_dfm() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79766,7 +79811,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79816,6 +79860,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -79915,7 +79960,6 @@ void m68000_device::neg_l_adr16_dfm() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -79965,6 +80009,7 @@ void m68000_device::neg_l_adr16_dfm() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -80085,7 +80130,6 @@ void m68000_device::neg_l_adr32_dfm() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80135,6 +80179,7 @@ void m68000_device::neg_l_adr32_dfm() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -80198,11 +80243,11 @@ void m68000_device::move_ds_ccr_dfm() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80290,11 +80335,11 @@ void m68000_device::move_ais_ccr_dfm() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80386,11 +80431,11 @@ void m68000_device::move_aips_ccr_dfm() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80484,11 +80529,11 @@ void m68000_device::move_pais_ccr_dfm() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80598,11 +80643,11 @@ void m68000_device::move_das_ccr_dfm() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80750,11 +80795,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80863,11 +80908,11 @@ void m68000_device::move_adr16_ccr_dfm() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -80997,11 +81042,11 @@ void m68000_device::move_adr32_ccr_dfm() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81110,11 +81155,11 @@ void m68000_device::move_dpc_ccr_dfm() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81261,11 +81306,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81352,11 +81397,11 @@ void m68000_device::move_imm8_ccr_dfm() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81388,7 +81433,6 @@ void m68000_device::not_b_ds_dfm() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -81396,6 +81440,7 @@ void m68000_device::not_b_ds_dfm() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81450,7 +81495,6 @@ void m68000_device::not_b_ais_dfm() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81477,6 +81521,7 @@ void m68000_device::not_b_ais_dfm() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81528,7 +81573,6 @@ void m68000_device::not_b_aips_dfm() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81555,6 +81599,7 @@ void m68000_device::not_b_aips_dfm() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81608,7 +81653,6 @@ void m68000_device::not_b_pais_dfm() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81635,6 +81679,7 @@ void m68000_device::not_b_pais_dfm() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81704,7 +81749,6 @@ void m68000_device::not_b_das_dfm() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81731,6 +81775,7 @@ void m68000_device::not_b_das_dfm() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81838,7 +81883,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81865,6 +81909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81933,7 +81978,6 @@ void m68000_device::not_b_adr16_dfm() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -81960,6 +82004,7 @@ void m68000_device::not_b_adr16_dfm() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82049,7 +82094,6 @@ void m68000_device::not_b_adr32_dfm() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82076,6 +82120,7 @@ void m68000_device::not_b_adr32_dfm() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82102,7 +82147,6 @@ void m68000_device::not_w_ds_dfm() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82110,6 +82154,7 @@ void m68000_device::not_w_ds_dfm() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82167,7 +82212,6 @@ void m68000_device::not_w_ais_dfm() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82194,6 +82238,7 @@ void m68000_device::not_w_ais_dfm() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82253,7 +82298,6 @@ void m68000_device::not_w_aips_dfm() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82280,6 +82324,7 @@ void m68000_device::not_w_aips_dfm() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82341,7 +82386,6 @@ void m68000_device::not_w_pais_dfm() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82368,6 +82412,7 @@ void m68000_device::not_w_pais_dfm() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82445,7 +82490,6 @@ void m68000_device::not_w_das_dfm() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82472,6 +82516,7 @@ void m68000_device::not_w_das_dfm() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82587,7 +82632,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82614,6 +82658,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82690,7 +82735,6 @@ void m68000_device::not_w_adr16_dfm() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82717,6 +82761,7 @@ void m68000_device::not_w_adr16_dfm() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82814,7 +82859,6 @@ void m68000_device::not_w_adr32_dfm() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -82841,6 +82885,7 @@ void m68000_device::not_w_adr32_dfm() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -82872,7 +82917,6 @@ void m68000_device::not_l_ds_dfm() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82903,6 +82947,7 @@ void m68000_device::not_l_ds_dfm() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -82964,7 +83009,6 @@ void m68000_device::not_l_ais_dfm() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83014,6 +83058,7 @@ void m68000_device::not_l_ais_dfm() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83093,7 +83138,6 @@ void m68000_device::not_l_aips_dfm() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83143,6 +83187,7 @@ void m68000_device::not_l_aips_dfm() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83223,7 +83268,6 @@ void m68000_device::not_l_pais_dfm() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83273,6 +83317,7 @@ void m68000_device::not_l_pais_dfm() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83370,7 +83415,6 @@ void m68000_device::not_l_das_dfm() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83420,6 +83464,7 @@ void m68000_device::not_l_das_dfm() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83555,7 +83600,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83605,6 +83649,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83704,7 +83749,6 @@ void m68000_device::not_l_adr16_dfm() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83754,6 +83798,7 @@ void m68000_device::not_l_adr16_dfm() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83874,7 +83919,6 @@ void m68000_device::not_l_adr32_dfm() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -83924,6 +83968,7 @@ void m68000_device::not_l_adr32_dfm() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -83993,11 +84038,11 @@ void m68000_device::move_ds_sr_dfm() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84091,11 +84136,11 @@ void m68000_device::move_ais_sr_dfm() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84193,11 +84238,11 @@ void m68000_device::move_aips_sr_dfm() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84297,11 +84342,11 @@ void m68000_device::move_pais_sr_dfm() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84417,11 +84462,11 @@ void m68000_device::move_das_sr_dfm() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84575,11 +84620,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84694,11 +84739,11 @@ void m68000_device::move_adr16_sr_dfm() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84834,11 +84879,11 @@ void m68000_device::move_adr32_sr_dfm() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -84953,11 +84998,11 @@ void m68000_device::move_dpc_sr_dfm() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -85110,11 +85155,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -85207,11 +85252,11 @@ void m68000_device::move_i16u_sr_dfm() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -85243,7 +85288,6 @@ void m68000_device::nbcd_b_ds_dfm() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -85272,6 +85316,7 @@ void m68000_device::nbcd_b_ds_dfm() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -85309,7 +85354,6 @@ void m68000_device::nbcd_b_ais_dfm() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85338,6 +85382,7 @@ void m68000_device::nbcd_b_ais_dfm() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85389,7 +85434,6 @@ void m68000_device::nbcd_b_aips_dfm() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85418,6 +85462,7 @@ void m68000_device::nbcd_b_aips_dfm() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85471,7 +85516,6 @@ void m68000_device::nbcd_b_pais_dfm() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85500,6 +85544,7 @@ void m68000_device::nbcd_b_pais_dfm() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85569,7 +85614,6 @@ void m68000_device::nbcd_b_das_dfm() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85598,6 +85642,7 @@ void m68000_device::nbcd_b_das_dfm() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85705,7 +85750,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85734,6 +85778,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85802,7 +85847,6 @@ void m68000_device::nbcd_b_adr16_dfm() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85831,6 +85875,7 @@ void m68000_device::nbcd_b_adr16_dfm() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85920,7 +85965,6 @@ void m68000_device::nbcd_b_adr32_dfm() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85949,6 +85993,7 @@ void m68000_device::nbcd_b_adr32_dfm() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85975,7 +86020,6 @@ void m68000_device::swap_ds_dfm() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -85984,6 +86028,7 @@ void m68000_device::swap_ds_dfm() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86020,7 +86065,6 @@ void m68000_device::pea_ais_dfm() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86068,6 +86112,7 @@ void m68000_device::pea_ais_dfm() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86123,7 +86168,6 @@ void m68000_device::pea_das_dfm() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86173,6 +86217,7 @@ void m68000_device::pea_das_dfm() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86262,7 +86307,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86314,6 +86358,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86387,6 +86432,7 @@ void m68000_device::pea_adr16_dfm() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86411,11 +86457,11 @@ void m68000_device::pea_adr16_dfm() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86510,6 +86556,7 @@ void m68000_device::pea_adr32_dfm() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86534,11 +86581,11 @@ void m68000_device::pea_adr32_dfm() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86593,7 +86640,6 @@ void m68000_device::pea_dpc_dfm() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86643,6 +86689,7 @@ void m68000_device::pea_dpc_dfm() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86731,7 +86778,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86783,6 +86829,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -86814,7 +86861,6 @@ void m68000_device::ext_w_ds_dfm() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -86822,6 +86868,7 @@ void m68000_device::ext_w_ds_dfm() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -86914,10 +86961,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87010,11 +87057,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87128,10 +87175,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87283,10 +87330,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87400,10 +87447,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87538,10 +87585,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87573,7 +87620,6 @@ void m68000_device::ext_l_ds_dfm() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -87581,6 +87627,7 @@ void m68000_device::ext_l_ds_dfm() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87693,10 +87740,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87810,11 +87857,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -87948,10 +87995,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88123,10 +88170,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88260,10 +88307,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88418,10 +88465,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88453,7 +88500,6 @@ void m68000_device::tst_b_ds_dfm() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -88462,6 +88508,7 @@ void m68000_device::tst_b_ds_dfm() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88516,7 +88563,6 @@ void m68000_device::tst_b_ais_dfm() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88524,6 +88570,7 @@ void m68000_device::tst_b_ais_dfm() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88583,7 +88630,6 @@ void m68000_device::tst_b_aips_dfm() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88591,6 +88637,7 @@ void m68000_device::tst_b_aips_dfm() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88652,7 +88699,6 @@ void m68000_device::tst_b_pais_dfm() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88660,6 +88706,7 @@ void m68000_device::tst_b_pais_dfm() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88737,7 +88784,6 @@ void m68000_device::tst_b_das_dfm() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88745,6 +88791,7 @@ void m68000_device::tst_b_das_dfm() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88862,7 +88909,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88870,6 +88916,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -88946,7 +88993,6 @@ void m68000_device::tst_b_adr16_dfm() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88954,6 +89000,7 @@ void m68000_device::tst_b_adr16_dfm() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89052,7 +89099,6 @@ void m68000_device::tst_b_adr32_dfm() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89060,6 +89106,7 @@ void m68000_device::tst_b_adr32_dfm() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89092,7 +89139,6 @@ void m68000_device::tst_w_ds_dfm() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89101,6 +89147,7 @@ void m68000_device::tst_w_ds_dfm() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89158,7 +89205,6 @@ void m68000_device::tst_w_ais_dfm() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89166,6 +89212,7 @@ void m68000_device::tst_w_ais_dfm() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89228,7 +89275,6 @@ void m68000_device::tst_w_aips_dfm() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89236,6 +89282,7 @@ void m68000_device::tst_w_aips_dfm() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89300,7 +89347,6 @@ void m68000_device::tst_w_pais_dfm() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89308,6 +89354,7 @@ void m68000_device::tst_w_pais_dfm() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89388,7 +89435,6 @@ void m68000_device::tst_w_das_dfm() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89396,6 +89442,7 @@ void m68000_device::tst_w_das_dfm() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89516,7 +89563,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89524,6 +89570,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89603,7 +89650,6 @@ void m68000_device::tst_w_adr16_dfm() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89611,6 +89657,7 @@ void m68000_device::tst_w_adr16_dfm() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89712,7 +89759,6 @@ void m68000_device::tst_w_adr32_dfm() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89720,6 +89766,7 @@ void m68000_device::tst_w_adr32_dfm() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89752,7 +89799,6 @@ void m68000_device::tst_l_ds_dfm() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89761,6 +89807,7 @@ void m68000_device::tst_l_ds_dfm() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89841,7 +89888,6 @@ void m68000_device::tst_l_ais_dfm() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89849,6 +89895,7 @@ void m68000_device::tst_l_ais_dfm() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -89933,7 +89980,6 @@ void m68000_device::tst_l_aips_dfm() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89941,6 +89987,7 @@ void m68000_device::tst_l_aips_dfm() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90026,7 +90073,6 @@ void m68000_device::tst_l_pais_dfm() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90034,6 +90080,7 @@ void m68000_device::tst_l_pais_dfm() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90136,7 +90183,6 @@ void m68000_device::tst_l_das_dfm() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90144,6 +90190,7 @@ void m68000_device::tst_l_das_dfm() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90286,7 +90333,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90294,6 +90340,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90399,7 +90446,6 @@ void m68000_device::tst_l_adr16_dfm() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90407,6 +90453,7 @@ void m68000_device::tst_l_adr16_dfm() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90534,7 +90581,6 @@ void m68000_device::tst_l_adr32_dfm() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90542,6 +90588,7 @@ void m68000_device::tst_l_adr32_dfm() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90576,13 +90623,13 @@ void m68000_device::tas_ds_dfm() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90668,12 +90715,12 @@ void m68000_device::tas_ais_dfm() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90760,12 +90807,12 @@ void m68000_device::tas_aips_dfm() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90854,12 +90901,12 @@ void m68000_device::tas_pais_dfm() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -90964,12 +91011,12 @@ void m68000_device::tas_das_dfm() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91114,12 +91161,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91223,12 +91270,12 @@ void m68000_device::tas_adr16_dfm() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91354,12 +91401,12 @@ void m68000_device::tas_adr32_dfm() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91473,10 +91520,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91531,7 +91578,6 @@ void m68000_device::movem_w_aips_list_dfm() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); @@ -91594,6 +91640,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91729,10 +91776,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -91905,10 +91952,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92042,10 +92089,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92203,10 +92250,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92341,10 +92388,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92516,10 +92563,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92653,10 +92700,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92711,7 +92758,6 @@ void m68000_device::movem_l_aips_list_dfm() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); @@ -92795,6 +92841,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -92951,10 +92998,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93148,10 +93195,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93306,10 +93353,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93488,10 +93535,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93647,10 +93694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -93843,10 +93890,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94022,11 +94069,11 @@ void m68000_device::trap_imm4_dfm() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94084,7 +94131,6 @@ void m68000_device::link_as_imm16_dfm() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -94127,6 +94173,7 @@ void m68000_device::link_as_imm16_dfm() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94183,7 +94230,6 @@ void m68000_device::unlk_as_dfm() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94209,6 +94255,7 @@ void m68000_device::unlk_as_dfm() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94245,13 +94292,13 @@ void m68000_device::move_as_usp_dfm() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94289,13 +94336,13 @@ void m68000_device::move_usp_as_dfm() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94331,6 +94378,7 @@ void m68000_device::reset_dfm() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94340,7 +94388,6 @@ void m68000_device::reset_dfm() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -94361,6 +94408,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94392,11 +94440,11 @@ void m68000_device::nop_dfm() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94430,6 +94478,7 @@ void m68000_device::stop_i16u_dfm() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94439,6 +94488,7 @@ void m68000_device::stop_i16u_dfm() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -94551,11 +94601,11 @@ void m68000_device::rte_dfm() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94650,11 +94700,11 @@ void m68000_device::rts_dfm() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94685,7 +94735,6 @@ void m68000_device::trapv_dfm() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -94696,6 +94745,7 @@ void m68000_device::trapv_dfm() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -94882,11 +94932,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95007,11 +95057,11 @@ void m68000_device::rtr_dfm() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95085,7 +95135,6 @@ void m68000_device::jsr_ais_dfm() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95107,11 +95156,11 @@ void m68000_device::jsr_ais_dfm() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95191,7 +95240,6 @@ void m68000_device::jsr_das_dfm() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95213,11 +95261,11 @@ void m68000_device::jsr_das_dfm() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95317,7 +95365,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95339,11 +95386,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95419,7 +95466,6 @@ void m68000_device::jsr_adr16_dfm() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95441,11 +95487,11 @@ void m68000_device::jsr_adr16_dfm() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95540,7 +95586,6 @@ void m68000_device::jsr_adr32_dfm() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95562,11 +95607,11 @@ void m68000_device::jsr_adr32_dfm() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95645,7 +95690,6 @@ void m68000_device::jsr_dpc_dfm() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95667,11 +95711,11 @@ void m68000_device::jsr_dpc_dfm() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95770,7 +95814,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -95792,11 +95835,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95848,11 +95891,11 @@ void m68000_device::jmp_ais_dfm() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95908,11 +95951,11 @@ void m68000_device::jmp_das_dfm() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -95988,11 +96031,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96046,11 +96089,11 @@ void m68000_device::jmp_adr16_dfm() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96122,11 +96165,11 @@ void m68000_device::jmp_adr32_dfm() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96181,11 +96224,11 @@ void m68000_device::jmp_dpc_dfm() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96260,11 +96303,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96296,7 +96339,6 @@ void m68000_device::addq_b_imm3_ds_dfm() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -96304,6 +96346,7 @@ void m68000_device::addq_b_imm3_ds_dfm() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96358,7 +96401,6 @@ void m68000_device::addq_b_imm3_ais_dfm() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96386,6 +96428,7 @@ void m68000_device::addq_b_imm3_ais_dfm() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96437,7 +96480,6 @@ void m68000_device::addq_b_imm3_aips_dfm() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96465,6 +96507,7 @@ void m68000_device::addq_b_imm3_aips_dfm() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96518,7 +96561,6 @@ void m68000_device::addq_b_imm3_pais_dfm() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96546,6 +96588,7 @@ void m68000_device::addq_b_imm3_pais_dfm() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96615,7 +96658,6 @@ void m68000_device::addq_b_imm3_das_dfm() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96643,6 +96685,7 @@ void m68000_device::addq_b_imm3_das_dfm() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96750,7 +96793,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96778,6 +96820,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96846,7 +96889,6 @@ void m68000_device::addq_b_imm3_adr16_dfm() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96874,6 +96916,7 @@ void m68000_device::addq_b_imm3_adr16_dfm() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96963,7 +97006,6 @@ void m68000_device::addq_b_imm3_adr32_dfm() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -96991,6 +97033,7 @@ void m68000_device::addq_b_imm3_adr32_dfm() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -97017,7 +97060,6 @@ void m68000_device::addq_w_imm3_ds_dfm() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97025,6 +97067,7 @@ void m68000_device::addq_w_imm3_ds_dfm() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97058,7 +97101,6 @@ void m68000_device::addq_w_imm3_as_dfm() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97089,6 +97131,7 @@ void m68000_device::addq_w_imm3_as_dfm() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97129,7 +97172,6 @@ void m68000_device::addq_w_imm3_ais_dfm() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97157,6 +97199,7 @@ void m68000_device::addq_w_imm3_ais_dfm() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97216,7 +97259,6 @@ void m68000_device::addq_w_imm3_aips_dfm() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97244,6 +97286,7 @@ void m68000_device::addq_w_imm3_aips_dfm() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97305,7 +97348,6 @@ void m68000_device::addq_w_imm3_pais_dfm() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97333,6 +97375,7 @@ void m68000_device::addq_w_imm3_pais_dfm() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97410,7 +97453,6 @@ void m68000_device::addq_w_imm3_das_dfm() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97438,6 +97480,7 @@ void m68000_device::addq_w_imm3_das_dfm() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97553,7 +97596,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97581,6 +97623,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97657,7 +97700,6 @@ void m68000_device::addq_w_imm3_adr16_dfm() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97685,6 +97727,7 @@ void m68000_device::addq_w_imm3_adr16_dfm() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97782,7 +97825,6 @@ void m68000_device::addq_w_imm3_adr32_dfm() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -97810,6 +97852,7 @@ void m68000_device::addq_w_imm3_adr32_dfm() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -97841,7 +97884,6 @@ void m68000_device::addq_l_imm3_ds_dfm() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97874,6 +97916,7 @@ void m68000_device::addq_l_imm3_ds_dfm() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97890,7 +97933,6 @@ void m68000_device::addq_l_imm3_as_dfm() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97921,6 +97963,7 @@ void m68000_device::addq_l_imm3_as_dfm() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97982,7 +98025,6 @@ void m68000_device::addq_l_imm3_ais_dfm() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98033,6 +98075,7 @@ void m68000_device::addq_l_imm3_ais_dfm() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98112,7 +98155,6 @@ void m68000_device::addq_l_imm3_aips_dfm() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98163,6 +98205,7 @@ void m68000_device::addq_l_imm3_aips_dfm() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98243,7 +98286,6 @@ void m68000_device::addq_l_imm3_pais_dfm() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98294,6 +98336,7 @@ void m68000_device::addq_l_imm3_pais_dfm() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98391,7 +98434,6 @@ void m68000_device::addq_l_imm3_das_dfm() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98442,6 +98484,7 @@ void m68000_device::addq_l_imm3_das_dfm() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98577,7 +98620,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98628,6 +98670,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98727,7 +98770,6 @@ void m68000_device::addq_l_imm3_adr16_dfm() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98778,6 +98820,7 @@ void m68000_device::addq_l_imm3_adr16_dfm() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98898,7 +98941,6 @@ void m68000_device::addq_l_imm3_adr32_dfm() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -98949,6 +98991,7 @@ void m68000_device::addq_l_imm3_adr32_dfm() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -98980,7 +99023,6 @@ void m68000_device::st_ds_dfm() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -98992,6 +99034,7 @@ void m68000_device::st_ds_dfm() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99043,6 +99086,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -99104,6 +99148,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -99135,12 +99180,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99169,12 +99214,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99205,6 +99250,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -99259,7 +99305,6 @@ void m68000_device::st_ais_dfm() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99321,6 +99366,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99375,7 +99421,6 @@ void m68000_device::st_aips_dfm() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99437,6 +99482,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99493,7 +99539,6 @@ void m68000_device::st_pais_dfm() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99555,6 +99600,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99627,7 +99673,6 @@ void m68000_device::st_das_dfm() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99689,6 +99734,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99801,7 +99847,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99863,6 +99908,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99934,7 +99980,6 @@ void m68000_device::st_adr16_dfm() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99996,6 +100041,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100089,7 +100135,6 @@ void m68000_device::st_adr32_dfm() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -100151,6 +100196,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100178,7 +100224,6 @@ void m68000_device::subq_b_imm3_ds_dfm() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100186,6 +100231,7 @@ void m68000_device::subq_b_imm3_ds_dfm() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100240,7 +100286,6 @@ void m68000_device::subq_b_imm3_ais_dfm() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100268,6 +100313,7 @@ void m68000_device::subq_b_imm3_ais_dfm() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100319,7 +100365,6 @@ void m68000_device::subq_b_imm3_aips_dfm() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100347,6 +100392,7 @@ void m68000_device::subq_b_imm3_aips_dfm() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100400,7 +100446,6 @@ void m68000_device::subq_b_imm3_pais_dfm() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100428,6 +100473,7 @@ void m68000_device::subq_b_imm3_pais_dfm() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100497,7 +100543,6 @@ void m68000_device::subq_b_imm3_das_dfm() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100525,6 +100570,7 @@ void m68000_device::subq_b_imm3_das_dfm() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100632,7 +100678,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100660,6 +100705,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100728,7 +100774,6 @@ void m68000_device::subq_b_imm3_adr16_dfm() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100756,6 +100801,7 @@ void m68000_device::subq_b_imm3_adr16_dfm() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100845,7 +100891,6 @@ void m68000_device::subq_b_imm3_adr32_dfm() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100873,6 +100918,7 @@ void m68000_device::subq_b_imm3_adr32_dfm() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100899,7 +100945,6 @@ void m68000_device::subq_w_imm3_ds_dfm() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100907,6 +100952,7 @@ void m68000_device::subq_w_imm3_ds_dfm() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -100940,7 +100986,6 @@ void m68000_device::subq_w_imm3_as_dfm() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -100971,6 +101016,7 @@ void m68000_device::subq_w_imm3_as_dfm() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101011,7 +101057,6 @@ void m68000_device::subq_w_imm3_ais_dfm() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101039,6 +101084,7 @@ void m68000_device::subq_w_imm3_ais_dfm() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101098,7 +101144,6 @@ void m68000_device::subq_w_imm3_aips_dfm() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101126,6 +101171,7 @@ void m68000_device::subq_w_imm3_aips_dfm() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101187,7 +101233,6 @@ void m68000_device::subq_w_imm3_pais_dfm() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101215,6 +101260,7 @@ void m68000_device::subq_w_imm3_pais_dfm() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101292,7 +101338,6 @@ void m68000_device::subq_w_imm3_das_dfm() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101320,6 +101365,7 @@ void m68000_device::subq_w_imm3_das_dfm() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101435,7 +101481,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101463,6 +101508,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101539,7 +101585,6 @@ void m68000_device::subq_w_imm3_adr16_dfm() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101567,6 +101612,7 @@ void m68000_device::subq_w_imm3_adr16_dfm() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101664,7 +101710,6 @@ void m68000_device::subq_w_imm3_adr32_dfm() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101692,6 +101737,7 @@ void m68000_device::subq_w_imm3_adr32_dfm() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101723,7 +101769,6 @@ void m68000_device::subq_l_imm3_ds_dfm() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -101756,6 +101801,7 @@ void m68000_device::subq_l_imm3_ds_dfm() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101772,7 +101818,6 @@ void m68000_device::subq_l_imm3_as_dfm() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -101803,6 +101848,7 @@ void m68000_device::subq_l_imm3_as_dfm() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101864,7 +101910,6 @@ void m68000_device::subq_l_imm3_ais_dfm() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -101915,6 +101960,7 @@ void m68000_device::subq_l_imm3_ais_dfm() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -101994,7 +102040,6 @@ void m68000_device::subq_l_imm3_aips_dfm() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102045,6 +102090,7 @@ void m68000_device::subq_l_imm3_aips_dfm() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102125,7 +102171,6 @@ void m68000_device::subq_l_imm3_pais_dfm() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102176,6 +102221,7 @@ void m68000_device::subq_l_imm3_pais_dfm() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102273,7 +102319,6 @@ void m68000_device::subq_l_imm3_das_dfm() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102324,6 +102369,7 @@ void m68000_device::subq_l_imm3_das_dfm() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102459,7 +102505,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102510,6 +102555,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102609,7 +102655,6 @@ void m68000_device::subq_l_imm3_adr16_dfm() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102660,6 +102705,7 @@ void m68000_device::subq_l_imm3_adr16_dfm() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102780,7 +102826,6 @@ void m68000_device::subq_l_imm3_adr32_dfm() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102831,6 +102876,7 @@ void m68000_device::subq_l_imm3_adr32_dfm() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -102862,7 +102908,6 @@ void m68000_device::sf_ds_dfm() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -102874,6 +102919,7 @@ void m68000_device::sf_ds_dfm() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -102925,6 +102971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -102986,6 +103033,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -103017,12 +103065,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -103051,12 +103099,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -103087,6 +103135,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -103141,7 +103190,6 @@ void m68000_device::sf_ais_dfm() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103203,6 +103251,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103257,7 +103306,6 @@ void m68000_device::sf_aips_dfm() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103319,6 +103367,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103375,7 +103424,6 @@ void m68000_device::sf_pais_dfm() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103437,6 +103485,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103509,7 +103558,6 @@ void m68000_device::sf_das_dfm() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103571,6 +103619,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103683,7 +103732,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103745,6 +103793,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103816,7 +103865,6 @@ void m68000_device::sf_adr16_dfm() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103878,6 +103926,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103971,7 +104020,6 @@ void m68000_device::sf_adr32_dfm() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104033,6 +104081,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104060,7 +104109,6 @@ void m68000_device::shi_ds_dfm() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104072,6 +104120,7 @@ void m68000_device::shi_ds_dfm() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104123,6 +104172,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -104184,6 +104234,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -104215,12 +104266,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104249,12 +104300,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104285,6 +104336,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -104339,7 +104391,6 @@ void m68000_device::shi_ais_dfm() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104401,6 +104452,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104455,7 +104507,6 @@ void m68000_device::shi_aips_dfm() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104517,6 +104568,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104573,7 +104625,6 @@ void m68000_device::shi_pais_dfm() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104635,6 +104686,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104707,7 +104759,6 @@ void m68000_device::shi_das_dfm() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104769,6 +104820,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104881,7 +104933,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104943,6 +104994,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105014,7 +105066,6 @@ void m68000_device::shi_adr16_dfm() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105076,6 +105127,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105169,7 +105221,6 @@ void m68000_device::shi_adr32_dfm() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105231,6 +105282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105258,7 +105310,6 @@ void m68000_device::sls_ds_dfm() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105270,6 +105321,7 @@ void m68000_device::sls_ds_dfm() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105321,6 +105373,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -105382,6 +105435,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -105413,12 +105467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105447,12 +105501,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105483,6 +105537,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -105537,7 +105592,6 @@ void m68000_device::sls_ais_dfm() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105599,6 +105653,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105653,7 +105708,6 @@ void m68000_device::sls_aips_dfm() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105715,6 +105769,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105771,7 +105826,6 @@ void m68000_device::sls_pais_dfm() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105833,6 +105887,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105905,7 +105960,6 @@ void m68000_device::sls_das_dfm() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105967,6 +106021,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106079,7 +106134,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106141,6 +106195,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106212,7 +106267,6 @@ void m68000_device::sls_adr16_dfm() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106274,6 +106328,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106367,7 +106422,6 @@ void m68000_device::sls_adr32_dfm() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106429,6 +106483,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106456,7 +106511,6 @@ void m68000_device::scc_ds_dfm() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106468,6 +106522,7 @@ void m68000_device::scc_ds_dfm() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106519,6 +106574,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -106580,6 +106636,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -106611,12 +106668,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106645,12 +106702,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106681,6 +106738,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -106735,7 +106793,6 @@ void m68000_device::scc_ais_dfm() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106797,6 +106854,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106851,7 +106909,6 @@ void m68000_device::scc_aips_dfm() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106913,6 +106970,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106969,7 +107027,6 @@ void m68000_device::scc_pais_dfm() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107031,6 +107088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107103,7 +107161,6 @@ void m68000_device::scc_das_dfm() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107165,6 +107222,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107277,7 +107335,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107339,6 +107396,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107410,7 +107468,6 @@ void m68000_device::scc_adr16_dfm() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107472,6 +107529,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107565,7 +107623,6 @@ void m68000_device::scc_adr32_dfm() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107627,6 +107684,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107654,7 +107712,6 @@ void m68000_device::scs_ds_dfm() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107666,6 +107723,7 @@ void m68000_device::scs_ds_dfm() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107717,6 +107775,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -107778,6 +107837,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -107809,12 +107869,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107843,12 +107903,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107879,6 +107939,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -107933,7 +107994,6 @@ void m68000_device::scs_ais_dfm() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107995,6 +108055,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108049,7 +108110,6 @@ void m68000_device::scs_aips_dfm() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108111,6 +108171,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108167,7 +108228,6 @@ void m68000_device::scs_pais_dfm() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108229,6 +108289,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108301,7 +108362,6 @@ void m68000_device::scs_das_dfm() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108363,6 +108423,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108475,7 +108536,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108537,6 +108597,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108608,7 +108669,6 @@ void m68000_device::scs_adr16_dfm() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108670,6 +108730,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108763,7 +108824,6 @@ void m68000_device::scs_adr32_dfm() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108825,6 +108885,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108852,7 +108913,6 @@ void m68000_device::sne_ds_dfm() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108864,6 +108924,7 @@ void m68000_device::sne_ds_dfm() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -108915,6 +108976,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -108976,6 +109038,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -109007,12 +109070,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -109041,12 +109104,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -109077,6 +109140,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -109131,7 +109195,6 @@ void m68000_device::sne_ais_dfm() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109193,6 +109256,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109247,7 +109311,6 @@ void m68000_device::sne_aips_dfm() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109309,6 +109372,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109365,7 +109429,6 @@ void m68000_device::sne_pais_dfm() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109427,6 +109490,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109499,7 +109563,6 @@ void m68000_device::sne_das_dfm() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109561,6 +109624,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109673,7 +109737,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109735,6 +109798,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109806,7 +109870,6 @@ void m68000_device::sne_adr16_dfm() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109868,6 +109931,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109961,7 +110025,6 @@ void m68000_device::sne_adr32_dfm() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110023,6 +110086,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110050,7 +110114,6 @@ void m68000_device::seq_ds_dfm() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110062,6 +110125,7 @@ void m68000_device::seq_ds_dfm() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110113,6 +110177,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -110174,6 +110239,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -110205,12 +110271,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110239,12 +110305,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110275,6 +110341,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -110329,7 +110396,6 @@ void m68000_device::seq_ais_dfm() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110391,6 +110457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110445,7 +110512,6 @@ void m68000_device::seq_aips_dfm() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110507,6 +110573,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110563,7 +110630,6 @@ void m68000_device::seq_pais_dfm() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110625,6 +110691,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110697,7 +110764,6 @@ void m68000_device::seq_das_dfm() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110759,6 +110825,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110871,7 +110938,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110933,6 +110999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111004,7 +111071,6 @@ void m68000_device::seq_adr16_dfm() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111066,6 +111132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111159,7 +111226,6 @@ void m68000_device::seq_adr32_dfm() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111221,6 +111287,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111248,7 +111315,6 @@ void m68000_device::svc_ds_dfm() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111260,6 +111326,7 @@ void m68000_device::svc_ds_dfm() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111311,6 +111378,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -111372,6 +111440,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -111403,12 +111472,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111437,12 +111506,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111473,6 +111542,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -111527,7 +111597,6 @@ void m68000_device::svc_ais_dfm() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111589,6 +111658,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111643,7 +111713,6 @@ void m68000_device::svc_aips_dfm() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111705,6 +111774,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111761,7 +111831,6 @@ void m68000_device::svc_pais_dfm() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111823,6 +111892,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111895,7 +111965,6 @@ void m68000_device::svc_das_dfm() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111957,6 +112026,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112069,7 +112139,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112131,6 +112200,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112202,7 +112272,6 @@ void m68000_device::svc_adr16_dfm() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112264,6 +112333,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112357,7 +112427,6 @@ void m68000_device::svc_adr32_dfm() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112419,6 +112488,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112446,7 +112516,6 @@ void m68000_device::svs_ds_dfm() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112458,6 +112527,7 @@ void m68000_device::svs_ds_dfm() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112509,6 +112579,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112570,6 +112641,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112601,12 +112673,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112635,12 +112707,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112671,6 +112743,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -112725,7 +112798,6 @@ void m68000_device::svs_ais_dfm() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112787,6 +112859,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112841,7 +112914,6 @@ void m68000_device::svs_aips_dfm() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112903,6 +112975,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112959,7 +113032,6 @@ void m68000_device::svs_pais_dfm() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113021,6 +113093,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113093,7 +113166,6 @@ void m68000_device::svs_das_dfm() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113155,6 +113227,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113267,7 +113340,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113329,6 +113401,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113400,7 +113473,6 @@ void m68000_device::svs_adr16_dfm() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113462,6 +113534,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113555,7 +113628,6 @@ void m68000_device::svs_adr32_dfm() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113617,6 +113689,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113644,7 +113717,6 @@ void m68000_device::spl_ds_dfm() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113656,6 +113728,7 @@ void m68000_device::spl_ds_dfm() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113707,6 +113780,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -113768,6 +113842,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -113799,12 +113874,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113833,12 +113908,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113869,6 +113944,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -113923,7 +113999,6 @@ void m68000_device::spl_ais_dfm() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113985,6 +114060,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114039,7 +114115,6 @@ void m68000_device::spl_aips_dfm() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114101,6 +114176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114157,7 +114233,6 @@ void m68000_device::spl_pais_dfm() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114219,6 +114294,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114291,7 +114367,6 @@ void m68000_device::spl_das_dfm() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114353,6 +114428,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114465,7 +114541,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114527,6 +114602,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114598,7 +114674,6 @@ void m68000_device::spl_adr16_dfm() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114660,6 +114735,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114753,7 +114829,6 @@ void m68000_device::spl_adr32_dfm() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114815,6 +114890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114842,7 +114918,6 @@ void m68000_device::smi_ds_dfm() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114854,6 +114929,7 @@ void m68000_device::smi_ds_dfm() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -114905,6 +114981,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -114966,6 +115043,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -114997,12 +115075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -115031,12 +115109,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -115067,6 +115145,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -115121,7 +115200,6 @@ void m68000_device::smi_ais_dfm() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115183,6 +115261,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115237,7 +115316,6 @@ void m68000_device::smi_aips_dfm() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115299,6 +115377,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115355,7 +115434,6 @@ void m68000_device::smi_pais_dfm() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115417,6 +115495,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115489,7 +115568,6 @@ void m68000_device::smi_das_dfm() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115551,6 +115629,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115663,7 +115742,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115725,6 +115803,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115796,7 +115875,6 @@ void m68000_device::smi_adr16_dfm() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115858,6 +115936,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115951,7 +116030,6 @@ void m68000_device::smi_adr32_dfm() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116013,6 +116091,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116040,7 +116119,6 @@ void m68000_device::sge_ds_dfm() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116052,6 +116130,7 @@ void m68000_device::sge_ds_dfm() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116103,6 +116182,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -116164,6 +116244,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -116195,12 +116276,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116229,12 +116310,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116265,6 +116346,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -116319,7 +116401,6 @@ void m68000_device::sge_ais_dfm() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116381,6 +116462,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116435,7 +116517,6 @@ void m68000_device::sge_aips_dfm() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116497,6 +116578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116553,7 +116635,6 @@ void m68000_device::sge_pais_dfm() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116615,6 +116696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116687,7 +116769,6 @@ void m68000_device::sge_das_dfm() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116749,6 +116830,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116861,7 +116943,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116923,6 +117004,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116994,7 +117076,6 @@ void m68000_device::sge_adr16_dfm() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117056,6 +117137,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117149,7 +117231,6 @@ void m68000_device::sge_adr32_dfm() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117211,6 +117292,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117238,7 +117320,6 @@ void m68000_device::slt_ds_dfm() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117250,6 +117331,7 @@ void m68000_device::slt_ds_dfm() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117301,6 +117383,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117362,6 +117445,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117393,12 +117477,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117427,12 +117511,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117463,6 +117547,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -117517,7 +117602,6 @@ void m68000_device::slt_ais_dfm() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117579,6 +117663,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117633,7 +117718,6 @@ void m68000_device::slt_aips_dfm() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117695,6 +117779,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117751,7 +117836,6 @@ void m68000_device::slt_pais_dfm() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117813,6 +117897,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117885,7 +117970,6 @@ void m68000_device::slt_das_dfm() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117947,6 +118031,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118059,7 +118144,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118121,6 +118205,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118192,7 +118277,6 @@ void m68000_device::slt_adr16_dfm() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118254,6 +118338,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118347,7 +118432,6 @@ void m68000_device::slt_adr32_dfm() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118409,6 +118493,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118436,7 +118521,6 @@ void m68000_device::sgt_ds_dfm() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118448,6 +118532,7 @@ void m68000_device::sgt_ds_dfm() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118499,6 +118584,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118560,6 +118646,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118591,12 +118678,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118625,12 +118712,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118661,6 +118748,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -118715,7 +118803,6 @@ void m68000_device::sgt_ais_dfm() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118777,6 +118864,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118831,7 +118919,6 @@ void m68000_device::sgt_aips_dfm() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118893,6 +118980,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118949,7 +119037,6 @@ void m68000_device::sgt_pais_dfm() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119011,6 +119098,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119083,7 +119171,6 @@ void m68000_device::sgt_das_dfm() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119145,6 +119232,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119257,7 +119345,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119319,6 +119406,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119390,7 +119478,6 @@ void m68000_device::sgt_adr16_dfm() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119452,6 +119539,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119545,7 +119633,6 @@ void m68000_device::sgt_adr32_dfm() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119607,6 +119694,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119634,7 +119722,6 @@ void m68000_device::sle_ds_dfm() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119646,6 +119733,7 @@ void m68000_device::sle_ds_dfm() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119697,6 +119785,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119758,6 +119847,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -119789,12 +119879,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119823,12 +119913,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119859,6 +119949,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -119913,7 +120004,6 @@ void m68000_device::sle_ais_dfm() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119975,6 +120065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120029,7 +120120,6 @@ void m68000_device::sle_aips_dfm() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120091,6 +120181,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120147,7 +120238,6 @@ void m68000_device::sle_pais_dfm() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120209,6 +120299,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120281,7 +120372,6 @@ void m68000_device::sle_das_dfm() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120343,6 +120433,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120455,7 +120546,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120517,6 +120607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120588,7 +120679,6 @@ void m68000_device::sle_adr16_dfm() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120650,6 +120740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120743,7 +120834,6 @@ void m68000_device::sle_adr32_dfm() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120805,6 +120895,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120839,6 +120930,7 @@ void m68000_device::bra_rel16_dfm() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120896,11 +120988,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -120939,6 +121031,7 @@ void m68000_device::bra_rel8_dfm() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120972,11 +121065,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121078,11 +121171,11 @@ void m68000_device::bsr_rel16_dfm() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121184,11 +121277,11 @@ void m68000_device::bsr_rel8_dfm() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121227,6 +121320,7 @@ void m68000_device::bhi_rel16_dfm() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121284,11 +121378,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121327,6 +121421,7 @@ void m68000_device::bhi_rel8_dfm() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121360,11 +121455,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121403,6 +121498,7 @@ void m68000_device::bls_rel16_dfm() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121460,11 +121556,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121503,6 +121599,7 @@ void m68000_device::bls_rel8_dfm() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121536,11 +121633,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121579,6 +121676,7 @@ void m68000_device::bcc_rel16_dfm() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121636,11 +121734,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121679,6 +121777,7 @@ void m68000_device::bcc_rel8_dfm() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121712,11 +121811,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121755,6 +121854,7 @@ void m68000_device::bcs_rel16_dfm() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121812,11 +121912,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121855,6 +121955,7 @@ void m68000_device::bcs_rel8_dfm() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121888,11 +121989,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -121931,6 +122032,7 @@ void m68000_device::bne_rel16_dfm() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121988,11 +122090,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122031,6 +122133,7 @@ void m68000_device::bne_rel8_dfm() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122064,11 +122167,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122107,6 +122210,7 @@ void m68000_device::beq_rel16_dfm() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122164,11 +122268,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122207,6 +122311,7 @@ void m68000_device::beq_rel8_dfm() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122240,11 +122345,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122283,6 +122388,7 @@ void m68000_device::bvc_rel16_dfm() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122340,11 +122446,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122383,6 +122489,7 @@ void m68000_device::bvc_rel8_dfm() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122416,11 +122523,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122459,6 +122566,7 @@ void m68000_device::bvs_rel16_dfm() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122516,11 +122624,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122559,6 +122667,7 @@ void m68000_device::bvs_rel8_dfm() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122592,11 +122701,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122635,6 +122744,7 @@ void m68000_device::bpl_rel16_dfm() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122692,11 +122802,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122735,6 +122845,7 @@ void m68000_device::bpl_rel8_dfm() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122768,11 +122879,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122811,6 +122922,7 @@ void m68000_device::bmi_rel16_dfm() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122868,11 +122980,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122911,6 +123023,7 @@ void m68000_device::bmi_rel8_dfm() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122944,11 +123057,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -122987,6 +123100,7 @@ void m68000_device::bge_rel16_dfm() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123044,11 +123158,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123087,6 +123201,7 @@ void m68000_device::bge_rel8_dfm() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123120,11 +123235,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123163,6 +123278,7 @@ void m68000_device::blt_rel16_dfm() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123220,11 +123336,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123263,6 +123379,7 @@ void m68000_device::blt_rel8_dfm() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123296,11 +123413,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123339,6 +123456,7 @@ void m68000_device::bgt_rel16_dfm() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123396,11 +123514,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123439,6 +123557,7 @@ void m68000_device::bgt_rel8_dfm() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123472,11 +123591,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123515,6 +123634,7 @@ void m68000_device::ble_rel16_dfm() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123572,11 +123692,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123615,6 +123735,7 @@ void m68000_device::ble_rel8_dfm() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123648,11 +123769,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123684,7 +123805,6 @@ void m68000_device::moveq_imm8o_dd_dfm() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -123693,6 +123813,7 @@ void m68000_device::moveq_imm8o_dd_dfm() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123725,7 +123846,6 @@ void m68000_device::or_b_ds_dd_dfm() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -123733,6 +123853,7 @@ void m68000_device::or_b_ds_dd_dfm() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123790,7 +123911,6 @@ void m68000_device::or_b_ais_dd_dfm() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123798,6 +123918,7 @@ void m68000_device::or_b_ais_dd_dfm() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123860,7 +123981,6 @@ void m68000_device::or_b_aips_dd_dfm() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123868,6 +123988,7 @@ void m68000_device::or_b_aips_dd_dfm() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -123932,7 +124053,6 @@ void m68000_device::or_b_pais_dd_dfm() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123940,6 +124060,7 @@ void m68000_device::or_b_pais_dd_dfm() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124020,7 +124141,6 @@ void m68000_device::or_b_das_dd_dfm() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124028,6 +124148,7 @@ void m68000_device::or_b_das_dd_dfm() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124148,7 +124269,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124156,6 +124276,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124235,7 +124356,6 @@ void m68000_device::or_b_adr16_dd_dfm() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124243,6 +124363,7 @@ void m68000_device::or_b_adr16_dd_dfm() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124344,7 +124465,6 @@ void m68000_device::or_b_adr32_dd_dfm() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124352,6 +124472,7 @@ void m68000_device::or_b_adr32_dd_dfm() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124431,7 +124552,6 @@ void m68000_device::or_b_dpc_dd_dfm() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124439,6 +124559,7 @@ void m68000_device::or_b_dpc_dd_dfm() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124558,7 +124679,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124566,6 +124686,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124625,7 +124746,6 @@ void m68000_device::or_b_imm8_dd_dfm() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -124633,6 +124753,7 @@ void m68000_device::or_b_imm8_dd_dfm() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124668,7 +124789,6 @@ void m68000_device::or_w_ds_dd_dfm() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -124676,6 +124796,7 @@ void m68000_device::or_w_ds_dd_dfm() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124736,7 +124857,6 @@ void m68000_device::or_w_ais_dd_dfm() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124744,6 +124864,7 @@ void m68000_device::or_w_ais_dd_dfm() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124809,7 +124930,6 @@ void m68000_device::or_w_aips_dd_dfm() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124817,6 +124937,7 @@ void m68000_device::or_w_aips_dd_dfm() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124884,7 +125005,6 @@ void m68000_device::or_w_pais_dd_dfm() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124892,6 +125012,7 @@ void m68000_device::or_w_pais_dd_dfm() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -124975,7 +125096,6 @@ void m68000_device::or_w_das_dd_dfm() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124983,6 +125103,7 @@ void m68000_device::or_w_das_dd_dfm() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125106,7 +125227,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125114,6 +125234,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125196,7 +125317,6 @@ void m68000_device::or_w_adr16_dd_dfm() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125204,6 +125324,7 @@ void m68000_device::or_w_adr16_dd_dfm() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125308,7 +125429,6 @@ void m68000_device::or_w_adr32_dd_dfm() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125316,6 +125436,7 @@ void m68000_device::or_w_adr32_dd_dfm() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125398,7 +125519,6 @@ void m68000_device::or_w_dpc_dd_dfm() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125406,6 +125526,7 @@ void m68000_device::or_w_dpc_dd_dfm() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125528,7 +125649,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125536,6 +125656,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125595,7 +125716,6 @@ void m68000_device::or_w_imm16_dd_dfm() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -125603,6 +125723,7 @@ void m68000_device::or_w_imm16_dd_dfm() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -125638,7 +125759,6 @@ void m68000_device::or_l_ds_dd_dfm() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -125672,6 +125792,7 @@ void m68000_device::or_l_ds_dd_dfm() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125736,7 +125857,6 @@ void m68000_device::or_l_ais_dd_dfm() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125767,6 +125887,7 @@ void m68000_device::or_l_ais_dd_dfm() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125835,7 +125956,6 @@ void m68000_device::or_l_aips_dd_dfm() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125866,6 +125986,7 @@ void m68000_device::or_l_aips_dd_dfm() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125935,7 +126056,6 @@ void m68000_device::or_l_pais_dd_dfm() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125966,6 +126086,7 @@ void m68000_device::or_l_pais_dd_dfm() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126052,7 +126173,6 @@ void m68000_device::or_l_das_dd_dfm() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126083,6 +126203,7 @@ void m68000_device::or_l_das_dd_dfm() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126209,7 +126330,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126240,6 +126360,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126329,7 +126450,6 @@ void m68000_device::or_l_adr16_dd_dfm() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126360,6 +126480,7 @@ void m68000_device::or_l_adr16_dd_dfm() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126471,7 +126592,6 @@ void m68000_device::or_l_adr32_dd_dfm() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126502,6 +126622,7 @@ void m68000_device::or_l_adr32_dd_dfm() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126587,7 +126708,6 @@ void m68000_device::or_l_dpc_dd_dfm() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126618,6 +126738,7 @@ void m68000_device::or_l_dpc_dd_dfm() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126743,7 +126864,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126774,6 +126894,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126838,7 +126959,6 @@ void m68000_device::or_l_imm32_dd_dfm() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -126872,6 +126992,7 @@ void m68000_device::or_l_imm32_dd_dfm() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -127069,11 +127190,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127101,10 +127222,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127214,7 +127335,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127224,7 +127344,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127234,6 +127353,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127473,11 +127593,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127505,10 +127625,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127618,7 +127738,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127628,7 +127747,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127638,6 +127756,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127881,11 +128000,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -127913,10 +128032,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128026,7 +128145,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128036,7 +128154,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128046,6 +128163,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128291,11 +128409,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128323,10 +128441,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128436,7 +128554,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128446,7 +128563,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128456,6 +128572,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128717,11 +128834,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128749,10 +128866,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -128862,7 +128979,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128872,7 +128988,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128882,6 +128997,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129181,11 +129297,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129213,10 +129329,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129326,7 +129442,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129336,7 +129451,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129346,6 +129460,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129606,11 +129721,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129638,10 +129753,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -129751,7 +129866,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129761,7 +129875,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129771,6 +129884,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130052,11 +130166,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130084,10 +130198,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130197,7 +130311,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130207,7 +130320,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130217,6 +130329,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130477,11 +130590,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130509,10 +130622,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130622,7 +130735,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130632,7 +130744,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130642,6 +130753,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130940,11 +131052,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -130972,10 +131084,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131085,7 +131197,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131095,7 +131206,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131105,6 +131215,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131343,11 +131454,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131375,10 +131486,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131488,7 +131599,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131498,7 +131608,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131508,6 +131617,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131544,7 +131654,6 @@ void m68000_device::sbcd_ds_dd_dfm() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -131573,6 +131682,7 @@ void m68000_device::sbcd_ds_dd_dfm() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -131617,7 +131727,6 @@ void m68000_device::sbcd_pais_paid_dfm() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -131664,6 +131773,7 @@ void m68000_device::sbcd_pais_paid_dfm() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131713,7 +131823,6 @@ void m68000_device::or_b_dd_ais_dfm() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131740,6 +131849,7 @@ void m68000_device::or_b_dd_ais_dfm() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131795,7 +131905,6 @@ void m68000_device::or_b_dd_aips_dfm() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131822,6 +131931,7 @@ void m68000_device::or_b_dd_aips_dfm() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131879,7 +131989,6 @@ void m68000_device::or_b_dd_pais_dfm() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -131906,6 +132015,7 @@ void m68000_device::or_b_dd_pais_dfm() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131979,7 +132089,6 @@ void m68000_device::or_b_dd_das_dfm() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132006,6 +132115,7 @@ void m68000_device::or_b_dd_das_dfm() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132119,7 +132229,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132146,6 +132255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132218,7 +132328,6 @@ void m68000_device::or_b_dd_adr16_dfm() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132245,6 +132354,7 @@ void m68000_device::or_b_dd_adr16_dfm() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132339,7 +132449,6 @@ void m68000_device::or_b_dd_adr32_dfm() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132366,6 +132475,7 @@ void m68000_device::or_b_dd_adr32_dfm() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132419,7 +132529,6 @@ void m68000_device::or_w_dd_ais_dfm() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132446,6 +132555,7 @@ void m68000_device::or_w_dd_ais_dfm() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132509,7 +132619,6 @@ void m68000_device::or_w_dd_aips_dfm() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132536,6 +132645,7 @@ void m68000_device::or_w_dd_aips_dfm() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132601,7 +132711,6 @@ void m68000_device::or_w_dd_pais_dfm() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132628,6 +132737,7 @@ void m68000_device::or_w_dd_pais_dfm() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132709,7 +132819,6 @@ void m68000_device::or_w_dd_das_dfm() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132736,6 +132845,7 @@ void m68000_device::or_w_dd_das_dfm() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132857,7 +132967,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132884,6 +132993,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -132964,7 +133074,6 @@ void m68000_device::or_w_dd_adr16_dfm() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -132991,6 +133100,7 @@ void m68000_device::or_w_dd_adr16_dfm() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133093,7 +133203,6 @@ void m68000_device::or_w_dd_adr32_dfm() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133120,6 +133229,7 @@ void m68000_device::or_w_dd_adr32_dfm() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133199,7 +133309,6 @@ void m68000_device::or_l_dd_ais_dfm() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133249,6 +133358,7 @@ void m68000_device::or_l_dd_ais_dfm() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133332,7 +133442,6 @@ void m68000_device::or_l_dd_aips_dfm() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133382,6 +133491,7 @@ void m68000_device::or_l_dd_aips_dfm() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133466,7 +133576,6 @@ void m68000_device::or_l_dd_pais_dfm() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133516,6 +133625,7 @@ void m68000_device::or_l_dd_pais_dfm() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133617,7 +133727,6 @@ void m68000_device::or_l_dd_das_dfm() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133667,6 +133776,7 @@ void m68000_device::or_l_dd_das_dfm() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133808,7 +133918,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -133858,6 +133967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -133962,7 +134072,6 @@ void m68000_device::or_l_dd_adr16_dfm() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134012,6 +134121,7 @@ void m68000_device::or_l_dd_adr16_dfm() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -134138,7 +134248,6 @@ void m68000_device::or_l_dd_adr32_dfm() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134188,6 +134297,7 @@ void m68000_device::or_l_dd_adr32_dfm() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -134408,11 +134518,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134481,7 +134591,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -134494,6 +134603,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134621,7 +134731,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -134652,7 +134761,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -134684,6 +134792,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -134713,14 +134822,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -134947,11 +135054,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135020,7 +135127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135033,6 +135139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135160,7 +135267,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135191,7 +135297,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135223,6 +135328,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135252,14 +135358,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -135490,11 +135594,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135563,7 +135667,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135576,6 +135679,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135703,7 +135807,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135734,7 +135837,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135766,6 +135868,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -135795,14 +135898,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136035,11 +136136,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136108,7 +136209,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136121,6 +136221,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136248,7 +136349,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136279,7 +136379,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136311,6 +136410,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136340,14 +136440,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136596,11 +136694,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136669,7 +136767,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136682,6 +136779,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136809,7 +136907,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136840,7 +136937,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136872,6 +136968,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -136901,14 +136998,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137195,11 +137290,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137268,7 +137363,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137281,6 +137375,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137408,7 +137503,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137439,7 +137533,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -137471,6 +137564,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137500,14 +137594,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137755,11 +137847,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137828,7 +137920,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137841,6 +137932,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -137968,7 +138060,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137999,7 +138090,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138031,6 +138121,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138060,14 +138151,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138336,11 +138425,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138409,7 +138498,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138422,6 +138510,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138549,7 +138638,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -138580,7 +138668,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138612,6 +138699,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138641,14 +138729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138896,11 +138982,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -138969,7 +139055,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138982,6 +139067,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139109,7 +139195,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139140,7 +139225,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139172,6 +139256,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139201,14 +139286,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -139494,11 +139577,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139567,7 +139650,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -139580,6 +139662,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139707,7 +139790,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139738,7 +139820,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139770,6 +139851,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -139799,14 +139881,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140032,11 +140112,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140105,7 +140185,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -140118,6 +140197,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140245,7 +140325,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -140276,7 +140355,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -140308,6 +140386,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140337,14 +140416,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140360,7 +140437,6 @@ void m68000_device::sub_b_ds_dd_dfm() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140368,6 +140444,7 @@ void m68000_device::sub_b_ds_dd_dfm() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140423,7 +140500,6 @@ void m68000_device::sub_b_ais_dd_dfm() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140431,6 +140507,7 @@ void m68000_device::sub_b_ais_dd_dfm() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140490,7 +140567,6 @@ void m68000_device::sub_b_aips_dd_dfm() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140498,6 +140574,7 @@ void m68000_device::sub_b_aips_dd_dfm() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140559,7 +140636,6 @@ void m68000_device::sub_b_pais_dd_dfm() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140567,6 +140643,7 @@ void m68000_device::sub_b_pais_dd_dfm() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140644,7 +140721,6 @@ void m68000_device::sub_b_das_dd_dfm() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140652,6 +140728,7 @@ void m68000_device::sub_b_das_dd_dfm() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140767,7 +140844,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140775,6 +140851,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140851,7 +140928,6 @@ void m68000_device::sub_b_adr16_dd_dfm() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140859,6 +140935,7 @@ void m68000_device::sub_b_adr16_dd_dfm() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -140956,7 +141033,6 @@ void m68000_device::sub_b_adr32_dd_dfm() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140964,6 +141040,7 @@ void m68000_device::sub_b_adr32_dd_dfm() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141040,7 +141117,6 @@ void m68000_device::sub_b_dpc_dd_dfm() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141048,6 +141124,7 @@ void m68000_device::sub_b_dpc_dd_dfm() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141162,7 +141239,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141170,6 +141246,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141227,7 +141304,6 @@ void m68000_device::sub_b_imm8_dd_dfm() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141235,6 +141311,7 @@ void m68000_device::sub_b_imm8_dd_dfm() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141269,7 +141346,6 @@ void m68000_device::sub_w_ds_dd_dfm() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141277,6 +141353,7 @@ void m68000_device::sub_w_ds_dd_dfm() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141311,7 +141388,6 @@ void m68000_device::sub_w_as_dd_dfm() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -141319,6 +141395,7 @@ void m68000_device::sub_w_as_dd_dfm() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141377,7 +141454,6 @@ void m68000_device::sub_w_ais_dd_dfm() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141385,6 +141461,7 @@ void m68000_device::sub_w_ais_dd_dfm() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141447,7 +141524,6 @@ void m68000_device::sub_w_aips_dd_dfm() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141455,6 +141531,7 @@ void m68000_device::sub_w_aips_dd_dfm() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141519,7 +141596,6 @@ void m68000_device::sub_w_pais_dd_dfm() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141527,6 +141603,7 @@ void m68000_device::sub_w_pais_dd_dfm() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141607,7 +141684,6 @@ void m68000_device::sub_w_das_dd_dfm() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141615,6 +141691,7 @@ void m68000_device::sub_w_das_dd_dfm() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141733,7 +141810,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141741,6 +141817,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141820,7 +141897,6 @@ void m68000_device::sub_w_adr16_dd_dfm() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141828,6 +141904,7 @@ void m68000_device::sub_w_adr16_dd_dfm() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -141928,7 +142005,6 @@ void m68000_device::sub_w_adr32_dd_dfm() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141936,6 +142012,7 @@ void m68000_device::sub_w_adr32_dd_dfm() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142015,7 +142092,6 @@ void m68000_device::sub_w_dpc_dd_dfm() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142023,6 +142099,7 @@ void m68000_device::sub_w_dpc_dd_dfm() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142140,7 +142217,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142148,6 +142224,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142205,7 +142282,6 @@ void m68000_device::sub_w_imm16_dd_dfm() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142213,6 +142289,7 @@ void m68000_device::sub_w_imm16_dd_dfm() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -142247,7 +142324,6 @@ void m68000_device::sub_l_ds_dd_dfm() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142280,6 +142356,7 @@ void m68000_device::sub_l_ds_dd_dfm() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142297,7 +142374,6 @@ void m68000_device::sub_l_as_dd_dfm() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -142330,6 +142406,7 @@ void m68000_device::sub_l_as_dd_dfm() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142392,7 +142469,6 @@ void m68000_device::sub_l_ais_dd_dfm() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142423,6 +142499,7 @@ void m68000_device::sub_l_ais_dd_dfm() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142488,7 +142565,6 @@ void m68000_device::sub_l_aips_dd_dfm() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142519,6 +142595,7 @@ void m68000_device::sub_l_aips_dd_dfm() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142585,7 +142662,6 @@ void m68000_device::sub_l_pais_dd_dfm() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142616,6 +142692,7 @@ void m68000_device::sub_l_pais_dd_dfm() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142699,7 +142776,6 @@ void m68000_device::sub_l_das_dd_dfm() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142730,6 +142806,7 @@ void m68000_device::sub_l_das_dd_dfm() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142851,7 +142928,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142882,6 +142958,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142967,7 +143044,6 @@ void m68000_device::sub_l_adr16_dd_dfm() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142998,6 +143074,7 @@ void m68000_device::sub_l_adr16_dd_dfm() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143104,7 +143181,6 @@ void m68000_device::sub_l_adr32_dd_dfm() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143135,6 +143211,7 @@ void m68000_device::sub_l_adr32_dd_dfm() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143217,7 +143294,6 @@ void m68000_device::sub_l_dpc_dd_dfm() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143248,6 +143324,7 @@ void m68000_device::sub_l_dpc_dd_dfm() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143368,7 +143445,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143399,6 +143475,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143460,7 +143537,6 @@ void m68000_device::sub_l_imm32_dd_dfm() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -143493,6 +143569,7 @@ void m68000_device::sub_l_imm32_dd_dfm() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143510,7 +143587,6 @@ void m68000_device::suba_w_ds_ad_dfm() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -143541,6 +143617,7 @@ void m68000_device::suba_w_ds_ad_dfm() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143558,7 +143635,6 @@ void m68000_device::suba_w_as_ad_dfm() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -143589,6 +143665,7 @@ void m68000_device::suba_w_as_ad_dfm() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143630,7 +143707,6 @@ void m68000_device::suba_w_ais_ad_dfm() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143661,6 +143737,7 @@ void m68000_device::suba_w_ais_ad_dfm() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143706,7 +143783,6 @@ void m68000_device::suba_w_aips_ad_dfm() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143737,6 +143813,7 @@ void m68000_device::suba_w_aips_ad_dfm() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143784,7 +143861,6 @@ void m68000_device::suba_w_pais_ad_dfm() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143815,6 +143891,7 @@ void m68000_device::suba_w_pais_ad_dfm() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143878,7 +143955,6 @@ void m68000_device::suba_w_das_ad_dfm() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143909,6 +143985,7 @@ void m68000_device::suba_w_das_ad_dfm() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144010,7 +144087,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144041,6 +144117,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144103,7 +144180,6 @@ void m68000_device::suba_w_adr16_ad_dfm() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144134,6 +144210,7 @@ void m68000_device::suba_w_adr16_ad_dfm() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144217,7 +144294,6 @@ void m68000_device::suba_w_adr32_ad_dfm() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144248,6 +144324,7 @@ void m68000_device::suba_w_adr32_ad_dfm() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144310,7 +144387,6 @@ void m68000_device::suba_w_dpc_ad_dfm() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144341,6 +144417,7 @@ void m68000_device::suba_w_dpc_ad_dfm() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144441,7 +144518,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144472,6 +144548,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144512,7 +144589,6 @@ void m68000_device::suba_w_imm16_ad_dfm() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -144543,6 +144619,7 @@ void m68000_device::suba_w_imm16_ad_dfm() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144560,7 +144637,6 @@ void m68000_device::subx_b_ds_dd_dfm() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -144568,6 +144644,7 @@ void m68000_device::subx_b_ds_dd_dfm() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144629,7 +144706,6 @@ void m68000_device::subx_b_pais_paid_dfm() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -144674,6 +144750,7 @@ void m68000_device::subx_b_pais_paid_dfm() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144722,7 +144799,6 @@ void m68000_device::sub_b_dd_ais_dfm() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144749,6 +144825,7 @@ void m68000_device::sub_b_dd_ais_dfm() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144801,7 +144878,6 @@ void m68000_device::sub_b_dd_aips_dfm() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144828,6 +144904,7 @@ void m68000_device::sub_b_dd_aips_dfm() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144882,7 +144959,6 @@ void m68000_device::sub_b_dd_pais_dfm() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -144909,6 +144985,7 @@ void m68000_device::sub_b_dd_pais_dfm() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144979,7 +145056,6 @@ void m68000_device::sub_b_dd_das_dfm() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145006,6 +145082,7 @@ void m68000_device::sub_b_dd_das_dfm() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145114,7 +145191,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145141,6 +145217,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145210,7 +145287,6 @@ void m68000_device::sub_b_dd_adr16_dfm() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145237,6 +145313,7 @@ void m68000_device::sub_b_dd_adr16_dfm() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145327,7 +145404,6 @@ void m68000_device::sub_b_dd_adr32_dfm() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145354,6 +145430,7 @@ void m68000_device::sub_b_dd_adr32_dfm() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145381,7 +145458,6 @@ void m68000_device::subx_w_ds_dd_dfm() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -145389,6 +145465,7 @@ void m68000_device::subx_w_ds_dd_dfm() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145453,7 +145530,6 @@ void m68000_device::subx_w_pais_paid_dfm() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145501,6 +145577,7 @@ void m68000_device::subx_w_pais_paid_dfm() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145557,7 +145634,6 @@ void m68000_device::sub_w_dd_ais_dfm() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145584,6 +145660,7 @@ void m68000_device::sub_w_dd_ais_dfm() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145644,7 +145721,6 @@ void m68000_device::sub_w_dd_aips_dfm() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145671,6 +145747,7 @@ void m68000_device::sub_w_dd_aips_dfm() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145733,7 +145810,6 @@ void m68000_device::sub_w_dd_pais_dfm() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145760,6 +145836,7 @@ void m68000_device::sub_w_dd_pais_dfm() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145838,7 +145915,6 @@ void m68000_device::sub_w_dd_das_dfm() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -145865,6 +145941,7 @@ void m68000_device::sub_w_dd_das_dfm() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -145981,7 +146058,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146008,6 +146084,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146085,7 +146162,6 @@ void m68000_device::sub_w_dd_adr16_dfm() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146112,6 +146188,7 @@ void m68000_device::sub_w_dd_adr16_dfm() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146210,7 +146287,6 @@ void m68000_device::sub_w_dd_adr32_dfm() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146237,6 +146313,7 @@ void m68000_device::sub_w_dd_adr32_dfm() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146269,7 +146346,6 @@ void m68000_device::subx_l_ds_dd_dfm() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -146302,6 +146378,7 @@ void m68000_device::subx_l_ds_dd_dfm() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -146416,7 +146493,6 @@ void m68000_device::subx_l_pais_paid_dfm() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146462,6 +146538,7 @@ void m68000_device::subx_l_pais_paid_dfm() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146539,7 +146616,6 @@ void m68000_device::sub_l_dd_ais_dfm() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146589,6 +146665,7 @@ void m68000_device::sub_l_dd_ais_dfm() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146669,7 +146746,6 @@ void m68000_device::sub_l_dd_aips_dfm() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146719,6 +146795,7 @@ void m68000_device::sub_l_dd_aips_dfm() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146800,7 +146877,6 @@ void m68000_device::sub_l_dd_pais_dfm() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146850,6 +146926,7 @@ void m68000_device::sub_l_dd_pais_dfm() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -146948,7 +147025,6 @@ void m68000_device::sub_l_dd_das_dfm() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -146998,6 +147074,7 @@ void m68000_device::sub_l_dd_das_dfm() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147134,7 +147211,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -147184,6 +147260,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147284,7 +147361,6 @@ void m68000_device::sub_l_dd_adr16_dfm() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -147334,6 +147410,7 @@ void m68000_device::sub_l_dd_adr16_dfm() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147455,7 +147532,6 @@ void m68000_device::sub_l_dd_adr32_dfm() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -147505,6 +147581,7 @@ void m68000_device::sub_l_dd_adr32_dfm() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -147537,7 +147614,6 @@ void m68000_device::suba_l_ds_ad_dfm() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -147568,6 +147644,7 @@ void m68000_device::suba_l_ds_ad_dfm() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147585,7 +147662,6 @@ void m68000_device::suba_l_as_ad_dfm() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -147616,6 +147692,7 @@ void m68000_device::suba_l_as_ad_dfm() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147678,7 +147755,6 @@ void m68000_device::suba_l_ais_ad_dfm() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147707,6 +147783,7 @@ void m68000_device::suba_l_ais_ad_dfm() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147772,7 +147849,6 @@ void m68000_device::suba_l_aips_ad_dfm() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147801,6 +147877,7 @@ void m68000_device::suba_l_aips_ad_dfm() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147867,7 +147944,6 @@ void m68000_device::suba_l_pais_ad_dfm() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147896,6 +147972,7 @@ void m68000_device::suba_l_pais_ad_dfm() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147979,7 +148056,6 @@ void m68000_device::suba_l_das_ad_dfm() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148008,6 +148084,7 @@ void m68000_device::suba_l_das_ad_dfm() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148129,7 +148206,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148158,6 +148234,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148243,7 +148320,6 @@ void m68000_device::suba_l_adr16_ad_dfm() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148272,6 +148348,7 @@ void m68000_device::suba_l_adr16_ad_dfm() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148378,7 +148455,6 @@ void m68000_device::suba_l_adr32_ad_dfm() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148407,6 +148483,7 @@ void m68000_device::suba_l_adr32_ad_dfm() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148489,7 +148566,6 @@ void m68000_device::suba_l_dpc_ad_dfm() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148518,6 +148594,7 @@ void m68000_device::suba_l_dpc_ad_dfm() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148638,7 +148715,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148667,6 +148743,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148728,7 +148805,6 @@ void m68000_device::suba_l_imm32_ad_dfm() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -148759,6 +148835,7 @@ void m68000_device::suba_l_imm32_ad_dfm() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148776,7 +148853,6 @@ void m68000_device::cmp_b_ds_dd_dfm() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -148784,6 +148860,7 @@ void m68000_device::cmp_b_ds_dd_dfm() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -148838,7 +148915,6 @@ void m68000_device::cmp_b_ais_dd_dfm() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148846,6 +148922,7 @@ void m68000_device::cmp_b_ais_dd_dfm() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -148904,7 +148981,6 @@ void m68000_device::cmp_b_aips_dd_dfm() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148912,6 +148988,7 @@ void m68000_device::cmp_b_aips_dd_dfm() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -148972,7 +149049,6 @@ void m68000_device::cmp_b_pais_dd_dfm() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148980,6 +149056,7 @@ void m68000_device::cmp_b_pais_dd_dfm() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149056,7 +149133,6 @@ void m68000_device::cmp_b_das_dd_dfm() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149064,6 +149140,7 @@ void m68000_device::cmp_b_das_dd_dfm() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149178,7 +149255,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149186,6 +149262,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149261,7 +149338,6 @@ void m68000_device::cmp_b_adr16_dd_dfm() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149269,6 +149345,7 @@ void m68000_device::cmp_b_adr16_dd_dfm() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149365,7 +149442,6 @@ void m68000_device::cmp_b_adr32_dd_dfm() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149373,6 +149449,7 @@ void m68000_device::cmp_b_adr32_dd_dfm() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149448,7 +149525,6 @@ void m68000_device::cmp_b_dpc_dd_dfm() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149456,6 +149532,7 @@ void m68000_device::cmp_b_dpc_dd_dfm() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149569,7 +149646,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149577,6 +149653,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149633,7 +149710,6 @@ void m68000_device::cmp_b_imm8_dd_dfm() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -149641,6 +149717,7 @@ void m68000_device::cmp_b_imm8_dd_dfm() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149674,7 +149751,6 @@ void m68000_device::cmp_w_ds_dd_dfm() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149682,6 +149758,7 @@ void m68000_device::cmp_w_ds_dd_dfm() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149715,7 +149792,6 @@ void m68000_device::cmp_w_as_dd_dfm() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -149723,6 +149799,7 @@ void m68000_device::cmp_w_as_dd_dfm() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149780,7 +149857,6 @@ void m68000_device::cmp_w_ais_dd_dfm() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149788,6 +149864,7 @@ void m68000_device::cmp_w_ais_dd_dfm() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149849,7 +149926,6 @@ void m68000_device::cmp_w_aips_dd_dfm() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149857,6 +149933,7 @@ void m68000_device::cmp_w_aips_dd_dfm() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -149920,7 +149997,6 @@ void m68000_device::cmp_w_pais_dd_dfm() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149928,6 +150004,7 @@ void m68000_device::cmp_w_pais_dd_dfm() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150007,7 +150084,6 @@ void m68000_device::cmp_w_das_dd_dfm() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150015,6 +150091,7 @@ void m68000_device::cmp_w_das_dd_dfm() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150132,7 +150209,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150140,6 +150216,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150218,7 +150295,6 @@ void m68000_device::cmp_w_adr16_dd_dfm() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150226,6 +150302,7 @@ void m68000_device::cmp_w_adr16_dd_dfm() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150325,7 +150402,6 @@ void m68000_device::cmp_w_adr32_dd_dfm() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150333,6 +150409,7 @@ void m68000_device::cmp_w_adr32_dd_dfm() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150411,7 +150488,6 @@ void m68000_device::cmp_w_dpc_dd_dfm() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150419,6 +150495,7 @@ void m68000_device::cmp_w_dpc_dd_dfm() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150535,7 +150612,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150543,6 +150619,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150599,7 +150676,6 @@ void m68000_device::cmp_w_imm16_dd_dfm() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -150607,6 +150683,7 @@ void m68000_device::cmp_w_imm16_dd_dfm() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -150640,7 +150717,6 @@ void m68000_device::cmp_l_ds_dd_dfm() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -150670,6 +150746,7 @@ void m68000_device::cmp_l_ds_dd_dfm() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150686,7 +150763,6 @@ void m68000_device::cmp_l_as_dd_dfm() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -150716,6 +150792,7 @@ void m68000_device::cmp_l_as_dd_dfm() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150777,7 +150854,6 @@ void m68000_device::cmp_l_ais_dd_dfm() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150807,6 +150883,7 @@ void m68000_device::cmp_l_ais_dd_dfm() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150871,7 +150948,6 @@ void m68000_device::cmp_l_aips_dd_dfm() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150901,6 +150977,7 @@ void m68000_device::cmp_l_aips_dd_dfm() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150966,7 +151043,6 @@ void m68000_device::cmp_l_pais_dd_dfm() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150996,6 +151072,7 @@ void m68000_device::cmp_l_pais_dd_dfm() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151078,7 +151155,6 @@ void m68000_device::cmp_l_das_dd_dfm() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151108,6 +151184,7 @@ void m68000_device::cmp_l_das_dd_dfm() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151228,7 +151305,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151258,6 +151334,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151342,7 +151419,6 @@ void m68000_device::cmp_l_adr16_dd_dfm() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151372,6 +151448,7 @@ void m68000_device::cmp_l_adr16_dd_dfm() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151477,7 +151554,6 @@ void m68000_device::cmp_l_adr32_dd_dfm() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151507,6 +151583,7 @@ void m68000_device::cmp_l_adr32_dd_dfm() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151588,7 +151665,6 @@ void m68000_device::cmp_l_dpc_dd_dfm() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151618,6 +151694,7 @@ void m68000_device::cmp_l_dpc_dd_dfm() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151737,7 +151814,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151767,6 +151843,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151827,7 +151904,6 @@ void m68000_device::cmp_l_imm32_dd_dfm() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -151857,6 +151933,7 @@ void m68000_device::cmp_l_imm32_dd_dfm() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151873,7 +151950,6 @@ void m68000_device::cmpa_w_ds_ad_dfm() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -151903,6 +151979,7 @@ void m68000_device::cmpa_w_ds_ad_dfm() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151919,7 +151996,6 @@ void m68000_device::cmpa_w_as_ad_dfm() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -151949,6 +152025,7 @@ void m68000_device::cmpa_w_as_ad_dfm() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151989,7 +152066,6 @@ void m68000_device::cmpa_w_ais_ad_dfm() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152019,6 +152095,7 @@ void m68000_device::cmpa_w_ais_ad_dfm() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152063,7 +152140,6 @@ void m68000_device::cmpa_w_aips_ad_dfm() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152093,6 +152169,7 @@ void m68000_device::cmpa_w_aips_ad_dfm() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152139,7 +152216,6 @@ void m68000_device::cmpa_w_pais_ad_dfm() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152169,6 +152245,7 @@ void m68000_device::cmpa_w_pais_ad_dfm() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152231,7 +152308,6 @@ void m68000_device::cmpa_w_das_ad_dfm() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152261,6 +152337,7 @@ void m68000_device::cmpa_w_das_ad_dfm() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152361,7 +152438,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152391,6 +152467,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152452,7 +152529,6 @@ void m68000_device::cmpa_w_adr16_ad_dfm() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152482,6 +152558,7 @@ void m68000_device::cmpa_w_adr16_ad_dfm() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152564,7 +152641,6 @@ void m68000_device::cmpa_w_adr32_ad_dfm() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152594,6 +152670,7 @@ void m68000_device::cmpa_w_adr32_ad_dfm() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152655,7 +152732,6 @@ void m68000_device::cmpa_w_dpc_ad_dfm() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152685,6 +152761,7 @@ void m68000_device::cmpa_w_dpc_ad_dfm() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152784,7 +152861,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152814,6 +152890,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152853,7 +152930,6 @@ void m68000_device::cmpa_w_imm16_ad_dfm() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -152883,6 +152959,7 @@ void m68000_device::cmpa_w_imm16_ad_dfm() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152899,13 +152976,13 @@ void m68000_device::eor_b_dd_ds_dfm() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -152963,7 +153040,6 @@ void m68000_device::cmpm_b_aips_aipd_dfm() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -152984,6 +153060,7 @@ void m68000_device::cmpm_b_aips_aipd_dfm() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153043,7 +153120,6 @@ void m68000_device::eor_b_dd_ais_dfm() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153070,6 +153146,7 @@ void m68000_device::eor_b_dd_ais_dfm() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153125,7 +153202,6 @@ void m68000_device::eor_b_dd_aips_dfm() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153152,6 +153228,7 @@ void m68000_device::eor_b_dd_aips_dfm() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153209,7 +153286,6 @@ void m68000_device::eor_b_dd_pais_dfm() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153236,6 +153312,7 @@ void m68000_device::eor_b_dd_pais_dfm() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153309,7 +153386,6 @@ void m68000_device::eor_b_dd_das_dfm() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153336,6 +153412,7 @@ void m68000_device::eor_b_dd_das_dfm() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153449,7 +153526,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153476,6 +153552,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153548,7 +153625,6 @@ void m68000_device::eor_b_dd_adr16_dfm() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153575,6 +153651,7 @@ void m68000_device::eor_b_dd_adr16_dfm() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153669,7 +153746,6 @@ void m68000_device::eor_b_dd_adr32_dfm() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153696,6 +153772,7 @@ void m68000_device::eor_b_dd_adr32_dfm() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153724,13 +153801,13 @@ void m68000_device::eor_w_dd_ds_dfm() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153791,7 +153868,6 @@ void m68000_device::cmpm_w_aips_aipd_dfm() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153815,6 +153891,7 @@ void m68000_device::cmpm_w_aips_aipd_dfm() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153877,7 +153954,6 @@ void m68000_device::eor_w_dd_ais_dfm() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153904,6 +153980,7 @@ void m68000_device::eor_w_dd_ais_dfm() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -153967,7 +154044,6 @@ void m68000_device::eor_w_dd_aips_dfm() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -153994,6 +154070,7 @@ void m68000_device::eor_w_dd_aips_dfm() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154059,7 +154136,6 @@ void m68000_device::eor_w_dd_pais_dfm() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154086,6 +154162,7 @@ void m68000_device::eor_w_dd_pais_dfm() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154167,7 +154244,6 @@ void m68000_device::eor_w_dd_das_dfm() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154194,6 +154270,7 @@ void m68000_device::eor_w_dd_das_dfm() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154315,7 +154392,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154342,6 +154418,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154422,7 +154499,6 @@ void m68000_device::eor_w_dd_adr16_dfm() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154449,6 +154525,7 @@ void m68000_device::eor_w_dd_adr16_dfm() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154551,7 +154628,6 @@ void m68000_device::eor_w_dd_adr32_dfm() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154578,6 +154654,7 @@ void m68000_device::eor_w_dd_adr32_dfm() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154611,7 +154688,6 @@ void m68000_device::eor_l_dd_ds_dfm() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -154644,6 +154720,7 @@ void m68000_device::eor_l_dd_ds_dfm() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -154708,7 +154785,6 @@ void m68000_device::cmpm_l_aips_aipd_dfm() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154759,6 +154835,7 @@ void m68000_device::cmpm_l_aips_aipd_dfm() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154840,7 +154917,6 @@ void m68000_device::eor_l_dd_ais_dfm() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -154890,6 +154966,7 @@ void m68000_device::eor_l_dd_ais_dfm() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -154973,7 +155050,6 @@ void m68000_device::eor_l_dd_aips_dfm() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155023,6 +155099,7 @@ void m68000_device::eor_l_dd_aips_dfm() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155107,7 +155184,6 @@ void m68000_device::eor_l_dd_pais_dfm() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155157,6 +155233,7 @@ void m68000_device::eor_l_dd_pais_dfm() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155258,7 +155335,6 @@ void m68000_device::eor_l_dd_das_dfm() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155308,6 +155384,7 @@ void m68000_device::eor_l_dd_das_dfm() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155449,7 +155526,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155499,6 +155575,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155603,7 +155680,6 @@ void m68000_device::eor_l_dd_adr16_dfm() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155653,6 +155729,7 @@ void m68000_device::eor_l_dd_adr16_dfm() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155779,7 +155856,6 @@ void m68000_device::eor_l_dd_adr32_dfm() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -155829,6 +155905,7 @@ void m68000_device::eor_l_dd_adr32_dfm() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -155862,7 +155939,6 @@ void m68000_device::cmpa_l_ds_ad_dfm() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -155892,6 +155968,7 @@ void m68000_device::cmpa_l_ds_ad_dfm() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155908,7 +155985,6 @@ void m68000_device::cmpa_l_as_ad_dfm() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -155938,6 +156014,7 @@ void m68000_device::cmpa_l_as_ad_dfm() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155999,7 +156076,6 @@ void m68000_device::cmpa_l_ais_ad_dfm() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156029,6 +156105,7 @@ void m68000_device::cmpa_l_ais_ad_dfm() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156093,7 +156170,6 @@ void m68000_device::cmpa_l_aips_ad_dfm() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156123,6 +156199,7 @@ void m68000_device::cmpa_l_aips_ad_dfm() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156188,7 +156265,6 @@ void m68000_device::cmpa_l_pais_ad_dfm() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156218,6 +156294,7 @@ void m68000_device::cmpa_l_pais_ad_dfm() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156300,7 +156377,6 @@ void m68000_device::cmpa_l_das_ad_dfm() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156330,6 +156406,7 @@ void m68000_device::cmpa_l_das_ad_dfm() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156450,7 +156527,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156480,6 +156556,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156564,7 +156641,6 @@ void m68000_device::cmpa_l_adr16_ad_dfm() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156594,6 +156670,7 @@ void m68000_device::cmpa_l_adr16_ad_dfm() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156699,7 +156776,6 @@ void m68000_device::cmpa_l_adr32_ad_dfm() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156729,6 +156805,7 @@ void m68000_device::cmpa_l_adr32_ad_dfm() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156810,7 +156887,6 @@ void m68000_device::cmpa_l_dpc_ad_dfm() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156840,6 +156916,7 @@ void m68000_device::cmpa_l_dpc_ad_dfm() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156959,7 +157036,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156989,6 +157065,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157049,7 +157126,6 @@ void m68000_device::cmpa_l_imm32_ad_dfm() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -157079,6 +157155,7 @@ void m68000_device::cmpa_l_imm32_ad_dfm() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157095,7 +157172,6 @@ void m68000_device::and_b_ds_dd_dfm() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -157103,6 +157179,7 @@ void m68000_device::and_b_ds_dd_dfm() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157160,7 +157237,6 @@ void m68000_device::and_b_ais_dd_dfm() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157168,6 +157244,7 @@ void m68000_device::and_b_ais_dd_dfm() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157230,7 +157307,6 @@ void m68000_device::and_b_aips_dd_dfm() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157238,6 +157314,7 @@ void m68000_device::and_b_aips_dd_dfm() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157302,7 +157379,6 @@ void m68000_device::and_b_pais_dd_dfm() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157310,6 +157386,7 @@ void m68000_device::and_b_pais_dd_dfm() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157390,7 +157467,6 @@ void m68000_device::and_b_das_dd_dfm() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157398,6 +157474,7 @@ void m68000_device::and_b_das_dd_dfm() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157518,7 +157595,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157526,6 +157602,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157605,7 +157682,6 @@ void m68000_device::and_b_adr16_dd_dfm() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157613,6 +157689,7 @@ void m68000_device::and_b_adr16_dd_dfm() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157714,7 +157791,6 @@ void m68000_device::and_b_adr32_dd_dfm() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157722,6 +157798,7 @@ void m68000_device::and_b_adr32_dd_dfm() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157801,7 +157878,6 @@ void m68000_device::and_b_dpc_dd_dfm() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157809,6 +157885,7 @@ void m68000_device::and_b_dpc_dd_dfm() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157928,7 +158005,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157936,6 +158012,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -157995,7 +158072,6 @@ void m68000_device::and_b_imm8_dd_dfm() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158003,6 +158079,7 @@ void m68000_device::and_b_imm8_dd_dfm() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158038,7 +158115,6 @@ void m68000_device::and_w_ds_dd_dfm() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158046,6 +158122,7 @@ void m68000_device::and_w_ds_dd_dfm() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158106,7 +158183,6 @@ void m68000_device::and_w_ais_dd_dfm() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158114,6 +158190,7 @@ void m68000_device::and_w_ais_dd_dfm() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158179,7 +158256,6 @@ void m68000_device::and_w_aips_dd_dfm() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158187,6 +158263,7 @@ void m68000_device::and_w_aips_dd_dfm() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158254,7 +158331,6 @@ void m68000_device::and_w_pais_dd_dfm() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158262,6 +158338,7 @@ void m68000_device::and_w_pais_dd_dfm() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158345,7 +158422,6 @@ void m68000_device::and_w_das_dd_dfm() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158353,6 +158429,7 @@ void m68000_device::and_w_das_dd_dfm() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158476,7 +158553,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158484,6 +158560,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158566,7 +158643,6 @@ void m68000_device::and_w_adr16_dd_dfm() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158574,6 +158650,7 @@ void m68000_device::and_w_adr16_dd_dfm() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158678,7 +158755,6 @@ void m68000_device::and_w_adr32_dd_dfm() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158686,6 +158762,7 @@ void m68000_device::and_w_adr32_dd_dfm() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158768,7 +158845,6 @@ void m68000_device::and_w_dpc_dd_dfm() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158776,6 +158852,7 @@ void m68000_device::and_w_dpc_dd_dfm() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158898,7 +158975,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158906,6 +158982,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -158965,7 +159042,6 @@ void m68000_device::and_w_imm16_dd_dfm() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158973,6 +159049,7 @@ void m68000_device::and_w_imm16_dd_dfm() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -159008,7 +159085,6 @@ void m68000_device::and_l_ds_dd_dfm() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159042,6 +159118,7 @@ void m68000_device::and_l_ds_dd_dfm() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159106,7 +159183,6 @@ void m68000_device::and_l_ais_dd_dfm() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159137,6 +159213,7 @@ void m68000_device::and_l_ais_dd_dfm() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159205,7 +159282,6 @@ void m68000_device::and_l_aips_dd_dfm() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159236,6 +159312,7 @@ void m68000_device::and_l_aips_dd_dfm() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159305,7 +159382,6 @@ void m68000_device::and_l_pais_dd_dfm() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159336,6 +159412,7 @@ void m68000_device::and_l_pais_dd_dfm() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159422,7 +159499,6 @@ void m68000_device::and_l_das_dd_dfm() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159453,6 +159529,7 @@ void m68000_device::and_l_das_dd_dfm() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159579,7 +159656,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159610,6 +159686,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159699,7 +159776,6 @@ void m68000_device::and_l_adr16_dd_dfm() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159730,6 +159806,7 @@ void m68000_device::and_l_adr16_dd_dfm() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159841,7 +159918,6 @@ void m68000_device::and_l_adr32_dd_dfm() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159872,6 +159948,7 @@ void m68000_device::and_l_adr32_dd_dfm() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159957,7 +160034,6 @@ void m68000_device::and_l_dpc_dd_dfm() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159988,6 +160064,7 @@ void m68000_device::and_l_dpc_dd_dfm() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160113,7 +160190,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160144,6 +160220,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160208,7 +160285,6 @@ void m68000_device::and_l_imm32_dd_dfm() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160242,6 +160318,7 @@ void m68000_device::and_l_imm32_dd_dfm() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160260,7 +160337,6 @@ void m68000_device::mulu_w_ds_dd_dfm() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -160318,6 +160394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160363,7 +160440,6 @@ void m68000_device::mulu_w_ais_dd_dfm() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160421,6 +160497,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160470,7 +160547,6 @@ void m68000_device::mulu_w_aips_dd_dfm() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160528,6 +160604,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160579,7 +160656,6 @@ void m68000_device::mulu_w_pais_dd_dfm() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160637,6 +160713,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160704,7 +160781,6 @@ void m68000_device::mulu_w_das_dd_dfm() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160762,6 +160838,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160867,7 +160944,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160925,6 +161001,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160991,7 +161068,6 @@ void m68000_device::mulu_w_adr16_dd_dfm() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161049,6 +161125,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161136,7 +161213,6 @@ void m68000_device::mulu_w_adr32_dd_dfm() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161194,6 +161270,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161260,7 +161337,6 @@ void m68000_device::mulu_w_dpc_dd_dfm() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161318,6 +161394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161422,7 +161499,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161480,6 +161556,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161524,7 +161601,6 @@ void m68000_device::mulu_w_imm16_dd_dfm() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -161582,6 +161658,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161603,7 +161680,6 @@ void m68000_device::abcd_ds_dd_dfm() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161632,6 +161708,7 @@ void m68000_device::abcd_ds_dd_dfm() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161676,7 +161753,6 @@ void m68000_device::abcd_pais_paid_dfm() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -161723,6 +161799,7 @@ void m68000_device::abcd_pais_paid_dfm() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161772,7 +161849,6 @@ void m68000_device::and_b_dd_ais_dfm() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -161799,6 +161875,7 @@ void m68000_device::and_b_dd_ais_dfm() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161854,7 +161931,6 @@ void m68000_device::and_b_dd_aips_dfm() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -161881,6 +161957,7 @@ void m68000_device::and_b_dd_aips_dfm() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161938,7 +162015,6 @@ void m68000_device::and_b_dd_pais_dfm() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -161965,6 +162041,7 @@ void m68000_device::and_b_dd_pais_dfm() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162038,7 +162115,6 @@ void m68000_device::and_b_dd_das_dfm() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162065,6 +162141,7 @@ void m68000_device::and_b_dd_das_dfm() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162178,7 +162255,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162205,6 +162281,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162277,7 +162354,6 @@ void m68000_device::and_b_dd_adr16_dfm() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162304,6 +162380,7 @@ void m68000_device::and_b_dd_adr16_dfm() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162398,7 +162475,6 @@ void m68000_device::and_b_dd_adr32_dfm() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162425,6 +162501,7 @@ void m68000_device::and_b_dd_adr32_dfm() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162453,7 +162530,6 @@ void m68000_device::exg_dd_ds_dfm() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162481,6 +162557,7 @@ void m68000_device::exg_dd_ds_dfm() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162497,7 +162574,6 @@ void m68000_device::exg_ad_as_dfm() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162525,6 +162601,7 @@ void m68000_device::exg_ad_as_dfm() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162566,7 +162643,6 @@ void m68000_device::and_w_dd_ais_dfm() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162593,6 +162669,7 @@ void m68000_device::and_w_dd_ais_dfm() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -162656,7 +162733,6 @@ void m68000_device::and_w_dd_aips_dfm() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162683,6 +162759,7 @@ void m68000_device::and_w_dd_aips_dfm() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -162748,7 +162825,6 @@ void m68000_device::and_w_dd_pais_dfm() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162775,6 +162851,7 @@ void m68000_device::and_w_dd_pais_dfm() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -162856,7 +162933,6 @@ void m68000_device::and_w_dd_das_dfm() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -162883,6 +162959,7 @@ void m68000_device::and_w_dd_das_dfm() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163004,7 +163081,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163031,6 +163107,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163111,7 +163188,6 @@ void m68000_device::and_w_dd_adr16_dfm() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163138,6 +163214,7 @@ void m68000_device::and_w_dd_adr16_dfm() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163240,7 +163317,6 @@ void m68000_device::and_w_dd_adr32_dfm() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163267,6 +163343,7 @@ void m68000_device::and_w_dd_adr32_dfm() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163300,7 +163377,6 @@ void m68000_device::exg_dd_as_dfm() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -163328,6 +163404,7 @@ void m68000_device::exg_dd_as_dfm() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -163390,7 +163467,6 @@ void m68000_device::and_l_dd_ais_dfm() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163440,6 +163516,7 @@ void m68000_device::and_l_dd_ais_dfm() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163523,7 +163600,6 @@ void m68000_device::and_l_dd_aips_dfm() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163573,6 +163649,7 @@ void m68000_device::and_l_dd_aips_dfm() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163657,7 +163734,6 @@ void m68000_device::and_l_dd_pais_dfm() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163707,6 +163783,7 @@ void m68000_device::and_l_dd_pais_dfm() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163808,7 +163885,6 @@ void m68000_device::and_l_dd_das_dfm() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -163858,6 +163934,7 @@ void m68000_device::and_l_dd_das_dfm() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -163999,7 +164076,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -164049,6 +164125,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -164153,7 +164230,6 @@ void m68000_device::and_l_dd_adr16_dfm() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -164203,6 +164279,7 @@ void m68000_device::and_l_dd_adr16_dfm() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -164329,7 +164406,6 @@ void m68000_device::and_l_dd_adr32_dfm() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -164379,6 +164455,7 @@ void m68000_device::and_l_dd_adr32_dfm() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -164412,7 +164489,6 @@ void m68000_device::muls_w_ds_dd_dfm() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -164472,6 +164548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164524,7 +164601,6 @@ void m68000_device::muls_w_ais_dd_dfm() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164584,6 +164660,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164640,7 +164717,6 @@ void m68000_device::muls_w_aips_dd_dfm() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164700,6 +164776,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164758,7 +164835,6 @@ void m68000_device::muls_w_pais_dd_dfm() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164818,6 +164894,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164892,7 +164969,6 @@ void m68000_device::muls_w_das_dd_dfm() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164952,6 +165028,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165064,7 +165141,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165124,6 +165200,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165197,7 +165274,6 @@ void m68000_device::muls_w_adr16_dd_dfm() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165257,6 +165333,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165351,7 +165428,6 @@ void m68000_device::muls_w_adr32_dd_dfm() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165411,6 +165487,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165484,7 +165561,6 @@ void m68000_device::muls_w_dpc_dd_dfm() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165544,6 +165620,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165655,7 +165732,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165715,6 +165791,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165766,7 +165843,6 @@ void m68000_device::muls_w_imm16_dd_dfm() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -165826,6 +165902,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165854,7 +165931,6 @@ void m68000_device::add_b_ds_dd_dfm() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165862,6 +165938,7 @@ void m68000_device::add_b_ds_dd_dfm() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -165917,7 +165994,6 @@ void m68000_device::add_b_ais_dd_dfm() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165925,6 +166001,7 @@ void m68000_device::add_b_ais_dd_dfm() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -165984,7 +166061,6 @@ void m68000_device::add_b_aips_dd_dfm() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165992,6 +166068,7 @@ void m68000_device::add_b_aips_dd_dfm() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166053,7 +166130,6 @@ void m68000_device::add_b_pais_dd_dfm() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166061,6 +166137,7 @@ void m68000_device::add_b_pais_dd_dfm() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166138,7 +166215,6 @@ void m68000_device::add_b_das_dd_dfm() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166146,6 +166222,7 @@ void m68000_device::add_b_das_dd_dfm() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166261,7 +166338,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166269,6 +166345,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166345,7 +166422,6 @@ void m68000_device::add_b_adr16_dd_dfm() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166353,6 +166429,7 @@ void m68000_device::add_b_adr16_dd_dfm() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166450,7 +166527,6 @@ void m68000_device::add_b_adr32_dd_dfm() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166458,6 +166534,7 @@ void m68000_device::add_b_adr32_dd_dfm() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166534,7 +166611,6 @@ void m68000_device::add_b_dpc_dd_dfm() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166542,6 +166618,7 @@ void m68000_device::add_b_dpc_dd_dfm() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166656,7 +166733,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166664,6 +166740,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166721,7 +166798,6 @@ void m68000_device::add_b_imm8_dd_dfm() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -166729,6 +166805,7 @@ void m68000_device::add_b_imm8_dd_dfm() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166763,7 +166840,6 @@ void m68000_device::add_w_ds_dd_dfm() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -166771,6 +166847,7 @@ void m68000_device::add_w_ds_dd_dfm() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166805,7 +166882,6 @@ void m68000_device::add_w_as_dd_dfm() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -166813,6 +166889,7 @@ void m68000_device::add_w_as_dd_dfm() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166871,7 +166948,6 @@ void m68000_device::add_w_ais_dd_dfm() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166879,6 +166955,7 @@ void m68000_device::add_w_ais_dd_dfm() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -166941,7 +167018,6 @@ void m68000_device::add_w_aips_dd_dfm() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166949,6 +167025,7 @@ void m68000_device::add_w_aips_dd_dfm() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167013,7 +167090,6 @@ void m68000_device::add_w_pais_dd_dfm() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167021,6 +167097,7 @@ void m68000_device::add_w_pais_dd_dfm() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167101,7 +167178,6 @@ void m68000_device::add_w_das_dd_dfm() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167109,6 +167185,7 @@ void m68000_device::add_w_das_dd_dfm() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167227,7 +167304,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167235,6 +167311,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167314,7 +167391,6 @@ void m68000_device::add_w_adr16_dd_dfm() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167322,6 +167398,7 @@ void m68000_device::add_w_adr16_dd_dfm() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167422,7 +167499,6 @@ void m68000_device::add_w_adr32_dd_dfm() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167430,6 +167506,7 @@ void m68000_device::add_w_adr32_dd_dfm() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167509,7 +167586,6 @@ void m68000_device::add_w_dpc_dd_dfm() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167517,6 +167593,7 @@ void m68000_device::add_w_dpc_dd_dfm() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167634,7 +167711,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167642,6 +167718,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167699,7 +167776,6 @@ void m68000_device::add_w_imm16_dd_dfm() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -167707,6 +167783,7 @@ void m68000_device::add_w_imm16_dd_dfm() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -167741,7 +167818,6 @@ void m68000_device::add_l_ds_dd_dfm() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -167774,6 +167850,7 @@ void m68000_device::add_l_ds_dd_dfm() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167791,7 +167868,6 @@ void m68000_device::add_l_as_dd_dfm() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -167824,6 +167900,7 @@ void m68000_device::add_l_as_dd_dfm() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167886,7 +167963,6 @@ void m68000_device::add_l_ais_dd_dfm() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167917,6 +167993,7 @@ void m68000_device::add_l_ais_dd_dfm() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167982,7 +168059,6 @@ void m68000_device::add_l_aips_dd_dfm() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168013,6 +168089,7 @@ void m68000_device::add_l_aips_dd_dfm() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168079,7 +168156,6 @@ void m68000_device::add_l_pais_dd_dfm() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168110,6 +168186,7 @@ void m68000_device::add_l_pais_dd_dfm() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168193,7 +168270,6 @@ void m68000_device::add_l_das_dd_dfm() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168224,6 +168300,7 @@ void m68000_device::add_l_das_dd_dfm() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168345,7 +168422,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168376,6 +168452,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168461,7 +168538,6 @@ void m68000_device::add_l_adr16_dd_dfm() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168492,6 +168568,7 @@ void m68000_device::add_l_adr16_dd_dfm() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168598,7 +168675,6 @@ void m68000_device::add_l_adr32_dd_dfm() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168629,6 +168705,7 @@ void m68000_device::add_l_adr32_dd_dfm() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168711,7 +168788,6 @@ void m68000_device::add_l_dpc_dd_dfm() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168742,6 +168818,7 @@ void m68000_device::add_l_dpc_dd_dfm() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168862,7 +168939,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168893,6 +168969,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168954,7 +169031,6 @@ void m68000_device::add_l_imm32_dd_dfm() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -168987,6 +169063,7 @@ void m68000_device::add_l_imm32_dd_dfm() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169004,7 +169081,6 @@ void m68000_device::adda_w_ds_ad_dfm() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -169035,6 +169111,7 @@ void m68000_device::adda_w_ds_ad_dfm() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169052,7 +169129,6 @@ void m68000_device::adda_w_as_ad_dfm() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -169083,6 +169159,7 @@ void m68000_device::adda_w_as_ad_dfm() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169124,7 +169201,6 @@ void m68000_device::adda_w_ais_ad_dfm() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169155,6 +169231,7 @@ void m68000_device::adda_w_ais_ad_dfm() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169200,7 +169277,6 @@ void m68000_device::adda_w_aips_ad_dfm() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169231,6 +169307,7 @@ void m68000_device::adda_w_aips_ad_dfm() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169278,7 +169355,6 @@ void m68000_device::adda_w_pais_ad_dfm() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169309,6 +169385,7 @@ void m68000_device::adda_w_pais_ad_dfm() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169372,7 +169449,6 @@ void m68000_device::adda_w_das_ad_dfm() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169403,6 +169479,7 @@ void m68000_device::adda_w_das_ad_dfm() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169504,7 +169581,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169535,6 +169611,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169597,7 +169674,6 @@ void m68000_device::adda_w_adr16_ad_dfm() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169628,6 +169704,7 @@ void m68000_device::adda_w_adr16_ad_dfm() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169711,7 +169788,6 @@ void m68000_device::adda_w_adr32_ad_dfm() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169742,6 +169818,7 @@ void m68000_device::adda_w_adr32_ad_dfm() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169804,7 +169881,6 @@ void m68000_device::adda_w_dpc_ad_dfm() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169835,6 +169911,7 @@ void m68000_device::adda_w_dpc_ad_dfm() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169935,7 +170012,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169966,6 +170042,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170006,7 +170083,6 @@ void m68000_device::adda_w_imm16_ad_dfm() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -170037,6 +170113,7 @@ void m68000_device::adda_w_imm16_ad_dfm() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170054,7 +170131,6 @@ void m68000_device::addx_b_ds_dd_dfm() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170062,6 +170138,7 @@ void m68000_device::addx_b_ds_dd_dfm() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170126,7 +170203,6 @@ void m68000_device::addx_b_pais_paid_dfm() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -170172,6 +170248,7 @@ void m68000_device::addx_b_pais_paid_dfm() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170221,7 +170298,6 @@ void m68000_device::add_b_dd_ais_dfm() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170248,6 +170324,7 @@ void m68000_device::add_b_dd_ais_dfm() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170300,7 +170377,6 @@ void m68000_device::add_b_dd_aips_dfm() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170327,6 +170403,7 @@ void m68000_device::add_b_dd_aips_dfm() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170381,7 +170458,6 @@ void m68000_device::add_b_dd_pais_dfm() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170408,6 +170484,7 @@ void m68000_device::add_b_dd_pais_dfm() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170478,7 +170555,6 @@ void m68000_device::add_b_dd_das_dfm() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170505,6 +170581,7 @@ void m68000_device::add_b_dd_das_dfm() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170613,7 +170690,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170640,6 +170716,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170709,7 +170786,6 @@ void m68000_device::add_b_dd_adr16_dfm() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170736,6 +170812,7 @@ void m68000_device::add_b_dd_adr16_dfm() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170826,7 +170903,6 @@ void m68000_device::add_b_dd_adr32_dfm() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170853,6 +170929,7 @@ void m68000_device::add_b_dd_adr32_dfm() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170880,7 +170957,6 @@ void m68000_device::addx_w_ds_dd_dfm() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170888,6 +170964,7 @@ void m68000_device::addx_w_ds_dd_dfm() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -170955,7 +171032,6 @@ void m68000_device::addx_w_pais_paid_dfm() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171004,6 +171080,7 @@ void m68000_device::addx_w_pais_paid_dfm() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171061,7 +171138,6 @@ void m68000_device::add_w_dd_ais_dfm() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171088,6 +171164,7 @@ void m68000_device::add_w_dd_ais_dfm() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171148,7 +171225,6 @@ void m68000_device::add_w_dd_aips_dfm() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171175,6 +171251,7 @@ void m68000_device::add_w_dd_aips_dfm() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171237,7 +171314,6 @@ void m68000_device::add_w_dd_pais_dfm() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171264,6 +171340,7 @@ void m68000_device::add_w_dd_pais_dfm() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171342,7 +171419,6 @@ void m68000_device::add_w_dd_das_dfm() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171369,6 +171445,7 @@ void m68000_device::add_w_dd_das_dfm() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171485,7 +171562,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171512,6 +171588,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171589,7 +171666,6 @@ void m68000_device::add_w_dd_adr16_dfm() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171616,6 +171692,7 @@ void m68000_device::add_w_dd_adr16_dfm() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171714,7 +171791,6 @@ void m68000_device::add_w_dd_adr32_dfm() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -171741,6 +171817,7 @@ void m68000_device::add_w_dd_adr32_dfm() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171773,7 +171850,6 @@ void m68000_device::addx_l_ds_dd_dfm() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -171807,6 +171883,7 @@ void m68000_device::addx_l_ds_dd_dfm() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -171926,7 +172003,6 @@ void m68000_device::addx_l_pais_paid_dfm() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -171973,6 +172049,7 @@ void m68000_device::addx_l_pais_paid_dfm() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172051,7 +172128,6 @@ void m68000_device::add_l_dd_ais_dfm() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172101,6 +172177,7 @@ void m68000_device::add_l_dd_ais_dfm() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172181,7 +172258,6 @@ void m68000_device::add_l_dd_aips_dfm() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172231,6 +172307,7 @@ void m68000_device::add_l_dd_aips_dfm() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172312,7 +172389,6 @@ void m68000_device::add_l_dd_pais_dfm() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172362,6 +172438,7 @@ void m68000_device::add_l_dd_pais_dfm() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172460,7 +172537,6 @@ void m68000_device::add_l_dd_das_dfm() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172510,6 +172586,7 @@ void m68000_device::add_l_dd_das_dfm() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172646,7 +172723,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172696,6 +172772,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172796,7 +172873,6 @@ void m68000_device::add_l_dd_adr16_dfm() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -172846,6 +172922,7 @@ void m68000_device::add_l_dd_adr16_dfm() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -172967,7 +173044,6 @@ void m68000_device::add_l_dd_adr32_dfm() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes.read_interruptible(m_aob & ~1); m_icount -= 4; @@ -173017,6 +173093,7 @@ void m68000_device::add_l_dd_adr32_dfm() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -173049,7 +173126,6 @@ void m68000_device::adda_l_ds_ad_dfm() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -173080,6 +173156,7 @@ void m68000_device::adda_l_ds_ad_dfm() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173097,7 +173174,6 @@ void m68000_device::adda_l_as_ad_dfm() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -173128,6 +173204,7 @@ void m68000_device::adda_l_as_ad_dfm() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173190,7 +173267,6 @@ void m68000_device::adda_l_ais_ad_dfm() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173219,6 +173295,7 @@ void m68000_device::adda_l_ais_ad_dfm() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173284,7 +173361,6 @@ void m68000_device::adda_l_aips_ad_dfm() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173313,6 +173389,7 @@ void m68000_device::adda_l_aips_ad_dfm() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173379,7 +173456,6 @@ void m68000_device::adda_l_pais_ad_dfm() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173408,6 +173484,7 @@ void m68000_device::adda_l_pais_ad_dfm() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173491,7 +173568,6 @@ void m68000_device::adda_l_das_ad_dfm() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173520,6 +173596,7 @@ void m68000_device::adda_l_das_ad_dfm() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173641,7 +173718,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173670,6 +173746,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173755,7 +173832,6 @@ void m68000_device::adda_l_adr16_ad_dfm() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173784,6 +173860,7 @@ void m68000_device::adda_l_adr16_ad_dfm() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173890,7 +173967,6 @@ void m68000_device::adda_l_adr32_ad_dfm() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173919,6 +173995,7 @@ void m68000_device::adda_l_adr32_ad_dfm() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174001,7 +174078,6 @@ void m68000_device::adda_l_dpc_ad_dfm() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174030,6 +174106,7 @@ void m68000_device::adda_l_dpc_ad_dfm() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174150,7 +174227,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174179,6 +174255,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174240,7 +174317,6 @@ void m68000_device::adda_l_imm32_ad_dfm() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -174271,6 +174347,7 @@ void m68000_device::adda_l_imm32_ad_dfm() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174287,7 +174364,6 @@ void m68000_device::asr_b_imm3_ds_dfm() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174336,6 +174412,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174352,7 +174429,6 @@ void m68000_device::lsr_b_imm3_ds_dfm() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174401,6 +174477,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174417,7 +174494,6 @@ void m68000_device::roxr_b_imm3_ds_dfm() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174466,6 +174542,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174482,7 +174559,6 @@ void m68000_device::ror_b_imm3_ds_dfm() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174531,6 +174607,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174548,7 +174625,6 @@ void m68000_device::asr_b_dd_ds_dfm() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174597,6 +174673,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174614,7 +174691,6 @@ void m68000_device::lsr_b_dd_ds_dfm() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174663,6 +174739,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174680,7 +174757,6 @@ void m68000_device::roxr_b_dd_ds_dfm() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174729,6 +174805,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174746,7 +174823,6 @@ void m68000_device::ror_b_dd_ds_dfm() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174795,6 +174871,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174811,7 +174888,6 @@ void m68000_device::asr_w_imm3_ds_dfm() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174860,6 +174936,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174876,7 +174953,6 @@ void m68000_device::lsr_w_imm3_ds_dfm() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174925,6 +175001,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174941,7 +175018,6 @@ void m68000_device::roxr_w_imm3_ds_dfm() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174990,6 +175066,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175006,7 +175083,6 @@ void m68000_device::ror_w_imm3_ds_dfm() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175055,6 +175131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175072,7 +175149,6 @@ void m68000_device::asr_w_dd_ds_dfm() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175121,6 +175197,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175138,7 +175215,6 @@ void m68000_device::lsr_w_dd_ds_dfm() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175187,6 +175263,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175204,7 +175281,6 @@ void m68000_device::roxr_w_dd_ds_dfm() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175253,6 +175329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175270,7 +175347,6 @@ void m68000_device::ror_w_dd_ds_dfm() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175319,6 +175395,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175335,7 +175412,6 @@ void m68000_device::asr_l_imm3_ds_dfm() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175388,6 +175464,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175406,7 +175483,6 @@ void m68000_device::lsr_l_imm3_ds_dfm() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175459,6 +175535,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175477,7 +175554,6 @@ void m68000_device::roxr_l_imm3_ds_dfm() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175530,6 +175606,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175548,7 +175625,6 @@ void m68000_device::ror_l_imm3_ds_dfm() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175601,6 +175677,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175620,7 +175697,6 @@ void m68000_device::asr_l_dd_ds_dfm() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175673,6 +175749,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175692,7 +175769,6 @@ void m68000_device::lsr_l_dd_ds_dfm() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175745,6 +175821,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175764,7 +175841,6 @@ void m68000_device::roxr_l_dd_ds_dfm() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175817,6 +175893,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175836,7 +175913,6 @@ void m68000_device::ror_l_dd_ds_dfm() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175889,6 +175965,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175932,7 +176009,6 @@ void m68000_device::asr_ais_dfm() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -175964,6 +176040,7 @@ void m68000_device::asr_ais_dfm() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176024,7 +176101,6 @@ void m68000_device::asr_aips_dfm() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176056,6 +176132,7 @@ void m68000_device::asr_aips_dfm() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176118,7 +176195,6 @@ void m68000_device::asr_pais_dfm() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176150,6 +176226,7 @@ void m68000_device::asr_pais_dfm() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176228,7 +176305,6 @@ void m68000_device::asr_das_dfm() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176260,6 +176336,7 @@ void m68000_device::asr_das_dfm() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176376,7 +176453,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176408,6 +176484,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176485,7 +176562,6 @@ void m68000_device::asr_adr16_dfm() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176517,6 +176593,7 @@ void m68000_device::asr_adr16_dfm() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176615,7 +176692,6 @@ void m68000_device::asr_adr32_dfm() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176647,6 +176723,7 @@ void m68000_device::asr_adr32_dfm() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -176678,7 +176755,6 @@ void m68000_device::asl_b_imm3_ds_dfm() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176727,6 +176803,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176743,7 +176820,6 @@ void m68000_device::lsl_b_imm3_ds_dfm() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176792,6 +176868,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -176809,7 +176886,6 @@ void m68000_device::roxl_b_imm3_ds_dfm() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -176858,6 +176934,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176874,7 +176951,6 @@ void m68000_device::rol_b_imm3_ds_dfm() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176923,6 +176999,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176940,7 +177017,6 @@ void m68000_device::asl_b_dd_ds_dfm() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176989,6 +177065,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177006,7 +177083,6 @@ void m68000_device::lsl_b_dd_ds_dfm() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177055,6 +177131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -177073,7 +177150,6 @@ void m68000_device::roxl_b_dd_ds_dfm() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177122,6 +177198,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177139,7 +177216,6 @@ void m68000_device::rol_b_dd_ds_dfm() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177188,6 +177264,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177204,7 +177281,6 @@ void m68000_device::asl_w_imm3_ds_dfm() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177253,6 +177329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177269,7 +177346,6 @@ void m68000_device::lsl_w_imm3_ds_dfm() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177318,6 +177394,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177335,7 +177412,6 @@ void m68000_device::roxl_w_imm3_ds_dfm() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177384,6 +177460,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177400,7 +177477,6 @@ void m68000_device::rol_w_imm3_ds_dfm() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177449,6 +177525,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177466,7 +177543,6 @@ void m68000_device::asl_w_dd_ds_dfm() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177515,6 +177591,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177532,7 +177609,6 @@ void m68000_device::lsl_w_dd_ds_dfm() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177581,6 +177657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177599,7 +177676,6 @@ void m68000_device::roxl_w_dd_ds_dfm() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177648,6 +177724,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177665,7 +177742,6 @@ void m68000_device::rol_w_dd_ds_dfm() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177714,6 +177790,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177730,7 +177807,6 @@ void m68000_device::asl_l_imm3_ds_dfm() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177783,6 +177859,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177801,7 +177878,6 @@ void m68000_device::lsl_l_imm3_ds_dfm() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177856,6 +177932,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177874,7 +177951,6 @@ void m68000_device::roxl_l_imm3_ds_dfm() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177927,6 +178003,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -177945,7 +178022,6 @@ void m68000_device::rol_l_imm3_ds_dfm() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177998,6 +178074,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178017,7 +178094,6 @@ void m68000_device::asl_l_dd_ds_dfm() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178070,6 +178146,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178089,7 +178166,6 @@ void m68000_device::lsl_l_dd_ds_dfm() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178144,6 +178220,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178163,7 +178240,6 @@ void m68000_device::roxl_l_dd_ds_dfm() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -178216,6 +178292,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -178235,7 +178312,6 @@ void m68000_device::rol_l_dd_ds_dfm() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178288,6 +178364,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178331,7 +178408,6 @@ void m68000_device::asl_ais_dfm() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178363,6 +178439,7 @@ void m68000_device::asl_ais_dfm() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178423,7 +178500,6 @@ void m68000_device::asl_aips_dfm() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178455,6 +178531,7 @@ void m68000_device::asl_aips_dfm() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178517,7 +178594,6 @@ void m68000_device::asl_pais_dfm() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178549,6 +178625,7 @@ void m68000_device::asl_pais_dfm() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178627,7 +178704,6 @@ void m68000_device::asl_das_dfm() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178659,6 +178735,7 @@ void m68000_device::asl_das_dfm() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178775,7 +178852,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178807,6 +178883,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -178884,7 +178961,6 @@ void m68000_device::asl_adr16_dfm() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178916,6 +178992,7 @@ void m68000_device::asl_adr16_dfm() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179014,7 +179091,6 @@ void m68000_device::asl_adr32_dfm() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179046,6 +179122,7 @@ void m68000_device::asl_adr32_dfm() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179102,7 +179179,6 @@ void m68000_device::lsr_ais_dfm() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179134,6 +179210,7 @@ void m68000_device::lsr_ais_dfm() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179194,7 +179271,6 @@ void m68000_device::lsr_aips_dfm() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179226,6 +179302,7 @@ void m68000_device::lsr_aips_dfm() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179288,7 +179365,6 @@ void m68000_device::lsr_pais_dfm() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179320,6 +179396,7 @@ void m68000_device::lsr_pais_dfm() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179398,7 +179475,6 @@ void m68000_device::lsr_das_dfm() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179430,6 +179506,7 @@ void m68000_device::lsr_das_dfm() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179546,7 +179623,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179578,6 +179654,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179655,7 +179732,6 @@ void m68000_device::lsr_adr16_dfm() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179687,6 +179763,7 @@ void m68000_device::lsr_adr16_dfm() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179785,7 +179862,6 @@ void m68000_device::lsr_adr32_dfm() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179817,6 +179893,7 @@ void m68000_device::lsr_adr32_dfm() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179874,7 +179951,6 @@ void m68000_device::lsl_ais_dfm() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179906,6 +179982,7 @@ void m68000_device::lsl_ais_dfm() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -179969,7 +180046,6 @@ void m68000_device::lsl_aips_dfm() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180001,6 +180077,7 @@ void m68000_device::lsl_aips_dfm() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180066,7 +180143,6 @@ void m68000_device::lsl_pais_dfm() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180098,6 +180174,7 @@ void m68000_device::lsl_pais_dfm() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180179,7 +180256,6 @@ void m68000_device::lsl_das_dfm() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180211,6 +180287,7 @@ void m68000_device::lsl_das_dfm() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180332,7 +180409,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180364,6 +180440,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180444,7 +180521,6 @@ void m68000_device::lsl_adr16_dfm() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180476,6 +180552,7 @@ void m68000_device::lsl_adr16_dfm() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180578,7 +180655,6 @@ void m68000_device::lsl_adr32_dfm() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180610,6 +180686,7 @@ void m68000_device::lsl_adr32_dfm() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180667,7 +180744,6 @@ void m68000_device::roxr_ais_dfm() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180699,6 +180775,7 @@ void m68000_device::roxr_ais_dfm() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180759,7 +180836,6 @@ void m68000_device::roxr_aips_dfm() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180791,6 +180867,7 @@ void m68000_device::roxr_aips_dfm() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180853,7 +180930,6 @@ void m68000_device::roxr_pais_dfm() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180885,6 +180961,7 @@ void m68000_device::roxr_pais_dfm() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -180963,7 +181040,6 @@ void m68000_device::roxr_das_dfm() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180995,6 +181071,7 @@ void m68000_device::roxr_das_dfm() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181111,7 +181188,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181143,6 +181219,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181220,7 +181297,6 @@ void m68000_device::roxr_adr16_dfm() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181252,6 +181328,7 @@ void m68000_device::roxr_adr16_dfm() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181350,7 +181427,6 @@ void m68000_device::roxr_adr32_dfm() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181382,6 +181458,7 @@ void m68000_device::roxr_adr32_dfm() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181438,7 +181515,6 @@ void m68000_device::roxl_ais_dfm() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181470,6 +181546,7 @@ void m68000_device::roxl_ais_dfm() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181530,7 +181607,6 @@ void m68000_device::roxl_aips_dfm() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181562,6 +181638,7 @@ void m68000_device::roxl_aips_dfm() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181624,7 +181701,6 @@ void m68000_device::roxl_pais_dfm() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181656,6 +181732,7 @@ void m68000_device::roxl_pais_dfm() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181734,7 +181811,6 @@ void m68000_device::roxl_das_dfm() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181766,6 +181842,7 @@ void m68000_device::roxl_das_dfm() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181882,7 +181959,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181914,6 +181990,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -181991,7 +182068,6 @@ void m68000_device::roxl_adr16_dfm() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182023,6 +182099,7 @@ void m68000_device::roxl_adr16_dfm() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182121,7 +182198,6 @@ void m68000_device::roxl_adr32_dfm() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182153,6 +182229,7 @@ void m68000_device::roxl_adr32_dfm() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182209,7 +182286,6 @@ void m68000_device::ror_ais_dfm() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182241,6 +182317,7 @@ void m68000_device::ror_ais_dfm() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182301,7 +182378,6 @@ void m68000_device::ror_aips_dfm() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182333,6 +182409,7 @@ void m68000_device::ror_aips_dfm() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182395,7 +182472,6 @@ void m68000_device::ror_pais_dfm() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182427,6 +182503,7 @@ void m68000_device::ror_pais_dfm() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182505,7 +182582,6 @@ void m68000_device::ror_das_dfm() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182537,6 +182613,7 @@ void m68000_device::ror_das_dfm() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182653,7 +182730,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182685,6 +182761,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182762,7 +182839,6 @@ void m68000_device::ror_adr16_dfm() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182794,6 +182870,7 @@ void m68000_device::ror_adr16_dfm() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182892,7 +182969,6 @@ void m68000_device::ror_adr32_dfm() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182924,6 +183000,7 @@ void m68000_device::ror_adr32_dfm() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -182980,7 +183057,6 @@ void m68000_device::rol_ais_dfm() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183012,6 +183088,7 @@ void m68000_device::rol_ais_dfm() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183072,7 +183149,6 @@ void m68000_device::rol_aips_dfm() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183104,6 +183180,7 @@ void m68000_device::rol_aips_dfm() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183166,7 +183243,6 @@ void m68000_device::rol_pais_dfm() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183198,6 +183274,7 @@ void m68000_device::rol_pais_dfm() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183276,7 +183353,6 @@ void m68000_device::rol_das_dfm() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183308,6 +183384,7 @@ void m68000_device::rol_das_dfm() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183424,7 +183501,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183456,6 +183532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183533,7 +183610,6 @@ void m68000_device::rol_adr16_dfm() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183565,6 +183641,7 @@ void m68000_device::rol_adr16_dfm() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); @@ -183663,7 +183740,6 @@ void m68000_device::rol_adr32_dfm() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183695,6 +183771,7 @@ void m68000_device::rol_adr32_dfm() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_program.write_interruptible(m_aob & ~1, m_dbout); diff --git a/src/devices/cpu/m68000/m68000-sdp.cpp b/src/devices/cpu/m68000/m68000-sdp.cpp index f4de2588d93..f8edeb58321 100644 --- a/src/devices/cpu/m68000/m68000-sdp.cpp +++ b/src/devices/cpu/m68000/m68000-sdp.cpp @@ -12,6 +12,7 @@ void m68000_device::state_reset_dp() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156,11 +157,11 @@ void m68000_device::state_reset_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -291,6 +292,7 @@ void m68000_device::state_bus_error_dp() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -470,11 +472,11 @@ void m68000_device::state_bus_error_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -605,6 +607,7 @@ void m68000_device::state_address_error_dp() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -784,11 +787,11 @@ void m68000_device::state_address_error_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -903,10 +906,10 @@ void m68000_device::state_interrupt_dp() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -1040,11 +1043,11 @@ void m68000_device::state_interrupt_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1248,11 +1251,11 @@ void m68000_device::state_trace_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1456,11 +1459,11 @@ void m68000_device::state_illegal_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1664,11 +1667,11 @@ void m68000_device::state_priviledge_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1872,11 +1875,11 @@ void m68000_device::state_linea_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2080,11 +2083,11 @@ void m68000_device::state_linef_dp() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2150,13 +2153,13 @@ void m68000_device::ori_b_imm8_ds_dp() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2249,7 +2252,6 @@ void m68000_device::ori_b_imm8_ais_dp() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2279,6 +2281,7 @@ void m68000_device::ori_b_imm8_ais_dp() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2368,7 +2371,6 @@ void m68000_device::ori_b_imm8_aips_dp() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2398,6 +2400,7 @@ void m68000_device::ori_b_imm8_aips_dp() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2489,7 +2492,6 @@ void m68000_device::ori_b_imm8_pais_dp() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2519,6 +2521,7 @@ void m68000_device::ori_b_imm8_pais_dp() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2629,7 +2632,6 @@ void m68000_device::ori_b_imm8_das_dp() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2659,6 +2661,7 @@ void m68000_device::ori_b_imm8_das_dp() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2812,7 +2815,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2842,6 +2844,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2951,7 +2954,6 @@ void m68000_device::ori_b_imm8_adr16_dp() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2981,6 +2983,7 @@ void m68000_device::ori_b_imm8_adr16_dp() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -3115,7 +3118,6 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3145,6 +3147,7 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -3251,12 +3254,12 @@ void m68000_device::ori_imm8_ccr_dp() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3323,13 +3326,13 @@ void m68000_device::ori_w_imm16_ds_dp() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3426,7 +3429,6 @@ void m68000_device::ori_w_imm16_ais_dp() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3456,6 +3458,7 @@ void m68000_device::ori_w_imm16_ais_dp() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3555,7 +3558,6 @@ void m68000_device::ori_w_imm16_aips_dp() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3585,6 +3587,7 @@ void m68000_device::ori_w_imm16_aips_dp() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3686,7 +3689,6 @@ void m68000_device::ori_w_imm16_pais_dp() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3716,6 +3718,7 @@ void m68000_device::ori_w_imm16_pais_dp() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3836,7 +3839,6 @@ void m68000_device::ori_w_imm16_das_dp() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3866,6 +3868,7 @@ void m68000_device::ori_w_imm16_das_dp() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4029,7 +4032,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4059,6 +4061,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4178,7 +4181,6 @@ void m68000_device::ori_w_imm16_adr16_dp() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4208,6 +4210,7 @@ void m68000_device::ori_w_imm16_adr16_dp() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4352,7 +4355,6 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4382,6 +4384,7 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -4500,12 +4503,12 @@ void m68000_device::ori_i16u_sr_dp() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4597,7 +4600,6 @@ void m68000_device::ori_l_imm32_ds_dp() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4633,6 +4635,7 @@ void m68000_device::ori_l_imm32_ds_dp() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4758,7 +4761,6 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4814,6 +4816,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -4961,7 +4964,6 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5017,6 +5019,7 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5165,7 +5168,6 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5221,6 +5223,7 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5389,7 +5392,6 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5445,6 +5447,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5656,7 +5659,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5712,6 +5714,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5883,7 +5886,6 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5939,6 +5941,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -6135,7 +6138,6 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6191,6 +6193,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -6231,7 +6234,6 @@ void m68000_device::btst_dd_ds_dp() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6272,6 +6274,7 @@ void m68000_device::btst_dd_ds_dp() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6286,6 +6289,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -6353,7 +6357,6 @@ void m68000_device::movep_w_das_dd_dp() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -6375,6 +6378,7 @@ void m68000_device::movep_w_das_dd_dp() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6442,7 +6446,6 @@ void m68000_device::btst_dd_ais_dp() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6450,6 +6453,7 @@ void m68000_device::btst_dd_ais_dp() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6519,7 +6523,6 @@ void m68000_device::btst_dd_aips_dp() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6527,6 +6530,7 @@ void m68000_device::btst_dd_aips_dp() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6598,7 +6602,6 @@ void m68000_device::btst_dd_pais_dp() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6606,6 +6609,7 @@ void m68000_device::btst_dd_pais_dp() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6696,7 +6700,6 @@ void m68000_device::btst_dd_das_dp() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6704,6 +6707,7 @@ void m68000_device::btst_dd_das_dp() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6837,7 +6841,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6845,6 +6848,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6934,7 +6938,6 @@ void m68000_device::btst_dd_adr16_dp() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6942,6 +6945,7 @@ void m68000_device::btst_dd_adr16_dp() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7056,7 +7060,6 @@ void m68000_device::btst_dd_adr32_dp() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7064,6 +7067,7 @@ void m68000_device::btst_dd_adr32_dp() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7153,7 +7157,6 @@ void m68000_device::btst_dd_dpc_dp() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7161,6 +7164,7 @@ void m68000_device::btst_dd_dpc_dp() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7293,7 +7297,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7301,6 +7304,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7368,7 +7372,6 @@ void m68000_device::btst_dd_imm_dp() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -7407,6 +7410,7 @@ void m68000_device::btst_dd_imm_dp() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -7421,6 +7425,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -7443,7 +7448,6 @@ void m68000_device::bchg_dd_ds_dp() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7484,6 +7488,7 @@ void m68000_device::bchg_dd_ds_dp() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7503,6 +7508,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7612,7 +7618,6 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -7634,6 +7639,7 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7701,7 +7707,6 @@ void m68000_device::bchg_dd_ais_dp() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7731,6 +7736,7 @@ void m68000_device::bchg_dd_ais_dp() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7795,7 +7801,6 @@ void m68000_device::bchg_dd_aips_dp() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7825,6 +7830,7 @@ void m68000_device::bchg_dd_aips_dp() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7891,7 +7897,6 @@ void m68000_device::bchg_dd_pais_dp() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7921,6 +7926,7 @@ void m68000_device::bchg_dd_pais_dp() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8006,7 +8012,6 @@ void m68000_device::bchg_dd_das_dp() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8036,6 +8041,7 @@ void m68000_device::bchg_dd_das_dp() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8164,7 +8170,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8194,6 +8199,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8278,7 +8284,6 @@ void m68000_device::bchg_dd_adr16_dp() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8308,6 +8313,7 @@ void m68000_device::bchg_dd_adr16_dp() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8417,7 +8423,6 @@ void m68000_device::bchg_dd_adr32_dp() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8447,6 +8452,7 @@ void m68000_device::bchg_dd_adr32_dp() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -8482,7 +8488,6 @@ void m68000_device::bclr_dd_ds_dp() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8527,6 +8532,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8550,6 +8556,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8598,7 +8605,6 @@ void m68000_device::movep_w_dd_das_dp() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -8636,12 +8642,12 @@ void m68000_device::movep_w_dd_das_dp() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8706,7 +8712,6 @@ void m68000_device::bclr_dd_ais_dp() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8740,6 +8745,7 @@ void m68000_device::bclr_dd_ais_dp() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8804,7 +8810,6 @@ void m68000_device::bclr_dd_aips_dp() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8838,6 +8843,7 @@ void m68000_device::bclr_dd_aips_dp() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8904,7 +8910,6 @@ void m68000_device::bclr_dd_pais_dp() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8938,6 +8943,7 @@ void m68000_device::bclr_dd_pais_dp() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9023,7 +9029,6 @@ void m68000_device::bclr_dd_das_dp() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9057,6 +9062,7 @@ void m68000_device::bclr_dd_das_dp() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9185,7 +9191,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9219,6 +9224,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9303,7 +9309,6 @@ void m68000_device::bclr_dd_adr16_dp() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9337,6 +9342,7 @@ void m68000_device::bclr_dd_adr16_dp() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9446,7 +9452,6 @@ void m68000_device::bclr_dd_adr32_dp() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9480,6 +9485,7 @@ void m68000_device::bclr_dd_adr32_dp() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -9515,7 +9521,6 @@ void m68000_device::bset_dd_ds_dp() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -9556,6 +9561,7 @@ void m68000_device::bset_dd_ds_dp() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9575,6 +9581,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9659,7 +9666,6 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9697,12 +9703,12 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9767,7 +9773,6 @@ void m68000_device::bset_dd_ais_dp() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9797,6 +9802,7 @@ void m68000_device::bset_dd_ais_dp() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9861,7 +9867,6 @@ void m68000_device::bset_dd_aips_dp() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9891,6 +9896,7 @@ void m68000_device::bset_dd_aips_dp() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9957,7 +9963,6 @@ void m68000_device::bset_dd_pais_dp() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9987,6 +9992,7 @@ void m68000_device::bset_dd_pais_dp() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -10072,7 +10078,6 @@ void m68000_device::bset_dd_das_dp() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10102,6 +10107,7 @@ void m68000_device::bset_dd_das_dp() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10230,7 +10236,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10260,6 +10265,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10344,7 +10350,6 @@ void m68000_device::bset_dd_adr16_dp() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10374,6 +10379,7 @@ void m68000_device::bset_dd_adr16_dp() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10483,7 +10489,6 @@ void m68000_device::bset_dd_adr32_dp() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10513,6 +10518,7 @@ void m68000_device::bset_dd_adr32_dp() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -10574,13 +10580,13 @@ void m68000_device::andi_b_imm8_ds_dp() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10673,7 +10679,6 @@ void m68000_device::andi_b_imm8_ais_dp() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10703,6 +10708,7 @@ void m68000_device::andi_b_imm8_ais_dp() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10792,7 +10798,6 @@ void m68000_device::andi_b_imm8_aips_dp() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10822,6 +10827,7 @@ void m68000_device::andi_b_imm8_aips_dp() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10913,7 +10919,6 @@ void m68000_device::andi_b_imm8_pais_dp() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10943,6 +10948,7 @@ void m68000_device::andi_b_imm8_pais_dp() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11053,7 +11059,6 @@ void m68000_device::andi_b_imm8_das_dp() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11083,6 +11088,7 @@ void m68000_device::andi_b_imm8_das_dp() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11236,7 +11242,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11266,6 +11271,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11375,7 +11381,6 @@ void m68000_device::andi_b_imm8_adr16_dp() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11405,6 +11410,7 @@ void m68000_device::andi_b_imm8_adr16_dp() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11539,7 +11545,6 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11569,6 +11574,7 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -11675,12 +11681,12 @@ void m68000_device::andi_imm8_ccr_dp() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11747,13 +11753,13 @@ void m68000_device::andi_w_imm16_ds_dp() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11850,7 +11856,6 @@ void m68000_device::andi_w_imm16_ais_dp() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11880,6 +11885,7 @@ void m68000_device::andi_w_imm16_ais_dp() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11979,7 +11985,6 @@ void m68000_device::andi_w_imm16_aips_dp() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12009,6 +12014,7 @@ void m68000_device::andi_w_imm16_aips_dp() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12110,7 +12116,6 @@ void m68000_device::andi_w_imm16_pais_dp() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12140,6 +12145,7 @@ void m68000_device::andi_w_imm16_pais_dp() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12260,7 +12266,6 @@ void m68000_device::andi_w_imm16_das_dp() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12290,6 +12295,7 @@ void m68000_device::andi_w_imm16_das_dp() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12453,7 +12459,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12483,6 +12488,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12602,7 +12608,6 @@ void m68000_device::andi_w_imm16_adr16_dp() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12632,6 +12637,7 @@ void m68000_device::andi_w_imm16_adr16_dp() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12776,7 +12782,6 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12806,6 +12811,7 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -12924,12 +12930,12 @@ void m68000_device::andi_i16u_sr_dp() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13021,7 +13027,6 @@ void m68000_device::andi_l_imm32_ds_dp() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -13057,6 +13062,7 @@ void m68000_device::andi_l_imm32_ds_dp() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -13182,7 +13188,6 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13238,6 +13243,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13385,7 +13391,6 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13441,6 +13446,7 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13589,7 +13595,6 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13645,6 +13650,7 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13813,7 +13819,6 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13869,6 +13874,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14080,7 +14086,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14136,6 +14141,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14307,7 +14313,6 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14363,6 +14368,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14559,7 +14565,6 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14615,6 +14620,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -14680,13 +14686,13 @@ void m68000_device::subi_b_imm8_ds_dp() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14776,7 +14782,6 @@ void m68000_device::subi_b_imm8_ais_dp() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14806,6 +14811,7 @@ void m68000_device::subi_b_imm8_ais_dp() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -14891,7 +14897,6 @@ void m68000_device::subi_b_imm8_aips_dp() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14921,6 +14926,7 @@ void m68000_device::subi_b_imm8_aips_dp() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15008,7 +15014,6 @@ void m68000_device::subi_b_imm8_pais_dp() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15038,6 +15043,7 @@ void m68000_device::subi_b_imm8_pais_dp() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15144,7 +15150,6 @@ void m68000_device::subi_b_imm8_das_dp() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15174,6 +15179,7 @@ void m68000_device::subi_b_imm8_das_dp() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15321,7 +15327,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15351,6 +15356,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15456,7 +15462,6 @@ void m68000_device::subi_b_imm8_adr16_dp() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15486,6 +15491,7 @@ void m68000_device::subi_b_imm8_adr16_dp() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15615,7 +15621,6 @@ void m68000_device::subi_b_imm8_adr32_dp() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15645,6 +15650,7 @@ void m68000_device::subi_b_imm8_adr32_dp() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -15703,13 +15709,13 @@ void m68000_device::subi_w_imm16_ds_dp() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15803,7 +15809,6 @@ void m68000_device::subi_w_imm16_ais_dp() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15833,6 +15838,7 @@ void m68000_device::subi_w_imm16_ais_dp() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15928,7 +15934,6 @@ void m68000_device::subi_w_imm16_aips_dp() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15958,6 +15963,7 @@ void m68000_device::subi_w_imm16_aips_dp() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16055,7 +16061,6 @@ void m68000_device::subi_w_imm16_pais_dp() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16085,6 +16090,7 @@ void m68000_device::subi_w_imm16_pais_dp() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16201,7 +16207,6 @@ void m68000_device::subi_w_imm16_das_dp() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16231,6 +16236,7 @@ void m68000_device::subi_w_imm16_das_dp() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16388,7 +16394,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16418,6 +16423,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16533,7 +16539,6 @@ void m68000_device::subi_w_imm16_adr16_dp() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16563,6 +16568,7 @@ void m68000_device::subi_w_imm16_adr16_dp() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16702,7 +16708,6 @@ void m68000_device::subi_w_imm16_adr32_dp() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16732,6 +16737,7 @@ void m68000_device::subi_w_imm16_adr32_dp() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -16820,7 +16826,6 @@ void m68000_device::subi_l_imm32_ds_dp() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -16855,6 +16860,7 @@ void m68000_device::subi_l_imm32_ds_dp() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -16976,7 +16982,6 @@ void m68000_device::subi_l_imm32_ais_dp() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17032,6 +17037,7 @@ void m68000_device::subi_l_imm32_ais_dp() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17174,7 +17180,6 @@ void m68000_device::subi_l_imm32_aips_dp() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17230,6 +17235,7 @@ void m68000_device::subi_l_imm32_aips_dp() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17373,7 +17379,6 @@ void m68000_device::subi_l_imm32_pais_dp() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17429,6 +17434,7 @@ void m68000_device::subi_l_imm32_pais_dp() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17592,7 +17598,6 @@ void m68000_device::subi_l_imm32_das_dp() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17648,6 +17653,7 @@ void m68000_device::subi_l_imm32_das_dp() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -17852,7 +17858,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17908,6 +17913,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18073,7 +18079,6 @@ void m68000_device::subi_l_imm32_adr16_dp() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18129,6 +18134,7 @@ void m68000_device::subi_l_imm32_adr16_dp() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18318,7 +18324,6 @@ void m68000_device::subi_l_imm32_adr32_dp() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18374,6 +18379,7 @@ void m68000_device::subi_l_imm32_adr32_dp() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -18438,13 +18444,13 @@ void m68000_device::addi_b_imm8_ds_dp() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18534,7 +18540,6 @@ void m68000_device::addi_b_imm8_ais_dp() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18564,6 +18569,7 @@ void m68000_device::addi_b_imm8_ais_dp() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18649,7 +18655,6 @@ void m68000_device::addi_b_imm8_aips_dp() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18679,6 +18684,7 @@ void m68000_device::addi_b_imm8_aips_dp() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18766,7 +18772,6 @@ void m68000_device::addi_b_imm8_pais_dp() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18796,6 +18801,7 @@ void m68000_device::addi_b_imm8_pais_dp() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18902,7 +18908,6 @@ void m68000_device::addi_b_imm8_das_dp() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18932,6 +18937,7 @@ void m68000_device::addi_b_imm8_das_dp() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19079,7 +19085,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19109,6 +19114,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19214,7 +19220,6 @@ void m68000_device::addi_b_imm8_adr16_dp() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19244,6 +19249,7 @@ void m68000_device::addi_b_imm8_adr16_dp() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19373,7 +19379,6 @@ void m68000_device::addi_b_imm8_adr32_dp() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19403,6 +19408,7 @@ void m68000_device::addi_b_imm8_adr32_dp() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -19461,13 +19467,13 @@ void m68000_device::addi_w_imm16_ds_dp() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19561,7 +19567,6 @@ void m68000_device::addi_w_imm16_ais_dp() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19591,6 +19596,7 @@ void m68000_device::addi_w_imm16_ais_dp() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19686,7 +19692,6 @@ void m68000_device::addi_w_imm16_aips_dp() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19716,6 +19721,7 @@ void m68000_device::addi_w_imm16_aips_dp() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19813,7 +19819,6 @@ void m68000_device::addi_w_imm16_pais_dp() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19843,6 +19848,7 @@ void m68000_device::addi_w_imm16_pais_dp() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19959,7 +19965,6 @@ void m68000_device::addi_w_imm16_das_dp() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19989,6 +19994,7 @@ void m68000_device::addi_w_imm16_das_dp() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20146,7 +20152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20176,6 +20181,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20291,7 +20297,6 @@ void m68000_device::addi_w_imm16_adr16_dp() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20321,6 +20326,7 @@ void m68000_device::addi_w_imm16_adr16_dp() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20460,7 +20466,6 @@ void m68000_device::addi_w_imm16_adr32_dp() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20490,6 +20495,7 @@ void m68000_device::addi_w_imm16_adr32_dp() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -20578,7 +20584,6 @@ void m68000_device::addi_l_imm32_ds_dp() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -20613,6 +20618,7 @@ void m68000_device::addi_l_imm32_ds_dp() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -20734,7 +20740,6 @@ void m68000_device::addi_l_imm32_ais_dp() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20790,6 +20795,7 @@ void m68000_device::addi_l_imm32_ais_dp() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -20932,7 +20938,6 @@ void m68000_device::addi_l_imm32_aips_dp() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20988,6 +20993,7 @@ void m68000_device::addi_l_imm32_aips_dp() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21131,7 +21137,6 @@ void m68000_device::addi_l_imm32_pais_dp() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21187,6 +21192,7 @@ void m68000_device::addi_l_imm32_pais_dp() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21350,7 +21356,6 @@ void m68000_device::addi_l_imm32_das_dp() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21406,6 +21411,7 @@ void m68000_device::addi_l_imm32_das_dp() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21610,7 +21616,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21666,6 +21671,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21831,7 +21837,6 @@ void m68000_device::addi_l_imm32_adr16_dp() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21887,6 +21892,7 @@ void m68000_device::addi_l_imm32_adr16_dp() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -22076,7 +22082,6 @@ void m68000_device::addi_l_imm32_adr32_dp() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22132,6 +22137,7 @@ void m68000_device::addi_l_imm32_adr32_dp() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -22197,7 +22203,6 @@ void m68000_device::btst_imm8_ds_dp() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22238,6 +22243,7 @@ void m68000_device::btst_imm8_ds_dp() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22252,6 +22258,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -22324,7 +22331,6 @@ void m68000_device::btst_imm8_ais_dp() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22332,6 +22338,7 @@ void m68000_device::btst_imm8_ais_dp() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22427,7 +22434,6 @@ void m68000_device::btst_imm8_aips_dp() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22435,6 +22441,7 @@ void m68000_device::btst_imm8_aips_dp() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22532,7 +22539,6 @@ void m68000_device::btst_imm8_pais_dp() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22540,6 +22546,7 @@ void m68000_device::btst_imm8_pais_dp() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22656,7 +22663,6 @@ void m68000_device::btst_imm8_das_dp() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22664,6 +22670,7 @@ void m68000_device::btst_imm8_das_dp() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22823,7 +22830,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22831,6 +22837,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22946,7 +22953,6 @@ void m68000_device::btst_imm8_adr16_dp() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22954,6 +22960,7 @@ void m68000_device::btst_imm8_adr16_dp() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23094,7 +23101,6 @@ void m68000_device::btst_imm8_adr32_dp() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23102,6 +23108,7 @@ void m68000_device::btst_imm8_adr32_dp() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23217,7 +23224,6 @@ void m68000_device::btst_imm8_dpc_dp() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23225,6 +23231,7 @@ void m68000_device::btst_imm8_dpc_dp() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23383,7 +23390,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23391,6 +23397,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23457,7 +23464,6 @@ void m68000_device::bchg_imm8_ds_dp() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -23498,6 +23504,7 @@ void m68000_device::bchg_imm8_ds_dp() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23517,6 +23524,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23590,7 +23598,6 @@ void m68000_device::bchg_imm8_ais_dp() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23620,6 +23627,7 @@ void m68000_device::bchg_imm8_ais_dp() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23710,7 +23718,6 @@ void m68000_device::bchg_imm8_aips_dp() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23740,6 +23747,7 @@ void m68000_device::bchg_imm8_aips_dp() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23832,7 +23840,6 @@ void m68000_device::bchg_imm8_pais_dp() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23862,6 +23869,7 @@ void m68000_device::bchg_imm8_pais_dp() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23973,7 +23981,6 @@ void m68000_device::bchg_imm8_das_dp() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24003,6 +24010,7 @@ void m68000_device::bchg_imm8_das_dp() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24157,7 +24165,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24187,6 +24194,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24297,7 +24305,6 @@ void m68000_device::bchg_imm8_adr16_dp() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24327,6 +24334,7 @@ void m68000_device::bchg_imm8_adr16_dp() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24462,7 +24470,6 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24492,6 +24499,7 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -24553,7 +24561,6 @@ void m68000_device::bclr_imm8_ds_dp() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -24598,6 +24605,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24621,6 +24629,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24694,7 +24703,6 @@ void m68000_device::bclr_imm8_ais_dp() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24728,6 +24736,7 @@ void m68000_device::bclr_imm8_ais_dp() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24818,7 +24827,6 @@ void m68000_device::bclr_imm8_aips_dp() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24852,6 +24860,7 @@ void m68000_device::bclr_imm8_aips_dp() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24944,7 +24953,6 @@ void m68000_device::bclr_imm8_pais_dp() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24978,6 +24986,7 @@ void m68000_device::bclr_imm8_pais_dp() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25089,7 +25098,6 @@ void m68000_device::bclr_imm8_das_dp() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25123,6 +25131,7 @@ void m68000_device::bclr_imm8_das_dp() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25277,7 +25286,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25311,6 +25319,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25421,7 +25430,6 @@ void m68000_device::bclr_imm8_adr16_dp() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25455,6 +25463,7 @@ void m68000_device::bclr_imm8_adr16_dp() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25590,7 +25599,6 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25624,6 +25632,7 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -25685,7 +25694,6 @@ void m68000_device::bset_imm8_ds_dp() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -25726,6 +25734,7 @@ void m68000_device::bset_imm8_ds_dp() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25745,6 +25754,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25818,7 +25828,6 @@ void m68000_device::bset_imm8_ais_dp() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -25848,6 +25857,7 @@ void m68000_device::bset_imm8_ais_dp() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25938,7 +25948,6 @@ void m68000_device::bset_imm8_aips_dp() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -25968,6 +25977,7 @@ void m68000_device::bset_imm8_aips_dp() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26060,7 +26070,6 @@ void m68000_device::bset_imm8_pais_dp() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26090,6 +26099,7 @@ void m68000_device::bset_imm8_pais_dp() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26201,7 +26211,6 @@ void m68000_device::bset_imm8_das_dp() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26231,6 +26240,7 @@ void m68000_device::bset_imm8_das_dp() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26385,7 +26395,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26415,146 +26424,147 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; - set_8xl(m_dbout, m_aluo); - m_base_ssw = SSW_DATA; - [[fallthrough]]; case 9: - m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 9; - } else - m_inst_substate = 10; - return; - } - [[fallthrough]]; case 10: - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 - alu_and8(m_alub, 1 << (m_dcr & 7)); - sr_z(); - set_ftu_const(); - m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; - m_inst_substate = 0; - if(m_sr & SR_T) - m_next_state = S_TRACE; - return; - } -} - -void m68000_device::bset_imm8_adr16_dp() // 08f8 ffff -{ - switch(m_inst_substate) { - case 0: - // 2b9 o#w1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 1: - m_edb = m_opcodes.read_interruptible(m_aob & ~1); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 1; - } else - m_inst_substate = 2; - return; - } - [[fallthrough]]; case 2: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - set_16l(m_dt, m_dbin); - m_irc = m_edb; - m_au = m_au + 2; - m_dbin = m_edb; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none - // 00a abwl1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 3: - m_edb = m_opcodes.read_interruptible(m_aob & ~1); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 3; - } else - m_inst_substate = 4; - return; - } - [[fallthrough]]; case 4: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - m_dcr = m_dt; - m_at = ext32(m_dbin); - m_irc = m_edb; - m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin - alu_or8(m_dt, m_dbin); - m_dbin = m_edb; - // 004 abll3 - m_aob = m_at; - m_base_ssw = SSW_DATA | SSW_R; - [[fallthrough]]; case 5: - m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); - if(!(m_aob & 1)) - m_edb >>= 8; - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 5; - } else - m_inst_substate = 6; - return; - } - [[fallthrough]]; case 6: - m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 - alu_and8(m_dbin, 0xffff); - m_dbin = m_edb; - // 081 bcsm1 - m_aob = m_au; - m_ir = m_irc; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 7: - m_edb = m_opcodes.read_interruptible(m_aob & ~1); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 7; - } else - m_inst_substate = 8; - return; - } - [[fallthrough]]; case 8: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_alub = m_dbin; - m_pc = m_au; - m_irc = m_edb; - m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 - alu_or8(m_dbin, 1 << (m_dcr & 7)); - m_dbin = m_edb; - // 082 bcsm2 - m_aob = m_at; - m_ird = m_ir; + set_8xl(m_dbout, m_aluo); + m_base_ssw = SSW_DATA; + [[fallthrough]]; case 9: + m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 9; + } else + m_inst_substate = 10; + return; + } + [[fallthrough]]; case 10: + // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + alu_and8(m_alub, 1 << (m_dcr & 7)); + sr_z(); + set_ftu_const(); + m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; + m_inst_substate = 0; + if(m_sr & SR_T) + m_next_state = S_TRACE; + return; + } +} + +void m68000_device::bset_imm8_adr16_dp() // 08f8 ffff +{ + switch(m_inst_substate) { + case 0: + // 2b9 o#w1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 1: + m_edb = m_opcodes.read_interruptible(m_aob & ~1); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 1; + } else + m_inst_substate = 2; + return; + } + [[fallthrough]]; case 2: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + set_16l(m_dt, m_dbin); + m_irc = m_edb; + m_au = m_au + 2; + m_dbin = m_edb; + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // 00a abwl1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 3: + m_edb = m_opcodes.read_interruptible(m_aob & ~1); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 3; + } else + m_inst_substate = 4; + return; + } + [[fallthrough]]; case 4: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + m_dcr = m_dt; + m_at = ext32(m_dbin); + m_irc = m_edb; + m_au = ext32(m_dbin); + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + alu_or8(m_dt, m_dbin); + m_dbin = m_edb; + // 004 abll3 + m_aob = m_at; + m_base_ssw = SSW_DATA | SSW_R; + [[fallthrough]]; case 5: + m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); + if(!(m_aob & 1)) + m_edb >>= 8; + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 5; + } else + m_inst_substate = 6; + return; + } + [[fallthrough]]; case 6: + m_au = m_pc + 2; + // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + alu_and8(m_dbin, 0xffff); + m_dbin = m_edb; + // 081 bcsm1 + m_aob = m_au; + m_ir = m_irc; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 7: + m_edb = m_opcodes.read_interruptible(m_aob & ~1); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 7; + } else + m_inst_substate = 8; + return; + } + [[fallthrough]]; case 8: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_alub = m_dbin; + m_pc = m_au; + m_irc = m_edb; + m_au = m_au + 2; + // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + alu_or8(m_dbin, 1 << (m_dcr & 7)); + m_dbin = m_edb; + // 082 bcsm2 + m_aob = m_at; + m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26690,7 +26700,6 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26720,6 +26729,7 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -26781,13 +26791,13 @@ void m68000_device::eori_b_imm8_ds_dp() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26880,7 +26890,6 @@ void m68000_device::eori_b_imm8_ais_dp() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26910,6 +26919,7 @@ void m68000_device::eori_b_imm8_ais_dp() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26999,7 +27009,6 @@ void m68000_device::eori_b_imm8_aips_dp() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27029,6 +27038,7 @@ void m68000_device::eori_b_imm8_aips_dp() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27120,7 +27130,6 @@ void m68000_device::eori_b_imm8_pais_dp() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27150,6 +27159,7 @@ void m68000_device::eori_b_imm8_pais_dp() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27260,7 +27270,6 @@ void m68000_device::eori_b_imm8_das_dp() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27290,6 +27299,7 @@ void m68000_device::eori_b_imm8_das_dp() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27443,7 +27453,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27473,6 +27482,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27582,7 +27592,6 @@ void m68000_device::eori_b_imm8_adr16_dp() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27612,6 +27621,7 @@ void m68000_device::eori_b_imm8_adr16_dp() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27746,7 +27756,6 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27776,6 +27785,7 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -27882,12 +27892,12 @@ void m68000_device::eori_imm8_ccr_dp() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27954,13 +27964,13 @@ void m68000_device::eori_w_imm16_ds_dp() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28057,7 +28067,6 @@ void m68000_device::eori_w_imm16_ais_dp() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28087,6 +28096,7 @@ void m68000_device::eori_w_imm16_ais_dp() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28186,7 +28196,6 @@ void m68000_device::eori_w_imm16_aips_dp() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28216,6 +28225,7 @@ void m68000_device::eori_w_imm16_aips_dp() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28317,7 +28327,6 @@ void m68000_device::eori_w_imm16_pais_dp() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28347,6 +28356,7 @@ void m68000_device::eori_w_imm16_pais_dp() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28467,7 +28477,6 @@ void m68000_device::eori_w_imm16_das_dp() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28497,6 +28506,7 @@ void m68000_device::eori_w_imm16_das_dp() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28660,7 +28670,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28690,6 +28699,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28809,7 +28819,6 @@ void m68000_device::eori_w_imm16_adr16_dp() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28839,6 +28848,7 @@ void m68000_device::eori_w_imm16_adr16_dp() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28983,7 +28993,6 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29013,6 +29022,7 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -29131,12 +29141,12 @@ void m68000_device::eori_i16u_sr_dp() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29228,7 +29238,6 @@ void m68000_device::eori_l_imm32_ds_dp() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -29264,6 +29273,7 @@ void m68000_device::eori_l_imm32_ds_dp() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -29389,7 +29399,6 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29445,6 +29454,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29592,7 +29602,6 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29648,6 +29657,7 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29796,7 +29806,6 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29852,6 +29861,7 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -30020,7 +30030,6 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30076,6 +30085,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30287,7 +30297,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30343,6 +30352,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30514,7 +30524,6 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30570,6 +30579,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30766,7 +30776,6 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30822,6 +30831,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -30887,13 +30897,13 @@ void m68000_device::cmpi_b_imm8_ds_dp() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30982,7 +30992,6 @@ void m68000_device::cmpi_b_imm8_ais_dp() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -30990,6 +30999,7 @@ void m68000_device::cmpi_b_imm8_ais_dp() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31081,7 +31091,6 @@ void m68000_device::cmpi_b_imm8_aips_dp() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31089,6 +31098,7 @@ void m68000_device::cmpi_b_imm8_aips_dp() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31182,7 +31192,6 @@ void m68000_device::cmpi_b_imm8_pais_dp() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31190,6 +31199,7 @@ void m68000_device::cmpi_b_imm8_pais_dp() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31302,7 +31312,6 @@ void m68000_device::cmpi_b_imm8_das_dp() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31310,6 +31319,7 @@ void m68000_device::cmpi_b_imm8_das_dp() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31463,7 +31473,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31471,6 +31480,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31582,7 +31592,6 @@ void m68000_device::cmpi_b_imm8_adr16_dp() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31590,6 +31599,7 @@ void m68000_device::cmpi_b_imm8_adr16_dp() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31725,7 +31735,6 @@ void m68000_device::cmpi_b_imm8_adr32_dp() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31733,6 +31742,7 @@ void m68000_device::cmpi_b_imm8_adr32_dp() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31797,13 +31807,13 @@ void m68000_device::cmpi_w_imm16_ds_dp() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31896,7 +31906,6 @@ void m68000_device::cmpi_w_imm16_ais_dp() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31904,6 +31913,7 @@ void m68000_device::cmpi_w_imm16_ais_dp() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31999,7 +32009,6 @@ void m68000_device::cmpi_w_imm16_aips_dp() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32007,6 +32016,7 @@ void m68000_device::cmpi_w_imm16_aips_dp() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32104,7 +32114,6 @@ void m68000_device::cmpi_w_imm16_pais_dp() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32112,6 +32121,7 @@ void m68000_device::cmpi_w_imm16_pais_dp() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32228,7 +32238,6 @@ void m68000_device::cmpi_w_imm16_das_dp() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32236,6 +32245,7 @@ void m68000_device::cmpi_w_imm16_das_dp() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32393,7 +32403,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32401,6 +32410,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32516,7 +32526,6 @@ void m68000_device::cmpi_w_imm16_adr16_dp() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32524,6 +32533,7 @@ void m68000_device::cmpi_w_imm16_adr16_dp() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32663,7 +32673,6 @@ void m68000_device::cmpi_w_imm16_adr32_dp() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32671,6 +32680,7 @@ void m68000_device::cmpi_w_imm16_adr32_dp() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32760,7 +32770,6 @@ void m68000_device::cmpi_l_imm32_ds_dp() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -32792,6 +32801,7 @@ void m68000_device::cmpi_l_imm32_ds_dp() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -32912,7 +32922,6 @@ void m68000_device::cmpi_l_imm32_ais_dp() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32920,6 +32929,7 @@ void m68000_device::cmpi_l_imm32_ais_dp() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33065,7 +33075,6 @@ void m68000_device::cmpi_l_imm32_aips_dp() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33073,6 +33082,7 @@ void m68000_device::cmpi_l_imm32_aips_dp() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33219,7 +33229,6 @@ void m68000_device::cmpi_l_imm32_pais_dp() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33227,6 +33236,7 @@ void m68000_device::cmpi_l_imm32_pais_dp() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33393,7 +33403,6 @@ void m68000_device::cmpi_l_imm32_das_dp() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33401,6 +33410,7 @@ void m68000_device::cmpi_l_imm32_das_dp() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33608,7 +33618,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33616,6 +33625,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33784,7 +33794,6 @@ void m68000_device::cmpi_l_imm32_adr16_dp() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33792,6 +33801,7 @@ void m68000_device::cmpi_l_imm32_adr16_dp() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33984,7 +33994,6 @@ void m68000_device::cmpi_l_imm32_adr32_dp() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33992,6 +34001,7 @@ void m68000_device::cmpi_l_imm32_adr32_dp() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34034,7 +34044,6 @@ void m68000_device::move_b_ds_dd_dp() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -34043,6 +34052,7 @@ void m68000_device::move_b_ds_dd_dp() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34107,7 +34117,6 @@ void m68000_device::move_b_ais_dd_dp() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34116,6 +34125,7 @@ void m68000_device::move_b_ais_dd_dp() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34182,7 +34192,6 @@ void m68000_device::move_b_aips_dd_dp() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34191,6 +34200,7 @@ void m68000_device::move_b_aips_dd_dp() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34259,7 +34269,6 @@ void m68000_device::move_b_pais_dd_dp() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34268,6 +34277,7 @@ void m68000_device::move_b_pais_dd_dp() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34355,7 +34365,6 @@ void m68000_device::move_b_das_dd_dp() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34364,6 +34373,7 @@ void m68000_device::move_b_das_dd_dp() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34492,7 +34502,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34501,6 +34510,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34587,7 +34597,6 @@ void m68000_device::move_b_adr16_dd_dp() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34596,6 +34605,7 @@ void m68000_device::move_b_adr16_dd_dp() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34706,7 +34716,6 @@ void m68000_device::move_b_adr32_dd_dp() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34715,6 +34724,7 @@ void m68000_device::move_b_adr32_dd_dp() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34801,7 +34811,6 @@ void m68000_device::move_b_dpc_dd_dp() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34810,6 +34819,7 @@ void m68000_device::move_b_dpc_dd_dp() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34937,7 +34947,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34946,6 +34955,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35011,7 +35021,6 @@ void m68000_device::move_b_imm8_dd_dp() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -35020,6 +35029,7 @@ void m68000_device::move_b_imm8_dd_dp() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35061,7 +35071,6 @@ void m68000_device::move_b_ds_aid_dp() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -35084,10 +35093,10 @@ void m68000_device::move_b_ds_aid_dp() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35171,10 +35180,10 @@ void m68000_device::move_b_ais_aid_dp() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35262,10 +35271,10 @@ void m68000_device::move_b_aips_aid_dp() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35355,10 +35364,10 @@ void m68000_device::move_b_pais_aid_dp() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35467,10 +35476,10 @@ void m68000_device::move_b_das_aid_dp() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35620,10 +35629,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35731,10 +35740,10 @@ void m68000_device::move_b_adr16_aid_dp() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35866,10 +35875,10 @@ void m68000_device::move_b_adr32_aid_dp() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35977,10 +35986,10 @@ void m68000_device::move_b_dpc_aid_dp() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36129,10 +36138,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36198,7 +36207,6 @@ void m68000_device::move_b_imm8_aid_dp() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36221,10 +36229,10 @@ void m68000_device::move_b_imm8_aid_dp() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36264,7 +36272,6 @@ void m68000_device::move_b_ds_aipd_dp() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -36287,6 +36294,7 @@ void m68000_device::move_b_ds_aipd_dp() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36351,7 +36359,6 @@ void m68000_device::move_b_ais_aipd_dp() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36374,6 +36381,7 @@ void m68000_device::move_b_ais_aipd_dp() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36442,7 +36450,6 @@ void m68000_device::move_b_aips_aipd_dp() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36465,6 +36472,7 @@ void m68000_device::move_b_aips_aipd_dp() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36535,7 +36543,6 @@ void m68000_device::move_b_pais_aipd_dp() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36558,6 +36565,7 @@ void m68000_device::move_b_pais_aipd_dp() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36647,7 +36655,6 @@ void m68000_device::move_b_das_aipd_dp() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36670,6 +36677,7 @@ void m68000_device::move_b_das_aipd_dp() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36800,7 +36808,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36823,6 +36830,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36911,7 +36919,6 @@ void m68000_device::move_b_adr16_aipd_dp() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36934,6 +36941,7 @@ void m68000_device::move_b_adr16_aipd_dp() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37046,7 +37054,6 @@ void m68000_device::move_b_adr32_aipd_dp() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37069,6 +37076,7 @@ void m68000_device::move_b_adr32_aipd_dp() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37157,7 +37165,6 @@ void m68000_device::move_b_dpc_aipd_dp() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37180,6 +37187,7 @@ void m68000_device::move_b_dpc_aipd_dp() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37309,7 +37317,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37332,6 +37339,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37399,7 +37407,6 @@ void m68000_device::move_b_imm8_aipd_dp() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37422,6 +37429,7 @@ void m68000_device::move_b_imm8_aipd_dp() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37463,7 +37471,6 @@ void m68000_device::move_b_ds_paid_dp() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37493,6 +37500,7 @@ void m68000_device::move_b_ds_paid_dp() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37550,7 +37558,6 @@ void m68000_device::move_b_ais_paid_dp() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37580,6 +37587,7 @@ void m68000_device::move_b_ais_paid_dp() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37641,7 +37649,6 @@ void m68000_device::move_b_aips_paid_dp() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37671,6 +37678,7 @@ void m68000_device::move_b_aips_paid_dp() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37734,7 +37742,6 @@ void m68000_device::move_b_pais_paid_dp() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37764,6 +37771,7 @@ void m68000_device::move_b_pais_paid_dp() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37846,7 +37854,6 @@ void m68000_device::move_b_das_paid_dp() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37876,6 +37883,7 @@ void m68000_device::move_b_das_paid_dp() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37999,7 +38007,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38029,6 +38036,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38110,7 +38118,6 @@ void m68000_device::move_b_adr16_paid_dp() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38140,6 +38147,7 @@ void m68000_device::move_b_adr16_paid_dp() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38245,7 +38253,6 @@ void m68000_device::move_b_adr32_paid_dp() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38275,6 +38282,7 @@ void m68000_device::move_b_adr32_paid_dp() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -38356,7 +38364,6 @@ void m68000_device::move_b_dpc_paid_dp() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38386,6 +38393,7 @@ void m68000_device::move_b_dpc_paid_dp() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38508,7 +38516,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38538,6 +38545,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38598,7 +38606,6 @@ void m68000_device::move_b_imm8_paid_dp() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38628,6 +38635,7 @@ void m68000_device::move_b_imm8_paid_dp() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38686,7 +38694,6 @@ void m68000_device::move_b_ds_dad_dp() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -38708,11 +38715,11 @@ void m68000_device::move_b_ds_dad_dp() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38802,6 +38809,7 @@ void m68000_device::move_b_ais_dad_dp() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38823,11 +38831,11 @@ void m68000_device::move_b_ais_dad_dp() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38921,6 +38929,7 @@ void m68000_device::move_b_aips_dad_dp() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38942,11 +38951,11 @@ void m68000_device::move_b_aips_dad_dp() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39042,6 +39051,7 @@ void m68000_device::move_b_pais_dad_dp() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -39063,11 +39073,11 @@ void m68000_device::move_b_pais_dad_dp() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39182,6 +39192,7 @@ void m68000_device::move_b_das_dad_dp() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39203,11 +39214,11 @@ void m68000_device::move_b_das_dad_dp() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39363,6 +39374,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39384,11 +39396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39502,6 +39514,7 @@ void m68000_device::move_b_adr16_dad_dp() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39523,11 +39536,11 @@ void m68000_device::move_b_adr16_dad_dp() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39665,6 +39678,7 @@ void m68000_device::move_b_adr32_dad_dp() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -39686,11 +39700,11 @@ void m68000_device::move_b_adr32_dad_dp() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39804,6 +39818,7 @@ void m68000_device::move_b_dpc_dad_dp() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39825,11 +39840,11 @@ void m68000_device::move_b_dpc_dad_dp() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39984,6 +39999,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40005,11 +40021,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40099,7 +40115,6 @@ void m68000_device::move_b_imm8_dad_dp() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40121,11 +40136,11 @@ void m68000_device::move_b_imm8_dad_dp() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40231,7 +40246,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -40253,11 +40267,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40388,6 +40402,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40409,11 +40424,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40548,6 +40563,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40569,11 +40585,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40710,6 +40726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40731,11 +40748,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40891,6 +40908,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40912,11 +40930,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41113,6 +41131,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41134,11 +41153,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41293,6 +41312,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41314,11 +41334,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41497,6 +41517,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -41518,11 +41539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41677,6 +41698,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41698,11 +41720,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41898,6 +41920,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41919,11 +41942,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42055,7 +42078,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42077,11 +42099,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42148,6 +42170,7 @@ void m68000_device::move_b_ds_adr16_dp() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -42169,11 +42192,11 @@ void m68000_device::move_b_ds_adr16_dp() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42262,6 +42285,7 @@ void m68000_device::move_b_ais_adr16_dp() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42283,11 +42307,11 @@ void m68000_device::move_b_ais_adr16_dp() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42380,6 +42404,7 @@ void m68000_device::move_b_aips_adr16_dp() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42401,11 +42426,11 @@ void m68000_device::move_b_aips_adr16_dp() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42500,6 +42525,7 @@ void m68000_device::move_b_pais_adr16_dp() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42521,11 +42547,11 @@ void m68000_device::move_b_pais_adr16_dp() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42639,6 +42665,7 @@ void m68000_device::move_b_das_adr16_dp() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42660,11 +42687,11 @@ void m68000_device::move_b_das_adr16_dp() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42819,6 +42846,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42840,11 +42868,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42957,6 +42985,7 @@ void m68000_device::move_b_adr16_adr16_dp() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42978,11 +43007,11 @@ void m68000_device::move_b_adr16_adr16_dp() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43119,6 +43148,7 @@ void m68000_device::move_b_adr32_adr16_dp() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -43140,11 +43170,11 @@ void m68000_device::move_b_adr32_adr16_dp() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43257,6 +43287,7 @@ void m68000_device::move_b_dpc_adr16_dp() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43278,11 +43309,11 @@ void m68000_device::move_b_dpc_adr16_dp() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43436,6 +43467,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43457,11 +43489,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43554,6 +43586,7 @@ void m68000_device::move_b_imm8_adr16_dp() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43575,11 +43608,11 @@ void m68000_device::move_b_imm8_adr16_dp() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43670,6 +43703,7 @@ void m68000_device::move_b_ds_adr32_dp() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43691,11 +43725,11 @@ void m68000_device::move_b_ds_adr32_dp() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43784,7 +43818,6 @@ void m68000_device::move_b_ais_adr32_dp() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43830,11 +43863,11 @@ void m68000_device::move_b_ais_adr32_dp() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43927,7 +43960,6 @@ void m68000_device::move_b_aips_adr32_dp() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43973,11 +44005,11 @@ void m68000_device::move_b_aips_adr32_dp() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44072,7 +44104,6 @@ void m68000_device::move_b_pais_adr32_dp() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -44118,11 +44149,11 @@ void m68000_device::move_b_pais_adr32_dp() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44236,7 +44267,6 @@ void m68000_device::move_b_das_adr32_dp() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44282,11 +44312,11 @@ void m68000_device::move_b_das_adr32_dp() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44441,7 +44471,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44487,11 +44516,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44604,7 +44633,6 @@ void m68000_device::move_b_adr16_adr32_dp() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44650,11 +44678,11 @@ void m68000_device::move_b_adr16_adr32_dp() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44791,7 +44819,6 @@ void m68000_device::move_b_adr32_adr32_dp() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -44837,11 +44864,11 @@ void m68000_device::move_b_adr32_adr32_dp() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44954,7 +44981,6 @@ void m68000_device::move_b_dpc_adr32_dp() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45000,11 +45026,11 @@ void m68000_device::move_b_dpc_adr32_dp() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45158,7 +45184,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45204,11 +45229,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45325,6 +45350,7 @@ void m68000_device::move_b_imm8_adr32_dp() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45346,11 +45372,11 @@ void m68000_device::move_b_imm8_adr32_dp() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45390,7 +45416,6 @@ void m68000_device::move_l_ds_dd_dp() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45399,6 +45424,7 @@ void m68000_device::move_l_ds_dd_dp() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45442,7 +45468,6 @@ void m68000_device::move_l_as_dd_dp() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45451,6 +45476,7 @@ void m68000_device::move_l_as_dd_dp() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45545,7 +45571,6 @@ void m68000_device::move_l_ais_dd_dp() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45554,6 +45579,7 @@ void m68000_device::move_l_ais_dd_dp() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45651,7 +45677,6 @@ void m68000_device::move_l_aips_dd_dp() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45660,6 +45685,7 @@ void m68000_device::move_l_aips_dd_dp() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45758,7 +45784,6 @@ void m68000_device::move_l_pais_dd_dp() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45767,6 +45792,7 @@ void m68000_device::move_l_pais_dd_dp() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45885,7 +45911,6 @@ void m68000_device::move_l_das_dd_dp() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45894,6 +45919,7 @@ void m68000_device::move_l_das_dd_dp() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46053,7 +46079,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46062,6 +46087,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46182,7 +46208,6 @@ void m68000_device::move_l_adr16_dd_dp() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46191,6 +46216,7 @@ void m68000_device::move_l_adr16_dd_dp() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46335,7 +46361,6 @@ void m68000_device::move_l_adr32_dd_dp() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46344,6 +46369,7 @@ void m68000_device::move_l_adr32_dd_dp() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46461,7 +46487,6 @@ void m68000_device::move_l_dpc_dd_dp() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46470,6 +46495,7 @@ void m68000_device::move_l_dpc_dd_dp() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46628,7 +46654,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46637,6 +46662,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46730,7 +46756,6 @@ void m68000_device::move_l_imm32_dd_dp() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -46739,6 +46764,7 @@ void m68000_device::move_l_imm32_dd_dp() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46782,7 +46808,6 @@ void m68000_device::movea_l_ds_ad_dp() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46790,6 +46815,7 @@ void m68000_device::movea_l_ds_ad_dp() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46832,7 +46858,6 @@ void m68000_device::movea_l_as_ad_dp() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46840,6 +46865,7 @@ void m68000_device::movea_l_as_ad_dp() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46933,7 +46959,6 @@ void m68000_device::movea_l_ais_ad_dp() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46941,6 +46966,7 @@ void m68000_device::movea_l_ais_ad_dp() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47037,7 +47063,6 @@ void m68000_device::movea_l_aips_ad_dp() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47045,6 +47070,7 @@ void m68000_device::movea_l_aips_ad_dp() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47142,7 +47168,6 @@ void m68000_device::movea_l_pais_ad_dp() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47150,6 +47175,7 @@ void m68000_device::movea_l_pais_ad_dp() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47267,7 +47293,6 @@ void m68000_device::movea_l_das_ad_dp() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47275,6 +47300,7 @@ void m68000_device::movea_l_das_ad_dp() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47433,7 +47459,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47441,6 +47466,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47560,7 +47586,6 @@ void m68000_device::movea_l_adr16_ad_dp() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47568,6 +47593,7 @@ void m68000_device::movea_l_adr16_ad_dp() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47711,7 +47737,6 @@ void m68000_device::movea_l_adr32_ad_dp() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47719,6 +47744,7 @@ void m68000_device::movea_l_adr32_ad_dp() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47835,7 +47861,6 @@ void m68000_device::movea_l_dpc_ad_dp() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47843,6 +47868,7 @@ void m68000_device::movea_l_dpc_ad_dp() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48000,7 +48026,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -48008,6 +48033,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48100,7 +48126,6 @@ void m68000_device::movea_l_imm32_ad_dp() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -48108,6 +48133,7 @@ void m68000_device::movea_l_imm32_ad_dp() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48175,7 +48201,6 @@ void m68000_device::move_l_ds_aid_dp() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48203,6 +48228,7 @@ void m68000_device::move_l_ds_aid_dp() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48272,7 +48298,6 @@ void m68000_device::move_l_as_aid_dp() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48300,6 +48325,7 @@ void m68000_device::move_l_as_aid_dp() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48422,7 +48448,6 @@ void m68000_device::move_l_ais_aid_dp() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48450,10 +48475,10 @@ void m68000_device::move_l_ais_aid_dp() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48574,7 +48599,6 @@ void m68000_device::move_l_aips_aid_dp() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48602,10 +48626,10 @@ void m68000_device::move_l_aips_aid_dp() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48727,7 +48751,6 @@ void m68000_device::move_l_pais_aid_dp() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48755,10 +48778,10 @@ void m68000_device::move_l_pais_aid_dp() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48900,7 +48923,6 @@ void m68000_device::move_l_das_aid_dp() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -48928,10 +48950,10 @@ void m68000_device::move_l_das_aid_dp() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49114,7 +49136,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49142,10 +49163,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49289,7 +49310,6 @@ void m68000_device::move_l_adr16_aid_dp() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49317,10 +49337,10 @@ void m68000_device::move_l_adr16_aid_dp() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49488,7 +49508,6 @@ void m68000_device::move_l_adr32_aid_dp() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -49516,10 +49535,10 @@ void m68000_device::move_l_adr32_aid_dp() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49660,7 +49679,6 @@ void m68000_device::move_l_dpc_aid_dp() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49688,10 +49706,10 @@ void m68000_device::move_l_dpc_aid_dp() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49873,7 +49891,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49901,10 +49918,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50019,7 +50036,6 @@ void m68000_device::move_l_imm32_aid_dp() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50047,6 +50063,7 @@ void m68000_device::move_l_imm32_aid_dp() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50116,7 +50133,6 @@ void m68000_device::move_l_ds_aipd_dp() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50144,6 +50160,7 @@ void m68000_device::move_l_ds_aipd_dp() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50213,7 +50230,6 @@ void m68000_device::move_l_as_aipd_dp() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50241,6 +50257,7 @@ void m68000_device::move_l_as_aipd_dp() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50363,7 +50380,6 @@ void m68000_device::move_l_ais_aipd_dp() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50391,6 +50407,7 @@ void m68000_device::move_l_ais_aipd_dp() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50513,7 +50530,6 @@ void m68000_device::move_l_aips_aipd_dp() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50541,6 +50557,7 @@ void m68000_device::move_l_aips_aipd_dp() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50664,7 +50681,6 @@ void m68000_device::move_l_pais_aipd_dp() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50692,6 +50708,7 @@ void m68000_device::move_l_pais_aipd_dp() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50835,7 +50852,6 @@ void m68000_device::move_l_das_aipd_dp() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -50863,6 +50879,7 @@ void m68000_device::move_l_das_aipd_dp() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51047,7 +51064,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51075,6 +51091,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51220,7 +51237,6 @@ void m68000_device::move_l_adr16_aipd_dp() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51248,6 +51264,7 @@ void m68000_device::move_l_adr16_aipd_dp() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51417,7 +51434,6 @@ void m68000_device::move_l_adr32_aipd_dp() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -51445,6 +51461,7 @@ void m68000_device::move_l_adr32_aipd_dp() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51587,7 +51604,6 @@ void m68000_device::move_l_dpc_aipd_dp() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51615,6 +51631,7 @@ void m68000_device::move_l_dpc_aipd_dp() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51798,7 +51815,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51826,6 +51842,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51942,7 +51959,6 @@ void m68000_device::move_l_imm32_aipd_dp() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -51970,6 +51986,7 @@ void m68000_device::move_l_imm32_aipd_dp() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52014,7 +52031,6 @@ void m68000_device::move_l_ds_paid_dp() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52070,6 +52086,7 @@ void m68000_device::move_l_ds_paid_dp() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52110,7 +52127,6 @@ void m68000_device::move_l_as_paid_dp() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52166,6 +52182,7 @@ void m68000_device::move_l_as_paid_dp() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52257,7 +52274,6 @@ void m68000_device::move_l_ais_paid_dp() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52313,6 +52329,7 @@ void m68000_device::move_l_ais_paid_dp() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52407,7 +52424,6 @@ void m68000_device::move_l_aips_paid_dp() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52463,6 +52479,7 @@ void m68000_device::move_l_aips_paid_dp() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52558,7 +52575,6 @@ void m68000_device::move_l_pais_paid_dp() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52614,6 +52630,7 @@ void m68000_device::move_l_pais_paid_dp() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52729,7 +52746,6 @@ void m68000_device::move_l_das_paid_dp() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52785,6 +52801,7 @@ void m68000_device::move_l_das_paid_dp() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -52941,7 +52958,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52997,6 +53013,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53114,7 +53131,6 @@ void m68000_device::move_l_adr16_paid_dp() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53170,6 +53186,7 @@ void m68000_device::move_l_adr16_paid_dp() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53311,7 +53328,6 @@ void m68000_device::move_l_adr32_paid_dp() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53367,6 +53383,7 @@ void m68000_device::move_l_adr32_paid_dp() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -53481,7 +53498,6 @@ void m68000_device::move_l_dpc_paid_dp() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53537,6 +53553,7 @@ void m68000_device::move_l_dpc_paid_dp() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53692,7 +53709,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53748,6 +53764,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53838,7 +53855,6 @@ void m68000_device::move_l_imm32_paid_dp() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53894,6 +53910,7 @@ void m68000_device::move_l_imm32_paid_dp() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -53985,7 +54002,6 @@ void m68000_device::move_l_ds_dad_dp() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54013,6 +54029,7 @@ void m68000_device::move_l_ds_dad_dp() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54108,7 +54125,6 @@ void m68000_device::move_l_as_dad_dp() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54136,6 +54152,7 @@ void m68000_device::move_l_as_dad_dp() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54285,6 +54302,7 @@ void m68000_device::move_l_ais_dad_dp() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54312,11 +54330,11 @@ void m68000_device::move_l_ais_dad_dp() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54464,6 +54482,7 @@ void m68000_device::move_l_aips_dad_dp() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54491,11 +54510,11 @@ void m68000_device::move_l_aips_dad_dp() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54644,6 +54663,7 @@ void m68000_device::move_l_pais_dad_dp() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54671,11 +54691,11 @@ void m68000_device::move_l_pais_dad_dp() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54844,6 +54864,7 @@ void m68000_device::move_l_das_dad_dp() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -54871,11 +54892,11 @@ void m68000_device::move_l_das_dad_dp() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55085,6 +55106,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55112,11 +55134,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55287,6 +55309,7 @@ void m68000_device::move_l_adr16_dad_dp() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55314,11 +55337,11 @@ void m68000_device::move_l_adr16_dad_dp() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55513,6 +55536,7 @@ void m68000_device::move_l_adr32_dad_dp() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -55540,11 +55564,11 @@ void m68000_device::move_l_adr32_dad_dp() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55712,6 +55736,7 @@ void m68000_device::move_l_dpc_dad_dp() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55739,11 +55764,11 @@ void m68000_device::move_l_dpc_dad_dp() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55952,6 +55977,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55979,11 +56005,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56124,7 +56150,6 @@ void m68000_device::move_l_imm32_dad_dp() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56152,6 +56177,7 @@ void m68000_device::move_l_imm32_dad_dp() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56289,7 +56315,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56317,6 +56342,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56454,7 +56480,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56482,6 +56507,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56672,6 +56698,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56699,11 +56726,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56892,6 +56919,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56919,11 +56947,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57113,6 +57141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -57140,11 +57169,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57354,6 +57383,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57381,11 +57411,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57636,6 +57666,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57663,11 +57694,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57879,6 +57910,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57906,11 +57938,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58146,6 +58178,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -58173,11 +58206,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58386,6 +58419,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58413,11 +58447,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58667,6 +58701,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58694,11 +58729,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58881,7 +58916,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -58909,6 +58943,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59007,6 +59042,7 @@ void m68000_device::move_l_ds_adr16_dp() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59034,11 +59070,11 @@ void m68000_device::move_l_ds_adr16_dp() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59132,6 +59168,7 @@ void m68000_device::move_l_as_adr16_dp() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59159,11 +59196,11 @@ void m68000_device::move_l_as_adr16_dp() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59307,6 +59344,7 @@ void m68000_device::move_l_ais_adr16_dp() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59334,11 +59372,11 @@ void m68000_device::move_l_ais_adr16_dp() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59485,6 +59523,7 @@ void m68000_device::move_l_aips_adr16_dp() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59512,11 +59551,11 @@ void m68000_device::move_l_aips_adr16_dp() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59664,6 +59703,7 @@ void m68000_device::move_l_pais_adr16_dp() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59691,11 +59731,11 @@ void m68000_device::move_l_pais_adr16_dp() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59863,6 +59903,7 @@ void m68000_device::move_l_das_adr16_dp() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -59890,11 +59931,11 @@ void m68000_device::move_l_das_adr16_dp() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60103,6 +60144,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60130,11 +60172,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60304,6 +60346,7 @@ void m68000_device::move_l_adr16_adr16_dp() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60331,11 +60374,11 @@ void m68000_device::move_l_adr16_adr16_dp() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60529,6 +60572,7 @@ void m68000_device::move_l_adr32_adr16_dp() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -60556,11 +60600,11 @@ void m68000_device::move_l_adr32_adr16_dp() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60727,6 +60771,7 @@ void m68000_device::move_l_dpc_adr16_dp() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60754,11 +60799,11 @@ void m68000_device::move_l_dpc_adr16_dp() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60966,6 +61011,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60993,11 +61039,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61141,6 +61187,7 @@ void m68000_device::move_l_imm32_adr16_dp() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61168,11 +61215,11 @@ void m68000_device::move_l_imm32_adr16_dp() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61290,6 +61337,7 @@ void m68000_device::move_l_ds_adr32_dp() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61317,11 +61365,11 @@ void m68000_device::move_l_ds_adr32_dp() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61439,6 +61487,7 @@ void m68000_device::move_l_as_adr32_dp() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61466,11 +61515,11 @@ void m68000_device::move_l_as_adr32_dp() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61613,7 +61662,6 @@ void m68000_device::move_l_ais_adr32_dp() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61668,11 +61716,11 @@ void m68000_device::move_l_ais_adr32_dp() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61818,7 +61866,6 @@ void m68000_device::move_l_aips_adr32_dp() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61873,11 +61920,11 @@ void m68000_device::move_l_aips_adr32_dp() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62024,7 +62071,6 @@ void m68000_device::move_l_pais_adr32_dp() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -62079,11 +62125,11 @@ void m68000_device::move_l_pais_adr32_dp() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62250,7 +62296,6 @@ void m68000_device::move_l_das_adr32_dp() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62305,11 +62350,11 @@ void m68000_device::move_l_das_adr32_dp() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62517,7 +62562,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62572,11 +62616,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62745,7 +62789,6 @@ void m68000_device::move_l_adr16_adr32_dp() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62800,11 +62843,11 @@ void m68000_device::move_l_adr16_adr32_dp() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62997,7 +63040,6 @@ void m68000_device::move_l_adr32_adr32_dp() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -63052,11 +63094,11 @@ void m68000_device::move_l_adr32_adr32_dp() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63222,7 +63264,6 @@ void m68000_device::move_l_dpc_adr32_dp() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63277,11 +63318,11 @@ void m68000_device::move_l_dpc_adr32_dp() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63488,7 +63529,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63543,11 +63583,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63715,6 +63755,7 @@ void m68000_device::move_l_imm32_adr32_dp() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63742,11 +63783,11 @@ void m68000_device::move_l_imm32_adr32_dp() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63786,7 +63827,6 @@ void m68000_device::move_w_ds_dd_dp() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63795,6 +63835,7 @@ void m68000_device::move_w_ds_dd_dp() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63836,7 +63877,6 @@ void m68000_device::move_w_as_dd_dp() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63845,6 +63885,7 @@ void m68000_device::move_w_as_dd_dp() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63913,7 +63954,6 @@ void m68000_device::move_w_ais_dd_dp() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -63922,6 +63962,7 @@ void m68000_device::move_w_ais_dd_dp() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63992,7 +64033,6 @@ void m68000_device::move_w_aips_dd_dp() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64001,6 +64041,7 @@ void m68000_device::move_w_aips_dd_dp() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64073,7 +64114,6 @@ void m68000_device::move_w_pais_dd_dp() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64082,6 +64122,7 @@ void m68000_device::move_w_pais_dd_dp() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64173,7 +64214,6 @@ void m68000_device::move_w_das_dd_dp() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64182,6 +64222,7 @@ void m68000_device::move_w_das_dd_dp() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64314,7 +64355,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64323,6 +64363,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64413,7 +64454,6 @@ void m68000_device::move_w_adr16_dd_dp() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64422,6 +64462,7 @@ void m68000_device::move_w_adr16_dd_dp() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64536,7 +64577,6 @@ void m68000_device::move_w_adr32_dd_dp() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64545,6 +64585,7 @@ void m68000_device::move_w_adr32_dd_dp() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64635,7 +64676,6 @@ void m68000_device::move_w_dpc_dd_dp() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64644,6 +64684,7 @@ void m68000_device::move_w_dpc_dd_dp() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64775,7 +64816,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64784,6 +64824,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64849,7 +64890,6 @@ void m68000_device::move_w_imm16_dd_dp() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -64858,6 +64898,7 @@ void m68000_device::move_w_imm16_dd_dp() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64899,12 +64940,12 @@ void m68000_device::movea_w_ds_ad_dp() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64947,12 +64988,12 @@ void m68000_device::movea_w_as_ad_dp() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65022,12 +65063,12 @@ void m68000_device::movea_w_ais_ad_dp() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65098,12 +65139,12 @@ void m68000_device::movea_w_aips_ad_dp() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65176,12 +65217,12 @@ void m68000_device::movea_w_pais_ad_dp() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65273,12 +65314,12 @@ void m68000_device::movea_w_das_ad_dp() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65411,12 +65452,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65507,12 +65548,12 @@ void m68000_device::movea_w_adr16_ad_dp() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65627,12 +65668,12 @@ void m68000_device::movea_w_adr32_ad_dp() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65723,12 +65764,12 @@ void m68000_device::movea_w_dpc_ad_dp() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65860,12 +65901,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65931,12 +65972,12 @@ void m68000_device::movea_w_imm16_ad_dp() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65979,7 +66020,6 @@ void m68000_device::move_w_ds_aid_dp() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66008,10 +66048,10 @@ void m68000_device::move_w_ds_aid_dp() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66051,7 +66091,6 @@ void m68000_device::move_w_as_aid_dp() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66080,10 +66119,10 @@ void m68000_device::move_w_as_aid_dp() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66177,10 +66216,10 @@ void m68000_device::move_w_ais_aid_dp() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66278,10 +66317,10 @@ void m68000_device::move_w_aips_aid_dp() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66381,10 +66420,10 @@ void m68000_device::move_w_pais_aid_dp() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66503,10 +66542,10 @@ void m68000_device::move_w_das_aid_dp() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66666,10 +66705,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66787,10 +66826,10 @@ void m68000_device::move_w_adr16_aid_dp() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66932,10 +66971,10 @@ void m68000_device::move_w_adr32_aid_dp() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67053,10 +67092,10 @@ void m68000_device::move_w_dpc_aid_dp() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67215,10 +67254,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67284,7 +67323,6 @@ void m68000_device::move_w_imm16_aid_dp() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67313,10 +67351,10 @@ void m68000_device::move_w_imm16_aid_dp() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67356,7 +67394,6 @@ void m68000_device::move_w_ds_aipd_dp() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67385,6 +67422,7 @@ void m68000_device::move_w_ds_aipd_dp() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67426,7 +67464,6 @@ void m68000_device::move_w_as_aipd_dp() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67455,6 +67492,7 @@ void m68000_device::move_w_as_aipd_dp() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67523,7 +67561,6 @@ void m68000_device::move_w_ais_aipd_dp() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67552,6 +67589,7 @@ void m68000_device::move_w_ais_aipd_dp() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67624,7 +67662,6 @@ void m68000_device::move_w_aips_aipd_dp() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67653,6 +67690,7 @@ void m68000_device::move_w_aips_aipd_dp() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67727,7 +67765,6 @@ void m68000_device::move_w_pais_aipd_dp() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67756,6 +67793,7 @@ void m68000_device::move_w_pais_aipd_dp() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67849,7 +67887,6 @@ void m68000_device::move_w_das_aipd_dp() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -67878,6 +67915,7 @@ void m68000_device::move_w_das_aipd_dp() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68012,7 +68050,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68041,6 +68078,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68133,7 +68171,6 @@ void m68000_device::move_w_adr16_aipd_dp() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68162,6 +68199,7 @@ void m68000_device::move_w_adr16_aipd_dp() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68278,7 +68316,6 @@ void m68000_device::move_w_adr32_aipd_dp() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -68307,6 +68344,7 @@ void m68000_device::move_w_adr32_aipd_dp() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68399,7 +68437,6 @@ void m68000_device::move_w_dpc_aipd_dp() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68428,6 +68465,7 @@ void m68000_device::move_w_dpc_aipd_dp() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68561,7 +68599,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68590,6 +68627,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68657,7 +68695,6 @@ void m68000_device::move_w_imm16_aipd_dp() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68686,6 +68723,7 @@ void m68000_device::move_w_imm16_aipd_dp() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68727,7 +68765,6 @@ void m68000_device::move_w_ds_paid_dp() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68757,6 +68794,7 @@ void m68000_device::move_w_ds_paid_dp() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68797,7 +68835,6 @@ void m68000_device::move_w_as_paid_dp() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68827,6 +68864,7 @@ void m68000_device::move_w_as_paid_dp() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68894,7 +68932,6 @@ void m68000_device::move_w_ais_paid_dp() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68924,6 +68961,7 @@ void m68000_device::move_w_ais_paid_dp() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68995,7 +69033,6 @@ void m68000_device::move_w_aips_paid_dp() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69025,6 +69062,7 @@ void m68000_device::move_w_aips_paid_dp() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69098,7 +69136,6 @@ void m68000_device::move_w_pais_paid_dp() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69128,6 +69165,7 @@ void m68000_device::move_w_pais_paid_dp() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69220,7 +69258,6 @@ void m68000_device::move_w_das_paid_dp() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69250,6 +69287,7 @@ void m68000_device::move_w_das_paid_dp() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69383,7 +69421,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69413,6 +69450,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69504,7 +69542,6 @@ void m68000_device::move_w_adr16_paid_dp() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69534,6 +69571,7 @@ void m68000_device::move_w_adr16_paid_dp() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69649,7 +69687,6 @@ void m68000_device::move_w_adr32_paid_dp() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69679,6 +69716,7 @@ void m68000_device::move_w_adr32_paid_dp() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -69770,7 +69808,6 @@ void m68000_device::move_w_dpc_paid_dp() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69800,6 +69837,7 @@ void m68000_device::move_w_dpc_paid_dp() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69932,7 +69970,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69962,6 +69999,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70028,7 +70066,6 @@ void m68000_device::move_w_imm16_paid_dp() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70058,6 +70095,7 @@ void m68000_device::move_w_imm16_paid_dp() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70122,7 +70160,6 @@ void m68000_device::move_w_ds_dad_dp() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70150,11 +70187,11 @@ void m68000_device::move_w_ds_dad_dp() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70218,7 +70255,6 @@ void m68000_device::move_w_as_dad_dp() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70246,11 +70282,11 @@ void m68000_device::move_w_as_dad_dp() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70344,6 +70380,7 @@ void m68000_device::move_w_ais_dad_dp() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70371,11 +70408,11 @@ void m68000_device::move_w_ais_dad_dp() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70473,6 +70510,7 @@ void m68000_device::move_w_aips_dad_dp() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70500,11 +70538,11 @@ void m68000_device::move_w_aips_dad_dp() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70604,6 +70642,7 @@ void m68000_device::move_w_pais_dad_dp() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70631,11 +70670,11 @@ void m68000_device::move_w_pais_dad_dp() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70754,6 +70793,7 @@ void m68000_device::move_w_das_dad_dp() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70781,11 +70821,11 @@ void m68000_device::move_w_das_dad_dp() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70945,6 +70985,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70972,11 +71013,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71094,6 +71135,7 @@ void m68000_device::move_w_adr16_dad_dp() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71121,11 +71163,11 @@ void m68000_device::move_w_adr16_dad_dp() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71267,6 +71309,7 @@ void m68000_device::move_w_adr32_dad_dp() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -71294,11 +71337,11 @@ void m68000_device::move_w_adr32_dad_dp() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71416,6 +71459,7 @@ void m68000_device::move_w_dpc_dad_dp() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71443,11 +71487,11 @@ void m68000_device::move_w_dpc_dad_dp() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71606,6 +71650,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71633,11 +71678,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71727,7 +71772,6 @@ void m68000_device::move_w_imm16_dad_dp() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -71755,11 +71799,11 @@ void m68000_device::move_w_imm16_dad_dp() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71865,7 +71909,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -71893,11 +71936,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72003,7 +72046,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -72031,11 +72073,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72170,6 +72212,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72197,11 +72240,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72340,6 +72383,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72367,11 +72411,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72512,6 +72556,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72539,11 +72584,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72703,6 +72748,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72730,11 +72776,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72935,6 +72981,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72962,11 +73009,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73125,6 +73172,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73152,11 +73200,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73339,6 +73387,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -73366,11 +73415,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73529,6 +73578,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73556,11 +73606,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73760,6 +73810,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73787,11 +73838,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73923,7 +73974,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -73951,11 +74001,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74022,6 +74072,7 @@ void m68000_device::move_w_ds_adr16_dp() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74049,11 +74100,11 @@ void m68000_device::move_w_ds_adr16_dp() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74120,6 +74171,7 @@ void m68000_device::move_w_as_adr16_dp() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74147,11 +74199,11 @@ void m68000_device::move_w_as_adr16_dp() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74244,6 +74296,7 @@ void m68000_device::move_w_ais_adr16_dp() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74271,11 +74324,11 @@ void m68000_device::move_w_ais_adr16_dp() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74372,6 +74425,7 @@ void m68000_device::move_w_aips_adr16_dp() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74399,11 +74453,11 @@ void m68000_device::move_w_aips_adr16_dp() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74502,6 +74556,7 @@ void m68000_device::move_w_pais_adr16_dp() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74529,11 +74584,11 @@ void m68000_device::move_w_pais_adr16_dp() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74651,6 +74706,7 @@ void m68000_device::move_w_das_adr16_dp() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74678,11 +74734,11 @@ void m68000_device::move_w_das_adr16_dp() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74841,6 +74897,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74868,11 +74925,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74989,6 +75046,7 @@ void m68000_device::move_w_adr16_adr16_dp() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75016,11 +75074,11 @@ void m68000_device::move_w_adr16_adr16_dp() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75161,6 +75219,7 @@ void m68000_device::move_w_adr32_adr16_dp() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -75188,11 +75247,11 @@ void m68000_device::move_w_adr32_adr16_dp() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75309,6 +75368,7 @@ void m68000_device::move_w_dpc_adr16_dp() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75336,11 +75396,11 @@ void m68000_device::move_w_dpc_adr16_dp() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75498,6 +75558,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75525,11 +75586,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75622,6 +75683,7 @@ void m68000_device::move_w_imm16_adr16_dp() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75649,11 +75711,11 @@ void m68000_device::move_w_imm16_adr16_dp() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75744,6 +75806,7 @@ void m68000_device::move_w_ds_adr32_dp() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75771,11 +75834,11 @@ void m68000_device::move_w_ds_adr32_dp() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75866,6 +75929,7 @@ void m68000_device::move_w_as_adr32_dp() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75893,11 +75957,11 @@ void m68000_device::move_w_as_adr32_dp() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75990,7 +76054,6 @@ void m68000_device::move_w_ais_adr32_dp() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76042,11 +76105,11 @@ void m68000_device::move_w_ais_adr32_dp() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76143,7 +76206,6 @@ void m68000_device::move_w_aips_adr32_dp() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76195,11 +76257,11 @@ void m68000_device::move_w_aips_adr32_dp() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76298,7 +76360,6 @@ void m68000_device::move_w_pais_adr32_dp() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76350,11 +76411,11 @@ void m68000_device::move_w_pais_adr32_dp() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76472,7 +76533,6 @@ void m68000_device::move_w_das_adr32_dp() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76524,11 +76584,11 @@ void m68000_device::move_w_das_adr32_dp() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76687,7 +76747,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76739,11 +76798,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76860,7 +76919,6 @@ void m68000_device::move_w_adr16_adr32_dp() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76912,11 +76970,11 @@ void m68000_device::move_w_adr16_adr32_dp() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77057,7 +77115,6 @@ void m68000_device::move_w_adr32_adr32_dp() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -77109,11 +77166,11 @@ void m68000_device::move_w_adr32_adr32_dp() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77230,7 +77287,6 @@ void m68000_device::move_w_dpc_adr32_dp() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77282,11 +77338,11 @@ void m68000_device::move_w_dpc_adr32_dp() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77444,7 +77500,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77496,11 +77551,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77617,6 +77672,7 @@ void m68000_device::move_w_imm16_adr32_dp() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77644,11 +77700,11 @@ void m68000_device::move_w_imm16_adr32_dp() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77687,7 +77743,6 @@ void m68000_device::negx_b_ds_dp() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -77695,6 +77750,7 @@ void m68000_device::negx_b_ds_dp() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77758,7 +77814,6 @@ void m68000_device::negx_b_ais_dp() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77788,6 +77843,7 @@ void m68000_device::negx_b_ais_dp() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77847,7 +77903,6 @@ void m68000_device::negx_b_aips_dp() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77877,6 +77932,7 @@ void m68000_device::negx_b_aips_dp() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77938,7 +77994,6 @@ void m68000_device::negx_b_pais_dp() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77968,6 +78023,7 @@ void m68000_device::negx_b_pais_dp() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78048,7 +78104,6 @@ void m68000_device::negx_b_das_dp() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78078,6 +78133,7 @@ void m68000_device::negx_b_das_dp() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78199,7 +78255,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78229,6 +78284,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78308,7 +78364,6 @@ void m68000_device::negx_b_adr16_dp() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78338,6 +78393,7 @@ void m68000_device::negx_b_adr16_dp() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78441,7 +78497,6 @@ void m68000_device::negx_b_adr32_dp() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78471,6 +78526,7 @@ void m68000_device::negx_b_adr32_dp() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -78503,7 +78559,6 @@ void m68000_device::negx_w_ds_dp() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -78511,6 +78566,7 @@ void m68000_device::negx_w_ds_dp() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78578,7 +78634,6 @@ void m68000_device::negx_w_ais_dp() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78608,6 +78663,7 @@ void m68000_device::negx_w_ais_dp() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78677,7 +78733,6 @@ void m68000_device::negx_w_aips_dp() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78707,6 +78762,7 @@ void m68000_device::negx_w_aips_dp() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78778,7 +78834,6 @@ void m68000_device::negx_w_pais_dp() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78808,6 +78863,7 @@ void m68000_device::negx_w_pais_dp() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78898,7 +78954,6 @@ void m68000_device::negx_w_das_dp() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78928,6 +78983,7 @@ void m68000_device::negx_w_das_dp() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79059,7 +79115,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79089,6 +79144,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79178,7 +79234,6 @@ void m68000_device::negx_w_adr16_dp() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79208,6 +79263,7 @@ void m68000_device::negx_w_adr16_dp() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79321,7 +79377,6 @@ void m68000_device::negx_w_adr32_dp() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79351,6 +79406,7 @@ void m68000_device::negx_w_adr32_dp() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79389,7 +79445,6 @@ void m68000_device::negx_l_ds_dp() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -79423,6 +79478,7 @@ void m68000_device::negx_l_ds_dp() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79494,7 +79550,6 @@ void m68000_device::negx_l_ais_dp() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79550,6 +79605,7 @@ void m68000_device::negx_l_ais_dp() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79642,7 +79698,6 @@ void m68000_device::negx_l_aips_dp() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79698,6 +79753,7 @@ void m68000_device::negx_l_aips_dp() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79791,7 +79847,6 @@ void m68000_device::negx_l_pais_dp() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79847,6 +79902,7 @@ void m68000_device::negx_l_pais_dp() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79960,7 +80016,6 @@ void m68000_device::negx_l_das_dp() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80016,6 +80071,7 @@ void m68000_device::negx_l_das_dp() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80170,7 +80226,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80226,6 +80281,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80341,7 +80397,6 @@ void m68000_device::negx_l_adr16_dp() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80397,6 +80452,7 @@ void m68000_device::negx_l_adr16_dp() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80536,7 +80592,6 @@ void m68000_device::negx_l_adr32_dp() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80592,6 +80647,7 @@ void m68000_device::negx_l_adr32_dp() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -80630,7 +80686,6 @@ void m68000_device::move_sr_ds_dp() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -80658,6 +80713,7 @@ void m68000_device::move_sr_ds_dp() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -80704,7 +80760,6 @@ void m68000_device::move_sr_ais_dp() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80735,6 +80790,7 @@ void m68000_device::move_sr_ais_dp() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80804,7 +80860,6 @@ void m68000_device::move_sr_aips_dp() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80835,6 +80890,7 @@ void m68000_device::move_sr_aips_dp() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80906,7 +80962,6 @@ void m68000_device::move_sr_pais_dp() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80937,6 +80992,7 @@ void m68000_device::move_sr_pais_dp() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -81027,7 +81083,6 @@ void m68000_device::move_sr_das_dp() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81058,6 +81113,7 @@ void m68000_device::move_sr_das_dp() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81189,7 +81245,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81220,6 +81275,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81309,7 +81365,6 @@ void m68000_device::move_sr_adr16_dp() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81340,6 +81395,7 @@ void m68000_device::move_sr_adr16_dp() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81453,7 +81509,6 @@ void m68000_device::move_sr_adr32_dp() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81484,6 +81539,7 @@ void m68000_device::move_sr_adr32_dp() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -81706,7 +81762,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81721,6 +81776,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -81752,7 +81808,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81978,7 +82033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81993,6 +82047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82024,7 +82079,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82254,7 +82308,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82269,6 +82322,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82300,7 +82354,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82532,7 +82585,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82547,6 +82599,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82578,7 +82631,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82829,7 +82881,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82844,6 +82895,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82875,7 +82927,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83167,7 +83218,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83182,6 +83232,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -83213,7 +83264,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83463,7 +83513,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83478,6 +83527,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -83509,7 +83559,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83783,7 +83832,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83798,6 +83846,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -83829,7 +83878,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84079,7 +84127,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84094,6 +84141,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84125,7 +84173,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84416,7 +84463,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84431,6 +84477,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84462,7 +84509,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84687,7 +84733,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84702,6 +84747,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84733,7 +84779,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84749,13 +84794,13 @@ void m68000_device::lea_ais_ad_dp() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84823,11 +84868,11 @@ void m68000_device::lea_das_ad_dp() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84936,11 +84981,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85003,11 +85048,11 @@ void m68000_device::lea_adr16_ad_dp() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85096,11 +85141,11 @@ void m68000_device::lea_adr32_ad_dp() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85165,11 +85210,11 @@ void m68000_device::lea_dpc_ad_dp() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85277,11 +85322,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85320,7 +85365,6 @@ void m68000_device::clr_b_ds_dp() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -85328,6 +85372,7 @@ void m68000_device::clr_b_ds_dp() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85393,7 +85438,6 @@ void m68000_device::clr_b_ais_dp() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85423,6 +85467,7 @@ void m68000_device::clr_b_ais_dp() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85485,7 +85530,6 @@ void m68000_device::clr_b_aips_dp() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85515,6 +85559,7 @@ void m68000_device::clr_b_aips_dp() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85579,7 +85624,6 @@ void m68000_device::clr_b_pais_dp() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85609,6 +85653,7 @@ void m68000_device::clr_b_pais_dp() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85692,7 +85737,6 @@ void m68000_device::clr_b_das_dp() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85722,6 +85766,7 @@ void m68000_device::clr_b_das_dp() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85848,7 +85893,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85878,6 +85922,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85960,7 +86005,6 @@ void m68000_device::clr_b_adr16_dp() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85990,6 +86034,7 @@ void m68000_device::clr_b_adr16_dp() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86097,7 +86142,6 @@ void m68000_device::clr_b_adr32_dp() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86127,6 +86171,7 @@ void m68000_device::clr_b_adr32_dp() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -86160,7 +86205,6 @@ void m68000_device::clr_w_ds_dp() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -86168,6 +86212,7 @@ void m68000_device::clr_w_ds_dp() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86237,7 +86282,6 @@ void m68000_device::clr_w_ais_dp() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86267,6 +86311,7 @@ void m68000_device::clr_w_ais_dp() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86339,7 +86384,6 @@ void m68000_device::clr_w_aips_dp() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86369,6 +86413,7 @@ void m68000_device::clr_w_aips_dp() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86443,7 +86488,6 @@ void m68000_device::clr_w_pais_dp() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86473,6 +86517,7 @@ void m68000_device::clr_w_pais_dp() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86566,7 +86611,6 @@ void m68000_device::clr_w_das_dp() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86596,6 +86640,7 @@ void m68000_device::clr_w_das_dp() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86732,7 +86777,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86762,6 +86806,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86854,7 +86899,6 @@ void m68000_device::clr_w_adr16_dp() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86884,6 +86928,7 @@ void m68000_device::clr_w_adr16_dp() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -87001,7 +87046,6 @@ void m68000_device::clr_w_adr32_dp() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87031,6 +87075,7 @@ void m68000_device::clr_w_adr32_dp() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87070,7 +87115,6 @@ void m68000_device::clr_l_ds_dp() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -87104,6 +87148,7 @@ void m68000_device::clr_l_ds_dp() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -87177,7 +87222,6 @@ void m68000_device::clr_l_ais_dp() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87233,6 +87277,7 @@ void m68000_device::clr_l_ais_dp() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87328,7 +87373,6 @@ void m68000_device::clr_l_aips_dp() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87384,6 +87428,7 @@ void m68000_device::clr_l_aips_dp() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87480,7 +87525,6 @@ void m68000_device::clr_l_pais_dp() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87536,6 +87580,7 @@ void m68000_device::clr_l_pais_dp() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87652,7 +87697,6 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87708,6 +87752,7 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -87867,7 +87912,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87923,6 +87967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88042,7 +88087,6 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88098,6 +88142,7 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88242,7 +88287,6 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88298,6 +88342,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -88337,7 +88382,6 @@ void m68000_device::neg_b_ds_dp() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -88345,6 +88389,7 @@ void m68000_device::neg_b_ds_dp() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88408,7 +88453,6 @@ void m68000_device::neg_b_ais_dp() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88438,6 +88482,7 @@ void m68000_device::neg_b_ais_dp() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88497,7 +88542,6 @@ void m68000_device::neg_b_aips_dp() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88527,6 +88571,7 @@ void m68000_device::neg_b_aips_dp() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88588,7 +88633,6 @@ void m68000_device::neg_b_pais_dp() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88618,6 +88662,7 @@ void m68000_device::neg_b_pais_dp() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88698,7 +88743,6 @@ void m68000_device::neg_b_das_dp() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88728,6 +88772,7 @@ void m68000_device::neg_b_das_dp() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88849,7 +88894,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88879,6 +88923,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88958,7 +89003,6 @@ void m68000_device::neg_b_adr16_dp() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88988,6 +89032,7 @@ void m68000_device::neg_b_adr16_dp() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89091,7 +89136,6 @@ void m68000_device::neg_b_adr32_dp() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89121,6 +89165,7 @@ void m68000_device::neg_b_adr32_dp() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -89153,7 +89198,6 @@ void m68000_device::neg_w_ds_dp() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -89161,6 +89205,7 @@ void m68000_device::neg_w_ds_dp() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89228,7 +89273,6 @@ void m68000_device::neg_w_ais_dp() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89258,6 +89302,7 @@ void m68000_device::neg_w_ais_dp() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89327,7 +89372,6 @@ void m68000_device::neg_w_aips_dp() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89357,6 +89401,7 @@ void m68000_device::neg_w_aips_dp() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89428,7 +89473,6 @@ void m68000_device::neg_w_pais_dp() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89458,6 +89502,7 @@ void m68000_device::neg_w_pais_dp() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89548,7 +89593,6 @@ void m68000_device::neg_w_das_dp() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89578,6 +89622,7 @@ void m68000_device::neg_w_das_dp() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89709,7 +89754,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89739,6 +89783,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89828,7 +89873,6 @@ void m68000_device::neg_w_adr16_dp() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89858,6 +89902,7 @@ void m68000_device::neg_w_adr16_dp() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89971,7 +90016,6 @@ void m68000_device::neg_w_adr32_dp() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90001,6 +90045,7 @@ void m68000_device::neg_w_adr32_dp() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90039,7 +90084,6 @@ void m68000_device::neg_l_ds_dp() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -90073,6 +90117,7 @@ void m68000_device::neg_l_ds_dp() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -90144,7 +90189,6 @@ void m68000_device::neg_l_ais_dp() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90200,6 +90244,7 @@ void m68000_device::neg_l_ais_dp() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90292,7 +90337,6 @@ void m68000_device::neg_l_aips_dp() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90348,6 +90392,7 @@ void m68000_device::neg_l_aips_dp() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90441,7 +90486,6 @@ void m68000_device::neg_l_pais_dp() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90497,6 +90541,7 @@ void m68000_device::neg_l_pais_dp() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90610,7 +90655,6 @@ void m68000_device::neg_l_das_dp() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90666,6 +90710,7 @@ void m68000_device::neg_l_das_dp() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90820,7 +90865,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90876,6 +90920,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90991,7 +91036,6 @@ void m68000_device::neg_l_adr16_dp() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91047,6 +91091,7 @@ void m68000_device::neg_l_adr16_dp() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -91186,7 +91231,6 @@ void m68000_device::neg_l_adr32_dp() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91242,6 +91286,7 @@ void m68000_device::neg_l_adr32_dp() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -91315,11 +91360,11 @@ void m68000_device::move_ds_ccr_dp() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91420,11 +91465,11 @@ void m68000_device::move_ais_ccr_dp() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91529,11 +91574,11 @@ void m68000_device::move_aips_ccr_dp() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91640,11 +91685,11 @@ void m68000_device::move_pais_ccr_dp() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91770,11 +91815,11 @@ void m68000_device::move_das_ccr_dp() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91941,11 +91986,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92070,11 +92115,11 @@ void m68000_device::move_adr16_ccr_dp() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92223,11 +92268,11 @@ void m68000_device::move_adr32_ccr_dp() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92352,11 +92397,11 @@ void m68000_device::move_dpc_ccr_dp() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92522,11 +92567,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92626,11 +92671,11 @@ void m68000_device::move_imm8_ccr_dp() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92669,7 +92714,6 @@ void m68000_device::not_b_ds_dp() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -92677,6 +92721,7 @@ void m68000_device::not_b_ds_dp() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92740,7 +92785,6 @@ void m68000_device::not_b_ais_dp() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92770,6 +92814,7 @@ void m68000_device::not_b_ais_dp() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92829,7 +92874,6 @@ void m68000_device::not_b_aips_dp() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92859,6 +92903,7 @@ void m68000_device::not_b_aips_dp() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92920,7 +92965,6 @@ void m68000_device::not_b_pais_dp() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92950,6 +92994,7 @@ void m68000_device::not_b_pais_dp() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93030,7 +93075,6 @@ void m68000_device::not_b_das_dp() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93060,6 +93104,7 @@ void m68000_device::not_b_das_dp() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93181,7 +93226,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93211,6 +93255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93290,7 +93335,6 @@ void m68000_device::not_b_adr16_dp() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93320,6 +93364,7 @@ void m68000_device::not_b_adr16_dp() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93423,7 +93468,6 @@ void m68000_device::not_b_adr32_dp() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93453,6 +93497,7 @@ void m68000_device::not_b_adr32_dp() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -93485,7 +93530,6 @@ void m68000_device::not_w_ds_dp() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -93493,6 +93537,7 @@ void m68000_device::not_w_ds_dp() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93560,7 +93605,6 @@ void m68000_device::not_w_ais_dp() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93590,6 +93634,7 @@ void m68000_device::not_w_ais_dp() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93659,7 +93704,6 @@ void m68000_device::not_w_aips_dp() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93689,6 +93733,7 @@ void m68000_device::not_w_aips_dp() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93760,7 +93805,6 @@ void m68000_device::not_w_pais_dp() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93790,6 +93834,7 @@ void m68000_device::not_w_pais_dp() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93880,7 +93925,6 @@ void m68000_device::not_w_das_dp() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93910,6 +93954,7 @@ void m68000_device::not_w_das_dp() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94041,7 +94086,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94071,6 +94115,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94160,7 +94205,6 @@ void m68000_device::not_w_adr16_dp() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94190,6 +94234,7 @@ void m68000_device::not_w_adr16_dp() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94303,7 +94348,6 @@ void m68000_device::not_w_adr32_dp() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94333,6 +94377,7 @@ void m68000_device::not_w_adr32_dp() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94371,7 +94416,6 @@ void m68000_device::not_l_ds_dp() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -94405,6 +94449,7 @@ void m68000_device::not_l_ds_dp() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -94476,7 +94521,6 @@ void m68000_device::not_l_ais_dp() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94532,6 +94576,7 @@ void m68000_device::not_l_ais_dp() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94624,7 +94669,6 @@ void m68000_device::not_l_aips_dp() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94680,6 +94724,7 @@ void m68000_device::not_l_aips_dp() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94773,7 +94818,6 @@ void m68000_device::not_l_pais_dp() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94829,6 +94873,7 @@ void m68000_device::not_l_pais_dp() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94942,7 +94987,6 @@ void m68000_device::not_l_das_dp() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94998,6 +95042,7 @@ void m68000_device::not_l_das_dp() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95152,7 +95197,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95208,6 +95252,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95323,7 +95368,6 @@ void m68000_device::not_l_adr16_dp() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95379,6 +95423,7 @@ void m68000_device::not_l_adr16_dp() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95518,7 +95563,6 @@ void m68000_device::not_l_adr32_dp() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95574,6 +95618,7 @@ void m68000_device::not_l_adr32_dp() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -95653,11 +95698,11 @@ void m68000_device::move_ds_sr_dp() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95764,11 +95809,11 @@ void m68000_device::move_ais_sr_dp() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95879,11 +95924,11 @@ void m68000_device::move_aips_sr_dp() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95996,11 +96041,11 @@ void m68000_device::move_pais_sr_dp() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96132,11 +96177,11 @@ void m68000_device::move_das_sr_dp() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96309,11 +96354,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96444,11 +96489,11 @@ void m68000_device::move_adr16_sr_dp() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96603,11 +96648,11 @@ void m68000_device::move_adr32_sr_dp() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96738,11 +96783,11 @@ void m68000_device::move_dpc_sr_dp() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96914,11 +96959,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -97024,11 +97069,11 @@ void m68000_device::move_i16u_sr_dp() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -97067,7 +97112,6 @@ void m68000_device::nbcd_b_ds_dp() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -97099,6 +97143,7 @@ void m68000_device::nbcd_b_ds_dp() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97142,7 +97187,6 @@ void m68000_device::nbcd_b_ais_dp() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97174,6 +97218,7 @@ void m68000_device::nbcd_b_ais_dp() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97233,7 +97278,6 @@ void m68000_device::nbcd_b_aips_dp() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97265,6 +97309,7 @@ void m68000_device::nbcd_b_aips_dp() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97326,7 +97371,6 @@ void m68000_device::nbcd_b_pais_dp() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97358,6 +97402,7 @@ void m68000_device::nbcd_b_pais_dp() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97438,7 +97483,6 @@ void m68000_device::nbcd_b_das_dp() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97470,6 +97514,7 @@ void m68000_device::nbcd_b_das_dp() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97591,7 +97636,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97623,6 +97667,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97702,7 +97747,6 @@ void m68000_device::nbcd_b_adr16_dp() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97734,6 +97778,7 @@ void m68000_device::nbcd_b_adr16_dp() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97837,7 +97882,6 @@ void m68000_device::nbcd_b_adr32_dp() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97869,6 +97913,7 @@ void m68000_device::nbcd_b_adr32_dp() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -97901,7 +97946,6 @@ void m68000_device::swap_ds_dp() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -97910,6 +97954,7 @@ void m68000_device::swap_ds_dp() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -97953,7 +97998,6 @@ void m68000_device::pea_ais_dp() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98007,6 +98051,7 @@ void m68000_device::pea_ais_dp() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98072,7 +98117,6 @@ void m68000_device::pea_das_dp() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98128,6 +98172,7 @@ void m68000_device::pea_das_dp() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98230,7 +98275,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98288,6 +98332,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98374,6 +98419,7 @@ void m68000_device::pea_adr16_dp() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98401,11 +98447,11 @@ void m68000_device::pea_adr16_dp() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98516,6 +98562,7 @@ void m68000_device::pea_adr32_dp() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98543,11 +98590,11 @@ void m68000_device::pea_adr32_dp() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98612,7 +98659,6 @@ void m68000_device::pea_dpc_dp() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98668,6 +98714,7 @@ void m68000_device::pea_dpc_dp() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98769,7 +98816,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98827,6 +98873,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98865,7 +98912,6 @@ void m68000_device::ext_w_ds_dp() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -98873,6 +98919,7 @@ void m68000_device::ext_w_ds_dp() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98978,10 +99025,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99087,11 +99134,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99221,10 +99268,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99395,10 +99442,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99528,10 +99575,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99685,10 +99732,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99727,7 +99774,6 @@ void m68000_device::ext_l_ds_dp() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -99735,6 +99781,7 @@ void m68000_device::ext_l_ds_dp() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99863,10 +99910,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99996,11 +100043,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100153,10 +100200,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100350,10 +100397,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100506,10 +100553,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100686,10 +100733,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100728,7 +100775,6 @@ void m68000_device::tst_b_ds_dp() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -100737,6 +100783,7 @@ void m68000_device::tst_b_ds_dp() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100800,7 +100847,6 @@ void m68000_device::tst_b_ais_dp() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100808,6 +100854,7 @@ void m68000_device::tst_b_ais_dp() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100876,7 +100923,6 @@ void m68000_device::tst_b_aips_dp() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100884,6 +100930,7 @@ void m68000_device::tst_b_aips_dp() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100954,7 +101001,6 @@ void m68000_device::tst_b_pais_dp() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100962,6 +101008,7 @@ void m68000_device::tst_b_pais_dp() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101051,7 +101098,6 @@ void m68000_device::tst_b_das_dp() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101059,6 +101105,7 @@ void m68000_device::tst_b_das_dp() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101191,7 +101238,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101199,6 +101245,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101287,7 +101334,6 @@ void m68000_device::tst_b_adr16_dp() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101295,6 +101341,7 @@ void m68000_device::tst_b_adr16_dp() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101408,7 +101455,6 @@ void m68000_device::tst_b_adr32_dp() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101416,6 +101462,7 @@ void m68000_device::tst_b_adr32_dp() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101455,7 +101502,6 @@ void m68000_device::tst_w_ds_dp() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -101464,6 +101510,7 @@ void m68000_device::tst_w_ds_dp() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101531,7 +101578,6 @@ void m68000_device::tst_w_ais_dp() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101539,6 +101585,7 @@ void m68000_device::tst_w_ais_dp() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101611,7 +101658,6 @@ void m68000_device::tst_w_aips_dp() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101619,6 +101665,7 @@ void m68000_device::tst_w_aips_dp() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101693,7 +101740,6 @@ void m68000_device::tst_w_pais_dp() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101701,6 +101747,7 @@ void m68000_device::tst_w_pais_dp() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101794,7 +101841,6 @@ void m68000_device::tst_w_das_dp() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101802,6 +101848,7 @@ void m68000_device::tst_w_das_dp() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101938,7 +101985,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101946,6 +101992,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102038,7 +102085,6 @@ void m68000_device::tst_w_adr16_dp() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102046,6 +102092,7 @@ void m68000_device::tst_w_adr16_dp() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102163,7 +102210,6 @@ void m68000_device::tst_w_adr32_dp() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102171,6 +102217,7 @@ void m68000_device::tst_w_adr32_dp() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102210,7 +102257,6 @@ void m68000_device::tst_l_ds_dp() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -102219,6 +102265,7 @@ void m68000_device::tst_l_ds_dp() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102312,7 +102359,6 @@ void m68000_device::tst_l_ais_dp() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102320,6 +102366,7 @@ void m68000_device::tst_l_ais_dp() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102417,7 +102464,6 @@ void m68000_device::tst_l_aips_dp() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102425,6 +102471,7 @@ void m68000_device::tst_l_aips_dp() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102523,7 +102570,6 @@ void m68000_device::tst_l_pais_dp() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102531,6 +102577,7 @@ void m68000_device::tst_l_pais_dp() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102649,7 +102696,6 @@ void m68000_device::tst_l_das_dp() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102657,6 +102703,7 @@ void m68000_device::tst_l_das_dp() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102818,7 +102865,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102826,6 +102872,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102947,7 +102994,6 @@ void m68000_device::tst_l_adr16_dp() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102955,6 +103001,7 @@ void m68000_device::tst_l_adr16_dp() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103101,7 +103148,6 @@ void m68000_device::tst_l_adr32_dp() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -103109,6 +103155,7 @@ void m68000_device::tst_l_adr32_dp() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103150,13 +103197,13 @@ void m68000_device::tas_ds_dp() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103253,12 +103300,12 @@ void m68000_device::tas_ais_dp() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103356,12 +103403,12 @@ void m68000_device::tas_aips_dp() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103461,12 +103508,12 @@ void m68000_device::tas_pais_dp() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103585,12 +103632,12 @@ void m68000_device::tas_das_dp() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103752,12 +103799,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103875,12 +103922,12 @@ void m68000_device::tas_adr16_dp() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104023,12 +104070,12 @@ void m68000_device::tas_adr32_dp() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104158,10 +104205,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104226,7 +104273,6 @@ void m68000_device::movem_w_aips_list_dp() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -104295,6 +104341,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104449,10 +104496,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104647,10 +104694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104803,10 +104850,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104986,10 +105033,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105143,10 +105190,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105340,10 +105387,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105496,10 +105543,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105564,7 +105611,6 @@ void m68000_device::movem_l_aips_list_dp() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -105657,6 +105703,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105835,10 +105882,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106057,10 +106104,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106237,10 +106284,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106444,10 +106491,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106625,10 +106672,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106846,10 +106893,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107050,11 +107097,11 @@ void m68000_device::trap_imm4_dp() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107122,7 +107169,6 @@ void m68000_device::link_as_imm16_dp() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -107171,6 +107217,7 @@ void m68000_device::link_as_imm16_dp() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107237,7 +107284,6 @@ void m68000_device::unlk_as_dp() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -107266,6 +107312,7 @@ void m68000_device::unlk_as_dp() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107309,13 +107356,13 @@ void m68000_device::move_as_usp_dp() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107360,13 +107407,13 @@ void m68000_device::move_usp_as_dp() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107409,6 +107456,7 @@ void m68000_device::reset_dp() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107418,7 +107466,6 @@ void m68000_device::reset_dp() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -107439,6 +107486,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107477,11 +107525,11 @@ void m68000_device::nop_dp() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107522,6 +107570,7 @@ void m68000_device::stop_i16u_dp() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107531,6 +107580,7 @@ void m68000_device::stop_i16u_dp() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -107659,11 +107709,11 @@ void m68000_device::rte_dp() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107774,11 +107824,11 @@ void m68000_device::rts_dp() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107816,7 +107866,6 @@ void m68000_device::trapv_dp() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -107827,6 +107876,7 @@ void m68000_device::trapv_dp() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108038,11 +108088,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108182,11 +108232,11 @@ void m68000_device::rtr_dp() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108273,7 +108323,6 @@ void m68000_device::jsr_ais_dp() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108298,11 +108347,11 @@ void m68000_device::jsr_ais_dp() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108395,7 +108444,6 @@ void m68000_device::jsr_das_dp() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108420,11 +108468,11 @@ void m68000_device::jsr_das_dp() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108537,7 +108585,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108562,11 +108609,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108655,7 +108702,6 @@ void m68000_device::jsr_adr16_dp() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108680,11 +108726,11 @@ void m68000_device::jsr_adr16_dp() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108795,7 +108841,6 @@ void m68000_device::jsr_adr32_dp() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -108820,11 +108865,11 @@ void m68000_device::jsr_adr32_dp() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108916,7 +108961,6 @@ void m68000_device::jsr_dpc_dp() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108941,11 +108985,11 @@ void m68000_device::jsr_dpc_dp() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109057,7 +109101,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109082,11 +109125,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109148,11 +109191,11 @@ void m68000_device::jmp_ais_dp() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109218,11 +109261,11 @@ void m68000_device::jmp_das_dp() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109308,11 +109351,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109376,11 +109419,11 @@ void m68000_device::jmp_adr16_dp() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109465,11 +109508,11 @@ void m68000_device::jmp_adr32_dp() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109534,11 +109577,11 @@ void m68000_device::jmp_dpc_dp() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109623,11 +109666,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109666,7 +109709,6 @@ void m68000_device::addq_b_imm3_ds_dp() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -109674,6 +109716,7 @@ void m68000_device::addq_b_imm3_ds_dp() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109737,7 +109780,6 @@ void m68000_device::addq_b_imm3_ais_dp() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109768,6 +109810,7 @@ void m68000_device::addq_b_imm3_ais_dp() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109827,7 +109870,6 @@ void m68000_device::addq_b_imm3_aips_dp() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109858,6 +109900,7 @@ void m68000_device::addq_b_imm3_aips_dp() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109919,7 +109962,6 @@ void m68000_device::addq_b_imm3_pais_dp() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109950,6 +109992,7 @@ void m68000_device::addq_b_imm3_pais_dp() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110030,7 +110073,6 @@ void m68000_device::addq_b_imm3_das_dp() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110061,6 +110103,7 @@ void m68000_device::addq_b_imm3_das_dp() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110182,7 +110225,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110213,6 +110255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110292,7 +110335,6 @@ void m68000_device::addq_b_imm3_adr16_dp() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110323,6 +110365,7 @@ void m68000_device::addq_b_imm3_adr16_dp() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110426,7 +110469,6 @@ void m68000_device::addq_b_imm3_adr32_dp() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110457,6 +110499,7 @@ void m68000_device::addq_b_imm3_adr32_dp() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110489,7 +110532,6 @@ void m68000_device::addq_w_imm3_ds_dp() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -110497,6 +110539,7 @@ void m68000_device::addq_w_imm3_ds_dp() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110537,7 +110580,6 @@ void m68000_device::addq_w_imm3_as_dp() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -110571,6 +110613,7 @@ void m68000_device::addq_w_imm3_as_dp() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -110618,7 +110661,6 @@ void m68000_device::addq_w_imm3_ais_dp() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110649,6 +110691,7 @@ void m68000_device::addq_w_imm3_ais_dp() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110718,7 +110761,6 @@ void m68000_device::addq_w_imm3_aips_dp() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110749,6 +110791,7 @@ void m68000_device::addq_w_imm3_aips_dp() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110820,7 +110863,6 @@ void m68000_device::addq_w_imm3_pais_dp() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110851,6 +110893,7 @@ void m68000_device::addq_w_imm3_pais_dp() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110941,7 +110984,6 @@ void m68000_device::addq_w_imm3_das_dp() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110972,6 +111014,7 @@ void m68000_device::addq_w_imm3_das_dp() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111103,7 +111146,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111134,6 +111176,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111223,7 +111266,6 @@ void m68000_device::addq_w_imm3_adr16_dp() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111254,6 +111296,7 @@ void m68000_device::addq_w_imm3_adr16_dp() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111367,7 +111410,6 @@ void m68000_device::addq_w_imm3_adr32_dp() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111398,6 +111440,7 @@ void m68000_device::addq_w_imm3_adr32_dp() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111436,7 +111479,6 @@ void m68000_device::addq_l_imm3_ds_dp() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -111472,6 +111514,7 @@ void m68000_device::addq_l_imm3_ds_dp() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111492,7 +111535,6 @@ void m68000_device::addq_l_imm3_as_dp() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -111526,6 +111568,7 @@ void m68000_device::addq_l_imm3_as_dp() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111597,7 +111640,6 @@ void m68000_device::addq_l_imm3_ais_dp() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111654,6 +111696,7 @@ void m68000_device::addq_l_imm3_ais_dp() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111746,7 +111789,6 @@ void m68000_device::addq_l_imm3_aips_dp() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111803,6 +111845,7 @@ void m68000_device::addq_l_imm3_aips_dp() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111896,7 +111939,6 @@ void m68000_device::addq_l_imm3_pais_dp() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111953,6 +111995,7 @@ void m68000_device::addq_l_imm3_pais_dp() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112066,7 +112109,6 @@ void m68000_device::addq_l_imm3_das_dp() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112123,6 +112165,7 @@ void m68000_device::addq_l_imm3_das_dp() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112277,7 +112320,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112334,6 +112376,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112449,7 +112492,6 @@ void m68000_device::addq_l_imm3_adr16_dp() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112506,6 +112548,7 @@ void m68000_device::addq_l_imm3_adr16_dp() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112645,7 +112688,6 @@ void m68000_device::addq_l_imm3_adr32_dp() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112702,6 +112744,7 @@ void m68000_device::addq_l_imm3_adr32_dp() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112740,7 +112783,6 @@ void m68000_device::st_ds_dp() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112752,6 +112794,7 @@ void m68000_device::st_ds_dp() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112810,6 +112853,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112878,6 +112922,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112912,12 +112957,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112950,12 +112995,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112990,6 +113035,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -113052,7 +113098,6 @@ void m68000_device::st_ais_dp() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113120,6 +113165,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113182,7 +113228,6 @@ void m68000_device::st_aips_dp() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113250,6 +113295,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113314,7 +113360,6 @@ void m68000_device::st_pais_dp() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113382,6 +113427,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113465,7 +113511,6 @@ void m68000_device::st_das_dp() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113533,6 +113578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113659,7 +113705,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113727,6 +113772,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113809,7 +113855,6 @@ void m68000_device::st_adr16_dp() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113877,6 +113922,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113984,7 +114030,6 @@ void m68000_device::st_adr32_dp() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114052,6 +114097,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114085,7 +114131,6 @@ void m68000_device::subq_b_imm3_ds_dp() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114093,6 +114138,7 @@ void m68000_device::subq_b_imm3_ds_dp() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114156,7 +114202,6 @@ void m68000_device::subq_b_imm3_ais_dp() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114187,6 +114232,7 @@ void m68000_device::subq_b_imm3_ais_dp() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114246,7 +114292,6 @@ void m68000_device::subq_b_imm3_aips_dp() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114277,6 +114322,7 @@ void m68000_device::subq_b_imm3_aips_dp() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114338,7 +114384,6 @@ void m68000_device::subq_b_imm3_pais_dp() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114369,6 +114414,7 @@ void m68000_device::subq_b_imm3_pais_dp() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114449,7 +114495,6 @@ void m68000_device::subq_b_imm3_das_dp() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114480,6 +114525,7 @@ void m68000_device::subq_b_imm3_das_dp() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114601,7 +114647,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114632,6 +114677,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114711,7 +114757,6 @@ void m68000_device::subq_b_imm3_adr16_dp() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114742,6 +114787,7 @@ void m68000_device::subq_b_imm3_adr16_dp() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114845,7 +114891,6 @@ void m68000_device::subq_b_imm3_adr32_dp() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114876,6 +114921,7 @@ void m68000_device::subq_b_imm3_adr32_dp() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114908,7 +114954,6 @@ void m68000_device::subq_w_imm3_ds_dp() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114916,6 +114961,7 @@ void m68000_device::subq_w_imm3_ds_dp() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114956,7 +115002,6 @@ void m68000_device::subq_w_imm3_as_dp() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -114990,6 +115035,7 @@ void m68000_device::subq_w_imm3_as_dp() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115037,7 +115083,6 @@ void m68000_device::subq_w_imm3_ais_dp() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115068,6 +115113,7 @@ void m68000_device::subq_w_imm3_ais_dp() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115137,7 +115183,6 @@ void m68000_device::subq_w_imm3_aips_dp() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115168,6 +115213,7 @@ void m68000_device::subq_w_imm3_aips_dp() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115239,7 +115285,6 @@ void m68000_device::subq_w_imm3_pais_dp() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115270,6 +115315,7 @@ void m68000_device::subq_w_imm3_pais_dp() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115360,7 +115406,6 @@ void m68000_device::subq_w_imm3_das_dp() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115391,6 +115436,7 @@ void m68000_device::subq_w_imm3_das_dp() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115522,7 +115568,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115553,6 +115598,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115642,7 +115688,6 @@ void m68000_device::subq_w_imm3_adr16_dp() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115673,6 +115718,7 @@ void m68000_device::subq_w_imm3_adr16_dp() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115786,7 +115832,6 @@ void m68000_device::subq_w_imm3_adr32_dp() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115817,6 +115862,7 @@ void m68000_device::subq_w_imm3_adr32_dp() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -115855,7 +115901,6 @@ void m68000_device::subq_l_imm3_ds_dp() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -115891,6 +115936,7 @@ void m68000_device::subq_l_imm3_ds_dp() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115911,7 +115957,6 @@ void m68000_device::subq_l_imm3_as_dp() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -115945,6 +115990,7 @@ void m68000_device::subq_l_imm3_as_dp() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -116016,7 +116062,6 @@ void m68000_device::subq_l_imm3_ais_dp() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116073,6 +116118,7 @@ void m68000_device::subq_l_imm3_ais_dp() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116165,7 +116211,6 @@ void m68000_device::subq_l_imm3_aips_dp() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116222,6 +116267,7 @@ void m68000_device::subq_l_imm3_aips_dp() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116315,7 +116361,6 @@ void m68000_device::subq_l_imm3_pais_dp() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116372,6 +116417,7 @@ void m68000_device::subq_l_imm3_pais_dp() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116485,7 +116531,6 @@ void m68000_device::subq_l_imm3_das_dp() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116542,6 +116587,7 @@ void m68000_device::subq_l_imm3_das_dp() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116696,7 +116742,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116753,6 +116798,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116868,7 +116914,6 @@ void m68000_device::subq_l_imm3_adr16_dp() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116925,6 +116970,7 @@ void m68000_device::subq_l_imm3_adr16_dp() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -117064,7 +117110,6 @@ void m68000_device::subq_l_imm3_adr32_dp() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117121,6 +117166,7 @@ void m68000_device::subq_l_imm3_adr32_dp() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -117159,7 +117205,6 @@ void m68000_device::sf_ds_dp() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117171,6 +117216,7 @@ void m68000_device::sf_ds_dp() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117229,6 +117275,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117297,6 +117344,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117331,12 +117379,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117369,12 +117417,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117409,6 +117457,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117471,7 +117520,6 @@ void m68000_device::sf_ais_dp() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117539,6 +117587,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117601,7 +117650,6 @@ void m68000_device::sf_aips_dp() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117669,6 +117717,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117733,7 +117782,6 @@ void m68000_device::sf_pais_dp() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117801,6 +117849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117884,7 +117933,6 @@ void m68000_device::sf_das_dp() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117952,6 +118000,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118078,7 +118127,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118146,6 +118194,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118228,7 +118277,6 @@ void m68000_device::sf_adr16_dp() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118296,6 +118344,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118403,7 +118452,6 @@ void m68000_device::sf_adr32_dp() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118471,6 +118519,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -118504,7 +118553,6 @@ void m68000_device::shi_ds_dp() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118516,6 +118564,7 @@ void m68000_device::shi_ds_dp() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118574,6 +118623,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118642,6 +118692,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118676,12 +118727,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118714,12 +118765,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118754,6 +118805,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118816,7 +118868,6 @@ void m68000_device::shi_ais_dp() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118884,6 +118935,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -118946,7 +118998,6 @@ void m68000_device::shi_aips_dp() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119014,6 +119065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119078,7 +119130,6 @@ void m68000_device::shi_pais_dp() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119146,6 +119197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119229,7 +119281,6 @@ void m68000_device::shi_das_dp() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119297,6 +119348,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119423,7 +119475,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119491,6 +119542,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119573,7 +119625,6 @@ void m68000_device::shi_adr16_dp() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119641,6 +119692,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119748,7 +119800,6 @@ void m68000_device::shi_adr32_dp() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119816,6 +119867,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -119849,7 +119901,6 @@ void m68000_device::sls_ds_dp() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119861,6 +119912,7 @@ void m68000_device::sls_ds_dp() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -119919,6 +119971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119987,6 +120040,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -120021,12 +120075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -120059,12 +120113,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -120099,6 +120153,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -120161,7 +120216,6 @@ void m68000_device::sls_ais_dp() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120229,6 +120283,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120291,7 +120346,6 @@ void m68000_device::sls_aips_dp() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120359,6 +120413,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120423,7 +120478,6 @@ void m68000_device::sls_pais_dp() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120491,6 +120545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120574,7 +120629,6 @@ void m68000_device::sls_das_dp() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120642,6 +120696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120768,7 +120823,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120836,6 +120890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120918,7 +120973,6 @@ void m68000_device::sls_adr16_dp() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120986,6 +121040,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -121093,7 +121148,6 @@ void m68000_device::sls_adr32_dp() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121161,6 +121215,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -121194,7 +121249,6 @@ void m68000_device::scc_ds_dp() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121206,6 +121260,7 @@ void m68000_device::scc_ds_dp() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121264,6 +121319,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -121332,6 +121388,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -121366,12 +121423,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121404,12 +121461,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121444,6 +121501,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121506,7 +121564,6 @@ void m68000_device::scc_ais_dp() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121574,6 +121631,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121636,7 +121694,6 @@ void m68000_device::scc_aips_dp() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121704,6 +121761,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121768,7 +121826,6 @@ void m68000_device::scc_pais_dp() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121836,6 +121893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121919,7 +121977,6 @@ void m68000_device::scc_das_dp() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121987,6 +122044,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122113,7 +122171,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122181,6 +122238,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122263,7 +122321,6 @@ void m68000_device::scc_adr16_dp() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122331,6 +122388,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122438,7 +122496,6 @@ void m68000_device::scc_adr32_dp() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122506,6 +122563,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -122539,7 +122597,6 @@ void m68000_device::scs_ds_dp() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122551,6 +122608,7 @@ void m68000_device::scs_ds_dp() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122609,6 +122667,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -122677,6 +122736,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -122711,12 +122771,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122749,12 +122809,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122789,6 +122849,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122851,7 +122912,6 @@ void m68000_device::scs_ais_dp() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122919,6 +122979,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -122981,7 +123042,6 @@ void m68000_device::scs_aips_dp() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123049,6 +123109,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123113,7 +123174,6 @@ void m68000_device::scs_pais_dp() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123181,6 +123241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123264,7 +123325,6 @@ void m68000_device::scs_das_dp() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123332,6 +123392,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123458,7 +123519,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123526,6 +123586,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123608,7 +123669,6 @@ void m68000_device::scs_adr16_dp() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123676,6 +123736,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123783,7 +123844,6 @@ void m68000_device::scs_adr32_dp() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123851,6 +123911,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -123884,7 +123945,6 @@ void m68000_device::sne_ds_dp() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123896,6 +123956,7 @@ void m68000_device::sne_ds_dp() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -123954,6 +124015,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -124022,6 +124084,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -124056,12 +124119,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -124094,12 +124157,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -124134,6 +124197,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -124196,7 +124260,6 @@ void m68000_device::sne_ais_dp() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124264,6 +124327,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124326,7 +124390,6 @@ void m68000_device::sne_aips_dp() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124394,6 +124457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124458,7 +124522,6 @@ void m68000_device::sne_pais_dp() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124526,6 +124589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124609,7 +124673,6 @@ void m68000_device::sne_das_dp() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124677,6 +124740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124803,7 +124867,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124871,6 +124934,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124953,7 +125017,6 @@ void m68000_device::sne_adr16_dp() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125021,6 +125084,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -125128,7 +125192,6 @@ void m68000_device::sne_adr32_dp() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125196,6 +125259,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -125229,7 +125293,6 @@ void m68000_device::seq_ds_dp() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125241,6 +125304,7 @@ void m68000_device::seq_ds_dp() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125299,6 +125363,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -125367,6 +125432,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -125401,12 +125467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125439,12 +125505,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125479,6 +125545,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125541,7 +125608,6 @@ void m68000_device::seq_ais_dp() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125609,6 +125675,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125671,7 +125738,6 @@ void m68000_device::seq_aips_dp() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125739,6 +125805,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125803,7 +125870,6 @@ void m68000_device::seq_pais_dp() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125871,6 +125937,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125954,7 +126021,6 @@ void m68000_device::seq_das_dp() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126022,6 +126088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126148,7 +126215,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126216,6 +126282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126298,7 +126365,6 @@ void m68000_device::seq_adr16_dp() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126366,6 +126432,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126473,7 +126540,6 @@ void m68000_device::seq_adr32_dp() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126541,6 +126607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -126574,7 +126641,6 @@ void m68000_device::svc_ds_dp() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126586,6 +126652,7 @@ void m68000_device::svc_ds_dp() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126644,6 +126711,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -126712,6 +126780,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -126746,12 +126815,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126784,12 +126853,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126824,6 +126893,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126886,7 +126956,6 @@ void m68000_device::svc_ais_dp() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126954,6 +127023,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127016,7 +127086,6 @@ void m68000_device::svc_aips_dp() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127084,6 +127153,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127148,7 +127218,6 @@ void m68000_device::svc_pais_dp() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127216,6 +127285,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127299,7 +127369,6 @@ void m68000_device::svc_das_dp() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127367,6 +127436,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127493,7 +127563,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127561,6 +127630,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127643,7 +127713,6 @@ void m68000_device::svc_adr16_dp() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127711,6 +127780,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127818,7 +127888,6 @@ void m68000_device::svc_adr32_dp() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127886,6 +127955,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -127919,7 +127989,6 @@ void m68000_device::svs_ds_dp() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127931,6 +128000,7 @@ void m68000_device::svs_ds_dp() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -127989,6 +128059,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -128057,6 +128128,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -128091,12 +128163,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -128129,12 +128201,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -128169,6 +128241,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -128231,7 +128304,6 @@ void m68000_device::svs_ais_dp() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128299,6 +128371,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128361,7 +128434,6 @@ void m68000_device::svs_aips_dp() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128429,6 +128501,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128493,7 +128566,6 @@ void m68000_device::svs_pais_dp() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128561,6 +128633,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128644,7 +128717,6 @@ void m68000_device::svs_das_dp() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128712,6 +128784,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128838,7 +128911,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128906,6 +128978,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128988,7 +129061,6 @@ void m68000_device::svs_adr16_dp() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129056,6 +129128,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -129163,7 +129236,6 @@ void m68000_device::svs_adr32_dp() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129231,6 +129303,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -129264,7 +129337,6 @@ void m68000_device::spl_ds_dp() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129276,6 +129348,7 @@ void m68000_device::spl_ds_dp() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129334,6 +129407,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -129402,6 +129476,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -129436,12 +129511,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129474,12 +129549,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129514,6 +129589,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129576,7 +129652,6 @@ void m68000_device::spl_ais_dp() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129644,6 +129719,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129706,7 +129782,6 @@ void m68000_device::spl_aips_dp() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129774,6 +129849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129838,7 +129914,6 @@ void m68000_device::spl_pais_dp() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129906,6 +129981,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129989,7 +130065,6 @@ void m68000_device::spl_das_dp() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130057,6 +130132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130183,7 +130259,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130251,6 +130326,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130333,7 +130409,6 @@ void m68000_device::spl_adr16_dp() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130401,6 +130476,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130508,7 +130584,6 @@ void m68000_device::spl_adr32_dp() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130576,6 +130651,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -130609,7 +130685,6 @@ void m68000_device::smi_ds_dp() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130621,6 +130696,7 @@ void m68000_device::smi_ds_dp() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130679,6 +130755,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -130747,6 +130824,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -130781,12 +130859,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130819,12 +130897,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130859,6 +130937,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130921,7 +131000,6 @@ void m68000_device::smi_ais_dp() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130989,6 +131067,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131051,7 +131130,6 @@ void m68000_device::smi_aips_dp() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131119,6 +131197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131183,7 +131262,6 @@ void m68000_device::smi_pais_dp() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131251,6 +131329,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131334,7 +131413,6 @@ void m68000_device::smi_das_dp() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131402,6 +131480,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131528,7 +131607,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131596,6 +131674,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131678,7 +131757,6 @@ void m68000_device::smi_adr16_dp() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131746,6 +131824,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131853,7 +131932,6 @@ void m68000_device::smi_adr32_dp() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131921,6 +131999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -131954,7 +132033,6 @@ void m68000_device::sge_ds_dp() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131966,6 +132044,7 @@ void m68000_device::sge_ds_dp() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132024,6 +132103,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -132092,6 +132172,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -132126,12 +132207,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132164,12 +132245,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132204,6 +132285,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132266,7 +132348,6 @@ void m68000_device::sge_ais_dp() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132334,6 +132415,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132396,7 +132478,6 @@ void m68000_device::sge_aips_dp() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132464,6 +132545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132528,7 +132610,6 @@ void m68000_device::sge_pais_dp() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132596,6 +132677,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132679,7 +132761,6 @@ void m68000_device::sge_das_dp() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132747,6 +132828,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -132873,7 +132955,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132941,6 +133022,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133023,7 +133105,6 @@ void m68000_device::sge_adr16_dp() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133091,6 +133172,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133198,7 +133280,6 @@ void m68000_device::sge_adr32_dp() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133266,6 +133347,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -133299,7 +133381,6 @@ void m68000_device::slt_ds_dp() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133311,6 +133392,7 @@ void m68000_device::slt_ds_dp() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133369,6 +133451,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -133437,6 +133520,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -133471,12 +133555,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133509,12 +133593,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133549,6 +133633,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133611,7 +133696,6 @@ void m68000_device::slt_ais_dp() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133679,6 +133763,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133741,7 +133826,6 @@ void m68000_device::slt_aips_dp() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133809,6 +133893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133873,7 +133958,6 @@ void m68000_device::slt_pais_dp() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133941,6 +134025,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -134024,7 +134109,6 @@ void m68000_device::slt_das_dp() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134092,6 +134176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134218,7 +134303,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134286,6 +134370,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134368,7 +134453,6 @@ void m68000_device::slt_adr16_dp() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134436,6 +134520,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134543,7 +134628,6 @@ void m68000_device::slt_adr32_dp() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134611,6 +134695,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -134644,7 +134729,6 @@ void m68000_device::sgt_ds_dp() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134656,6 +134740,7 @@ void m68000_device::sgt_ds_dp() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134714,6 +134799,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -134782,6 +134868,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -134816,12 +134903,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134854,12 +134941,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134894,6 +134981,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134956,7 +135044,6 @@ void m68000_device::sgt_ais_dp() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135024,6 +135111,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135086,7 +135174,6 @@ void m68000_device::sgt_aips_dp() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135154,6 +135241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135218,7 +135306,6 @@ void m68000_device::sgt_pais_dp() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135286,6 +135373,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135369,7 +135457,6 @@ void m68000_device::sgt_das_dp() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135437,6 +135524,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135563,7 +135651,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135631,6 +135718,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135713,7 +135801,6 @@ void m68000_device::sgt_adr16_dp() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135781,6 +135868,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135888,7 +135976,6 @@ void m68000_device::sgt_adr32_dp() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135956,6 +136043,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -135989,7 +136077,6 @@ void m68000_device::sle_ds_dp() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136001,6 +136088,7 @@ void m68000_device::sle_ds_dp() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136059,6 +136147,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -136127,6 +136216,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -136161,12 +136251,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136199,12 +136289,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136239,6 +136329,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136301,7 +136392,6 @@ void m68000_device::sle_ais_dp() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136369,6 +136459,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136431,7 +136522,6 @@ void m68000_device::sle_aips_dp() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136499,6 +136589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136563,7 +136654,6 @@ void m68000_device::sle_pais_dp() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136631,6 +136721,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136714,7 +136805,6 @@ void m68000_device::sle_das_dp() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136782,6 +136872,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -136908,7 +136999,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136976,6 +137066,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137058,7 +137149,6 @@ void m68000_device::sle_adr16_dp() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137126,6 +137216,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137233,7 +137324,6 @@ void m68000_device::sle_adr32_dp() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137301,6 +137391,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -137341,6 +137432,7 @@ void m68000_device::bra_rel16_dp() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137404,11 +137496,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137454,6 +137546,7 @@ void m68000_device::bra_rel8_dp() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137490,11 +137583,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137612,11 +137705,11 @@ void m68000_device::bsr_rel16_dp() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137734,11 +137827,11 @@ void m68000_device::bsr_rel8_dp() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137784,6 +137877,7 @@ void m68000_device::bhi_rel16_dp() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137847,11 +137941,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137897,6 +137991,7 @@ void m68000_device::bhi_rel8_dp() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137933,11 +138028,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137983,6 +138078,7 @@ void m68000_device::bls_rel16_dp() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138046,11 +138142,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138096,6 +138192,7 @@ void m68000_device::bls_rel8_dp() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138132,11 +138229,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138182,6 +138279,7 @@ void m68000_device::bcc_rel16_dp() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138245,11 +138343,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138295,6 +138393,7 @@ void m68000_device::bcc_rel8_dp() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138331,11 +138430,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138381,6 +138480,7 @@ void m68000_device::bcs_rel16_dp() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138444,11 +138544,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138494,6 +138594,7 @@ void m68000_device::bcs_rel8_dp() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138530,11 +138631,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138580,6 +138681,7 @@ void m68000_device::bne_rel16_dp() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138643,11 +138745,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138693,6 +138795,7 @@ void m68000_device::bne_rel8_dp() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138729,11 +138832,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138779,6 +138882,7 @@ void m68000_device::beq_rel16_dp() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138842,11 +138946,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138892,6 +138996,7 @@ void m68000_device::beq_rel8_dp() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138928,11 +139033,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138978,6 +139083,7 @@ void m68000_device::bvc_rel16_dp() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139041,11 +139147,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139091,6 +139197,7 @@ void m68000_device::bvc_rel8_dp() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139127,11 +139234,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139177,6 +139284,7 @@ void m68000_device::bvs_rel16_dp() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139240,11 +139348,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139290,6 +139398,7 @@ void m68000_device::bvs_rel8_dp() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139326,11 +139435,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139376,6 +139485,7 @@ void m68000_device::bpl_rel16_dp() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139439,11 +139549,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139489,6 +139599,7 @@ void m68000_device::bpl_rel8_dp() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139525,11 +139636,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139575,6 +139686,7 @@ void m68000_device::bmi_rel16_dp() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139638,11 +139750,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139688,6 +139800,7 @@ void m68000_device::bmi_rel8_dp() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139724,11 +139837,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139774,6 +139887,7 @@ void m68000_device::bge_rel16_dp() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139837,11 +139951,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139887,6 +140001,7 @@ void m68000_device::bge_rel8_dp() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139923,11 +140038,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139973,6 +140088,7 @@ void m68000_device::blt_rel16_dp() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140036,11 +140152,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140086,6 +140202,7 @@ void m68000_device::blt_rel8_dp() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140122,11 +140239,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140172,6 +140289,7 @@ void m68000_device::bgt_rel16_dp() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140235,11 +140353,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140285,6 +140403,7 @@ void m68000_device::bgt_rel8_dp() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140321,11 +140440,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140371,6 +140490,7 @@ void m68000_device::ble_rel16_dp() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140434,11 +140554,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140484,6 +140604,7 @@ void m68000_device::ble_rel8_dp() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140520,11 +140641,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140563,7 +140684,6 @@ void m68000_device::moveq_imm8o_dd_dp() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -140572,6 +140692,7 @@ void m68000_device::moveq_imm8o_dd_dp() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140611,7 +140732,6 @@ void m68000_device::or_b_ds_dd_dp() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140619,6 +140739,7 @@ void m68000_device::or_b_ds_dd_dp() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140685,7 +140806,6 @@ void m68000_device::or_b_ais_dd_dp() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140693,6 +140813,7 @@ void m68000_device::or_b_ais_dd_dp() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140764,7 +140885,6 @@ void m68000_device::or_b_aips_dd_dp() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140772,6 +140892,7 @@ void m68000_device::or_b_aips_dd_dp() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140845,7 +140966,6 @@ void m68000_device::or_b_pais_dd_dp() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140853,6 +140973,7 @@ void m68000_device::or_b_pais_dd_dp() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140945,7 +141066,6 @@ void m68000_device::or_b_das_dd_dp() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140953,6 +141073,7 @@ void m68000_device::or_b_das_dd_dp() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141088,7 +141209,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141096,6 +141216,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141187,7 +141308,6 @@ void m68000_device::or_b_adr16_dd_dp() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141195,6 +141315,7 @@ void m68000_device::or_b_adr16_dd_dp() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141311,7 +141432,6 @@ void m68000_device::or_b_adr32_dd_dp() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141319,6 +141439,7 @@ void m68000_device::or_b_adr32_dd_dp() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141410,7 +141531,6 @@ void m68000_device::or_b_dpc_dd_dp() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141418,6 +141538,7 @@ void m68000_device::or_b_dpc_dd_dp() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141552,7 +141673,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141560,6 +141680,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141629,7 +141750,6 @@ void m68000_device::or_b_imm8_dd_dp() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141637,6 +141757,7 @@ void m68000_device::or_b_imm8_dd_dp() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141679,7 +141800,6 @@ void m68000_device::or_w_ds_dd_dp() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141687,6 +141807,7 @@ void m68000_device::or_w_ds_dd_dp() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141757,7 +141878,6 @@ void m68000_device::or_w_ais_dd_dp() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141765,6 +141885,7 @@ void m68000_device::or_w_ais_dd_dp() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141840,7 +141961,6 @@ void m68000_device::or_w_aips_dd_dp() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141848,6 +141968,7 @@ void m68000_device::or_w_aips_dd_dp() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141925,7 +142046,6 @@ void m68000_device::or_w_pais_dd_dp() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141933,6 +142053,7 @@ void m68000_device::or_w_pais_dd_dp() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142029,7 +142150,6 @@ void m68000_device::or_w_das_dd_dp() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142037,6 +142157,7 @@ void m68000_device::or_w_das_dd_dp() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142176,7 +142297,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142184,6 +142304,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142279,7 +142400,6 @@ void m68000_device::or_w_adr16_dd_dp() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142287,6 +142407,7 @@ void m68000_device::or_w_adr16_dd_dp() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142407,7 +142528,6 @@ void m68000_device::or_w_adr32_dd_dp() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142415,6 +142535,7 @@ void m68000_device::or_w_adr32_dd_dp() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142510,7 +142631,6 @@ void m68000_device::or_w_dpc_dd_dp() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142518,6 +142638,7 @@ void m68000_device::or_w_dpc_dd_dp() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142656,7 +142777,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142664,6 +142784,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142733,7 +142854,6 @@ void m68000_device::or_w_imm16_dd_dp() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142741,6 +142861,7 @@ void m68000_device::or_w_imm16_dd_dp() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142783,7 +142904,6 @@ void m68000_device::or_l_ds_dd_dp() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142820,6 +142940,7 @@ void m68000_device::or_l_ds_dd_dp() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -142894,7 +143015,6 @@ void m68000_device::or_l_ais_dd_dp() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142928,6 +143048,7 @@ void m68000_device::or_l_ais_dd_dp() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143006,7 +143127,6 @@ void m68000_device::or_l_aips_dd_dp() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143040,6 +143160,7 @@ void m68000_device::or_l_aips_dd_dp() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143119,7 +143240,6 @@ void m68000_device::or_l_pais_dd_dp() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143153,6 +143273,7 @@ void m68000_device::or_l_pais_dd_dp() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143252,7 +143373,6 @@ void m68000_device::or_l_das_dd_dp() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143286,6 +143406,7 @@ void m68000_device::or_l_das_dd_dp() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143428,7 +143549,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143462,6 +143582,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143564,7 +143685,6 @@ void m68000_device::or_l_adr16_dd_dp() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143598,6 +143718,7 @@ void m68000_device::or_l_adr16_dd_dp() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143725,7 +143846,6 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143759,6 +143879,7 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143857,7 +143978,6 @@ void m68000_device::or_l_dpc_dd_dp() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143891,6 +144011,7 @@ void m68000_device::or_l_dpc_dd_dp() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144032,7 +144153,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -144066,6 +144186,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144140,7 +144261,6 @@ void m68000_device::or_l_imm32_dd_dp() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -144177,6 +144297,7 @@ void m68000_device::or_l_imm32_dd_dp() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144396,11 +144517,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144432,10 +144553,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144549,7 +144670,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144559,7 +144679,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -144569,6 +144688,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144836,11 +144956,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144872,10 +144992,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144989,7 +145109,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144999,7 +145118,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145009,6 +145127,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145280,11 +145399,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145316,10 +145435,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145433,7 +145552,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145443,7 +145561,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145453,6 +145570,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145726,11 +145844,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145762,10 +145880,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145879,7 +145997,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145889,7 +146006,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145899,6 +146015,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146191,11 +146308,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146227,10 +146344,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146344,7 +146461,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146354,7 +146470,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146364,6 +146479,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146697,11 +146813,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146733,10 +146849,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146850,7 +146966,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146860,7 +146975,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146870,6 +146984,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147161,11 +147276,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147197,10 +147312,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147314,7 +147429,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147324,7 +147438,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147334,6 +147447,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147649,11 +147763,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147685,10 +147799,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147802,7 +147916,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147812,7 +147925,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147822,6 +147934,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148113,11 +148226,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148149,10 +148262,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148266,7 +148379,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148276,7 +148388,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148286,6 +148397,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148618,11 +148730,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148654,10 +148766,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148771,7 +148883,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148781,7 +148892,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148791,6 +148901,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149057,11 +149168,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149093,10 +149204,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149210,7 +149321,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -149220,7 +149330,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -149230,6 +149339,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149273,7 +149383,6 @@ void m68000_device::sbcd_ds_dd_dp() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149305,6 +149414,7 @@ void m68000_device::sbcd_ds_dd_dp() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -149355,7 +149465,6 @@ void m68000_device::sbcd_pais_paid_dp() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -149407,6 +149516,7 @@ void m68000_device::sbcd_pais_paid_dp() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149464,7 +149574,6 @@ void m68000_device::or_b_dd_ais_dp() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149494,6 +149603,7 @@ void m68000_device::or_b_dd_ais_dp() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149557,7 +149667,6 @@ void m68000_device::or_b_dd_aips_dp() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149587,6 +149696,7 @@ void m68000_device::or_b_dd_aips_dp() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149652,7 +149762,6 @@ void m68000_device::or_b_dd_pais_dp() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149682,6 +149791,7 @@ void m68000_device::or_b_dd_pais_dp() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149766,7 +149876,6 @@ void m68000_device::or_b_dd_das_dp() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149796,6 +149905,7 @@ void m68000_device::or_b_dd_das_dp() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149923,7 +150033,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149953,6 +150062,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150036,7 +150146,6 @@ void m68000_device::or_b_dd_adr16_dp() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150066,6 +150175,7 @@ void m68000_device::or_b_dd_adr16_dp() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150174,7 +150284,6 @@ void m68000_device::or_b_dd_adr32_dp() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150204,6 +150313,7 @@ void m68000_device::or_b_dd_adr32_dp() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -150266,7 +150376,6 @@ void m68000_device::or_w_dd_ais_dp() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150296,6 +150405,7 @@ void m68000_device::or_w_dd_ais_dp() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150369,7 +150479,6 @@ void m68000_device::or_w_dd_aips_dp() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150399,6 +150508,7 @@ void m68000_device::or_w_dd_aips_dp() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150474,7 +150584,6 @@ void m68000_device::or_w_dd_pais_dp() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150504,6 +150613,7 @@ void m68000_device::or_w_dd_pais_dp() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150598,7 +150708,6 @@ void m68000_device::or_w_dd_das_dp() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150628,6 +150737,7 @@ void m68000_device::or_w_dd_das_dp() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150765,7 +150875,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150795,6 +150904,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150888,7 +150998,6 @@ void m68000_device::or_w_dd_adr16_dp() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150918,6 +151027,7 @@ void m68000_device::or_w_dd_adr16_dp() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -151036,7 +151146,6 @@ void m68000_device::or_w_dd_adr32_dp() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151066,6 +151175,7 @@ void m68000_device::or_w_dd_adr32_dp() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151158,7 +151268,6 @@ void m68000_device::or_l_dd_ais_dp() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151214,6 +151323,7 @@ void m68000_device::or_l_dd_ais_dp() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151310,7 +151420,6 @@ void m68000_device::or_l_dd_aips_dp() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151366,6 +151475,7 @@ void m68000_device::or_l_dd_aips_dp() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151463,7 +151573,6 @@ void m68000_device::or_l_dd_pais_dp() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151519,6 +151628,7 @@ void m68000_device::or_l_dd_pais_dp() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151636,7 +151746,6 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151692,6 +151801,7 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -151852,7 +151962,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151908,6 +152017,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152028,7 +152138,6 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152084,6 +152193,7 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152229,7 +152339,6 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152285,6 +152394,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -152530,11 +152640,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152607,7 +152717,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -152620,6 +152729,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152751,7 +152861,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -152782,7 +152891,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -152814,6 +152922,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152847,14 +152956,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153105,11 +153212,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153182,7 +153289,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153195,6 +153301,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153326,7 +153433,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153357,7 +153463,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153389,6 +153494,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153422,14 +153528,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153684,11 +153788,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153761,7 +153865,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153774,6 +153877,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153905,7 +154009,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153936,7 +154039,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153968,6 +154070,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154001,14 +154104,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154265,11 +154366,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154342,7 +154443,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154355,6 +154455,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154486,7 +154587,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -154517,7 +154617,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -154549,6 +154648,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154582,14 +154682,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154865,11 +154963,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154942,7 +155040,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154955,6 +155052,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155086,7 +155184,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155117,7 +155214,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155149,6 +155245,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155182,14 +155279,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -155506,11 +155601,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155583,7 +155678,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -155596,6 +155690,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155727,7 +155822,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155758,7 +155852,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155790,6 +155883,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155823,14 +155917,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156105,11 +156197,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156182,7 +156274,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156195,6 +156286,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156326,7 +156418,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156357,7 +156448,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -156389,6 +156479,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156422,14 +156513,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156728,11 +156817,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156805,7 +156894,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156818,6 +156906,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156949,7 +157038,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156980,7 +157068,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157012,6 +157099,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157045,14 +157133,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157327,11 +157413,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157404,7 +157490,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -157417,6 +157502,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157548,7 +157634,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -157579,7 +157664,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157611,6 +157695,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157644,14 +157729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157967,11 +158050,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158044,7 +158127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158057,6 +158139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158188,7 +158271,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158219,7 +158301,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158251,6 +158332,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158284,14 +158366,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158541,11 +158621,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158618,7 +158698,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158631,6 +158710,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158762,7 +158842,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158793,7 +158872,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158825,6 +158903,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158858,14 +158937,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158884,7 +158961,6 @@ void m68000_device::sub_b_ds_dd_dp() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158892,6 +158968,7 @@ void m68000_device::sub_b_ds_dd_dp() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158956,7 +159033,6 @@ void m68000_device::sub_b_ais_dd_dp() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158964,6 +159040,7 @@ void m68000_device::sub_b_ais_dd_dp() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159032,7 +159109,6 @@ void m68000_device::sub_b_aips_dd_dp() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159040,6 +159116,7 @@ void m68000_device::sub_b_aips_dd_dp() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159110,7 +159187,6 @@ void m68000_device::sub_b_pais_dd_dp() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159118,6 +159194,7 @@ void m68000_device::sub_b_pais_dd_dp() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159207,7 +159284,6 @@ void m68000_device::sub_b_das_dd_dp() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159215,6 +159291,7 @@ void m68000_device::sub_b_das_dd_dp() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159345,7 +159422,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159353,6 +159429,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159441,7 +159518,6 @@ void m68000_device::sub_b_adr16_dd_dp() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159449,6 +159525,7 @@ void m68000_device::sub_b_adr16_dd_dp() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159561,7 +159638,6 @@ void m68000_device::sub_b_adr32_dd_dp() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159569,6 +159645,7 @@ void m68000_device::sub_b_adr32_dd_dp() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159657,7 +159734,6 @@ void m68000_device::sub_b_dpc_dd_dp() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159665,6 +159741,7 @@ void m68000_device::sub_b_dpc_dd_dp() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159794,7 +159871,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159802,6 +159878,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159869,7 +159946,6 @@ void m68000_device::sub_b_imm8_dd_dp() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -159877,6 +159953,7 @@ void m68000_device::sub_b_imm8_dd_dp() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159918,7 +159995,6 @@ void m68000_device::sub_w_ds_dd_dp() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159926,6 +160002,7 @@ void m68000_device::sub_w_ds_dd_dp() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159967,7 +160044,6 @@ void m68000_device::sub_w_as_dd_dp() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -159975,6 +160051,7 @@ void m68000_device::sub_w_as_dd_dp() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160043,7 +160120,6 @@ void m68000_device::sub_w_ais_dd_dp() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160051,6 +160127,7 @@ void m68000_device::sub_w_ais_dd_dp() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160123,7 +160200,6 @@ void m68000_device::sub_w_aips_dd_dp() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160131,6 +160207,7 @@ void m68000_device::sub_w_aips_dd_dp() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160205,7 +160282,6 @@ void m68000_device::sub_w_pais_dd_dp() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160213,6 +160289,7 @@ void m68000_device::sub_w_pais_dd_dp() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160306,7 +160383,6 @@ void m68000_device::sub_w_das_dd_dp() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160314,6 +160390,7 @@ void m68000_device::sub_w_das_dd_dp() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160448,7 +160525,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160456,6 +160532,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160548,7 +160625,6 @@ void m68000_device::sub_w_adr16_dd_dp() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160556,6 +160632,7 @@ void m68000_device::sub_w_adr16_dd_dp() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160672,7 +160749,6 @@ void m68000_device::sub_w_adr32_dd_dp() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160680,6 +160756,7 @@ void m68000_device::sub_w_adr32_dd_dp() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160772,7 +160849,6 @@ void m68000_device::sub_w_dpc_dd_dp() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160780,6 +160856,7 @@ void m68000_device::sub_w_dpc_dd_dp() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160913,7 +160990,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160921,6 +160997,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160988,7 +161065,6 @@ void m68000_device::sub_w_imm16_dd_dp() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160996,6 +161072,7 @@ void m68000_device::sub_w_imm16_dd_dp() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -161037,7 +161114,6 @@ void m68000_device::sub_l_ds_dd_dp() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161073,6 +161149,7 @@ void m68000_device::sub_l_ds_dd_dp() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161094,7 +161171,6 @@ void m68000_device::sub_l_as_dd_dp() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -161130,6 +161206,7 @@ void m68000_device::sub_l_as_dd_dp() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161202,7 +161279,6 @@ void m68000_device::sub_l_ais_dd_dp() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161236,6 +161312,7 @@ void m68000_device::sub_l_ais_dd_dp() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161311,7 +161388,6 @@ void m68000_device::sub_l_aips_dd_dp() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161345,6 +161421,7 @@ void m68000_device::sub_l_aips_dd_dp() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161421,7 +161498,6 @@ void m68000_device::sub_l_pais_dd_dp() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161455,6 +161531,7 @@ void m68000_device::sub_l_pais_dd_dp() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161551,7 +161628,6 @@ void m68000_device::sub_l_das_dd_dp() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161585,6 +161661,7 @@ void m68000_device::sub_l_das_dd_dp() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161722,7 +161799,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161756,6 +161832,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161854,7 +161931,6 @@ void m68000_device::sub_l_adr16_dd_dp() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161888,6 +161964,7 @@ void m68000_device::sub_l_adr16_dd_dp() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162010,7 +162087,6 @@ void m68000_device::sub_l_adr32_dd_dp() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162044,6 +162120,7 @@ void m68000_device::sub_l_adr32_dd_dp() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162139,7 +162216,6 @@ void m68000_device::sub_l_dpc_dd_dp() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162173,6 +162249,7 @@ void m68000_device::sub_l_dpc_dd_dp() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162309,7 +162386,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162343,6 +162419,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162414,7 +162491,6 @@ void m68000_device::sub_l_imm32_dd_dp() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -162450,6 +162526,7 @@ void m68000_device::sub_l_imm32_dd_dp() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162471,7 +162548,6 @@ void m68000_device::suba_w_ds_ad_dp() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -162505,6 +162581,7 @@ void m68000_device::suba_w_ds_ad_dp() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162526,7 +162603,6 @@ void m68000_device::suba_w_as_ad_dp() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -162560,6 +162636,7 @@ void m68000_device::suba_w_as_ad_dp() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162608,7 +162685,6 @@ void m68000_device::suba_w_ais_ad_dp() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162642,6 +162718,7 @@ void m68000_device::suba_w_ais_ad_dp() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162694,7 +162771,6 @@ void m68000_device::suba_w_aips_ad_dp() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162728,6 +162804,7 @@ void m68000_device::suba_w_aips_ad_dp() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162782,7 +162859,6 @@ void m68000_device::suba_w_pais_ad_dp() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162816,6 +162892,7 @@ void m68000_device::suba_w_pais_ad_dp() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162889,7 +162966,6 @@ void m68000_device::suba_w_das_ad_dp() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162923,6 +162999,7 @@ void m68000_device::suba_w_das_ad_dp() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163037,7 +163114,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163071,6 +163147,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163143,7 +163220,6 @@ void m68000_device::suba_w_adr16_ad_dp() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163177,6 +163253,7 @@ void m68000_device::suba_w_adr16_ad_dp() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163273,7 +163350,6 @@ void m68000_device::suba_w_adr32_ad_dp() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163307,6 +163383,7 @@ void m68000_device::suba_w_adr32_ad_dp() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163379,7 +163456,6 @@ void m68000_device::suba_w_dpc_ad_dp() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163413,6 +163489,7 @@ void m68000_device::suba_w_dpc_ad_dp() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163526,7 +163603,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163560,6 +163636,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163607,7 +163684,6 @@ void m68000_device::suba_w_imm16_ad_dp() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -163641,6 +163717,7 @@ void m68000_device::suba_w_imm16_ad_dp() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163662,7 +163739,6 @@ void m68000_device::subx_b_ds_dd_dp() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -163670,6 +163746,7 @@ void m68000_device::subx_b_ds_dd_dp() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -163740,7 +163817,6 @@ void m68000_device::subx_b_pais_paid_dp() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -163790,6 +163866,7 @@ void m68000_device::subx_b_pais_paid_dp() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -163846,7 +163923,6 @@ void m68000_device::sub_b_dd_ais_dp() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -163876,6 +163952,7 @@ void m68000_device::sub_b_dd_ais_dp() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -163936,7 +164013,6 @@ void m68000_device::sub_b_dd_aips_dp() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -163966,6 +164042,7 @@ void m68000_device::sub_b_dd_aips_dp() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164028,7 +164105,6 @@ void m68000_device::sub_b_dd_pais_dp() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164058,6 +164134,7 @@ void m68000_device::sub_b_dd_pais_dp() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164139,7 +164216,6 @@ void m68000_device::sub_b_dd_das_dp() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164169,6 +164245,7 @@ void m68000_device::sub_b_dd_das_dp() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164291,7 +164368,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164321,6 +164397,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164401,7 +164478,6 @@ void m68000_device::sub_b_dd_adr16_dp() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164431,6 +164507,7 @@ void m68000_device::sub_b_dd_adr16_dp() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164535,7 +164612,6 @@ void m68000_device::sub_b_dd_adr32_dp() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164565,6 +164641,7 @@ void m68000_device::sub_b_dd_adr32_dp() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -164598,7 +164675,6 @@ void m68000_device::subx_w_ds_dd_dp() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -164606,6 +164682,7 @@ void m68000_device::subx_w_ds_dd_dp() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164680,7 +164757,6 @@ void m68000_device::subx_w_pais_paid_dp() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -164734,6 +164810,7 @@ void m68000_device::subx_w_pais_paid_dp() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164800,7 +164877,6 @@ void m68000_device::sub_w_dd_ais_dp() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164830,6 +164906,7 @@ void m68000_device::sub_w_dd_ais_dp() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164900,7 +164977,6 @@ void m68000_device::sub_w_dd_aips_dp() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164930,6 +165006,7 @@ void m68000_device::sub_w_dd_aips_dp() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165002,7 +165079,6 @@ void m68000_device::sub_w_dd_pais_dp() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165032,6 +165108,7 @@ void m68000_device::sub_w_dd_pais_dp() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165123,7 +165200,6 @@ void m68000_device::sub_w_dd_das_dp() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165153,6 +165229,7 @@ void m68000_device::sub_w_dd_das_dp() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165285,7 +165362,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165315,6 +165391,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165405,7 +165482,6 @@ void m68000_device::sub_w_dd_adr16_dp() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165435,6 +165511,7 @@ void m68000_device::sub_w_dd_adr16_dp() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165549,7 +165626,6 @@ void m68000_device::sub_w_dd_adr32_dp() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165579,6 +165655,7 @@ void m68000_device::sub_w_dd_adr32_dp() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165618,7 +165695,6 @@ void m68000_device::subx_l_ds_dd_dp() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165654,6 +165730,7 @@ void m68000_device::subx_l_ds_dd_dp() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -165784,7 +165861,6 @@ void m68000_device::subx_l_pais_paid_dp() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165836,6 +165912,7 @@ void m68000_device::subx_l_pais_paid_dp() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -165926,7 +166003,6 @@ void m68000_device::sub_l_dd_ais_dp() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165982,6 +166058,7 @@ void m68000_device::sub_l_dd_ais_dp() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166075,7 +166152,6 @@ void m68000_device::sub_l_dd_aips_dp() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166131,6 +166207,7 @@ void m68000_device::sub_l_dd_aips_dp() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166225,7 +166302,6 @@ void m68000_device::sub_l_dd_pais_dp() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166281,6 +166357,7 @@ void m68000_device::sub_l_dd_pais_dp() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166395,7 +166472,6 @@ void m68000_device::sub_l_dd_das_dp() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166451,6 +166527,7 @@ void m68000_device::sub_l_dd_das_dp() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166606,7 +166683,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166662,6 +166738,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166778,7 +166855,6 @@ void m68000_device::sub_l_dd_adr16_dp() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166834,6 +166910,7 @@ void m68000_device::sub_l_dd_adr16_dp() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166974,7 +167051,6 @@ void m68000_device::sub_l_dd_adr32_dp() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -167030,6 +167106,7 @@ void m68000_device::sub_l_dd_adr32_dp() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -167069,7 +167146,6 @@ void m68000_device::suba_l_ds_ad_dp() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -167103,6 +167179,7 @@ void m68000_device::suba_l_ds_ad_dp() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167124,7 +167201,6 @@ void m68000_device::suba_l_as_ad_dp() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -167158,6 +167234,7 @@ void m68000_device::suba_l_as_ad_dp() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167230,7 +167307,6 @@ void m68000_device::suba_l_ais_ad_dp() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167262,6 +167338,7 @@ void m68000_device::suba_l_ais_ad_dp() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167337,7 +167414,6 @@ void m68000_device::suba_l_aips_ad_dp() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167369,6 +167445,7 @@ void m68000_device::suba_l_aips_ad_dp() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167445,7 +167522,6 @@ void m68000_device::suba_l_pais_ad_dp() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167477,6 +167553,7 @@ void m68000_device::suba_l_pais_ad_dp() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167573,7 +167650,6 @@ void m68000_device::suba_l_das_ad_dp() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167605,6 +167681,7 @@ void m68000_device::suba_l_das_ad_dp() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167742,7 +167819,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167774,6 +167850,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167872,7 +167949,6 @@ void m68000_device::suba_l_adr16_ad_dp() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167904,6 +167980,7 @@ void m68000_device::suba_l_adr16_ad_dp() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168026,7 +168103,6 @@ void m68000_device::suba_l_adr32_ad_dp() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168058,6 +168134,7 @@ void m68000_device::suba_l_adr32_ad_dp() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168153,7 +168230,6 @@ void m68000_device::suba_l_dpc_ad_dp() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168185,6 +168261,7 @@ void m68000_device::suba_l_dpc_ad_dp() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168321,7 +168398,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168353,6 +168429,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168424,7 +168501,6 @@ void m68000_device::suba_l_imm32_ad_dp() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -168458,6 +168534,7 @@ void m68000_device::suba_l_imm32_ad_dp() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168479,7 +168556,6 @@ void m68000_device::cmp_b_ds_dd_dp() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -168487,6 +168563,7 @@ void m68000_device::cmp_b_ds_dd_dp() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168550,7 +168627,6 @@ void m68000_device::cmp_b_ais_dd_dp() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168558,6 +168634,7 @@ void m68000_device::cmp_b_ais_dd_dp() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168625,7 +168702,6 @@ void m68000_device::cmp_b_aips_dd_dp() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168633,6 +168709,7 @@ void m68000_device::cmp_b_aips_dd_dp() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168702,7 +168779,6 @@ void m68000_device::cmp_b_pais_dd_dp() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168710,6 +168786,7 @@ void m68000_device::cmp_b_pais_dd_dp() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168798,7 +168875,6 @@ void m68000_device::cmp_b_das_dd_dp() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168806,6 +168882,7 @@ void m68000_device::cmp_b_das_dd_dp() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168935,7 +169012,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168943,6 +169019,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169030,7 +169107,6 @@ void m68000_device::cmp_b_adr16_dd_dp() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169038,6 +169114,7 @@ void m68000_device::cmp_b_adr16_dd_dp() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169149,7 +169226,6 @@ void m68000_device::cmp_b_adr32_dd_dp() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169157,6 +169233,7 @@ void m68000_device::cmp_b_adr32_dd_dp() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169244,7 +169321,6 @@ void m68000_device::cmp_b_dpc_dd_dp() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169252,6 +169328,7 @@ void m68000_device::cmp_b_dpc_dd_dp() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169380,7 +169457,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169388,6 +169464,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169454,7 +169531,6 @@ void m68000_device::cmp_b_imm8_dd_dp() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -169462,6 +169538,7 @@ void m68000_device::cmp_b_imm8_dd_dp() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169502,7 +169579,6 @@ void m68000_device::cmp_w_ds_dd_dp() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -169510,6 +169586,7 @@ void m68000_device::cmp_w_ds_dd_dp() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169550,7 +169627,6 @@ void m68000_device::cmp_w_as_dd_dp() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -169558,6 +169634,7 @@ void m68000_device::cmp_w_as_dd_dp() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169625,7 +169702,6 @@ void m68000_device::cmp_w_ais_dd_dp() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169633,6 +169709,7 @@ void m68000_device::cmp_w_ais_dd_dp() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169704,7 +169781,6 @@ void m68000_device::cmp_w_aips_dd_dp() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169712,6 +169788,7 @@ void m68000_device::cmp_w_aips_dd_dp() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169785,7 +169862,6 @@ void m68000_device::cmp_w_pais_dd_dp() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169793,6 +169869,7 @@ void m68000_device::cmp_w_pais_dd_dp() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169885,7 +169962,6 @@ void m68000_device::cmp_w_das_dd_dp() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169893,6 +169969,7 @@ void m68000_device::cmp_w_das_dd_dp() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170026,7 +170103,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170034,6 +170110,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170125,7 +170202,6 @@ void m68000_device::cmp_w_adr16_dd_dp() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170133,6 +170209,7 @@ void m68000_device::cmp_w_adr16_dd_dp() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170248,7 +170325,6 @@ void m68000_device::cmp_w_adr32_dd_dp() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170256,6 +170332,7 @@ void m68000_device::cmp_w_adr32_dd_dp() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170347,7 +170424,6 @@ void m68000_device::cmp_w_dpc_dd_dp() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170355,6 +170431,7 @@ void m68000_device::cmp_w_dpc_dd_dp() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170487,7 +170564,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170495,6 +170571,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170561,7 +170638,6 @@ void m68000_device::cmp_w_imm16_dd_dp() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -170569,6 +170645,7 @@ void m68000_device::cmp_w_imm16_dd_dp() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170609,7 +170686,6 @@ void m68000_device::cmp_l_ds_dd_dp() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170642,6 +170718,7 @@ void m68000_device::cmp_l_ds_dd_dp() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170662,7 +170739,6 @@ void m68000_device::cmp_l_as_dd_dp() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -170695,6 +170771,7 @@ void m68000_device::cmp_l_as_dd_dp() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170766,7 +170843,6 @@ void m68000_device::cmp_l_ais_dd_dp() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170799,6 +170875,7 @@ void m68000_device::cmp_l_ais_dd_dp() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170873,7 +170950,6 @@ void m68000_device::cmp_l_aips_dd_dp() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170906,6 +170982,7 @@ void m68000_device::cmp_l_aips_dd_dp() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170981,7 +171058,6 @@ void m68000_device::cmp_l_pais_dd_dp() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171014,6 +171090,7 @@ void m68000_device::cmp_l_pais_dd_dp() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171109,7 +171186,6 @@ void m68000_device::cmp_l_das_dd_dp() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171142,6 +171218,7 @@ void m68000_device::cmp_l_das_dd_dp() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171278,7 +171355,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171311,6 +171387,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171408,7 +171485,6 @@ void m68000_device::cmp_l_adr16_dd_dp() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171441,6 +171517,7 @@ void m68000_device::cmp_l_adr16_dd_dp() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171562,7 +171639,6 @@ void m68000_device::cmp_l_adr32_dd_dp() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171595,6 +171671,7 @@ void m68000_device::cmp_l_adr32_dd_dp() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171689,7 +171766,6 @@ void m68000_device::cmp_l_dpc_dd_dp() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171722,6 +171798,7 @@ void m68000_device::cmp_l_dpc_dd_dp() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171857,7 +171934,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171890,6 +171966,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171960,7 +172037,6 @@ void m68000_device::cmp_l_imm32_dd_dp() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -171993,6 +172069,7 @@ void m68000_device::cmp_l_imm32_dd_dp() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172013,7 +172090,6 @@ void m68000_device::cmpa_w_ds_ad_dp() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -172046,6 +172122,7 @@ void m68000_device::cmpa_w_ds_ad_dp() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172066,7 +172143,6 @@ void m68000_device::cmpa_w_as_ad_dp() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -172099,6 +172175,7 @@ void m68000_device::cmpa_w_as_ad_dp() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172146,7 +172223,6 @@ void m68000_device::cmpa_w_ais_ad_dp() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172179,6 +172255,7 @@ void m68000_device::cmpa_w_ais_ad_dp() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172230,7 +172307,6 @@ void m68000_device::cmpa_w_aips_ad_dp() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172263,6 +172339,7 @@ void m68000_device::cmpa_w_aips_ad_dp() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172316,7 +172393,6 @@ void m68000_device::cmpa_w_pais_ad_dp() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172349,6 +172425,7 @@ void m68000_device::cmpa_w_pais_ad_dp() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172421,7 +172498,6 @@ void m68000_device::cmpa_w_das_ad_dp() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172454,6 +172530,7 @@ void m68000_device::cmpa_w_das_ad_dp() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172567,7 +172644,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172600,6 +172676,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172671,7 +172748,6 @@ void m68000_device::cmpa_w_adr16_ad_dp() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172704,6 +172780,7 @@ void m68000_device::cmpa_w_adr16_ad_dp() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172799,7 +172876,6 @@ void m68000_device::cmpa_w_adr32_ad_dp() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172832,6 +172908,7 @@ void m68000_device::cmpa_w_adr32_ad_dp() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172903,7 +172980,6 @@ void m68000_device::cmpa_w_dpc_ad_dp() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172936,6 +173012,7 @@ void m68000_device::cmpa_w_dpc_ad_dp() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173048,7 +173125,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173081,6 +173157,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173127,7 +173204,6 @@ void m68000_device::cmpa_w_imm16_ad_dp() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -173160,6 +173236,7 @@ void m68000_device::cmpa_w_imm16_ad_dp() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173180,13 +173257,13 @@ void m68000_device::eor_b_dd_ds_dp() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173253,7 +173330,6 @@ void m68000_device::cmpm_b_aips_aipd_dp() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -173276,6 +173352,7 @@ void m68000_device::cmpm_b_aips_aipd_dp() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173344,7 +173421,6 @@ void m68000_device::eor_b_dd_ais_dp() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173374,6 +173450,7 @@ void m68000_device::eor_b_dd_ais_dp() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173437,7 +173514,6 @@ void m68000_device::eor_b_dd_aips_dp() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173467,6 +173543,7 @@ void m68000_device::eor_b_dd_aips_dp() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173532,7 +173609,6 @@ void m68000_device::eor_b_dd_pais_dp() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173562,6 +173638,7 @@ void m68000_device::eor_b_dd_pais_dp() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173646,7 +173723,6 @@ void m68000_device::eor_b_dd_das_dp() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173676,6 +173752,7 @@ void m68000_device::eor_b_dd_das_dp() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173803,7 +173880,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173833,6 +173909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173916,7 +173993,6 @@ void m68000_device::eor_b_dd_adr16_dp() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173946,6 +174022,7 @@ void m68000_device::eor_b_dd_adr16_dp() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174054,7 +174131,6 @@ void m68000_device::eor_b_dd_adr32_dp() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174084,6 +174160,7 @@ void m68000_device::eor_b_dd_adr32_dp() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -174118,13 +174195,13 @@ void m68000_device::eor_w_dd_ds_dp() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174195,7 +174272,6 @@ void m68000_device::cmpm_w_aips_aipd_dp() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -174222,6 +174298,7 @@ void m68000_device::cmpm_w_aips_aipd_dp() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174294,7 +174371,6 @@ void m68000_device::eor_w_dd_ais_dp() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174324,6 +174400,7 @@ void m68000_device::eor_w_dd_ais_dp() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174397,7 +174474,6 @@ void m68000_device::eor_w_dd_aips_dp() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174427,6 +174503,7 @@ void m68000_device::eor_w_dd_aips_dp() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174502,7 +174579,6 @@ void m68000_device::eor_w_dd_pais_dp() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174532,6 +174608,7 @@ void m68000_device::eor_w_dd_pais_dp() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174626,7 +174703,6 @@ void m68000_device::eor_w_dd_das_dp() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174656,6 +174732,7 @@ void m68000_device::eor_w_dd_das_dp() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174793,7 +174870,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174823,6 +174899,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174916,7 +174993,6 @@ void m68000_device::eor_w_dd_adr16_dp() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174946,6 +175022,7 @@ void m68000_device::eor_w_dd_adr16_dp() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -175064,7 +175141,6 @@ void m68000_device::eor_w_dd_adr32_dp() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175094,6 +175170,7 @@ void m68000_device::eor_w_dd_adr32_dp() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175134,7 +175211,6 @@ void m68000_device::eor_l_dd_ds_dp() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -175170,6 +175246,7 @@ void m68000_device::eor_l_dd_ds_dp() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -175244,7 +175321,6 @@ void m68000_device::cmpm_l_aips_aipd_dp() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -175301,6 +175377,7 @@ void m68000_device::cmpm_l_aips_aipd_dp() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175395,7 +175472,6 @@ void m68000_device::eor_l_dd_ais_dp() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175451,6 +175527,7 @@ void m68000_device::eor_l_dd_ais_dp() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175547,7 +175624,6 @@ void m68000_device::eor_l_dd_aips_dp() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175603,6 +175679,7 @@ void m68000_device::eor_l_dd_aips_dp() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175700,7 +175777,6 @@ void m68000_device::eor_l_dd_pais_dp() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175756,6 +175832,7 @@ void m68000_device::eor_l_dd_pais_dp() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175873,7 +175950,6 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175929,6 +176005,7 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176089,7 +176166,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -176145,6 +176221,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176265,7 +176342,6 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -176321,6 +176397,7 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176466,7 +176543,6 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -176522,6 +176598,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -176562,7 +176639,6 @@ void m68000_device::cmpa_l_ds_ad_dp() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -176595,6 +176671,7 @@ void m68000_device::cmpa_l_ds_ad_dp() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176615,7 +176692,6 @@ void m68000_device::cmpa_l_as_ad_dp() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -176648,6 +176724,7 @@ void m68000_device::cmpa_l_as_ad_dp() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176719,7 +176796,6 @@ void m68000_device::cmpa_l_ais_ad_dp() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176752,6 +176828,7 @@ void m68000_device::cmpa_l_ais_ad_dp() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176826,7 +176903,6 @@ void m68000_device::cmpa_l_aips_ad_dp() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176859,6 +176935,7 @@ void m68000_device::cmpa_l_aips_ad_dp() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176934,7 +177011,6 @@ void m68000_device::cmpa_l_pais_ad_dp() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176967,6 +177043,7 @@ void m68000_device::cmpa_l_pais_ad_dp() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177062,7 +177139,6 @@ void m68000_device::cmpa_l_das_ad_dp() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177095,6 +177171,7 @@ void m68000_device::cmpa_l_das_ad_dp() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177231,7 +177308,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177264,6 +177340,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177361,7 +177438,6 @@ void m68000_device::cmpa_l_adr16_ad_dp() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177394,6 +177470,7 @@ void m68000_device::cmpa_l_adr16_ad_dp() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177515,7 +177592,6 @@ void m68000_device::cmpa_l_adr32_ad_dp() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177548,6 +177624,7 @@ void m68000_device::cmpa_l_adr32_ad_dp() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177642,7 +177719,6 @@ void m68000_device::cmpa_l_dpc_ad_dp() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177675,6 +177751,7 @@ void m68000_device::cmpa_l_dpc_ad_dp() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177810,7 +177887,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177843,6 +177919,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177913,7 +177990,6 @@ void m68000_device::cmpa_l_imm32_ad_dp() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -177946,6 +178022,7 @@ void m68000_device::cmpa_l_imm32_ad_dp() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177966,7 +178043,6 @@ void m68000_device::and_b_ds_dd_dp() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -177974,6 +178050,7 @@ void m68000_device::and_b_ds_dd_dp() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178040,7 +178117,6 @@ void m68000_device::and_b_ais_dd_dp() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178048,6 +178124,7 @@ void m68000_device::and_b_ais_dd_dp() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178119,7 +178196,6 @@ void m68000_device::and_b_aips_dd_dp() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178127,6 +178203,7 @@ void m68000_device::and_b_aips_dd_dp() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178200,7 +178277,6 @@ void m68000_device::and_b_pais_dd_dp() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178208,6 +178284,7 @@ void m68000_device::and_b_pais_dd_dp() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178300,7 +178377,6 @@ void m68000_device::and_b_das_dd_dp() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178308,6 +178384,7 @@ void m68000_device::and_b_das_dd_dp() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178443,7 +178520,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178451,6 +178527,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178542,7 +178619,6 @@ void m68000_device::and_b_adr16_dd_dp() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178550,6 +178626,7 @@ void m68000_device::and_b_adr16_dd_dp() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178666,7 +178743,6 @@ void m68000_device::and_b_adr32_dd_dp() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178674,6 +178750,7 @@ void m68000_device::and_b_adr32_dd_dp() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178765,7 +178842,6 @@ void m68000_device::and_b_dpc_dd_dp() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178773,6 +178849,7 @@ void m68000_device::and_b_dpc_dd_dp() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178907,7 +178984,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178915,6 +178991,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178984,7 +179061,6 @@ void m68000_device::and_b_imm8_dd_dp() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -178992,6 +179068,7 @@ void m68000_device::and_b_imm8_dd_dp() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179034,7 +179111,6 @@ void m68000_device::and_w_ds_dd_dp() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -179042,6 +179118,7 @@ void m68000_device::and_w_ds_dd_dp() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179112,7 +179189,6 @@ void m68000_device::and_w_ais_dd_dp() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179120,6 +179196,7 @@ void m68000_device::and_w_ais_dd_dp() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179195,7 +179272,6 @@ void m68000_device::and_w_aips_dd_dp() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179203,6 +179279,7 @@ void m68000_device::and_w_aips_dd_dp() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179280,7 +179357,6 @@ void m68000_device::and_w_pais_dd_dp() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179288,6 +179364,7 @@ void m68000_device::and_w_pais_dd_dp() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179384,7 +179461,6 @@ void m68000_device::and_w_das_dd_dp() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179392,6 +179468,7 @@ void m68000_device::and_w_das_dd_dp() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179531,7 +179608,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179539,6 +179615,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179634,7 +179711,6 @@ void m68000_device::and_w_adr16_dd_dp() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179642,6 +179718,7 @@ void m68000_device::and_w_adr16_dd_dp() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179762,7 +179839,6 @@ void m68000_device::and_w_adr32_dd_dp() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179770,6 +179846,7 @@ void m68000_device::and_w_adr32_dd_dp() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179865,7 +179942,6 @@ void m68000_device::and_w_dpc_dd_dp() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179873,6 +179949,7 @@ void m68000_device::and_w_dpc_dd_dp() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -180011,7 +180088,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180019,6 +180095,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -180088,7 +180165,6 @@ void m68000_device::and_w_imm16_dd_dp() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -180096,6 +180172,7 @@ void m68000_device::and_w_imm16_dd_dp() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -180138,7 +180215,6 @@ void m68000_device::and_l_ds_dd_dp() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -180175,6 +180251,7 @@ void m68000_device::and_l_ds_dd_dp() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180249,7 +180326,6 @@ void m68000_device::and_l_ais_dd_dp() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180283,6 +180359,7 @@ void m68000_device::and_l_ais_dd_dp() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180361,7 +180438,6 @@ void m68000_device::and_l_aips_dd_dp() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180395,6 +180471,7 @@ void m68000_device::and_l_aips_dd_dp() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180474,7 +180551,6 @@ void m68000_device::and_l_pais_dd_dp() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180508,6 +180584,7 @@ void m68000_device::and_l_pais_dd_dp() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180607,7 +180684,6 @@ void m68000_device::and_l_das_dd_dp() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180641,6 +180717,7 @@ void m68000_device::and_l_das_dd_dp() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180783,7 +180860,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180817,6 +180893,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180919,7 +180996,6 @@ void m68000_device::and_l_adr16_dd_dp() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180953,6 +181029,7 @@ void m68000_device::and_l_adr16_dd_dp() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181080,7 +181157,6 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181114,6 +181190,7 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181212,7 +181289,6 @@ void m68000_device::and_l_dpc_dd_dp() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181246,6 +181322,7 @@ void m68000_device::and_l_dpc_dd_dp() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181387,7 +181464,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181421,6 +181497,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181495,7 +181572,6 @@ void m68000_device::and_l_imm32_dd_dp() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -181532,6 +181608,7 @@ void m68000_device::and_l_imm32_dd_dp() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181554,7 +181631,6 @@ void m68000_device::mulu_w_ds_dd_dp() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -181615,6 +181691,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181667,7 +181744,6 @@ void m68000_device::mulu_w_ais_dd_dp() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181728,6 +181804,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181784,7 +181861,6 @@ void m68000_device::mulu_w_aips_dd_dp() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181845,6 +181921,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181903,7 +181980,6 @@ void m68000_device::mulu_w_pais_dd_dp() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181964,6 +182040,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182041,7 +182118,6 @@ void m68000_device::mulu_w_das_dd_dp() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182102,6 +182178,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182220,7 +182297,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182281,6 +182357,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182357,7 +182434,6 @@ void m68000_device::mulu_w_adr16_dd_dp() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182418,6 +182494,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182518,7 +182595,6 @@ void m68000_device::mulu_w_adr32_dd_dp() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182579,6 +182655,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182655,7 +182732,6 @@ void m68000_device::mulu_w_dpc_dd_dp() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182716,6 +182792,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182833,7 +182910,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182894,6 +182970,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182945,7 +183022,6 @@ void m68000_device::mulu_w_imm16_dd_dp() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -183006,6 +183082,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -183031,7 +183108,6 @@ void m68000_device::abcd_ds_dd_dp() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -183063,6 +183139,7 @@ void m68000_device::abcd_ds_dd_dp() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -183113,7 +183190,6 @@ void m68000_device::abcd_pais_paid_dp() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -183165,6 +183241,7 @@ void m68000_device::abcd_pais_paid_dp() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183222,7 +183299,6 @@ void m68000_device::and_b_dd_ais_dp() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183252,6 +183328,7 @@ void m68000_device::and_b_dd_ais_dp() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183315,7 +183392,6 @@ void m68000_device::and_b_dd_aips_dp() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183345,6 +183421,7 @@ void m68000_device::and_b_dd_aips_dp() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183410,7 +183487,6 @@ void m68000_device::and_b_dd_pais_dp() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183440,6 +183516,7 @@ void m68000_device::and_b_dd_pais_dp() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183524,7 +183601,6 @@ void m68000_device::and_b_dd_das_dp() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183554,6 +183630,7 @@ void m68000_device::and_b_dd_das_dp() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183681,7 +183758,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183711,6 +183787,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183794,7 +183871,6 @@ void m68000_device::and_b_dd_adr16_dp() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183824,6 +183900,7 @@ void m68000_device::and_b_dd_adr16_dp() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183932,7 +184009,6 @@ void m68000_device::and_b_dd_adr32_dp() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183962,6 +184038,7 @@ void m68000_device::and_b_dd_adr32_dp() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -183996,7 +184073,6 @@ void m68000_device::exg_dd_ds_dp() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184027,6 +184103,7 @@ void m68000_device::exg_dd_ds_dp() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184047,7 +184124,6 @@ void m68000_device::exg_ad_as_dp() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184078,6 +184154,7 @@ void m68000_device::exg_ad_as_dp() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184126,7 +184203,6 @@ void m68000_device::and_w_dd_ais_dp() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184156,6 +184232,7 @@ void m68000_device::and_w_dd_ais_dp() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184229,7 +184306,6 @@ void m68000_device::and_w_dd_aips_dp() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184259,6 +184335,7 @@ void m68000_device::and_w_dd_aips_dp() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184334,7 +184411,6 @@ void m68000_device::and_w_dd_pais_dp() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184364,6 +184440,7 @@ void m68000_device::and_w_dd_pais_dp() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184458,7 +184535,6 @@ void m68000_device::and_w_dd_das_dp() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184488,6 +184564,7 @@ void m68000_device::and_w_dd_das_dp() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184625,7 +184702,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184655,6 +184731,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184748,7 +184825,6 @@ void m68000_device::and_w_dd_adr16_dp() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184778,6 +184854,7 @@ void m68000_device::and_w_dd_adr16_dp() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184896,7 +184973,6 @@ void m68000_device::and_w_dd_adr32_dp() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184926,6 +185002,7 @@ void m68000_device::and_w_dd_adr32_dp() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -184966,7 +185043,6 @@ void m68000_device::exg_dd_as_dp() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184997,6 +185073,7 @@ void m68000_device::exg_dd_as_dp() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -185069,7 +185146,6 @@ void m68000_device::and_l_dd_ais_dp() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185125,6 +185201,7 @@ void m68000_device::and_l_dd_ais_dp() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185221,7 +185298,6 @@ void m68000_device::and_l_dd_aips_dp() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185277,6 +185353,7 @@ void m68000_device::and_l_dd_aips_dp() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185374,7 +185451,6 @@ void m68000_device::and_l_dd_pais_dp() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185430,6 +185506,7 @@ void m68000_device::and_l_dd_pais_dp() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185547,7 +185624,6 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185603,6 +185679,7 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185763,7 +185840,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185819,6 +185895,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185939,7 +186016,6 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185995,6 +186071,7 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -186140,7 +186217,6 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -186196,6 +186272,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -186236,7 +186313,6 @@ void m68000_device::muls_w_ds_dd_dp() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -186299,6 +186375,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186358,7 +186435,6 @@ void m68000_device::muls_w_ais_dd_dp() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186421,6 +186497,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186484,7 +186561,6 @@ void m68000_device::muls_w_aips_dd_dp() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186547,6 +186623,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186612,7 +186689,6 @@ void m68000_device::muls_w_pais_dd_dp() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186675,6 +186751,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186759,7 +186836,6 @@ void m68000_device::muls_w_das_dd_dp() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186822,6 +186898,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186947,7 +187024,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187010,6 +187086,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187093,7 +187170,6 @@ void m68000_device::muls_w_adr16_dd_dp() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187156,6 +187232,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187263,7 +187340,6 @@ void m68000_device::muls_w_adr32_dd_dp() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187326,6 +187402,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187409,7 +187486,6 @@ void m68000_device::muls_w_dpc_dd_dp() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187472,6 +187548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187596,7 +187673,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187659,6 +187735,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187717,7 +187794,6 @@ void m68000_device::muls_w_imm16_dd_dp() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -187780,6 +187856,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187812,7 +187889,6 @@ void m68000_device::add_b_ds_dd_dp() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -187820,6 +187896,7 @@ void m68000_device::add_b_ds_dd_dp() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -187884,7 +187961,6 @@ void m68000_device::add_b_ais_dd_dp() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187892,6 +187968,7 @@ void m68000_device::add_b_ais_dd_dp() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -187960,7 +188037,6 @@ void m68000_device::add_b_aips_dd_dp() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187968,6 +188044,7 @@ void m68000_device::add_b_aips_dd_dp() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188038,7 +188115,6 @@ void m68000_device::add_b_pais_dd_dp() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188046,6 +188122,7 @@ void m68000_device::add_b_pais_dd_dp() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188135,7 +188212,6 @@ void m68000_device::add_b_das_dd_dp() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188143,6 +188219,7 @@ void m68000_device::add_b_das_dd_dp() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188273,7 +188350,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188281,6 +188357,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188369,7 +188446,6 @@ void m68000_device::add_b_adr16_dd_dp() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188377,6 +188453,7 @@ void m68000_device::add_b_adr16_dd_dp() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188489,7 +188566,6 @@ void m68000_device::add_b_adr32_dd_dp() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188497,6 +188573,7 @@ void m68000_device::add_b_adr32_dd_dp() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188585,7 +188662,6 @@ void m68000_device::add_b_dpc_dd_dp() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188593,6 +188669,7 @@ void m68000_device::add_b_dpc_dd_dp() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188722,7 +188799,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188730,6 +188806,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188797,7 +188874,6 @@ void m68000_device::add_b_imm8_dd_dp() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -188805,6 +188881,7 @@ void m68000_device::add_b_imm8_dd_dp() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188846,7 +188923,6 @@ void m68000_device::add_w_ds_dd_dp() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -188854,6 +188930,7 @@ void m68000_device::add_w_ds_dd_dp() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188895,7 +188972,6 @@ void m68000_device::add_w_as_dd_dp() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -188903,6 +188979,7 @@ void m68000_device::add_w_as_dd_dp() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188971,7 +189048,6 @@ void m68000_device::add_w_ais_dd_dp() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188979,6 +189055,7 @@ void m68000_device::add_w_ais_dd_dp() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189051,7 +189128,6 @@ void m68000_device::add_w_aips_dd_dp() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189059,6 +189135,7 @@ void m68000_device::add_w_aips_dd_dp() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189133,7 +189210,6 @@ void m68000_device::add_w_pais_dd_dp() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189141,6 +189217,7 @@ void m68000_device::add_w_pais_dd_dp() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189234,7 +189311,6 @@ void m68000_device::add_w_das_dd_dp() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189242,6 +189318,7 @@ void m68000_device::add_w_das_dd_dp() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189376,7 +189453,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189384,6 +189460,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189476,7 +189553,6 @@ void m68000_device::add_w_adr16_dd_dp() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189484,6 +189560,7 @@ void m68000_device::add_w_adr16_dd_dp() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189600,7 +189677,6 @@ void m68000_device::add_w_adr32_dd_dp() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189608,6 +189684,7 @@ void m68000_device::add_w_adr32_dd_dp() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189700,7 +189777,6 @@ void m68000_device::add_w_dpc_dd_dp() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189708,6 +189784,7 @@ void m68000_device::add_w_dpc_dd_dp() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189841,7 +189918,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189849,6 +189925,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189916,7 +189993,6 @@ void m68000_device::add_w_imm16_dd_dp() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -189924,6 +190000,7 @@ void m68000_device::add_w_imm16_dd_dp() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189965,7 +190042,6 @@ void m68000_device::add_l_ds_dd_dp() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -190001,6 +190077,7 @@ void m68000_device::add_l_ds_dd_dp() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190022,7 +190099,6 @@ void m68000_device::add_l_as_dd_dp() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -190058,6 +190134,7 @@ void m68000_device::add_l_as_dd_dp() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190130,7 +190207,6 @@ void m68000_device::add_l_ais_dd_dp() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190164,6 +190240,7 @@ void m68000_device::add_l_ais_dd_dp() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190239,7 +190316,6 @@ void m68000_device::add_l_aips_dd_dp() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190273,6 +190349,7 @@ void m68000_device::add_l_aips_dd_dp() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190349,7 +190426,6 @@ void m68000_device::add_l_pais_dd_dp() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190383,6 +190459,7 @@ void m68000_device::add_l_pais_dd_dp() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190479,7 +190556,6 @@ void m68000_device::add_l_das_dd_dp() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190513,6 +190589,7 @@ void m68000_device::add_l_das_dd_dp() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190650,7 +190727,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190684,6 +190760,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190782,7 +190859,6 @@ void m68000_device::add_l_adr16_dd_dp() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190816,6 +190892,7 @@ void m68000_device::add_l_adr16_dd_dp() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190938,7 +191015,6 @@ void m68000_device::add_l_adr32_dd_dp() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190972,6 +191048,7 @@ void m68000_device::add_l_adr32_dd_dp() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191067,7 +191144,6 @@ void m68000_device::add_l_dpc_dd_dp() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191101,6 +191177,7 @@ void m68000_device::add_l_dpc_dd_dp() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191237,7 +191314,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191271,6 +191347,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191342,7 +191419,6 @@ void m68000_device::add_l_imm32_dd_dp() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -191378,6 +191454,7 @@ void m68000_device::add_l_imm32_dd_dp() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191399,7 +191476,6 @@ void m68000_device::adda_w_ds_ad_dp() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -191433,6 +191509,7 @@ void m68000_device::adda_w_ds_ad_dp() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191454,7 +191531,6 @@ void m68000_device::adda_w_as_ad_dp() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -191488,6 +191564,7 @@ void m68000_device::adda_w_as_ad_dp() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191536,7 +191613,6 @@ void m68000_device::adda_w_ais_ad_dp() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191570,6 +191646,7 @@ void m68000_device::adda_w_ais_ad_dp() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191622,7 +191699,6 @@ void m68000_device::adda_w_aips_ad_dp() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191656,6 +191732,7 @@ void m68000_device::adda_w_aips_ad_dp() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191710,7 +191787,6 @@ void m68000_device::adda_w_pais_ad_dp() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191744,6 +191820,7 @@ void m68000_device::adda_w_pais_ad_dp() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191817,7 +191894,6 @@ void m68000_device::adda_w_das_ad_dp() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191851,6 +191927,7 @@ void m68000_device::adda_w_das_ad_dp() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191965,7 +192042,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191999,6 +192075,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192071,7 +192148,6 @@ void m68000_device::adda_w_adr16_ad_dp() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192105,6 +192181,7 @@ void m68000_device::adda_w_adr16_ad_dp() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192201,7 +192278,6 @@ void m68000_device::adda_w_adr32_ad_dp() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192235,6 +192311,7 @@ void m68000_device::adda_w_adr32_ad_dp() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192307,7 +192384,6 @@ void m68000_device::adda_w_dpc_ad_dp() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192341,6 +192417,7 @@ void m68000_device::adda_w_dpc_ad_dp() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192454,7 +192531,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192488,6 +192564,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192535,7 +192612,6 @@ void m68000_device::adda_w_imm16_ad_dp() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -192569,6 +192645,7 @@ void m68000_device::adda_w_imm16_ad_dp() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192590,7 +192667,6 @@ void m68000_device::addx_b_ds_dd_dp() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -192598,6 +192674,7 @@ void m68000_device::addx_b_ds_dd_dp() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192671,7 +192748,6 @@ void m68000_device::addx_b_pais_paid_dp() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -192722,6 +192798,7 @@ void m68000_device::addx_b_pais_paid_dp() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -192779,7 +192856,6 @@ void m68000_device::add_b_dd_ais_dp() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192809,6 +192885,7 @@ void m68000_device::add_b_dd_ais_dp() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192869,7 +192946,6 @@ void m68000_device::add_b_dd_aips_dp() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192899,6 +192975,7 @@ void m68000_device::add_b_dd_aips_dp() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192961,7 +193038,6 @@ void m68000_device::add_b_dd_pais_dp() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192991,6 +193067,7 @@ void m68000_device::add_b_dd_pais_dp() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193072,7 +193149,6 @@ void m68000_device::add_b_dd_das_dp() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193102,6 +193178,7 @@ void m68000_device::add_b_dd_das_dp() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193224,7 +193301,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193254,6 +193330,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193334,7 +193411,6 @@ void m68000_device::add_b_dd_adr16_dp() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193364,6 +193440,7 @@ void m68000_device::add_b_dd_adr16_dp() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193468,7 +193545,6 @@ void m68000_device::add_b_dd_adr32_dp() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193498,6 +193574,7 @@ void m68000_device::add_b_dd_adr32_dp() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -193531,7 +193608,6 @@ void m68000_device::addx_w_ds_dd_dp() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -193539,6 +193615,7 @@ void m68000_device::addx_w_ds_dd_dp() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193616,7 +193693,6 @@ void m68000_device::addx_w_pais_paid_dp() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -193671,6 +193747,7 @@ void m68000_device::addx_w_pais_paid_dp() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193738,7 +193815,6 @@ void m68000_device::add_w_dd_ais_dp() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193768,6 +193844,7 @@ void m68000_device::add_w_dd_ais_dp() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193838,7 +193915,6 @@ void m68000_device::add_w_dd_aips_dp() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193868,6 +193944,7 @@ void m68000_device::add_w_dd_aips_dp() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193940,7 +194017,6 @@ void m68000_device::add_w_dd_pais_dp() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193970,6 +194046,7 @@ void m68000_device::add_w_dd_pais_dp() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -194061,7 +194138,6 @@ void m68000_device::add_w_dd_das_dp() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194091,6 +194167,7 @@ void m68000_device::add_w_dd_das_dp() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194223,7 +194300,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194253,6 +194329,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194343,7 +194420,6 @@ void m68000_device::add_w_dd_adr16_dp() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194373,6 +194449,7 @@ void m68000_device::add_w_dd_adr16_dp() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194487,7 +194564,6 @@ void m68000_device::add_w_dd_adr32_dp() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194517,6 +194593,7 @@ void m68000_device::add_w_dd_adr32_dp() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194556,7 +194633,6 @@ void m68000_device::addx_l_ds_dd_dp() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -194593,6 +194669,7 @@ void m68000_device::addx_l_ds_dd_dp() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -194728,7 +194805,6 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194781,6 +194857,7 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -194872,7 +194949,6 @@ void m68000_device::add_l_dd_ais_dp() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194928,6 +195004,7 @@ void m68000_device::add_l_dd_ais_dp() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195021,7 +195098,6 @@ void m68000_device::add_l_dd_aips_dp() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195077,6 +195153,7 @@ void m68000_device::add_l_dd_aips_dp() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195171,7 +195248,6 @@ void m68000_device::add_l_dd_pais_dp() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195227,6 +195303,7 @@ void m68000_device::add_l_dd_pais_dp() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195341,7 +195418,6 @@ void m68000_device::add_l_dd_das_dp() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195397,6 +195473,7 @@ void m68000_device::add_l_dd_das_dp() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195552,7 +195629,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195608,6 +195684,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195724,7 +195801,6 @@ void m68000_device::add_l_dd_adr16_dp() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195780,6 +195856,7 @@ void m68000_device::add_l_dd_adr16_dp() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195920,7 +195997,6 @@ void m68000_device::add_l_dd_adr32_dp() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195976,6 +196052,7 @@ void m68000_device::add_l_dd_adr32_dp() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -196015,7 +196092,6 @@ void m68000_device::adda_l_ds_ad_dp() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -196049,6 +196125,7 @@ void m68000_device::adda_l_ds_ad_dp() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196070,7 +196147,6 @@ void m68000_device::adda_l_as_ad_dp() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -196104,6 +196180,7 @@ void m68000_device::adda_l_as_ad_dp() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196176,7 +196253,6 @@ void m68000_device::adda_l_ais_ad_dp() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196208,6 +196284,7 @@ void m68000_device::adda_l_ais_ad_dp() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196283,7 +196360,6 @@ void m68000_device::adda_l_aips_ad_dp() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196315,6 +196391,7 @@ void m68000_device::adda_l_aips_ad_dp() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196391,7 +196468,6 @@ void m68000_device::adda_l_pais_ad_dp() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196423,6 +196499,7 @@ void m68000_device::adda_l_pais_ad_dp() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196519,7 +196596,6 @@ void m68000_device::adda_l_das_ad_dp() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196551,6 +196627,7 @@ void m68000_device::adda_l_das_ad_dp() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196688,7 +196765,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196720,6 +196796,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196818,7 +196895,6 @@ void m68000_device::adda_l_adr16_ad_dp() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196850,6 +196926,7 @@ void m68000_device::adda_l_adr16_ad_dp() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196972,7 +197049,6 @@ void m68000_device::adda_l_adr32_ad_dp() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197004,6 +197080,7 @@ void m68000_device::adda_l_adr32_ad_dp() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197099,7 +197176,6 @@ void m68000_device::adda_l_dpc_ad_dp() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197131,6 +197207,7 @@ void m68000_device::adda_l_dpc_ad_dp() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197267,7 +197344,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197299,6 +197375,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197370,7 +197447,6 @@ void m68000_device::adda_l_imm32_ad_dp() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -197404,6 +197480,7 @@ void m68000_device::adda_l_imm32_ad_dp() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197424,7 +197501,6 @@ void m68000_device::asr_b_imm3_ds_dp() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197476,6 +197552,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197496,7 +197573,6 @@ void m68000_device::lsr_b_imm3_ds_dp() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197548,6 +197624,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197568,7 +197645,6 @@ void m68000_device::roxr_b_imm3_ds_dp() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197620,6 +197696,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197640,7 +197717,6 @@ void m68000_device::ror_b_imm3_ds_dp() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197692,6 +197768,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197713,7 +197790,6 @@ void m68000_device::asr_b_dd_ds_dp() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197765,6 +197841,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197786,7 +197863,6 @@ void m68000_device::lsr_b_dd_ds_dp() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197838,6 +197914,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197859,7 +197936,6 @@ void m68000_device::roxr_b_dd_ds_dp() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197911,6 +197987,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197932,7 +198009,6 @@ void m68000_device::ror_b_dd_ds_dp() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197984,6 +198060,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198004,7 +198081,6 @@ void m68000_device::asr_w_imm3_ds_dp() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198056,6 +198132,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198076,7 +198153,6 @@ void m68000_device::lsr_w_imm3_ds_dp() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198128,6 +198204,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198148,7 +198225,6 @@ void m68000_device::roxr_w_imm3_ds_dp() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198200,6 +198276,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198220,7 +198297,6 @@ void m68000_device::ror_w_imm3_ds_dp() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198272,6 +198348,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198293,7 +198370,6 @@ void m68000_device::asr_w_dd_ds_dp() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198345,6 +198421,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198366,7 +198443,6 @@ void m68000_device::lsr_w_dd_ds_dp() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198418,6 +198494,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198439,7 +198516,6 @@ void m68000_device::roxr_w_dd_ds_dp() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198491,6 +198567,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198512,7 +198589,6 @@ void m68000_device::ror_w_dd_ds_dp() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198564,6 +198640,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198584,7 +198661,6 @@ void m68000_device::asr_l_imm3_ds_dp() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198640,6 +198716,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198662,7 +198739,6 @@ void m68000_device::lsr_l_imm3_ds_dp() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198718,6 +198794,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198740,7 +198817,6 @@ void m68000_device::roxr_l_imm3_ds_dp() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198796,6 +198872,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -198818,7 +198895,6 @@ void m68000_device::ror_l_imm3_ds_dp() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198874,6 +198950,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198897,7 +198974,6 @@ void m68000_device::asr_l_dd_ds_dp() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198953,6 +199029,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198976,7 +199053,6 @@ void m68000_device::lsr_l_dd_ds_dp() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199032,6 +199108,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199055,7 +199132,6 @@ void m68000_device::roxr_l_dd_ds_dp() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -199111,6 +199187,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -199134,7 +199211,6 @@ void m68000_device::ror_l_dd_ds_dp() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199190,6 +199266,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199240,7 +199317,6 @@ void m68000_device::asr_ais_dp() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199275,6 +199351,7 @@ void m68000_device::asr_ais_dp() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199345,7 +199422,6 @@ void m68000_device::asr_aips_dp() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199380,6 +199456,7 @@ void m68000_device::asr_aips_dp() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199452,7 +199529,6 @@ void m68000_device::asr_pais_dp() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199487,6 +199563,7 @@ void m68000_device::asr_pais_dp() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199578,7 +199655,6 @@ void m68000_device::asr_das_dp() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199613,6 +199689,7 @@ void m68000_device::asr_das_dp() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199745,7 +199822,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199780,6 +199856,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199870,7 +199947,6 @@ void m68000_device::asr_adr16_dp() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199905,6 +199981,7 @@ void m68000_device::asr_adr16_dp() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -200019,7 +200096,6 @@ void m68000_device::asr_adr32_dp() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -200054,6 +200130,7 @@ void m68000_device::asr_adr32_dp() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -200092,7 +200169,6 @@ void m68000_device::asl_b_imm3_ds_dp() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200144,6 +200220,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200164,7 +200241,6 @@ void m68000_device::lsl_b_imm3_ds_dp() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200216,6 +200292,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200237,7 +200314,6 @@ void m68000_device::roxl_b_imm3_ds_dp() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200289,6 +200365,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200309,7 +200386,6 @@ void m68000_device::rol_b_imm3_ds_dp() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200361,6 +200437,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200382,7 +200459,6 @@ void m68000_device::asl_b_dd_ds_dp() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200434,6 +200510,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200455,7 +200532,6 @@ void m68000_device::lsl_b_dd_ds_dp() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200507,6 +200583,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200529,7 +200606,6 @@ void m68000_device::roxl_b_dd_ds_dp() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200581,6 +200657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200602,7 +200679,6 @@ void m68000_device::rol_b_dd_ds_dp() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200654,6 +200730,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200674,7 +200751,6 @@ void m68000_device::asl_w_imm3_ds_dp() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200726,6 +200802,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200746,7 +200823,6 @@ void m68000_device::lsl_w_imm3_ds_dp() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200798,6 +200874,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -200819,7 +200896,6 @@ void m68000_device::roxl_w_imm3_ds_dp() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200871,6 +200947,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200891,7 +200968,6 @@ void m68000_device::rol_w_imm3_ds_dp() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200943,6 +201019,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200964,7 +201041,6 @@ void m68000_device::asl_w_dd_ds_dp() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201016,6 +201092,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201037,7 +201114,6 @@ void m68000_device::lsl_w_dd_ds_dp() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201089,6 +201165,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -201111,7 +201188,6 @@ void m68000_device::roxl_w_dd_ds_dp() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201163,6 +201239,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201184,7 +201261,6 @@ void m68000_device::rol_w_dd_ds_dp() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201236,6 +201312,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201256,7 +201333,6 @@ void m68000_device::asl_l_imm3_ds_dp() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201312,6 +201388,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201334,7 +201411,6 @@ void m68000_device::lsl_l_imm3_ds_dp() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201392,6 +201468,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201414,7 +201491,6 @@ void m68000_device::roxl_l_imm3_ds_dp() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201470,6 +201546,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201492,7 +201569,6 @@ void m68000_device::rol_l_imm3_ds_dp() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201548,6 +201624,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201571,7 +201648,6 @@ void m68000_device::asl_l_dd_ds_dp() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201627,6 +201703,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201650,7 +201727,6 @@ void m68000_device::lsl_l_dd_ds_dp() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201708,6 +201784,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201731,7 +201808,6 @@ void m68000_device::roxl_l_dd_ds_dp() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201787,6 +201863,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201810,7 +201887,6 @@ void m68000_device::rol_l_dd_ds_dp() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201866,6 +201942,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201916,7 +201993,6 @@ void m68000_device::asl_ais_dp() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -201951,6 +202027,7 @@ void m68000_device::asl_ais_dp() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202021,7 +202098,6 @@ void m68000_device::asl_aips_dp() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202056,6 +202132,7 @@ void m68000_device::asl_aips_dp() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202128,7 +202205,6 @@ void m68000_device::asl_pais_dp() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202163,6 +202239,7 @@ void m68000_device::asl_pais_dp() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202254,7 +202331,6 @@ void m68000_device::asl_das_dp() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202289,6 +202365,7 @@ void m68000_device::asl_das_dp() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202421,7 +202498,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202456,6 +202532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202546,7 +202623,6 @@ void m68000_device::asl_adr16_dp() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202581,6 +202657,7 @@ void m68000_device::asl_adr16_dp() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202695,7 +202772,6 @@ void m68000_device::asl_adr32_dp() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202730,6 +202806,7 @@ void m68000_device::asl_adr32_dp() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -202796,7 +202873,6 @@ void m68000_device::lsr_ais_dp() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202831,6 +202907,7 @@ void m68000_device::lsr_ais_dp() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202901,7 +202978,6 @@ void m68000_device::lsr_aips_dp() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202936,6 +203012,7 @@ void m68000_device::lsr_aips_dp() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203008,7 +203085,6 @@ void m68000_device::lsr_pais_dp() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203043,6 +203119,7 @@ void m68000_device::lsr_pais_dp() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203134,7 +203211,6 @@ void m68000_device::lsr_das_dp() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203169,6 +203245,7 @@ void m68000_device::lsr_das_dp() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203301,7 +203378,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203336,6 +203412,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203426,7 +203503,6 @@ void m68000_device::lsr_adr16_dp() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203461,6 +203537,7 @@ void m68000_device::lsr_adr16_dp() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203575,7 +203652,6 @@ void m68000_device::lsr_adr32_dp() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203610,6 +203686,7 @@ void m68000_device::lsr_adr32_dp() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -203677,7 +203754,6 @@ void m68000_device::lsl_ais_dp() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203712,6 +203788,7 @@ void m68000_device::lsl_ais_dp() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203785,7 +203862,6 @@ void m68000_device::lsl_aips_dp() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203820,6 +203896,7 @@ void m68000_device::lsl_aips_dp() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203895,7 +203972,6 @@ void m68000_device::lsl_pais_dp() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203930,6 +204006,7 @@ void m68000_device::lsl_pais_dp() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204024,7 +204101,6 @@ void m68000_device::lsl_das_dp() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204059,6 +204135,7 @@ void m68000_device::lsl_das_dp() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204196,7 +204273,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204231,6 +204307,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204324,7 +204401,6 @@ void m68000_device::lsl_adr16_dp() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204359,6 +204435,7 @@ void m68000_device::lsl_adr16_dp() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204477,7 +204554,6 @@ void m68000_device::lsl_adr32_dp() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204512,6 +204588,7 @@ void m68000_device::lsl_adr32_dp() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -204579,7 +204656,6 @@ void m68000_device::roxr_ais_dp() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204614,6 +204690,7 @@ void m68000_device::roxr_ais_dp() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204684,7 +204761,6 @@ void m68000_device::roxr_aips_dp() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204719,6 +204795,7 @@ void m68000_device::roxr_aips_dp() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204791,7 +204868,6 @@ void m68000_device::roxr_pais_dp() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204826,6 +204902,7 @@ void m68000_device::roxr_pais_dp() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204917,7 +204994,6 @@ void m68000_device::roxr_das_dp() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204952,6 +205028,7 @@ void m68000_device::roxr_das_dp() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205084,7 +205161,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205119,6 +205195,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205209,7 +205286,6 @@ void m68000_device::roxr_adr16_dp() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205244,6 +205320,7 @@ void m68000_device::roxr_adr16_dp() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205358,7 +205435,6 @@ void m68000_device::roxr_adr32_dp() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205393,6 +205469,7 @@ void m68000_device::roxr_adr32_dp() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -205459,7 +205536,6 @@ void m68000_device::roxl_ais_dp() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205494,6 +205570,7 @@ void m68000_device::roxl_ais_dp() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205564,7 +205641,6 @@ void m68000_device::roxl_aips_dp() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205599,6 +205675,7 @@ void m68000_device::roxl_aips_dp() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205671,7 +205748,6 @@ void m68000_device::roxl_pais_dp() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205706,6 +205782,7 @@ void m68000_device::roxl_pais_dp() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205797,7 +205874,6 @@ void m68000_device::roxl_das_dp() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205832,6 +205908,7 @@ void m68000_device::roxl_das_dp() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205964,7 +206041,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205999,6 +206075,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206089,7 +206166,6 @@ void m68000_device::roxl_adr16_dp() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206124,6 +206200,7 @@ void m68000_device::roxl_adr16_dp() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206238,7 +206315,6 @@ void m68000_device::roxl_adr32_dp() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206273,6 +206349,7 @@ void m68000_device::roxl_adr32_dp() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -206339,7 +206416,6 @@ void m68000_device::ror_ais_dp() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206374,6 +206450,7 @@ void m68000_device::ror_ais_dp() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206444,7 +206521,6 @@ void m68000_device::ror_aips_dp() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206479,6 +206555,7 @@ void m68000_device::ror_aips_dp() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206551,7 +206628,6 @@ void m68000_device::ror_pais_dp() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206586,6 +206662,7 @@ void m68000_device::ror_pais_dp() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206677,7 +206754,6 @@ void m68000_device::ror_das_dp() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206712,6 +206788,7 @@ void m68000_device::ror_das_dp() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206844,7 +206921,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206879,6 +206955,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206969,7 +207046,6 @@ void m68000_device::ror_adr16_dp() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207004,6 +207080,7 @@ void m68000_device::ror_adr16_dp() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207118,7 +207195,6 @@ void m68000_device::ror_adr32_dp() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207153,6 +207229,7 @@ void m68000_device::ror_adr32_dp() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -207219,7 +207296,6 @@ void m68000_device::rol_ais_dp() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207254,6 +207330,7 @@ void m68000_device::rol_ais_dp() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207324,7 +207401,6 @@ void m68000_device::rol_aips_dp() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207359,6 +207435,7 @@ void m68000_device::rol_aips_dp() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207431,7 +207508,6 @@ void m68000_device::rol_pais_dp() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207466,6 +207542,7 @@ void m68000_device::rol_pais_dp() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207557,7 +207634,6 @@ void m68000_device::rol_das_dp() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207592,6 +207668,7 @@ void m68000_device::rol_das_dp() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207724,7 +207801,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207759,6 +207835,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207849,7 +207926,6 @@ void m68000_device::rol_adr16_dp() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207884,6 +207960,7 @@ void m68000_device::rol_adr16_dp() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207998,7 +208075,6 @@ void m68000_device::rol_adr32_dp() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -208033,6 +208109,7 @@ void m68000_device::rol_adr32_dp() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: diff --git a/src/devices/cpu/m68000/m68000-sdpm.cpp b/src/devices/cpu/m68000/m68000-sdpm.cpp index 5388556efe3..0217d35b3f5 100644 --- a/src/devices/cpu/m68000/m68000-sdpm.cpp +++ b/src/devices/cpu/m68000/m68000-sdpm.cpp @@ -12,6 +12,7 @@ void m68000_device::state_reset_dpm() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156,11 +157,11 @@ void m68000_device::state_reset_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -291,6 +292,7 @@ void m68000_device::state_bus_error_dpm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -470,11 +472,11 @@ void m68000_device::state_bus_error_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -605,6 +607,7 @@ void m68000_device::state_address_error_dpm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -784,11 +787,11 @@ void m68000_device::state_address_error_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -903,10 +906,10 @@ void m68000_device::state_interrupt_dpm() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -1040,11 +1043,11 @@ void m68000_device::state_interrupt_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1248,11 +1251,11 @@ void m68000_device::state_trace_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1456,11 +1459,11 @@ void m68000_device::state_illegal_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1664,11 +1667,11 @@ void m68000_device::state_priviledge_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -1872,11 +1875,11 @@ void m68000_device::state_linea_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2080,11 +2083,11 @@ void m68000_device::state_linef_dpm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2150,13 +2153,13 @@ void m68000_device::ori_b_imm8_ds_dpm() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2249,7 +2252,6 @@ void m68000_device::ori_b_imm8_ais_dpm() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2279,6 +2281,7 @@ void m68000_device::ori_b_imm8_ais_dpm() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2368,7 +2371,6 @@ void m68000_device::ori_b_imm8_aips_dpm() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2398,6 +2400,7 @@ void m68000_device::ori_b_imm8_aips_dpm() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2489,7 +2492,6 @@ void m68000_device::ori_b_imm8_pais_dpm() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2519,6 +2521,7 @@ void m68000_device::ori_b_imm8_pais_dpm() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2629,7 +2632,6 @@ void m68000_device::ori_b_imm8_das_dpm() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2659,6 +2661,7 @@ void m68000_device::ori_b_imm8_das_dpm() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2812,7 +2815,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2842,6 +2844,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2951,7 +2954,6 @@ void m68000_device::ori_b_imm8_adr16_dpm() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -2981,6 +2983,7 @@ void m68000_device::ori_b_imm8_adr16_dpm() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -3115,7 +3118,6 @@ void m68000_device::ori_b_imm8_adr32_dpm() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3145,6 +3147,7 @@ void m68000_device::ori_b_imm8_adr32_dpm() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -3251,12 +3254,12 @@ void m68000_device::ori_imm8_ccr_dpm() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3323,13 +3326,13 @@ void m68000_device::ori_w_imm16_ds_dpm() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3426,7 +3429,6 @@ void m68000_device::ori_w_imm16_ais_dpm() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3456,6 +3458,7 @@ void m68000_device::ori_w_imm16_ais_dpm() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3555,7 +3558,6 @@ void m68000_device::ori_w_imm16_aips_dpm() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3585,6 +3587,7 @@ void m68000_device::ori_w_imm16_aips_dpm() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3686,7 +3689,6 @@ void m68000_device::ori_w_imm16_pais_dpm() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3716,6 +3718,7 @@ void m68000_device::ori_w_imm16_pais_dpm() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3836,7 +3839,6 @@ void m68000_device::ori_w_imm16_das_dpm() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -3866,6 +3868,7 @@ void m68000_device::ori_w_imm16_das_dpm() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4029,7 +4032,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4059,6 +4061,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4178,7 +4181,6 @@ void m68000_device::ori_w_imm16_adr16_dpm() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4208,6 +4210,7 @@ void m68000_device::ori_w_imm16_adr16_dpm() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4352,7 +4355,6 @@ void m68000_device::ori_w_imm16_adr32_dpm() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4382,6 +4384,7 @@ void m68000_device::ori_w_imm16_adr32_dpm() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -4500,12 +4503,12 @@ void m68000_device::ori_i16u_sr_dpm() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4597,7 +4600,6 @@ void m68000_device::ori_l_imm32_ds_dpm() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4633,6 +4635,7 @@ void m68000_device::ori_l_imm32_ds_dpm() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4758,7 +4761,6 @@ void m68000_device::ori_l_imm32_ais_dpm() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -4814,6 +4816,7 @@ void m68000_device::ori_l_imm32_ais_dpm() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -4961,7 +4964,6 @@ void m68000_device::ori_l_imm32_aips_dpm() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5017,6 +5019,7 @@ void m68000_device::ori_l_imm32_aips_dpm() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5165,7 +5168,6 @@ void m68000_device::ori_l_imm32_pais_dpm() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5221,6 +5223,7 @@ void m68000_device::ori_l_imm32_pais_dpm() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5389,7 +5392,6 @@ void m68000_device::ori_l_imm32_das_dpm() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5445,6 +5447,7 @@ void m68000_device::ori_l_imm32_das_dpm() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5656,7 +5659,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5712,6 +5714,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5883,7 +5886,6 @@ void m68000_device::ori_l_imm32_adr16_dpm() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -5939,6 +5941,7 @@ void m68000_device::ori_l_imm32_adr16_dpm() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -6135,7 +6138,6 @@ void m68000_device::ori_l_imm32_adr32_dpm() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6191,6 +6193,7 @@ void m68000_device::ori_l_imm32_adr32_dpm() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -6231,7 +6234,6 @@ void m68000_device::btst_dd_ds_dpm() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6272,6 +6274,7 @@ void m68000_device::btst_dd_ds_dpm() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6286,6 +6289,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -6353,7 +6357,6 @@ void m68000_device::movep_w_das_dd_dpm() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -6375,6 +6378,7 @@ void m68000_device::movep_w_das_dd_dpm() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6442,7 +6446,6 @@ void m68000_device::btst_dd_ais_dpm() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6450,6 +6453,7 @@ void m68000_device::btst_dd_ais_dpm() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6519,7 +6523,6 @@ void m68000_device::btst_dd_aips_dpm() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6527,6 +6530,7 @@ void m68000_device::btst_dd_aips_dpm() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6598,7 +6602,6 @@ void m68000_device::btst_dd_pais_dpm() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6606,6 +6609,7 @@ void m68000_device::btst_dd_pais_dpm() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6696,7 +6700,6 @@ void m68000_device::btst_dd_das_dpm() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6704,6 +6707,7 @@ void m68000_device::btst_dd_das_dpm() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6837,7 +6841,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6845,6 +6848,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -6934,7 +6938,6 @@ void m68000_device::btst_dd_adr16_dpm() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6942,6 +6945,7 @@ void m68000_device::btst_dd_adr16_dpm() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7056,7 +7060,6 @@ void m68000_device::btst_dd_adr32_dpm() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7064,6 +7067,7 @@ void m68000_device::btst_dd_adr32_dpm() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7153,7 +7157,6 @@ void m68000_device::btst_dd_dpc_dpm() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7161,6 +7164,7 @@ void m68000_device::btst_dd_dpc_dpm() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7293,7 +7297,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7301,6 +7304,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7368,7 +7372,6 @@ void m68000_device::btst_dd_imm_dpm() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -7407,6 +7410,7 @@ void m68000_device::btst_dd_imm_dpm() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -7421,6 +7425,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -7443,7 +7448,6 @@ void m68000_device::bchg_dd_ds_dpm() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7484,6 +7488,7 @@ void m68000_device::bchg_dd_ds_dpm() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7503,6 +7508,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7612,7 +7618,6 @@ void m68000_device::movep_l_das_dd_dpm() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -7634,6 +7639,7 @@ void m68000_device::movep_l_das_dd_dpm() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7701,7 +7707,6 @@ void m68000_device::bchg_dd_ais_dpm() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7731,6 +7736,7 @@ void m68000_device::bchg_dd_ais_dpm() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7795,7 +7801,6 @@ void m68000_device::bchg_dd_aips_dpm() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7825,6 +7830,7 @@ void m68000_device::bchg_dd_aips_dpm() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7891,7 +7897,6 @@ void m68000_device::bchg_dd_pais_dpm() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -7921,6 +7926,7 @@ void m68000_device::bchg_dd_pais_dpm() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8006,7 +8012,6 @@ void m68000_device::bchg_dd_das_dpm() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8036,6 +8041,7 @@ void m68000_device::bchg_dd_das_dpm() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8164,7 +8170,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8194,6 +8199,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8278,7 +8284,6 @@ void m68000_device::bchg_dd_adr16_dpm() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8308,6 +8313,7 @@ void m68000_device::bchg_dd_adr16_dpm() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8417,7 +8423,6 @@ void m68000_device::bchg_dd_adr32_dpm() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8447,6 +8452,7 @@ void m68000_device::bchg_dd_adr32_dpm() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -8482,7 +8488,6 @@ void m68000_device::bclr_dd_ds_dpm() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8527,6 +8532,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8550,6 +8556,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8598,7 +8605,6 @@ void m68000_device::movep_w_dd_das_dpm() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -8636,12 +8642,12 @@ void m68000_device::movep_w_dd_das_dpm() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -8706,7 +8712,6 @@ void m68000_device::bclr_dd_ais_dpm() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8740,6 +8745,7 @@ void m68000_device::bclr_dd_ais_dpm() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8804,7 +8810,6 @@ void m68000_device::bclr_dd_aips_dpm() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8838,6 +8843,7 @@ void m68000_device::bclr_dd_aips_dpm() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8904,7 +8910,6 @@ void m68000_device::bclr_dd_pais_dpm() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8938,6 +8943,7 @@ void m68000_device::bclr_dd_pais_dpm() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9023,7 +9029,6 @@ void m68000_device::bclr_dd_das_dpm() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9057,6 +9062,7 @@ void m68000_device::bclr_dd_das_dpm() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9185,7 +9191,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9219,6 +9224,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9303,7 +9309,6 @@ void m68000_device::bclr_dd_adr16_dpm() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9337,6 +9342,7 @@ void m68000_device::bclr_dd_adr16_dpm() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9446,7 +9452,6 @@ void m68000_device::bclr_dd_adr32_dpm() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9480,6 +9485,7 @@ void m68000_device::bclr_dd_adr32_dpm() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -9515,7 +9521,6 @@ void m68000_device::bset_dd_ds_dpm() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -9556,6 +9561,7 @@ void m68000_device::bset_dd_ds_dpm() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9575,6 +9581,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9659,7 +9666,6 @@ void m68000_device::movep_l_dd_das_dpm() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9697,12 +9703,12 @@ void m68000_device::movep_l_dd_das_dpm() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9767,7 +9773,6 @@ void m68000_device::bset_dd_ais_dpm() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9797,6 +9802,7 @@ void m68000_device::bset_dd_ais_dpm() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9861,7 +9867,6 @@ void m68000_device::bset_dd_aips_dpm() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9891,6 +9896,7 @@ void m68000_device::bset_dd_aips_dpm() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9957,7 +9963,6 @@ void m68000_device::bset_dd_pais_dpm() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -9987,6 +9992,7 @@ void m68000_device::bset_dd_pais_dpm() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -10072,7 +10078,6 @@ void m68000_device::bset_dd_das_dpm() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10102,6 +10107,7 @@ void m68000_device::bset_dd_das_dpm() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10230,7 +10236,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10260,6 +10265,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10344,7 +10350,6 @@ void m68000_device::bset_dd_adr16_dpm() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10374,6 +10379,7 @@ void m68000_device::bset_dd_adr16_dpm() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10483,7 +10489,6 @@ void m68000_device::bset_dd_adr32_dpm() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10513,6 +10518,7 @@ void m68000_device::bset_dd_adr32_dpm() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -10574,13 +10580,13 @@ void m68000_device::andi_b_imm8_ds_dpm() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10673,7 +10679,6 @@ void m68000_device::andi_b_imm8_ais_dpm() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10703,6 +10708,7 @@ void m68000_device::andi_b_imm8_ais_dpm() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10792,7 +10798,6 @@ void m68000_device::andi_b_imm8_aips_dpm() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10822,6 +10827,7 @@ void m68000_device::andi_b_imm8_aips_dpm() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10913,7 +10919,6 @@ void m68000_device::andi_b_imm8_pais_dpm() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -10943,6 +10948,7 @@ void m68000_device::andi_b_imm8_pais_dpm() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11053,7 +11059,6 @@ void m68000_device::andi_b_imm8_das_dpm() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11083,6 +11088,7 @@ void m68000_device::andi_b_imm8_das_dpm() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11236,7 +11242,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11266,6 +11271,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11375,7 +11381,6 @@ void m68000_device::andi_b_imm8_adr16_dpm() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11405,6 +11410,7 @@ void m68000_device::andi_b_imm8_adr16_dpm() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11539,7 +11545,6 @@ void m68000_device::andi_b_imm8_adr32_dpm() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11569,6 +11574,7 @@ void m68000_device::andi_b_imm8_adr32_dpm() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -11675,12 +11681,12 @@ void m68000_device::andi_imm8_ccr_dpm() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11747,13 +11753,13 @@ void m68000_device::andi_w_imm16_ds_dpm() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11850,7 +11856,6 @@ void m68000_device::andi_w_imm16_ais_dpm() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -11880,6 +11885,7 @@ void m68000_device::andi_w_imm16_ais_dpm() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11979,7 +11985,6 @@ void m68000_device::andi_w_imm16_aips_dpm() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12009,6 +12014,7 @@ void m68000_device::andi_w_imm16_aips_dpm() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12110,7 +12116,6 @@ void m68000_device::andi_w_imm16_pais_dpm() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12140,6 +12145,7 @@ void m68000_device::andi_w_imm16_pais_dpm() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12260,7 +12266,6 @@ void m68000_device::andi_w_imm16_das_dpm() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12290,6 +12295,7 @@ void m68000_device::andi_w_imm16_das_dpm() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12453,7 +12459,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12483,6 +12488,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12602,7 +12608,6 @@ void m68000_device::andi_w_imm16_adr16_dpm() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12632,6 +12637,7 @@ void m68000_device::andi_w_imm16_adr16_dpm() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12776,7 +12782,6 @@ void m68000_device::andi_w_imm16_adr32_dpm() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -12806,6 +12811,7 @@ void m68000_device::andi_w_imm16_adr32_dpm() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -12924,12 +12930,12 @@ void m68000_device::andi_i16u_sr_dpm() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13021,7 +13027,6 @@ void m68000_device::andi_l_imm32_ds_dpm() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -13057,6 +13062,7 @@ void m68000_device::andi_l_imm32_ds_dpm() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -13182,7 +13188,6 @@ void m68000_device::andi_l_imm32_ais_dpm() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13238,6 +13243,7 @@ void m68000_device::andi_l_imm32_ais_dpm() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13385,7 +13391,6 @@ void m68000_device::andi_l_imm32_aips_dpm() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13441,6 +13446,7 @@ void m68000_device::andi_l_imm32_aips_dpm() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13589,7 +13595,6 @@ void m68000_device::andi_l_imm32_pais_dpm() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13645,6 +13650,7 @@ void m68000_device::andi_l_imm32_pais_dpm() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13813,7 +13819,6 @@ void m68000_device::andi_l_imm32_das_dpm() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -13869,6 +13874,7 @@ void m68000_device::andi_l_imm32_das_dpm() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14080,7 +14086,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14136,6 +14141,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14307,7 +14313,6 @@ void m68000_device::andi_l_imm32_adr16_dpm() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14363,6 +14368,7 @@ void m68000_device::andi_l_imm32_adr16_dpm() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14559,7 +14565,6 @@ void m68000_device::andi_l_imm32_adr32_dpm() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14615,6 +14620,7 @@ void m68000_device::andi_l_imm32_adr32_dpm() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -14680,13 +14686,13 @@ void m68000_device::subi_b_imm8_ds_dpm() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14776,7 +14782,6 @@ void m68000_device::subi_b_imm8_ais_dpm() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14806,6 +14811,7 @@ void m68000_device::subi_b_imm8_ais_dpm() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -14891,7 +14897,6 @@ void m68000_device::subi_b_imm8_aips_dpm() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -14921,6 +14926,7 @@ void m68000_device::subi_b_imm8_aips_dpm() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15008,7 +15014,6 @@ void m68000_device::subi_b_imm8_pais_dpm() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15038,6 +15043,7 @@ void m68000_device::subi_b_imm8_pais_dpm() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15144,7 +15150,6 @@ void m68000_device::subi_b_imm8_das_dpm() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15174,6 +15179,7 @@ void m68000_device::subi_b_imm8_das_dpm() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15321,7 +15327,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15351,6 +15356,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15456,7 +15462,6 @@ void m68000_device::subi_b_imm8_adr16_dpm() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15486,6 +15491,7 @@ void m68000_device::subi_b_imm8_adr16_dpm() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15615,7 +15621,6 @@ void m68000_device::subi_b_imm8_adr32_dpm() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15645,6 +15650,7 @@ void m68000_device::subi_b_imm8_adr32_dpm() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -15703,13 +15709,13 @@ void m68000_device::subi_w_imm16_ds_dpm() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15803,7 +15809,6 @@ void m68000_device::subi_w_imm16_ais_dpm() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15833,6 +15838,7 @@ void m68000_device::subi_w_imm16_ais_dpm() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15928,7 +15934,6 @@ void m68000_device::subi_w_imm16_aips_dpm() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -15958,6 +15963,7 @@ void m68000_device::subi_w_imm16_aips_dpm() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16055,7 +16061,6 @@ void m68000_device::subi_w_imm16_pais_dpm() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16085,6 +16090,7 @@ void m68000_device::subi_w_imm16_pais_dpm() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16201,7 +16207,6 @@ void m68000_device::subi_w_imm16_das_dpm() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16231,6 +16236,7 @@ void m68000_device::subi_w_imm16_das_dpm() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16388,7 +16394,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16418,6 +16423,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16533,7 +16539,6 @@ void m68000_device::subi_w_imm16_adr16_dpm() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16563,6 +16568,7 @@ void m68000_device::subi_w_imm16_adr16_dpm() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16702,7 +16708,6 @@ void m68000_device::subi_w_imm16_adr32_dpm() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -16732,6 +16737,7 @@ void m68000_device::subi_w_imm16_adr32_dpm() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -16820,7 +16826,6 @@ void m68000_device::subi_l_imm32_ds_dpm() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -16855,6 +16860,7 @@ void m68000_device::subi_l_imm32_ds_dpm() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -16976,7 +16982,6 @@ void m68000_device::subi_l_imm32_ais_dpm() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17032,6 +17037,7 @@ void m68000_device::subi_l_imm32_ais_dpm() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17174,7 +17180,6 @@ void m68000_device::subi_l_imm32_aips_dpm() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17230,6 +17235,7 @@ void m68000_device::subi_l_imm32_aips_dpm() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17373,7 +17379,6 @@ void m68000_device::subi_l_imm32_pais_dpm() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17429,6 +17434,7 @@ void m68000_device::subi_l_imm32_pais_dpm() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17592,7 +17598,6 @@ void m68000_device::subi_l_imm32_das_dpm() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17648,6 +17653,7 @@ void m68000_device::subi_l_imm32_das_dpm() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -17852,7 +17858,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -17908,6 +17913,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18073,7 +18079,6 @@ void m68000_device::subi_l_imm32_adr16_dpm() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18129,6 +18134,7 @@ void m68000_device::subi_l_imm32_adr16_dpm() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18318,7 +18324,6 @@ void m68000_device::subi_l_imm32_adr32_dpm() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18374,6 +18379,7 @@ void m68000_device::subi_l_imm32_adr32_dpm() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -18438,13 +18444,13 @@ void m68000_device::addi_b_imm8_ds_dpm() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18534,7 +18540,6 @@ void m68000_device::addi_b_imm8_ais_dpm() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18564,6 +18569,7 @@ void m68000_device::addi_b_imm8_ais_dpm() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18649,7 +18655,6 @@ void m68000_device::addi_b_imm8_aips_dpm() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18679,6 +18684,7 @@ void m68000_device::addi_b_imm8_aips_dpm() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18766,7 +18772,6 @@ void m68000_device::addi_b_imm8_pais_dpm() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18796,6 +18801,7 @@ void m68000_device::addi_b_imm8_pais_dpm() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18902,7 +18908,6 @@ void m68000_device::addi_b_imm8_das_dpm() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -18932,6 +18937,7 @@ void m68000_device::addi_b_imm8_das_dpm() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19079,7 +19085,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19109,6 +19114,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19214,7 +19220,6 @@ void m68000_device::addi_b_imm8_adr16_dpm() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19244,6 +19249,7 @@ void m68000_device::addi_b_imm8_adr16_dpm() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19373,7 +19379,6 @@ void m68000_device::addi_b_imm8_adr32_dpm() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19403,6 +19408,7 @@ void m68000_device::addi_b_imm8_adr32_dpm() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -19461,13 +19467,13 @@ void m68000_device::addi_w_imm16_ds_dpm() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19561,7 +19567,6 @@ void m68000_device::addi_w_imm16_ais_dpm() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19591,6 +19596,7 @@ void m68000_device::addi_w_imm16_ais_dpm() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19686,7 +19692,6 @@ void m68000_device::addi_w_imm16_aips_dpm() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19716,6 +19721,7 @@ void m68000_device::addi_w_imm16_aips_dpm() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19813,7 +19819,6 @@ void m68000_device::addi_w_imm16_pais_dpm() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19843,6 +19848,7 @@ void m68000_device::addi_w_imm16_pais_dpm() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19959,7 +19965,6 @@ void m68000_device::addi_w_imm16_das_dpm() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -19989,6 +19994,7 @@ void m68000_device::addi_w_imm16_das_dpm() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20146,7 +20152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20176,6 +20181,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20291,7 +20297,6 @@ void m68000_device::addi_w_imm16_adr16_dpm() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20321,6 +20326,7 @@ void m68000_device::addi_w_imm16_adr16_dpm() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20460,7 +20466,6 @@ void m68000_device::addi_w_imm16_adr32_dpm() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20490,6 +20495,7 @@ void m68000_device::addi_w_imm16_adr32_dpm() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -20578,7 +20584,6 @@ void m68000_device::addi_l_imm32_ds_dpm() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -20613,6 +20618,7 @@ void m68000_device::addi_l_imm32_ds_dpm() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -20734,7 +20740,6 @@ void m68000_device::addi_l_imm32_ais_dpm() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20790,6 +20795,7 @@ void m68000_device::addi_l_imm32_ais_dpm() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -20932,7 +20938,6 @@ void m68000_device::addi_l_imm32_aips_dpm() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -20988,6 +20993,7 @@ void m68000_device::addi_l_imm32_aips_dpm() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21131,7 +21137,6 @@ void m68000_device::addi_l_imm32_pais_dpm() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21187,6 +21192,7 @@ void m68000_device::addi_l_imm32_pais_dpm() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21350,7 +21356,6 @@ void m68000_device::addi_l_imm32_das_dpm() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21406,6 +21411,7 @@ void m68000_device::addi_l_imm32_das_dpm() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21610,7 +21616,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21666,6 +21671,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21831,7 +21837,6 @@ void m68000_device::addi_l_imm32_adr16_dpm() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -21887,6 +21892,7 @@ void m68000_device::addi_l_imm32_adr16_dpm() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -22076,7 +22082,6 @@ void m68000_device::addi_l_imm32_adr32_dpm() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22132,6 +22137,7 @@ void m68000_device::addi_l_imm32_adr32_dpm() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -22197,7 +22203,6 @@ void m68000_device::btst_imm8_ds_dpm() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22238,6 +22243,7 @@ void m68000_device::btst_imm8_ds_dpm() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22252,6 +22258,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -22324,7 +22331,6 @@ void m68000_device::btst_imm8_ais_dpm() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22332,6 +22338,7 @@ void m68000_device::btst_imm8_ais_dpm() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22427,7 +22434,6 @@ void m68000_device::btst_imm8_aips_dpm() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22435,6 +22441,7 @@ void m68000_device::btst_imm8_aips_dpm() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22532,7 +22539,6 @@ void m68000_device::btst_imm8_pais_dpm() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22540,6 +22546,7 @@ void m68000_device::btst_imm8_pais_dpm() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22656,7 +22663,6 @@ void m68000_device::btst_imm8_das_dpm() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22664,6 +22670,7 @@ void m68000_device::btst_imm8_das_dpm() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22823,7 +22830,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22831,6 +22837,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -22946,7 +22953,6 @@ void m68000_device::btst_imm8_adr16_dpm() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22954,6 +22960,7 @@ void m68000_device::btst_imm8_adr16_dpm() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23094,7 +23101,6 @@ void m68000_device::btst_imm8_adr32_dpm() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23102,6 +23108,7 @@ void m68000_device::btst_imm8_adr32_dpm() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23217,7 +23224,6 @@ void m68000_device::btst_imm8_dpc_dpm() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23225,6 +23231,7 @@ void m68000_device::btst_imm8_dpc_dpm() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23383,7 +23390,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23391,6 +23397,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23457,7 +23464,6 @@ void m68000_device::bchg_imm8_ds_dpm() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -23498,6 +23504,7 @@ void m68000_device::bchg_imm8_ds_dpm() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23517,6 +23524,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23590,7 +23598,6 @@ void m68000_device::bchg_imm8_ais_dpm() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23620,6 +23627,7 @@ void m68000_device::bchg_imm8_ais_dpm() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23710,7 +23718,6 @@ void m68000_device::bchg_imm8_aips_dpm() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23740,6 +23747,7 @@ void m68000_device::bchg_imm8_aips_dpm() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23832,7 +23840,6 @@ void m68000_device::bchg_imm8_pais_dpm() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -23862,6 +23869,7 @@ void m68000_device::bchg_imm8_pais_dpm() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23973,7 +23981,6 @@ void m68000_device::bchg_imm8_das_dpm() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24003,6 +24010,7 @@ void m68000_device::bchg_imm8_das_dpm() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24157,7 +24165,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24187,6 +24194,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24297,7 +24305,6 @@ void m68000_device::bchg_imm8_adr16_dpm() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24327,6 +24334,7 @@ void m68000_device::bchg_imm8_adr16_dpm() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24462,7 +24470,6 @@ void m68000_device::bchg_imm8_adr32_dpm() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -24492,6 +24499,7 @@ void m68000_device::bchg_imm8_adr32_dpm() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -24553,7 +24561,6 @@ void m68000_device::bclr_imm8_ds_dpm() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -24598,6 +24605,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24621,6 +24629,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24694,7 +24703,6 @@ void m68000_device::bclr_imm8_ais_dpm() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24728,6 +24736,7 @@ void m68000_device::bclr_imm8_ais_dpm() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24818,7 +24827,6 @@ void m68000_device::bclr_imm8_aips_dpm() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24852,6 +24860,7 @@ void m68000_device::bclr_imm8_aips_dpm() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24944,7 +24953,6 @@ void m68000_device::bclr_imm8_pais_dpm() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24978,6 +24986,7 @@ void m68000_device::bclr_imm8_pais_dpm() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25089,7 +25098,6 @@ void m68000_device::bclr_imm8_das_dpm() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25123,6 +25131,7 @@ void m68000_device::bclr_imm8_das_dpm() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25277,7 +25286,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25311,6 +25319,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25421,7 +25430,6 @@ void m68000_device::bclr_imm8_adr16_dpm() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25455,6 +25463,7 @@ void m68000_device::bclr_imm8_adr16_dpm() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25590,7 +25599,6 @@ void m68000_device::bclr_imm8_adr32_dpm() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25624,6 +25632,7 @@ void m68000_device::bclr_imm8_adr32_dpm() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -25685,7 +25694,6 @@ void m68000_device::bset_imm8_ds_dpm() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -25726,6 +25734,7 @@ void m68000_device::bset_imm8_ds_dpm() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25745,6 +25754,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25818,7 +25828,6 @@ void m68000_device::bset_imm8_ais_dpm() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -25848,6 +25857,7 @@ void m68000_device::bset_imm8_ais_dpm() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25938,7 +25948,6 @@ void m68000_device::bset_imm8_aips_dpm() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -25968,6 +25977,7 @@ void m68000_device::bset_imm8_aips_dpm() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26060,7 +26070,6 @@ void m68000_device::bset_imm8_pais_dpm() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26090,6 +26099,7 @@ void m68000_device::bset_imm8_pais_dpm() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26201,7 +26211,6 @@ void m68000_device::bset_imm8_das_dpm() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26231,6 +26240,7 @@ void m68000_device::bset_imm8_das_dpm() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26385,7 +26395,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26415,146 +26424,147 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; - set_8xl(m_dbout, m_aluo); - m_base_ssw = SSW_DATA; - [[fallthrough]]; case 9: - m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 9; - } else - m_inst_substate = 10; - return; - } - [[fallthrough]]; case 10: - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 - alu_and8(m_alub, 1 << (m_dcr & 7)); - sr_z(); - set_ftu_const(); - m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; - m_inst_substate = 0; - if(m_sr & SR_T) - m_next_state = S_TRACE; - return; - } -} - -void m68000_device::bset_imm8_adr16_dpm() // 08f8 ffff -{ - switch(m_inst_substate) { - case 0: - // 2b9 o#w1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 1: - m_edb = m_opcodes.read_interruptible(m_aob & ~1); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 1; - } else - m_inst_substate = 2; - return; - } - [[fallthrough]]; case 2: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - set_16l(m_dt, m_dbin); - m_irc = m_edb; - m_au = m_au + 2; - m_dbin = m_edb; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none - // 00a abwl1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 3: - m_edb = m_opcodes.read_interruptible(m_aob & ~1); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 3; - } else - m_inst_substate = 4; - return; - } - [[fallthrough]]; case 4: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - m_dcr = m_dt; - m_at = ext32(m_dbin); - m_irc = m_edb; - m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin - alu_or8(m_dt, m_dbin); - m_dbin = m_edb; - // 004 abll3 - m_aob = m_at; - m_base_ssw = SSW_DATA | SSW_R; - [[fallthrough]]; case 5: - m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); - if(!(m_aob & 1)) - m_edb >>= 8; - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 5; - } else - m_inst_substate = 6; - return; - } - [[fallthrough]]; case 6: - m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 - alu_and8(m_dbin, 0xffff); - m_dbin = m_edb; - // 081 bcsm1 - m_aob = m_au; - m_ir = m_irc; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 7: - m_edb = m_opcodes.read_interruptible(m_aob & ~1); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 7; - } else - m_inst_substate = 8; - return; - } - [[fallthrough]]; case 8: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_alub = m_dbin; - m_pc = m_au; - m_irc = m_edb; - m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 - alu_or8(m_dbin, 1 << (m_dcr & 7)); - m_dbin = m_edb; - // 082 bcsm2 - m_aob = m_at; - m_ird = m_ir; + set_8xl(m_dbout, m_aluo); + m_base_ssw = SSW_DATA; + [[fallthrough]]; case 9: + m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 9; + } else + m_inst_substate = 10; + return; + } + [[fallthrough]]; case 10: + // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + alu_and8(m_alub, 1 << (m_dcr & 7)); + sr_z(); + set_ftu_const(); + m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; + m_inst_substate = 0; + if(m_sr & SR_T) + m_next_state = S_TRACE; + return; + } +} + +void m68000_device::bset_imm8_adr16_dpm() // 08f8 ffff +{ + switch(m_inst_substate) { + case 0: + // 2b9 o#w1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 1: + m_edb = m_opcodes.read_interruptible(m_aob & ~1); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 1; + } else + m_inst_substate = 2; + return; + } + [[fallthrough]]; case 2: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + set_16l(m_dt, m_dbin); + m_irc = m_edb; + m_au = m_au + 2; + m_dbin = m_edb; + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // 00a abwl1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 3: + m_edb = m_opcodes.read_interruptible(m_aob & ~1); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 3; + } else + m_inst_substate = 4; + return; + } + [[fallthrough]]; case 4: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + m_dcr = m_dt; + m_at = ext32(m_dbin); + m_irc = m_edb; + m_au = ext32(m_dbin); + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + alu_or8(m_dt, m_dbin); + m_dbin = m_edb; + // 004 abll3 + m_aob = m_at; + m_base_ssw = SSW_DATA | SSW_R; + [[fallthrough]]; case 5: + m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); + if(!(m_aob & 1)) + m_edb >>= 8; + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 5; + } else + m_inst_substate = 6; + return; + } + [[fallthrough]]; case 6: + m_au = m_pc + 2; + // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + alu_and8(m_dbin, 0xffff); + m_dbin = m_edb; + // 081 bcsm1 + m_aob = m_au; + m_ir = m_irc; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 7: + m_edb = m_opcodes.read_interruptible(m_aob & ~1); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 7; + } else + m_inst_substate = 8; + return; + } + [[fallthrough]]; case 8: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_alub = m_dbin; + m_pc = m_au; + m_irc = m_edb; + m_au = m_au + 2; + // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + alu_or8(m_dbin, 1 << (m_dcr & 7)); + m_dbin = m_edb; + // 082 bcsm2 + m_aob = m_at; + m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26690,7 +26700,6 @@ void m68000_device::bset_imm8_adr32_dpm() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26720,6 +26729,7 @@ void m68000_device::bset_imm8_adr32_dpm() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -26781,13 +26791,13 @@ void m68000_device::eori_b_imm8_ds_dpm() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26880,7 +26890,6 @@ void m68000_device::eori_b_imm8_ais_dpm() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -26910,6 +26919,7 @@ void m68000_device::eori_b_imm8_ais_dpm() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26999,7 +27009,6 @@ void m68000_device::eori_b_imm8_aips_dpm() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27029,6 +27038,7 @@ void m68000_device::eori_b_imm8_aips_dpm() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27120,7 +27130,6 @@ void m68000_device::eori_b_imm8_pais_dpm() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27150,6 +27159,7 @@ void m68000_device::eori_b_imm8_pais_dpm() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27260,7 +27270,6 @@ void m68000_device::eori_b_imm8_das_dpm() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27290,6 +27299,7 @@ void m68000_device::eori_b_imm8_das_dpm() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27443,7 +27453,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27473,6 +27482,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27582,7 +27592,6 @@ void m68000_device::eori_b_imm8_adr16_dpm() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27612,6 +27621,7 @@ void m68000_device::eori_b_imm8_adr16_dpm() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27746,7 +27756,6 @@ void m68000_device::eori_b_imm8_adr32_dpm() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27776,6 +27785,7 @@ void m68000_device::eori_b_imm8_adr32_dpm() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -27882,12 +27892,12 @@ void m68000_device::eori_imm8_ccr_dpm() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -27954,13 +27964,13 @@ void m68000_device::eori_w_imm16_ds_dpm() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28057,7 +28067,6 @@ void m68000_device::eori_w_imm16_ais_dpm() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28087,6 +28096,7 @@ void m68000_device::eori_w_imm16_ais_dpm() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28186,7 +28196,6 @@ void m68000_device::eori_w_imm16_aips_dpm() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28216,6 +28225,7 @@ void m68000_device::eori_w_imm16_aips_dpm() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28317,7 +28327,6 @@ void m68000_device::eori_w_imm16_pais_dpm() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28347,6 +28356,7 @@ void m68000_device::eori_w_imm16_pais_dpm() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28467,7 +28477,6 @@ void m68000_device::eori_w_imm16_das_dpm() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28497,6 +28506,7 @@ void m68000_device::eori_w_imm16_das_dpm() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28660,7 +28670,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28690,6 +28699,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28809,7 +28819,6 @@ void m68000_device::eori_w_imm16_adr16_dpm() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -28839,6 +28848,7 @@ void m68000_device::eori_w_imm16_adr16_dpm() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28983,7 +28993,6 @@ void m68000_device::eori_w_imm16_adr32_dpm() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29013,6 +29022,7 @@ void m68000_device::eori_w_imm16_adr32_dpm() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -29131,12 +29141,12 @@ void m68000_device::eori_i16u_sr_dpm() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29228,7 +29238,6 @@ void m68000_device::eori_l_imm32_ds_dpm() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -29264,6 +29273,7 @@ void m68000_device::eori_l_imm32_ds_dpm() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -29389,7 +29399,6 @@ void m68000_device::eori_l_imm32_ais_dpm() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29445,6 +29454,7 @@ void m68000_device::eori_l_imm32_ais_dpm() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29592,7 +29602,6 @@ void m68000_device::eori_l_imm32_aips_dpm() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29648,6 +29657,7 @@ void m68000_device::eori_l_imm32_aips_dpm() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29796,7 +29806,6 @@ void m68000_device::eori_l_imm32_pais_dpm() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -29852,6 +29861,7 @@ void m68000_device::eori_l_imm32_pais_dpm() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -30020,7 +30030,6 @@ void m68000_device::eori_l_imm32_das_dpm() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30076,6 +30085,7 @@ void m68000_device::eori_l_imm32_das_dpm() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30287,7 +30297,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30343,6 +30352,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30514,7 +30524,6 @@ void m68000_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30570,6 +30579,7 @@ void m68000_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30766,7 +30776,6 @@ void m68000_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30822,6 +30831,7 @@ void m68000_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -30887,13 +30897,13 @@ void m68000_device::cmpi_b_imm8_ds_dpm() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -30982,7 +30992,6 @@ void m68000_device::cmpi_b_imm8_ais_dpm() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -30990,6 +30999,7 @@ void m68000_device::cmpi_b_imm8_ais_dpm() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31081,7 +31091,6 @@ void m68000_device::cmpi_b_imm8_aips_dpm() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31089,6 +31098,7 @@ void m68000_device::cmpi_b_imm8_aips_dpm() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31182,7 +31192,6 @@ void m68000_device::cmpi_b_imm8_pais_dpm() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31190,6 +31199,7 @@ void m68000_device::cmpi_b_imm8_pais_dpm() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31302,7 +31312,6 @@ void m68000_device::cmpi_b_imm8_das_dpm() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31310,6 +31319,7 @@ void m68000_device::cmpi_b_imm8_das_dpm() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31463,7 +31473,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31471,6 +31480,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31582,7 +31592,6 @@ void m68000_device::cmpi_b_imm8_adr16_dpm() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31590,6 +31599,7 @@ void m68000_device::cmpi_b_imm8_adr16_dpm() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31725,7 +31735,6 @@ void m68000_device::cmpi_b_imm8_adr32_dpm() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31733,6 +31742,7 @@ void m68000_device::cmpi_b_imm8_adr32_dpm() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31797,13 +31807,13 @@ void m68000_device::cmpi_w_imm16_ds_dpm() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31896,7 +31906,6 @@ void m68000_device::cmpi_w_imm16_ais_dpm() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31904,6 +31913,7 @@ void m68000_device::cmpi_w_imm16_ais_dpm() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -31999,7 +32009,6 @@ void m68000_device::cmpi_w_imm16_aips_dpm() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32007,6 +32016,7 @@ void m68000_device::cmpi_w_imm16_aips_dpm() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32104,7 +32114,6 @@ void m68000_device::cmpi_w_imm16_pais_dpm() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32112,6 +32121,7 @@ void m68000_device::cmpi_w_imm16_pais_dpm() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32228,7 +32238,6 @@ void m68000_device::cmpi_w_imm16_das_dpm() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32236,6 +32245,7 @@ void m68000_device::cmpi_w_imm16_das_dpm() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32393,7 +32403,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32401,6 +32410,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32516,7 +32526,6 @@ void m68000_device::cmpi_w_imm16_adr16_dpm() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32524,6 +32533,7 @@ void m68000_device::cmpi_w_imm16_adr16_dpm() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32663,7 +32673,6 @@ void m68000_device::cmpi_w_imm16_adr32_dpm() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32671,6 +32680,7 @@ void m68000_device::cmpi_w_imm16_adr32_dpm() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -32760,7 +32770,6 @@ void m68000_device::cmpi_l_imm32_ds_dpm() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -32792,6 +32801,7 @@ void m68000_device::cmpi_l_imm32_ds_dpm() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -32912,7 +32922,6 @@ void m68000_device::cmpi_l_imm32_ais_dpm() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32920,6 +32929,7 @@ void m68000_device::cmpi_l_imm32_ais_dpm() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33065,7 +33075,6 @@ void m68000_device::cmpi_l_imm32_aips_dpm() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33073,6 +33082,7 @@ void m68000_device::cmpi_l_imm32_aips_dpm() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33219,7 +33229,6 @@ void m68000_device::cmpi_l_imm32_pais_dpm() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33227,6 +33236,7 @@ void m68000_device::cmpi_l_imm32_pais_dpm() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33393,7 +33403,6 @@ void m68000_device::cmpi_l_imm32_das_dpm() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33401,6 +33410,7 @@ void m68000_device::cmpi_l_imm32_das_dpm() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33608,7 +33618,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33616,6 +33625,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33784,7 +33794,6 @@ void m68000_device::cmpi_l_imm32_adr16_dpm() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33792,6 +33801,7 @@ void m68000_device::cmpi_l_imm32_adr16_dpm() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -33984,7 +33994,6 @@ void m68000_device::cmpi_l_imm32_adr32_dpm() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33992,6 +34001,7 @@ void m68000_device::cmpi_l_imm32_adr32_dpm() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34034,7 +34044,6 @@ void m68000_device::move_b_ds_dd_dpm() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -34043,6 +34052,7 @@ void m68000_device::move_b_ds_dd_dpm() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34107,7 +34117,6 @@ void m68000_device::move_b_ais_dd_dpm() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34116,6 +34125,7 @@ void m68000_device::move_b_ais_dd_dpm() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34182,7 +34192,6 @@ void m68000_device::move_b_aips_dd_dpm() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34191,6 +34200,7 @@ void m68000_device::move_b_aips_dd_dpm() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34259,7 +34269,6 @@ void m68000_device::move_b_pais_dd_dpm() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34268,6 +34277,7 @@ void m68000_device::move_b_pais_dd_dpm() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34355,7 +34365,6 @@ void m68000_device::move_b_das_dd_dpm() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34364,6 +34373,7 @@ void m68000_device::move_b_das_dd_dpm() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34492,7 +34502,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34501,6 +34510,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34587,7 +34597,6 @@ void m68000_device::move_b_adr16_dd_dpm() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34596,6 +34605,7 @@ void m68000_device::move_b_adr16_dd_dpm() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34706,7 +34716,6 @@ void m68000_device::move_b_adr32_dd_dpm() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34715,6 +34724,7 @@ void m68000_device::move_b_adr32_dd_dpm() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34801,7 +34811,6 @@ void m68000_device::move_b_dpc_dd_dpm() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34810,6 +34819,7 @@ void m68000_device::move_b_dpc_dd_dpm() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -34937,7 +34947,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34946,6 +34955,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35011,7 +35021,6 @@ void m68000_device::move_b_imm8_dd_dpm() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -35020,6 +35029,7 @@ void m68000_device::move_b_imm8_dd_dpm() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35061,7 +35071,6 @@ void m68000_device::move_b_ds_aid_dpm() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -35084,10 +35093,10 @@ void m68000_device::move_b_ds_aid_dpm() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35171,10 +35180,10 @@ void m68000_device::move_b_ais_aid_dpm() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35262,10 +35271,10 @@ void m68000_device::move_b_aips_aid_dpm() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35355,10 +35364,10 @@ void m68000_device::move_b_pais_aid_dpm() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35467,10 +35476,10 @@ void m68000_device::move_b_das_aid_dpm() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35620,10 +35629,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35731,10 +35740,10 @@ void m68000_device::move_b_adr16_aid_dpm() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35866,10 +35875,10 @@ void m68000_device::move_b_adr32_aid_dpm() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -35977,10 +35986,10 @@ void m68000_device::move_b_dpc_aid_dpm() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36129,10 +36138,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36198,7 +36207,6 @@ void m68000_device::move_b_imm8_aid_dpm() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36221,10 +36229,10 @@ void m68000_device::move_b_imm8_aid_dpm() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36264,7 +36272,6 @@ void m68000_device::move_b_ds_aipd_dpm() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -36287,6 +36294,7 @@ void m68000_device::move_b_ds_aipd_dpm() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36351,7 +36359,6 @@ void m68000_device::move_b_ais_aipd_dpm() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36374,6 +36381,7 @@ void m68000_device::move_b_ais_aipd_dpm() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36442,7 +36450,6 @@ void m68000_device::move_b_aips_aipd_dpm() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36465,6 +36472,7 @@ void m68000_device::move_b_aips_aipd_dpm() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36535,7 +36543,6 @@ void m68000_device::move_b_pais_aipd_dpm() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36558,6 +36565,7 @@ void m68000_device::move_b_pais_aipd_dpm() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36647,7 +36655,6 @@ void m68000_device::move_b_das_aipd_dpm() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36670,6 +36677,7 @@ void m68000_device::move_b_das_aipd_dpm() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36800,7 +36808,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36823,6 +36830,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -36911,7 +36919,6 @@ void m68000_device::move_b_adr16_aipd_dpm() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36934,6 +36941,7 @@ void m68000_device::move_b_adr16_aipd_dpm() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37046,7 +37054,6 @@ void m68000_device::move_b_adr32_aipd_dpm() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37069,6 +37076,7 @@ void m68000_device::move_b_adr32_aipd_dpm() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37157,7 +37165,6 @@ void m68000_device::move_b_dpc_aipd_dpm() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37180,6 +37187,7 @@ void m68000_device::move_b_dpc_aipd_dpm() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37309,7 +37317,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37332,6 +37339,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37399,7 +37407,6 @@ void m68000_device::move_b_imm8_aipd_dpm() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37422,6 +37429,7 @@ void m68000_device::move_b_imm8_aipd_dpm() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37463,7 +37471,6 @@ void m68000_device::move_b_ds_paid_dpm() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37493,6 +37500,7 @@ void m68000_device::move_b_ds_paid_dpm() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37550,7 +37558,6 @@ void m68000_device::move_b_ais_paid_dpm() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37580,6 +37587,7 @@ void m68000_device::move_b_ais_paid_dpm() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37641,7 +37649,6 @@ void m68000_device::move_b_aips_paid_dpm() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37671,6 +37678,7 @@ void m68000_device::move_b_aips_paid_dpm() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37734,7 +37742,6 @@ void m68000_device::move_b_pais_paid_dpm() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37764,6 +37771,7 @@ void m68000_device::move_b_pais_paid_dpm() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37846,7 +37854,6 @@ void m68000_device::move_b_das_paid_dpm() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -37876,6 +37883,7 @@ void m68000_device::move_b_das_paid_dpm() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37999,7 +38007,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38029,6 +38036,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38110,7 +38118,6 @@ void m68000_device::move_b_adr16_paid_dpm() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38140,6 +38147,7 @@ void m68000_device::move_b_adr16_paid_dpm() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38245,7 +38253,6 @@ void m68000_device::move_b_adr32_paid_dpm() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38275,6 +38282,7 @@ void m68000_device::move_b_adr32_paid_dpm() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -38356,7 +38364,6 @@ void m68000_device::move_b_dpc_paid_dpm() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38386,6 +38393,7 @@ void m68000_device::move_b_dpc_paid_dpm() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38508,7 +38516,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38538,6 +38545,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38598,7 +38606,6 @@ void m68000_device::move_b_imm8_paid_dpm() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38628,6 +38635,7 @@ void m68000_device::move_b_imm8_paid_dpm() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38686,7 +38694,6 @@ void m68000_device::move_b_ds_dad_dpm() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -38708,11 +38715,11 @@ void m68000_device::move_b_ds_dad_dpm() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38802,6 +38809,7 @@ void m68000_device::move_b_ais_dad_dpm() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38823,11 +38831,11 @@ void m68000_device::move_b_ais_dad_dpm() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -38921,6 +38929,7 @@ void m68000_device::move_b_aips_dad_dpm() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38942,11 +38951,11 @@ void m68000_device::move_b_aips_dad_dpm() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39042,6 +39051,7 @@ void m68000_device::move_b_pais_dad_dpm() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -39063,11 +39073,11 @@ void m68000_device::move_b_pais_dad_dpm() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39182,6 +39192,7 @@ void m68000_device::move_b_das_dad_dpm() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39203,11 +39214,11 @@ void m68000_device::move_b_das_dad_dpm() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39363,6 +39374,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39384,11 +39396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39502,6 +39514,7 @@ void m68000_device::move_b_adr16_dad_dpm() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39523,11 +39536,11 @@ void m68000_device::move_b_adr16_dad_dpm() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39665,6 +39678,7 @@ void m68000_device::move_b_adr32_dad_dpm() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -39686,11 +39700,11 @@ void m68000_device::move_b_adr32_dad_dpm() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39804,6 +39818,7 @@ void m68000_device::move_b_dpc_dad_dpm() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39825,11 +39840,11 @@ void m68000_device::move_b_dpc_dad_dpm() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -39984,6 +39999,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40005,11 +40021,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40099,7 +40115,6 @@ void m68000_device::move_b_imm8_dad_dpm() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40121,11 +40136,11 @@ void m68000_device::move_b_imm8_dad_dpm() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40231,7 +40246,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -40253,11 +40267,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40388,6 +40402,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40409,11 +40424,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40548,6 +40563,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40569,11 +40585,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40710,6 +40726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40731,11 +40748,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -40891,6 +40908,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40912,11 +40930,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41113,6 +41131,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41134,11 +41153,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41293,6 +41312,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41314,11 +41334,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41497,6 +41517,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -41518,11 +41539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41677,6 +41698,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41698,11 +41720,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -41898,6 +41920,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41919,11 +41942,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42055,7 +42078,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42077,11 +42099,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42148,6 +42170,7 @@ void m68000_device::move_b_ds_adr16_dpm() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -42169,11 +42192,11 @@ void m68000_device::move_b_ds_adr16_dpm() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42262,6 +42285,7 @@ void m68000_device::move_b_ais_adr16_dpm() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42283,11 +42307,11 @@ void m68000_device::move_b_ais_adr16_dpm() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42380,6 +42404,7 @@ void m68000_device::move_b_aips_adr16_dpm() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42401,11 +42426,11 @@ void m68000_device::move_b_aips_adr16_dpm() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42500,6 +42525,7 @@ void m68000_device::move_b_pais_adr16_dpm() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42521,11 +42547,11 @@ void m68000_device::move_b_pais_adr16_dpm() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42639,6 +42665,7 @@ void m68000_device::move_b_das_adr16_dpm() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42660,11 +42687,11 @@ void m68000_device::move_b_das_adr16_dpm() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42819,6 +42846,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42840,11 +42868,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -42957,6 +42985,7 @@ void m68000_device::move_b_adr16_adr16_dpm() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42978,11 +43007,11 @@ void m68000_device::move_b_adr16_adr16_dpm() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43119,6 +43148,7 @@ void m68000_device::move_b_adr32_adr16_dpm() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -43140,11 +43170,11 @@ void m68000_device::move_b_adr32_adr16_dpm() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43257,6 +43287,7 @@ void m68000_device::move_b_dpc_adr16_dpm() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43278,11 +43309,11 @@ void m68000_device::move_b_dpc_adr16_dpm() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43436,6 +43467,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43457,11 +43489,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43554,6 +43586,7 @@ void m68000_device::move_b_imm8_adr16_dpm() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43575,11 +43608,11 @@ void m68000_device::move_b_imm8_adr16_dpm() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43670,6 +43703,7 @@ void m68000_device::move_b_ds_adr32_dpm() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43691,11 +43725,11 @@ void m68000_device::move_b_ds_adr32_dpm() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43784,7 +43818,6 @@ void m68000_device::move_b_ais_adr32_dpm() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43830,11 +43863,11 @@ void m68000_device::move_b_ais_adr32_dpm() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -43927,7 +43960,6 @@ void m68000_device::move_b_aips_adr32_dpm() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43973,11 +44005,11 @@ void m68000_device::move_b_aips_adr32_dpm() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44072,7 +44104,6 @@ void m68000_device::move_b_pais_adr32_dpm() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -44118,11 +44149,11 @@ void m68000_device::move_b_pais_adr32_dpm() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44236,7 +44267,6 @@ void m68000_device::move_b_das_adr32_dpm() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44282,11 +44312,11 @@ void m68000_device::move_b_das_adr32_dpm() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44441,7 +44471,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44487,11 +44516,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44604,7 +44633,6 @@ void m68000_device::move_b_adr16_adr32_dpm() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44650,11 +44678,11 @@ void m68000_device::move_b_adr16_adr32_dpm() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44791,7 +44819,6 @@ void m68000_device::move_b_adr32_adr32_dpm() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -44837,11 +44864,11 @@ void m68000_device::move_b_adr32_adr32_dpm() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -44954,7 +44981,6 @@ void m68000_device::move_b_dpc_adr32_dpm() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45000,11 +45026,11 @@ void m68000_device::move_b_dpc_adr32_dpm() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45158,7 +45184,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45204,11 +45229,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45325,6 +45350,7 @@ void m68000_device::move_b_imm8_adr32_dpm() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45346,11 +45372,11 @@ void m68000_device::move_b_imm8_adr32_dpm() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45390,7 +45416,6 @@ void m68000_device::move_l_ds_dd_dpm() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45399,6 +45424,7 @@ void m68000_device::move_l_ds_dd_dpm() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45442,7 +45468,6 @@ void m68000_device::move_l_as_dd_dpm() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45451,6 +45476,7 @@ void m68000_device::move_l_as_dd_dpm() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45545,7 +45571,6 @@ void m68000_device::move_l_ais_dd_dpm() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45554,6 +45579,7 @@ void m68000_device::move_l_ais_dd_dpm() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45651,7 +45677,6 @@ void m68000_device::move_l_aips_dd_dpm() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45660,6 +45685,7 @@ void m68000_device::move_l_aips_dd_dpm() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45758,7 +45784,6 @@ void m68000_device::move_l_pais_dd_dpm() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45767,6 +45792,7 @@ void m68000_device::move_l_pais_dd_dpm() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -45885,7 +45911,6 @@ void m68000_device::move_l_das_dd_dpm() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45894,6 +45919,7 @@ void m68000_device::move_l_das_dd_dpm() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46053,7 +46079,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46062,6 +46087,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46182,7 +46208,6 @@ void m68000_device::move_l_adr16_dd_dpm() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46191,6 +46216,7 @@ void m68000_device::move_l_adr16_dd_dpm() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46335,7 +46361,6 @@ void m68000_device::move_l_adr32_dd_dpm() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46344,6 +46369,7 @@ void m68000_device::move_l_adr32_dd_dpm() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46461,7 +46487,6 @@ void m68000_device::move_l_dpc_dd_dpm() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46470,6 +46495,7 @@ void m68000_device::move_l_dpc_dd_dpm() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46628,7 +46654,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46637,6 +46662,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46730,7 +46756,6 @@ void m68000_device::move_l_imm32_dd_dpm() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -46739,6 +46764,7 @@ void m68000_device::move_l_imm32_dd_dpm() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46782,7 +46808,6 @@ void m68000_device::movea_l_ds_ad_dpm() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46790,6 +46815,7 @@ void m68000_device::movea_l_ds_ad_dpm() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46832,7 +46858,6 @@ void m68000_device::movea_l_as_ad_dpm() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46840,6 +46865,7 @@ void m68000_device::movea_l_as_ad_dpm() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -46933,7 +46959,6 @@ void m68000_device::movea_l_ais_ad_dpm() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46941,6 +46966,7 @@ void m68000_device::movea_l_ais_ad_dpm() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47037,7 +47063,6 @@ void m68000_device::movea_l_aips_ad_dpm() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47045,6 +47070,7 @@ void m68000_device::movea_l_aips_ad_dpm() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47142,7 +47168,6 @@ void m68000_device::movea_l_pais_ad_dpm() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47150,6 +47175,7 @@ void m68000_device::movea_l_pais_ad_dpm() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47267,7 +47293,6 @@ void m68000_device::movea_l_das_ad_dpm() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47275,6 +47300,7 @@ void m68000_device::movea_l_das_ad_dpm() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47433,7 +47459,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47441,6 +47466,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47560,7 +47586,6 @@ void m68000_device::movea_l_adr16_ad_dpm() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47568,6 +47593,7 @@ void m68000_device::movea_l_adr16_ad_dpm() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47711,7 +47737,6 @@ void m68000_device::movea_l_adr32_ad_dpm() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47719,6 +47744,7 @@ void m68000_device::movea_l_adr32_ad_dpm() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -47835,7 +47861,6 @@ void m68000_device::movea_l_dpc_ad_dpm() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47843,6 +47868,7 @@ void m68000_device::movea_l_dpc_ad_dpm() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48000,7 +48026,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -48008,6 +48033,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48100,7 +48126,6 @@ void m68000_device::movea_l_imm32_ad_dpm() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -48108,6 +48133,7 @@ void m68000_device::movea_l_imm32_ad_dpm() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48175,7 +48201,6 @@ void m68000_device::move_l_ds_aid_dpm() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48203,6 +48228,7 @@ void m68000_device::move_l_ds_aid_dpm() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48272,7 +48298,6 @@ void m68000_device::move_l_as_aid_dpm() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48300,6 +48325,7 @@ void m68000_device::move_l_as_aid_dpm() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48422,7 +48448,6 @@ void m68000_device::move_l_ais_aid_dpm() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48450,10 +48475,10 @@ void m68000_device::move_l_ais_aid_dpm() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48574,7 +48599,6 @@ void m68000_device::move_l_aips_aid_dpm() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48602,10 +48626,10 @@ void m68000_device::move_l_aips_aid_dpm() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48727,7 +48751,6 @@ void m68000_device::move_l_pais_aid_dpm() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48755,10 +48778,10 @@ void m68000_device::move_l_pais_aid_dpm() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -48900,7 +48923,6 @@ void m68000_device::move_l_das_aid_dpm() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -48928,10 +48950,10 @@ void m68000_device::move_l_das_aid_dpm() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49114,7 +49136,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49142,10 +49163,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49289,7 +49310,6 @@ void m68000_device::move_l_adr16_aid_dpm() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49317,10 +49337,10 @@ void m68000_device::move_l_adr16_aid_dpm() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49488,7 +49508,6 @@ void m68000_device::move_l_adr32_aid_dpm() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -49516,10 +49535,10 @@ void m68000_device::move_l_adr32_aid_dpm() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49660,7 +49679,6 @@ void m68000_device::move_l_dpc_aid_dpm() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49688,10 +49706,10 @@ void m68000_device::move_l_dpc_aid_dpm() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -49873,7 +49891,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49901,10 +49918,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50019,7 +50036,6 @@ void m68000_device::move_l_imm32_aid_dpm() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50047,6 +50063,7 @@ void m68000_device::move_l_imm32_aid_dpm() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50116,7 +50133,6 @@ void m68000_device::move_l_ds_aipd_dpm() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50144,6 +50160,7 @@ void m68000_device::move_l_ds_aipd_dpm() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50213,7 +50230,6 @@ void m68000_device::move_l_as_aipd_dpm() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50241,6 +50257,7 @@ void m68000_device::move_l_as_aipd_dpm() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50363,7 +50380,6 @@ void m68000_device::move_l_ais_aipd_dpm() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50391,6 +50407,7 @@ void m68000_device::move_l_ais_aipd_dpm() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50513,7 +50530,6 @@ void m68000_device::move_l_aips_aipd_dpm() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50541,6 +50557,7 @@ void m68000_device::move_l_aips_aipd_dpm() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50664,7 +50681,6 @@ void m68000_device::move_l_pais_aipd_dpm() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50692,6 +50708,7 @@ void m68000_device::move_l_pais_aipd_dpm() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -50835,7 +50852,6 @@ void m68000_device::move_l_das_aipd_dpm() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -50863,6 +50879,7 @@ void m68000_device::move_l_das_aipd_dpm() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51047,7 +51064,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51075,6 +51091,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51220,7 +51237,6 @@ void m68000_device::move_l_adr16_aipd_dpm() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51248,6 +51264,7 @@ void m68000_device::move_l_adr16_aipd_dpm() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51417,7 +51434,6 @@ void m68000_device::move_l_adr32_aipd_dpm() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -51445,6 +51461,7 @@ void m68000_device::move_l_adr32_aipd_dpm() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51587,7 +51604,6 @@ void m68000_device::move_l_dpc_aipd_dpm() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51615,6 +51631,7 @@ void m68000_device::move_l_dpc_aipd_dpm() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51798,7 +51815,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51826,6 +51842,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -51942,7 +51959,6 @@ void m68000_device::move_l_imm32_aipd_dpm() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -51970,6 +51986,7 @@ void m68000_device::move_l_imm32_aipd_dpm() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52014,7 +52031,6 @@ void m68000_device::move_l_ds_paid_dpm() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52070,6 +52086,7 @@ void m68000_device::move_l_ds_paid_dpm() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52110,7 +52127,6 @@ void m68000_device::move_l_as_paid_dpm() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52166,6 +52182,7 @@ void m68000_device::move_l_as_paid_dpm() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52257,7 +52274,6 @@ void m68000_device::move_l_ais_paid_dpm() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52313,6 +52329,7 @@ void m68000_device::move_l_ais_paid_dpm() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52407,7 +52424,6 @@ void m68000_device::move_l_aips_paid_dpm() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52463,6 +52479,7 @@ void m68000_device::move_l_aips_paid_dpm() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52558,7 +52575,6 @@ void m68000_device::move_l_pais_paid_dpm() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52614,6 +52630,7 @@ void m68000_device::move_l_pais_paid_dpm() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52729,7 +52746,6 @@ void m68000_device::move_l_das_paid_dpm() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52785,6 +52801,7 @@ void m68000_device::move_l_das_paid_dpm() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -52941,7 +52958,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -52997,6 +53013,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53114,7 +53131,6 @@ void m68000_device::move_l_adr16_paid_dpm() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53170,6 +53186,7 @@ void m68000_device::move_l_adr16_paid_dpm() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53311,7 +53328,6 @@ void m68000_device::move_l_adr32_paid_dpm() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53367,6 +53383,7 @@ void m68000_device::move_l_adr32_paid_dpm() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -53481,7 +53498,6 @@ void m68000_device::move_l_dpc_paid_dpm() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53537,6 +53553,7 @@ void m68000_device::move_l_dpc_paid_dpm() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53692,7 +53709,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53748,6 +53764,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53838,7 +53855,6 @@ void m68000_device::move_l_imm32_paid_dpm() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -53894,6 +53910,7 @@ void m68000_device::move_l_imm32_paid_dpm() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -53985,7 +54002,6 @@ void m68000_device::move_l_ds_dad_dpm() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54013,6 +54029,7 @@ void m68000_device::move_l_ds_dad_dpm() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54108,7 +54125,6 @@ void m68000_device::move_l_as_dad_dpm() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54136,6 +54152,7 @@ void m68000_device::move_l_as_dad_dpm() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54285,6 +54302,7 @@ void m68000_device::move_l_ais_dad_dpm() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54312,11 +54330,11 @@ void m68000_device::move_l_ais_dad_dpm() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54464,6 +54482,7 @@ void m68000_device::move_l_aips_dad_dpm() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54491,11 +54510,11 @@ void m68000_device::move_l_aips_dad_dpm() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54644,6 +54663,7 @@ void m68000_device::move_l_pais_dad_dpm() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54671,11 +54691,11 @@ void m68000_device::move_l_pais_dad_dpm() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -54844,6 +54864,7 @@ void m68000_device::move_l_das_dad_dpm() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -54871,11 +54892,11 @@ void m68000_device::move_l_das_dad_dpm() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55085,6 +55106,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55112,11 +55134,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55287,6 +55309,7 @@ void m68000_device::move_l_adr16_dad_dpm() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55314,11 +55337,11 @@ void m68000_device::move_l_adr16_dad_dpm() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55513,6 +55536,7 @@ void m68000_device::move_l_adr32_dad_dpm() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -55540,11 +55564,11 @@ void m68000_device::move_l_adr32_dad_dpm() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55712,6 +55736,7 @@ void m68000_device::move_l_dpc_dad_dpm() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55739,11 +55764,11 @@ void m68000_device::move_l_dpc_dad_dpm() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -55952,6 +55977,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55979,11 +56005,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56124,7 +56150,6 @@ void m68000_device::move_l_imm32_dad_dpm() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56152,6 +56177,7 @@ void m68000_device::move_l_imm32_dad_dpm() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56289,7 +56315,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56317,6 +56342,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56454,7 +56480,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56482,6 +56507,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56672,6 +56698,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56699,11 +56726,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -56892,6 +56919,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56919,11 +56947,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57113,6 +57141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -57140,11 +57169,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57354,6 +57383,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57381,11 +57411,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57636,6 +57666,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57663,11 +57694,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -57879,6 +57910,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57906,11 +57938,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58146,6 +58178,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -58173,11 +58206,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58386,6 +58419,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58413,11 +58447,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58667,6 +58701,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58694,11 +58729,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -58881,7 +58916,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -58909,6 +58943,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59007,6 +59042,7 @@ void m68000_device::move_l_ds_adr16_dpm() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59034,11 +59070,11 @@ void m68000_device::move_l_ds_adr16_dpm() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59132,6 +59168,7 @@ void m68000_device::move_l_as_adr16_dpm() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59159,11 +59196,11 @@ void m68000_device::move_l_as_adr16_dpm() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59307,6 +59344,7 @@ void m68000_device::move_l_ais_adr16_dpm() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59334,11 +59372,11 @@ void m68000_device::move_l_ais_adr16_dpm() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59485,6 +59523,7 @@ void m68000_device::move_l_aips_adr16_dpm() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59512,11 +59551,11 @@ void m68000_device::move_l_aips_adr16_dpm() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59664,6 +59703,7 @@ void m68000_device::move_l_pais_adr16_dpm() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59691,11 +59731,11 @@ void m68000_device::move_l_pais_adr16_dpm() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -59863,6 +59903,7 @@ void m68000_device::move_l_das_adr16_dpm() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -59890,11 +59931,11 @@ void m68000_device::move_l_das_adr16_dpm() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60103,6 +60144,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60130,11 +60172,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60304,6 +60346,7 @@ void m68000_device::move_l_adr16_adr16_dpm() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60331,11 +60374,11 @@ void m68000_device::move_l_adr16_adr16_dpm() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60529,6 +60572,7 @@ void m68000_device::move_l_adr32_adr16_dpm() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -60556,11 +60600,11 @@ void m68000_device::move_l_adr32_adr16_dpm() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60727,6 +60771,7 @@ void m68000_device::move_l_dpc_adr16_dpm() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60754,11 +60799,11 @@ void m68000_device::move_l_dpc_adr16_dpm() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -60966,6 +61011,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60993,11 +61039,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61141,6 +61187,7 @@ void m68000_device::move_l_imm32_adr16_dpm() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61168,11 +61215,11 @@ void m68000_device::move_l_imm32_adr16_dpm() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61290,6 +61337,7 @@ void m68000_device::move_l_ds_adr32_dpm() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61317,11 +61365,11 @@ void m68000_device::move_l_ds_adr32_dpm() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61439,6 +61487,7 @@ void m68000_device::move_l_as_adr32_dpm() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61466,11 +61515,11 @@ void m68000_device::move_l_as_adr32_dpm() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61613,7 +61662,6 @@ void m68000_device::move_l_ais_adr32_dpm() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61668,11 +61716,11 @@ void m68000_device::move_l_ais_adr32_dpm() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -61818,7 +61866,6 @@ void m68000_device::move_l_aips_adr32_dpm() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61873,11 +61920,11 @@ void m68000_device::move_l_aips_adr32_dpm() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62024,7 +62071,6 @@ void m68000_device::move_l_pais_adr32_dpm() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -62079,11 +62125,11 @@ void m68000_device::move_l_pais_adr32_dpm() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62250,7 +62296,6 @@ void m68000_device::move_l_das_adr32_dpm() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62305,11 +62350,11 @@ void m68000_device::move_l_das_adr32_dpm() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62517,7 +62562,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62572,11 +62616,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62745,7 +62789,6 @@ void m68000_device::move_l_adr16_adr32_dpm() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62800,11 +62843,11 @@ void m68000_device::move_l_adr16_adr32_dpm() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -62997,7 +63040,6 @@ void m68000_device::move_l_adr32_adr32_dpm() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -63052,11 +63094,11 @@ void m68000_device::move_l_adr32_adr32_dpm() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63222,7 +63264,6 @@ void m68000_device::move_l_dpc_adr32_dpm() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63277,11 +63318,11 @@ void m68000_device::move_l_dpc_adr32_dpm() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63488,7 +63529,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63543,11 +63583,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63715,6 +63755,7 @@ void m68000_device::move_l_imm32_adr32_dpm() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63742,11 +63783,11 @@ void m68000_device::move_l_imm32_adr32_dpm() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63786,7 +63827,6 @@ void m68000_device::move_w_ds_dd_dpm() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63795,6 +63835,7 @@ void m68000_device::move_w_ds_dd_dpm() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63836,7 +63877,6 @@ void m68000_device::move_w_as_dd_dpm() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63845,6 +63885,7 @@ void m68000_device::move_w_as_dd_dpm() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63913,7 +63954,6 @@ void m68000_device::move_w_ais_dd_dpm() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -63922,6 +63962,7 @@ void m68000_device::move_w_ais_dd_dpm() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -63992,7 +64033,6 @@ void m68000_device::move_w_aips_dd_dpm() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64001,6 +64041,7 @@ void m68000_device::move_w_aips_dd_dpm() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64073,7 +64114,6 @@ void m68000_device::move_w_pais_dd_dpm() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64082,6 +64122,7 @@ void m68000_device::move_w_pais_dd_dpm() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64173,7 +64214,6 @@ void m68000_device::move_w_das_dd_dpm() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64182,6 +64222,7 @@ void m68000_device::move_w_das_dd_dpm() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64314,7 +64355,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64323,6 +64363,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64413,7 +64454,6 @@ void m68000_device::move_w_adr16_dd_dpm() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64422,6 +64462,7 @@ void m68000_device::move_w_adr16_dd_dpm() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64536,7 +64577,6 @@ void m68000_device::move_w_adr32_dd_dpm() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64545,6 +64585,7 @@ void m68000_device::move_w_adr32_dd_dpm() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64635,7 +64676,6 @@ void m68000_device::move_w_dpc_dd_dpm() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64644,6 +64684,7 @@ void m68000_device::move_w_dpc_dd_dpm() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64775,7 +64816,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64784,6 +64824,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64849,7 +64890,6 @@ void m68000_device::move_w_imm16_dd_dpm() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -64858,6 +64898,7 @@ void m68000_device::move_w_imm16_dd_dpm() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64899,12 +64940,12 @@ void m68000_device::movea_w_ds_ad_dpm() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -64947,12 +64988,12 @@ void m68000_device::movea_w_as_ad_dpm() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65022,12 +65063,12 @@ void m68000_device::movea_w_ais_ad_dpm() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65098,12 +65139,12 @@ void m68000_device::movea_w_aips_ad_dpm() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65176,12 +65217,12 @@ void m68000_device::movea_w_pais_ad_dpm() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65273,12 +65314,12 @@ void m68000_device::movea_w_das_ad_dpm() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65411,12 +65452,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65507,12 +65548,12 @@ void m68000_device::movea_w_adr16_ad_dpm() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65627,12 +65668,12 @@ void m68000_device::movea_w_adr32_ad_dpm() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65723,12 +65764,12 @@ void m68000_device::movea_w_dpc_ad_dpm() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65860,12 +65901,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65931,12 +65972,12 @@ void m68000_device::movea_w_imm16_ad_dpm() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -65979,7 +66020,6 @@ void m68000_device::move_w_ds_aid_dpm() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66008,10 +66048,10 @@ void m68000_device::move_w_ds_aid_dpm() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66051,7 +66091,6 @@ void m68000_device::move_w_as_aid_dpm() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66080,10 +66119,10 @@ void m68000_device::move_w_as_aid_dpm() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66177,10 +66216,10 @@ void m68000_device::move_w_ais_aid_dpm() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66278,10 +66317,10 @@ void m68000_device::move_w_aips_aid_dpm() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66381,10 +66420,10 @@ void m68000_device::move_w_pais_aid_dpm() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66503,10 +66542,10 @@ void m68000_device::move_w_das_aid_dpm() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66666,10 +66705,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66787,10 +66826,10 @@ void m68000_device::move_w_adr16_aid_dpm() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -66932,10 +66971,10 @@ void m68000_device::move_w_adr32_aid_dpm() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67053,10 +67092,10 @@ void m68000_device::move_w_dpc_aid_dpm() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67215,10 +67254,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67284,7 +67323,6 @@ void m68000_device::move_w_imm16_aid_dpm() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67313,10 +67351,10 @@ void m68000_device::move_w_imm16_aid_dpm() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67356,7 +67394,6 @@ void m68000_device::move_w_ds_aipd_dpm() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67385,6 +67422,7 @@ void m68000_device::move_w_ds_aipd_dpm() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67426,7 +67464,6 @@ void m68000_device::move_w_as_aipd_dpm() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67455,6 +67492,7 @@ void m68000_device::move_w_as_aipd_dpm() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67523,7 +67561,6 @@ void m68000_device::move_w_ais_aipd_dpm() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67552,6 +67589,7 @@ void m68000_device::move_w_ais_aipd_dpm() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67624,7 +67662,6 @@ void m68000_device::move_w_aips_aipd_dpm() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67653,6 +67690,7 @@ void m68000_device::move_w_aips_aipd_dpm() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67727,7 +67765,6 @@ void m68000_device::move_w_pais_aipd_dpm() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67756,6 +67793,7 @@ void m68000_device::move_w_pais_aipd_dpm() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -67849,7 +67887,6 @@ void m68000_device::move_w_das_aipd_dpm() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -67878,6 +67915,7 @@ void m68000_device::move_w_das_aipd_dpm() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68012,7 +68050,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68041,6 +68078,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68133,7 +68171,6 @@ void m68000_device::move_w_adr16_aipd_dpm() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68162,6 +68199,7 @@ void m68000_device::move_w_adr16_aipd_dpm() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68278,7 +68316,6 @@ void m68000_device::move_w_adr32_aipd_dpm() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -68307,6 +68344,7 @@ void m68000_device::move_w_adr32_aipd_dpm() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68399,7 +68437,6 @@ void m68000_device::move_w_dpc_aipd_dpm() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68428,6 +68465,7 @@ void m68000_device::move_w_dpc_aipd_dpm() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68561,7 +68599,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68590,6 +68627,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68657,7 +68695,6 @@ void m68000_device::move_w_imm16_aipd_dpm() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68686,6 +68723,7 @@ void m68000_device::move_w_imm16_aipd_dpm() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68727,7 +68765,6 @@ void m68000_device::move_w_ds_paid_dpm() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68757,6 +68794,7 @@ void m68000_device::move_w_ds_paid_dpm() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68797,7 +68835,6 @@ void m68000_device::move_w_as_paid_dpm() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68827,6 +68864,7 @@ void m68000_device::move_w_as_paid_dpm() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68894,7 +68932,6 @@ void m68000_device::move_w_ais_paid_dpm() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -68924,6 +68961,7 @@ void m68000_device::move_w_ais_paid_dpm() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68995,7 +69033,6 @@ void m68000_device::move_w_aips_paid_dpm() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69025,6 +69062,7 @@ void m68000_device::move_w_aips_paid_dpm() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69098,7 +69136,6 @@ void m68000_device::move_w_pais_paid_dpm() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69128,6 +69165,7 @@ void m68000_device::move_w_pais_paid_dpm() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69220,7 +69258,6 @@ void m68000_device::move_w_das_paid_dpm() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69250,6 +69287,7 @@ void m68000_device::move_w_das_paid_dpm() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69383,7 +69421,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69413,6 +69450,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69504,7 +69542,6 @@ void m68000_device::move_w_adr16_paid_dpm() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69534,6 +69571,7 @@ void m68000_device::move_w_adr16_paid_dpm() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69649,7 +69687,6 @@ void m68000_device::move_w_adr32_paid_dpm() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69679,6 +69716,7 @@ void m68000_device::move_w_adr32_paid_dpm() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -69770,7 +69808,6 @@ void m68000_device::move_w_dpc_paid_dpm() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69800,6 +69837,7 @@ void m68000_device::move_w_dpc_paid_dpm() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69932,7 +69970,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -69962,6 +69999,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70028,7 +70066,6 @@ void m68000_device::move_w_imm16_paid_dpm() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70058,6 +70095,7 @@ void m68000_device::move_w_imm16_paid_dpm() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70122,7 +70160,6 @@ void m68000_device::move_w_ds_dad_dpm() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70150,11 +70187,11 @@ void m68000_device::move_w_ds_dad_dpm() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70218,7 +70255,6 @@ void m68000_device::move_w_as_dad_dpm() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70246,11 +70282,11 @@ void m68000_device::move_w_as_dad_dpm() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70344,6 +70380,7 @@ void m68000_device::move_w_ais_dad_dpm() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70371,11 +70408,11 @@ void m68000_device::move_w_ais_dad_dpm() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70473,6 +70510,7 @@ void m68000_device::move_w_aips_dad_dpm() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70500,11 +70538,11 @@ void m68000_device::move_w_aips_dad_dpm() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70604,6 +70642,7 @@ void m68000_device::move_w_pais_dad_dpm() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70631,11 +70670,11 @@ void m68000_device::move_w_pais_dad_dpm() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70754,6 +70793,7 @@ void m68000_device::move_w_das_dad_dpm() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70781,11 +70821,11 @@ void m68000_device::move_w_das_dad_dpm() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -70945,6 +70985,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70972,11 +71013,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71094,6 +71135,7 @@ void m68000_device::move_w_adr16_dad_dpm() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71121,11 +71163,11 @@ void m68000_device::move_w_adr16_dad_dpm() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71267,6 +71309,7 @@ void m68000_device::move_w_adr32_dad_dpm() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -71294,11 +71337,11 @@ void m68000_device::move_w_adr32_dad_dpm() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71416,6 +71459,7 @@ void m68000_device::move_w_dpc_dad_dpm() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71443,11 +71487,11 @@ void m68000_device::move_w_dpc_dad_dpm() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71606,6 +71650,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71633,11 +71678,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71727,7 +71772,6 @@ void m68000_device::move_w_imm16_dad_dpm() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -71755,11 +71799,11 @@ void m68000_device::move_w_imm16_dad_dpm() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -71865,7 +71909,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -71893,11 +71936,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72003,7 +72046,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -72031,11 +72073,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72170,6 +72212,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72197,11 +72240,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72340,6 +72383,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72367,11 +72411,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72512,6 +72556,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72539,11 +72584,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72703,6 +72748,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72730,11 +72776,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -72935,6 +72981,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72962,11 +73009,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73125,6 +73172,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73152,11 +73200,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73339,6 +73387,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -73366,11 +73415,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73529,6 +73578,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73556,11 +73606,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73760,6 +73810,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73787,11 +73838,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -73923,7 +73974,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -73951,11 +74001,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74022,6 +74072,7 @@ void m68000_device::move_w_ds_adr16_dpm() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74049,11 +74100,11 @@ void m68000_device::move_w_ds_adr16_dpm() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74120,6 +74171,7 @@ void m68000_device::move_w_as_adr16_dpm() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74147,11 +74199,11 @@ void m68000_device::move_w_as_adr16_dpm() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74244,6 +74296,7 @@ void m68000_device::move_w_ais_adr16_dpm() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74271,11 +74324,11 @@ void m68000_device::move_w_ais_adr16_dpm() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74372,6 +74425,7 @@ void m68000_device::move_w_aips_adr16_dpm() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74399,11 +74453,11 @@ void m68000_device::move_w_aips_adr16_dpm() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74502,6 +74556,7 @@ void m68000_device::move_w_pais_adr16_dpm() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74529,11 +74584,11 @@ void m68000_device::move_w_pais_adr16_dpm() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74651,6 +74706,7 @@ void m68000_device::move_w_das_adr16_dpm() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74678,11 +74734,11 @@ void m68000_device::move_w_das_adr16_dpm() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74841,6 +74897,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74868,11 +74925,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -74989,6 +75046,7 @@ void m68000_device::move_w_adr16_adr16_dpm() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75016,11 +75074,11 @@ void m68000_device::move_w_adr16_adr16_dpm() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75161,6 +75219,7 @@ void m68000_device::move_w_adr32_adr16_dpm() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -75188,11 +75247,11 @@ void m68000_device::move_w_adr32_adr16_dpm() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75309,6 +75368,7 @@ void m68000_device::move_w_dpc_adr16_dpm() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75336,11 +75396,11 @@ void m68000_device::move_w_dpc_adr16_dpm() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75498,6 +75558,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75525,11 +75586,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75622,6 +75683,7 @@ void m68000_device::move_w_imm16_adr16_dpm() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75649,11 +75711,11 @@ void m68000_device::move_w_imm16_adr16_dpm() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75744,6 +75806,7 @@ void m68000_device::move_w_ds_adr32_dpm() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75771,11 +75834,11 @@ void m68000_device::move_w_ds_adr32_dpm() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75866,6 +75929,7 @@ void m68000_device::move_w_as_adr32_dpm() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75893,11 +75957,11 @@ void m68000_device::move_w_as_adr32_dpm() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -75990,7 +76054,6 @@ void m68000_device::move_w_ais_adr32_dpm() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76042,11 +76105,11 @@ void m68000_device::move_w_ais_adr32_dpm() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76143,7 +76206,6 @@ void m68000_device::move_w_aips_adr32_dpm() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76195,11 +76257,11 @@ void m68000_device::move_w_aips_adr32_dpm() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76298,7 +76360,6 @@ void m68000_device::move_w_pais_adr32_dpm() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76350,11 +76411,11 @@ void m68000_device::move_w_pais_adr32_dpm() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76472,7 +76533,6 @@ void m68000_device::move_w_das_adr32_dpm() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76524,11 +76584,11 @@ void m68000_device::move_w_das_adr32_dpm() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76687,7 +76747,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76739,11 +76798,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -76860,7 +76919,6 @@ void m68000_device::move_w_adr16_adr32_dpm() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76912,11 +76970,11 @@ void m68000_device::move_w_adr16_adr32_dpm() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77057,7 +77115,6 @@ void m68000_device::move_w_adr32_adr32_dpm() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -77109,11 +77166,11 @@ void m68000_device::move_w_adr32_adr32_dpm() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77230,7 +77287,6 @@ void m68000_device::move_w_dpc_adr32_dpm() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77282,11 +77338,11 @@ void m68000_device::move_w_dpc_adr32_dpm() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77444,7 +77500,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77496,11 +77551,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77617,6 +77672,7 @@ void m68000_device::move_w_imm16_adr32_dpm() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77644,11 +77700,11 @@ void m68000_device::move_w_imm16_adr32_dpm() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77687,7 +77743,6 @@ void m68000_device::negx_b_ds_dpm() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -77695,6 +77750,7 @@ void m68000_device::negx_b_ds_dpm() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77758,7 +77814,6 @@ void m68000_device::negx_b_ais_dpm() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77788,6 +77843,7 @@ void m68000_device::negx_b_ais_dpm() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77847,7 +77903,6 @@ void m68000_device::negx_b_aips_dpm() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77877,6 +77932,7 @@ void m68000_device::negx_b_aips_dpm() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77938,7 +77994,6 @@ void m68000_device::negx_b_pais_dpm() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -77968,6 +78023,7 @@ void m68000_device::negx_b_pais_dpm() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78048,7 +78104,6 @@ void m68000_device::negx_b_das_dpm() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78078,6 +78133,7 @@ void m68000_device::negx_b_das_dpm() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78199,7 +78255,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78229,6 +78284,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78308,7 +78364,6 @@ void m68000_device::negx_b_adr16_dpm() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78338,6 +78393,7 @@ void m68000_device::negx_b_adr16_dpm() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78441,7 +78497,6 @@ void m68000_device::negx_b_adr32_dpm() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78471,6 +78526,7 @@ void m68000_device::negx_b_adr32_dpm() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -78503,7 +78559,6 @@ void m68000_device::negx_w_ds_dpm() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -78511,6 +78566,7 @@ void m68000_device::negx_w_ds_dpm() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78578,7 +78634,6 @@ void m68000_device::negx_w_ais_dpm() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78608,6 +78663,7 @@ void m68000_device::negx_w_ais_dpm() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78677,7 +78733,6 @@ void m68000_device::negx_w_aips_dpm() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78707,6 +78762,7 @@ void m68000_device::negx_w_aips_dpm() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78778,7 +78834,6 @@ void m68000_device::negx_w_pais_dpm() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78808,6 +78863,7 @@ void m68000_device::negx_w_pais_dpm() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78898,7 +78954,6 @@ void m68000_device::negx_w_das_dpm() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -78928,6 +78983,7 @@ void m68000_device::negx_w_das_dpm() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79059,7 +79115,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79089,6 +79144,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79178,7 +79234,6 @@ void m68000_device::negx_w_adr16_dpm() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79208,6 +79263,7 @@ void m68000_device::negx_w_adr16_dpm() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79321,7 +79377,6 @@ void m68000_device::negx_w_adr32_dpm() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79351,6 +79406,7 @@ void m68000_device::negx_w_adr32_dpm() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79389,7 +79445,6 @@ void m68000_device::negx_l_ds_dpm() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -79423,6 +79478,7 @@ void m68000_device::negx_l_ds_dpm() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79494,7 +79550,6 @@ void m68000_device::negx_l_ais_dpm() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79550,6 +79605,7 @@ void m68000_device::negx_l_ais_dpm() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79642,7 +79698,6 @@ void m68000_device::negx_l_aips_dpm() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79698,6 +79753,7 @@ void m68000_device::negx_l_aips_dpm() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79791,7 +79847,6 @@ void m68000_device::negx_l_pais_dpm() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -79847,6 +79902,7 @@ void m68000_device::negx_l_pais_dpm() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79960,7 +80016,6 @@ void m68000_device::negx_l_das_dpm() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80016,6 +80071,7 @@ void m68000_device::negx_l_das_dpm() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80170,7 +80226,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80226,6 +80281,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80341,7 +80397,6 @@ void m68000_device::negx_l_adr16_dpm() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80397,6 +80452,7 @@ void m68000_device::negx_l_adr16_dpm() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80536,7 +80592,6 @@ void m68000_device::negx_l_adr32_dpm() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -80592,6 +80647,7 @@ void m68000_device::negx_l_adr32_dpm() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -80630,7 +80686,6 @@ void m68000_device::move_sr_ds_dpm() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -80658,6 +80713,7 @@ void m68000_device::move_sr_ds_dpm() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -80704,7 +80760,6 @@ void m68000_device::move_sr_ais_dpm() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80735,6 +80790,7 @@ void m68000_device::move_sr_ais_dpm() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80804,7 +80860,6 @@ void m68000_device::move_sr_aips_dpm() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80835,6 +80890,7 @@ void m68000_device::move_sr_aips_dpm() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80906,7 +80962,6 @@ void m68000_device::move_sr_pais_dpm() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80937,6 +80992,7 @@ void m68000_device::move_sr_pais_dpm() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -81027,7 +81083,6 @@ void m68000_device::move_sr_das_dpm() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81058,6 +81113,7 @@ void m68000_device::move_sr_das_dpm() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81189,7 +81245,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81220,6 +81275,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81309,7 +81365,6 @@ void m68000_device::move_sr_adr16_dpm() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81340,6 +81395,7 @@ void m68000_device::move_sr_adr16_dpm() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81453,7 +81509,6 @@ void m68000_device::move_sr_adr32_dpm() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81484,6 +81539,7 @@ void m68000_device::move_sr_adr32_dpm() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -81706,7 +81762,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81721,6 +81776,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -81752,7 +81808,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81978,7 +82033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81993,6 +82047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82024,7 +82079,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82254,7 +82308,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82269,6 +82322,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82300,7 +82354,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82532,7 +82585,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82547,6 +82599,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82578,7 +82631,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82829,7 +82881,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82844,6 +82895,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -82875,7 +82927,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83167,7 +83218,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83182,6 +83232,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -83213,7 +83264,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83463,7 +83513,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83478,6 +83527,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -83509,7 +83559,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83783,7 +83832,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83798,6 +83846,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -83829,7 +83878,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84079,7 +84127,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84094,6 +84141,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84125,7 +84173,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84416,7 +84463,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84431,6 +84477,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84462,7 +84509,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84687,7 +84733,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84702,6 +84747,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84733,7 +84779,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84749,13 +84794,13 @@ void m68000_device::lea_ais_ad_dpm() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84823,11 +84868,11 @@ void m68000_device::lea_das_ad_dpm() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -84936,11 +84981,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85003,11 +85048,11 @@ void m68000_device::lea_adr16_ad_dpm() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85096,11 +85141,11 @@ void m68000_device::lea_adr32_ad_dpm() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85165,11 +85210,11 @@ void m68000_device::lea_dpc_ad_dpm() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85277,11 +85322,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85320,7 +85365,6 @@ void m68000_device::clr_b_ds_dpm() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -85328,6 +85372,7 @@ void m68000_device::clr_b_ds_dpm() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85393,7 +85438,6 @@ void m68000_device::clr_b_ais_dpm() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85423,6 +85467,7 @@ void m68000_device::clr_b_ais_dpm() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85485,7 +85530,6 @@ void m68000_device::clr_b_aips_dpm() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85515,6 +85559,7 @@ void m68000_device::clr_b_aips_dpm() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85579,7 +85624,6 @@ void m68000_device::clr_b_pais_dpm() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85609,6 +85653,7 @@ void m68000_device::clr_b_pais_dpm() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85692,7 +85737,6 @@ void m68000_device::clr_b_das_dpm() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85722,6 +85766,7 @@ void m68000_device::clr_b_das_dpm() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85848,7 +85893,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85878,6 +85922,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85960,7 +86005,6 @@ void m68000_device::clr_b_adr16_dpm() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -85990,6 +86034,7 @@ void m68000_device::clr_b_adr16_dpm() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86097,7 +86142,6 @@ void m68000_device::clr_b_adr32_dpm() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86127,6 +86171,7 @@ void m68000_device::clr_b_adr32_dpm() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -86160,7 +86205,6 @@ void m68000_device::clr_w_ds_dpm() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -86168,6 +86212,7 @@ void m68000_device::clr_w_ds_dpm() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86237,7 +86282,6 @@ void m68000_device::clr_w_ais_dpm() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86267,6 +86311,7 @@ void m68000_device::clr_w_ais_dpm() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86339,7 +86384,6 @@ void m68000_device::clr_w_aips_dpm() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86369,6 +86413,7 @@ void m68000_device::clr_w_aips_dpm() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86443,7 +86488,6 @@ void m68000_device::clr_w_pais_dpm() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86473,6 +86517,7 @@ void m68000_device::clr_w_pais_dpm() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86566,7 +86611,6 @@ void m68000_device::clr_w_das_dpm() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86596,6 +86640,7 @@ void m68000_device::clr_w_das_dpm() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86732,7 +86777,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86762,6 +86806,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86854,7 +86899,6 @@ void m68000_device::clr_w_adr16_dpm() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -86884,6 +86928,7 @@ void m68000_device::clr_w_adr16_dpm() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -87001,7 +87046,6 @@ void m68000_device::clr_w_adr32_dpm() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87031,6 +87075,7 @@ void m68000_device::clr_w_adr32_dpm() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87070,7 +87115,6 @@ void m68000_device::clr_l_ds_dpm() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -87104,6 +87148,7 @@ void m68000_device::clr_l_ds_dpm() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -87177,7 +87222,6 @@ void m68000_device::clr_l_ais_dpm() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87233,6 +87277,7 @@ void m68000_device::clr_l_ais_dpm() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87328,7 +87373,6 @@ void m68000_device::clr_l_aips_dpm() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87384,6 +87428,7 @@ void m68000_device::clr_l_aips_dpm() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87480,7 +87525,6 @@ void m68000_device::clr_l_pais_dpm() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87536,6 +87580,7 @@ void m68000_device::clr_l_pais_dpm() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87652,7 +87697,6 @@ void m68000_device::clr_l_das_dpm() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87708,6 +87752,7 @@ void m68000_device::clr_l_das_dpm() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -87867,7 +87912,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -87923,6 +87967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88042,7 +88087,6 @@ void m68000_device::clr_l_adr16_dpm() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88098,6 +88142,7 @@ void m68000_device::clr_l_adr16_dpm() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88242,7 +88287,6 @@ void m68000_device::clr_l_adr32_dpm() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88298,6 +88342,7 @@ void m68000_device::clr_l_adr32_dpm() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -88337,7 +88382,6 @@ void m68000_device::neg_b_ds_dpm() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -88345,6 +88389,7 @@ void m68000_device::neg_b_ds_dpm() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88408,7 +88453,6 @@ void m68000_device::neg_b_ais_dpm() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88438,6 +88482,7 @@ void m68000_device::neg_b_ais_dpm() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88497,7 +88542,6 @@ void m68000_device::neg_b_aips_dpm() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88527,6 +88571,7 @@ void m68000_device::neg_b_aips_dpm() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88588,7 +88633,6 @@ void m68000_device::neg_b_pais_dpm() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88618,6 +88662,7 @@ void m68000_device::neg_b_pais_dpm() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88698,7 +88743,6 @@ void m68000_device::neg_b_das_dpm() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88728,6 +88772,7 @@ void m68000_device::neg_b_das_dpm() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88849,7 +88894,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88879,6 +88923,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88958,7 +89003,6 @@ void m68000_device::neg_b_adr16_dpm() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -88988,6 +89032,7 @@ void m68000_device::neg_b_adr16_dpm() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89091,7 +89136,6 @@ void m68000_device::neg_b_adr32_dpm() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89121,6 +89165,7 @@ void m68000_device::neg_b_adr32_dpm() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -89153,7 +89198,6 @@ void m68000_device::neg_w_ds_dpm() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -89161,6 +89205,7 @@ void m68000_device::neg_w_ds_dpm() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89228,7 +89273,6 @@ void m68000_device::neg_w_ais_dpm() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89258,6 +89302,7 @@ void m68000_device::neg_w_ais_dpm() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89327,7 +89372,6 @@ void m68000_device::neg_w_aips_dpm() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89357,6 +89401,7 @@ void m68000_device::neg_w_aips_dpm() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89428,7 +89473,6 @@ void m68000_device::neg_w_pais_dpm() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89458,6 +89502,7 @@ void m68000_device::neg_w_pais_dpm() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89548,7 +89593,6 @@ void m68000_device::neg_w_das_dpm() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89578,6 +89622,7 @@ void m68000_device::neg_w_das_dpm() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89709,7 +89754,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89739,6 +89783,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89828,7 +89873,6 @@ void m68000_device::neg_w_adr16_dpm() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -89858,6 +89902,7 @@ void m68000_device::neg_w_adr16_dpm() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89971,7 +90016,6 @@ void m68000_device::neg_w_adr32_dpm() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90001,6 +90045,7 @@ void m68000_device::neg_w_adr32_dpm() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90039,7 +90084,6 @@ void m68000_device::neg_l_ds_dpm() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -90073,6 +90117,7 @@ void m68000_device::neg_l_ds_dpm() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -90144,7 +90189,6 @@ void m68000_device::neg_l_ais_dpm() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90200,6 +90244,7 @@ void m68000_device::neg_l_ais_dpm() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90292,7 +90337,6 @@ void m68000_device::neg_l_aips_dpm() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90348,6 +90392,7 @@ void m68000_device::neg_l_aips_dpm() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90441,7 +90486,6 @@ void m68000_device::neg_l_pais_dpm() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90497,6 +90541,7 @@ void m68000_device::neg_l_pais_dpm() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90610,7 +90655,6 @@ void m68000_device::neg_l_das_dpm() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90666,6 +90710,7 @@ void m68000_device::neg_l_das_dpm() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90820,7 +90865,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -90876,6 +90920,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90991,7 +91036,6 @@ void m68000_device::neg_l_adr16_dpm() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91047,6 +91091,7 @@ void m68000_device::neg_l_adr16_dpm() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -91186,7 +91231,6 @@ void m68000_device::neg_l_adr32_dpm() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91242,6 +91286,7 @@ void m68000_device::neg_l_adr32_dpm() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -91315,11 +91360,11 @@ void m68000_device::move_ds_ccr_dpm() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91420,11 +91465,11 @@ void m68000_device::move_ais_ccr_dpm() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91529,11 +91574,11 @@ void m68000_device::move_aips_ccr_dpm() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91640,11 +91685,11 @@ void m68000_device::move_pais_ccr_dpm() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91770,11 +91815,11 @@ void m68000_device::move_das_ccr_dpm() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -91941,11 +91986,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92070,11 +92115,11 @@ void m68000_device::move_adr16_ccr_dpm() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92223,11 +92268,11 @@ void m68000_device::move_adr32_ccr_dpm() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92352,11 +92397,11 @@ void m68000_device::move_dpc_ccr_dpm() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92522,11 +92567,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92626,11 +92671,11 @@ void m68000_device::move_imm8_ccr_dpm() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92669,7 +92714,6 @@ void m68000_device::not_b_ds_dpm() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -92677,6 +92721,7 @@ void m68000_device::not_b_ds_dpm() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92740,7 +92785,6 @@ void m68000_device::not_b_ais_dpm() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92770,6 +92814,7 @@ void m68000_device::not_b_ais_dpm() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92829,7 +92874,6 @@ void m68000_device::not_b_aips_dpm() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92859,6 +92903,7 @@ void m68000_device::not_b_aips_dpm() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92920,7 +92965,6 @@ void m68000_device::not_b_pais_dpm() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -92950,6 +92994,7 @@ void m68000_device::not_b_pais_dpm() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93030,7 +93075,6 @@ void m68000_device::not_b_das_dpm() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93060,6 +93104,7 @@ void m68000_device::not_b_das_dpm() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93181,7 +93226,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93211,6 +93255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93290,7 +93335,6 @@ void m68000_device::not_b_adr16_dpm() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93320,6 +93364,7 @@ void m68000_device::not_b_adr16_dpm() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93423,7 +93468,6 @@ void m68000_device::not_b_adr32_dpm() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93453,6 +93497,7 @@ void m68000_device::not_b_adr32_dpm() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -93485,7 +93530,6 @@ void m68000_device::not_w_ds_dpm() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -93493,6 +93537,7 @@ void m68000_device::not_w_ds_dpm() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93560,7 +93605,6 @@ void m68000_device::not_w_ais_dpm() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93590,6 +93634,7 @@ void m68000_device::not_w_ais_dpm() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93659,7 +93704,6 @@ void m68000_device::not_w_aips_dpm() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93689,6 +93733,7 @@ void m68000_device::not_w_aips_dpm() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93760,7 +93805,6 @@ void m68000_device::not_w_pais_dpm() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93790,6 +93834,7 @@ void m68000_device::not_w_pais_dpm() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93880,7 +93925,6 @@ void m68000_device::not_w_das_dpm() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -93910,6 +93954,7 @@ void m68000_device::not_w_das_dpm() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94041,7 +94086,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94071,6 +94115,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94160,7 +94205,6 @@ void m68000_device::not_w_adr16_dpm() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94190,6 +94234,7 @@ void m68000_device::not_w_adr16_dpm() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94303,7 +94348,6 @@ void m68000_device::not_w_adr32_dpm() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94333,6 +94377,7 @@ void m68000_device::not_w_adr32_dpm() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94371,7 +94416,6 @@ void m68000_device::not_l_ds_dpm() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -94405,6 +94449,7 @@ void m68000_device::not_l_ds_dpm() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -94476,7 +94521,6 @@ void m68000_device::not_l_ais_dpm() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94532,6 +94576,7 @@ void m68000_device::not_l_ais_dpm() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94624,7 +94669,6 @@ void m68000_device::not_l_aips_dpm() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94680,6 +94724,7 @@ void m68000_device::not_l_aips_dpm() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94773,7 +94818,6 @@ void m68000_device::not_l_pais_dpm() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94829,6 +94873,7 @@ void m68000_device::not_l_pais_dpm() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94942,7 +94987,6 @@ void m68000_device::not_l_das_dpm() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -94998,6 +95042,7 @@ void m68000_device::not_l_das_dpm() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95152,7 +95197,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95208,6 +95252,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95323,7 +95368,6 @@ void m68000_device::not_l_adr16_dpm() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95379,6 +95423,7 @@ void m68000_device::not_l_adr16_dpm() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95518,7 +95563,6 @@ void m68000_device::not_l_adr32_dpm() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95574,6 +95618,7 @@ void m68000_device::not_l_adr32_dpm() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -95653,11 +95698,11 @@ void m68000_device::move_ds_sr_dpm() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95764,11 +95809,11 @@ void m68000_device::move_ais_sr_dpm() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95879,11 +95924,11 @@ void m68000_device::move_aips_sr_dpm() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -95996,11 +96041,11 @@ void m68000_device::move_pais_sr_dpm() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96132,11 +96177,11 @@ void m68000_device::move_das_sr_dpm() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96309,11 +96354,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96444,11 +96489,11 @@ void m68000_device::move_adr16_sr_dpm() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96603,11 +96648,11 @@ void m68000_device::move_adr32_sr_dpm() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96738,11 +96783,11 @@ void m68000_device::move_dpc_sr_dpm() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -96914,11 +96959,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -97024,11 +97069,11 @@ void m68000_device::move_i16u_sr_dpm() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -97067,7 +97112,6 @@ void m68000_device::nbcd_b_ds_dpm() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -97099,6 +97143,7 @@ void m68000_device::nbcd_b_ds_dpm() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97142,7 +97187,6 @@ void m68000_device::nbcd_b_ais_dpm() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97174,6 +97218,7 @@ void m68000_device::nbcd_b_ais_dpm() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97233,7 +97278,6 @@ void m68000_device::nbcd_b_aips_dpm() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97265,6 +97309,7 @@ void m68000_device::nbcd_b_aips_dpm() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97326,7 +97371,6 @@ void m68000_device::nbcd_b_pais_dpm() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97358,6 +97402,7 @@ void m68000_device::nbcd_b_pais_dpm() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97438,7 +97483,6 @@ void m68000_device::nbcd_b_das_dpm() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97470,6 +97514,7 @@ void m68000_device::nbcd_b_das_dpm() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97591,7 +97636,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97623,6 +97667,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97702,7 +97747,6 @@ void m68000_device::nbcd_b_adr16_dpm() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97734,6 +97778,7 @@ void m68000_device::nbcd_b_adr16_dpm() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97837,7 +97882,6 @@ void m68000_device::nbcd_b_adr32_dpm() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97869,6 +97913,7 @@ void m68000_device::nbcd_b_adr32_dpm() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -97901,7 +97946,6 @@ void m68000_device::swap_ds_dpm() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -97910,6 +97954,7 @@ void m68000_device::swap_ds_dpm() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -97953,7 +97998,6 @@ void m68000_device::pea_ais_dpm() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98007,6 +98051,7 @@ void m68000_device::pea_ais_dpm() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98072,7 +98117,6 @@ void m68000_device::pea_das_dpm() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98128,6 +98172,7 @@ void m68000_device::pea_das_dpm() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98230,7 +98275,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98288,6 +98332,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98374,6 +98419,7 @@ void m68000_device::pea_adr16_dpm() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98401,11 +98447,11 @@ void m68000_device::pea_adr16_dpm() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98516,6 +98562,7 @@ void m68000_device::pea_adr32_dpm() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98543,11 +98590,11 @@ void m68000_device::pea_adr32_dpm() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98612,7 +98659,6 @@ void m68000_device::pea_dpc_dpm() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98668,6 +98714,7 @@ void m68000_device::pea_dpc_dpm() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98769,7 +98816,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98827,6 +98873,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98865,7 +98912,6 @@ void m68000_device::ext_w_ds_dpm() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -98873,6 +98919,7 @@ void m68000_device::ext_w_ds_dpm() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -98978,10 +99025,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99087,11 +99134,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99221,10 +99268,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99395,10 +99442,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99528,10 +99575,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99685,10 +99732,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99727,7 +99774,6 @@ void m68000_device::ext_l_ds_dpm() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -99735,6 +99781,7 @@ void m68000_device::ext_l_ds_dpm() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99863,10 +99910,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -99996,11 +100043,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100153,10 +100200,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100350,10 +100397,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100506,10 +100553,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100686,10 +100733,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100728,7 +100775,6 @@ void m68000_device::tst_b_ds_dpm() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -100737,6 +100783,7 @@ void m68000_device::tst_b_ds_dpm() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100800,7 +100847,6 @@ void m68000_device::tst_b_ais_dpm() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100808,6 +100854,7 @@ void m68000_device::tst_b_ais_dpm() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100876,7 +100923,6 @@ void m68000_device::tst_b_aips_dpm() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100884,6 +100930,7 @@ void m68000_device::tst_b_aips_dpm() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -100954,7 +101001,6 @@ void m68000_device::tst_b_pais_dpm() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100962,6 +101008,7 @@ void m68000_device::tst_b_pais_dpm() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101051,7 +101098,6 @@ void m68000_device::tst_b_das_dpm() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101059,6 +101105,7 @@ void m68000_device::tst_b_das_dpm() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101191,7 +101238,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101199,6 +101245,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101287,7 +101334,6 @@ void m68000_device::tst_b_adr16_dpm() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101295,6 +101341,7 @@ void m68000_device::tst_b_adr16_dpm() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101408,7 +101455,6 @@ void m68000_device::tst_b_adr32_dpm() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101416,6 +101462,7 @@ void m68000_device::tst_b_adr32_dpm() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101455,7 +101502,6 @@ void m68000_device::tst_w_ds_dpm() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -101464,6 +101510,7 @@ void m68000_device::tst_w_ds_dpm() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101531,7 +101578,6 @@ void m68000_device::tst_w_ais_dpm() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101539,6 +101585,7 @@ void m68000_device::tst_w_ais_dpm() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101611,7 +101658,6 @@ void m68000_device::tst_w_aips_dpm() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101619,6 +101665,7 @@ void m68000_device::tst_w_aips_dpm() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101693,7 +101740,6 @@ void m68000_device::tst_w_pais_dpm() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101701,6 +101747,7 @@ void m68000_device::tst_w_pais_dpm() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101794,7 +101841,6 @@ void m68000_device::tst_w_das_dpm() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101802,6 +101848,7 @@ void m68000_device::tst_w_das_dpm() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -101938,7 +101985,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101946,6 +101992,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102038,7 +102085,6 @@ void m68000_device::tst_w_adr16_dpm() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102046,6 +102092,7 @@ void m68000_device::tst_w_adr16_dpm() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102163,7 +102210,6 @@ void m68000_device::tst_w_adr32_dpm() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102171,6 +102217,7 @@ void m68000_device::tst_w_adr32_dpm() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102210,7 +102257,6 @@ void m68000_device::tst_l_ds_dpm() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -102219,6 +102265,7 @@ void m68000_device::tst_l_ds_dpm() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102312,7 +102359,6 @@ void m68000_device::tst_l_ais_dpm() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102320,6 +102366,7 @@ void m68000_device::tst_l_ais_dpm() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102417,7 +102464,6 @@ void m68000_device::tst_l_aips_dpm() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102425,6 +102471,7 @@ void m68000_device::tst_l_aips_dpm() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102523,7 +102570,6 @@ void m68000_device::tst_l_pais_dpm() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102531,6 +102577,7 @@ void m68000_device::tst_l_pais_dpm() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102649,7 +102696,6 @@ void m68000_device::tst_l_das_dpm() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102657,6 +102703,7 @@ void m68000_device::tst_l_das_dpm() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102818,7 +102865,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102826,6 +102872,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -102947,7 +102994,6 @@ void m68000_device::tst_l_adr16_dpm() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102955,6 +103001,7 @@ void m68000_device::tst_l_adr16_dpm() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103101,7 +103148,6 @@ void m68000_device::tst_l_adr32_dpm() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -103109,6 +103155,7 @@ void m68000_device::tst_l_adr32_dpm() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103150,13 +103197,13 @@ void m68000_device::tas_ds_dpm() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103253,12 +103300,12 @@ void m68000_device::tas_ais_dpm() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103356,12 +103403,12 @@ void m68000_device::tas_aips_dpm() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103461,12 +103508,12 @@ void m68000_device::tas_pais_dpm() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103585,12 +103632,12 @@ void m68000_device::tas_das_dpm() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103752,12 +103799,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -103875,12 +103922,12 @@ void m68000_device::tas_adr16_dpm() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104023,12 +104070,12 @@ void m68000_device::tas_adr32_dpm() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104158,10 +104205,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104226,7 +104273,6 @@ void m68000_device::movem_w_aips_list_dpm() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -104295,6 +104341,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104449,10 +104496,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104647,10 +104694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104803,10 +104850,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -104986,10 +105033,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105143,10 +105190,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105340,10 +105387,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105496,10 +105543,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105564,7 +105611,6 @@ void m68000_device::movem_l_aips_list_dpm() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -105657,6 +105703,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -105835,10 +105882,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106057,10 +106104,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106237,10 +106284,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106444,10 +106491,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106625,10 +106672,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -106846,10 +106893,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107050,11 +107097,11 @@ void m68000_device::trap_imm4_dpm() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107122,7 +107169,6 @@ void m68000_device::link_as_imm16_dpm() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -107171,6 +107217,7 @@ void m68000_device::link_as_imm16_dpm() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107237,7 +107284,6 @@ void m68000_device::unlk_as_dpm() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -107266,6 +107312,7 @@ void m68000_device::unlk_as_dpm() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107309,13 +107356,13 @@ void m68000_device::move_as_usp_dpm() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107360,13 +107407,13 @@ void m68000_device::move_usp_as_dpm() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107409,6 +107456,7 @@ void m68000_device::reset_dpm() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107418,7 +107466,6 @@ void m68000_device::reset_dpm() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -107439,6 +107486,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107477,11 +107525,11 @@ void m68000_device::nop_dpm() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107522,6 +107570,7 @@ void m68000_device::stop_i16u_dpm() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107531,6 +107580,7 @@ void m68000_device::stop_i16u_dpm() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -107659,11 +107709,11 @@ void m68000_device::rte_dpm() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107774,11 +107824,11 @@ void m68000_device::rts_dpm() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -107816,7 +107866,6 @@ void m68000_device::trapv_dpm() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -107827,6 +107876,7 @@ void m68000_device::trapv_dpm() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108038,11 +108088,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108182,11 +108232,11 @@ void m68000_device::rtr_dpm() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108273,7 +108323,6 @@ void m68000_device::jsr_ais_dpm() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108298,11 +108347,11 @@ void m68000_device::jsr_ais_dpm() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108395,7 +108444,6 @@ void m68000_device::jsr_das_dpm() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108420,11 +108468,11 @@ void m68000_device::jsr_das_dpm() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108537,7 +108585,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108562,11 +108609,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108655,7 +108702,6 @@ void m68000_device::jsr_adr16_dpm() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108680,11 +108726,11 @@ void m68000_device::jsr_adr16_dpm() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108795,7 +108841,6 @@ void m68000_device::jsr_adr32_dpm() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -108820,11 +108865,11 @@ void m68000_device::jsr_adr32_dpm() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -108916,7 +108961,6 @@ void m68000_device::jsr_dpc_dpm() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108941,11 +108985,11 @@ void m68000_device::jsr_dpc_dpm() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109057,7 +109101,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109082,11 +109125,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109148,11 +109191,11 @@ void m68000_device::jmp_ais_dpm() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109218,11 +109261,11 @@ void m68000_device::jmp_das_dpm() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109308,11 +109351,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109376,11 +109419,11 @@ void m68000_device::jmp_adr16_dpm() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109465,11 +109508,11 @@ void m68000_device::jmp_adr32_dpm() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109534,11 +109577,11 @@ void m68000_device::jmp_dpc_dpm() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109623,11 +109666,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109666,7 +109709,6 @@ void m68000_device::addq_b_imm3_ds_dpm() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -109674,6 +109716,7 @@ void m68000_device::addq_b_imm3_ds_dpm() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109737,7 +109780,6 @@ void m68000_device::addq_b_imm3_ais_dpm() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109768,6 +109810,7 @@ void m68000_device::addq_b_imm3_ais_dpm() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109827,7 +109870,6 @@ void m68000_device::addq_b_imm3_aips_dpm() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109858,6 +109900,7 @@ void m68000_device::addq_b_imm3_aips_dpm() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109919,7 +109962,6 @@ void m68000_device::addq_b_imm3_pais_dpm() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -109950,6 +109992,7 @@ void m68000_device::addq_b_imm3_pais_dpm() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110030,7 +110073,6 @@ void m68000_device::addq_b_imm3_das_dpm() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110061,6 +110103,7 @@ void m68000_device::addq_b_imm3_das_dpm() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110182,7 +110225,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110213,6 +110255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110292,7 +110335,6 @@ void m68000_device::addq_b_imm3_adr16_dpm() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110323,6 +110365,7 @@ void m68000_device::addq_b_imm3_adr16_dpm() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110426,7 +110469,6 @@ void m68000_device::addq_b_imm3_adr32_dpm() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110457,6 +110499,7 @@ void m68000_device::addq_b_imm3_adr32_dpm() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110489,7 +110532,6 @@ void m68000_device::addq_w_imm3_ds_dpm() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -110497,6 +110539,7 @@ void m68000_device::addq_w_imm3_ds_dpm() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110537,7 +110580,6 @@ void m68000_device::addq_w_imm3_as_dpm() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -110571,6 +110613,7 @@ void m68000_device::addq_w_imm3_as_dpm() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -110618,7 +110661,6 @@ void m68000_device::addq_w_imm3_ais_dpm() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110649,6 +110691,7 @@ void m68000_device::addq_w_imm3_ais_dpm() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110718,7 +110761,6 @@ void m68000_device::addq_w_imm3_aips_dpm() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110749,6 +110791,7 @@ void m68000_device::addq_w_imm3_aips_dpm() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110820,7 +110863,6 @@ void m68000_device::addq_w_imm3_pais_dpm() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110851,6 +110893,7 @@ void m68000_device::addq_w_imm3_pais_dpm() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110941,7 +110984,6 @@ void m68000_device::addq_w_imm3_das_dpm() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -110972,6 +111014,7 @@ void m68000_device::addq_w_imm3_das_dpm() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111103,7 +111146,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111134,6 +111176,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111223,7 +111266,6 @@ void m68000_device::addq_w_imm3_adr16_dpm() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111254,6 +111296,7 @@ void m68000_device::addq_w_imm3_adr16_dpm() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111367,7 +111410,6 @@ void m68000_device::addq_w_imm3_adr32_dpm() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111398,6 +111440,7 @@ void m68000_device::addq_w_imm3_adr32_dpm() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111436,7 +111479,6 @@ void m68000_device::addq_l_imm3_ds_dpm() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -111472,6 +111514,7 @@ void m68000_device::addq_l_imm3_ds_dpm() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111492,7 +111535,6 @@ void m68000_device::addq_l_imm3_as_dpm() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -111526,6 +111568,7 @@ void m68000_device::addq_l_imm3_as_dpm() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111597,7 +111640,6 @@ void m68000_device::addq_l_imm3_ais_dpm() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111654,6 +111696,7 @@ void m68000_device::addq_l_imm3_ais_dpm() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111746,7 +111789,6 @@ void m68000_device::addq_l_imm3_aips_dpm() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111803,6 +111845,7 @@ void m68000_device::addq_l_imm3_aips_dpm() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111896,7 +111939,6 @@ void m68000_device::addq_l_imm3_pais_dpm() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -111953,6 +111995,7 @@ void m68000_device::addq_l_imm3_pais_dpm() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112066,7 +112109,6 @@ void m68000_device::addq_l_imm3_das_dpm() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112123,6 +112165,7 @@ void m68000_device::addq_l_imm3_das_dpm() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112277,7 +112320,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112334,6 +112376,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112449,7 +112492,6 @@ void m68000_device::addq_l_imm3_adr16_dpm() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112506,6 +112548,7 @@ void m68000_device::addq_l_imm3_adr16_dpm() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112645,7 +112688,6 @@ void m68000_device::addq_l_imm3_adr32_dpm() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112702,6 +112744,7 @@ void m68000_device::addq_l_imm3_adr32_dpm() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112740,7 +112783,6 @@ void m68000_device::st_ds_dpm() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112752,6 +112794,7 @@ void m68000_device::st_ds_dpm() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112810,6 +112853,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112878,6 +112922,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112912,12 +112957,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112950,12 +112995,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -112990,6 +113035,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -113052,7 +113098,6 @@ void m68000_device::st_ais_dpm() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113120,6 +113165,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113182,7 +113228,6 @@ void m68000_device::st_aips_dpm() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113250,6 +113295,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113314,7 +113360,6 @@ void m68000_device::st_pais_dpm() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113382,6 +113427,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113465,7 +113511,6 @@ void m68000_device::st_das_dpm() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113533,6 +113578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113659,7 +113705,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113727,6 +113772,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113809,7 +113855,6 @@ void m68000_device::st_adr16_dpm() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113877,6 +113922,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113984,7 +114030,6 @@ void m68000_device::st_adr32_dpm() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114052,6 +114097,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114085,7 +114131,6 @@ void m68000_device::subq_b_imm3_ds_dpm() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114093,6 +114138,7 @@ void m68000_device::subq_b_imm3_ds_dpm() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114156,7 +114202,6 @@ void m68000_device::subq_b_imm3_ais_dpm() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114187,6 +114232,7 @@ void m68000_device::subq_b_imm3_ais_dpm() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114246,7 +114292,6 @@ void m68000_device::subq_b_imm3_aips_dpm() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114277,6 +114322,7 @@ void m68000_device::subq_b_imm3_aips_dpm() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114338,7 +114384,6 @@ void m68000_device::subq_b_imm3_pais_dpm() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114369,6 +114414,7 @@ void m68000_device::subq_b_imm3_pais_dpm() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114449,7 +114495,6 @@ void m68000_device::subq_b_imm3_das_dpm() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114480,6 +114525,7 @@ void m68000_device::subq_b_imm3_das_dpm() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114601,7 +114647,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114632,6 +114677,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114711,7 +114757,6 @@ void m68000_device::subq_b_imm3_adr16_dpm() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114742,6 +114787,7 @@ void m68000_device::subq_b_imm3_adr16_dpm() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114845,7 +114891,6 @@ void m68000_device::subq_b_imm3_adr32_dpm() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114876,6 +114921,7 @@ void m68000_device::subq_b_imm3_adr32_dpm() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114908,7 +114954,6 @@ void m68000_device::subq_w_imm3_ds_dpm() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114916,6 +114961,7 @@ void m68000_device::subq_w_imm3_ds_dpm() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -114956,7 +115002,6 @@ void m68000_device::subq_w_imm3_as_dpm() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -114990,6 +115035,7 @@ void m68000_device::subq_w_imm3_as_dpm() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115037,7 +115083,6 @@ void m68000_device::subq_w_imm3_ais_dpm() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115068,6 +115113,7 @@ void m68000_device::subq_w_imm3_ais_dpm() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115137,7 +115183,6 @@ void m68000_device::subq_w_imm3_aips_dpm() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115168,6 +115213,7 @@ void m68000_device::subq_w_imm3_aips_dpm() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115239,7 +115285,6 @@ void m68000_device::subq_w_imm3_pais_dpm() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115270,6 +115315,7 @@ void m68000_device::subq_w_imm3_pais_dpm() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115360,7 +115406,6 @@ void m68000_device::subq_w_imm3_das_dpm() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115391,6 +115436,7 @@ void m68000_device::subq_w_imm3_das_dpm() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115522,7 +115568,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115553,6 +115598,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115642,7 +115688,6 @@ void m68000_device::subq_w_imm3_adr16_dpm() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115673,6 +115718,7 @@ void m68000_device::subq_w_imm3_adr16_dpm() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115786,7 +115832,6 @@ void m68000_device::subq_w_imm3_adr32_dpm() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -115817,6 +115862,7 @@ void m68000_device::subq_w_imm3_adr32_dpm() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -115855,7 +115901,6 @@ void m68000_device::subq_l_imm3_ds_dpm() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -115891,6 +115936,7 @@ void m68000_device::subq_l_imm3_ds_dpm() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115911,7 +115957,6 @@ void m68000_device::subq_l_imm3_as_dpm() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -115945,6 +115990,7 @@ void m68000_device::subq_l_imm3_as_dpm() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -116016,7 +116062,6 @@ void m68000_device::subq_l_imm3_ais_dpm() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116073,6 +116118,7 @@ void m68000_device::subq_l_imm3_ais_dpm() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116165,7 +116211,6 @@ void m68000_device::subq_l_imm3_aips_dpm() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116222,6 +116267,7 @@ void m68000_device::subq_l_imm3_aips_dpm() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116315,7 +116361,6 @@ void m68000_device::subq_l_imm3_pais_dpm() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116372,6 +116417,7 @@ void m68000_device::subq_l_imm3_pais_dpm() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116485,7 +116531,6 @@ void m68000_device::subq_l_imm3_das_dpm() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116542,6 +116587,7 @@ void m68000_device::subq_l_imm3_das_dpm() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116696,7 +116742,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116753,6 +116798,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116868,7 +116914,6 @@ void m68000_device::subq_l_imm3_adr16_dpm() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -116925,6 +116970,7 @@ void m68000_device::subq_l_imm3_adr16_dpm() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -117064,7 +117110,6 @@ void m68000_device::subq_l_imm3_adr32_dpm() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117121,6 +117166,7 @@ void m68000_device::subq_l_imm3_adr32_dpm() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -117159,7 +117205,6 @@ void m68000_device::sf_ds_dpm() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117171,6 +117216,7 @@ void m68000_device::sf_ds_dpm() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117229,6 +117275,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117297,6 +117344,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117331,12 +117379,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117369,12 +117417,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117409,6 +117457,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -117471,7 +117520,6 @@ void m68000_device::sf_ais_dpm() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117539,6 +117587,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117601,7 +117650,6 @@ void m68000_device::sf_aips_dpm() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117669,6 +117717,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117733,7 +117782,6 @@ void m68000_device::sf_pais_dpm() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117801,6 +117849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117884,7 +117933,6 @@ void m68000_device::sf_das_dpm() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117952,6 +118000,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118078,7 +118127,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118146,6 +118194,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118228,7 +118277,6 @@ void m68000_device::sf_adr16_dpm() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118296,6 +118344,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118403,7 +118452,6 @@ void m68000_device::sf_adr32_dpm() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118471,6 +118519,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -118504,7 +118553,6 @@ void m68000_device::shi_ds_dpm() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118516,6 +118564,7 @@ void m68000_device::shi_ds_dpm() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118574,6 +118623,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118642,6 +118692,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118676,12 +118727,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118714,12 +118765,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118754,6 +118805,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -118816,7 +118868,6 @@ void m68000_device::shi_ais_dpm() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118884,6 +118935,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -118946,7 +118998,6 @@ void m68000_device::shi_aips_dpm() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119014,6 +119065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119078,7 +119130,6 @@ void m68000_device::shi_pais_dpm() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119146,6 +119197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119229,7 +119281,6 @@ void m68000_device::shi_das_dpm() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119297,6 +119348,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119423,7 +119475,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119491,6 +119542,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119573,7 +119625,6 @@ void m68000_device::shi_adr16_dpm() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119641,6 +119692,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119748,7 +119800,6 @@ void m68000_device::shi_adr32_dpm() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119816,6 +119867,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -119849,7 +119901,6 @@ void m68000_device::sls_ds_dpm() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119861,6 +119912,7 @@ void m68000_device::sls_ds_dpm() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -119919,6 +119971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119987,6 +120040,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -120021,12 +120075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -120059,12 +120113,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -120099,6 +120153,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -120161,7 +120216,6 @@ void m68000_device::sls_ais_dpm() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120229,6 +120283,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120291,7 +120346,6 @@ void m68000_device::sls_aips_dpm() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120359,6 +120413,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120423,7 +120478,6 @@ void m68000_device::sls_pais_dpm() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120491,6 +120545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120574,7 +120629,6 @@ void m68000_device::sls_das_dpm() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120642,6 +120696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120768,7 +120823,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120836,6 +120890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120918,7 +120973,6 @@ void m68000_device::sls_adr16_dpm() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120986,6 +121040,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -121093,7 +121148,6 @@ void m68000_device::sls_adr32_dpm() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121161,6 +121215,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -121194,7 +121249,6 @@ void m68000_device::scc_ds_dpm() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121206,6 +121260,7 @@ void m68000_device::scc_ds_dpm() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121264,6 +121319,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -121332,6 +121388,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -121366,12 +121423,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121404,12 +121461,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121444,6 +121501,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -121506,7 +121564,6 @@ void m68000_device::scc_ais_dpm() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121574,6 +121631,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121636,7 +121694,6 @@ void m68000_device::scc_aips_dpm() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121704,6 +121761,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121768,7 +121826,6 @@ void m68000_device::scc_pais_dpm() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121836,6 +121893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121919,7 +121977,6 @@ void m68000_device::scc_das_dpm() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121987,6 +122044,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122113,7 +122171,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122181,6 +122238,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122263,7 +122321,6 @@ void m68000_device::scc_adr16_dpm() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122331,6 +122388,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122438,7 +122496,6 @@ void m68000_device::scc_adr32_dpm() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122506,6 +122563,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -122539,7 +122597,6 @@ void m68000_device::scs_ds_dpm() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122551,6 +122608,7 @@ void m68000_device::scs_ds_dpm() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122609,6 +122667,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -122677,6 +122736,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -122711,12 +122771,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122749,12 +122809,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122789,6 +122849,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -122851,7 +122912,6 @@ void m68000_device::scs_ais_dpm() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122919,6 +122979,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -122981,7 +123042,6 @@ void m68000_device::scs_aips_dpm() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123049,6 +123109,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123113,7 +123174,6 @@ void m68000_device::scs_pais_dpm() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123181,6 +123241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123264,7 +123325,6 @@ void m68000_device::scs_das_dpm() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123332,6 +123392,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123458,7 +123519,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123526,6 +123586,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123608,7 +123669,6 @@ void m68000_device::scs_adr16_dpm() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123676,6 +123736,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123783,7 +123844,6 @@ void m68000_device::scs_adr32_dpm() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123851,6 +123911,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -123884,7 +123945,6 @@ void m68000_device::sne_ds_dpm() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123896,6 +123956,7 @@ void m68000_device::sne_ds_dpm() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -123954,6 +124015,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -124022,6 +124084,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -124056,12 +124119,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -124094,12 +124157,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -124134,6 +124197,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -124196,7 +124260,6 @@ void m68000_device::sne_ais_dpm() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124264,6 +124327,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124326,7 +124390,6 @@ void m68000_device::sne_aips_dpm() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124394,6 +124457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124458,7 +124522,6 @@ void m68000_device::sne_pais_dpm() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124526,6 +124589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124609,7 +124673,6 @@ void m68000_device::sne_das_dpm() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124677,6 +124740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124803,7 +124867,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124871,6 +124934,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124953,7 +125017,6 @@ void m68000_device::sne_adr16_dpm() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125021,6 +125084,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -125128,7 +125192,6 @@ void m68000_device::sne_adr32_dpm() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125196,6 +125259,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -125229,7 +125293,6 @@ void m68000_device::seq_ds_dpm() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125241,6 +125304,7 @@ void m68000_device::seq_ds_dpm() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125299,6 +125363,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -125367,6 +125432,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -125401,12 +125467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125439,12 +125505,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125479,6 +125545,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -125541,7 +125608,6 @@ void m68000_device::seq_ais_dpm() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125609,6 +125675,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125671,7 +125738,6 @@ void m68000_device::seq_aips_dpm() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125739,6 +125805,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125803,7 +125870,6 @@ void m68000_device::seq_pais_dpm() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125871,6 +125937,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125954,7 +126021,6 @@ void m68000_device::seq_das_dpm() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126022,6 +126088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126148,7 +126215,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126216,6 +126282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126298,7 +126365,6 @@ void m68000_device::seq_adr16_dpm() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126366,6 +126432,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126473,7 +126540,6 @@ void m68000_device::seq_adr32_dpm() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126541,6 +126607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -126574,7 +126641,6 @@ void m68000_device::svc_ds_dpm() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126586,6 +126652,7 @@ void m68000_device::svc_ds_dpm() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126644,6 +126711,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -126712,6 +126780,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -126746,12 +126815,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126784,12 +126853,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126824,6 +126893,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -126886,7 +126956,6 @@ void m68000_device::svc_ais_dpm() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126954,6 +127023,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127016,7 +127086,6 @@ void m68000_device::svc_aips_dpm() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127084,6 +127153,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127148,7 +127218,6 @@ void m68000_device::svc_pais_dpm() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127216,6 +127285,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127299,7 +127369,6 @@ void m68000_device::svc_das_dpm() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127367,6 +127436,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127493,7 +127563,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127561,6 +127630,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127643,7 +127713,6 @@ void m68000_device::svc_adr16_dpm() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127711,6 +127780,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127818,7 +127888,6 @@ void m68000_device::svc_adr32_dpm() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127886,6 +127955,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -127919,7 +127989,6 @@ void m68000_device::svs_ds_dpm() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127931,6 +128000,7 @@ void m68000_device::svs_ds_dpm() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -127989,6 +128059,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -128057,6 +128128,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -128091,12 +128163,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -128129,12 +128201,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -128169,6 +128241,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -128231,7 +128304,6 @@ void m68000_device::svs_ais_dpm() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128299,6 +128371,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128361,7 +128434,6 @@ void m68000_device::svs_aips_dpm() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128429,6 +128501,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128493,7 +128566,6 @@ void m68000_device::svs_pais_dpm() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128561,6 +128633,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128644,7 +128717,6 @@ void m68000_device::svs_das_dpm() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128712,6 +128784,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128838,7 +128911,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128906,6 +128978,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128988,7 +129061,6 @@ void m68000_device::svs_adr16_dpm() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129056,6 +129128,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -129163,7 +129236,6 @@ void m68000_device::svs_adr32_dpm() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129231,6 +129303,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -129264,7 +129337,6 @@ void m68000_device::spl_ds_dpm() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129276,6 +129348,7 @@ void m68000_device::spl_ds_dpm() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129334,6 +129407,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -129402,6 +129476,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -129436,12 +129511,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129474,12 +129549,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129514,6 +129589,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -129576,7 +129652,6 @@ void m68000_device::spl_ais_dpm() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129644,6 +129719,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129706,7 +129782,6 @@ void m68000_device::spl_aips_dpm() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129774,6 +129849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129838,7 +129914,6 @@ void m68000_device::spl_pais_dpm() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129906,6 +129981,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129989,7 +130065,6 @@ void m68000_device::spl_das_dpm() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130057,6 +130132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130183,7 +130259,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130251,6 +130326,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130333,7 +130409,6 @@ void m68000_device::spl_adr16_dpm() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130401,6 +130476,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130508,7 +130584,6 @@ void m68000_device::spl_adr32_dpm() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130576,6 +130651,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -130609,7 +130685,6 @@ void m68000_device::smi_ds_dpm() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130621,6 +130696,7 @@ void m68000_device::smi_ds_dpm() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130679,6 +130755,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -130747,6 +130824,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -130781,12 +130859,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130819,12 +130897,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130859,6 +130937,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -130921,7 +131000,6 @@ void m68000_device::smi_ais_dpm() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130989,6 +131067,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131051,7 +131130,6 @@ void m68000_device::smi_aips_dpm() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131119,6 +131197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131183,7 +131262,6 @@ void m68000_device::smi_pais_dpm() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131251,6 +131329,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131334,7 +131413,6 @@ void m68000_device::smi_das_dpm() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131402,6 +131480,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131528,7 +131607,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131596,6 +131674,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131678,7 +131757,6 @@ void m68000_device::smi_adr16_dpm() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131746,6 +131824,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131853,7 +131932,6 @@ void m68000_device::smi_adr32_dpm() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131921,6 +131999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -131954,7 +132033,6 @@ void m68000_device::sge_ds_dpm() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131966,6 +132044,7 @@ void m68000_device::sge_ds_dpm() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132024,6 +132103,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -132092,6 +132172,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -132126,12 +132207,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132164,12 +132245,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132204,6 +132285,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -132266,7 +132348,6 @@ void m68000_device::sge_ais_dpm() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132334,6 +132415,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132396,7 +132478,6 @@ void m68000_device::sge_aips_dpm() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132464,6 +132545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132528,7 +132610,6 @@ void m68000_device::sge_pais_dpm() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132596,6 +132677,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132679,7 +132761,6 @@ void m68000_device::sge_das_dpm() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132747,6 +132828,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -132873,7 +132955,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132941,6 +133022,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133023,7 +133105,6 @@ void m68000_device::sge_adr16_dpm() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133091,6 +133172,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133198,7 +133280,6 @@ void m68000_device::sge_adr32_dpm() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133266,6 +133347,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -133299,7 +133381,6 @@ void m68000_device::slt_ds_dpm() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133311,6 +133392,7 @@ void m68000_device::slt_ds_dpm() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133369,6 +133451,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -133437,6 +133520,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -133471,12 +133555,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133509,12 +133593,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133549,6 +133633,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -133611,7 +133696,6 @@ void m68000_device::slt_ais_dpm() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133679,6 +133763,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133741,7 +133826,6 @@ void m68000_device::slt_aips_dpm() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133809,6 +133893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133873,7 +133958,6 @@ void m68000_device::slt_pais_dpm() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133941,6 +134025,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -134024,7 +134109,6 @@ void m68000_device::slt_das_dpm() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134092,6 +134176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134218,7 +134303,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134286,6 +134370,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134368,7 +134453,6 @@ void m68000_device::slt_adr16_dpm() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134436,6 +134520,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134543,7 +134628,6 @@ void m68000_device::slt_adr32_dpm() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134611,6 +134695,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -134644,7 +134729,6 @@ void m68000_device::sgt_ds_dpm() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134656,6 +134740,7 @@ void m68000_device::sgt_ds_dpm() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134714,6 +134799,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -134782,6 +134868,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -134816,12 +134903,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134854,12 +134941,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134894,6 +134981,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -134956,7 +135044,6 @@ void m68000_device::sgt_ais_dpm() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135024,6 +135111,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135086,7 +135174,6 @@ void m68000_device::sgt_aips_dpm() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135154,6 +135241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135218,7 +135306,6 @@ void m68000_device::sgt_pais_dpm() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135286,6 +135373,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135369,7 +135457,6 @@ void m68000_device::sgt_das_dpm() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135437,6 +135524,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135563,7 +135651,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135631,6 +135718,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135713,7 +135801,6 @@ void m68000_device::sgt_adr16_dpm() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135781,6 +135868,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135888,7 +135976,6 @@ void m68000_device::sgt_adr32_dpm() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135956,6 +136043,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -135989,7 +136077,6 @@ void m68000_device::sle_ds_dpm() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136001,6 +136088,7 @@ void m68000_device::sle_ds_dpm() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136059,6 +136147,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -136127,6 +136216,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -136161,12 +136251,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136199,12 +136289,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136239,6 +136329,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -136301,7 +136392,6 @@ void m68000_device::sle_ais_dpm() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136369,6 +136459,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136431,7 +136522,6 @@ void m68000_device::sle_aips_dpm() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136499,6 +136589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136563,7 +136654,6 @@ void m68000_device::sle_pais_dpm() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136631,6 +136721,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136714,7 +136805,6 @@ void m68000_device::sle_das_dpm() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136782,6 +136872,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -136908,7 +136999,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136976,6 +137066,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137058,7 +137149,6 @@ void m68000_device::sle_adr16_dpm() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137126,6 +137216,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137233,7 +137324,6 @@ void m68000_device::sle_adr32_dpm() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137301,6 +137391,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -137341,6 +137432,7 @@ void m68000_device::bra_rel16_dpm() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137404,11 +137496,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137454,6 +137546,7 @@ void m68000_device::bra_rel8_dpm() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137490,11 +137583,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137612,11 +137705,11 @@ void m68000_device::bsr_rel16_dpm() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137734,11 +137827,11 @@ void m68000_device::bsr_rel8_dpm() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137784,6 +137877,7 @@ void m68000_device::bhi_rel16_dpm() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137847,11 +137941,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137897,6 +137991,7 @@ void m68000_device::bhi_rel8_dpm() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137933,11 +138028,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -137983,6 +138078,7 @@ void m68000_device::bls_rel16_dpm() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138046,11 +138142,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138096,6 +138192,7 @@ void m68000_device::bls_rel8_dpm() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138132,11 +138229,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138182,6 +138279,7 @@ void m68000_device::bcc_rel16_dpm() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138245,11 +138343,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138295,6 +138393,7 @@ void m68000_device::bcc_rel8_dpm() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138331,11 +138430,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138381,6 +138480,7 @@ void m68000_device::bcs_rel16_dpm() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138444,11 +138544,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138494,6 +138594,7 @@ void m68000_device::bcs_rel8_dpm() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138530,11 +138631,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138580,6 +138681,7 @@ void m68000_device::bne_rel16_dpm() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138643,11 +138745,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138693,6 +138795,7 @@ void m68000_device::bne_rel8_dpm() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138729,11 +138832,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138779,6 +138882,7 @@ void m68000_device::beq_rel16_dpm() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138842,11 +138946,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138892,6 +138996,7 @@ void m68000_device::beq_rel8_dpm() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138928,11 +139033,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -138978,6 +139083,7 @@ void m68000_device::bvc_rel16_dpm() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139041,11 +139147,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139091,6 +139197,7 @@ void m68000_device::bvc_rel8_dpm() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139127,11 +139234,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139177,6 +139284,7 @@ void m68000_device::bvs_rel16_dpm() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139240,11 +139348,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139290,6 +139398,7 @@ void m68000_device::bvs_rel8_dpm() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139326,11 +139435,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139376,6 +139485,7 @@ void m68000_device::bpl_rel16_dpm() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139439,11 +139549,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139489,6 +139599,7 @@ void m68000_device::bpl_rel8_dpm() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139525,11 +139636,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139575,6 +139686,7 @@ void m68000_device::bmi_rel16_dpm() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139638,11 +139750,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139688,6 +139800,7 @@ void m68000_device::bmi_rel8_dpm() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139724,11 +139837,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139774,6 +139887,7 @@ void m68000_device::bge_rel16_dpm() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139837,11 +139951,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139887,6 +140001,7 @@ void m68000_device::bge_rel8_dpm() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139923,11 +140038,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -139973,6 +140088,7 @@ void m68000_device::blt_rel16_dpm() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140036,11 +140152,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140086,6 +140202,7 @@ void m68000_device::blt_rel8_dpm() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140122,11 +140239,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140172,6 +140289,7 @@ void m68000_device::bgt_rel16_dpm() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140235,11 +140353,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140285,6 +140403,7 @@ void m68000_device::bgt_rel8_dpm() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140321,11 +140440,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140371,6 +140490,7 @@ void m68000_device::ble_rel16_dpm() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140434,11 +140554,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140484,6 +140604,7 @@ void m68000_device::ble_rel8_dpm() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140520,11 +140641,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140563,7 +140684,6 @@ void m68000_device::moveq_imm8o_dd_dpm() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -140572,6 +140692,7 @@ void m68000_device::moveq_imm8o_dd_dpm() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140611,7 +140732,6 @@ void m68000_device::or_b_ds_dd_dpm() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140619,6 +140739,7 @@ void m68000_device::or_b_ds_dd_dpm() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140685,7 +140806,6 @@ void m68000_device::or_b_ais_dd_dpm() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140693,6 +140813,7 @@ void m68000_device::or_b_ais_dd_dpm() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140764,7 +140885,6 @@ void m68000_device::or_b_aips_dd_dpm() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140772,6 +140892,7 @@ void m68000_device::or_b_aips_dd_dpm() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140845,7 +140966,6 @@ void m68000_device::or_b_pais_dd_dpm() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140853,6 +140973,7 @@ void m68000_device::or_b_pais_dd_dpm() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -140945,7 +141066,6 @@ void m68000_device::or_b_das_dd_dpm() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140953,6 +141073,7 @@ void m68000_device::or_b_das_dd_dpm() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141088,7 +141209,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141096,6 +141216,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141187,7 +141308,6 @@ void m68000_device::or_b_adr16_dd_dpm() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141195,6 +141315,7 @@ void m68000_device::or_b_adr16_dd_dpm() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141311,7 +141432,6 @@ void m68000_device::or_b_adr32_dd_dpm() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141319,6 +141439,7 @@ void m68000_device::or_b_adr32_dd_dpm() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141410,7 +141531,6 @@ void m68000_device::or_b_dpc_dd_dpm() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141418,6 +141538,7 @@ void m68000_device::or_b_dpc_dd_dpm() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141552,7 +141673,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141560,6 +141680,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141629,7 +141750,6 @@ void m68000_device::or_b_imm8_dd_dpm() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141637,6 +141757,7 @@ void m68000_device::or_b_imm8_dd_dpm() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141679,7 +141800,6 @@ void m68000_device::or_w_ds_dd_dpm() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141687,6 +141807,7 @@ void m68000_device::or_w_ds_dd_dpm() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141757,7 +141878,6 @@ void m68000_device::or_w_ais_dd_dpm() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141765,6 +141885,7 @@ void m68000_device::or_w_ais_dd_dpm() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141840,7 +141961,6 @@ void m68000_device::or_w_aips_dd_dpm() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141848,6 +141968,7 @@ void m68000_device::or_w_aips_dd_dpm() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -141925,7 +142046,6 @@ void m68000_device::or_w_pais_dd_dpm() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141933,6 +142053,7 @@ void m68000_device::or_w_pais_dd_dpm() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142029,7 +142150,6 @@ void m68000_device::or_w_das_dd_dpm() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142037,6 +142157,7 @@ void m68000_device::or_w_das_dd_dpm() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142176,7 +142297,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142184,6 +142304,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142279,7 +142400,6 @@ void m68000_device::or_w_adr16_dd_dpm() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142287,6 +142407,7 @@ void m68000_device::or_w_adr16_dd_dpm() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142407,7 +142528,6 @@ void m68000_device::or_w_adr32_dd_dpm() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142415,6 +142535,7 @@ void m68000_device::or_w_adr32_dd_dpm() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142510,7 +142631,6 @@ void m68000_device::or_w_dpc_dd_dpm() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142518,6 +142638,7 @@ void m68000_device::or_w_dpc_dd_dpm() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142656,7 +142777,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142664,6 +142784,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142733,7 +142854,6 @@ void m68000_device::or_w_imm16_dd_dpm() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142741,6 +142861,7 @@ void m68000_device::or_w_imm16_dd_dpm() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -142783,7 +142904,6 @@ void m68000_device::or_l_ds_dd_dpm() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142820,6 +142940,7 @@ void m68000_device::or_l_ds_dd_dpm() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -142894,7 +143015,6 @@ void m68000_device::or_l_ais_dd_dpm() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142928,6 +143048,7 @@ void m68000_device::or_l_ais_dd_dpm() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143006,7 +143127,6 @@ void m68000_device::or_l_aips_dd_dpm() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143040,6 +143160,7 @@ void m68000_device::or_l_aips_dd_dpm() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143119,7 +143240,6 @@ void m68000_device::or_l_pais_dd_dpm() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143153,6 +143273,7 @@ void m68000_device::or_l_pais_dd_dpm() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143252,7 +143373,6 @@ void m68000_device::or_l_das_dd_dpm() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143286,6 +143406,7 @@ void m68000_device::or_l_das_dd_dpm() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143428,7 +143549,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143462,6 +143582,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143564,7 +143685,6 @@ void m68000_device::or_l_adr16_dd_dpm() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143598,6 +143718,7 @@ void m68000_device::or_l_adr16_dd_dpm() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143725,7 +143846,6 @@ void m68000_device::or_l_adr32_dd_dpm() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143759,6 +143879,7 @@ void m68000_device::or_l_adr32_dd_dpm() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143857,7 +143978,6 @@ void m68000_device::or_l_dpc_dd_dpm() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143891,6 +144011,7 @@ void m68000_device::or_l_dpc_dd_dpm() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144032,7 +144153,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -144066,6 +144186,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144140,7 +144261,6 @@ void m68000_device::or_l_imm32_dd_dpm() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -144177,6 +144297,7 @@ void m68000_device::or_l_imm32_dd_dpm() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144396,11 +144517,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144432,10 +144553,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144549,7 +144670,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144559,7 +144679,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -144569,6 +144688,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144836,11 +144956,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144872,10 +144992,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -144989,7 +145109,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144999,7 +145118,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145009,6 +145127,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145280,11 +145399,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145316,10 +145435,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145433,7 +145552,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145443,7 +145561,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145453,6 +145570,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145726,11 +145844,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145762,10 +145880,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -145879,7 +145997,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145889,7 +146006,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145899,6 +146015,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146191,11 +146308,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146227,10 +146344,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146344,7 +146461,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146354,7 +146470,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146364,6 +146479,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146697,11 +146813,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146733,10 +146849,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -146850,7 +146966,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146860,7 +146975,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146870,6 +146984,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147161,11 +147276,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147197,10 +147312,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147314,7 +147429,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147324,7 +147438,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147334,6 +147447,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147649,11 +147763,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147685,10 +147799,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -147802,7 +147916,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147812,7 +147925,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147822,6 +147934,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148113,11 +148226,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148149,10 +148262,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148266,7 +148379,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148276,7 +148388,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148286,6 +148397,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148618,11 +148730,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148654,10 +148766,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -148771,7 +148883,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148781,7 +148892,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148791,6 +148901,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149057,11 +149168,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149093,10 +149204,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149210,7 +149321,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -149220,7 +149330,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -149230,6 +149339,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149273,7 +149383,6 @@ void m68000_device::sbcd_ds_dd_dpm() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149305,6 +149414,7 @@ void m68000_device::sbcd_ds_dd_dpm() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -149355,7 +149465,6 @@ void m68000_device::sbcd_pais_paid_dpm() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -149407,6 +149516,7 @@ void m68000_device::sbcd_pais_paid_dpm() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149464,7 +149574,6 @@ void m68000_device::or_b_dd_ais_dpm() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149494,6 +149603,7 @@ void m68000_device::or_b_dd_ais_dpm() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149557,7 +149667,6 @@ void m68000_device::or_b_dd_aips_dpm() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149587,6 +149696,7 @@ void m68000_device::or_b_dd_aips_dpm() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149652,7 +149762,6 @@ void m68000_device::or_b_dd_pais_dpm() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149682,6 +149791,7 @@ void m68000_device::or_b_dd_pais_dpm() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149766,7 +149876,6 @@ void m68000_device::or_b_dd_das_dpm() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149796,6 +149905,7 @@ void m68000_device::or_b_dd_das_dpm() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149923,7 +150033,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -149953,6 +150062,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150036,7 +150146,6 @@ void m68000_device::or_b_dd_adr16_dpm() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150066,6 +150175,7 @@ void m68000_device::or_b_dd_adr16_dpm() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150174,7 +150284,6 @@ void m68000_device::or_b_dd_adr32_dpm() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150204,6 +150313,7 @@ void m68000_device::or_b_dd_adr32_dpm() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -150266,7 +150376,6 @@ void m68000_device::or_w_dd_ais_dpm() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150296,6 +150405,7 @@ void m68000_device::or_w_dd_ais_dpm() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150369,7 +150479,6 @@ void m68000_device::or_w_dd_aips_dpm() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150399,6 +150508,7 @@ void m68000_device::or_w_dd_aips_dpm() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150474,7 +150584,6 @@ void m68000_device::or_w_dd_pais_dpm() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150504,6 +150613,7 @@ void m68000_device::or_w_dd_pais_dpm() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150598,7 +150708,6 @@ void m68000_device::or_w_dd_das_dpm() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150628,6 +150737,7 @@ void m68000_device::or_w_dd_das_dpm() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150765,7 +150875,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150795,6 +150904,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150888,7 +150998,6 @@ void m68000_device::or_w_dd_adr16_dpm() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -150918,6 +151027,7 @@ void m68000_device::or_w_dd_adr16_dpm() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -151036,7 +151146,6 @@ void m68000_device::or_w_dd_adr32_dpm() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151066,6 +151175,7 @@ void m68000_device::or_w_dd_adr32_dpm() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151158,7 +151268,6 @@ void m68000_device::or_l_dd_ais_dpm() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151214,6 +151323,7 @@ void m68000_device::or_l_dd_ais_dpm() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151310,7 +151420,6 @@ void m68000_device::or_l_dd_aips_dpm() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151366,6 +151475,7 @@ void m68000_device::or_l_dd_aips_dpm() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151463,7 +151573,6 @@ void m68000_device::or_l_dd_pais_dpm() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151519,6 +151628,7 @@ void m68000_device::or_l_dd_pais_dpm() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151636,7 +151746,6 @@ void m68000_device::or_l_dd_das_dpm() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151692,6 +151801,7 @@ void m68000_device::or_l_dd_das_dpm() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -151852,7 +151962,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -151908,6 +152017,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152028,7 +152138,6 @@ void m68000_device::or_l_dd_adr16_dpm() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152084,6 +152193,7 @@ void m68000_device::or_l_dd_adr16_dpm() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152229,7 +152339,6 @@ void m68000_device::or_l_dd_adr32_dpm() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152285,6 +152394,7 @@ void m68000_device::or_l_dd_adr32_dpm() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -152530,11 +152640,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152607,7 +152717,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -152620,6 +152729,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152751,7 +152861,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -152782,7 +152891,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -152814,6 +152922,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -152847,14 +152956,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153105,11 +153212,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153182,7 +153289,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153195,6 +153301,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153326,7 +153433,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153357,7 +153463,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153389,6 +153494,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153422,14 +153528,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153684,11 +153788,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153761,7 +153865,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153774,6 +153877,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -153905,7 +154009,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153936,7 +154039,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153968,6 +154070,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154001,14 +154104,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154265,11 +154366,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154342,7 +154443,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154355,6 +154455,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154486,7 +154587,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -154517,7 +154617,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -154549,6 +154648,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154582,14 +154682,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154865,11 +154963,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -154942,7 +155040,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154955,6 +155052,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155086,7 +155184,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155117,7 +155214,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155149,6 +155245,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155182,14 +155279,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -155506,11 +155601,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155583,7 +155678,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -155596,6 +155690,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155727,7 +155822,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155758,7 +155852,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155790,6 +155883,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -155823,14 +155917,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156105,11 +156197,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156182,7 +156274,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156195,6 +156286,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156326,7 +156418,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156357,7 +156448,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -156389,6 +156479,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156422,14 +156513,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156728,11 +156817,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156805,7 +156894,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156818,6 +156906,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -156949,7 +157038,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156980,7 +157068,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157012,6 +157099,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157045,14 +157133,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157327,11 +157413,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157404,7 +157490,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -157417,6 +157502,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157548,7 +157634,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -157579,7 +157664,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157611,6 +157695,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -157644,14 +157729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157967,11 +158050,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158044,7 +158127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158057,6 +158139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158188,7 +158271,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158219,7 +158301,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158251,6 +158332,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158284,14 +158366,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158541,11 +158621,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158618,7 +158698,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158631,6 +158710,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158762,7 +158842,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158793,7 +158872,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158825,6 +158903,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158858,14 +158937,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158884,7 +158961,6 @@ void m68000_device::sub_b_ds_dd_dpm() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158892,6 +158968,7 @@ void m68000_device::sub_b_ds_dd_dpm() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -158956,7 +159033,6 @@ void m68000_device::sub_b_ais_dd_dpm() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158964,6 +159040,7 @@ void m68000_device::sub_b_ais_dd_dpm() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159032,7 +159109,6 @@ void m68000_device::sub_b_aips_dd_dpm() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159040,6 +159116,7 @@ void m68000_device::sub_b_aips_dd_dpm() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159110,7 +159187,6 @@ void m68000_device::sub_b_pais_dd_dpm() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159118,6 +159194,7 @@ void m68000_device::sub_b_pais_dd_dpm() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159207,7 +159284,6 @@ void m68000_device::sub_b_das_dd_dpm() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159215,6 +159291,7 @@ void m68000_device::sub_b_das_dd_dpm() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159345,7 +159422,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159353,6 +159429,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159441,7 +159518,6 @@ void m68000_device::sub_b_adr16_dd_dpm() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159449,6 +159525,7 @@ void m68000_device::sub_b_adr16_dd_dpm() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159561,7 +159638,6 @@ void m68000_device::sub_b_adr32_dd_dpm() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159569,6 +159645,7 @@ void m68000_device::sub_b_adr32_dd_dpm() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159657,7 +159734,6 @@ void m68000_device::sub_b_dpc_dd_dpm() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159665,6 +159741,7 @@ void m68000_device::sub_b_dpc_dd_dpm() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159794,7 +159871,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159802,6 +159878,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159869,7 +159946,6 @@ void m68000_device::sub_b_imm8_dd_dpm() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -159877,6 +159953,7 @@ void m68000_device::sub_b_imm8_dd_dpm() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159918,7 +159995,6 @@ void m68000_device::sub_w_ds_dd_dpm() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159926,6 +160002,7 @@ void m68000_device::sub_w_ds_dd_dpm() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -159967,7 +160044,6 @@ void m68000_device::sub_w_as_dd_dpm() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -159975,6 +160051,7 @@ void m68000_device::sub_w_as_dd_dpm() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160043,7 +160120,6 @@ void m68000_device::sub_w_ais_dd_dpm() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160051,6 +160127,7 @@ void m68000_device::sub_w_ais_dd_dpm() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160123,7 +160200,6 @@ void m68000_device::sub_w_aips_dd_dpm() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160131,6 +160207,7 @@ void m68000_device::sub_w_aips_dd_dpm() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160205,7 +160282,6 @@ void m68000_device::sub_w_pais_dd_dpm() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160213,6 +160289,7 @@ void m68000_device::sub_w_pais_dd_dpm() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160306,7 +160383,6 @@ void m68000_device::sub_w_das_dd_dpm() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160314,6 +160390,7 @@ void m68000_device::sub_w_das_dd_dpm() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160448,7 +160525,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160456,6 +160532,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160548,7 +160625,6 @@ void m68000_device::sub_w_adr16_dd_dpm() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160556,6 +160632,7 @@ void m68000_device::sub_w_adr16_dd_dpm() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160672,7 +160749,6 @@ void m68000_device::sub_w_adr32_dd_dpm() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160680,6 +160756,7 @@ void m68000_device::sub_w_adr32_dd_dpm() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160772,7 +160849,6 @@ void m68000_device::sub_w_dpc_dd_dpm() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160780,6 +160856,7 @@ void m68000_device::sub_w_dpc_dd_dpm() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160913,7 +160990,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160921,6 +160997,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -160988,7 +161065,6 @@ void m68000_device::sub_w_imm16_dd_dpm() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160996,6 +161072,7 @@ void m68000_device::sub_w_imm16_dd_dpm() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -161037,7 +161114,6 @@ void m68000_device::sub_l_ds_dd_dpm() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161073,6 +161149,7 @@ void m68000_device::sub_l_ds_dd_dpm() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161094,7 +161171,6 @@ void m68000_device::sub_l_as_dd_dpm() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -161130,6 +161206,7 @@ void m68000_device::sub_l_as_dd_dpm() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161202,7 +161279,6 @@ void m68000_device::sub_l_ais_dd_dpm() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161236,6 +161312,7 @@ void m68000_device::sub_l_ais_dd_dpm() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161311,7 +161388,6 @@ void m68000_device::sub_l_aips_dd_dpm() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161345,6 +161421,7 @@ void m68000_device::sub_l_aips_dd_dpm() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161421,7 +161498,6 @@ void m68000_device::sub_l_pais_dd_dpm() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161455,6 +161531,7 @@ void m68000_device::sub_l_pais_dd_dpm() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161551,7 +161628,6 @@ void m68000_device::sub_l_das_dd_dpm() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161585,6 +161661,7 @@ void m68000_device::sub_l_das_dd_dpm() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161722,7 +161799,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161756,6 +161832,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161854,7 +161931,6 @@ void m68000_device::sub_l_adr16_dd_dpm() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161888,6 +161964,7 @@ void m68000_device::sub_l_adr16_dd_dpm() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162010,7 +162087,6 @@ void m68000_device::sub_l_adr32_dd_dpm() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162044,6 +162120,7 @@ void m68000_device::sub_l_adr32_dd_dpm() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162139,7 +162216,6 @@ void m68000_device::sub_l_dpc_dd_dpm() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162173,6 +162249,7 @@ void m68000_device::sub_l_dpc_dd_dpm() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162309,7 +162386,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162343,6 +162419,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162414,7 +162491,6 @@ void m68000_device::sub_l_imm32_dd_dpm() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -162450,6 +162526,7 @@ void m68000_device::sub_l_imm32_dd_dpm() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162471,7 +162548,6 @@ void m68000_device::suba_w_ds_ad_dpm() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -162505,6 +162581,7 @@ void m68000_device::suba_w_ds_ad_dpm() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162526,7 +162603,6 @@ void m68000_device::suba_w_as_ad_dpm() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -162560,6 +162636,7 @@ void m68000_device::suba_w_as_ad_dpm() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162608,7 +162685,6 @@ void m68000_device::suba_w_ais_ad_dpm() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162642,6 +162718,7 @@ void m68000_device::suba_w_ais_ad_dpm() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162694,7 +162771,6 @@ void m68000_device::suba_w_aips_ad_dpm() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162728,6 +162804,7 @@ void m68000_device::suba_w_aips_ad_dpm() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162782,7 +162859,6 @@ void m68000_device::suba_w_pais_ad_dpm() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162816,6 +162892,7 @@ void m68000_device::suba_w_pais_ad_dpm() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162889,7 +162966,6 @@ void m68000_device::suba_w_das_ad_dpm() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162923,6 +162999,7 @@ void m68000_device::suba_w_das_ad_dpm() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163037,7 +163114,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163071,6 +163147,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163143,7 +163220,6 @@ void m68000_device::suba_w_adr16_ad_dpm() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163177,6 +163253,7 @@ void m68000_device::suba_w_adr16_ad_dpm() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163273,7 +163350,6 @@ void m68000_device::suba_w_adr32_ad_dpm() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163307,6 +163383,7 @@ void m68000_device::suba_w_adr32_ad_dpm() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163379,7 +163456,6 @@ void m68000_device::suba_w_dpc_ad_dpm() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163413,6 +163489,7 @@ void m68000_device::suba_w_dpc_ad_dpm() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163526,7 +163603,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163560,6 +163636,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163607,7 +163684,6 @@ void m68000_device::suba_w_imm16_ad_dpm() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -163641,6 +163717,7 @@ void m68000_device::suba_w_imm16_ad_dpm() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163662,7 +163739,6 @@ void m68000_device::subx_b_ds_dd_dpm() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -163670,6 +163746,7 @@ void m68000_device::subx_b_ds_dd_dpm() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -163740,7 +163817,6 @@ void m68000_device::subx_b_pais_paid_dpm() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -163790,6 +163866,7 @@ void m68000_device::subx_b_pais_paid_dpm() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -163846,7 +163923,6 @@ void m68000_device::sub_b_dd_ais_dpm() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -163876,6 +163952,7 @@ void m68000_device::sub_b_dd_ais_dpm() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -163936,7 +164013,6 @@ void m68000_device::sub_b_dd_aips_dpm() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -163966,6 +164042,7 @@ void m68000_device::sub_b_dd_aips_dpm() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164028,7 +164105,6 @@ void m68000_device::sub_b_dd_pais_dpm() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164058,6 +164134,7 @@ void m68000_device::sub_b_dd_pais_dpm() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164139,7 +164216,6 @@ void m68000_device::sub_b_dd_das_dpm() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164169,6 +164245,7 @@ void m68000_device::sub_b_dd_das_dpm() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164291,7 +164368,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164321,6 +164397,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164401,7 +164478,6 @@ void m68000_device::sub_b_dd_adr16_dpm() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164431,6 +164507,7 @@ void m68000_device::sub_b_dd_adr16_dpm() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164535,7 +164612,6 @@ void m68000_device::sub_b_dd_adr32_dpm() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164565,6 +164641,7 @@ void m68000_device::sub_b_dd_adr32_dpm() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -164598,7 +164675,6 @@ void m68000_device::subx_w_ds_dd_dpm() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -164606,6 +164682,7 @@ void m68000_device::subx_w_ds_dd_dpm() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164680,7 +164757,6 @@ void m68000_device::subx_w_pais_paid_dpm() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -164734,6 +164810,7 @@ void m68000_device::subx_w_pais_paid_dpm() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164800,7 +164877,6 @@ void m68000_device::sub_w_dd_ais_dpm() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164830,6 +164906,7 @@ void m68000_device::sub_w_dd_ais_dpm() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164900,7 +164977,6 @@ void m68000_device::sub_w_dd_aips_dpm() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -164930,6 +165006,7 @@ void m68000_device::sub_w_dd_aips_dpm() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165002,7 +165079,6 @@ void m68000_device::sub_w_dd_pais_dpm() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165032,6 +165108,7 @@ void m68000_device::sub_w_dd_pais_dpm() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165123,7 +165200,6 @@ void m68000_device::sub_w_dd_das_dpm() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165153,6 +165229,7 @@ void m68000_device::sub_w_dd_das_dpm() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165285,7 +165362,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165315,6 +165391,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165405,7 +165482,6 @@ void m68000_device::sub_w_dd_adr16_dpm() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165435,6 +165511,7 @@ void m68000_device::sub_w_dd_adr16_dpm() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165549,7 +165626,6 @@ void m68000_device::sub_w_dd_adr32_dpm() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165579,6 +165655,7 @@ void m68000_device::sub_w_dd_adr32_dpm() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165618,7 +165695,6 @@ void m68000_device::subx_l_ds_dd_dpm() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165654,6 +165730,7 @@ void m68000_device::subx_l_ds_dd_dpm() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -165784,7 +165861,6 @@ void m68000_device::subx_l_pais_paid_dpm() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165836,6 +165912,7 @@ void m68000_device::subx_l_pais_paid_dpm() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -165926,7 +166003,6 @@ void m68000_device::sub_l_dd_ais_dpm() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -165982,6 +166058,7 @@ void m68000_device::sub_l_dd_ais_dpm() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166075,7 +166152,6 @@ void m68000_device::sub_l_dd_aips_dpm() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166131,6 +166207,7 @@ void m68000_device::sub_l_dd_aips_dpm() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166225,7 +166302,6 @@ void m68000_device::sub_l_dd_pais_dpm() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166281,6 +166357,7 @@ void m68000_device::sub_l_dd_pais_dpm() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166395,7 +166472,6 @@ void m68000_device::sub_l_dd_das_dpm() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166451,6 +166527,7 @@ void m68000_device::sub_l_dd_das_dpm() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166606,7 +166683,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166662,6 +166738,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166778,7 +166855,6 @@ void m68000_device::sub_l_dd_adr16_dpm() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -166834,6 +166910,7 @@ void m68000_device::sub_l_dd_adr16_dpm() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166974,7 +167051,6 @@ void m68000_device::sub_l_dd_adr32_dpm() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -167030,6 +167106,7 @@ void m68000_device::sub_l_dd_adr32_dpm() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -167069,7 +167146,6 @@ void m68000_device::suba_l_ds_ad_dpm() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -167103,6 +167179,7 @@ void m68000_device::suba_l_ds_ad_dpm() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167124,7 +167201,6 @@ void m68000_device::suba_l_as_ad_dpm() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -167158,6 +167234,7 @@ void m68000_device::suba_l_as_ad_dpm() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167230,7 +167307,6 @@ void m68000_device::suba_l_ais_ad_dpm() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167262,6 +167338,7 @@ void m68000_device::suba_l_ais_ad_dpm() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167337,7 +167414,6 @@ void m68000_device::suba_l_aips_ad_dpm() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167369,6 +167445,7 @@ void m68000_device::suba_l_aips_ad_dpm() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167445,7 +167522,6 @@ void m68000_device::suba_l_pais_ad_dpm() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167477,6 +167553,7 @@ void m68000_device::suba_l_pais_ad_dpm() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167573,7 +167650,6 @@ void m68000_device::suba_l_das_ad_dpm() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167605,6 +167681,7 @@ void m68000_device::suba_l_das_ad_dpm() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167742,7 +167819,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167774,6 +167850,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167872,7 +167949,6 @@ void m68000_device::suba_l_adr16_ad_dpm() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167904,6 +167980,7 @@ void m68000_device::suba_l_adr16_ad_dpm() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168026,7 +168103,6 @@ void m68000_device::suba_l_adr32_ad_dpm() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168058,6 +168134,7 @@ void m68000_device::suba_l_adr32_ad_dpm() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168153,7 +168230,6 @@ void m68000_device::suba_l_dpc_ad_dpm() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168185,6 +168261,7 @@ void m68000_device::suba_l_dpc_ad_dpm() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168321,7 +168398,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168353,6 +168429,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168424,7 +168501,6 @@ void m68000_device::suba_l_imm32_ad_dpm() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -168458,6 +168534,7 @@ void m68000_device::suba_l_imm32_ad_dpm() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168479,7 +168556,6 @@ void m68000_device::cmp_b_ds_dd_dpm() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -168487,6 +168563,7 @@ void m68000_device::cmp_b_ds_dd_dpm() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168550,7 +168627,6 @@ void m68000_device::cmp_b_ais_dd_dpm() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168558,6 +168634,7 @@ void m68000_device::cmp_b_ais_dd_dpm() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168625,7 +168702,6 @@ void m68000_device::cmp_b_aips_dd_dpm() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168633,6 +168709,7 @@ void m68000_device::cmp_b_aips_dd_dpm() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168702,7 +168779,6 @@ void m68000_device::cmp_b_pais_dd_dpm() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168710,6 +168786,7 @@ void m68000_device::cmp_b_pais_dd_dpm() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168798,7 +168875,6 @@ void m68000_device::cmp_b_das_dd_dpm() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168806,6 +168882,7 @@ void m68000_device::cmp_b_das_dd_dpm() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -168935,7 +169012,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168943,6 +169019,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169030,7 +169107,6 @@ void m68000_device::cmp_b_adr16_dd_dpm() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169038,6 +169114,7 @@ void m68000_device::cmp_b_adr16_dd_dpm() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169149,7 +169226,6 @@ void m68000_device::cmp_b_adr32_dd_dpm() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169157,6 +169233,7 @@ void m68000_device::cmp_b_adr32_dd_dpm() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169244,7 +169321,6 @@ void m68000_device::cmp_b_dpc_dd_dpm() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169252,6 +169328,7 @@ void m68000_device::cmp_b_dpc_dd_dpm() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169380,7 +169457,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169388,6 +169464,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169454,7 +169531,6 @@ void m68000_device::cmp_b_imm8_dd_dpm() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -169462,6 +169538,7 @@ void m68000_device::cmp_b_imm8_dd_dpm() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169502,7 +169579,6 @@ void m68000_device::cmp_w_ds_dd_dpm() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -169510,6 +169586,7 @@ void m68000_device::cmp_w_ds_dd_dpm() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169550,7 +169627,6 @@ void m68000_device::cmp_w_as_dd_dpm() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -169558,6 +169634,7 @@ void m68000_device::cmp_w_as_dd_dpm() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169625,7 +169702,6 @@ void m68000_device::cmp_w_ais_dd_dpm() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169633,6 +169709,7 @@ void m68000_device::cmp_w_ais_dd_dpm() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169704,7 +169781,6 @@ void m68000_device::cmp_w_aips_dd_dpm() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169712,6 +169788,7 @@ void m68000_device::cmp_w_aips_dd_dpm() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169785,7 +169862,6 @@ void m68000_device::cmp_w_pais_dd_dpm() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169793,6 +169869,7 @@ void m68000_device::cmp_w_pais_dd_dpm() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -169885,7 +169962,6 @@ void m68000_device::cmp_w_das_dd_dpm() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169893,6 +169969,7 @@ void m68000_device::cmp_w_das_dd_dpm() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170026,7 +170103,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170034,6 +170110,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170125,7 +170202,6 @@ void m68000_device::cmp_w_adr16_dd_dpm() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170133,6 +170209,7 @@ void m68000_device::cmp_w_adr16_dd_dpm() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170248,7 +170325,6 @@ void m68000_device::cmp_w_adr32_dd_dpm() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170256,6 +170332,7 @@ void m68000_device::cmp_w_adr32_dd_dpm() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170347,7 +170424,6 @@ void m68000_device::cmp_w_dpc_dd_dpm() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170355,6 +170431,7 @@ void m68000_device::cmp_w_dpc_dd_dpm() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170487,7 +170564,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170495,6 +170571,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170561,7 +170638,6 @@ void m68000_device::cmp_w_imm16_dd_dpm() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -170569,6 +170645,7 @@ void m68000_device::cmp_w_imm16_dd_dpm() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -170609,7 +170686,6 @@ void m68000_device::cmp_l_ds_dd_dpm() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170642,6 +170718,7 @@ void m68000_device::cmp_l_ds_dd_dpm() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170662,7 +170739,6 @@ void m68000_device::cmp_l_as_dd_dpm() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -170695,6 +170771,7 @@ void m68000_device::cmp_l_as_dd_dpm() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170766,7 +170843,6 @@ void m68000_device::cmp_l_ais_dd_dpm() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170799,6 +170875,7 @@ void m68000_device::cmp_l_ais_dd_dpm() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170873,7 +170950,6 @@ void m68000_device::cmp_l_aips_dd_dpm() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170906,6 +170982,7 @@ void m68000_device::cmp_l_aips_dd_dpm() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170981,7 +171058,6 @@ void m68000_device::cmp_l_pais_dd_dpm() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171014,6 +171090,7 @@ void m68000_device::cmp_l_pais_dd_dpm() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171109,7 +171186,6 @@ void m68000_device::cmp_l_das_dd_dpm() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171142,6 +171218,7 @@ void m68000_device::cmp_l_das_dd_dpm() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171278,7 +171355,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171311,6 +171387,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171408,7 +171485,6 @@ void m68000_device::cmp_l_adr16_dd_dpm() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171441,6 +171517,7 @@ void m68000_device::cmp_l_adr16_dd_dpm() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171562,7 +171639,6 @@ void m68000_device::cmp_l_adr32_dd_dpm() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171595,6 +171671,7 @@ void m68000_device::cmp_l_adr32_dd_dpm() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171689,7 +171766,6 @@ void m68000_device::cmp_l_dpc_dd_dpm() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171722,6 +171798,7 @@ void m68000_device::cmp_l_dpc_dd_dpm() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171857,7 +171934,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171890,6 +171966,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171960,7 +172037,6 @@ void m68000_device::cmp_l_imm32_dd_dpm() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -171993,6 +172069,7 @@ void m68000_device::cmp_l_imm32_dd_dpm() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172013,7 +172090,6 @@ void m68000_device::cmpa_w_ds_ad_dpm() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -172046,6 +172122,7 @@ void m68000_device::cmpa_w_ds_ad_dpm() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172066,7 +172143,6 @@ void m68000_device::cmpa_w_as_ad_dpm() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -172099,6 +172175,7 @@ void m68000_device::cmpa_w_as_ad_dpm() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172146,7 +172223,6 @@ void m68000_device::cmpa_w_ais_ad_dpm() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172179,6 +172255,7 @@ void m68000_device::cmpa_w_ais_ad_dpm() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172230,7 +172307,6 @@ void m68000_device::cmpa_w_aips_ad_dpm() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172263,6 +172339,7 @@ void m68000_device::cmpa_w_aips_ad_dpm() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172316,7 +172393,6 @@ void m68000_device::cmpa_w_pais_ad_dpm() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172349,6 +172425,7 @@ void m68000_device::cmpa_w_pais_ad_dpm() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172421,7 +172498,6 @@ void m68000_device::cmpa_w_das_ad_dpm() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172454,6 +172530,7 @@ void m68000_device::cmpa_w_das_ad_dpm() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172567,7 +172644,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172600,6 +172676,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172671,7 +172748,6 @@ void m68000_device::cmpa_w_adr16_ad_dpm() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172704,6 +172780,7 @@ void m68000_device::cmpa_w_adr16_ad_dpm() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172799,7 +172876,6 @@ void m68000_device::cmpa_w_adr32_ad_dpm() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172832,6 +172908,7 @@ void m68000_device::cmpa_w_adr32_ad_dpm() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172903,7 +172980,6 @@ void m68000_device::cmpa_w_dpc_ad_dpm() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172936,6 +173012,7 @@ void m68000_device::cmpa_w_dpc_ad_dpm() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173048,7 +173125,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173081,6 +173157,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173127,7 +173204,6 @@ void m68000_device::cmpa_w_imm16_ad_dpm() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -173160,6 +173236,7 @@ void m68000_device::cmpa_w_imm16_ad_dpm() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173180,13 +173257,13 @@ void m68000_device::eor_b_dd_ds_dpm() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173253,7 +173330,6 @@ void m68000_device::cmpm_b_aips_aipd_dpm() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -173276,6 +173352,7 @@ void m68000_device::cmpm_b_aips_aipd_dpm() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173344,7 +173421,6 @@ void m68000_device::eor_b_dd_ais_dpm() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173374,6 +173450,7 @@ void m68000_device::eor_b_dd_ais_dpm() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173437,7 +173514,6 @@ void m68000_device::eor_b_dd_aips_dpm() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173467,6 +173543,7 @@ void m68000_device::eor_b_dd_aips_dpm() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173532,7 +173609,6 @@ void m68000_device::eor_b_dd_pais_dpm() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173562,6 +173638,7 @@ void m68000_device::eor_b_dd_pais_dpm() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173646,7 +173723,6 @@ void m68000_device::eor_b_dd_das_dpm() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173676,6 +173752,7 @@ void m68000_device::eor_b_dd_das_dpm() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173803,7 +173880,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173833,6 +173909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173916,7 +173993,6 @@ void m68000_device::eor_b_dd_adr16_dpm() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -173946,6 +174022,7 @@ void m68000_device::eor_b_dd_adr16_dpm() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174054,7 +174131,6 @@ void m68000_device::eor_b_dd_adr32_dpm() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174084,6 +174160,7 @@ void m68000_device::eor_b_dd_adr32_dpm() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -174118,13 +174195,13 @@ void m68000_device::eor_w_dd_ds_dpm() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174195,7 +174272,6 @@ void m68000_device::cmpm_w_aips_aipd_dpm() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -174222,6 +174298,7 @@ void m68000_device::cmpm_w_aips_aipd_dpm() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174294,7 +174371,6 @@ void m68000_device::eor_w_dd_ais_dpm() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174324,6 +174400,7 @@ void m68000_device::eor_w_dd_ais_dpm() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174397,7 +174474,6 @@ void m68000_device::eor_w_dd_aips_dpm() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174427,6 +174503,7 @@ void m68000_device::eor_w_dd_aips_dpm() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174502,7 +174579,6 @@ void m68000_device::eor_w_dd_pais_dpm() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174532,6 +174608,7 @@ void m68000_device::eor_w_dd_pais_dpm() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174626,7 +174703,6 @@ void m68000_device::eor_w_dd_das_dpm() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174656,6 +174732,7 @@ void m68000_device::eor_w_dd_das_dpm() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174793,7 +174870,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174823,6 +174899,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174916,7 +174993,6 @@ void m68000_device::eor_w_dd_adr16_dpm() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -174946,6 +175022,7 @@ void m68000_device::eor_w_dd_adr16_dpm() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -175064,7 +175141,6 @@ void m68000_device::eor_w_dd_adr32_dpm() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175094,6 +175170,7 @@ void m68000_device::eor_w_dd_adr32_dpm() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175134,7 +175211,6 @@ void m68000_device::eor_l_dd_ds_dpm() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -175170,6 +175246,7 @@ void m68000_device::eor_l_dd_ds_dpm() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -175244,7 +175321,6 @@ void m68000_device::cmpm_l_aips_aipd_dpm() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -175301,6 +175377,7 @@ void m68000_device::cmpm_l_aips_aipd_dpm() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175395,7 +175472,6 @@ void m68000_device::eor_l_dd_ais_dpm() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175451,6 +175527,7 @@ void m68000_device::eor_l_dd_ais_dpm() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175547,7 +175624,6 @@ void m68000_device::eor_l_dd_aips_dpm() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175603,6 +175679,7 @@ void m68000_device::eor_l_dd_aips_dpm() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175700,7 +175777,6 @@ void m68000_device::eor_l_dd_pais_dpm() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175756,6 +175832,7 @@ void m68000_device::eor_l_dd_pais_dpm() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175873,7 +175950,6 @@ void m68000_device::eor_l_dd_das_dpm() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -175929,6 +176005,7 @@ void m68000_device::eor_l_dd_das_dpm() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176089,7 +176166,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -176145,6 +176221,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176265,7 +176342,6 @@ void m68000_device::eor_l_dd_adr16_dpm() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -176321,6 +176397,7 @@ void m68000_device::eor_l_dd_adr16_dpm() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176466,7 +176543,6 @@ void m68000_device::eor_l_dd_adr32_dpm() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -176522,6 +176598,7 @@ void m68000_device::eor_l_dd_adr32_dpm() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -176562,7 +176639,6 @@ void m68000_device::cmpa_l_ds_ad_dpm() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -176595,6 +176671,7 @@ void m68000_device::cmpa_l_ds_ad_dpm() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176615,7 +176692,6 @@ void m68000_device::cmpa_l_as_ad_dpm() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -176648,6 +176724,7 @@ void m68000_device::cmpa_l_as_ad_dpm() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176719,7 +176796,6 @@ void m68000_device::cmpa_l_ais_ad_dpm() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176752,6 +176828,7 @@ void m68000_device::cmpa_l_ais_ad_dpm() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176826,7 +176903,6 @@ void m68000_device::cmpa_l_aips_ad_dpm() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176859,6 +176935,7 @@ void m68000_device::cmpa_l_aips_ad_dpm() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176934,7 +177011,6 @@ void m68000_device::cmpa_l_pais_ad_dpm() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176967,6 +177043,7 @@ void m68000_device::cmpa_l_pais_ad_dpm() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177062,7 +177139,6 @@ void m68000_device::cmpa_l_das_ad_dpm() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177095,6 +177171,7 @@ void m68000_device::cmpa_l_das_ad_dpm() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177231,7 +177308,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177264,6 +177340,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177361,7 +177438,6 @@ void m68000_device::cmpa_l_adr16_ad_dpm() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177394,6 +177470,7 @@ void m68000_device::cmpa_l_adr16_ad_dpm() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177515,7 +177592,6 @@ void m68000_device::cmpa_l_adr32_ad_dpm() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177548,6 +177624,7 @@ void m68000_device::cmpa_l_adr32_ad_dpm() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177642,7 +177719,6 @@ void m68000_device::cmpa_l_dpc_ad_dpm() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177675,6 +177751,7 @@ void m68000_device::cmpa_l_dpc_ad_dpm() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177810,7 +177887,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177843,6 +177919,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177913,7 +177990,6 @@ void m68000_device::cmpa_l_imm32_ad_dpm() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -177946,6 +178022,7 @@ void m68000_device::cmpa_l_imm32_ad_dpm() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177966,7 +178043,6 @@ void m68000_device::and_b_ds_dd_dpm() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -177974,6 +178050,7 @@ void m68000_device::and_b_ds_dd_dpm() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178040,7 +178117,6 @@ void m68000_device::and_b_ais_dd_dpm() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178048,6 +178124,7 @@ void m68000_device::and_b_ais_dd_dpm() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178119,7 +178196,6 @@ void m68000_device::and_b_aips_dd_dpm() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178127,6 +178203,7 @@ void m68000_device::and_b_aips_dd_dpm() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178200,7 +178277,6 @@ void m68000_device::and_b_pais_dd_dpm() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178208,6 +178284,7 @@ void m68000_device::and_b_pais_dd_dpm() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178300,7 +178377,6 @@ void m68000_device::and_b_das_dd_dpm() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178308,6 +178384,7 @@ void m68000_device::and_b_das_dd_dpm() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178443,7 +178520,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178451,6 +178527,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178542,7 +178619,6 @@ void m68000_device::and_b_adr16_dd_dpm() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178550,6 +178626,7 @@ void m68000_device::and_b_adr16_dd_dpm() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178666,7 +178743,6 @@ void m68000_device::and_b_adr32_dd_dpm() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178674,6 +178750,7 @@ void m68000_device::and_b_adr32_dd_dpm() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178765,7 +178842,6 @@ void m68000_device::and_b_dpc_dd_dpm() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178773,6 +178849,7 @@ void m68000_device::and_b_dpc_dd_dpm() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178907,7 +178984,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178915,6 +178991,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -178984,7 +179061,6 @@ void m68000_device::and_b_imm8_dd_dpm() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -178992,6 +179068,7 @@ void m68000_device::and_b_imm8_dd_dpm() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179034,7 +179111,6 @@ void m68000_device::and_w_ds_dd_dpm() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -179042,6 +179118,7 @@ void m68000_device::and_w_ds_dd_dpm() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179112,7 +179189,6 @@ void m68000_device::and_w_ais_dd_dpm() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179120,6 +179196,7 @@ void m68000_device::and_w_ais_dd_dpm() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179195,7 +179272,6 @@ void m68000_device::and_w_aips_dd_dpm() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179203,6 +179279,7 @@ void m68000_device::and_w_aips_dd_dpm() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179280,7 +179357,6 @@ void m68000_device::and_w_pais_dd_dpm() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179288,6 +179364,7 @@ void m68000_device::and_w_pais_dd_dpm() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179384,7 +179461,6 @@ void m68000_device::and_w_das_dd_dpm() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179392,6 +179468,7 @@ void m68000_device::and_w_das_dd_dpm() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179531,7 +179608,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179539,6 +179615,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179634,7 +179711,6 @@ void m68000_device::and_w_adr16_dd_dpm() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179642,6 +179718,7 @@ void m68000_device::and_w_adr16_dd_dpm() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179762,7 +179839,6 @@ void m68000_device::and_w_adr32_dd_dpm() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179770,6 +179846,7 @@ void m68000_device::and_w_adr32_dd_dpm() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -179865,7 +179942,6 @@ void m68000_device::and_w_dpc_dd_dpm() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179873,6 +179949,7 @@ void m68000_device::and_w_dpc_dd_dpm() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -180011,7 +180088,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180019,6 +180095,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -180088,7 +180165,6 @@ void m68000_device::and_w_imm16_dd_dpm() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -180096,6 +180172,7 @@ void m68000_device::and_w_imm16_dd_dpm() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -180138,7 +180215,6 @@ void m68000_device::and_l_ds_dd_dpm() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -180175,6 +180251,7 @@ void m68000_device::and_l_ds_dd_dpm() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180249,7 +180326,6 @@ void m68000_device::and_l_ais_dd_dpm() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180283,6 +180359,7 @@ void m68000_device::and_l_ais_dd_dpm() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180361,7 +180438,6 @@ void m68000_device::and_l_aips_dd_dpm() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180395,6 +180471,7 @@ void m68000_device::and_l_aips_dd_dpm() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180474,7 +180551,6 @@ void m68000_device::and_l_pais_dd_dpm() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180508,6 +180584,7 @@ void m68000_device::and_l_pais_dd_dpm() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180607,7 +180684,6 @@ void m68000_device::and_l_das_dd_dpm() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180641,6 +180717,7 @@ void m68000_device::and_l_das_dd_dpm() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180783,7 +180860,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180817,6 +180893,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180919,7 +180996,6 @@ void m68000_device::and_l_adr16_dd_dpm() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180953,6 +181029,7 @@ void m68000_device::and_l_adr16_dd_dpm() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181080,7 +181157,6 @@ void m68000_device::and_l_adr32_dd_dpm() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181114,6 +181190,7 @@ void m68000_device::and_l_adr32_dd_dpm() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181212,7 +181289,6 @@ void m68000_device::and_l_dpc_dd_dpm() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181246,6 +181322,7 @@ void m68000_device::and_l_dpc_dd_dpm() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181387,7 +181464,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181421,6 +181497,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181495,7 +181572,6 @@ void m68000_device::and_l_imm32_dd_dpm() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -181532,6 +181608,7 @@ void m68000_device::and_l_imm32_dd_dpm() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181554,7 +181631,6 @@ void m68000_device::mulu_w_ds_dd_dpm() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -181615,6 +181691,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181667,7 +181744,6 @@ void m68000_device::mulu_w_ais_dd_dpm() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181728,6 +181804,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181784,7 +181861,6 @@ void m68000_device::mulu_w_aips_dd_dpm() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181845,6 +181921,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181903,7 +181980,6 @@ void m68000_device::mulu_w_pais_dd_dpm() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181964,6 +182040,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182041,7 +182118,6 @@ void m68000_device::mulu_w_das_dd_dpm() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182102,6 +182178,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182220,7 +182297,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182281,6 +182357,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182357,7 +182434,6 @@ void m68000_device::mulu_w_adr16_dd_dpm() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182418,6 +182494,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182518,7 +182595,6 @@ void m68000_device::mulu_w_adr32_dd_dpm() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182579,6 +182655,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182655,7 +182732,6 @@ void m68000_device::mulu_w_dpc_dd_dpm() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182716,6 +182792,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182833,7 +182910,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182894,6 +182970,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182945,7 +183022,6 @@ void m68000_device::mulu_w_imm16_dd_dpm() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -183006,6 +183082,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -183031,7 +183108,6 @@ void m68000_device::abcd_ds_dd_dpm() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -183063,6 +183139,7 @@ void m68000_device::abcd_ds_dd_dpm() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -183113,7 +183190,6 @@ void m68000_device::abcd_pais_paid_dpm() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -183165,6 +183241,7 @@ void m68000_device::abcd_pais_paid_dpm() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183222,7 +183299,6 @@ void m68000_device::and_b_dd_ais_dpm() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183252,6 +183328,7 @@ void m68000_device::and_b_dd_ais_dpm() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183315,7 +183392,6 @@ void m68000_device::and_b_dd_aips_dpm() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183345,6 +183421,7 @@ void m68000_device::and_b_dd_aips_dpm() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183410,7 +183487,6 @@ void m68000_device::and_b_dd_pais_dpm() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183440,6 +183516,7 @@ void m68000_device::and_b_dd_pais_dpm() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183524,7 +183601,6 @@ void m68000_device::and_b_dd_das_dpm() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183554,6 +183630,7 @@ void m68000_device::and_b_dd_das_dpm() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183681,7 +183758,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183711,6 +183787,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183794,7 +183871,6 @@ void m68000_device::and_b_dd_adr16_dpm() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183824,6 +183900,7 @@ void m68000_device::and_b_dd_adr16_dpm() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183932,7 +184009,6 @@ void m68000_device::and_b_dd_adr32_dpm() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -183962,6 +184038,7 @@ void m68000_device::and_b_dd_adr32_dpm() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -183996,7 +184073,6 @@ void m68000_device::exg_dd_ds_dpm() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184027,6 +184103,7 @@ void m68000_device::exg_dd_ds_dpm() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184047,7 +184124,6 @@ void m68000_device::exg_ad_as_dpm() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184078,6 +184154,7 @@ void m68000_device::exg_ad_as_dpm() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184126,7 +184203,6 @@ void m68000_device::and_w_dd_ais_dpm() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184156,6 +184232,7 @@ void m68000_device::and_w_dd_ais_dpm() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184229,7 +184306,6 @@ void m68000_device::and_w_dd_aips_dpm() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184259,6 +184335,7 @@ void m68000_device::and_w_dd_aips_dpm() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184334,7 +184411,6 @@ void m68000_device::and_w_dd_pais_dpm() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184364,6 +184440,7 @@ void m68000_device::and_w_dd_pais_dpm() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184458,7 +184535,6 @@ void m68000_device::and_w_dd_das_dpm() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184488,6 +184564,7 @@ void m68000_device::and_w_dd_das_dpm() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184625,7 +184702,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184655,6 +184731,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184748,7 +184825,6 @@ void m68000_device::and_w_dd_adr16_dpm() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184778,6 +184854,7 @@ void m68000_device::and_w_dd_adr16_dpm() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184896,7 +184973,6 @@ void m68000_device::and_w_dd_adr32_dpm() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -184926,6 +185002,7 @@ void m68000_device::and_w_dd_adr32_dpm() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -184966,7 +185043,6 @@ void m68000_device::exg_dd_as_dpm() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184997,6 +185073,7 @@ void m68000_device::exg_dd_as_dpm() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -185069,7 +185146,6 @@ void m68000_device::and_l_dd_ais_dpm() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185125,6 +185201,7 @@ void m68000_device::and_l_dd_ais_dpm() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185221,7 +185298,6 @@ void m68000_device::and_l_dd_aips_dpm() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185277,6 +185353,7 @@ void m68000_device::and_l_dd_aips_dpm() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185374,7 +185451,6 @@ void m68000_device::and_l_dd_pais_dpm() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185430,6 +185506,7 @@ void m68000_device::and_l_dd_pais_dpm() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185547,7 +185624,6 @@ void m68000_device::and_l_dd_das_dpm() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185603,6 +185679,7 @@ void m68000_device::and_l_dd_das_dpm() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185763,7 +185840,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185819,6 +185895,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185939,7 +186016,6 @@ void m68000_device::and_l_dd_adr16_dpm() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -185995,6 +186071,7 @@ void m68000_device::and_l_dd_adr16_dpm() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -186140,7 +186217,6 @@ void m68000_device::and_l_dd_adr32_dpm() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -186196,6 +186272,7 @@ void m68000_device::and_l_dd_adr32_dpm() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -186236,7 +186313,6 @@ void m68000_device::muls_w_ds_dd_dpm() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -186299,6 +186375,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186358,7 +186435,6 @@ void m68000_device::muls_w_ais_dd_dpm() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186421,6 +186497,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186484,7 +186561,6 @@ void m68000_device::muls_w_aips_dd_dpm() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186547,6 +186623,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186612,7 +186689,6 @@ void m68000_device::muls_w_pais_dd_dpm() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186675,6 +186751,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186759,7 +186836,6 @@ void m68000_device::muls_w_das_dd_dpm() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186822,6 +186898,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186947,7 +187024,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187010,6 +187086,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187093,7 +187170,6 @@ void m68000_device::muls_w_adr16_dd_dpm() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187156,6 +187232,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187263,7 +187340,6 @@ void m68000_device::muls_w_adr32_dd_dpm() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187326,6 +187402,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187409,7 +187486,6 @@ void m68000_device::muls_w_dpc_dd_dpm() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187472,6 +187548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187596,7 +187673,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187659,6 +187735,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187717,7 +187794,6 @@ void m68000_device::muls_w_imm16_dd_dpm() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -187780,6 +187856,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187812,7 +187889,6 @@ void m68000_device::add_b_ds_dd_dpm() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -187820,6 +187896,7 @@ void m68000_device::add_b_ds_dd_dpm() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -187884,7 +187961,6 @@ void m68000_device::add_b_ais_dd_dpm() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187892,6 +187968,7 @@ void m68000_device::add_b_ais_dd_dpm() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -187960,7 +188037,6 @@ void m68000_device::add_b_aips_dd_dpm() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187968,6 +188044,7 @@ void m68000_device::add_b_aips_dd_dpm() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188038,7 +188115,6 @@ void m68000_device::add_b_pais_dd_dpm() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188046,6 +188122,7 @@ void m68000_device::add_b_pais_dd_dpm() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188135,7 +188212,6 @@ void m68000_device::add_b_das_dd_dpm() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188143,6 +188219,7 @@ void m68000_device::add_b_das_dd_dpm() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188273,7 +188350,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188281,6 +188357,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188369,7 +188446,6 @@ void m68000_device::add_b_adr16_dd_dpm() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188377,6 +188453,7 @@ void m68000_device::add_b_adr16_dd_dpm() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188489,7 +188566,6 @@ void m68000_device::add_b_adr32_dd_dpm() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188497,6 +188573,7 @@ void m68000_device::add_b_adr32_dd_dpm() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188585,7 +188662,6 @@ void m68000_device::add_b_dpc_dd_dpm() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188593,6 +188669,7 @@ void m68000_device::add_b_dpc_dd_dpm() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188722,7 +188799,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188730,6 +188806,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188797,7 +188874,6 @@ void m68000_device::add_b_imm8_dd_dpm() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -188805,6 +188881,7 @@ void m68000_device::add_b_imm8_dd_dpm() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188846,7 +188923,6 @@ void m68000_device::add_w_ds_dd_dpm() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -188854,6 +188930,7 @@ void m68000_device::add_w_ds_dd_dpm() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188895,7 +188972,6 @@ void m68000_device::add_w_as_dd_dpm() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -188903,6 +188979,7 @@ void m68000_device::add_w_as_dd_dpm() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -188971,7 +189048,6 @@ void m68000_device::add_w_ais_dd_dpm() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188979,6 +189055,7 @@ void m68000_device::add_w_ais_dd_dpm() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189051,7 +189128,6 @@ void m68000_device::add_w_aips_dd_dpm() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189059,6 +189135,7 @@ void m68000_device::add_w_aips_dd_dpm() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189133,7 +189210,6 @@ void m68000_device::add_w_pais_dd_dpm() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189141,6 +189217,7 @@ void m68000_device::add_w_pais_dd_dpm() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189234,7 +189311,6 @@ void m68000_device::add_w_das_dd_dpm() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189242,6 +189318,7 @@ void m68000_device::add_w_das_dd_dpm() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189376,7 +189453,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189384,6 +189460,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189476,7 +189553,6 @@ void m68000_device::add_w_adr16_dd_dpm() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189484,6 +189560,7 @@ void m68000_device::add_w_adr16_dd_dpm() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189600,7 +189677,6 @@ void m68000_device::add_w_adr32_dd_dpm() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189608,6 +189684,7 @@ void m68000_device::add_w_adr32_dd_dpm() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189700,7 +189777,6 @@ void m68000_device::add_w_dpc_dd_dpm() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189708,6 +189784,7 @@ void m68000_device::add_w_dpc_dd_dpm() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189841,7 +189918,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189849,6 +189925,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189916,7 +189993,6 @@ void m68000_device::add_w_imm16_dd_dpm() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -189924,6 +190000,7 @@ void m68000_device::add_w_imm16_dd_dpm() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -189965,7 +190042,6 @@ void m68000_device::add_l_ds_dd_dpm() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -190001,6 +190077,7 @@ void m68000_device::add_l_ds_dd_dpm() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190022,7 +190099,6 @@ void m68000_device::add_l_as_dd_dpm() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -190058,6 +190134,7 @@ void m68000_device::add_l_as_dd_dpm() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190130,7 +190207,6 @@ void m68000_device::add_l_ais_dd_dpm() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190164,6 +190240,7 @@ void m68000_device::add_l_ais_dd_dpm() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190239,7 +190316,6 @@ void m68000_device::add_l_aips_dd_dpm() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190273,6 +190349,7 @@ void m68000_device::add_l_aips_dd_dpm() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190349,7 +190426,6 @@ void m68000_device::add_l_pais_dd_dpm() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190383,6 +190459,7 @@ void m68000_device::add_l_pais_dd_dpm() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190479,7 +190556,6 @@ void m68000_device::add_l_das_dd_dpm() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190513,6 +190589,7 @@ void m68000_device::add_l_das_dd_dpm() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190650,7 +190727,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190684,6 +190760,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190782,7 +190859,6 @@ void m68000_device::add_l_adr16_dd_dpm() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190816,6 +190892,7 @@ void m68000_device::add_l_adr16_dd_dpm() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190938,7 +191015,6 @@ void m68000_device::add_l_adr32_dd_dpm() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190972,6 +191048,7 @@ void m68000_device::add_l_adr32_dd_dpm() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191067,7 +191144,6 @@ void m68000_device::add_l_dpc_dd_dpm() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191101,6 +191177,7 @@ void m68000_device::add_l_dpc_dd_dpm() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191237,7 +191314,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191271,6 +191347,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191342,7 +191419,6 @@ void m68000_device::add_l_imm32_dd_dpm() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -191378,6 +191454,7 @@ void m68000_device::add_l_imm32_dd_dpm() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191399,7 +191476,6 @@ void m68000_device::adda_w_ds_ad_dpm() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -191433,6 +191509,7 @@ void m68000_device::adda_w_ds_ad_dpm() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191454,7 +191531,6 @@ void m68000_device::adda_w_as_ad_dpm() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -191488,6 +191564,7 @@ void m68000_device::adda_w_as_ad_dpm() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191536,7 +191613,6 @@ void m68000_device::adda_w_ais_ad_dpm() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191570,6 +191646,7 @@ void m68000_device::adda_w_ais_ad_dpm() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191622,7 +191699,6 @@ void m68000_device::adda_w_aips_ad_dpm() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191656,6 +191732,7 @@ void m68000_device::adda_w_aips_ad_dpm() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191710,7 +191787,6 @@ void m68000_device::adda_w_pais_ad_dpm() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191744,6 +191820,7 @@ void m68000_device::adda_w_pais_ad_dpm() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191817,7 +191894,6 @@ void m68000_device::adda_w_das_ad_dpm() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191851,6 +191927,7 @@ void m68000_device::adda_w_das_ad_dpm() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191965,7 +192042,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191999,6 +192075,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192071,7 +192148,6 @@ void m68000_device::adda_w_adr16_ad_dpm() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192105,6 +192181,7 @@ void m68000_device::adda_w_adr16_ad_dpm() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192201,7 +192278,6 @@ void m68000_device::adda_w_adr32_ad_dpm() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192235,6 +192311,7 @@ void m68000_device::adda_w_adr32_ad_dpm() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192307,7 +192384,6 @@ void m68000_device::adda_w_dpc_ad_dpm() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192341,6 +192417,7 @@ void m68000_device::adda_w_dpc_ad_dpm() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192454,7 +192531,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192488,6 +192564,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192535,7 +192612,6 @@ void m68000_device::adda_w_imm16_ad_dpm() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -192569,6 +192645,7 @@ void m68000_device::adda_w_imm16_ad_dpm() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192590,7 +192667,6 @@ void m68000_device::addx_b_ds_dd_dpm() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -192598,6 +192674,7 @@ void m68000_device::addx_b_ds_dd_dpm() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192671,7 +192748,6 @@ void m68000_device::addx_b_pais_paid_dpm() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -192722,6 +192798,7 @@ void m68000_device::addx_b_pais_paid_dpm() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -192779,7 +192856,6 @@ void m68000_device::add_b_dd_ais_dpm() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192809,6 +192885,7 @@ void m68000_device::add_b_dd_ais_dpm() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192869,7 +192946,6 @@ void m68000_device::add_b_dd_aips_dpm() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192899,6 +192975,7 @@ void m68000_device::add_b_dd_aips_dpm() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192961,7 +193038,6 @@ void m68000_device::add_b_dd_pais_dpm() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -192991,6 +193067,7 @@ void m68000_device::add_b_dd_pais_dpm() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193072,7 +193149,6 @@ void m68000_device::add_b_dd_das_dpm() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193102,6 +193178,7 @@ void m68000_device::add_b_dd_das_dpm() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193224,7 +193301,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193254,6 +193330,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193334,7 +193411,6 @@ void m68000_device::add_b_dd_adr16_dpm() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193364,6 +193440,7 @@ void m68000_device::add_b_dd_adr16_dpm() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193468,7 +193545,6 @@ void m68000_device::add_b_dd_adr32_dpm() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193498,6 +193574,7 @@ void m68000_device::add_b_dd_adr32_dpm() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -193531,7 +193608,6 @@ void m68000_device::addx_w_ds_dd_dpm() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -193539,6 +193615,7 @@ void m68000_device::addx_w_ds_dd_dpm() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193616,7 +193693,6 @@ void m68000_device::addx_w_pais_paid_dpm() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program.read_interruptible(m_aob & ~1); @@ -193671,6 +193747,7 @@ void m68000_device::addx_w_pais_paid_dpm() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193738,7 +193815,6 @@ void m68000_device::add_w_dd_ais_dpm() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193768,6 +193844,7 @@ void m68000_device::add_w_dd_ais_dpm() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193838,7 +193915,6 @@ void m68000_device::add_w_dd_aips_dpm() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193868,6 +193944,7 @@ void m68000_device::add_w_dd_aips_dpm() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193940,7 +194017,6 @@ void m68000_device::add_w_dd_pais_dpm() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -193970,6 +194046,7 @@ void m68000_device::add_w_dd_pais_dpm() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -194061,7 +194138,6 @@ void m68000_device::add_w_dd_das_dpm() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194091,6 +194167,7 @@ void m68000_device::add_w_dd_das_dpm() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194223,7 +194300,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194253,6 +194329,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194343,7 +194420,6 @@ void m68000_device::add_w_dd_adr16_dpm() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194373,6 +194449,7 @@ void m68000_device::add_w_dd_adr16_dpm() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194487,7 +194564,6 @@ void m68000_device::add_w_dd_adr32_dpm() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194517,6 +194593,7 @@ void m68000_device::add_w_dd_adr32_dpm() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194556,7 +194633,6 @@ void m68000_device::addx_l_ds_dd_dpm() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -194593,6 +194669,7 @@ void m68000_device::addx_l_ds_dd_dpm() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -194728,7 +194805,6 @@ void m68000_device::addx_l_pais_paid_dpm() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194781,6 +194857,7 @@ void m68000_device::addx_l_pais_paid_dpm() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -194872,7 +194949,6 @@ void m68000_device::add_l_dd_ais_dpm() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -194928,6 +195004,7 @@ void m68000_device::add_l_dd_ais_dpm() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195021,7 +195098,6 @@ void m68000_device::add_l_dd_aips_dpm() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195077,6 +195153,7 @@ void m68000_device::add_l_dd_aips_dpm() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195171,7 +195248,6 @@ void m68000_device::add_l_dd_pais_dpm() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195227,6 +195303,7 @@ void m68000_device::add_l_dd_pais_dpm() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195341,7 +195418,6 @@ void m68000_device::add_l_dd_das_dpm() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195397,6 +195473,7 @@ void m68000_device::add_l_dd_das_dpm() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195552,7 +195629,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195608,6 +195684,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195724,7 +195801,6 @@ void m68000_device::add_l_dd_adr16_dpm() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195780,6 +195856,7 @@ void m68000_device::add_l_dd_adr16_dpm() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195920,7 +195997,6 @@ void m68000_device::add_l_dd_adr32_dpm() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes.read_interruptible(m_aob & ~1); @@ -195976,6 +196052,7 @@ void m68000_device::add_l_dd_adr32_dpm() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -196015,7 +196092,6 @@ void m68000_device::adda_l_ds_ad_dpm() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -196049,6 +196125,7 @@ void m68000_device::adda_l_ds_ad_dpm() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196070,7 +196147,6 @@ void m68000_device::adda_l_as_ad_dpm() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -196104,6 +196180,7 @@ void m68000_device::adda_l_as_ad_dpm() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196176,7 +196253,6 @@ void m68000_device::adda_l_ais_ad_dpm() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196208,6 +196284,7 @@ void m68000_device::adda_l_ais_ad_dpm() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196283,7 +196360,6 @@ void m68000_device::adda_l_aips_ad_dpm() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196315,6 +196391,7 @@ void m68000_device::adda_l_aips_ad_dpm() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196391,7 +196468,6 @@ void m68000_device::adda_l_pais_ad_dpm() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196423,6 +196499,7 @@ void m68000_device::adda_l_pais_ad_dpm() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196519,7 +196596,6 @@ void m68000_device::adda_l_das_ad_dpm() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196551,6 +196627,7 @@ void m68000_device::adda_l_das_ad_dpm() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196688,7 +196765,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196720,6 +196796,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196818,7 +196895,6 @@ void m68000_device::adda_l_adr16_ad_dpm() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196850,6 +196926,7 @@ void m68000_device::adda_l_adr16_ad_dpm() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196972,7 +197049,6 @@ void m68000_device::adda_l_adr32_ad_dpm() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197004,6 +197080,7 @@ void m68000_device::adda_l_adr32_ad_dpm() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197099,7 +197176,6 @@ void m68000_device::adda_l_dpc_ad_dpm() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197131,6 +197207,7 @@ void m68000_device::adda_l_dpc_ad_dpm() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197267,7 +197344,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197299,6 +197375,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197370,7 +197447,6 @@ void m68000_device::adda_l_imm32_ad_dpm() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -197404,6 +197480,7 @@ void m68000_device::adda_l_imm32_ad_dpm() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197424,7 +197501,6 @@ void m68000_device::asr_b_imm3_ds_dpm() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197476,6 +197552,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197496,7 +197573,6 @@ void m68000_device::lsr_b_imm3_ds_dpm() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197548,6 +197624,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197568,7 +197645,6 @@ void m68000_device::roxr_b_imm3_ds_dpm() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197620,6 +197696,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197640,7 +197717,6 @@ void m68000_device::ror_b_imm3_ds_dpm() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197692,6 +197768,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197713,7 +197790,6 @@ void m68000_device::asr_b_dd_ds_dpm() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197765,6 +197841,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197786,7 +197863,6 @@ void m68000_device::lsr_b_dd_ds_dpm() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197838,6 +197914,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197859,7 +197936,6 @@ void m68000_device::roxr_b_dd_ds_dpm() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197911,6 +197987,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197932,7 +198009,6 @@ void m68000_device::ror_b_dd_ds_dpm() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197984,6 +198060,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198004,7 +198081,6 @@ void m68000_device::asr_w_imm3_ds_dpm() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198056,6 +198132,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198076,7 +198153,6 @@ void m68000_device::lsr_w_imm3_ds_dpm() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198128,6 +198204,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198148,7 +198225,6 @@ void m68000_device::roxr_w_imm3_ds_dpm() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198200,6 +198276,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198220,7 +198297,6 @@ void m68000_device::ror_w_imm3_ds_dpm() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198272,6 +198348,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198293,7 +198370,6 @@ void m68000_device::asr_w_dd_ds_dpm() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198345,6 +198421,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198366,7 +198443,6 @@ void m68000_device::lsr_w_dd_ds_dpm() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198418,6 +198494,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198439,7 +198516,6 @@ void m68000_device::roxr_w_dd_ds_dpm() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198491,6 +198567,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198512,7 +198589,6 @@ void m68000_device::ror_w_dd_ds_dpm() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198564,6 +198640,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198584,7 +198661,6 @@ void m68000_device::asr_l_imm3_ds_dpm() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198640,6 +198716,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198662,7 +198739,6 @@ void m68000_device::lsr_l_imm3_ds_dpm() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198718,6 +198794,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198740,7 +198817,6 @@ void m68000_device::roxr_l_imm3_ds_dpm() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198796,6 +198872,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -198818,7 +198895,6 @@ void m68000_device::ror_l_imm3_ds_dpm() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198874,6 +198950,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198897,7 +198974,6 @@ void m68000_device::asr_l_dd_ds_dpm() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198953,6 +199029,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198976,7 +199053,6 @@ void m68000_device::lsr_l_dd_ds_dpm() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199032,6 +199108,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199055,7 +199132,6 @@ void m68000_device::roxr_l_dd_ds_dpm() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -199111,6 +199187,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -199134,7 +199211,6 @@ void m68000_device::ror_l_dd_ds_dpm() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199190,6 +199266,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199240,7 +199317,6 @@ void m68000_device::asr_ais_dpm() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199275,6 +199351,7 @@ void m68000_device::asr_ais_dpm() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199345,7 +199422,6 @@ void m68000_device::asr_aips_dpm() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199380,6 +199456,7 @@ void m68000_device::asr_aips_dpm() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199452,7 +199529,6 @@ void m68000_device::asr_pais_dpm() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199487,6 +199563,7 @@ void m68000_device::asr_pais_dpm() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199578,7 +199655,6 @@ void m68000_device::asr_das_dpm() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199613,6 +199689,7 @@ void m68000_device::asr_das_dpm() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199745,7 +199822,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199780,6 +199856,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199870,7 +199947,6 @@ void m68000_device::asr_adr16_dpm() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199905,6 +199981,7 @@ void m68000_device::asr_adr16_dpm() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -200019,7 +200096,6 @@ void m68000_device::asr_adr32_dpm() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -200054,6 +200130,7 @@ void m68000_device::asr_adr32_dpm() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -200092,7 +200169,6 @@ void m68000_device::asl_b_imm3_ds_dpm() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200144,6 +200220,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200164,7 +200241,6 @@ void m68000_device::lsl_b_imm3_ds_dpm() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200216,6 +200292,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200237,7 +200314,6 @@ void m68000_device::roxl_b_imm3_ds_dpm() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200289,6 +200365,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200309,7 +200386,6 @@ void m68000_device::rol_b_imm3_ds_dpm() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200361,6 +200437,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200382,7 +200459,6 @@ void m68000_device::asl_b_dd_ds_dpm() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200434,6 +200510,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200455,7 +200532,6 @@ void m68000_device::lsl_b_dd_ds_dpm() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200507,6 +200583,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200529,7 +200606,6 @@ void m68000_device::roxl_b_dd_ds_dpm() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200581,6 +200657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200602,7 +200679,6 @@ void m68000_device::rol_b_dd_ds_dpm() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200654,6 +200730,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200674,7 +200751,6 @@ void m68000_device::asl_w_imm3_ds_dpm() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200726,6 +200802,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200746,7 +200823,6 @@ void m68000_device::lsl_w_imm3_ds_dpm() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200798,6 +200874,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -200819,7 +200896,6 @@ void m68000_device::roxl_w_imm3_ds_dpm() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200871,6 +200947,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200891,7 +200968,6 @@ void m68000_device::rol_w_imm3_ds_dpm() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200943,6 +201019,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200964,7 +201041,6 @@ void m68000_device::asl_w_dd_ds_dpm() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201016,6 +201092,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201037,7 +201114,6 @@ void m68000_device::lsl_w_dd_ds_dpm() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201089,6 +201165,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -201111,7 +201188,6 @@ void m68000_device::roxl_w_dd_ds_dpm() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201163,6 +201239,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201184,7 +201261,6 @@ void m68000_device::rol_w_dd_ds_dpm() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201236,6 +201312,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201256,7 +201333,6 @@ void m68000_device::asl_l_imm3_ds_dpm() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201312,6 +201388,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201334,7 +201411,6 @@ void m68000_device::lsl_l_imm3_ds_dpm() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201392,6 +201468,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201414,7 +201491,6 @@ void m68000_device::roxl_l_imm3_ds_dpm() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201470,6 +201546,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201492,7 +201569,6 @@ void m68000_device::rol_l_imm3_ds_dpm() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201548,6 +201624,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201571,7 +201648,6 @@ void m68000_device::asl_l_dd_ds_dpm() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201627,6 +201703,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201650,7 +201727,6 @@ void m68000_device::lsl_l_dd_ds_dpm() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201708,6 +201784,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201731,7 +201808,6 @@ void m68000_device::roxl_l_dd_ds_dpm() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201787,6 +201863,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201810,7 +201887,6 @@ void m68000_device::rol_l_dd_ds_dpm() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201866,6 +201942,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201916,7 +201993,6 @@ void m68000_device::asl_ais_dpm() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -201951,6 +202027,7 @@ void m68000_device::asl_ais_dpm() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202021,7 +202098,6 @@ void m68000_device::asl_aips_dpm() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202056,6 +202132,7 @@ void m68000_device::asl_aips_dpm() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202128,7 +202205,6 @@ void m68000_device::asl_pais_dpm() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202163,6 +202239,7 @@ void m68000_device::asl_pais_dpm() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202254,7 +202331,6 @@ void m68000_device::asl_das_dpm() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202289,6 +202365,7 @@ void m68000_device::asl_das_dpm() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202421,7 +202498,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202456,6 +202532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202546,7 +202623,6 @@ void m68000_device::asl_adr16_dpm() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202581,6 +202657,7 @@ void m68000_device::asl_adr16_dpm() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202695,7 +202772,6 @@ void m68000_device::asl_adr32_dpm() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202730,6 +202806,7 @@ void m68000_device::asl_adr32_dpm() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -202796,7 +202873,6 @@ void m68000_device::lsr_ais_dpm() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202831,6 +202907,7 @@ void m68000_device::lsr_ais_dpm() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202901,7 +202978,6 @@ void m68000_device::lsr_aips_dpm() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202936,6 +203012,7 @@ void m68000_device::lsr_aips_dpm() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203008,7 +203085,6 @@ void m68000_device::lsr_pais_dpm() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203043,6 +203119,7 @@ void m68000_device::lsr_pais_dpm() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203134,7 +203211,6 @@ void m68000_device::lsr_das_dpm() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203169,6 +203245,7 @@ void m68000_device::lsr_das_dpm() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203301,7 +203378,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203336,6 +203412,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203426,7 +203503,6 @@ void m68000_device::lsr_adr16_dpm() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203461,6 +203537,7 @@ void m68000_device::lsr_adr16_dpm() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203575,7 +203652,6 @@ void m68000_device::lsr_adr32_dpm() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203610,6 +203686,7 @@ void m68000_device::lsr_adr32_dpm() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -203677,7 +203754,6 @@ void m68000_device::lsl_ais_dpm() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203712,6 +203788,7 @@ void m68000_device::lsl_ais_dpm() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203785,7 +203862,6 @@ void m68000_device::lsl_aips_dpm() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203820,6 +203896,7 @@ void m68000_device::lsl_aips_dpm() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203895,7 +203972,6 @@ void m68000_device::lsl_pais_dpm() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203930,6 +204006,7 @@ void m68000_device::lsl_pais_dpm() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204024,7 +204101,6 @@ void m68000_device::lsl_das_dpm() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204059,6 +204135,7 @@ void m68000_device::lsl_das_dpm() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204196,7 +204273,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204231,6 +204307,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204324,7 +204401,6 @@ void m68000_device::lsl_adr16_dpm() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204359,6 +204435,7 @@ void m68000_device::lsl_adr16_dpm() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204477,7 +204554,6 @@ void m68000_device::lsl_adr32_dpm() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204512,6 +204588,7 @@ void m68000_device::lsl_adr32_dpm() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -204579,7 +204656,6 @@ void m68000_device::roxr_ais_dpm() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204614,6 +204690,7 @@ void m68000_device::roxr_ais_dpm() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204684,7 +204761,6 @@ void m68000_device::roxr_aips_dpm() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204719,6 +204795,7 @@ void m68000_device::roxr_aips_dpm() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204791,7 +204868,6 @@ void m68000_device::roxr_pais_dpm() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204826,6 +204902,7 @@ void m68000_device::roxr_pais_dpm() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204917,7 +204994,6 @@ void m68000_device::roxr_das_dpm() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204952,6 +205028,7 @@ void m68000_device::roxr_das_dpm() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205084,7 +205161,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205119,6 +205195,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205209,7 +205286,6 @@ void m68000_device::roxr_adr16_dpm() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205244,6 +205320,7 @@ void m68000_device::roxr_adr16_dpm() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205358,7 +205435,6 @@ void m68000_device::roxr_adr32_dpm() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205393,6 +205469,7 @@ void m68000_device::roxr_adr32_dpm() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -205459,7 +205536,6 @@ void m68000_device::roxl_ais_dpm() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205494,6 +205570,7 @@ void m68000_device::roxl_ais_dpm() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205564,7 +205641,6 @@ void m68000_device::roxl_aips_dpm() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205599,6 +205675,7 @@ void m68000_device::roxl_aips_dpm() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205671,7 +205748,6 @@ void m68000_device::roxl_pais_dpm() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205706,6 +205782,7 @@ void m68000_device::roxl_pais_dpm() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205797,7 +205874,6 @@ void m68000_device::roxl_das_dpm() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205832,6 +205908,7 @@ void m68000_device::roxl_das_dpm() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205964,7 +206041,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205999,6 +206075,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206089,7 +206166,6 @@ void m68000_device::roxl_adr16_dpm() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206124,6 +206200,7 @@ void m68000_device::roxl_adr16_dpm() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206238,7 +206315,6 @@ void m68000_device::roxl_adr32_dpm() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206273,6 +206349,7 @@ void m68000_device::roxl_adr32_dpm() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -206339,7 +206416,6 @@ void m68000_device::ror_ais_dpm() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206374,6 +206450,7 @@ void m68000_device::ror_ais_dpm() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206444,7 +206521,6 @@ void m68000_device::ror_aips_dpm() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206479,6 +206555,7 @@ void m68000_device::ror_aips_dpm() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206551,7 +206628,6 @@ void m68000_device::ror_pais_dpm() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206586,6 +206662,7 @@ void m68000_device::ror_pais_dpm() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206677,7 +206754,6 @@ void m68000_device::ror_das_dpm() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206712,6 +206788,7 @@ void m68000_device::ror_das_dpm() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206844,7 +206921,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206879,6 +206955,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206969,7 +207046,6 @@ void m68000_device::ror_adr16_dpm() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207004,6 +207080,7 @@ void m68000_device::ror_adr16_dpm() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207118,7 +207195,6 @@ void m68000_device::ror_adr32_dpm() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207153,6 +207229,7 @@ void m68000_device::ror_adr32_dpm() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -207219,7 +207296,6 @@ void m68000_device::rol_ais_dpm() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207254,6 +207330,7 @@ void m68000_device::rol_ais_dpm() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207324,7 +207401,6 @@ void m68000_device::rol_aips_dpm() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207359,6 +207435,7 @@ void m68000_device::rol_aips_dpm() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207431,7 +207508,6 @@ void m68000_device::rol_pais_dpm() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207466,6 +207542,7 @@ void m68000_device::rol_pais_dpm() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207557,7 +207634,6 @@ void m68000_device::rol_das_dpm() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207592,6 +207668,7 @@ void m68000_device::rol_das_dpm() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207724,7 +207801,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207759,6 +207835,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207849,7 +207926,6 @@ void m68000_device::rol_adr16_dpm() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207884,6 +207960,7 @@ void m68000_device::rol_adr16_dpm() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207998,7 +208075,6 @@ void m68000_device::rol_adr32_dpm() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -208033,6 +208109,7 @@ void m68000_device::rol_adr32_dpm() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: diff --git a/src/devices/cpu/m68000/m68000-sif.cpp b/src/devices/cpu/m68000/m68000-sif.cpp index e757ead8f1f..48e3b44afe5 100644 --- a/src/devices/cpu/m68000/m68000-sif.cpp +++ b/src/devices/cpu/m68000/m68000-sif.cpp @@ -10,6 +10,7 @@ void m68000_device::state_reset_if() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -139,11 +140,11 @@ void m68000_device::state_reset_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -258,6 +259,7 @@ void m68000_device::state_bus_error_if() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -416,11 +418,11 @@ void m68000_device::state_bus_error_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -535,6 +537,7 @@ void m68000_device::state_address_error_if() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -693,11 +696,11 @@ void m68000_device::state_address_error_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -796,10 +799,10 @@ void m68000_device::state_interrupt_if() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -918,11 +921,11 @@ void m68000_device::state_interrupt_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1101,11 +1104,11 @@ void m68000_device::state_trace_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1284,11 +1287,11 @@ void m68000_device::state_illegal_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1467,11 +1470,11 @@ void m68000_device::state_priviledge_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1650,11 +1653,11 @@ void m68000_device::state_linea_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1833,11 +1836,11 @@ void m68000_device::state_linef_if() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1893,13 +1896,13 @@ void m68000_device::ori_b_imm8_ds_if() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1980,7 +1983,6 @@ void m68000_device::ori_b_imm8_ais_if() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2007,6 +2009,7 @@ void m68000_device::ori_b_imm8_ais_if() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2085,7 +2088,6 @@ void m68000_device::ori_b_imm8_aips_if() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2112,6 +2114,7 @@ void m68000_device::ori_b_imm8_aips_if() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2192,7 +2195,6 @@ void m68000_device::ori_b_imm8_pais_if() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2219,6 +2221,7 @@ void m68000_device::ori_b_imm8_pais_if() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2315,7 +2318,6 @@ void m68000_device::ori_b_imm8_das_if() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2342,6 +2344,7 @@ void m68000_device::ori_b_imm8_das_if() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2478,7 +2481,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2505,6 +2507,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2600,7 +2603,6 @@ void m68000_device::ori_b_imm8_adr16_if() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2627,6 +2629,7 @@ void m68000_device::ori_b_imm8_adr16_if() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2744,7 +2747,6 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2771,6 +2773,7 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2865,12 +2868,12 @@ void m68000_device::ori_imm8_ccr_if() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2927,13 +2930,13 @@ void m68000_device::ori_w_imm16_ds_if() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3017,7 +3020,6 @@ void m68000_device::ori_w_imm16_ais_if() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3044,6 +3046,7 @@ void m68000_device::ori_w_imm16_ais_if() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3130,7 +3133,6 @@ void m68000_device::ori_w_imm16_aips_if() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3157,6 +3159,7 @@ void m68000_device::ori_w_imm16_aips_if() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3245,7 +3248,6 @@ void m68000_device::ori_w_imm16_pais_if() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3272,6 +3274,7 @@ void m68000_device::ori_w_imm16_pais_if() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3376,7 +3379,6 @@ void m68000_device::ori_w_imm16_das_if() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3403,6 +3405,7 @@ void m68000_device::ori_w_imm16_das_if() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3547,7 +3550,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3574,6 +3576,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3677,7 +3680,6 @@ void m68000_device::ori_w_imm16_adr16_if() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3704,6 +3706,7 @@ void m68000_device::ori_w_imm16_adr16_if() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3829,7 +3832,6 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3856,6 +3858,7 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3961,12 +3964,12 @@ void m68000_device::ori_i16u_sr_if() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4045,7 +4048,6 @@ void m68000_device::ori_l_imm32_ds_if() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4078,6 +4080,7 @@ void m68000_device::ori_l_imm32_ds_if() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4187,7 +4190,6 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4237,6 +4239,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4365,7 +4368,6 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4415,6 +4417,7 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4544,7 +4547,6 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4594,6 +4596,7 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4740,7 +4743,6 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4790,6 +4792,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4976,7 +4979,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5026,6 +5028,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -5175,7 +5178,6 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5225,6 +5227,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -5396,7 +5399,6 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5446,6 +5448,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -5479,7 +5482,6 @@ void m68000_device::btst_dd_ds_if() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -5517,6 +5519,7 @@ void m68000_device::btst_dd_ds_if() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -5530,6 +5533,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -5588,7 +5592,6 @@ void m68000_device::movep_w_das_dd_if() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -5608,6 +5611,7 @@ void m68000_device::movep_w_das_dd_if() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5666,7 +5670,6 @@ void m68000_device::btst_dd_ais_if() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5674,6 +5677,7 @@ void m68000_device::btst_dd_ais_if() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5734,7 +5738,6 @@ void m68000_device::btst_dd_aips_if() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5742,6 +5745,7 @@ void m68000_device::btst_dd_aips_if() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5804,7 +5808,6 @@ void m68000_device::btst_dd_pais_if() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5812,6 +5815,7 @@ void m68000_device::btst_dd_pais_if() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5890,7 +5894,6 @@ void m68000_device::btst_dd_das_if() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5898,6 +5901,7 @@ void m68000_device::btst_dd_das_if() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6016,7 +6020,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6024,6 +6027,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6101,7 +6105,6 @@ void m68000_device::btst_dd_adr16_if() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6109,6 +6112,7 @@ void m68000_device::btst_dd_adr16_if() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6208,7 +6212,6 @@ void m68000_device::btst_dd_adr32_if() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6216,6 +6219,7 @@ void m68000_device::btst_dd_adr32_if() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6293,7 +6297,6 @@ void m68000_device::btst_dd_dpc_if() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6301,6 +6304,7 @@ void m68000_device::btst_dd_dpc_if() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6418,7 +6422,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6426,6 +6429,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6483,7 +6487,6 @@ void m68000_device::btst_dd_imm_if() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -6519,6 +6522,7 @@ void m68000_device::btst_dd_imm_if() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -6532,6 +6536,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -6550,7 +6555,6 @@ void m68000_device::bchg_dd_ds_if() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6588,6 +6592,7 @@ void m68000_device::bchg_dd_ds_if() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6606,6 +6611,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6702,7 +6708,6 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -6722,6 +6727,7 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6780,7 +6786,6 @@ void m68000_device::bchg_dd_ais_if() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6807,6 +6812,7 @@ void m68000_device::bchg_dd_ais_if() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6863,7 +6869,6 @@ void m68000_device::bchg_dd_aips_if() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6890,6 +6895,7 @@ void m68000_device::bchg_dd_aips_if() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6948,7 +6954,6 @@ void m68000_device::bchg_dd_pais_if() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6975,6 +6980,7 @@ void m68000_device::bchg_dd_pais_if() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7049,7 +7055,6 @@ void m68000_device::bchg_dd_das_if() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7076,6 +7081,7 @@ void m68000_device::bchg_dd_das_if() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7190,7 +7196,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7217,6 +7222,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7290,7 +7296,6 @@ void m68000_device::bchg_dd_adr16_if() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7317,6 +7322,7 @@ void m68000_device::bchg_dd_adr16_if() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7412,7 +7418,6 @@ void m68000_device::bchg_dd_adr32_if() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7439,6 +7444,7 @@ void m68000_device::bchg_dd_adr32_if() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7468,7 +7474,6 @@ void m68000_device::bclr_dd_ds_if() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7510,6 +7515,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7532,6 +7538,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7573,7 +7580,6 @@ void m68000_device::movep_w_dd_das_if() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7607,12 +7613,12 @@ void m68000_device::movep_w_dd_das_if() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7668,7 +7674,6 @@ void m68000_device::bclr_dd_ais_if() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7699,6 +7704,7 @@ void m68000_device::bclr_dd_ais_if() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7755,7 +7761,6 @@ void m68000_device::bclr_dd_aips_if() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7786,6 +7791,7 @@ void m68000_device::bclr_dd_aips_if() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7844,7 +7850,6 @@ void m68000_device::bclr_dd_pais_if() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7875,6 +7880,7 @@ void m68000_device::bclr_dd_pais_if() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7949,7 +7955,6 @@ void m68000_device::bclr_dd_das_if() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7980,6 +7985,7 @@ void m68000_device::bclr_dd_das_if() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8094,7 +8100,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8125,6 +8130,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8198,7 +8204,6 @@ void m68000_device::bclr_dd_adr16_if() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8229,6 +8234,7 @@ void m68000_device::bclr_dd_adr16_if() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8324,7 +8330,6 @@ void m68000_device::bclr_dd_adr32_if() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8355,6 +8360,7 @@ void m68000_device::bclr_dd_adr32_if() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8384,7 +8390,6 @@ void m68000_device::bset_dd_ds_if() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8422,6 +8427,7 @@ void m68000_device::bset_dd_ds_if() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8440,6 +8446,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8513,7 +8520,6 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8547,12 +8553,12 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8608,7 +8614,6 @@ void m68000_device::bset_dd_ais_if() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8635,6 +8640,7 @@ void m68000_device::bset_dd_ais_if() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8691,7 +8697,6 @@ void m68000_device::bset_dd_aips_if() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8718,6 +8723,7 @@ void m68000_device::bset_dd_aips_if() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8776,7 +8782,6 @@ void m68000_device::bset_dd_pais_if() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8803,6 +8808,7 @@ void m68000_device::bset_dd_pais_if() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8877,7 +8883,6 @@ void m68000_device::bset_dd_das_if() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8904,6 +8909,7 @@ void m68000_device::bset_dd_das_if() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9018,7 +9024,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9045,6 +9050,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9118,7 +9124,6 @@ void m68000_device::bset_dd_adr16_if() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9145,6 +9150,7 @@ void m68000_device::bset_dd_adr16_if() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9240,7 +9246,6 @@ void m68000_device::bset_dd_adr32_if() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9267,6 +9272,7 @@ void m68000_device::bset_dd_adr32_if() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9319,13 +9325,13 @@ void m68000_device::andi_b_imm8_ds_if() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9406,7 +9412,6 @@ void m68000_device::andi_b_imm8_ais_if() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9433,6 +9438,7 @@ void m68000_device::andi_b_imm8_ais_if() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9511,7 +9517,6 @@ void m68000_device::andi_b_imm8_aips_if() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9538,6 +9543,7 @@ void m68000_device::andi_b_imm8_aips_if() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9618,7 +9624,6 @@ void m68000_device::andi_b_imm8_pais_if() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9645,6 +9650,7 @@ void m68000_device::andi_b_imm8_pais_if() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9741,7 +9747,6 @@ void m68000_device::andi_b_imm8_das_if() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9768,6 +9773,7 @@ void m68000_device::andi_b_imm8_das_if() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9904,7 +9910,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9931,6 +9936,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10026,7 +10032,6 @@ void m68000_device::andi_b_imm8_adr16_if() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10053,6 +10058,7 @@ void m68000_device::andi_b_imm8_adr16_if() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10170,7 +10176,6 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10197,6 +10202,7 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10291,12 +10297,12 @@ void m68000_device::andi_imm8_ccr_if() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10353,13 +10359,13 @@ void m68000_device::andi_w_imm16_ds_if() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10443,7 +10449,6 @@ void m68000_device::andi_w_imm16_ais_if() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10470,6 +10475,7 @@ void m68000_device::andi_w_imm16_ais_if() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10556,7 +10562,6 @@ void m68000_device::andi_w_imm16_aips_if() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10583,6 +10588,7 @@ void m68000_device::andi_w_imm16_aips_if() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10671,7 +10677,6 @@ void m68000_device::andi_w_imm16_pais_if() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10698,6 +10703,7 @@ void m68000_device::andi_w_imm16_pais_if() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10802,7 +10808,6 @@ void m68000_device::andi_w_imm16_das_if() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10829,6 +10834,7 @@ void m68000_device::andi_w_imm16_das_if() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10973,7 +10979,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11000,6 +11005,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11103,7 +11109,6 @@ void m68000_device::andi_w_imm16_adr16_if() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11130,6 +11135,7 @@ void m68000_device::andi_w_imm16_adr16_if() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11255,7 +11261,6 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11282,6 +11287,7 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11387,12 +11393,12 @@ void m68000_device::andi_i16u_sr_if() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11471,7 +11477,6 @@ void m68000_device::andi_l_imm32_ds_if() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -11504,6 +11509,7 @@ void m68000_device::andi_l_imm32_ds_if() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -11613,7 +11619,6 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11663,6 +11668,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11791,7 +11797,6 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11841,6 +11846,7 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11970,7 +11976,6 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12020,6 +12025,7 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12166,7 +12172,6 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12216,6 +12221,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12402,7 +12408,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12452,6 +12457,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12601,7 +12607,6 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12651,6 +12656,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12822,7 +12828,6 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12872,6 +12877,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12927,13 +12933,13 @@ void m68000_device::subi_b_imm8_ds_if() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13011,7 +13017,6 @@ void m68000_device::subi_b_imm8_ais_if() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13038,6 +13043,7 @@ void m68000_device::subi_b_imm8_ais_if() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13112,7 +13118,6 @@ void m68000_device::subi_b_imm8_aips_if() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13139,6 +13144,7 @@ void m68000_device::subi_b_imm8_aips_if() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13215,7 +13221,6 @@ void m68000_device::subi_b_imm8_pais_if() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13242,6 +13247,7 @@ void m68000_device::subi_b_imm8_pais_if() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13334,7 +13340,6 @@ void m68000_device::subi_b_imm8_das_if() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13361,6 +13366,7 @@ void m68000_device::subi_b_imm8_das_if() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13491,7 +13497,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13518,6 +13523,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13609,7 +13615,6 @@ void m68000_device::subi_b_imm8_adr16_if() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13636,6 +13641,7 @@ void m68000_device::subi_b_imm8_adr16_if() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13748,7 +13754,6 @@ void m68000_device::subi_b_imm8_adr32_if() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13775,6 +13780,7 @@ void m68000_device::subi_b_imm8_adr32_if() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13824,13 +13830,13 @@ void m68000_device::subi_w_imm16_ds_if() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13911,7 +13917,6 @@ void m68000_device::subi_w_imm16_ais_if() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13938,6 +13943,7 @@ void m68000_device::subi_w_imm16_ais_if() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14020,7 +14026,6 @@ void m68000_device::subi_w_imm16_aips_if() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14047,6 +14052,7 @@ void m68000_device::subi_w_imm16_aips_if() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14131,7 +14137,6 @@ void m68000_device::subi_w_imm16_pais_if() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14158,6 +14163,7 @@ void m68000_device::subi_w_imm16_pais_if() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14258,7 +14264,6 @@ void m68000_device::subi_w_imm16_das_if() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14285,6 +14290,7 @@ void m68000_device::subi_w_imm16_das_if() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14423,7 +14429,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14450,6 +14455,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14549,7 +14555,6 @@ void m68000_device::subi_w_imm16_adr16_if() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14576,6 +14581,7 @@ void m68000_device::subi_w_imm16_adr16_if() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14696,7 +14702,6 @@ void m68000_device::subi_w_imm16_adr32_if() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14723,6 +14728,7 @@ void m68000_device::subi_w_imm16_adr32_if() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14798,7 +14804,6 @@ void m68000_device::subi_l_imm32_ds_if() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -14830,6 +14835,7 @@ void m68000_device::subi_l_imm32_ds_if() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -14935,7 +14941,6 @@ void m68000_device::subi_l_imm32_ais_if() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14985,6 +14990,7 @@ void m68000_device::subi_l_imm32_ais_if() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15108,7 +15114,6 @@ void m68000_device::subi_l_imm32_aips_if() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15158,6 +15163,7 @@ void m68000_device::subi_l_imm32_aips_if() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15282,7 +15288,6 @@ void m68000_device::subi_l_imm32_pais_if() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15332,6 +15337,7 @@ void m68000_device::subi_l_imm32_pais_if() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15473,7 +15479,6 @@ void m68000_device::subi_l_imm32_das_if() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15523,6 +15528,7 @@ void m68000_device::subi_l_imm32_das_if() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15702,7 +15708,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15752,6 +15757,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15895,7 +15901,6 @@ void m68000_device::subi_l_imm32_adr16_if() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15945,6 +15950,7 @@ void m68000_device::subi_l_imm32_adr16_if() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -16109,7 +16115,6 @@ void m68000_device::subi_l_imm32_adr32_if() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16159,6 +16164,7 @@ void m68000_device::subi_l_imm32_adr32_if() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -16213,13 +16219,13 @@ void m68000_device::addi_b_imm8_ds_if() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16297,7 +16303,6 @@ void m68000_device::addi_b_imm8_ais_if() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16324,6 +16329,7 @@ void m68000_device::addi_b_imm8_ais_if() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16398,7 +16404,6 @@ void m68000_device::addi_b_imm8_aips_if() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16425,6 +16430,7 @@ void m68000_device::addi_b_imm8_aips_if() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16501,7 +16507,6 @@ void m68000_device::addi_b_imm8_pais_if() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16528,6 +16533,7 @@ void m68000_device::addi_b_imm8_pais_if() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16620,7 +16626,6 @@ void m68000_device::addi_b_imm8_das_if() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16647,6 +16652,7 @@ void m68000_device::addi_b_imm8_das_if() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16777,7 +16783,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16804,6 +16809,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16895,7 +16901,6 @@ void m68000_device::addi_b_imm8_adr16_if() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16922,6 +16927,7 @@ void m68000_device::addi_b_imm8_adr16_if() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17034,7 +17040,6 @@ void m68000_device::addi_b_imm8_adr32_if() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17061,6 +17066,7 @@ void m68000_device::addi_b_imm8_adr32_if() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17110,13 +17116,13 @@ void m68000_device::addi_w_imm16_ds_if() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17197,7 +17203,6 @@ void m68000_device::addi_w_imm16_ais_if() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17224,6 +17229,7 @@ void m68000_device::addi_w_imm16_ais_if() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17306,7 +17312,6 @@ void m68000_device::addi_w_imm16_aips_if() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17333,6 +17338,7 @@ void m68000_device::addi_w_imm16_aips_if() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17417,7 +17423,6 @@ void m68000_device::addi_w_imm16_pais_if() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17444,6 +17449,7 @@ void m68000_device::addi_w_imm16_pais_if() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17544,7 +17550,6 @@ void m68000_device::addi_w_imm16_das_if() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17571,6 +17576,7 @@ void m68000_device::addi_w_imm16_das_if() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17709,7 +17715,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17736,6 +17741,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17835,7 +17841,6 @@ void m68000_device::addi_w_imm16_adr16_if() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17862,6 +17867,7 @@ void m68000_device::addi_w_imm16_adr16_if() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17982,7 +17988,6 @@ void m68000_device::addi_w_imm16_adr32_if() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18009,6 +18014,7 @@ void m68000_device::addi_w_imm16_adr32_if() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18084,7 +18090,6 @@ void m68000_device::addi_l_imm32_ds_if() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -18116,6 +18121,7 @@ void m68000_device::addi_l_imm32_ds_if() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -18221,7 +18227,6 @@ void m68000_device::addi_l_imm32_ais_if() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18271,6 +18276,7 @@ void m68000_device::addi_l_imm32_ais_if() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18394,7 +18400,6 @@ void m68000_device::addi_l_imm32_aips_if() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18444,6 +18449,7 @@ void m68000_device::addi_l_imm32_aips_if() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18568,7 +18574,6 @@ void m68000_device::addi_l_imm32_pais_if() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18618,6 +18623,7 @@ void m68000_device::addi_l_imm32_pais_if() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18759,7 +18765,6 @@ void m68000_device::addi_l_imm32_das_if() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18809,6 +18814,7 @@ void m68000_device::addi_l_imm32_das_if() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18988,7 +18994,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19038,6 +19043,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -19181,7 +19187,6 @@ void m68000_device::addi_l_imm32_adr16_if() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19231,6 +19236,7 @@ void m68000_device::addi_l_imm32_adr16_if() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -19395,7 +19401,6 @@ void m68000_device::addi_l_imm32_adr32_if() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19445,6 +19450,7 @@ void m68000_device::addi_l_imm32_adr32_if() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -19500,7 +19506,6 @@ void m68000_device::btst_imm8_ds_if() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -19538,6 +19543,7 @@ void m68000_device::btst_imm8_ds_if() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -19551,6 +19557,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -19614,7 +19621,6 @@ void m68000_device::btst_imm8_ais_if() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19622,6 +19628,7 @@ void m68000_device::btst_imm8_ais_if() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19705,7 +19712,6 @@ void m68000_device::btst_imm8_aips_if() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19713,6 +19719,7 @@ void m68000_device::btst_imm8_aips_if() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19798,7 +19805,6 @@ void m68000_device::btst_imm8_pais_if() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19806,6 +19812,7 @@ void m68000_device::btst_imm8_pais_if() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19907,7 +19914,6 @@ void m68000_device::btst_imm8_das_if() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19915,6 +19921,7 @@ void m68000_device::btst_imm8_das_if() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20056,7 +20063,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20064,6 +20070,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20164,7 +20171,6 @@ void m68000_device::btst_imm8_adr16_if() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20172,6 +20178,7 @@ void m68000_device::btst_imm8_adr16_if() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20294,7 +20301,6 @@ void m68000_device::btst_imm8_adr32_if() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20302,6 +20308,7 @@ void m68000_device::btst_imm8_adr32_if() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20402,7 +20409,6 @@ void m68000_device::btst_imm8_dpc_if() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20410,6 +20416,7 @@ void m68000_device::btst_imm8_dpc_if() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20550,7 +20557,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20558,6 +20564,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20614,7 +20621,6 @@ void m68000_device::bchg_imm8_ds_if() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -20652,6 +20658,7 @@ void m68000_device::bchg_imm8_ds_if() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20670,6 +20677,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20734,7 +20742,6 @@ void m68000_device::bchg_imm8_ais_if() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20761,6 +20768,7 @@ void m68000_device::bchg_imm8_ais_if() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20840,7 +20848,6 @@ void m68000_device::bchg_imm8_aips_if() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20867,6 +20874,7 @@ void m68000_device::bchg_imm8_aips_if() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20948,7 +20956,6 @@ void m68000_device::bchg_imm8_pais_if() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20975,6 +20982,7 @@ void m68000_device::bchg_imm8_pais_if() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21072,7 +21080,6 @@ void m68000_device::bchg_imm8_das_if() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21099,6 +21106,7 @@ void m68000_device::bchg_imm8_das_if() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21236,7 +21244,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21263,6 +21270,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21359,7 +21367,6 @@ void m68000_device::bchg_imm8_adr16_if() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21386,6 +21393,7 @@ void m68000_device::bchg_imm8_adr16_if() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21504,7 +21512,6 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21531,6 +21538,7 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21583,7 +21591,6 @@ void m68000_device::bclr_imm8_ds_if() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -21625,6 +21632,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21647,6 +21655,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21711,7 +21720,6 @@ void m68000_device::bclr_imm8_ais_if() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21742,6 +21750,7 @@ void m68000_device::bclr_imm8_ais_if() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21821,7 +21830,6 @@ void m68000_device::bclr_imm8_aips_if() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21852,6 +21860,7 @@ void m68000_device::bclr_imm8_aips_if() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21933,7 +21942,6 @@ void m68000_device::bclr_imm8_pais_if() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21964,6 +21972,7 @@ void m68000_device::bclr_imm8_pais_if() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22061,7 +22070,6 @@ void m68000_device::bclr_imm8_das_if() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22092,6 +22100,7 @@ void m68000_device::bclr_imm8_das_if() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22229,7 +22238,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22260,6 +22268,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22356,7 +22365,6 @@ void m68000_device::bclr_imm8_adr16_if() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22387,6 +22395,7 @@ void m68000_device::bclr_imm8_adr16_if() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22505,7 +22514,6 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22536,6 +22544,7 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22588,7 +22597,6 @@ void m68000_device::bset_imm8_ds_if() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22626,6 +22634,7 @@ void m68000_device::bset_imm8_ds_if() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22644,6 +22653,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22708,7 +22718,6 @@ void m68000_device::bset_imm8_ais_if() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -22735,6 +22744,7 @@ void m68000_device::bset_imm8_ais_if() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22814,7 +22824,6 @@ void m68000_device::bset_imm8_aips_if() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -22841,6 +22850,7 @@ void m68000_device::bset_imm8_aips_if() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22922,7 +22932,6 @@ void m68000_device::bset_imm8_pais_if() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -22949,6 +22958,7 @@ void m68000_device::bset_imm8_pais_if() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23046,7 +23056,6 @@ void m68000_device::bset_imm8_das_if() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23073,6 +23082,7 @@ void m68000_device::bset_imm8_das_if() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23210,7 +23220,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23237,6 +23246,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23333,7 +23343,6 @@ void m68000_device::bset_imm8_adr16_if() // 08f8 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23360,6 +23369,7 @@ void m68000_device::bset_imm8_adr16_if() // 08f8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23478,7 +23488,6 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23505,6 +23514,7 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23557,13 +23567,13 @@ void m68000_device::eori_b_imm8_ds_if() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23644,7 +23654,6 @@ void m68000_device::eori_b_imm8_ais_if() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23671,6 +23680,7 @@ void m68000_device::eori_b_imm8_ais_if() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23749,7 +23759,6 @@ void m68000_device::eori_b_imm8_aips_if() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23776,6 +23785,7 @@ void m68000_device::eori_b_imm8_aips_if() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23856,7 +23866,6 @@ void m68000_device::eori_b_imm8_pais_if() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23883,6 +23892,7 @@ void m68000_device::eori_b_imm8_pais_if() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23979,7 +23989,6 @@ void m68000_device::eori_b_imm8_das_if() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24006,6 +24015,7 @@ void m68000_device::eori_b_imm8_das_if() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24142,7 +24152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24169,6 +24178,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24264,7 +24274,6 @@ void m68000_device::eori_b_imm8_adr16_if() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24291,6 +24300,7 @@ void m68000_device::eori_b_imm8_adr16_if() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24408,7 +24418,6 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24435,6 +24444,7 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24529,12 +24539,12 @@ void m68000_device::eori_imm8_ccr_if() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24591,13 +24601,13 @@ void m68000_device::eori_w_imm16_ds_if() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24681,7 +24691,6 @@ void m68000_device::eori_w_imm16_ais_if() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24708,6 +24717,7 @@ void m68000_device::eori_w_imm16_ais_if() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -24794,7 +24804,6 @@ void m68000_device::eori_w_imm16_aips_if() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24821,6 +24830,7 @@ void m68000_device::eori_w_imm16_aips_if() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -24909,7 +24919,6 @@ void m68000_device::eori_w_imm16_pais_if() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24936,6 +24945,7 @@ void m68000_device::eori_w_imm16_pais_if() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25040,7 +25050,6 @@ void m68000_device::eori_w_imm16_das_if() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25067,6 +25076,7 @@ void m68000_device::eori_w_imm16_das_if() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25211,7 +25221,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25238,6 +25247,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25341,7 +25351,6 @@ void m68000_device::eori_w_imm16_adr16_if() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25368,6 +25377,7 @@ void m68000_device::eori_w_imm16_adr16_if() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25493,7 +25503,6 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25520,6 +25529,7 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25625,12 +25635,12 @@ void m68000_device::eori_i16u_sr_if() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25709,7 +25719,6 @@ void m68000_device::eori_l_imm32_ds_if() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -25742,6 +25751,7 @@ void m68000_device::eori_l_imm32_ds_if() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -25851,7 +25861,6 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25901,6 +25910,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26029,7 +26039,6 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26079,6 +26088,7 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26208,7 +26218,6 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26258,6 +26267,7 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26404,7 +26414,6 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26454,6 +26463,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26640,7 +26650,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26690,6 +26699,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26839,7 +26849,6 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26889,6 +26898,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -27060,7 +27070,6 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27110,6 +27119,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -27165,13 +27175,13 @@ void m68000_device::cmpi_b_imm8_ds_if() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27248,7 +27258,6 @@ void m68000_device::cmpi_b_imm8_ais_if() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27256,6 +27265,7 @@ void m68000_device::cmpi_b_imm8_ais_if() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27335,7 +27345,6 @@ void m68000_device::cmpi_b_imm8_aips_if() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27343,6 +27352,7 @@ void m68000_device::cmpi_b_imm8_aips_if() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27424,7 +27434,6 @@ void m68000_device::cmpi_b_imm8_pais_if() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27432,6 +27441,7 @@ void m68000_device::cmpi_b_imm8_pais_if() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27529,7 +27539,6 @@ void m68000_device::cmpi_b_imm8_das_if() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27537,6 +27546,7 @@ void m68000_device::cmpi_b_imm8_das_if() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27672,7 +27682,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27680,6 +27689,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27776,7 +27786,6 @@ void m68000_device::cmpi_b_imm8_adr16_if() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27784,6 +27793,7 @@ void m68000_device::cmpi_b_imm8_adr16_if() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27901,7 +27911,6 @@ void m68000_device::cmpi_b_imm8_adr32_if() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27909,6 +27918,7 @@ void m68000_device::cmpi_b_imm8_adr32_if() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27963,13 +27973,13 @@ void m68000_device::cmpi_w_imm16_ds_if() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28049,7 +28059,6 @@ void m68000_device::cmpi_w_imm16_ais_if() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28057,6 +28066,7 @@ void m68000_device::cmpi_w_imm16_ais_if() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28139,7 +28149,6 @@ void m68000_device::cmpi_w_imm16_aips_if() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28147,6 +28156,7 @@ void m68000_device::cmpi_w_imm16_aips_if() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28231,7 +28241,6 @@ void m68000_device::cmpi_w_imm16_pais_if() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28239,6 +28248,7 @@ void m68000_device::cmpi_w_imm16_pais_if() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28339,7 +28349,6 @@ void m68000_device::cmpi_w_imm16_das_if() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28347,6 +28356,7 @@ void m68000_device::cmpi_w_imm16_das_if() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28485,7 +28495,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28493,6 +28502,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28592,7 +28602,6 @@ void m68000_device::cmpi_w_imm16_adr16_if() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28600,6 +28609,7 @@ void m68000_device::cmpi_w_imm16_adr16_if() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28720,7 +28730,6 @@ void m68000_device::cmpi_w_imm16_adr32_if() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28728,6 +28737,7 @@ void m68000_device::cmpi_w_imm16_adr32_if() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28804,7 +28814,6 @@ void m68000_device::cmpi_l_imm32_ds_if() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -28833,6 +28842,7 @@ void m68000_device::cmpi_l_imm32_ds_if() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -28937,7 +28947,6 @@ void m68000_device::cmpi_l_imm32_ais_if() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28945,6 +28954,7 @@ void m68000_device::cmpi_l_imm32_ais_if() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29071,7 +29081,6 @@ void m68000_device::cmpi_l_imm32_aips_if() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29079,6 +29088,7 @@ void m68000_device::cmpi_l_imm32_aips_if() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29206,7 +29216,6 @@ void m68000_device::cmpi_l_imm32_pais_if() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29214,6 +29223,7 @@ void m68000_device::cmpi_l_imm32_pais_if() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29358,7 +29368,6 @@ void m68000_device::cmpi_l_imm32_das_if() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29366,6 +29375,7 @@ void m68000_device::cmpi_l_imm32_das_if() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29548,7 +29558,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29556,6 +29565,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29702,7 +29712,6 @@ void m68000_device::cmpi_l_imm32_adr16_if() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29710,6 +29719,7 @@ void m68000_device::cmpi_l_imm32_adr16_if() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29877,7 +29887,6 @@ void m68000_device::cmpi_l_imm32_adr32_if() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29885,6 +29894,7 @@ void m68000_device::cmpi_l_imm32_adr32_if() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29920,7 +29930,6 @@ void m68000_device::move_b_ds_dd_if() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -29929,6 +29938,7 @@ void m68000_device::move_b_ds_dd_if() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29984,7 +29994,6 @@ void m68000_device::move_b_ais_dd_if() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -29993,6 +30002,7 @@ void m68000_device::move_b_ais_dd_if() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30050,7 +30060,6 @@ void m68000_device::move_b_aips_dd_if() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30059,6 +30068,7 @@ void m68000_device::move_b_aips_dd_if() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30118,7 +30128,6 @@ void m68000_device::move_b_pais_dd_if() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30127,6 +30136,7 @@ void m68000_device::move_b_pais_dd_if() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30202,7 +30212,6 @@ void m68000_device::move_b_das_dd_if() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30211,6 +30220,7 @@ void m68000_device::move_b_das_dd_if() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30324,7 +30334,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30333,6 +30342,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30407,7 +30417,6 @@ void m68000_device::move_b_adr16_dd_if() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30416,6 +30425,7 @@ void m68000_device::move_b_adr16_dd_if() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30511,7 +30521,6 @@ void m68000_device::move_b_adr32_dd_if() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30520,6 +30529,7 @@ void m68000_device::move_b_adr32_dd_if() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30594,7 +30604,6 @@ void m68000_device::move_b_dpc_dd_if() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30603,6 +30612,7 @@ void m68000_device::move_b_dpc_dd_if() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30715,7 +30725,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30724,6 +30733,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30779,7 +30789,6 @@ void m68000_device::move_b_imm8_dd_if() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -30788,6 +30797,7 @@ void m68000_device::move_b_imm8_dd_if() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30822,7 +30832,6 @@ void m68000_device::move_b_ds_aid_if() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -30843,10 +30852,10 @@ void m68000_device::move_b_ds_aid_if() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30919,10 +30928,10 @@ void m68000_device::move_b_ais_aid_if() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30999,10 +31008,10 @@ void m68000_device::move_b_aips_aid_if() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31081,10 +31090,10 @@ void m68000_device::move_b_pais_aid_if() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31179,10 +31188,10 @@ void m68000_device::move_b_das_aid_if() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31315,10 +31324,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31412,10 +31421,10 @@ void m68000_device::move_b_adr16_aid_if() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31530,10 +31539,10 @@ void m68000_device::move_b_adr32_aid_if() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31627,10 +31636,10 @@ void m68000_device::move_b_dpc_aid_if() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31762,10 +31771,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31821,7 +31830,6 @@ void m68000_device::move_b_imm8_aid_if() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31842,10 +31850,10 @@ void m68000_device::move_b_imm8_aid_if() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31878,7 +31886,6 @@ void m68000_device::move_b_ds_aipd_if() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31899,6 +31906,7 @@ void m68000_device::move_b_ds_aipd_if() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31954,7 +31962,6 @@ void m68000_device::move_b_ais_aipd_if() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31975,6 +31982,7 @@ void m68000_device::move_b_ais_aipd_if() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32034,7 +32042,6 @@ void m68000_device::move_b_aips_aipd_if() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32055,6 +32062,7 @@ void m68000_device::move_b_aips_aipd_if() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32116,7 +32124,6 @@ void m68000_device::move_b_pais_aipd_if() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32137,6 +32144,7 @@ void m68000_device::move_b_pais_aipd_if() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32214,7 +32222,6 @@ void m68000_device::move_b_das_aipd_if() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32235,6 +32242,7 @@ void m68000_device::move_b_das_aipd_if() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32350,7 +32358,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32371,6 +32378,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32447,7 +32455,6 @@ void m68000_device::move_b_adr16_aipd_if() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32468,6 +32475,7 @@ void m68000_device::move_b_adr16_aipd_if() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32565,7 +32573,6 @@ void m68000_device::move_b_adr32_aipd_if() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32586,6 +32593,7 @@ void m68000_device::move_b_adr32_aipd_if() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32662,7 +32670,6 @@ void m68000_device::move_b_dpc_aipd_if() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32683,6 +32690,7 @@ void m68000_device::move_b_dpc_aipd_if() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32797,7 +32805,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32818,6 +32825,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32875,7 +32883,6 @@ void m68000_device::move_b_imm8_aipd_if() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32896,6 +32903,7 @@ void m68000_device::move_b_imm8_aipd_if() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32930,7 +32938,6 @@ void m68000_device::move_b_ds_paid_if() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32957,6 +32964,7 @@ void m68000_device::move_b_ds_paid_if() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33006,7 +33014,6 @@ void m68000_device::move_b_ais_paid_if() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33033,6 +33040,7 @@ void m68000_device::move_b_ais_paid_if() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33086,7 +33094,6 @@ void m68000_device::move_b_aips_paid_if() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33113,6 +33120,7 @@ void m68000_device::move_b_aips_paid_if() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33168,7 +33176,6 @@ void m68000_device::move_b_pais_paid_if() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33195,6 +33202,7 @@ void m68000_device::move_b_pais_paid_if() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33266,7 +33274,6 @@ void m68000_device::move_b_das_paid_if() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33293,6 +33300,7 @@ void m68000_device::move_b_das_paid_if() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33402,7 +33410,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33429,6 +33436,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33499,7 +33507,6 @@ void m68000_device::move_b_adr16_paid_if() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33526,6 +33533,7 @@ void m68000_device::move_b_adr16_paid_if() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33617,7 +33625,6 @@ void m68000_device::move_b_adr32_paid_if() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33644,6 +33651,7 @@ void m68000_device::move_b_adr32_paid_if() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33714,7 +33722,6 @@ void m68000_device::move_b_dpc_paid_if() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33741,6 +33748,7 @@ void m68000_device::move_b_dpc_paid_if() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33849,7 +33857,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33876,6 +33883,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33927,7 +33935,6 @@ void m68000_device::move_b_imm8_paid_if() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33954,6 +33961,7 @@ void m68000_device::move_b_imm8_paid_if() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34003,7 +34011,6 @@ void m68000_device::move_b_ds_dad_if() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34023,11 +34030,11 @@ void m68000_device::move_b_ds_dad_if() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34105,6 +34112,7 @@ void m68000_device::move_b_ais_dad_if() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34124,11 +34132,11 @@ void m68000_device::move_b_ais_dad_if() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34210,6 +34218,7 @@ void m68000_device::move_b_aips_dad_if() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34229,11 +34238,11 @@ void m68000_device::move_b_aips_dad_if() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34317,6 +34326,7 @@ void m68000_device::move_b_pais_dad_if() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34336,11 +34346,11 @@ void m68000_device::move_b_pais_dad_if() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34440,6 +34450,7 @@ void m68000_device::move_b_das_dad_if() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34459,11 +34470,11 @@ void m68000_device::move_b_das_dad_if() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34601,6 +34612,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34620,11 +34632,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34723,6 +34735,7 @@ void m68000_device::move_b_adr16_dad_if() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34742,11 +34755,11 @@ void m68000_device::move_b_adr16_dad_if() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34866,6 +34879,7 @@ void m68000_device::move_b_adr32_dad_if() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34885,11 +34899,11 @@ void m68000_device::move_b_adr32_dad_if() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34988,6 +35002,7 @@ void m68000_device::move_b_dpc_dad_if() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35007,11 +35022,11 @@ void m68000_device::move_b_dpc_dad_if() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35148,6 +35163,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35167,11 +35183,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35248,7 +35264,6 @@ void m68000_device::move_b_imm8_dad_if() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35268,11 +35283,11 @@ void m68000_device::move_b_imm8_dad_if() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35365,7 +35380,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35385,11 +35399,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35505,6 +35519,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35524,11 +35539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35648,6 +35663,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35667,11 +35683,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35793,6 +35809,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35812,11 +35829,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35954,6 +35971,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35973,11 +35991,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36153,6 +36171,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36172,11 +36191,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36313,6 +36332,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36332,11 +36352,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36494,6 +36514,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36513,11 +36534,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36654,6 +36675,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36673,11 +36695,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36852,6 +36874,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36871,11 +36894,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36991,7 +37014,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37011,11 +37033,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37072,6 +37094,7 @@ void m68000_device::move_b_ds_adr16_if() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37091,11 +37114,11 @@ void m68000_device::move_b_ds_adr16_if() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37172,6 +37195,7 @@ void m68000_device::move_b_ais_adr16_if() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37191,11 +37215,11 @@ void m68000_device::move_b_ais_adr16_if() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37276,6 +37300,7 @@ void m68000_device::move_b_aips_adr16_if() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37295,11 +37320,11 @@ void m68000_device::move_b_aips_adr16_if() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37382,6 +37407,7 @@ void m68000_device::move_b_pais_adr16_if() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37401,11 +37427,11 @@ void m68000_device::move_b_pais_adr16_if() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37504,6 +37530,7 @@ void m68000_device::move_b_das_adr16_if() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37523,11 +37550,11 @@ void m68000_device::move_b_das_adr16_if() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37664,6 +37691,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37683,11 +37711,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37785,6 +37813,7 @@ void m68000_device::move_b_adr16_adr16_if() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37804,11 +37833,11 @@ void m68000_device::move_b_adr16_adr16_if() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37927,6 +37956,7 @@ void m68000_device::move_b_adr32_adr16_if() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37946,11 +37976,11 @@ void m68000_device::move_b_adr32_adr16_if() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38048,6 +38078,7 @@ void m68000_device::move_b_dpc_adr16_if() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38067,11 +38098,11 @@ void m68000_device::move_b_dpc_adr16_if() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38207,6 +38238,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38226,11 +38258,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38310,6 +38342,7 @@ void m68000_device::move_b_imm8_adr16_if() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38329,11 +38362,11 @@ void m68000_device::move_b_imm8_adr16_if() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38411,6 +38444,7 @@ void m68000_device::move_b_ds_adr32_if() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38430,11 +38464,11 @@ void m68000_device::move_b_ds_adr32_if() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38511,7 +38545,6 @@ void m68000_device::move_b_ais_adr32_if() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38552,11 +38585,11 @@ void m68000_device::move_b_ais_adr32_if() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38637,7 +38670,6 @@ void m68000_device::move_b_aips_adr32_if() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38678,11 +38710,11 @@ void m68000_device::move_b_aips_adr32_if() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38765,7 +38797,6 @@ void m68000_device::move_b_pais_adr32_if() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38806,11 +38837,11 @@ void m68000_device::move_b_pais_adr32_if() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38909,7 +38940,6 @@ void m68000_device::move_b_das_adr32_if() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38950,11 +38980,11 @@ void m68000_device::move_b_das_adr32_if() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39091,7 +39121,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39132,11 +39161,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39234,7 +39263,6 @@ void m68000_device::move_b_adr16_adr32_if() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39275,11 +39303,11 @@ void m68000_device::move_b_adr16_adr32_if() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39398,7 +39426,6 @@ void m68000_device::move_b_adr32_adr32_if() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39439,11 +39466,11 @@ void m68000_device::move_b_adr32_adr32_if() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39541,7 +39568,6 @@ void m68000_device::move_b_dpc_adr32_if() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39582,11 +39608,11 @@ void m68000_device::move_b_dpc_adr32_if() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39722,7 +39748,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39763,11 +39788,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39868,6 +39893,7 @@ void m68000_device::move_b_imm8_adr32_if() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39887,11 +39913,11 @@ void m68000_device::move_b_imm8_adr32_if() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39924,7 +39950,6 @@ void m68000_device::move_l_ds_dd_if() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39933,6 +39958,7 @@ void m68000_device::move_l_ds_dd_if() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39969,7 +39995,6 @@ void m68000_device::move_l_as_dd_if() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39978,6 +40003,7 @@ void m68000_device::move_l_as_dd_if() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40059,7 +40085,6 @@ void m68000_device::move_l_ais_dd_if() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40068,6 +40093,7 @@ void m68000_device::move_l_ais_dd_if() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40152,7 +40178,6 @@ void m68000_device::move_l_aips_dd_if() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40161,6 +40186,7 @@ void m68000_device::move_l_aips_dd_if() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40246,7 +40272,6 @@ void m68000_device::move_l_pais_dd_if() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40255,6 +40280,7 @@ void m68000_device::move_l_pais_dd_if() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40357,7 +40383,6 @@ void m68000_device::move_l_das_dd_if() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40366,6 +40391,7 @@ void m68000_device::move_l_das_dd_if() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40506,7 +40532,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40515,6 +40540,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40619,7 +40645,6 @@ void m68000_device::move_l_adr16_dd_if() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40628,6 +40653,7 @@ void m68000_device::move_l_adr16_dd_if() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40753,7 +40779,6 @@ void m68000_device::move_l_adr32_dd_if() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40762,6 +40787,7 @@ void m68000_device::move_l_adr32_dd_if() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40863,7 +40889,6 @@ void m68000_device::move_l_dpc_dd_if() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40872,6 +40897,7 @@ void m68000_device::move_l_dpc_dd_if() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41011,7 +41037,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41020,6 +41045,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41100,7 +41126,6 @@ void m68000_device::move_l_imm32_dd_if() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -41109,6 +41134,7 @@ void m68000_device::move_l_imm32_dd_if() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41145,7 +41171,6 @@ void m68000_device::movea_l_ds_ad_if() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41153,6 +41178,7 @@ void m68000_device::movea_l_ds_ad_if() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41188,7 +41214,6 @@ void m68000_device::movea_l_as_ad_if() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41196,6 +41221,7 @@ void m68000_device::movea_l_as_ad_if() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41276,7 +41302,6 @@ void m68000_device::movea_l_ais_ad_if() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41284,6 +41309,7 @@ void m68000_device::movea_l_ais_ad_if() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41367,7 +41393,6 @@ void m68000_device::movea_l_aips_ad_if() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41375,6 +41400,7 @@ void m68000_device::movea_l_aips_ad_if() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41459,7 +41485,6 @@ void m68000_device::movea_l_pais_ad_if() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41467,6 +41492,7 @@ void m68000_device::movea_l_pais_ad_if() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41568,7 +41594,6 @@ void m68000_device::movea_l_das_ad_if() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41576,6 +41601,7 @@ void m68000_device::movea_l_das_ad_if() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41715,7 +41741,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41723,6 +41748,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41826,7 +41852,6 @@ void m68000_device::movea_l_adr16_ad_if() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41834,6 +41859,7 @@ void m68000_device::movea_l_adr16_ad_if() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41958,7 +41984,6 @@ void m68000_device::movea_l_adr32_ad_if() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41966,6 +41991,7 @@ void m68000_device::movea_l_adr32_ad_if() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42066,7 +42092,6 @@ void m68000_device::movea_l_dpc_ad_if() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42074,6 +42099,7 @@ void m68000_device::movea_l_dpc_ad_if() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42212,7 +42238,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42220,6 +42245,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42299,7 +42325,6 @@ void m68000_device::movea_l_imm32_ad_if() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -42307,6 +42332,7 @@ void m68000_device::movea_l_imm32_ad_if() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42364,7 +42390,6 @@ void m68000_device::move_l_ds_aid_if() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42389,6 +42414,7 @@ void m68000_device::move_l_ds_aid_if() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42448,7 +42474,6 @@ void m68000_device::move_l_as_aid_if() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42473,6 +42498,7 @@ void m68000_device::move_l_as_aid_if() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42579,7 +42605,6 @@ void m68000_device::move_l_ais_aid_if() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42604,10 +42629,10 @@ void m68000_device::move_l_ais_aid_if() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42712,7 +42737,6 @@ void m68000_device::move_l_aips_aid_if() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42737,10 +42761,10 @@ void m68000_device::move_l_aips_aid_if() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42846,7 +42870,6 @@ void m68000_device::move_l_pais_aid_if() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42871,10 +42894,10 @@ void m68000_device::move_l_pais_aid_if() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42997,7 +43020,6 @@ void m68000_device::move_l_das_aid_if() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43022,10 +43044,10 @@ void m68000_device::move_l_das_aid_if() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43186,7 +43208,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43211,10 +43232,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43339,7 +43360,6 @@ void m68000_device::move_l_adr16_aid_if() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43364,10 +43384,10 @@ void m68000_device::move_l_adr16_aid_if() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43513,7 +43533,6 @@ void m68000_device::move_l_adr32_aid_if() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43538,10 +43557,10 @@ void m68000_device::move_l_adr32_aid_if() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43663,7 +43682,6 @@ void m68000_device::move_l_dpc_aid_if() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43688,10 +43706,10 @@ void m68000_device::move_l_dpc_aid_if() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43851,7 +43869,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43876,10 +43893,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43978,7 +43995,6 @@ void m68000_device::move_l_imm32_aid_if() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44003,6 +44019,7 @@ void m68000_device::move_l_imm32_aid_if() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44062,7 +44079,6 @@ void m68000_device::move_l_ds_aipd_if() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44087,6 +44103,7 @@ void m68000_device::move_l_ds_aipd_if() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44146,7 +44163,6 @@ void m68000_device::move_l_as_aipd_if() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44171,6 +44187,7 @@ void m68000_device::move_l_as_aipd_if() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44277,7 +44294,6 @@ void m68000_device::move_l_ais_aipd_if() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44302,6 +44318,7 @@ void m68000_device::move_l_ais_aipd_if() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44408,7 +44425,6 @@ void m68000_device::move_l_aips_aipd_if() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44433,6 +44449,7 @@ void m68000_device::move_l_aips_aipd_if() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44540,7 +44557,6 @@ void m68000_device::move_l_pais_aipd_if() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44565,6 +44581,7 @@ void m68000_device::move_l_pais_aipd_if() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44689,7 +44706,6 @@ void m68000_device::move_l_das_aipd_if() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44714,6 +44730,7 @@ void m68000_device::move_l_das_aipd_if() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44876,7 +44893,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44901,6 +44917,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45027,7 +45044,6 @@ void m68000_device::move_l_adr16_aipd_if() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45052,6 +45068,7 @@ void m68000_device::move_l_adr16_aipd_if() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45199,7 +45216,6 @@ void m68000_device::move_l_adr32_aipd_if() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45224,6 +45240,7 @@ void m68000_device::move_l_adr32_aipd_if() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45347,7 +45364,6 @@ void m68000_device::move_l_dpc_aipd_if() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45372,6 +45388,7 @@ void m68000_device::move_l_dpc_aipd_if() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45533,7 +45550,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45558,6 +45574,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45658,7 +45675,6 @@ void m68000_device::move_l_imm32_aipd_if() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45683,6 +45699,7 @@ void m68000_device::move_l_imm32_aipd_if() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45720,7 +45737,6 @@ void m68000_device::move_l_ds_paid_if() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45770,6 +45786,7 @@ void m68000_device::move_l_ds_paid_if() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45803,7 +45820,6 @@ void m68000_device::move_l_as_paid_if() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45853,6 +45869,7 @@ void m68000_device::move_l_as_paid_if() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45931,7 +45948,6 @@ void m68000_device::move_l_ais_paid_if() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45981,6 +45997,7 @@ void m68000_device::move_l_ais_paid_if() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46062,7 +46079,6 @@ void m68000_device::move_l_aips_paid_if() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46112,6 +46128,7 @@ void m68000_device::move_l_aips_paid_if() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46194,7 +46211,6 @@ void m68000_device::move_l_pais_paid_if() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46244,6 +46260,7 @@ void m68000_device::move_l_pais_paid_if() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46343,7 +46360,6 @@ void m68000_device::move_l_das_paid_if() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46393,6 +46409,7 @@ void m68000_device::move_l_das_paid_if() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46530,7 +46547,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46580,6 +46596,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46681,7 +46698,6 @@ void m68000_device::move_l_adr16_paid_if() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46731,6 +46747,7 @@ void m68000_device::move_l_adr16_paid_if() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46853,7 +46870,6 @@ void m68000_device::move_l_adr32_paid_if() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46903,6 +46919,7 @@ void m68000_device::move_l_adr32_paid_if() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47001,7 +47018,6 @@ void m68000_device::move_l_dpc_paid_if() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47051,6 +47067,7 @@ void m68000_device::move_l_dpc_paid_if() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47187,7 +47204,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47237,6 +47253,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47314,7 +47331,6 @@ void m68000_device::move_l_imm32_paid_if() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47364,6 +47380,7 @@ void m68000_device::move_l_imm32_paid_if() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47442,7 +47459,6 @@ void m68000_device::move_l_ds_dad_if() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47467,6 +47483,7 @@ void m68000_device::move_l_ds_dad_if() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47549,7 +47566,6 @@ void m68000_device::move_l_as_dad_if() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47574,6 +47590,7 @@ void m68000_device::move_l_as_dad_if() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47704,6 +47721,7 @@ void m68000_device::move_l_ais_dad_if() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47728,11 +47746,11 @@ void m68000_device::move_l_ais_dad_if() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47861,6 +47879,7 @@ void m68000_device::move_l_aips_dad_if() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47885,11 +47904,11 @@ void m68000_device::move_l_aips_dad_if() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48019,6 +48038,7 @@ void m68000_device::move_l_pais_dad_if() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48043,11 +48063,11 @@ void m68000_device::move_l_pais_dad_if() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48194,6 +48214,7 @@ void m68000_device::move_l_das_dad_if() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48218,11 +48239,11 @@ void m68000_device::move_l_das_dad_if() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48407,6 +48428,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48431,11 +48453,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48584,6 +48606,7 @@ void m68000_device::move_l_adr16_dad_if() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48608,11 +48631,11 @@ void m68000_device::move_l_adr16_dad_if() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48782,6 +48805,7 @@ void m68000_device::move_l_adr32_dad_if() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48806,11 +48830,11 @@ void m68000_device::move_l_adr32_dad_if() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48956,6 +48980,7 @@ void m68000_device::move_l_dpc_dad_if() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48980,11 +49005,11 @@ void m68000_device::move_l_dpc_dad_if() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49168,6 +49193,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49192,11 +49218,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49318,7 +49344,6 @@ void m68000_device::move_l_imm32_dad_if() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49343,6 +49368,7 @@ void m68000_device::move_l_imm32_dad_if() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49464,7 +49490,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49489,6 +49514,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49610,7 +49636,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49635,6 +49660,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49803,6 +49829,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49827,11 +49854,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49998,6 +50025,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50022,11 +50050,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50194,6 +50222,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50218,11 +50247,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50407,6 +50436,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50431,11 +50461,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50658,6 +50688,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50682,11 +50713,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50873,6 +50904,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50897,11 +50929,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51109,6 +51141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51133,11 +51166,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51321,6 +51354,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51345,11 +51379,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51571,6 +51605,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51595,11 +51630,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51760,7 +51795,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51785,6 +51819,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51870,6 +51905,7 @@ void m68000_device::move_l_ds_adr16_if() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51894,11 +51930,11 @@ void m68000_device::move_l_ds_adr16_if() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51979,6 +52015,7 @@ void m68000_device::move_l_as_adr16_if() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52003,11 +52040,11 @@ void m68000_device::move_l_as_adr16_if() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52132,6 +52169,7 @@ void m68000_device::move_l_ais_adr16_if() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52156,11 +52194,11 @@ void m68000_device::move_l_ais_adr16_if() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52288,6 +52326,7 @@ void m68000_device::move_l_aips_adr16_if() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52312,11 +52351,11 @@ void m68000_device::move_l_aips_adr16_if() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52445,6 +52484,7 @@ void m68000_device::move_l_pais_adr16_if() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52469,11 +52509,11 @@ void m68000_device::move_l_pais_adr16_if() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52619,6 +52659,7 @@ void m68000_device::move_l_das_adr16_if() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52643,11 +52684,11 @@ void m68000_device::move_l_das_adr16_if() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52831,6 +52872,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52855,11 +52897,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53007,6 +53049,7 @@ void m68000_device::move_l_adr16_adr16_if() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53031,11 +53074,11 @@ void m68000_device::move_l_adr16_adr16_if() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53204,6 +53247,7 @@ void m68000_device::move_l_adr32_adr16_if() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53228,11 +53272,11 @@ void m68000_device::move_l_adr32_adr16_if() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53377,6 +53421,7 @@ void m68000_device::move_l_dpc_adr16_if() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53401,11 +53446,11 @@ void m68000_device::move_l_dpc_adr16_if() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53588,6 +53633,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53612,11 +53658,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53741,6 +53787,7 @@ void m68000_device::move_l_imm32_adr16_if() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53765,11 +53812,11 @@ void m68000_device::move_l_imm32_adr16_if() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53871,6 +53918,7 @@ void m68000_device::move_l_ds_adr32_if() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53895,11 +53943,11 @@ void m68000_device::move_l_ds_adr32_if() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54001,6 +54049,7 @@ void m68000_device::move_l_as_adr32_if() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54025,11 +54074,11 @@ void m68000_device::move_l_as_adr32_if() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54153,7 +54202,6 @@ void m68000_device::move_l_ais_adr32_if() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54202,11 +54250,11 @@ void m68000_device::move_l_ais_adr32_if() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54333,7 +54381,6 @@ void m68000_device::move_l_aips_adr32_if() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54382,11 +54429,11 @@ void m68000_device::move_l_aips_adr32_if() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54514,7 +54561,6 @@ void m68000_device::move_l_pais_adr32_if() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54563,11 +54609,11 @@ void m68000_device::move_l_pais_adr32_if() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54712,7 +54758,6 @@ void m68000_device::move_l_das_adr32_if() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54761,11 +54806,11 @@ void m68000_device::move_l_das_adr32_if() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54948,7 +54993,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54997,11 +55041,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55148,7 +55192,6 @@ void m68000_device::move_l_adr16_adr32_if() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55197,11 +55240,11 @@ void m68000_device::move_l_adr16_adr32_if() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55369,7 +55412,6 @@ void m68000_device::move_l_adr32_adr32_if() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55418,11 +55460,11 @@ void m68000_device::move_l_adr32_adr32_if() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55566,7 +55608,6 @@ void m68000_device::move_l_dpc_adr32_if() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55615,11 +55656,11 @@ void m68000_device::move_l_dpc_adr32_if() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55801,7 +55842,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55850,11 +55890,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56000,6 +56040,7 @@ void m68000_device::move_l_imm32_adr32_if() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -56024,11 +56065,11 @@ void m68000_device::move_l_imm32_adr32_if() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56061,7 +56102,6 @@ void m68000_device::move_w_ds_dd_if() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56070,6 +56110,7 @@ void m68000_device::move_w_ds_dd_if() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56104,7 +56145,6 @@ void m68000_device::move_w_as_dd_if() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56113,6 +56153,7 @@ void m68000_device::move_w_as_dd_if() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56171,7 +56212,6 @@ void m68000_device::move_w_ais_dd_if() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56180,6 +56220,7 @@ void m68000_device::move_w_ais_dd_if() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56240,7 +56281,6 @@ void m68000_device::move_w_aips_dd_if() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56249,6 +56289,7 @@ void m68000_device::move_w_aips_dd_if() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56311,7 +56352,6 @@ void m68000_device::move_w_pais_dd_if() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56320,6 +56360,7 @@ void m68000_device::move_w_pais_dd_if() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56398,7 +56439,6 @@ void m68000_device::move_w_das_dd_if() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56407,6 +56447,7 @@ void m68000_device::move_w_das_dd_if() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56523,7 +56564,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56532,6 +56572,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56609,7 +56650,6 @@ void m68000_device::move_w_adr16_dd_if() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56618,6 +56658,7 @@ void m68000_device::move_w_adr16_dd_if() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56716,7 +56757,6 @@ void m68000_device::move_w_adr32_dd_if() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56725,6 +56765,7 @@ void m68000_device::move_w_adr32_dd_if() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56802,7 +56843,6 @@ void m68000_device::move_w_dpc_dd_if() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56811,6 +56851,7 @@ void m68000_device::move_w_dpc_dd_if() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56926,7 +56967,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56935,6 +56975,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56990,7 +57031,6 @@ void m68000_device::move_w_imm16_dd_if() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -56999,6 +57039,7 @@ void m68000_device::move_w_imm16_dd_if() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57033,12 +57074,12 @@ void m68000_device::movea_w_ds_ad_if() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57074,12 +57115,12 @@ void m68000_device::movea_w_as_ad_if() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57139,12 +57180,12 @@ void m68000_device::movea_w_ais_ad_if() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57205,12 +57246,12 @@ void m68000_device::movea_w_aips_ad_if() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57273,12 +57314,12 @@ void m68000_device::movea_w_pais_ad_if() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57357,12 +57398,12 @@ void m68000_device::movea_w_das_ad_if() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57479,12 +57520,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57562,12 +57603,12 @@ void m68000_device::movea_w_adr16_ad_if() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57666,12 +57707,12 @@ void m68000_device::movea_w_adr32_ad_if() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57749,12 +57790,12 @@ void m68000_device::movea_w_dpc_ad_if() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57870,12 +57911,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57931,12 +57972,12 @@ void m68000_device::movea_w_imm16_ad_if() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57972,7 +58013,6 @@ void m68000_device::move_w_ds_aid_if() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -57998,10 +58038,10 @@ void m68000_device::move_w_ds_aid_if() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58034,7 +58074,6 @@ void m68000_device::move_w_as_aid_if() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -58060,10 +58099,10 @@ void m68000_device::move_w_as_aid_if() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58144,10 +58183,10 @@ void m68000_device::move_w_ais_aid_if() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58232,10 +58271,10 @@ void m68000_device::move_w_aips_aid_if() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58322,10 +58361,10 @@ void m68000_device::move_w_pais_aid_if() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58428,10 +58467,10 @@ void m68000_device::move_w_das_aid_if() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58572,10 +58611,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58677,10 +58716,10 @@ void m68000_device::move_w_adr16_aid_if() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58803,10 +58842,10 @@ void m68000_device::move_w_adr32_aid_if() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58908,10 +58947,10 @@ void m68000_device::move_w_dpc_aid_if() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59051,10 +59090,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59110,7 +59149,6 @@ void m68000_device::move_w_imm16_aid_if() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59136,10 +59174,10 @@ void m68000_device::move_w_imm16_aid_if() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59172,7 +59210,6 @@ void m68000_device::move_w_ds_aipd_if() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59198,6 +59235,7 @@ void m68000_device::move_w_ds_aipd_if() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59232,7 +59270,6 @@ void m68000_device::move_w_as_aipd_if() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59258,6 +59295,7 @@ void m68000_device::move_w_as_aipd_if() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59316,7 +59354,6 @@ void m68000_device::move_w_ais_aipd_if() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59342,6 +59379,7 @@ void m68000_device::move_w_ais_aipd_if() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59404,7 +59442,6 @@ void m68000_device::move_w_aips_aipd_if() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59430,6 +59467,7 @@ void m68000_device::move_w_aips_aipd_if() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59494,7 +59532,6 @@ void m68000_device::move_w_pais_aipd_if() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59520,6 +59557,7 @@ void m68000_device::move_w_pais_aipd_if() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59600,7 +59638,6 @@ void m68000_device::move_w_das_aipd_if() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59626,6 +59663,7 @@ void m68000_device::move_w_das_aipd_if() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59744,7 +59782,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59770,6 +59807,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59849,7 +59887,6 @@ void m68000_device::move_w_adr16_aipd_if() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59875,6 +59912,7 @@ void m68000_device::move_w_adr16_aipd_if() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59975,7 +60013,6 @@ void m68000_device::move_w_adr32_aipd_if() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60001,6 +60038,7 @@ void m68000_device::move_w_adr32_aipd_if() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60080,7 +60118,6 @@ void m68000_device::move_w_dpc_aipd_if() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60106,6 +60143,7 @@ void m68000_device::move_w_dpc_aipd_if() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60223,7 +60261,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60249,6 +60286,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60306,7 +60344,6 @@ void m68000_device::move_w_imm16_aipd_if() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60332,6 +60369,7 @@ void m68000_device::move_w_imm16_aipd_if() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60366,7 +60404,6 @@ void m68000_device::move_w_ds_paid_if() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60393,6 +60430,7 @@ void m68000_device::move_w_ds_paid_if() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60426,7 +60464,6 @@ void m68000_device::move_w_as_paid_if() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60453,6 +60490,7 @@ void m68000_device::move_w_as_paid_if() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60510,7 +60548,6 @@ void m68000_device::move_w_ais_paid_if() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60537,6 +60574,7 @@ void m68000_device::move_w_ais_paid_if() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60598,7 +60636,6 @@ void m68000_device::move_w_aips_paid_if() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60625,6 +60662,7 @@ void m68000_device::move_w_aips_paid_if() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60688,7 +60726,6 @@ void m68000_device::move_w_pais_paid_if() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60715,6 +60752,7 @@ void m68000_device::move_w_pais_paid_if() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60794,7 +60832,6 @@ void m68000_device::move_w_das_paid_if() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60821,6 +60858,7 @@ void m68000_device::move_w_das_paid_if() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60938,7 +60976,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60965,6 +61002,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61043,7 +61081,6 @@ void m68000_device::move_w_adr16_paid_if() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61070,6 +61107,7 @@ void m68000_device::move_w_adr16_paid_if() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61169,7 +61207,6 @@ void m68000_device::move_w_adr32_paid_if() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61196,6 +61233,7 @@ void m68000_device::move_w_adr32_paid_if() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61274,7 +61312,6 @@ void m68000_device::move_w_dpc_paid_if() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61301,6 +61338,7 @@ void m68000_device::move_w_dpc_paid_if() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61417,7 +61455,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61444,6 +61481,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61500,7 +61538,6 @@ void m68000_device::move_w_imm16_paid_if() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61527,6 +61564,7 @@ void m68000_device::move_w_imm16_paid_if() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61581,7 +61619,6 @@ void m68000_device::move_w_ds_dad_if() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61606,11 +61643,11 @@ void m68000_device::move_w_ds_dad_if() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61664,7 +61701,6 @@ void m68000_device::move_w_as_dad_if() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61689,11 +61725,11 @@ void m68000_device::move_w_as_dad_if() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61774,6 +61810,7 @@ void m68000_device::move_w_ais_dad_if() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61798,11 +61835,11 @@ void m68000_device::move_w_ais_dad_if() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61887,6 +61924,7 @@ void m68000_device::move_w_aips_dad_if() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61911,11 +61949,11 @@ void m68000_device::move_w_aips_dad_if() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62002,6 +62040,7 @@ void m68000_device::move_w_pais_dad_if() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62026,11 +62065,11 @@ void m68000_device::move_w_pais_dad_if() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62133,6 +62172,7 @@ void m68000_device::move_w_das_dad_if() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62157,11 +62197,11 @@ void m68000_device::move_w_das_dad_if() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62302,6 +62342,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62326,11 +62367,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62432,6 +62473,7 @@ void m68000_device::move_w_adr16_dad_if() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62456,11 +62498,11 @@ void m68000_device::move_w_adr16_dad_if() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62583,6 +62625,7 @@ void m68000_device::move_w_adr32_dad_if() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62607,11 +62650,11 @@ void m68000_device::move_w_adr32_dad_if() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62713,6 +62756,7 @@ void m68000_device::move_w_dpc_dad_if() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62737,11 +62781,11 @@ void m68000_device::move_w_dpc_dad_if() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62881,6 +62925,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62905,11 +62950,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62986,7 +63031,6 @@ void m68000_device::move_w_imm16_dad_if() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63011,11 +63055,11 @@ void m68000_device::move_w_imm16_dad_if() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63108,7 +63152,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63133,11 +63176,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63230,7 +63273,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63255,11 +63297,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63378,6 +63420,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63402,11 +63445,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63529,6 +63572,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63553,11 +63597,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63682,6 +63726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63706,11 +63751,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63851,6 +63896,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63875,11 +63921,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64058,6 +64104,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64082,11 +64129,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64226,6 +64273,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64250,11 +64298,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64415,6 +64463,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64439,11 +64488,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64583,6 +64632,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64607,11 +64657,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64789,6 +64839,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64813,11 +64864,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64933,7 +64984,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64958,11 +65008,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65019,6 +65069,7 @@ void m68000_device::move_w_ds_adr16_if() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65043,11 +65094,11 @@ void m68000_device::move_w_ds_adr16_if() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65104,6 +65155,7 @@ void m68000_device::move_w_as_adr16_if() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65128,11 +65180,11 @@ void m68000_device::move_w_as_adr16_if() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65212,6 +65264,7 @@ void m68000_device::move_w_ais_adr16_if() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65236,11 +65289,11 @@ void m68000_device::move_w_ais_adr16_if() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65324,6 +65377,7 @@ void m68000_device::move_w_aips_adr16_if() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65348,11 +65402,11 @@ void m68000_device::move_w_aips_adr16_if() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65438,6 +65492,7 @@ void m68000_device::move_w_pais_adr16_if() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65462,11 +65517,11 @@ void m68000_device::move_w_pais_adr16_if() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65568,6 +65623,7 @@ void m68000_device::move_w_das_adr16_if() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65592,11 +65648,11 @@ void m68000_device::move_w_das_adr16_if() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65736,6 +65792,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65760,11 +65817,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65865,6 +65922,7 @@ void m68000_device::move_w_adr16_adr16_if() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65889,11 +65947,11 @@ void m68000_device::move_w_adr16_adr16_if() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66015,6 +66073,7 @@ void m68000_device::move_w_adr32_adr16_if() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66039,11 +66098,11 @@ void m68000_device::move_w_adr32_adr16_if() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66144,6 +66203,7 @@ void m68000_device::move_w_dpc_adr16_if() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66168,11 +66228,11 @@ void m68000_device::move_w_dpc_adr16_if() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66311,6 +66371,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66335,11 +66396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66419,6 +66480,7 @@ void m68000_device::move_w_imm16_adr16_if() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66443,11 +66505,11 @@ void m68000_device::move_w_imm16_adr16_if() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66525,6 +66587,7 @@ void m68000_device::move_w_ds_adr32_if() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66549,11 +66612,11 @@ void m68000_device::move_w_ds_adr32_if() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66631,6 +66694,7 @@ void m68000_device::move_w_as_adr32_if() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66655,11 +66719,11 @@ void m68000_device::move_w_as_adr32_if() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66739,7 +66803,6 @@ void m68000_device::move_w_ais_adr32_if() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66785,11 +66848,11 @@ void m68000_device::move_w_ais_adr32_if() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66873,7 +66936,6 @@ void m68000_device::move_w_aips_adr32_if() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66919,11 +66981,11 @@ void m68000_device::move_w_aips_adr32_if() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67009,7 +67071,6 @@ void m68000_device::move_w_pais_adr32_if() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67055,11 +67116,11 @@ void m68000_device::move_w_pais_adr32_if() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67161,7 +67222,6 @@ void m68000_device::move_w_das_adr32_if() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67207,11 +67267,11 @@ void m68000_device::move_w_das_adr32_if() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67351,7 +67411,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67397,11 +67456,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67502,7 +67561,6 @@ void m68000_device::move_w_adr16_adr32_if() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67548,11 +67606,11 @@ void m68000_device::move_w_adr16_adr32_if() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67674,7 +67732,6 @@ void m68000_device::move_w_adr32_adr32_if() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67720,11 +67777,11 @@ void m68000_device::move_w_adr32_adr32_if() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67825,7 +67882,6 @@ void m68000_device::move_w_dpc_adr32_if() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67871,11 +67927,11 @@ void m68000_device::move_w_dpc_adr32_if() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68014,7 +68070,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -68060,11 +68115,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68165,6 +68220,7 @@ void m68000_device::move_w_imm16_adr32_if() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -68189,11 +68245,11 @@ void m68000_device::move_w_imm16_adr32_if() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68225,7 +68281,6 @@ void m68000_device::negx_b_ds_if() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68233,6 +68288,7 @@ void m68000_device::negx_b_ds_if() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68287,7 +68343,6 @@ void m68000_device::negx_b_ais_if() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68314,6 +68369,7 @@ void m68000_device::negx_b_ais_if() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68365,7 +68421,6 @@ void m68000_device::negx_b_aips_if() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68392,6 +68447,7 @@ void m68000_device::negx_b_aips_if() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68445,7 +68501,6 @@ void m68000_device::negx_b_pais_if() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68472,6 +68527,7 @@ void m68000_device::negx_b_pais_if() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68541,7 +68597,6 @@ void m68000_device::negx_b_das_if() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68568,6 +68623,7 @@ void m68000_device::negx_b_das_if() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68675,7 +68731,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68702,6 +68757,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68770,7 +68826,6 @@ void m68000_device::negx_b_adr16_if() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68797,6 +68852,7 @@ void m68000_device::negx_b_adr16_if() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68886,7 +68942,6 @@ void m68000_device::negx_b_adr32_if() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68913,6 +68968,7 @@ void m68000_device::negx_b_adr32_if() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68939,7 +68995,6 @@ void m68000_device::negx_w_ds_if() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68947,6 +69002,7 @@ void m68000_device::negx_w_ds_if() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69004,7 +69060,6 @@ void m68000_device::negx_w_ais_if() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69031,6 +69086,7 @@ void m68000_device::negx_w_ais_if() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69090,7 +69146,6 @@ void m68000_device::negx_w_aips_if() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69117,6 +69172,7 @@ void m68000_device::negx_w_aips_if() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69178,7 +69234,6 @@ void m68000_device::negx_w_pais_if() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69205,6 +69260,7 @@ void m68000_device::negx_w_pais_if() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69282,7 +69338,6 @@ void m68000_device::negx_w_das_if() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69309,6 +69364,7 @@ void m68000_device::negx_w_das_if() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69424,7 +69480,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69451,6 +69506,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69527,7 +69583,6 @@ void m68000_device::negx_w_adr16_if() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69554,6 +69609,7 @@ void m68000_device::negx_w_adr16_if() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69651,7 +69707,6 @@ void m68000_device::negx_w_adr32_if() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69678,6 +69733,7 @@ void m68000_device::negx_w_adr32_if() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69709,7 +69765,6 @@ void m68000_device::negx_l_ds_if() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -69740,6 +69795,7 @@ void m68000_device::negx_l_ds_if() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -69801,7 +69857,6 @@ void m68000_device::negx_l_ais_if() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69851,6 +69906,7 @@ void m68000_device::negx_l_ais_if() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69930,7 +69986,6 @@ void m68000_device::negx_l_aips_if() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69980,6 +70035,7 @@ void m68000_device::negx_l_aips_if() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70060,7 +70116,6 @@ void m68000_device::negx_l_pais_if() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70110,6 +70165,7 @@ void m68000_device::negx_l_pais_if() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70207,7 +70263,6 @@ void m68000_device::negx_l_das_if() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70257,6 +70312,7 @@ void m68000_device::negx_l_das_if() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70392,7 +70448,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70442,6 +70497,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70541,7 +70597,6 @@ void m68000_device::negx_l_adr16_if() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70591,6 +70646,7 @@ void m68000_device::negx_l_adr16_if() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70711,7 +70767,6 @@ void m68000_device::negx_l_adr32_if() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70761,6 +70816,7 @@ void m68000_device::negx_l_adr32_if() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70792,7 +70848,6 @@ void m68000_device::move_sr_ds_if() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -70817,6 +70872,7 @@ void m68000_device::move_sr_ds_if() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -70856,7 +70912,6 @@ void m68000_device::move_sr_ais_if() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70884,6 +70939,7 @@ void m68000_device::move_sr_ais_if() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70943,7 +70999,6 @@ void m68000_device::move_sr_aips_if() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70971,6 +71026,7 @@ void m68000_device::move_sr_aips_if() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71032,7 +71088,6 @@ void m68000_device::move_sr_pais_if() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71060,6 +71115,7 @@ void m68000_device::move_sr_pais_if() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71137,7 +71193,6 @@ void m68000_device::move_sr_das_if() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71165,6 +71220,7 @@ void m68000_device::move_sr_das_if() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71280,7 +71336,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71308,6 +71363,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71384,7 +71440,6 @@ void m68000_device::move_sr_adr16_if() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71412,6 +71467,7 @@ void m68000_device::move_sr_adr16_if() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71509,7 +71565,6 @@ void m68000_device::move_sr_adr32_if() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71537,6 +71592,7 @@ void m68000_device::move_sr_adr32_if() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71734,7 +71790,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71749,6 +71804,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -71776,7 +71832,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71978,7 +72033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71993,6 +72047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72020,7 +72075,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72226,7 +72280,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72241,6 +72294,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72268,7 +72322,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72476,7 +72529,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72491,6 +72543,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72518,7 +72571,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72742,7 +72794,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72757,6 +72808,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72784,7 +72836,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73046,7 +73097,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73061,6 +73111,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73088,7 +73139,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73311,7 +73361,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73326,6 +73375,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73353,7 +73403,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73597,7 +73646,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73612,6 +73660,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73639,7 +73688,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73862,7 +73910,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73877,6 +73924,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73904,7 +73952,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74165,7 +74212,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74180,6 +74226,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74207,7 +74254,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74408,7 +74454,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74423,6 +74468,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74450,7 +74496,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74463,13 +74508,13 @@ void m68000_device::lea_ais_ad_if() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74527,11 +74572,11 @@ void m68000_device::lea_das_ad_if() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74627,11 +74672,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74684,11 +74729,11 @@ void m68000_device::lea_adr16_ad_if() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74764,11 +74809,11 @@ void m68000_device::lea_adr32_ad_if() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74823,11 +74868,11 @@ void m68000_device::lea_dpc_ad_if() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74922,11 +74967,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74958,7 +75003,6 @@ void m68000_device::clr_b_ds_if() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -74966,6 +75010,7 @@ void m68000_device::clr_b_ds_if() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75022,7 +75067,6 @@ void m68000_device::clr_b_ais_if() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75049,6 +75093,7 @@ void m68000_device::clr_b_ais_if() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75103,7 +75148,6 @@ void m68000_device::clr_b_aips_if() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75130,6 +75174,7 @@ void m68000_device::clr_b_aips_if() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75186,7 +75231,6 @@ void m68000_device::clr_b_pais_if() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75213,6 +75257,7 @@ void m68000_device::clr_b_pais_if() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75285,7 +75330,6 @@ void m68000_device::clr_b_das_if() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75312,6 +75356,7 @@ void m68000_device::clr_b_das_if() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75424,7 +75469,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75451,6 +75495,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75522,7 +75567,6 @@ void m68000_device::clr_b_adr16_if() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75549,6 +75593,7 @@ void m68000_device::clr_b_adr16_if() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75642,7 +75687,6 @@ void m68000_device::clr_b_adr32_if() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75669,6 +75713,7 @@ void m68000_device::clr_b_adr32_if() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75696,7 +75741,6 @@ void m68000_device::clr_w_ds_if() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -75704,6 +75748,7 @@ void m68000_device::clr_w_ds_if() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75763,7 +75808,6 @@ void m68000_device::clr_w_ais_if() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75790,6 +75834,7 @@ void m68000_device::clr_w_ais_if() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -75852,7 +75897,6 @@ void m68000_device::clr_w_aips_if() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75879,6 +75923,7 @@ void m68000_device::clr_w_aips_if() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -75943,7 +75988,6 @@ void m68000_device::clr_w_pais_if() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75970,6 +76014,7 @@ void m68000_device::clr_w_pais_if() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76050,7 +76095,6 @@ void m68000_device::clr_w_das_if() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76077,6 +76121,7 @@ void m68000_device::clr_w_das_if() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76197,7 +76242,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76224,6 +76268,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76303,7 +76348,6 @@ void m68000_device::clr_w_adr16_if() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76330,6 +76374,7 @@ void m68000_device::clr_w_adr16_if() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76431,7 +76476,6 @@ void m68000_device::clr_w_adr32_if() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76458,6 +76502,7 @@ void m68000_device::clr_w_adr32_if() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76490,7 +76535,6 @@ void m68000_device::clr_l_ds_if() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -76521,6 +76565,7 @@ void m68000_device::clr_l_ds_if() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -76584,7 +76629,6 @@ void m68000_device::clr_l_ais_if() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76634,6 +76678,7 @@ void m68000_device::clr_l_ais_if() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76716,7 +76761,6 @@ void m68000_device::clr_l_aips_if() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76766,6 +76810,7 @@ void m68000_device::clr_l_aips_if() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76849,7 +76894,6 @@ void m68000_device::clr_l_pais_if() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76899,6 +76943,7 @@ void m68000_device::clr_l_pais_if() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76999,7 +77044,6 @@ void m68000_device::clr_l_das_if() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77049,6 +77093,7 @@ void m68000_device::clr_l_das_if() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77189,7 +77234,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77239,6 +77283,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77342,7 +77387,6 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77392,6 +77436,7 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77517,7 +77562,6 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77567,6 +77611,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77599,7 +77644,6 @@ void m68000_device::neg_b_ds_if() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -77607,6 +77651,7 @@ void m68000_device::neg_b_ds_if() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77661,7 +77706,6 @@ void m68000_device::neg_b_ais_if() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77688,6 +77732,7 @@ void m68000_device::neg_b_ais_if() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77739,7 +77784,6 @@ void m68000_device::neg_b_aips_if() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77766,6 +77810,7 @@ void m68000_device::neg_b_aips_if() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77819,7 +77864,6 @@ void m68000_device::neg_b_pais_if() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77846,6 +77890,7 @@ void m68000_device::neg_b_pais_if() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77915,7 +77960,6 @@ void m68000_device::neg_b_das_if() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77942,6 +77986,7 @@ void m68000_device::neg_b_das_if() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78049,7 +78094,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78076,6 +78120,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78144,7 +78189,6 @@ void m68000_device::neg_b_adr16_if() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78171,6 +78215,7 @@ void m68000_device::neg_b_adr16_if() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78260,7 +78305,6 @@ void m68000_device::neg_b_adr32_if() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78287,6 +78331,7 @@ void m68000_device::neg_b_adr32_if() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78313,7 +78358,6 @@ void m68000_device::neg_w_ds_if() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -78321,6 +78365,7 @@ void m68000_device::neg_w_ds_if() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78378,7 +78423,6 @@ void m68000_device::neg_w_ais_if() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78405,6 +78449,7 @@ void m68000_device::neg_w_ais_if() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78464,7 +78509,6 @@ void m68000_device::neg_w_aips_if() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78491,6 +78535,7 @@ void m68000_device::neg_w_aips_if() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78552,7 +78597,6 @@ void m68000_device::neg_w_pais_if() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78579,6 +78623,7 @@ void m68000_device::neg_w_pais_if() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78656,7 +78701,6 @@ void m68000_device::neg_w_das_if() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78683,6 +78727,7 @@ void m68000_device::neg_w_das_if() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78798,7 +78843,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78825,6 +78869,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78901,7 +78946,6 @@ void m68000_device::neg_w_adr16_if() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78928,6 +78972,7 @@ void m68000_device::neg_w_adr16_if() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79025,7 +79070,6 @@ void m68000_device::neg_w_adr32_if() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79052,6 +79096,7 @@ void m68000_device::neg_w_adr32_if() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79083,7 +79128,6 @@ void m68000_device::neg_l_ds_if() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -79114,6 +79158,7 @@ void m68000_device::neg_l_ds_if() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79175,7 +79220,6 @@ void m68000_device::neg_l_ais_if() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79225,6 +79269,7 @@ void m68000_device::neg_l_ais_if() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79304,7 +79349,6 @@ void m68000_device::neg_l_aips_if() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79354,6 +79398,7 @@ void m68000_device::neg_l_aips_if() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79434,7 +79479,6 @@ void m68000_device::neg_l_pais_if() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79484,6 +79528,7 @@ void m68000_device::neg_l_pais_if() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79581,7 +79626,6 @@ void m68000_device::neg_l_das_if() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79631,6 +79675,7 @@ void m68000_device::neg_l_das_if() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79766,7 +79811,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79816,6 +79860,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79915,7 +79960,6 @@ void m68000_device::neg_l_adr16_if() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79965,6 +80009,7 @@ void m68000_device::neg_l_adr16_if() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -80085,7 +80130,6 @@ void m68000_device::neg_l_adr32_if() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80135,6 +80179,7 @@ void m68000_device::neg_l_adr32_if() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -80198,11 +80243,11 @@ void m68000_device::move_ds_ccr_if() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80290,11 +80335,11 @@ void m68000_device::move_ais_ccr_if() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80386,11 +80431,11 @@ void m68000_device::move_aips_ccr_if() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80484,11 +80529,11 @@ void m68000_device::move_pais_ccr_if() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80598,11 +80643,11 @@ void m68000_device::move_das_ccr_if() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80750,11 +80795,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80863,11 +80908,11 @@ void m68000_device::move_adr16_ccr_if() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80997,11 +81042,11 @@ void m68000_device::move_adr32_ccr_if() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81110,11 +81155,11 @@ void m68000_device::move_dpc_ccr_if() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81261,11 +81306,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81352,11 +81397,11 @@ void m68000_device::move_imm8_ccr_if() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81388,7 +81433,6 @@ void m68000_device::not_b_ds_if() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -81396,6 +81440,7 @@ void m68000_device::not_b_ds_if() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81450,7 +81495,6 @@ void m68000_device::not_b_ais_if() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81477,6 +81521,7 @@ void m68000_device::not_b_ais_if() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81528,7 +81573,6 @@ void m68000_device::not_b_aips_if() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81555,6 +81599,7 @@ void m68000_device::not_b_aips_if() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81608,7 +81653,6 @@ void m68000_device::not_b_pais_if() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81635,6 +81679,7 @@ void m68000_device::not_b_pais_if() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81704,7 +81749,6 @@ void m68000_device::not_b_das_if() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81731,6 +81775,7 @@ void m68000_device::not_b_das_if() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81838,7 +81883,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81865,6 +81909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81933,7 +81978,6 @@ void m68000_device::not_b_adr16_if() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81960,6 +82004,7 @@ void m68000_device::not_b_adr16_if() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82049,7 +82094,6 @@ void m68000_device::not_b_adr32_if() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82076,6 +82120,7 @@ void m68000_device::not_b_adr32_if() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82102,7 +82147,6 @@ void m68000_device::not_w_ds_if() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82110,6 +82154,7 @@ void m68000_device::not_w_ds_if() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82167,7 +82212,6 @@ void m68000_device::not_w_ais_if() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82194,6 +82238,7 @@ void m68000_device::not_w_ais_if() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82253,7 +82298,6 @@ void m68000_device::not_w_aips_if() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82280,6 +82324,7 @@ void m68000_device::not_w_aips_if() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82341,7 +82386,6 @@ void m68000_device::not_w_pais_if() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82368,6 +82412,7 @@ void m68000_device::not_w_pais_if() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82445,7 +82490,6 @@ void m68000_device::not_w_das_if() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82472,6 +82516,7 @@ void m68000_device::not_w_das_if() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82587,7 +82632,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82614,6 +82658,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82690,7 +82735,6 @@ void m68000_device::not_w_adr16_if() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82717,6 +82761,7 @@ void m68000_device::not_w_adr16_if() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82814,7 +82859,6 @@ void m68000_device::not_w_adr32_if() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82841,6 +82885,7 @@ void m68000_device::not_w_adr32_if() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82872,7 +82917,6 @@ void m68000_device::not_l_ds_if() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82903,6 +82947,7 @@ void m68000_device::not_l_ds_if() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -82964,7 +83009,6 @@ void m68000_device::not_l_ais_if() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83014,6 +83058,7 @@ void m68000_device::not_l_ais_if() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83093,7 +83138,6 @@ void m68000_device::not_l_aips_if() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83143,6 +83187,7 @@ void m68000_device::not_l_aips_if() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83223,7 +83268,6 @@ void m68000_device::not_l_pais_if() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83273,6 +83317,7 @@ void m68000_device::not_l_pais_if() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83370,7 +83415,6 @@ void m68000_device::not_l_das_if() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83420,6 +83464,7 @@ void m68000_device::not_l_das_if() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83555,7 +83600,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83605,6 +83649,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83704,7 +83749,6 @@ void m68000_device::not_l_adr16_if() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83754,6 +83798,7 @@ void m68000_device::not_l_adr16_if() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83874,7 +83919,6 @@ void m68000_device::not_l_adr32_if() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83924,6 +83968,7 @@ void m68000_device::not_l_adr32_if() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83993,11 +84038,11 @@ void m68000_device::move_ds_sr_if() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84091,11 +84136,11 @@ void m68000_device::move_ais_sr_if() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84193,11 +84238,11 @@ void m68000_device::move_aips_sr_if() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84297,11 +84342,11 @@ void m68000_device::move_pais_sr_if() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84417,11 +84462,11 @@ void m68000_device::move_das_sr_if() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84575,11 +84620,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84694,11 +84739,11 @@ void m68000_device::move_adr16_sr_if() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84834,11 +84879,11 @@ void m68000_device::move_adr32_sr_if() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84953,11 +84998,11 @@ void m68000_device::move_dpc_sr_if() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -85110,11 +85155,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -85207,11 +85252,11 @@ void m68000_device::move_i16u_sr_if() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -85243,7 +85288,6 @@ void m68000_device::nbcd_b_ds_if() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -85272,6 +85316,7 @@ void m68000_device::nbcd_b_ds_if() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -85309,7 +85354,6 @@ void m68000_device::nbcd_b_ais_if() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85338,6 +85382,7 @@ void m68000_device::nbcd_b_ais_if() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85389,7 +85434,6 @@ void m68000_device::nbcd_b_aips_if() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85418,6 +85462,7 @@ void m68000_device::nbcd_b_aips_if() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85471,7 +85516,6 @@ void m68000_device::nbcd_b_pais_if() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85500,6 +85544,7 @@ void m68000_device::nbcd_b_pais_if() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85569,7 +85614,6 @@ void m68000_device::nbcd_b_das_if() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85598,6 +85642,7 @@ void m68000_device::nbcd_b_das_if() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85705,7 +85750,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85734,6 +85778,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85802,7 +85847,6 @@ void m68000_device::nbcd_b_adr16_if() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85831,6 +85875,7 @@ void m68000_device::nbcd_b_adr16_if() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85920,7 +85965,6 @@ void m68000_device::nbcd_b_adr32_if() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85949,6 +85993,7 @@ void m68000_device::nbcd_b_adr32_if() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85975,7 +86020,6 @@ void m68000_device::swap_ds_if() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -85984,6 +86028,7 @@ void m68000_device::swap_ds_if() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86020,7 +86065,6 @@ void m68000_device::pea_ais_if() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86068,6 +86112,7 @@ void m68000_device::pea_ais_if() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86123,7 +86168,6 @@ void m68000_device::pea_das_if() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86173,6 +86217,7 @@ void m68000_device::pea_das_if() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86262,7 +86307,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86314,6 +86358,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86387,6 +86432,7 @@ void m68000_device::pea_adr16_if() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86411,11 +86457,11 @@ void m68000_device::pea_adr16_if() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86510,6 +86556,7 @@ void m68000_device::pea_adr32_if() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86534,11 +86581,11 @@ void m68000_device::pea_adr32_if() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86593,7 +86640,6 @@ void m68000_device::pea_dpc_if() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86643,6 +86689,7 @@ void m68000_device::pea_dpc_if() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86731,7 +86778,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86783,6 +86829,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86814,7 +86861,6 @@ void m68000_device::ext_w_ds_if() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -86822,6 +86868,7 @@ void m68000_device::ext_w_ds_if() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86914,10 +86961,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87010,11 +87057,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87128,10 +87175,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87283,10 +87330,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87400,10 +87447,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87538,10 +87585,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87573,7 +87620,6 @@ void m68000_device::ext_l_ds_if() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -87581,6 +87627,7 @@ void m68000_device::ext_l_ds_if() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87693,10 +87740,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87810,11 +87857,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87948,10 +87995,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88123,10 +88170,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88260,10 +88307,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88418,10 +88465,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88453,7 +88500,6 @@ void m68000_device::tst_b_ds_if() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -88462,6 +88508,7 @@ void m68000_device::tst_b_ds_if() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88516,7 +88563,6 @@ void m68000_device::tst_b_ais_if() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88524,6 +88570,7 @@ void m68000_device::tst_b_ais_if() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88583,7 +88630,6 @@ void m68000_device::tst_b_aips_if() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88591,6 +88637,7 @@ void m68000_device::tst_b_aips_if() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88652,7 +88699,6 @@ void m68000_device::tst_b_pais_if() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88660,6 +88706,7 @@ void m68000_device::tst_b_pais_if() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88737,7 +88784,6 @@ void m68000_device::tst_b_das_if() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88745,6 +88791,7 @@ void m68000_device::tst_b_das_if() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88862,7 +88909,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88870,6 +88916,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88946,7 +88993,6 @@ void m68000_device::tst_b_adr16_if() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88954,6 +89000,7 @@ void m68000_device::tst_b_adr16_if() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89052,7 +89099,6 @@ void m68000_device::tst_b_adr32_if() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89060,6 +89106,7 @@ void m68000_device::tst_b_adr32_if() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89092,7 +89139,6 @@ void m68000_device::tst_w_ds_if() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89101,6 +89147,7 @@ void m68000_device::tst_w_ds_if() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89158,7 +89205,6 @@ void m68000_device::tst_w_ais_if() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89166,6 +89212,7 @@ void m68000_device::tst_w_ais_if() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89228,7 +89275,6 @@ void m68000_device::tst_w_aips_if() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89236,6 +89282,7 @@ void m68000_device::tst_w_aips_if() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89300,7 +89347,6 @@ void m68000_device::tst_w_pais_if() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89308,6 +89354,7 @@ void m68000_device::tst_w_pais_if() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89388,7 +89435,6 @@ void m68000_device::tst_w_das_if() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89396,6 +89442,7 @@ void m68000_device::tst_w_das_if() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89516,7 +89563,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89524,6 +89570,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89603,7 +89650,6 @@ void m68000_device::tst_w_adr16_if() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89611,6 +89657,7 @@ void m68000_device::tst_w_adr16_if() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89712,7 +89759,6 @@ void m68000_device::tst_w_adr32_if() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89720,6 +89766,7 @@ void m68000_device::tst_w_adr32_if() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89752,7 +89799,6 @@ void m68000_device::tst_l_ds_if() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89761,6 +89807,7 @@ void m68000_device::tst_l_ds_if() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89841,7 +89888,6 @@ void m68000_device::tst_l_ais_if() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89849,6 +89895,7 @@ void m68000_device::tst_l_ais_if() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89933,7 +89980,6 @@ void m68000_device::tst_l_aips_if() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89941,6 +89987,7 @@ void m68000_device::tst_l_aips_if() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90026,7 +90073,6 @@ void m68000_device::tst_l_pais_if() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90034,6 +90080,7 @@ void m68000_device::tst_l_pais_if() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90136,7 +90183,6 @@ void m68000_device::tst_l_das_if() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90144,6 +90190,7 @@ void m68000_device::tst_l_das_if() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90286,7 +90333,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90294,6 +90340,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90399,7 +90446,6 @@ void m68000_device::tst_l_adr16_if() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90407,6 +90453,7 @@ void m68000_device::tst_l_adr16_if() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90534,7 +90581,6 @@ void m68000_device::tst_l_adr32_if() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90542,6 +90588,7 @@ void m68000_device::tst_l_adr32_if() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90576,13 +90623,13 @@ void m68000_device::tas_ds_if() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90668,12 +90715,12 @@ void m68000_device::tas_ais_if() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90760,12 +90807,12 @@ void m68000_device::tas_aips_if() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90854,12 +90901,12 @@ void m68000_device::tas_pais_if() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90964,12 +91011,12 @@ void m68000_device::tas_das_if() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91114,12 +91161,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91223,12 +91270,12 @@ void m68000_device::tas_adr16_if() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91354,12 +91401,12 @@ void m68000_device::tas_adr32_if() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91473,10 +91520,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91531,7 +91578,6 @@ void m68000_device::movem_w_aips_list_if() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -91594,6 +91640,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91729,10 +91776,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91905,10 +91952,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92042,10 +92089,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92203,10 +92250,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92341,10 +92388,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92516,10 +92563,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92653,10 +92700,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92711,7 +92758,6 @@ void m68000_device::movem_l_aips_list_if() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -92795,6 +92841,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92951,10 +92998,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93148,10 +93195,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93306,10 +93353,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93488,10 +93535,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93647,10 +93694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93843,10 +93890,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94022,11 +94069,11 @@ void m68000_device::trap_imm4_if() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94084,7 +94131,6 @@ void m68000_device::link_as_imm16_if() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -94127,6 +94173,7 @@ void m68000_device::link_as_imm16_if() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94183,7 +94230,6 @@ void m68000_device::unlk_as_if() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94209,6 +94255,7 @@ void m68000_device::unlk_as_if() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94245,13 +94292,13 @@ void m68000_device::move_as_usp_if() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94289,13 +94336,13 @@ void m68000_device::move_usp_as_if() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94331,6 +94378,7 @@ void m68000_device::reset_if() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94340,7 +94388,6 @@ void m68000_device::reset_if() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -94361,6 +94408,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94392,11 +94440,11 @@ void m68000_device::nop_if() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94430,6 +94478,7 @@ void m68000_device::stop_i16u_if() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94439,6 +94488,7 @@ void m68000_device::stop_i16u_if() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -94551,11 +94601,11 @@ void m68000_device::rte_if() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94650,11 +94700,11 @@ void m68000_device::rts_if() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94685,7 +94735,6 @@ void m68000_device::trapv_if() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -94696,6 +94745,7 @@ void m68000_device::trapv_if() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94882,11 +94932,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95007,11 +95057,11 @@ void m68000_device::rtr_if() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95085,7 +95135,6 @@ void m68000_device::jsr_ais_if() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95107,11 +95156,11 @@ void m68000_device::jsr_ais_if() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95191,7 +95240,6 @@ void m68000_device::jsr_das_if() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95213,11 +95261,11 @@ void m68000_device::jsr_das_if() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95317,7 +95365,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95339,11 +95386,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95419,7 +95466,6 @@ void m68000_device::jsr_adr16_if() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95441,11 +95487,11 @@ void m68000_device::jsr_adr16_if() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95540,7 +95586,6 @@ void m68000_device::jsr_adr32_if() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95562,11 +95607,11 @@ void m68000_device::jsr_adr32_if() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95645,7 +95690,6 @@ void m68000_device::jsr_dpc_if() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95667,11 +95711,11 @@ void m68000_device::jsr_dpc_if() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95770,7 +95814,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95792,11 +95835,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95848,11 +95891,11 @@ void m68000_device::jmp_ais_if() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95908,11 +95951,11 @@ void m68000_device::jmp_das_if() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95988,11 +96031,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96046,11 +96089,11 @@ void m68000_device::jmp_adr16_if() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96122,11 +96165,11 @@ void m68000_device::jmp_adr32_if() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96181,11 +96224,11 @@ void m68000_device::jmp_dpc_if() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96260,11 +96303,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96296,7 +96339,6 @@ void m68000_device::addq_b_imm3_ds_if() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -96304,6 +96346,7 @@ void m68000_device::addq_b_imm3_ds_if() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96358,7 +96401,6 @@ void m68000_device::addq_b_imm3_ais_if() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96386,6 +96428,7 @@ void m68000_device::addq_b_imm3_ais_if() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96437,7 +96480,6 @@ void m68000_device::addq_b_imm3_aips_if() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96465,6 +96507,7 @@ void m68000_device::addq_b_imm3_aips_if() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96518,7 +96561,6 @@ void m68000_device::addq_b_imm3_pais_if() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96546,6 +96588,7 @@ void m68000_device::addq_b_imm3_pais_if() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96615,7 +96658,6 @@ void m68000_device::addq_b_imm3_das_if() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96643,6 +96685,7 @@ void m68000_device::addq_b_imm3_das_if() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96750,7 +96793,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96778,6 +96820,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96846,7 +96889,6 @@ void m68000_device::addq_b_imm3_adr16_if() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96874,6 +96916,7 @@ void m68000_device::addq_b_imm3_adr16_if() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96963,7 +97006,6 @@ void m68000_device::addq_b_imm3_adr32_if() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96991,6 +97033,7 @@ void m68000_device::addq_b_imm3_adr32_if() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -97017,7 +97060,6 @@ void m68000_device::addq_w_imm3_ds_if() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97025,6 +97067,7 @@ void m68000_device::addq_w_imm3_ds_if() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97058,7 +97101,6 @@ void m68000_device::addq_w_imm3_as_if() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97089,6 +97131,7 @@ void m68000_device::addq_w_imm3_as_if() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97129,7 +97172,6 @@ void m68000_device::addq_w_imm3_ais_if() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97157,6 +97199,7 @@ void m68000_device::addq_w_imm3_ais_if() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97216,7 +97259,6 @@ void m68000_device::addq_w_imm3_aips_if() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97244,6 +97286,7 @@ void m68000_device::addq_w_imm3_aips_if() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97305,7 +97348,6 @@ void m68000_device::addq_w_imm3_pais_if() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97333,6 +97375,7 @@ void m68000_device::addq_w_imm3_pais_if() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97410,7 +97453,6 @@ void m68000_device::addq_w_imm3_das_if() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97438,6 +97480,7 @@ void m68000_device::addq_w_imm3_das_if() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97553,7 +97596,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97581,6 +97623,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97657,7 +97700,6 @@ void m68000_device::addq_w_imm3_adr16_if() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97685,6 +97727,7 @@ void m68000_device::addq_w_imm3_adr16_if() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97782,7 +97825,6 @@ void m68000_device::addq_w_imm3_adr32_if() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97810,6 +97852,7 @@ void m68000_device::addq_w_imm3_adr32_if() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97841,7 +97884,6 @@ void m68000_device::addq_l_imm3_ds_if() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97874,6 +97916,7 @@ void m68000_device::addq_l_imm3_ds_if() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97890,7 +97933,6 @@ void m68000_device::addq_l_imm3_as_if() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97921,6 +97963,7 @@ void m68000_device::addq_l_imm3_as_if() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97982,7 +98025,6 @@ void m68000_device::addq_l_imm3_ais_if() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98033,6 +98075,7 @@ void m68000_device::addq_l_imm3_ais_if() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98112,7 +98155,6 @@ void m68000_device::addq_l_imm3_aips_if() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98163,6 +98205,7 @@ void m68000_device::addq_l_imm3_aips_if() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98243,7 +98286,6 @@ void m68000_device::addq_l_imm3_pais_if() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98294,6 +98336,7 @@ void m68000_device::addq_l_imm3_pais_if() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98391,7 +98434,6 @@ void m68000_device::addq_l_imm3_das_if() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98442,6 +98484,7 @@ void m68000_device::addq_l_imm3_das_if() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98577,7 +98620,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98628,6 +98670,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98727,7 +98770,6 @@ void m68000_device::addq_l_imm3_adr16_if() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98778,6 +98820,7 @@ void m68000_device::addq_l_imm3_adr16_if() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98898,7 +98941,6 @@ void m68000_device::addq_l_imm3_adr32_if() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98949,6 +98991,7 @@ void m68000_device::addq_l_imm3_adr32_if() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98980,7 +99023,6 @@ void m68000_device::st_ds_if() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -98992,6 +99034,7 @@ void m68000_device::st_ds_if() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99043,6 +99086,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -99104,6 +99148,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -99135,12 +99180,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99169,12 +99214,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99205,6 +99250,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99259,7 +99305,6 @@ void m68000_device::st_ais_if() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99321,6 +99366,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99375,7 +99421,6 @@ void m68000_device::st_aips_if() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99437,6 +99482,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99493,7 +99539,6 @@ void m68000_device::st_pais_if() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99555,6 +99600,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99627,7 +99673,6 @@ void m68000_device::st_das_if() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99689,6 +99734,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99801,7 +99847,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99863,6 +99908,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99934,7 +99980,6 @@ void m68000_device::st_adr16_if() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99996,6 +100041,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100089,7 +100135,6 @@ void m68000_device::st_adr32_if() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -100151,6 +100196,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100178,7 +100224,6 @@ void m68000_device::subq_b_imm3_ds_if() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100186,6 +100231,7 @@ void m68000_device::subq_b_imm3_ds_if() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100240,7 +100286,6 @@ void m68000_device::subq_b_imm3_ais_if() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100268,6 +100313,7 @@ void m68000_device::subq_b_imm3_ais_if() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100319,7 +100365,6 @@ void m68000_device::subq_b_imm3_aips_if() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100347,6 +100392,7 @@ void m68000_device::subq_b_imm3_aips_if() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100400,7 +100446,6 @@ void m68000_device::subq_b_imm3_pais_if() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100428,6 +100473,7 @@ void m68000_device::subq_b_imm3_pais_if() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100497,7 +100543,6 @@ void m68000_device::subq_b_imm3_das_if() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100525,6 +100570,7 @@ void m68000_device::subq_b_imm3_das_if() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100632,7 +100678,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100660,6 +100705,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100728,7 +100774,6 @@ void m68000_device::subq_b_imm3_adr16_if() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100756,6 +100801,7 @@ void m68000_device::subq_b_imm3_adr16_if() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100845,7 +100891,6 @@ void m68000_device::subq_b_imm3_adr32_if() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100873,6 +100918,7 @@ void m68000_device::subq_b_imm3_adr32_if() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100899,7 +100945,6 @@ void m68000_device::subq_w_imm3_ds_if() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100907,6 +100952,7 @@ void m68000_device::subq_w_imm3_ds_if() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100940,7 +100986,6 @@ void m68000_device::subq_w_imm3_as_if() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -100971,6 +101016,7 @@ void m68000_device::subq_w_imm3_as_if() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101011,7 +101057,6 @@ void m68000_device::subq_w_imm3_ais_if() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101039,6 +101084,7 @@ void m68000_device::subq_w_imm3_ais_if() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101098,7 +101144,6 @@ void m68000_device::subq_w_imm3_aips_if() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101126,6 +101171,7 @@ void m68000_device::subq_w_imm3_aips_if() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101187,7 +101233,6 @@ void m68000_device::subq_w_imm3_pais_if() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101215,6 +101260,7 @@ void m68000_device::subq_w_imm3_pais_if() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101292,7 +101338,6 @@ void m68000_device::subq_w_imm3_das_if() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101320,6 +101365,7 @@ void m68000_device::subq_w_imm3_das_if() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101435,7 +101481,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101463,6 +101508,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101539,7 +101585,6 @@ void m68000_device::subq_w_imm3_adr16_if() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101567,6 +101612,7 @@ void m68000_device::subq_w_imm3_adr16_if() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101664,7 +101710,6 @@ void m68000_device::subq_w_imm3_adr32_if() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101692,6 +101737,7 @@ void m68000_device::subq_w_imm3_adr32_if() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101723,7 +101769,6 @@ void m68000_device::subq_l_imm3_ds_if() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -101756,6 +101801,7 @@ void m68000_device::subq_l_imm3_ds_if() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101772,7 +101818,6 @@ void m68000_device::subq_l_imm3_as_if() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -101803,6 +101848,7 @@ void m68000_device::subq_l_imm3_as_if() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101864,7 +101910,6 @@ void m68000_device::subq_l_imm3_ais_if() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101915,6 +101960,7 @@ void m68000_device::subq_l_imm3_ais_if() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101994,7 +102040,6 @@ void m68000_device::subq_l_imm3_aips_if() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102045,6 +102090,7 @@ void m68000_device::subq_l_imm3_aips_if() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102125,7 +102171,6 @@ void m68000_device::subq_l_imm3_pais_if() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102176,6 +102221,7 @@ void m68000_device::subq_l_imm3_pais_if() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102273,7 +102319,6 @@ void m68000_device::subq_l_imm3_das_if() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102324,6 +102369,7 @@ void m68000_device::subq_l_imm3_das_if() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102459,7 +102505,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102510,6 +102555,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102609,7 +102655,6 @@ void m68000_device::subq_l_imm3_adr16_if() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102660,6 +102705,7 @@ void m68000_device::subq_l_imm3_adr16_if() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102780,7 +102826,6 @@ void m68000_device::subq_l_imm3_adr32_if() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102831,6 +102876,7 @@ void m68000_device::subq_l_imm3_adr32_if() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102862,7 +102908,6 @@ void m68000_device::sf_ds_if() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -102874,6 +102919,7 @@ void m68000_device::sf_ds_if() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102925,6 +102971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -102986,6 +103033,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -103017,12 +103065,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -103051,12 +103099,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -103087,6 +103135,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -103141,7 +103190,6 @@ void m68000_device::sf_ais_if() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103203,6 +103251,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103257,7 +103306,6 @@ void m68000_device::sf_aips_if() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103319,6 +103367,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103375,7 +103424,6 @@ void m68000_device::sf_pais_if() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103437,6 +103485,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103509,7 +103558,6 @@ void m68000_device::sf_das_if() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103571,6 +103619,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103683,7 +103732,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103745,6 +103793,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103816,7 +103865,6 @@ void m68000_device::sf_adr16_if() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103878,6 +103926,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103971,7 +104020,6 @@ void m68000_device::sf_adr32_if() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104033,6 +104081,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104060,7 +104109,6 @@ void m68000_device::shi_ds_if() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104072,6 +104120,7 @@ void m68000_device::shi_ds_if() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104123,6 +104172,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -104184,6 +104234,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -104215,12 +104266,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104249,12 +104300,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104285,6 +104336,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104339,7 +104391,6 @@ void m68000_device::shi_ais_if() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104401,6 +104452,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104455,7 +104507,6 @@ void m68000_device::shi_aips_if() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104517,6 +104568,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104573,7 +104625,6 @@ void m68000_device::shi_pais_if() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104635,6 +104686,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104707,7 +104759,6 @@ void m68000_device::shi_das_if() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104769,6 +104820,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104881,7 +104933,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104943,6 +104994,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105014,7 +105066,6 @@ void m68000_device::shi_adr16_if() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105076,6 +105127,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105169,7 +105221,6 @@ void m68000_device::shi_adr32_if() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105231,6 +105282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105258,7 +105310,6 @@ void m68000_device::sls_ds_if() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105270,6 +105321,7 @@ void m68000_device::sls_ds_if() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105321,6 +105373,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -105382,6 +105435,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -105413,12 +105467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105447,12 +105501,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105483,6 +105537,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105537,7 +105592,6 @@ void m68000_device::sls_ais_if() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105599,6 +105653,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105653,7 +105708,6 @@ void m68000_device::sls_aips_if() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105715,6 +105769,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105771,7 +105826,6 @@ void m68000_device::sls_pais_if() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105833,6 +105887,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105905,7 +105960,6 @@ void m68000_device::sls_das_if() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105967,6 +106021,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106079,7 +106134,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106141,6 +106195,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106212,7 +106267,6 @@ void m68000_device::sls_adr16_if() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106274,6 +106328,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106367,7 +106422,6 @@ void m68000_device::sls_adr32_if() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106429,6 +106483,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106456,7 +106511,6 @@ void m68000_device::scc_ds_if() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106468,6 +106522,7 @@ void m68000_device::scc_ds_if() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106519,6 +106574,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -106580,6 +106636,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -106611,12 +106668,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106645,12 +106702,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106681,6 +106738,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106735,7 +106793,6 @@ void m68000_device::scc_ais_if() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106797,6 +106854,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106851,7 +106909,6 @@ void m68000_device::scc_aips_if() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106913,6 +106970,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106969,7 +107027,6 @@ void m68000_device::scc_pais_if() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107031,6 +107088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107103,7 +107161,6 @@ void m68000_device::scc_das_if() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107165,6 +107222,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107277,7 +107335,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107339,6 +107396,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107410,7 +107468,6 @@ void m68000_device::scc_adr16_if() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107472,6 +107529,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107565,7 +107623,6 @@ void m68000_device::scc_adr32_if() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107627,6 +107684,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107654,7 +107712,6 @@ void m68000_device::scs_ds_if() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107666,6 +107723,7 @@ void m68000_device::scs_ds_if() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107717,6 +107775,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -107778,6 +107837,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -107809,12 +107869,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107843,12 +107903,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107879,6 +107939,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107933,7 +107994,6 @@ void m68000_device::scs_ais_if() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107995,6 +108055,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108049,7 +108110,6 @@ void m68000_device::scs_aips_if() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108111,6 +108171,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108167,7 +108228,6 @@ void m68000_device::scs_pais_if() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108229,6 +108289,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108301,7 +108362,6 @@ void m68000_device::scs_das_if() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108363,6 +108423,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108475,7 +108536,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108537,6 +108597,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108608,7 +108669,6 @@ void m68000_device::scs_adr16_if() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108670,6 +108730,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108763,7 +108824,6 @@ void m68000_device::scs_adr32_if() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108825,6 +108885,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108852,7 +108913,6 @@ void m68000_device::sne_ds_if() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108864,6 +108924,7 @@ void m68000_device::sne_ds_if() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -108915,6 +108976,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -108976,6 +109038,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -109007,12 +109070,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -109041,12 +109104,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -109077,6 +109140,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -109131,7 +109195,6 @@ void m68000_device::sne_ais_if() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109193,6 +109256,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109247,7 +109311,6 @@ void m68000_device::sne_aips_if() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109309,6 +109372,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109365,7 +109429,6 @@ void m68000_device::sne_pais_if() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109427,6 +109490,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109499,7 +109563,6 @@ void m68000_device::sne_das_if() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109561,6 +109624,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109673,7 +109737,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109735,6 +109798,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109806,7 +109870,6 @@ void m68000_device::sne_adr16_if() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109868,6 +109931,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109961,7 +110025,6 @@ void m68000_device::sne_adr32_if() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110023,6 +110086,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110050,7 +110114,6 @@ void m68000_device::seq_ds_if() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110062,6 +110125,7 @@ void m68000_device::seq_ds_if() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110113,6 +110177,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -110174,6 +110239,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -110205,12 +110271,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110239,12 +110305,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110275,6 +110341,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110329,7 +110396,6 @@ void m68000_device::seq_ais_if() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110391,6 +110457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110445,7 +110512,6 @@ void m68000_device::seq_aips_if() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110507,6 +110573,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110563,7 +110630,6 @@ void m68000_device::seq_pais_if() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110625,6 +110691,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110697,7 +110764,6 @@ void m68000_device::seq_das_if() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110759,6 +110825,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110871,7 +110938,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110933,6 +110999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111004,7 +111071,6 @@ void m68000_device::seq_adr16_if() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111066,6 +111132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111159,7 +111226,6 @@ void m68000_device::seq_adr32_if() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111221,6 +111287,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111248,7 +111315,6 @@ void m68000_device::svc_ds_if() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111260,6 +111326,7 @@ void m68000_device::svc_ds_if() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111311,6 +111378,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -111372,6 +111440,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -111403,12 +111472,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111437,12 +111506,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111473,6 +111542,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111527,7 +111597,6 @@ void m68000_device::svc_ais_if() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111589,6 +111658,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111643,7 +111713,6 @@ void m68000_device::svc_aips_if() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111705,6 +111774,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111761,7 +111831,6 @@ void m68000_device::svc_pais_if() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111823,6 +111892,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111895,7 +111965,6 @@ void m68000_device::svc_das_if() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111957,6 +112026,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112069,7 +112139,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112131,6 +112200,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112202,7 +112272,6 @@ void m68000_device::svc_adr16_if() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112264,6 +112333,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112357,7 +112427,6 @@ void m68000_device::svc_adr32_if() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112419,6 +112488,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112446,7 +112516,6 @@ void m68000_device::svs_ds_if() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112458,6 +112527,7 @@ void m68000_device::svs_ds_if() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112509,6 +112579,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112570,6 +112641,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112601,12 +112673,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112635,12 +112707,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112671,6 +112743,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112725,7 +112798,6 @@ void m68000_device::svs_ais_if() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112787,6 +112859,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112841,7 +112914,6 @@ void m68000_device::svs_aips_if() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112903,6 +112975,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112959,7 +113032,6 @@ void m68000_device::svs_pais_if() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113021,6 +113093,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113093,7 +113166,6 @@ void m68000_device::svs_das_if() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113155,6 +113227,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113267,7 +113340,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113329,6 +113401,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113400,7 +113473,6 @@ void m68000_device::svs_adr16_if() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113462,6 +113534,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113555,7 +113628,6 @@ void m68000_device::svs_adr32_if() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113617,6 +113689,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113644,7 +113717,6 @@ void m68000_device::spl_ds_if() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113656,6 +113728,7 @@ void m68000_device::spl_ds_if() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113707,6 +113780,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -113768,6 +113842,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -113799,12 +113874,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113833,12 +113908,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113869,6 +113944,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113923,7 +113999,6 @@ void m68000_device::spl_ais_if() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113985,6 +114060,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114039,7 +114115,6 @@ void m68000_device::spl_aips_if() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114101,6 +114176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114157,7 +114233,6 @@ void m68000_device::spl_pais_if() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114219,6 +114294,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114291,7 +114367,6 @@ void m68000_device::spl_das_if() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114353,6 +114428,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114465,7 +114541,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114527,6 +114602,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114598,7 +114674,6 @@ void m68000_device::spl_adr16_if() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114660,6 +114735,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114753,7 +114829,6 @@ void m68000_device::spl_adr32_if() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114815,6 +114890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114842,7 +114918,6 @@ void m68000_device::smi_ds_if() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114854,6 +114929,7 @@ void m68000_device::smi_ds_if() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -114905,6 +114981,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -114966,6 +115043,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -114997,12 +115075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -115031,12 +115109,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -115067,6 +115145,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -115121,7 +115200,6 @@ void m68000_device::smi_ais_if() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115183,6 +115261,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115237,7 +115316,6 @@ void m68000_device::smi_aips_if() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115299,6 +115377,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115355,7 +115434,6 @@ void m68000_device::smi_pais_if() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115417,6 +115495,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115489,7 +115568,6 @@ void m68000_device::smi_das_if() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115551,6 +115629,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115663,7 +115742,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115725,6 +115803,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115796,7 +115875,6 @@ void m68000_device::smi_adr16_if() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115858,6 +115936,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115951,7 +116030,6 @@ void m68000_device::smi_adr32_if() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116013,6 +116091,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116040,7 +116119,6 @@ void m68000_device::sge_ds_if() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116052,6 +116130,7 @@ void m68000_device::sge_ds_if() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116103,6 +116182,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -116164,6 +116244,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -116195,12 +116276,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116229,12 +116310,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116265,6 +116346,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116319,7 +116401,6 @@ void m68000_device::sge_ais_if() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116381,6 +116462,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116435,7 +116517,6 @@ void m68000_device::sge_aips_if() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116497,6 +116578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116553,7 +116635,6 @@ void m68000_device::sge_pais_if() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116615,6 +116696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116687,7 +116769,6 @@ void m68000_device::sge_das_if() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116749,6 +116830,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116861,7 +116943,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116923,6 +117004,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116994,7 +117076,6 @@ void m68000_device::sge_adr16_if() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117056,6 +117137,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117149,7 +117231,6 @@ void m68000_device::sge_adr32_if() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117211,6 +117292,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117238,7 +117320,6 @@ void m68000_device::slt_ds_if() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117250,6 +117331,7 @@ void m68000_device::slt_ds_if() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117301,6 +117383,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117362,6 +117445,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117393,12 +117477,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117427,12 +117511,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117463,6 +117547,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117517,7 +117602,6 @@ void m68000_device::slt_ais_if() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117579,6 +117663,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117633,7 +117718,6 @@ void m68000_device::slt_aips_if() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117695,6 +117779,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117751,7 +117836,6 @@ void m68000_device::slt_pais_if() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117813,6 +117897,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117885,7 +117970,6 @@ void m68000_device::slt_das_if() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117947,6 +118031,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118059,7 +118144,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118121,6 +118205,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118192,7 +118277,6 @@ void m68000_device::slt_adr16_if() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118254,6 +118338,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118347,7 +118432,6 @@ void m68000_device::slt_adr32_if() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118409,6 +118493,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118436,7 +118521,6 @@ void m68000_device::sgt_ds_if() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118448,6 +118532,7 @@ void m68000_device::sgt_ds_if() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118499,6 +118584,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118560,6 +118646,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118591,12 +118678,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118625,12 +118712,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118661,6 +118748,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118715,7 +118803,6 @@ void m68000_device::sgt_ais_if() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118777,6 +118864,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118831,7 +118919,6 @@ void m68000_device::sgt_aips_if() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118893,6 +118980,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118949,7 +119037,6 @@ void m68000_device::sgt_pais_if() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119011,6 +119098,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119083,7 +119171,6 @@ void m68000_device::sgt_das_if() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119145,6 +119232,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119257,7 +119345,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119319,6 +119406,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119390,7 +119478,6 @@ void m68000_device::sgt_adr16_if() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119452,6 +119539,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119545,7 +119633,6 @@ void m68000_device::sgt_adr32_if() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119607,6 +119694,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119634,7 +119722,6 @@ void m68000_device::sle_ds_if() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119646,6 +119733,7 @@ void m68000_device::sle_ds_if() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119697,6 +119785,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119758,6 +119847,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -119789,12 +119879,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119823,12 +119913,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119859,6 +119949,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119913,7 +120004,6 @@ void m68000_device::sle_ais_if() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119975,6 +120065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120029,7 +120120,6 @@ void m68000_device::sle_aips_if() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120091,6 +120181,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120147,7 +120238,6 @@ void m68000_device::sle_pais_if() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120209,6 +120299,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120281,7 +120372,6 @@ void m68000_device::sle_das_if() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120343,6 +120433,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120455,7 +120546,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120517,6 +120607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120588,7 +120679,6 @@ void m68000_device::sle_adr16_if() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120650,6 +120740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120743,7 +120834,6 @@ void m68000_device::sle_adr32_if() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120805,6 +120895,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120839,6 +120930,7 @@ void m68000_device::bra_rel16_if() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120896,11 +120988,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -120939,6 +121031,7 @@ void m68000_device::bra_rel8_if() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120972,11 +121065,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121078,11 +121171,11 @@ void m68000_device::bsr_rel16_if() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121184,11 +121277,11 @@ void m68000_device::bsr_rel8_if() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121227,6 +121320,7 @@ void m68000_device::bhi_rel16_if() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121284,11 +121378,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121327,6 +121421,7 @@ void m68000_device::bhi_rel8_if() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121360,11 +121455,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121403,6 +121498,7 @@ void m68000_device::bls_rel16_if() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121460,11 +121556,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121503,6 +121599,7 @@ void m68000_device::bls_rel8_if() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121536,11 +121633,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121579,6 +121676,7 @@ void m68000_device::bcc_rel16_if() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121636,11 +121734,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121679,6 +121777,7 @@ void m68000_device::bcc_rel8_if() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121712,11 +121811,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121755,6 +121854,7 @@ void m68000_device::bcs_rel16_if() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121812,11 +121912,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121855,6 +121955,7 @@ void m68000_device::bcs_rel8_if() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121888,11 +121989,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121931,6 +122032,7 @@ void m68000_device::bne_rel16_if() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121988,11 +122090,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122031,6 +122133,7 @@ void m68000_device::bne_rel8_if() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122064,11 +122167,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122107,6 +122210,7 @@ void m68000_device::beq_rel16_if() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122164,11 +122268,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122207,6 +122311,7 @@ void m68000_device::beq_rel8_if() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122240,11 +122345,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122283,6 +122388,7 @@ void m68000_device::bvc_rel16_if() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122340,11 +122446,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122383,6 +122489,7 @@ void m68000_device::bvc_rel8_if() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122416,11 +122523,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122459,6 +122566,7 @@ void m68000_device::bvs_rel16_if() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122516,11 +122624,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122559,6 +122667,7 @@ void m68000_device::bvs_rel8_if() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122592,11 +122701,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122635,6 +122744,7 @@ void m68000_device::bpl_rel16_if() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122692,11 +122802,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122735,6 +122845,7 @@ void m68000_device::bpl_rel8_if() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122768,11 +122879,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122811,6 +122922,7 @@ void m68000_device::bmi_rel16_if() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122868,11 +122980,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122911,6 +123023,7 @@ void m68000_device::bmi_rel8_if() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122944,11 +123057,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122987,6 +123100,7 @@ void m68000_device::bge_rel16_if() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123044,11 +123158,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123087,6 +123201,7 @@ void m68000_device::bge_rel8_if() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123120,11 +123235,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123163,6 +123278,7 @@ void m68000_device::blt_rel16_if() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123220,11 +123336,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123263,6 +123379,7 @@ void m68000_device::blt_rel8_if() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123296,11 +123413,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123339,6 +123456,7 @@ void m68000_device::bgt_rel16_if() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123396,11 +123514,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123439,6 +123557,7 @@ void m68000_device::bgt_rel8_if() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123472,11 +123591,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123515,6 +123634,7 @@ void m68000_device::ble_rel16_if() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123572,11 +123692,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123615,6 +123735,7 @@ void m68000_device::ble_rel8_if() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123648,11 +123769,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123684,7 +123805,6 @@ void m68000_device::moveq_imm8o_dd_if() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -123693,6 +123813,7 @@ void m68000_device::moveq_imm8o_dd_if() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123725,7 +123846,6 @@ void m68000_device::or_b_ds_dd_if() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -123733,6 +123853,7 @@ void m68000_device::or_b_ds_dd_if() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123790,7 +123911,6 @@ void m68000_device::or_b_ais_dd_if() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123798,6 +123918,7 @@ void m68000_device::or_b_ais_dd_if() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123860,7 +123981,6 @@ void m68000_device::or_b_aips_dd_if() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123868,6 +123988,7 @@ void m68000_device::or_b_aips_dd_if() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123932,7 +124053,6 @@ void m68000_device::or_b_pais_dd_if() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123940,6 +124060,7 @@ void m68000_device::or_b_pais_dd_if() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124020,7 +124141,6 @@ void m68000_device::or_b_das_dd_if() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124028,6 +124148,7 @@ void m68000_device::or_b_das_dd_if() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124148,7 +124269,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124156,6 +124276,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124235,7 +124356,6 @@ void m68000_device::or_b_adr16_dd_if() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124243,6 +124363,7 @@ void m68000_device::or_b_adr16_dd_if() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124344,7 +124465,6 @@ void m68000_device::or_b_adr32_dd_if() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124352,6 +124472,7 @@ void m68000_device::or_b_adr32_dd_if() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124431,7 +124552,6 @@ void m68000_device::or_b_dpc_dd_if() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124439,6 +124559,7 @@ void m68000_device::or_b_dpc_dd_if() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124558,7 +124679,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124566,6 +124686,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124625,7 +124746,6 @@ void m68000_device::or_b_imm8_dd_if() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -124633,6 +124753,7 @@ void m68000_device::or_b_imm8_dd_if() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124668,7 +124789,6 @@ void m68000_device::or_w_ds_dd_if() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -124676,6 +124796,7 @@ void m68000_device::or_w_ds_dd_if() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124736,7 +124857,6 @@ void m68000_device::or_w_ais_dd_if() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124744,6 +124864,7 @@ void m68000_device::or_w_ais_dd_if() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124809,7 +124930,6 @@ void m68000_device::or_w_aips_dd_if() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124817,6 +124937,7 @@ void m68000_device::or_w_aips_dd_if() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124884,7 +125005,6 @@ void m68000_device::or_w_pais_dd_if() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124892,6 +125012,7 @@ void m68000_device::or_w_pais_dd_if() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124975,7 +125096,6 @@ void m68000_device::or_w_das_dd_if() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124983,6 +125103,7 @@ void m68000_device::or_w_das_dd_if() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125106,7 +125227,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125114,6 +125234,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125196,7 +125317,6 @@ void m68000_device::or_w_adr16_dd_if() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125204,6 +125324,7 @@ void m68000_device::or_w_adr16_dd_if() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125308,7 +125429,6 @@ void m68000_device::or_w_adr32_dd_if() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125316,6 +125436,7 @@ void m68000_device::or_w_adr32_dd_if() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125398,7 +125519,6 @@ void m68000_device::or_w_dpc_dd_if() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125406,6 +125526,7 @@ void m68000_device::or_w_dpc_dd_if() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125528,7 +125649,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125536,6 +125656,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125595,7 +125716,6 @@ void m68000_device::or_w_imm16_dd_if() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -125603,6 +125723,7 @@ void m68000_device::or_w_imm16_dd_if() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125638,7 +125759,6 @@ void m68000_device::or_l_ds_dd_if() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -125672,6 +125792,7 @@ void m68000_device::or_l_ds_dd_if() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125736,7 +125857,6 @@ void m68000_device::or_l_ais_dd_if() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125767,6 +125887,7 @@ void m68000_device::or_l_ais_dd_if() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125835,7 +125956,6 @@ void m68000_device::or_l_aips_dd_if() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125866,6 +125986,7 @@ void m68000_device::or_l_aips_dd_if() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125935,7 +126056,6 @@ void m68000_device::or_l_pais_dd_if() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125966,6 +126086,7 @@ void m68000_device::or_l_pais_dd_if() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126052,7 +126173,6 @@ void m68000_device::or_l_das_dd_if() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126083,6 +126203,7 @@ void m68000_device::or_l_das_dd_if() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126209,7 +126330,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126240,6 +126360,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126329,7 +126450,6 @@ void m68000_device::or_l_adr16_dd_if() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126360,6 +126480,7 @@ void m68000_device::or_l_adr16_dd_if() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126471,7 +126592,6 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126502,6 +126622,7 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126587,7 +126708,6 @@ void m68000_device::or_l_dpc_dd_if() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126618,6 +126738,7 @@ void m68000_device::or_l_dpc_dd_if() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126743,7 +126864,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126774,6 +126894,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126838,7 +126959,6 @@ void m68000_device::or_l_imm32_dd_if() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -126872,6 +126992,7 @@ void m68000_device::or_l_imm32_dd_if() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -127069,11 +127190,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127101,10 +127222,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127214,7 +127335,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127224,7 +127344,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127234,6 +127353,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127473,11 +127593,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127505,10 +127625,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127618,7 +127738,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127628,7 +127747,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127638,6 +127756,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127881,11 +128000,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127913,10 +128032,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128026,7 +128145,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128036,7 +128154,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128046,6 +128163,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128291,11 +128409,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128323,10 +128441,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128436,7 +128554,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128446,7 +128563,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128456,6 +128572,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128717,11 +128834,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128749,10 +128866,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128862,7 +128979,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128872,7 +128988,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128882,6 +128997,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129181,11 +129297,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129213,10 +129329,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129326,7 +129442,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129336,7 +129451,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129346,6 +129460,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129606,11 +129721,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129638,10 +129753,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129751,7 +129866,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129761,7 +129875,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129771,6 +129884,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130052,11 +130166,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130084,10 +130198,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130197,7 +130311,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130207,7 +130320,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130217,6 +130329,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130477,11 +130590,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130509,10 +130622,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130622,7 +130735,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130632,7 +130744,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130642,6 +130753,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130940,11 +131052,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130972,10 +131084,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131085,7 +131197,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131095,7 +131206,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131105,6 +131215,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131343,11 +131454,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131375,10 +131486,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131488,7 +131599,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131498,7 +131608,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131508,6 +131617,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131544,7 +131654,6 @@ void m68000_device::sbcd_ds_dd_if() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -131573,6 +131682,7 @@ void m68000_device::sbcd_ds_dd_if() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -131617,7 +131727,6 @@ void m68000_device::sbcd_pais_paid_if() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -131664,6 +131773,7 @@ void m68000_device::sbcd_pais_paid_if() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131713,7 +131823,6 @@ void m68000_device::or_b_dd_ais_if() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131740,6 +131849,7 @@ void m68000_device::or_b_dd_ais_if() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131795,7 +131905,6 @@ void m68000_device::or_b_dd_aips_if() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131822,6 +131931,7 @@ void m68000_device::or_b_dd_aips_if() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131879,7 +131989,6 @@ void m68000_device::or_b_dd_pais_if() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131906,6 +132015,7 @@ void m68000_device::or_b_dd_pais_if() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131979,7 +132089,6 @@ void m68000_device::or_b_dd_das_if() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132006,6 +132115,7 @@ void m68000_device::or_b_dd_das_if() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132119,7 +132229,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132146,6 +132255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132218,7 +132328,6 @@ void m68000_device::or_b_dd_adr16_if() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132245,6 +132354,7 @@ void m68000_device::or_b_dd_adr16_if() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132339,7 +132449,6 @@ void m68000_device::or_b_dd_adr32_if() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132366,6 +132475,7 @@ void m68000_device::or_b_dd_adr32_if() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132419,7 +132529,6 @@ void m68000_device::or_w_dd_ais_if() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132446,6 +132555,7 @@ void m68000_device::or_w_dd_ais_if() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132509,7 +132619,6 @@ void m68000_device::or_w_dd_aips_if() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132536,6 +132645,7 @@ void m68000_device::or_w_dd_aips_if() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132601,7 +132711,6 @@ void m68000_device::or_w_dd_pais_if() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132628,6 +132737,7 @@ void m68000_device::or_w_dd_pais_if() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132709,7 +132819,6 @@ void m68000_device::or_w_dd_das_if() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132736,6 +132845,7 @@ void m68000_device::or_w_dd_das_if() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132857,7 +132967,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132884,6 +132993,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132964,7 +133074,6 @@ void m68000_device::or_w_dd_adr16_if() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132991,6 +133100,7 @@ void m68000_device::or_w_dd_adr16_if() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133093,7 +133203,6 @@ void m68000_device::or_w_dd_adr32_if() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133120,6 +133229,7 @@ void m68000_device::or_w_dd_adr32_if() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133199,7 +133309,6 @@ void m68000_device::or_l_dd_ais_if() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133249,6 +133358,7 @@ void m68000_device::or_l_dd_ais_if() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133332,7 +133442,6 @@ void m68000_device::or_l_dd_aips_if() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133382,6 +133491,7 @@ void m68000_device::or_l_dd_aips_if() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133466,7 +133576,6 @@ void m68000_device::or_l_dd_pais_if() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133516,6 +133625,7 @@ void m68000_device::or_l_dd_pais_if() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133617,7 +133727,6 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133667,6 +133776,7 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133808,7 +133918,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133858,6 +133967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133962,7 +134072,6 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134012,6 +134121,7 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -134138,7 +134248,6 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134188,6 +134297,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -134408,11 +134518,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134481,7 +134591,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -134494,6 +134603,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134621,7 +134731,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -134652,7 +134761,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -134684,6 +134792,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134713,14 +134822,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -134947,11 +135054,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135020,7 +135127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135033,6 +135139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135160,7 +135267,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135191,7 +135297,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135223,6 +135328,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135252,14 +135358,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -135490,11 +135594,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135563,7 +135667,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135576,6 +135679,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135703,7 +135807,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135734,7 +135837,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135766,6 +135868,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135795,14 +135898,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136035,11 +136136,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136108,7 +136209,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136121,6 +136221,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136248,7 +136349,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136279,7 +136379,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136311,6 +136410,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136340,14 +136440,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136596,11 +136694,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136669,7 +136767,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136682,6 +136779,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136809,7 +136907,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136840,7 +136937,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136872,6 +136968,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136901,14 +136998,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137195,11 +137290,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137268,7 +137363,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137281,6 +137375,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137408,7 +137503,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137439,7 +137533,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -137471,6 +137564,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137500,14 +137594,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137755,11 +137847,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137828,7 +137920,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137841,6 +137932,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137968,7 +138060,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137999,7 +138090,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138031,6 +138121,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138060,14 +138151,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138336,11 +138425,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138409,7 +138498,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138422,6 +138510,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138549,7 +138638,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -138580,7 +138668,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138612,6 +138699,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138641,14 +138729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138896,11 +138982,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138969,7 +139055,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138982,6 +139067,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139109,7 +139195,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139140,7 +139225,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139172,6 +139256,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139201,14 +139286,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -139494,11 +139577,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139567,7 +139650,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -139580,6 +139662,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139707,7 +139790,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139738,7 +139820,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139770,6 +139851,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139799,14 +139881,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140032,11 +140112,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140105,7 +140185,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -140118,6 +140197,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140245,7 +140325,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -140276,7 +140355,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -140308,6 +140386,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140337,14 +140416,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140360,7 +140437,6 @@ void m68000_device::sub_b_ds_dd_if() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140368,6 +140444,7 @@ void m68000_device::sub_b_ds_dd_if() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140423,7 +140500,6 @@ void m68000_device::sub_b_ais_dd_if() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140431,6 +140507,7 @@ void m68000_device::sub_b_ais_dd_if() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140490,7 +140567,6 @@ void m68000_device::sub_b_aips_dd_if() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140498,6 +140574,7 @@ void m68000_device::sub_b_aips_dd_if() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140559,7 +140636,6 @@ void m68000_device::sub_b_pais_dd_if() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140567,6 +140643,7 @@ void m68000_device::sub_b_pais_dd_if() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140644,7 +140721,6 @@ void m68000_device::sub_b_das_dd_if() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140652,6 +140728,7 @@ void m68000_device::sub_b_das_dd_if() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140767,7 +140844,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140775,6 +140851,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140851,7 +140928,6 @@ void m68000_device::sub_b_adr16_dd_if() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140859,6 +140935,7 @@ void m68000_device::sub_b_adr16_dd_if() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140956,7 +141033,6 @@ void m68000_device::sub_b_adr32_dd_if() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140964,6 +141040,7 @@ void m68000_device::sub_b_adr32_dd_if() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141040,7 +141117,6 @@ void m68000_device::sub_b_dpc_dd_if() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141048,6 +141124,7 @@ void m68000_device::sub_b_dpc_dd_if() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141162,7 +141239,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141170,6 +141246,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141227,7 +141304,6 @@ void m68000_device::sub_b_imm8_dd_if() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141235,6 +141311,7 @@ void m68000_device::sub_b_imm8_dd_if() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141269,7 +141346,6 @@ void m68000_device::sub_w_ds_dd_if() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141277,6 +141353,7 @@ void m68000_device::sub_w_ds_dd_if() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141311,7 +141388,6 @@ void m68000_device::sub_w_as_dd_if() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -141319,6 +141395,7 @@ void m68000_device::sub_w_as_dd_if() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141377,7 +141454,6 @@ void m68000_device::sub_w_ais_dd_if() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141385,6 +141461,7 @@ void m68000_device::sub_w_ais_dd_if() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141447,7 +141524,6 @@ void m68000_device::sub_w_aips_dd_if() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141455,6 +141531,7 @@ void m68000_device::sub_w_aips_dd_if() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141519,7 +141596,6 @@ void m68000_device::sub_w_pais_dd_if() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141527,6 +141603,7 @@ void m68000_device::sub_w_pais_dd_if() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141607,7 +141684,6 @@ void m68000_device::sub_w_das_dd_if() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141615,6 +141691,7 @@ void m68000_device::sub_w_das_dd_if() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141733,7 +141810,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141741,6 +141817,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141820,7 +141897,6 @@ void m68000_device::sub_w_adr16_dd_if() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141828,6 +141904,7 @@ void m68000_device::sub_w_adr16_dd_if() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141928,7 +142005,6 @@ void m68000_device::sub_w_adr32_dd_if() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141936,6 +142012,7 @@ void m68000_device::sub_w_adr32_dd_if() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142015,7 +142092,6 @@ void m68000_device::sub_w_dpc_dd_if() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142023,6 +142099,7 @@ void m68000_device::sub_w_dpc_dd_if() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142140,7 +142217,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142148,6 +142224,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142205,7 +142282,6 @@ void m68000_device::sub_w_imm16_dd_if() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142213,6 +142289,7 @@ void m68000_device::sub_w_imm16_dd_if() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142247,7 +142324,6 @@ void m68000_device::sub_l_ds_dd_if() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142280,6 +142356,7 @@ void m68000_device::sub_l_ds_dd_if() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142297,7 +142374,6 @@ void m68000_device::sub_l_as_dd_if() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -142330,6 +142406,7 @@ void m68000_device::sub_l_as_dd_if() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142392,7 +142469,6 @@ void m68000_device::sub_l_ais_dd_if() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142423,6 +142499,7 @@ void m68000_device::sub_l_ais_dd_if() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142488,7 +142565,6 @@ void m68000_device::sub_l_aips_dd_if() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142519,6 +142595,7 @@ void m68000_device::sub_l_aips_dd_if() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142585,7 +142662,6 @@ void m68000_device::sub_l_pais_dd_if() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142616,6 +142692,7 @@ void m68000_device::sub_l_pais_dd_if() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142699,7 +142776,6 @@ void m68000_device::sub_l_das_dd_if() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142730,6 +142806,7 @@ void m68000_device::sub_l_das_dd_if() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142851,7 +142928,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142882,6 +142958,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142967,7 +143044,6 @@ void m68000_device::sub_l_adr16_dd_if() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142998,6 +143074,7 @@ void m68000_device::sub_l_adr16_dd_if() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143104,7 +143181,6 @@ void m68000_device::sub_l_adr32_dd_if() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143135,6 +143211,7 @@ void m68000_device::sub_l_adr32_dd_if() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143217,7 +143294,6 @@ void m68000_device::sub_l_dpc_dd_if() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143248,6 +143324,7 @@ void m68000_device::sub_l_dpc_dd_if() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143368,7 +143445,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143399,6 +143475,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143460,7 +143537,6 @@ void m68000_device::sub_l_imm32_dd_if() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -143493,6 +143569,7 @@ void m68000_device::sub_l_imm32_dd_if() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143510,7 +143587,6 @@ void m68000_device::suba_w_ds_ad_if() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -143541,6 +143617,7 @@ void m68000_device::suba_w_ds_ad_if() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143558,7 +143635,6 @@ void m68000_device::suba_w_as_ad_if() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -143589,6 +143665,7 @@ void m68000_device::suba_w_as_ad_if() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143630,7 +143707,6 @@ void m68000_device::suba_w_ais_ad_if() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143661,6 +143737,7 @@ void m68000_device::suba_w_ais_ad_if() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143706,7 +143783,6 @@ void m68000_device::suba_w_aips_ad_if() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143737,6 +143813,7 @@ void m68000_device::suba_w_aips_ad_if() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143784,7 +143861,6 @@ void m68000_device::suba_w_pais_ad_if() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143815,6 +143891,7 @@ void m68000_device::suba_w_pais_ad_if() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143878,7 +143955,6 @@ void m68000_device::suba_w_das_ad_if() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143909,6 +143985,7 @@ void m68000_device::suba_w_das_ad_if() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144010,7 +144087,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144041,6 +144117,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144103,7 +144180,6 @@ void m68000_device::suba_w_adr16_ad_if() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144134,6 +144210,7 @@ void m68000_device::suba_w_adr16_ad_if() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144217,7 +144294,6 @@ void m68000_device::suba_w_adr32_ad_if() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144248,6 +144324,7 @@ void m68000_device::suba_w_adr32_ad_if() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144310,7 +144387,6 @@ void m68000_device::suba_w_dpc_ad_if() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144341,6 +144417,7 @@ void m68000_device::suba_w_dpc_ad_if() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144441,7 +144518,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144472,6 +144548,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144512,7 +144589,6 @@ void m68000_device::suba_w_imm16_ad_if() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -144543,6 +144619,7 @@ void m68000_device::suba_w_imm16_ad_if() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144560,7 +144637,6 @@ void m68000_device::subx_b_ds_dd_if() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -144568,6 +144644,7 @@ void m68000_device::subx_b_ds_dd_if() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144629,7 +144706,6 @@ void m68000_device::subx_b_pais_paid_if() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -144674,6 +144750,7 @@ void m68000_device::subx_b_pais_paid_if() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144722,7 +144799,6 @@ void m68000_device::sub_b_dd_ais_if() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144749,6 +144825,7 @@ void m68000_device::sub_b_dd_ais_if() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144801,7 +144878,6 @@ void m68000_device::sub_b_dd_aips_if() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144828,6 +144904,7 @@ void m68000_device::sub_b_dd_aips_if() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144882,7 +144959,6 @@ void m68000_device::sub_b_dd_pais_if() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144909,6 +144985,7 @@ void m68000_device::sub_b_dd_pais_if() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144979,7 +145056,6 @@ void m68000_device::sub_b_dd_das_if() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145006,6 +145082,7 @@ void m68000_device::sub_b_dd_das_if() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145114,7 +145191,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145141,6 +145217,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145210,7 +145287,6 @@ void m68000_device::sub_b_dd_adr16_if() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145237,6 +145313,7 @@ void m68000_device::sub_b_dd_adr16_if() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145327,7 +145404,6 @@ void m68000_device::sub_b_dd_adr32_if() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145354,6 +145430,7 @@ void m68000_device::sub_b_dd_adr32_if() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145381,7 +145458,6 @@ void m68000_device::subx_w_ds_dd_if() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -145389,6 +145465,7 @@ void m68000_device::subx_w_ds_dd_if() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145453,7 +145530,6 @@ void m68000_device::subx_w_pais_paid_if() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145501,6 +145577,7 @@ void m68000_device::subx_w_pais_paid_if() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145557,7 +145634,6 @@ void m68000_device::sub_w_dd_ais_if() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145584,6 +145660,7 @@ void m68000_device::sub_w_dd_ais_if() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145644,7 +145721,6 @@ void m68000_device::sub_w_dd_aips_if() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145671,6 +145747,7 @@ void m68000_device::sub_w_dd_aips_if() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145733,7 +145810,6 @@ void m68000_device::sub_w_dd_pais_if() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145760,6 +145836,7 @@ void m68000_device::sub_w_dd_pais_if() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145838,7 +145915,6 @@ void m68000_device::sub_w_dd_das_if() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145865,6 +145941,7 @@ void m68000_device::sub_w_dd_das_if() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145981,7 +146058,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146008,6 +146084,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146085,7 +146162,6 @@ void m68000_device::sub_w_dd_adr16_if() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146112,6 +146188,7 @@ void m68000_device::sub_w_dd_adr16_if() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146210,7 +146287,6 @@ void m68000_device::sub_w_dd_adr32_if() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146237,6 +146313,7 @@ void m68000_device::sub_w_dd_adr32_if() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146269,7 +146346,6 @@ void m68000_device::subx_l_ds_dd_if() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -146302,6 +146378,7 @@ void m68000_device::subx_l_ds_dd_if() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -146416,7 +146493,6 @@ void m68000_device::subx_l_pais_paid_if() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146462,6 +146538,7 @@ void m68000_device::subx_l_pais_paid_if() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146539,7 +146616,6 @@ void m68000_device::sub_l_dd_ais_if() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146589,6 +146665,7 @@ void m68000_device::sub_l_dd_ais_if() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146669,7 +146746,6 @@ void m68000_device::sub_l_dd_aips_if() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146719,6 +146795,7 @@ void m68000_device::sub_l_dd_aips_if() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146800,7 +146877,6 @@ void m68000_device::sub_l_dd_pais_if() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146850,6 +146926,7 @@ void m68000_device::sub_l_dd_pais_if() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146948,7 +147025,6 @@ void m68000_device::sub_l_dd_das_if() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146998,6 +147074,7 @@ void m68000_device::sub_l_dd_das_if() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147134,7 +147211,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -147184,6 +147260,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147284,7 +147361,6 @@ void m68000_device::sub_l_dd_adr16_if() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -147334,6 +147410,7 @@ void m68000_device::sub_l_dd_adr16_if() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147455,7 +147532,6 @@ void m68000_device::sub_l_dd_adr32_if() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -147505,6 +147581,7 @@ void m68000_device::sub_l_dd_adr32_if() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147537,7 +147614,6 @@ void m68000_device::suba_l_ds_ad_if() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -147568,6 +147644,7 @@ void m68000_device::suba_l_ds_ad_if() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147585,7 +147662,6 @@ void m68000_device::suba_l_as_ad_if() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -147616,6 +147692,7 @@ void m68000_device::suba_l_as_ad_if() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147678,7 +147755,6 @@ void m68000_device::suba_l_ais_ad_if() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147707,6 +147783,7 @@ void m68000_device::suba_l_ais_ad_if() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147772,7 +147849,6 @@ void m68000_device::suba_l_aips_ad_if() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147801,6 +147877,7 @@ void m68000_device::suba_l_aips_ad_if() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147867,7 +147944,6 @@ void m68000_device::suba_l_pais_ad_if() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147896,6 +147972,7 @@ void m68000_device::suba_l_pais_ad_if() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147979,7 +148056,6 @@ void m68000_device::suba_l_das_ad_if() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148008,6 +148084,7 @@ void m68000_device::suba_l_das_ad_if() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148129,7 +148206,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148158,6 +148234,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148243,7 +148320,6 @@ void m68000_device::suba_l_adr16_ad_if() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148272,6 +148348,7 @@ void m68000_device::suba_l_adr16_ad_if() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148378,7 +148455,6 @@ void m68000_device::suba_l_adr32_ad_if() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148407,6 +148483,7 @@ void m68000_device::suba_l_adr32_ad_if() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148489,7 +148566,6 @@ void m68000_device::suba_l_dpc_ad_if() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148518,6 +148594,7 @@ void m68000_device::suba_l_dpc_ad_if() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148638,7 +148715,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148667,6 +148743,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148728,7 +148805,6 @@ void m68000_device::suba_l_imm32_ad_if() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -148759,6 +148835,7 @@ void m68000_device::suba_l_imm32_ad_if() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148776,7 +148853,6 @@ void m68000_device::cmp_b_ds_dd_if() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -148784,6 +148860,7 @@ void m68000_device::cmp_b_ds_dd_if() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -148838,7 +148915,6 @@ void m68000_device::cmp_b_ais_dd_if() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148846,6 +148922,7 @@ void m68000_device::cmp_b_ais_dd_if() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -148904,7 +148981,6 @@ void m68000_device::cmp_b_aips_dd_if() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148912,6 +148988,7 @@ void m68000_device::cmp_b_aips_dd_if() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -148972,7 +149049,6 @@ void m68000_device::cmp_b_pais_dd_if() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148980,6 +149056,7 @@ void m68000_device::cmp_b_pais_dd_if() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149056,7 +149133,6 @@ void m68000_device::cmp_b_das_dd_if() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149064,6 +149140,7 @@ void m68000_device::cmp_b_das_dd_if() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149178,7 +149255,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149186,6 +149262,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149261,7 +149338,6 @@ void m68000_device::cmp_b_adr16_dd_if() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149269,6 +149345,7 @@ void m68000_device::cmp_b_adr16_dd_if() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149365,7 +149442,6 @@ void m68000_device::cmp_b_adr32_dd_if() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149373,6 +149449,7 @@ void m68000_device::cmp_b_adr32_dd_if() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149448,7 +149525,6 @@ void m68000_device::cmp_b_dpc_dd_if() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149456,6 +149532,7 @@ void m68000_device::cmp_b_dpc_dd_if() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149569,7 +149646,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149577,6 +149653,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149633,7 +149710,6 @@ void m68000_device::cmp_b_imm8_dd_if() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -149641,6 +149717,7 @@ void m68000_device::cmp_b_imm8_dd_if() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149674,7 +149751,6 @@ void m68000_device::cmp_w_ds_dd_if() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149682,6 +149758,7 @@ void m68000_device::cmp_w_ds_dd_if() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149715,7 +149792,6 @@ void m68000_device::cmp_w_as_dd_if() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -149723,6 +149799,7 @@ void m68000_device::cmp_w_as_dd_if() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149780,7 +149857,6 @@ void m68000_device::cmp_w_ais_dd_if() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149788,6 +149864,7 @@ void m68000_device::cmp_w_ais_dd_if() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149849,7 +149926,6 @@ void m68000_device::cmp_w_aips_dd_if() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149857,6 +149933,7 @@ void m68000_device::cmp_w_aips_dd_if() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149920,7 +149997,6 @@ void m68000_device::cmp_w_pais_dd_if() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149928,6 +150004,7 @@ void m68000_device::cmp_w_pais_dd_if() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150007,7 +150084,6 @@ void m68000_device::cmp_w_das_dd_if() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150015,6 +150091,7 @@ void m68000_device::cmp_w_das_dd_if() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150132,7 +150209,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150140,6 +150216,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150218,7 +150295,6 @@ void m68000_device::cmp_w_adr16_dd_if() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150226,6 +150302,7 @@ void m68000_device::cmp_w_adr16_dd_if() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150325,7 +150402,6 @@ void m68000_device::cmp_w_adr32_dd_if() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150333,6 +150409,7 @@ void m68000_device::cmp_w_adr32_dd_if() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150411,7 +150488,6 @@ void m68000_device::cmp_w_dpc_dd_if() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150419,6 +150495,7 @@ void m68000_device::cmp_w_dpc_dd_if() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150535,7 +150612,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150543,6 +150619,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150599,7 +150676,6 @@ void m68000_device::cmp_w_imm16_dd_if() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -150607,6 +150683,7 @@ void m68000_device::cmp_w_imm16_dd_if() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150640,7 +150717,6 @@ void m68000_device::cmp_l_ds_dd_if() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -150670,6 +150746,7 @@ void m68000_device::cmp_l_ds_dd_if() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150686,7 +150763,6 @@ void m68000_device::cmp_l_as_dd_if() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -150716,6 +150792,7 @@ void m68000_device::cmp_l_as_dd_if() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150777,7 +150854,6 @@ void m68000_device::cmp_l_ais_dd_if() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150807,6 +150883,7 @@ void m68000_device::cmp_l_ais_dd_if() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150871,7 +150948,6 @@ void m68000_device::cmp_l_aips_dd_if() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150901,6 +150977,7 @@ void m68000_device::cmp_l_aips_dd_if() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150966,7 +151043,6 @@ void m68000_device::cmp_l_pais_dd_if() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150996,6 +151072,7 @@ void m68000_device::cmp_l_pais_dd_if() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151078,7 +151155,6 @@ void m68000_device::cmp_l_das_dd_if() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151108,6 +151184,7 @@ void m68000_device::cmp_l_das_dd_if() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151228,7 +151305,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151258,6 +151334,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151342,7 +151419,6 @@ void m68000_device::cmp_l_adr16_dd_if() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151372,6 +151448,7 @@ void m68000_device::cmp_l_adr16_dd_if() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151477,7 +151554,6 @@ void m68000_device::cmp_l_adr32_dd_if() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151507,6 +151583,7 @@ void m68000_device::cmp_l_adr32_dd_if() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151588,7 +151665,6 @@ void m68000_device::cmp_l_dpc_dd_if() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151618,6 +151694,7 @@ void m68000_device::cmp_l_dpc_dd_if() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151737,7 +151814,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151767,6 +151843,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151827,7 +151904,6 @@ void m68000_device::cmp_l_imm32_dd_if() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -151857,6 +151933,7 @@ void m68000_device::cmp_l_imm32_dd_if() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151873,7 +151950,6 @@ void m68000_device::cmpa_w_ds_ad_if() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -151903,6 +151979,7 @@ void m68000_device::cmpa_w_ds_ad_if() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151919,7 +151996,6 @@ void m68000_device::cmpa_w_as_ad_if() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -151949,6 +152025,7 @@ void m68000_device::cmpa_w_as_ad_if() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151989,7 +152066,6 @@ void m68000_device::cmpa_w_ais_ad_if() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152019,6 +152095,7 @@ void m68000_device::cmpa_w_ais_ad_if() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152063,7 +152140,6 @@ void m68000_device::cmpa_w_aips_ad_if() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152093,6 +152169,7 @@ void m68000_device::cmpa_w_aips_ad_if() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152139,7 +152216,6 @@ void m68000_device::cmpa_w_pais_ad_if() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152169,6 +152245,7 @@ void m68000_device::cmpa_w_pais_ad_if() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152231,7 +152308,6 @@ void m68000_device::cmpa_w_das_ad_if() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152261,6 +152337,7 @@ void m68000_device::cmpa_w_das_ad_if() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152361,7 +152438,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152391,6 +152467,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152452,7 +152529,6 @@ void m68000_device::cmpa_w_adr16_ad_if() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152482,6 +152558,7 @@ void m68000_device::cmpa_w_adr16_ad_if() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152564,7 +152641,6 @@ void m68000_device::cmpa_w_adr32_ad_if() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152594,6 +152670,7 @@ void m68000_device::cmpa_w_adr32_ad_if() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152655,7 +152732,6 @@ void m68000_device::cmpa_w_dpc_ad_if() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152685,6 +152761,7 @@ void m68000_device::cmpa_w_dpc_ad_if() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152784,7 +152861,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152814,6 +152890,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152853,7 +152930,6 @@ void m68000_device::cmpa_w_imm16_ad_if() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -152883,6 +152959,7 @@ void m68000_device::cmpa_w_imm16_ad_if() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152899,13 +152976,13 @@ void m68000_device::eor_b_dd_ds_if() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -152963,7 +153040,6 @@ void m68000_device::cmpm_b_aips_aipd_if() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -152984,6 +153060,7 @@ void m68000_device::cmpm_b_aips_aipd_if() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153043,7 +153120,6 @@ void m68000_device::eor_b_dd_ais_if() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153070,6 +153146,7 @@ void m68000_device::eor_b_dd_ais_if() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153125,7 +153202,6 @@ void m68000_device::eor_b_dd_aips_if() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153152,6 +153228,7 @@ void m68000_device::eor_b_dd_aips_if() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153209,7 +153286,6 @@ void m68000_device::eor_b_dd_pais_if() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153236,6 +153312,7 @@ void m68000_device::eor_b_dd_pais_if() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153309,7 +153386,6 @@ void m68000_device::eor_b_dd_das_if() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153336,6 +153412,7 @@ void m68000_device::eor_b_dd_das_if() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153449,7 +153526,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153476,6 +153552,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153548,7 +153625,6 @@ void m68000_device::eor_b_dd_adr16_if() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153575,6 +153651,7 @@ void m68000_device::eor_b_dd_adr16_if() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153669,7 +153746,6 @@ void m68000_device::eor_b_dd_adr32_if() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153696,6 +153772,7 @@ void m68000_device::eor_b_dd_adr32_if() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153724,13 +153801,13 @@ void m68000_device::eor_w_dd_ds_if() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153791,7 +153868,6 @@ void m68000_device::cmpm_w_aips_aipd_if() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153815,6 +153891,7 @@ void m68000_device::cmpm_w_aips_aipd_if() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153877,7 +153954,6 @@ void m68000_device::eor_w_dd_ais_if() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153904,6 +153980,7 @@ void m68000_device::eor_w_dd_ais_if() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -153967,7 +154044,6 @@ void m68000_device::eor_w_dd_aips_if() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153994,6 +154070,7 @@ void m68000_device::eor_w_dd_aips_if() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154059,7 +154136,6 @@ void m68000_device::eor_w_dd_pais_if() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154086,6 +154162,7 @@ void m68000_device::eor_w_dd_pais_if() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154167,7 +154244,6 @@ void m68000_device::eor_w_dd_das_if() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154194,6 +154270,7 @@ void m68000_device::eor_w_dd_das_if() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154315,7 +154392,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154342,6 +154418,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154422,7 +154499,6 @@ void m68000_device::eor_w_dd_adr16_if() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154449,6 +154525,7 @@ void m68000_device::eor_w_dd_adr16_if() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154551,7 +154628,6 @@ void m68000_device::eor_w_dd_adr32_if() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154578,6 +154654,7 @@ void m68000_device::eor_w_dd_adr32_if() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154611,7 +154688,6 @@ void m68000_device::eor_l_dd_ds_if() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -154644,6 +154720,7 @@ void m68000_device::eor_l_dd_ds_if() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -154708,7 +154785,6 @@ void m68000_device::cmpm_l_aips_aipd_if() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154759,6 +154835,7 @@ void m68000_device::cmpm_l_aips_aipd_if() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154840,7 +154917,6 @@ void m68000_device::eor_l_dd_ais_if() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154890,6 +154966,7 @@ void m68000_device::eor_l_dd_ais_if() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154973,7 +155050,6 @@ void m68000_device::eor_l_dd_aips_if() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155023,6 +155099,7 @@ void m68000_device::eor_l_dd_aips_if() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155107,7 +155184,6 @@ void m68000_device::eor_l_dd_pais_if() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155157,6 +155233,7 @@ void m68000_device::eor_l_dd_pais_if() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155258,7 +155335,6 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155308,6 +155384,7 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155449,7 +155526,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155499,6 +155575,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155603,7 +155680,6 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155653,6 +155729,7 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155779,7 +155856,6 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155829,6 +155905,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155862,7 +155939,6 @@ void m68000_device::cmpa_l_ds_ad_if() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -155892,6 +155968,7 @@ void m68000_device::cmpa_l_ds_ad_if() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155908,7 +155985,6 @@ void m68000_device::cmpa_l_as_ad_if() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -155938,6 +156014,7 @@ void m68000_device::cmpa_l_as_ad_if() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155999,7 +156076,6 @@ void m68000_device::cmpa_l_ais_ad_if() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156029,6 +156105,7 @@ void m68000_device::cmpa_l_ais_ad_if() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156093,7 +156170,6 @@ void m68000_device::cmpa_l_aips_ad_if() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156123,6 +156199,7 @@ void m68000_device::cmpa_l_aips_ad_if() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156188,7 +156265,6 @@ void m68000_device::cmpa_l_pais_ad_if() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156218,6 +156294,7 @@ void m68000_device::cmpa_l_pais_ad_if() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156300,7 +156377,6 @@ void m68000_device::cmpa_l_das_ad_if() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156330,6 +156406,7 @@ void m68000_device::cmpa_l_das_ad_if() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156450,7 +156527,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156480,6 +156556,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156564,7 +156641,6 @@ void m68000_device::cmpa_l_adr16_ad_if() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156594,6 +156670,7 @@ void m68000_device::cmpa_l_adr16_ad_if() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156699,7 +156776,6 @@ void m68000_device::cmpa_l_adr32_ad_if() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156729,6 +156805,7 @@ void m68000_device::cmpa_l_adr32_ad_if() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156810,7 +156887,6 @@ void m68000_device::cmpa_l_dpc_ad_if() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156840,6 +156916,7 @@ void m68000_device::cmpa_l_dpc_ad_if() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156959,7 +157036,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156989,6 +157065,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157049,7 +157126,6 @@ void m68000_device::cmpa_l_imm32_ad_if() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -157079,6 +157155,7 @@ void m68000_device::cmpa_l_imm32_ad_if() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157095,7 +157172,6 @@ void m68000_device::and_b_ds_dd_if() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -157103,6 +157179,7 @@ void m68000_device::and_b_ds_dd_if() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157160,7 +157237,6 @@ void m68000_device::and_b_ais_dd_if() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157168,6 +157244,7 @@ void m68000_device::and_b_ais_dd_if() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157230,7 +157307,6 @@ void m68000_device::and_b_aips_dd_if() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157238,6 +157314,7 @@ void m68000_device::and_b_aips_dd_if() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157302,7 +157379,6 @@ void m68000_device::and_b_pais_dd_if() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157310,6 +157386,7 @@ void m68000_device::and_b_pais_dd_if() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157390,7 +157467,6 @@ void m68000_device::and_b_das_dd_if() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157398,6 +157474,7 @@ void m68000_device::and_b_das_dd_if() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157518,7 +157595,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157526,6 +157602,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157605,7 +157682,6 @@ void m68000_device::and_b_adr16_dd_if() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157613,6 +157689,7 @@ void m68000_device::and_b_adr16_dd_if() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157714,7 +157791,6 @@ void m68000_device::and_b_adr32_dd_if() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157722,6 +157798,7 @@ void m68000_device::and_b_adr32_dd_if() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157801,7 +157878,6 @@ void m68000_device::and_b_dpc_dd_if() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157809,6 +157885,7 @@ void m68000_device::and_b_dpc_dd_if() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157928,7 +158005,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157936,6 +158012,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157995,7 +158072,6 @@ void m68000_device::and_b_imm8_dd_if() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158003,6 +158079,7 @@ void m68000_device::and_b_imm8_dd_if() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158038,7 +158115,6 @@ void m68000_device::and_w_ds_dd_if() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158046,6 +158122,7 @@ void m68000_device::and_w_ds_dd_if() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158106,7 +158183,6 @@ void m68000_device::and_w_ais_dd_if() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158114,6 +158190,7 @@ void m68000_device::and_w_ais_dd_if() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158179,7 +158256,6 @@ void m68000_device::and_w_aips_dd_if() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158187,6 +158263,7 @@ void m68000_device::and_w_aips_dd_if() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158254,7 +158331,6 @@ void m68000_device::and_w_pais_dd_if() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158262,6 +158338,7 @@ void m68000_device::and_w_pais_dd_if() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158345,7 +158422,6 @@ void m68000_device::and_w_das_dd_if() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158353,6 +158429,7 @@ void m68000_device::and_w_das_dd_if() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158476,7 +158553,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158484,6 +158560,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158566,7 +158643,6 @@ void m68000_device::and_w_adr16_dd_if() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158574,6 +158650,7 @@ void m68000_device::and_w_adr16_dd_if() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158678,7 +158755,6 @@ void m68000_device::and_w_adr32_dd_if() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158686,6 +158762,7 @@ void m68000_device::and_w_adr32_dd_if() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158768,7 +158845,6 @@ void m68000_device::and_w_dpc_dd_if() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158776,6 +158852,7 @@ void m68000_device::and_w_dpc_dd_if() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158898,7 +158975,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158906,6 +158982,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158965,7 +159042,6 @@ void m68000_device::and_w_imm16_dd_if() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158973,6 +159049,7 @@ void m68000_device::and_w_imm16_dd_if() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -159008,7 +159085,6 @@ void m68000_device::and_l_ds_dd_if() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159042,6 +159118,7 @@ void m68000_device::and_l_ds_dd_if() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159106,7 +159183,6 @@ void m68000_device::and_l_ais_dd_if() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159137,6 +159213,7 @@ void m68000_device::and_l_ais_dd_if() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159205,7 +159282,6 @@ void m68000_device::and_l_aips_dd_if() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159236,6 +159312,7 @@ void m68000_device::and_l_aips_dd_if() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159305,7 +159382,6 @@ void m68000_device::and_l_pais_dd_if() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159336,6 +159412,7 @@ void m68000_device::and_l_pais_dd_if() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159422,7 +159499,6 @@ void m68000_device::and_l_das_dd_if() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159453,6 +159529,7 @@ void m68000_device::and_l_das_dd_if() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159579,7 +159656,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159610,6 +159686,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159699,7 +159776,6 @@ void m68000_device::and_l_adr16_dd_if() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159730,6 +159806,7 @@ void m68000_device::and_l_adr16_dd_if() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159841,7 +159918,6 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159872,6 +159948,7 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159957,7 +160034,6 @@ void m68000_device::and_l_dpc_dd_if() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159988,6 +160064,7 @@ void m68000_device::and_l_dpc_dd_if() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160113,7 +160190,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160144,6 +160220,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160208,7 +160285,6 @@ void m68000_device::and_l_imm32_dd_if() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160242,6 +160318,7 @@ void m68000_device::and_l_imm32_dd_if() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160260,7 +160337,6 @@ void m68000_device::mulu_w_ds_dd_if() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -160318,6 +160394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160363,7 +160440,6 @@ void m68000_device::mulu_w_ais_dd_if() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160421,6 +160497,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160470,7 +160547,6 @@ void m68000_device::mulu_w_aips_dd_if() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160528,6 +160604,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160579,7 +160656,6 @@ void m68000_device::mulu_w_pais_dd_if() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160637,6 +160713,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160704,7 +160781,6 @@ void m68000_device::mulu_w_das_dd_if() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160762,6 +160838,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160867,7 +160944,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160925,6 +161001,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160991,7 +161068,6 @@ void m68000_device::mulu_w_adr16_dd_if() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161049,6 +161125,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161136,7 +161213,6 @@ void m68000_device::mulu_w_adr32_dd_if() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161194,6 +161270,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161260,7 +161337,6 @@ void m68000_device::mulu_w_dpc_dd_if() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161318,6 +161394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161422,7 +161499,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161480,6 +161556,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161524,7 +161601,6 @@ void m68000_device::mulu_w_imm16_dd_if() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -161582,6 +161658,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161603,7 +161680,6 @@ void m68000_device::abcd_ds_dd_if() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161632,6 +161708,7 @@ void m68000_device::abcd_ds_dd_if() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161676,7 +161753,6 @@ void m68000_device::abcd_pais_paid_if() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -161723,6 +161799,7 @@ void m68000_device::abcd_pais_paid_if() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161772,7 +161849,6 @@ void m68000_device::and_b_dd_ais_if() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -161799,6 +161875,7 @@ void m68000_device::and_b_dd_ais_if() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161854,7 +161931,6 @@ void m68000_device::and_b_dd_aips_if() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -161881,6 +161957,7 @@ void m68000_device::and_b_dd_aips_if() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161938,7 +162015,6 @@ void m68000_device::and_b_dd_pais_if() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -161965,6 +162041,7 @@ void m68000_device::and_b_dd_pais_if() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162038,7 +162115,6 @@ void m68000_device::and_b_dd_das_if() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162065,6 +162141,7 @@ void m68000_device::and_b_dd_das_if() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162178,7 +162255,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162205,6 +162281,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162277,7 +162354,6 @@ void m68000_device::and_b_dd_adr16_if() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162304,6 +162380,7 @@ void m68000_device::and_b_dd_adr16_if() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162398,7 +162475,6 @@ void m68000_device::and_b_dd_adr32_if() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162425,6 +162501,7 @@ void m68000_device::and_b_dd_adr32_if() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162453,7 +162530,6 @@ void m68000_device::exg_dd_ds_if() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162481,6 +162557,7 @@ void m68000_device::exg_dd_ds_if() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162497,7 +162574,6 @@ void m68000_device::exg_ad_as_if() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162525,6 +162601,7 @@ void m68000_device::exg_ad_as_if() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162566,7 +162643,6 @@ void m68000_device::and_w_dd_ais_if() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162593,6 +162669,7 @@ void m68000_device::and_w_dd_ais_if() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -162656,7 +162733,6 @@ void m68000_device::and_w_dd_aips_if() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162683,6 +162759,7 @@ void m68000_device::and_w_dd_aips_if() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -162748,7 +162825,6 @@ void m68000_device::and_w_dd_pais_if() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162775,6 +162851,7 @@ void m68000_device::and_w_dd_pais_if() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -162856,7 +162933,6 @@ void m68000_device::and_w_dd_das_if() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162883,6 +162959,7 @@ void m68000_device::and_w_dd_das_if() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163004,7 +163081,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163031,6 +163107,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163111,7 +163188,6 @@ void m68000_device::and_w_dd_adr16_if() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163138,6 +163214,7 @@ void m68000_device::and_w_dd_adr16_if() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163240,7 +163317,6 @@ void m68000_device::and_w_dd_adr32_if() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163267,6 +163343,7 @@ void m68000_device::and_w_dd_adr32_if() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163300,7 +163377,6 @@ void m68000_device::exg_dd_as_if() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -163328,6 +163404,7 @@ void m68000_device::exg_dd_as_if() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -163390,7 +163467,6 @@ void m68000_device::and_l_dd_ais_if() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163440,6 +163516,7 @@ void m68000_device::and_l_dd_ais_if() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163523,7 +163600,6 @@ void m68000_device::and_l_dd_aips_if() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163573,6 +163649,7 @@ void m68000_device::and_l_dd_aips_if() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163657,7 +163734,6 @@ void m68000_device::and_l_dd_pais_if() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163707,6 +163783,7 @@ void m68000_device::and_l_dd_pais_if() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163808,7 +163885,6 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163858,6 +163934,7 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163999,7 +164076,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -164049,6 +164125,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -164153,7 +164230,6 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -164203,6 +164279,7 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -164329,7 +164406,6 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -164379,6 +164455,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -164412,7 +164489,6 @@ void m68000_device::muls_w_ds_dd_if() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -164472,6 +164548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164524,7 +164601,6 @@ void m68000_device::muls_w_ais_dd_if() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164584,6 +164660,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164640,7 +164717,6 @@ void m68000_device::muls_w_aips_dd_if() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164700,6 +164776,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164758,7 +164835,6 @@ void m68000_device::muls_w_pais_dd_if() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164818,6 +164894,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164892,7 +164969,6 @@ void m68000_device::muls_w_das_dd_if() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164952,6 +165028,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165064,7 +165141,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165124,6 +165200,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165197,7 +165274,6 @@ void m68000_device::muls_w_adr16_dd_if() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165257,6 +165333,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165351,7 +165428,6 @@ void m68000_device::muls_w_adr32_dd_if() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165411,6 +165487,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165484,7 +165561,6 @@ void m68000_device::muls_w_dpc_dd_if() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165544,6 +165620,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165655,7 +165732,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165715,6 +165791,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165766,7 +165843,6 @@ void m68000_device::muls_w_imm16_dd_if() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -165826,6 +165902,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165854,7 +165931,6 @@ void m68000_device::add_b_ds_dd_if() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165862,6 +165938,7 @@ void m68000_device::add_b_ds_dd_if() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -165917,7 +165994,6 @@ void m68000_device::add_b_ais_dd_if() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165925,6 +166001,7 @@ void m68000_device::add_b_ais_dd_if() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -165984,7 +166061,6 @@ void m68000_device::add_b_aips_dd_if() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165992,6 +166068,7 @@ void m68000_device::add_b_aips_dd_if() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166053,7 +166130,6 @@ void m68000_device::add_b_pais_dd_if() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166061,6 +166137,7 @@ void m68000_device::add_b_pais_dd_if() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166138,7 +166215,6 @@ void m68000_device::add_b_das_dd_if() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166146,6 +166222,7 @@ void m68000_device::add_b_das_dd_if() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166261,7 +166338,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166269,6 +166345,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166345,7 +166422,6 @@ void m68000_device::add_b_adr16_dd_if() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166353,6 +166429,7 @@ void m68000_device::add_b_adr16_dd_if() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166450,7 +166527,6 @@ void m68000_device::add_b_adr32_dd_if() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166458,6 +166534,7 @@ void m68000_device::add_b_adr32_dd_if() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166534,7 +166611,6 @@ void m68000_device::add_b_dpc_dd_if() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166542,6 +166618,7 @@ void m68000_device::add_b_dpc_dd_if() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166656,7 +166733,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166664,6 +166740,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166721,7 +166798,6 @@ void m68000_device::add_b_imm8_dd_if() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -166729,6 +166805,7 @@ void m68000_device::add_b_imm8_dd_if() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166763,7 +166840,6 @@ void m68000_device::add_w_ds_dd_if() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -166771,6 +166847,7 @@ void m68000_device::add_w_ds_dd_if() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166805,7 +166882,6 @@ void m68000_device::add_w_as_dd_if() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -166813,6 +166889,7 @@ void m68000_device::add_w_as_dd_if() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166871,7 +166948,6 @@ void m68000_device::add_w_ais_dd_if() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166879,6 +166955,7 @@ void m68000_device::add_w_ais_dd_if() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166941,7 +167018,6 @@ void m68000_device::add_w_aips_dd_if() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166949,6 +167025,7 @@ void m68000_device::add_w_aips_dd_if() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167013,7 +167090,6 @@ void m68000_device::add_w_pais_dd_if() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167021,6 +167097,7 @@ void m68000_device::add_w_pais_dd_if() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167101,7 +167178,6 @@ void m68000_device::add_w_das_dd_if() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167109,6 +167185,7 @@ void m68000_device::add_w_das_dd_if() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167227,7 +167304,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167235,6 +167311,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167314,7 +167391,6 @@ void m68000_device::add_w_adr16_dd_if() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167322,6 +167398,7 @@ void m68000_device::add_w_adr16_dd_if() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167422,7 +167499,6 @@ void m68000_device::add_w_adr32_dd_if() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167430,6 +167506,7 @@ void m68000_device::add_w_adr32_dd_if() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167509,7 +167586,6 @@ void m68000_device::add_w_dpc_dd_if() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167517,6 +167593,7 @@ void m68000_device::add_w_dpc_dd_if() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167634,7 +167711,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167642,6 +167718,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167699,7 +167776,6 @@ void m68000_device::add_w_imm16_dd_if() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -167707,6 +167783,7 @@ void m68000_device::add_w_imm16_dd_if() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167741,7 +167818,6 @@ void m68000_device::add_l_ds_dd_if() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -167774,6 +167850,7 @@ void m68000_device::add_l_ds_dd_if() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167791,7 +167868,6 @@ void m68000_device::add_l_as_dd_if() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -167824,6 +167900,7 @@ void m68000_device::add_l_as_dd_if() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167886,7 +167963,6 @@ void m68000_device::add_l_ais_dd_if() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167917,6 +167993,7 @@ void m68000_device::add_l_ais_dd_if() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167982,7 +168059,6 @@ void m68000_device::add_l_aips_dd_if() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168013,6 +168089,7 @@ void m68000_device::add_l_aips_dd_if() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168079,7 +168156,6 @@ void m68000_device::add_l_pais_dd_if() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168110,6 +168186,7 @@ void m68000_device::add_l_pais_dd_if() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168193,7 +168270,6 @@ void m68000_device::add_l_das_dd_if() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168224,6 +168300,7 @@ void m68000_device::add_l_das_dd_if() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168345,7 +168422,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168376,6 +168452,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168461,7 +168538,6 @@ void m68000_device::add_l_adr16_dd_if() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168492,6 +168568,7 @@ void m68000_device::add_l_adr16_dd_if() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168598,7 +168675,6 @@ void m68000_device::add_l_adr32_dd_if() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168629,6 +168705,7 @@ void m68000_device::add_l_adr32_dd_if() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168711,7 +168788,6 @@ void m68000_device::add_l_dpc_dd_if() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168742,6 +168818,7 @@ void m68000_device::add_l_dpc_dd_if() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168862,7 +168939,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168893,6 +168969,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168954,7 +169031,6 @@ void m68000_device::add_l_imm32_dd_if() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -168987,6 +169063,7 @@ void m68000_device::add_l_imm32_dd_if() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169004,7 +169081,6 @@ void m68000_device::adda_w_ds_ad_if() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -169035,6 +169111,7 @@ void m68000_device::adda_w_ds_ad_if() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169052,7 +169129,6 @@ void m68000_device::adda_w_as_ad_if() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -169083,6 +169159,7 @@ void m68000_device::adda_w_as_ad_if() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169124,7 +169201,6 @@ void m68000_device::adda_w_ais_ad_if() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169155,6 +169231,7 @@ void m68000_device::adda_w_ais_ad_if() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169200,7 +169277,6 @@ void m68000_device::adda_w_aips_ad_if() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169231,6 +169307,7 @@ void m68000_device::adda_w_aips_ad_if() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169278,7 +169355,6 @@ void m68000_device::adda_w_pais_ad_if() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169309,6 +169385,7 @@ void m68000_device::adda_w_pais_ad_if() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169372,7 +169449,6 @@ void m68000_device::adda_w_das_ad_if() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169403,6 +169479,7 @@ void m68000_device::adda_w_das_ad_if() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169504,7 +169581,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169535,6 +169611,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169597,7 +169674,6 @@ void m68000_device::adda_w_adr16_ad_if() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169628,6 +169704,7 @@ void m68000_device::adda_w_adr16_ad_if() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169711,7 +169788,6 @@ void m68000_device::adda_w_adr32_ad_if() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169742,6 +169818,7 @@ void m68000_device::adda_w_adr32_ad_if() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169804,7 +169881,6 @@ void m68000_device::adda_w_dpc_ad_if() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169835,6 +169911,7 @@ void m68000_device::adda_w_dpc_ad_if() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169935,7 +170012,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169966,6 +170042,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170006,7 +170083,6 @@ void m68000_device::adda_w_imm16_ad_if() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -170037,6 +170113,7 @@ void m68000_device::adda_w_imm16_ad_if() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170054,7 +170131,6 @@ void m68000_device::addx_b_ds_dd_if() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170062,6 +170138,7 @@ void m68000_device::addx_b_ds_dd_if() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170126,7 +170203,6 @@ void m68000_device::addx_b_pais_paid_if() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -170172,6 +170248,7 @@ void m68000_device::addx_b_pais_paid_if() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170221,7 +170298,6 @@ void m68000_device::add_b_dd_ais_if() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170248,6 +170324,7 @@ void m68000_device::add_b_dd_ais_if() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170300,7 +170377,6 @@ void m68000_device::add_b_dd_aips_if() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170327,6 +170403,7 @@ void m68000_device::add_b_dd_aips_if() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170381,7 +170458,6 @@ void m68000_device::add_b_dd_pais_if() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170408,6 +170484,7 @@ void m68000_device::add_b_dd_pais_if() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170478,7 +170555,6 @@ void m68000_device::add_b_dd_das_if() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170505,6 +170581,7 @@ void m68000_device::add_b_dd_das_if() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170613,7 +170690,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170640,6 +170716,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170709,7 +170786,6 @@ void m68000_device::add_b_dd_adr16_if() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170736,6 +170812,7 @@ void m68000_device::add_b_dd_adr16_if() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170826,7 +170903,6 @@ void m68000_device::add_b_dd_adr32_if() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170853,6 +170929,7 @@ void m68000_device::add_b_dd_adr32_if() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170880,7 +170957,6 @@ void m68000_device::addx_w_ds_dd_if() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170888,6 +170964,7 @@ void m68000_device::addx_w_ds_dd_if() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170955,7 +171032,6 @@ void m68000_device::addx_w_pais_paid_if() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171004,6 +171080,7 @@ void m68000_device::addx_w_pais_paid_if() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171061,7 +171138,6 @@ void m68000_device::add_w_dd_ais_if() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171088,6 +171164,7 @@ void m68000_device::add_w_dd_ais_if() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171148,7 +171225,6 @@ void m68000_device::add_w_dd_aips_if() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171175,6 +171251,7 @@ void m68000_device::add_w_dd_aips_if() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171237,7 +171314,6 @@ void m68000_device::add_w_dd_pais_if() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171264,6 +171340,7 @@ void m68000_device::add_w_dd_pais_if() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171342,7 +171419,6 @@ void m68000_device::add_w_dd_das_if() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171369,6 +171445,7 @@ void m68000_device::add_w_dd_das_if() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171485,7 +171562,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171512,6 +171588,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171589,7 +171666,6 @@ void m68000_device::add_w_dd_adr16_if() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171616,6 +171692,7 @@ void m68000_device::add_w_dd_adr16_if() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171714,7 +171791,6 @@ void m68000_device::add_w_dd_adr32_if() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171741,6 +171817,7 @@ void m68000_device::add_w_dd_adr32_if() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171773,7 +171850,6 @@ void m68000_device::addx_l_ds_dd_if() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -171807,6 +171883,7 @@ void m68000_device::addx_l_ds_dd_if() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -171926,7 +172003,6 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171973,6 +172049,7 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172051,7 +172128,6 @@ void m68000_device::add_l_dd_ais_if() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172101,6 +172177,7 @@ void m68000_device::add_l_dd_ais_if() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172181,7 +172258,6 @@ void m68000_device::add_l_dd_aips_if() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172231,6 +172307,7 @@ void m68000_device::add_l_dd_aips_if() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172312,7 +172389,6 @@ void m68000_device::add_l_dd_pais_if() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172362,6 +172438,7 @@ void m68000_device::add_l_dd_pais_if() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172460,7 +172537,6 @@ void m68000_device::add_l_dd_das_if() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172510,6 +172586,7 @@ void m68000_device::add_l_dd_das_if() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172646,7 +172723,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172696,6 +172772,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172796,7 +172873,6 @@ void m68000_device::add_l_dd_adr16_if() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172846,6 +172922,7 @@ void m68000_device::add_l_dd_adr16_if() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172967,7 +173044,6 @@ void m68000_device::add_l_dd_adr32_if() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -173017,6 +173093,7 @@ void m68000_device::add_l_dd_adr32_if() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -173049,7 +173126,6 @@ void m68000_device::adda_l_ds_ad_if() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -173080,6 +173156,7 @@ void m68000_device::adda_l_ds_ad_if() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173097,7 +173174,6 @@ void m68000_device::adda_l_as_ad_if() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -173128,6 +173204,7 @@ void m68000_device::adda_l_as_ad_if() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173190,7 +173267,6 @@ void m68000_device::adda_l_ais_ad_if() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173219,6 +173295,7 @@ void m68000_device::adda_l_ais_ad_if() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173284,7 +173361,6 @@ void m68000_device::adda_l_aips_ad_if() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173313,6 +173389,7 @@ void m68000_device::adda_l_aips_ad_if() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173379,7 +173456,6 @@ void m68000_device::adda_l_pais_ad_if() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173408,6 +173484,7 @@ void m68000_device::adda_l_pais_ad_if() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173491,7 +173568,6 @@ void m68000_device::adda_l_das_ad_if() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173520,6 +173596,7 @@ void m68000_device::adda_l_das_ad_if() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173641,7 +173718,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173670,6 +173746,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173755,7 +173832,6 @@ void m68000_device::adda_l_adr16_ad_if() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173784,6 +173860,7 @@ void m68000_device::adda_l_adr16_ad_if() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173890,7 +173967,6 @@ void m68000_device::adda_l_adr32_ad_if() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173919,6 +173995,7 @@ void m68000_device::adda_l_adr32_ad_if() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174001,7 +174078,6 @@ void m68000_device::adda_l_dpc_ad_if() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174030,6 +174106,7 @@ void m68000_device::adda_l_dpc_ad_if() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174150,7 +174227,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174179,6 +174255,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174240,7 +174317,6 @@ void m68000_device::adda_l_imm32_ad_if() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -174271,6 +174347,7 @@ void m68000_device::adda_l_imm32_ad_if() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174287,7 +174364,6 @@ void m68000_device::asr_b_imm3_ds_if() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174336,6 +174412,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174352,7 +174429,6 @@ void m68000_device::lsr_b_imm3_ds_if() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174401,6 +174477,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174417,7 +174494,6 @@ void m68000_device::roxr_b_imm3_ds_if() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174466,6 +174542,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174482,7 +174559,6 @@ void m68000_device::ror_b_imm3_ds_if() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174531,6 +174607,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174548,7 +174625,6 @@ void m68000_device::asr_b_dd_ds_if() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174597,6 +174673,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174614,7 +174691,6 @@ void m68000_device::lsr_b_dd_ds_if() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174663,6 +174739,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174680,7 +174757,6 @@ void m68000_device::roxr_b_dd_ds_if() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174729,6 +174805,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174746,7 +174823,6 @@ void m68000_device::ror_b_dd_ds_if() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174795,6 +174871,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174811,7 +174888,6 @@ void m68000_device::asr_w_imm3_ds_if() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174860,6 +174936,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174876,7 +174953,6 @@ void m68000_device::lsr_w_imm3_ds_if() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174925,6 +175001,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174941,7 +175018,6 @@ void m68000_device::roxr_w_imm3_ds_if() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174990,6 +175066,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175006,7 +175083,6 @@ void m68000_device::ror_w_imm3_ds_if() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175055,6 +175131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175072,7 +175149,6 @@ void m68000_device::asr_w_dd_ds_if() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175121,6 +175197,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175138,7 +175215,6 @@ void m68000_device::lsr_w_dd_ds_if() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175187,6 +175263,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175204,7 +175281,6 @@ void m68000_device::roxr_w_dd_ds_if() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175253,6 +175329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175270,7 +175347,6 @@ void m68000_device::ror_w_dd_ds_if() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175319,6 +175395,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175335,7 +175412,6 @@ void m68000_device::asr_l_imm3_ds_if() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175388,6 +175464,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175406,7 +175483,6 @@ void m68000_device::lsr_l_imm3_ds_if() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175459,6 +175535,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175477,7 +175554,6 @@ void m68000_device::roxr_l_imm3_ds_if() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175530,6 +175606,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175548,7 +175625,6 @@ void m68000_device::ror_l_imm3_ds_if() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175601,6 +175677,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175620,7 +175697,6 @@ void m68000_device::asr_l_dd_ds_if() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175673,6 +175749,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175692,7 +175769,6 @@ void m68000_device::lsr_l_dd_ds_if() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175745,6 +175821,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175764,7 +175841,6 @@ void m68000_device::roxr_l_dd_ds_if() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175817,6 +175893,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175836,7 +175913,6 @@ void m68000_device::ror_l_dd_ds_if() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175889,6 +175965,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175932,7 +176009,6 @@ void m68000_device::asr_ais_if() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -175964,6 +176040,7 @@ void m68000_device::asr_ais_if() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176024,7 +176101,6 @@ void m68000_device::asr_aips_if() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176056,6 +176132,7 @@ void m68000_device::asr_aips_if() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176118,7 +176195,6 @@ void m68000_device::asr_pais_if() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176150,6 +176226,7 @@ void m68000_device::asr_pais_if() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176228,7 +176305,6 @@ void m68000_device::asr_das_if() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176260,6 +176336,7 @@ void m68000_device::asr_das_if() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176376,7 +176453,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176408,6 +176484,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176485,7 +176562,6 @@ void m68000_device::asr_adr16_if() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176517,6 +176593,7 @@ void m68000_device::asr_adr16_if() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176615,7 +176692,6 @@ void m68000_device::asr_adr32_if() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176647,6 +176723,7 @@ void m68000_device::asr_adr32_if() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176678,7 +176755,6 @@ void m68000_device::asl_b_imm3_ds_if() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176727,6 +176803,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176743,7 +176820,6 @@ void m68000_device::lsl_b_imm3_ds_if() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176792,6 +176868,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -176809,7 +176886,6 @@ void m68000_device::roxl_b_imm3_ds_if() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -176858,6 +176934,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176874,7 +176951,6 @@ void m68000_device::rol_b_imm3_ds_if() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176923,6 +176999,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176940,7 +177017,6 @@ void m68000_device::asl_b_dd_ds_if() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176989,6 +177065,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177006,7 +177083,6 @@ void m68000_device::lsl_b_dd_ds_if() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177055,6 +177131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -177073,7 +177150,6 @@ void m68000_device::roxl_b_dd_ds_if() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177122,6 +177198,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177139,7 +177216,6 @@ void m68000_device::rol_b_dd_ds_if() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177188,6 +177264,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177204,7 +177281,6 @@ void m68000_device::asl_w_imm3_ds_if() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177253,6 +177329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177269,7 +177346,6 @@ void m68000_device::lsl_w_imm3_ds_if() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177318,6 +177394,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177335,7 +177412,6 @@ void m68000_device::roxl_w_imm3_ds_if() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177384,6 +177460,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177400,7 +177477,6 @@ void m68000_device::rol_w_imm3_ds_if() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177449,6 +177525,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177466,7 +177543,6 @@ void m68000_device::asl_w_dd_ds_if() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177515,6 +177591,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177532,7 +177609,6 @@ void m68000_device::lsl_w_dd_ds_if() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177581,6 +177657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177599,7 +177676,6 @@ void m68000_device::roxl_w_dd_ds_if() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177648,6 +177724,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177665,7 +177742,6 @@ void m68000_device::rol_w_dd_ds_if() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177714,6 +177790,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177730,7 +177807,6 @@ void m68000_device::asl_l_imm3_ds_if() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177783,6 +177859,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177801,7 +177878,6 @@ void m68000_device::lsl_l_imm3_ds_if() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177856,6 +177932,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177874,7 +177951,6 @@ void m68000_device::roxl_l_imm3_ds_if() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177927,6 +178003,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -177945,7 +178022,6 @@ void m68000_device::rol_l_imm3_ds_if() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177998,6 +178074,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178017,7 +178094,6 @@ void m68000_device::asl_l_dd_ds_if() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178070,6 +178146,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178089,7 +178166,6 @@ void m68000_device::lsl_l_dd_ds_if() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178144,6 +178220,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178163,7 +178240,6 @@ void m68000_device::roxl_l_dd_ds_if() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -178216,6 +178292,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -178235,7 +178312,6 @@ void m68000_device::rol_l_dd_ds_if() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178288,6 +178364,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178331,7 +178408,6 @@ void m68000_device::asl_ais_if() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178363,6 +178439,7 @@ void m68000_device::asl_ais_if() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178423,7 +178500,6 @@ void m68000_device::asl_aips_if() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178455,6 +178531,7 @@ void m68000_device::asl_aips_if() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178517,7 +178594,6 @@ void m68000_device::asl_pais_if() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178549,6 +178625,7 @@ void m68000_device::asl_pais_if() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178627,7 +178704,6 @@ void m68000_device::asl_das_if() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178659,6 +178735,7 @@ void m68000_device::asl_das_if() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178775,7 +178852,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178807,6 +178883,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178884,7 +178961,6 @@ void m68000_device::asl_adr16_if() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178916,6 +178992,7 @@ void m68000_device::asl_adr16_if() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179014,7 +179091,6 @@ void m68000_device::asl_adr32_if() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179046,6 +179122,7 @@ void m68000_device::asl_adr32_if() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179102,7 +179179,6 @@ void m68000_device::lsr_ais_if() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179134,6 +179210,7 @@ void m68000_device::lsr_ais_if() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179194,7 +179271,6 @@ void m68000_device::lsr_aips_if() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179226,6 +179302,7 @@ void m68000_device::lsr_aips_if() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179288,7 +179365,6 @@ void m68000_device::lsr_pais_if() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179320,6 +179396,7 @@ void m68000_device::lsr_pais_if() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179398,7 +179475,6 @@ void m68000_device::lsr_das_if() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179430,6 +179506,7 @@ void m68000_device::lsr_das_if() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179546,7 +179623,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179578,6 +179654,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179655,7 +179732,6 @@ void m68000_device::lsr_adr16_if() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179687,6 +179763,7 @@ void m68000_device::lsr_adr16_if() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179785,7 +179862,6 @@ void m68000_device::lsr_adr32_if() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179817,6 +179893,7 @@ void m68000_device::lsr_adr32_if() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179874,7 +179951,6 @@ void m68000_device::lsl_ais_if() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179906,6 +179982,7 @@ void m68000_device::lsl_ais_if() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179969,7 +180046,6 @@ void m68000_device::lsl_aips_if() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180001,6 +180077,7 @@ void m68000_device::lsl_aips_if() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180066,7 +180143,6 @@ void m68000_device::lsl_pais_if() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180098,6 +180174,7 @@ void m68000_device::lsl_pais_if() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180179,7 +180256,6 @@ void m68000_device::lsl_das_if() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180211,6 +180287,7 @@ void m68000_device::lsl_das_if() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180332,7 +180409,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180364,6 +180440,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180444,7 +180521,6 @@ void m68000_device::lsl_adr16_if() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180476,6 +180552,7 @@ void m68000_device::lsl_adr16_if() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180578,7 +180655,6 @@ void m68000_device::lsl_adr32_if() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180610,6 +180686,7 @@ void m68000_device::lsl_adr32_if() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180667,7 +180744,6 @@ void m68000_device::roxr_ais_if() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180699,6 +180775,7 @@ void m68000_device::roxr_ais_if() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180759,7 +180836,6 @@ void m68000_device::roxr_aips_if() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180791,6 +180867,7 @@ void m68000_device::roxr_aips_if() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180853,7 +180930,6 @@ void m68000_device::roxr_pais_if() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180885,6 +180961,7 @@ void m68000_device::roxr_pais_if() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180963,7 +181040,6 @@ void m68000_device::roxr_das_if() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180995,6 +181071,7 @@ void m68000_device::roxr_das_if() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181111,7 +181188,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181143,6 +181219,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181220,7 +181297,6 @@ void m68000_device::roxr_adr16_if() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181252,6 +181328,7 @@ void m68000_device::roxr_adr16_if() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181350,7 +181427,6 @@ void m68000_device::roxr_adr32_if() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181382,6 +181458,7 @@ void m68000_device::roxr_adr32_if() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181438,7 +181515,6 @@ void m68000_device::roxl_ais_if() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181470,6 +181546,7 @@ void m68000_device::roxl_ais_if() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181530,7 +181607,6 @@ void m68000_device::roxl_aips_if() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181562,6 +181638,7 @@ void m68000_device::roxl_aips_if() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181624,7 +181701,6 @@ void m68000_device::roxl_pais_if() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181656,6 +181732,7 @@ void m68000_device::roxl_pais_if() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181734,7 +181811,6 @@ void m68000_device::roxl_das_if() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181766,6 +181842,7 @@ void m68000_device::roxl_das_if() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181882,7 +181959,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181914,6 +181990,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181991,7 +182068,6 @@ void m68000_device::roxl_adr16_if() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182023,6 +182099,7 @@ void m68000_device::roxl_adr16_if() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182121,7 +182198,6 @@ void m68000_device::roxl_adr32_if() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182153,6 +182229,7 @@ void m68000_device::roxl_adr32_if() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182209,7 +182286,6 @@ void m68000_device::ror_ais_if() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182241,6 +182317,7 @@ void m68000_device::ror_ais_if() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182301,7 +182378,6 @@ void m68000_device::ror_aips_if() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182333,6 +182409,7 @@ void m68000_device::ror_aips_if() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182395,7 +182472,6 @@ void m68000_device::ror_pais_if() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182427,6 +182503,7 @@ void m68000_device::ror_pais_if() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182505,7 +182582,6 @@ void m68000_device::ror_das_if() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182537,6 +182613,7 @@ void m68000_device::ror_das_if() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182653,7 +182730,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182685,6 +182761,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182762,7 +182839,6 @@ void m68000_device::ror_adr16_if() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182794,6 +182870,7 @@ void m68000_device::ror_adr16_if() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182892,7 +182969,6 @@ void m68000_device::ror_adr32_if() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182924,6 +183000,7 @@ void m68000_device::ror_adr32_if() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182980,7 +183057,6 @@ void m68000_device::rol_ais_if() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183012,6 +183088,7 @@ void m68000_device::rol_ais_if() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183072,7 +183149,6 @@ void m68000_device::rol_aips_if() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183104,6 +183180,7 @@ void m68000_device::rol_aips_if() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183166,7 +183243,6 @@ void m68000_device::rol_pais_if() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183198,6 +183274,7 @@ void m68000_device::rol_pais_if() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183276,7 +183353,6 @@ void m68000_device::rol_das_if() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183308,6 +183384,7 @@ void m68000_device::rol_das_if() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183424,7 +183501,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183456,6 +183532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183533,7 +183610,6 @@ void m68000_device::rol_adr16_if() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183565,6 +183641,7 @@ void m68000_device::rol_adr16_if() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183663,7 +183740,6 @@ void m68000_device::rol_adr32_if() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183695,6 +183771,7 @@ void m68000_device::rol_adr32_if() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); diff --git a/src/devices/cpu/m68000/m68000-sifm.cpp b/src/devices/cpu/m68000/m68000-sifm.cpp index 227f287ae64..db17f021bd7 100644 --- a/src/devices/cpu/m68000/m68000-sifm.cpp +++ b/src/devices/cpu/m68000/m68000-sifm.cpp @@ -10,6 +10,7 @@ void m68000_device::state_reset_ifm() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -139,11 +140,11 @@ void m68000_device::state_reset_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -258,6 +259,7 @@ void m68000_device::state_bus_error_ifm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -416,11 +418,11 @@ void m68000_device::state_bus_error_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -535,6 +537,7 @@ void m68000_device::state_address_error_ifm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -693,11 +696,11 @@ void m68000_device::state_address_error_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -796,10 +799,10 @@ void m68000_device::state_interrupt_ifm() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -918,11 +921,11 @@ void m68000_device::state_interrupt_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1101,11 +1104,11 @@ void m68000_device::state_trace_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1284,11 +1287,11 @@ void m68000_device::state_illegal_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1467,11 +1470,11 @@ void m68000_device::state_priviledge_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1650,11 +1653,11 @@ void m68000_device::state_linea_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1833,11 +1836,11 @@ void m68000_device::state_linef_ifm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1893,13 +1896,13 @@ void m68000_device::ori_b_imm8_ds_ifm() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -1980,7 +1983,6 @@ void m68000_device::ori_b_imm8_ais_ifm() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2007,6 +2009,7 @@ void m68000_device::ori_b_imm8_ais_ifm() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2085,7 +2088,6 @@ void m68000_device::ori_b_imm8_aips_ifm() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2112,6 +2114,7 @@ void m68000_device::ori_b_imm8_aips_ifm() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2192,7 +2195,6 @@ void m68000_device::ori_b_imm8_pais_ifm() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2219,6 +2221,7 @@ void m68000_device::ori_b_imm8_pais_ifm() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2315,7 +2318,6 @@ void m68000_device::ori_b_imm8_das_ifm() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2342,6 +2344,7 @@ void m68000_device::ori_b_imm8_das_ifm() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2478,7 +2481,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2505,6 +2507,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2600,7 +2603,6 @@ void m68000_device::ori_b_imm8_adr16_ifm() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2627,6 +2629,7 @@ void m68000_device::ori_b_imm8_adr16_ifm() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2744,7 +2747,6 @@ void m68000_device::ori_b_imm8_adr32_ifm() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2771,6 +2773,7 @@ void m68000_device::ori_b_imm8_adr32_ifm() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -2865,12 +2868,12 @@ void m68000_device::ori_imm8_ccr_ifm() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -2927,13 +2930,13 @@ void m68000_device::ori_w_imm16_ds_ifm() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3017,7 +3020,6 @@ void m68000_device::ori_w_imm16_ais_ifm() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3044,6 +3046,7 @@ void m68000_device::ori_w_imm16_ais_ifm() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3130,7 +3133,6 @@ void m68000_device::ori_w_imm16_aips_ifm() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3157,6 +3159,7 @@ void m68000_device::ori_w_imm16_aips_ifm() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3245,7 +3248,6 @@ void m68000_device::ori_w_imm16_pais_ifm() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3272,6 +3274,7 @@ void m68000_device::ori_w_imm16_pais_ifm() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3376,7 +3379,6 @@ void m68000_device::ori_w_imm16_das_ifm() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3403,6 +3405,7 @@ void m68000_device::ori_w_imm16_das_ifm() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3547,7 +3550,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3574,6 +3576,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3677,7 +3680,6 @@ void m68000_device::ori_w_imm16_adr16_ifm() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3704,6 +3706,7 @@ void m68000_device::ori_w_imm16_adr16_ifm() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3829,7 +3832,6 @@ void m68000_device::ori_w_imm16_adr32_ifm() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -3856,6 +3858,7 @@ void m68000_device::ori_w_imm16_adr32_ifm() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -3961,12 +3964,12 @@ void m68000_device::ori_i16u_sr_ifm() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4045,7 +4048,6 @@ void m68000_device::ori_l_imm32_ds_ifm() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4078,6 +4080,7 @@ void m68000_device::ori_l_imm32_ds_ifm() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4187,7 +4190,6 @@ void m68000_device::ori_l_imm32_ais_ifm() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4237,6 +4239,7 @@ void m68000_device::ori_l_imm32_ais_ifm() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4365,7 +4368,6 @@ void m68000_device::ori_l_imm32_aips_ifm() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4415,6 +4417,7 @@ void m68000_device::ori_l_imm32_aips_ifm() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4544,7 +4547,6 @@ void m68000_device::ori_l_imm32_pais_ifm() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4594,6 +4596,7 @@ void m68000_device::ori_l_imm32_pais_ifm() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4740,7 +4743,6 @@ void m68000_device::ori_l_imm32_das_ifm() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -4790,6 +4792,7 @@ void m68000_device::ori_l_imm32_das_ifm() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -4976,7 +4979,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5026,6 +5028,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -5175,7 +5178,6 @@ void m68000_device::ori_l_imm32_adr16_ifm() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5225,6 +5227,7 @@ void m68000_device::ori_l_imm32_adr16_ifm() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -5396,7 +5399,6 @@ void m68000_device::ori_l_imm32_adr32_ifm() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5446,6 +5448,7 @@ void m68000_device::ori_l_imm32_adr32_ifm() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -5479,7 +5482,6 @@ void m68000_device::btst_dd_ds_ifm() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -5517,6 +5519,7 @@ void m68000_device::btst_dd_ds_ifm() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -5530,6 +5533,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -5588,7 +5592,6 @@ void m68000_device::movep_w_das_dd_ifm() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -5608,6 +5611,7 @@ void m68000_device::movep_w_das_dd_ifm() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5666,7 +5670,6 @@ void m68000_device::btst_dd_ais_ifm() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5674,6 +5677,7 @@ void m68000_device::btst_dd_ais_ifm() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5734,7 +5738,6 @@ void m68000_device::btst_dd_aips_ifm() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5742,6 +5745,7 @@ void m68000_device::btst_dd_aips_ifm() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5804,7 +5808,6 @@ void m68000_device::btst_dd_pais_ifm() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5812,6 +5815,7 @@ void m68000_device::btst_dd_pais_ifm() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -5890,7 +5894,6 @@ void m68000_device::btst_dd_das_ifm() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -5898,6 +5901,7 @@ void m68000_device::btst_dd_das_ifm() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6016,7 +6020,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6024,6 +6027,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6101,7 +6105,6 @@ void m68000_device::btst_dd_adr16_ifm() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6109,6 +6112,7 @@ void m68000_device::btst_dd_adr16_ifm() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6208,7 +6212,6 @@ void m68000_device::btst_dd_adr32_ifm() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6216,6 +6219,7 @@ void m68000_device::btst_dd_adr32_ifm() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6293,7 +6297,6 @@ void m68000_device::btst_dd_dpc_ifm() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6301,6 +6304,7 @@ void m68000_device::btst_dd_dpc_ifm() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6418,7 +6422,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6426,6 +6429,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6483,7 +6487,6 @@ void m68000_device::btst_dd_imm_ifm() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -6519,6 +6522,7 @@ void m68000_device::btst_dd_imm_ifm() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -6532,6 +6536,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -6550,7 +6555,6 @@ void m68000_device::bchg_dd_ds_ifm() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6588,6 +6592,7 @@ void m68000_device::bchg_dd_ds_ifm() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6606,6 +6611,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6702,7 +6708,6 @@ void m68000_device::movep_l_das_dd_ifm() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -6722,6 +6727,7 @@ void m68000_device::movep_l_das_dd_ifm() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6780,7 +6786,6 @@ void m68000_device::bchg_dd_ais_ifm() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6807,6 +6812,7 @@ void m68000_device::bchg_dd_ais_ifm() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6863,7 +6869,6 @@ void m68000_device::bchg_dd_aips_ifm() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6890,6 +6895,7 @@ void m68000_device::bchg_dd_aips_ifm() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -6948,7 +6954,6 @@ void m68000_device::bchg_dd_pais_ifm() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -6975,6 +6980,7 @@ void m68000_device::bchg_dd_pais_ifm() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7049,7 +7055,6 @@ void m68000_device::bchg_dd_das_ifm() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7076,6 +7081,7 @@ void m68000_device::bchg_dd_das_ifm() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7190,7 +7196,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7217,6 +7222,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7290,7 +7296,6 @@ void m68000_device::bchg_dd_adr16_ifm() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7317,6 +7322,7 @@ void m68000_device::bchg_dd_adr16_ifm() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7412,7 +7418,6 @@ void m68000_device::bchg_dd_adr32_ifm() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7439,6 +7444,7 @@ void m68000_device::bchg_dd_adr32_ifm() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7468,7 +7474,6 @@ void m68000_device::bclr_dd_ds_ifm() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7510,6 +7515,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7532,6 +7538,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7573,7 +7580,6 @@ void m68000_device::movep_w_dd_das_ifm() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7607,12 +7613,12 @@ void m68000_device::movep_w_dd_das_ifm() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -7668,7 +7674,6 @@ void m68000_device::bclr_dd_ais_ifm() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7699,6 +7704,7 @@ void m68000_device::bclr_dd_ais_ifm() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7755,7 +7761,6 @@ void m68000_device::bclr_dd_aips_ifm() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7786,6 +7791,7 @@ void m68000_device::bclr_dd_aips_ifm() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7844,7 +7850,6 @@ void m68000_device::bclr_dd_pais_ifm() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7875,6 +7880,7 @@ void m68000_device::bclr_dd_pais_ifm() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -7949,7 +7955,6 @@ void m68000_device::bclr_dd_das_ifm() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7980,6 +7985,7 @@ void m68000_device::bclr_dd_das_ifm() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8094,7 +8100,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8125,6 +8130,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8198,7 +8204,6 @@ void m68000_device::bclr_dd_adr16_ifm() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8229,6 +8234,7 @@ void m68000_device::bclr_dd_adr16_ifm() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8324,7 +8330,6 @@ void m68000_device::bclr_dd_adr32_ifm() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8355,6 +8360,7 @@ void m68000_device::bclr_dd_adr32_ifm() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8384,7 +8390,6 @@ void m68000_device::bset_dd_ds_ifm() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8422,6 +8427,7 @@ void m68000_device::bset_dd_ds_ifm() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8440,6 +8446,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8513,7 +8520,6 @@ void m68000_device::movep_l_dd_das_ifm() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8547,12 +8553,12 @@ void m68000_device::movep_l_dd_das_ifm() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8608,7 +8614,6 @@ void m68000_device::bset_dd_ais_ifm() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8635,6 +8640,7 @@ void m68000_device::bset_dd_ais_ifm() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8691,7 +8697,6 @@ void m68000_device::bset_dd_aips_ifm() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8718,6 +8723,7 @@ void m68000_device::bset_dd_aips_ifm() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8776,7 +8782,6 @@ void m68000_device::bset_dd_pais_ifm() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8803,6 +8808,7 @@ void m68000_device::bset_dd_pais_ifm() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -8877,7 +8883,6 @@ void m68000_device::bset_dd_das_ifm() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -8904,6 +8909,7 @@ void m68000_device::bset_dd_das_ifm() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9018,7 +9024,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9045,6 +9050,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9118,7 +9124,6 @@ void m68000_device::bset_dd_adr16_ifm() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9145,6 +9150,7 @@ void m68000_device::bset_dd_adr16_ifm() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9240,7 +9246,6 @@ void m68000_device::bset_dd_adr32_ifm() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9267,6 +9272,7 @@ void m68000_device::bset_dd_adr32_ifm() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9319,13 +9325,13 @@ void m68000_device::andi_b_imm8_ds_ifm() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9406,7 +9412,6 @@ void m68000_device::andi_b_imm8_ais_ifm() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9433,6 +9438,7 @@ void m68000_device::andi_b_imm8_ais_ifm() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9511,7 +9517,6 @@ void m68000_device::andi_b_imm8_aips_ifm() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9538,6 +9543,7 @@ void m68000_device::andi_b_imm8_aips_ifm() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9618,7 +9624,6 @@ void m68000_device::andi_b_imm8_pais_ifm() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9645,6 +9650,7 @@ void m68000_device::andi_b_imm8_pais_ifm() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9741,7 +9747,6 @@ void m68000_device::andi_b_imm8_das_ifm() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9768,6 +9773,7 @@ void m68000_device::andi_b_imm8_das_ifm() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -9904,7 +9910,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -9931,6 +9936,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10026,7 +10032,6 @@ void m68000_device::andi_b_imm8_adr16_ifm() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10053,6 +10058,7 @@ void m68000_device::andi_b_imm8_adr16_ifm() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10170,7 +10176,6 @@ void m68000_device::andi_b_imm8_adr32_ifm() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10197,6 +10202,7 @@ void m68000_device::andi_b_imm8_adr32_ifm() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -10291,12 +10297,12 @@ void m68000_device::andi_imm8_ccr_ifm() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10353,13 +10359,13 @@ void m68000_device::andi_w_imm16_ds_ifm() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10443,7 +10449,6 @@ void m68000_device::andi_w_imm16_ais_ifm() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10470,6 +10475,7 @@ void m68000_device::andi_w_imm16_ais_ifm() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10556,7 +10562,6 @@ void m68000_device::andi_w_imm16_aips_ifm() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10583,6 +10588,7 @@ void m68000_device::andi_w_imm16_aips_ifm() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10671,7 +10677,6 @@ void m68000_device::andi_w_imm16_pais_ifm() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10698,6 +10703,7 @@ void m68000_device::andi_w_imm16_pais_ifm() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10802,7 +10808,6 @@ void m68000_device::andi_w_imm16_das_ifm() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -10829,6 +10834,7 @@ void m68000_device::andi_w_imm16_das_ifm() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -10973,7 +10979,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11000,6 +11005,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11103,7 +11109,6 @@ void m68000_device::andi_w_imm16_adr16_ifm() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11130,6 +11135,7 @@ void m68000_device::andi_w_imm16_adr16_ifm() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11255,7 +11261,6 @@ void m68000_device::andi_w_imm16_adr32_ifm() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11282,6 +11287,7 @@ void m68000_device::andi_w_imm16_adr32_ifm() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11387,12 +11393,12 @@ void m68000_device::andi_i16u_sr_ifm() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11471,7 +11477,6 @@ void m68000_device::andi_l_imm32_ds_ifm() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -11504,6 +11509,7 @@ void m68000_device::andi_l_imm32_ds_ifm() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -11613,7 +11619,6 @@ void m68000_device::andi_l_imm32_ais_ifm() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11663,6 +11668,7 @@ void m68000_device::andi_l_imm32_ais_ifm() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11791,7 +11797,6 @@ void m68000_device::andi_l_imm32_aips_ifm() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -11841,6 +11846,7 @@ void m68000_device::andi_l_imm32_aips_ifm() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -11970,7 +11976,6 @@ void m68000_device::andi_l_imm32_pais_ifm() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12020,6 +12025,7 @@ void m68000_device::andi_l_imm32_pais_ifm() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12166,7 +12172,6 @@ void m68000_device::andi_l_imm32_das_ifm() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12216,6 +12221,7 @@ void m68000_device::andi_l_imm32_das_ifm() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12402,7 +12408,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12452,6 +12457,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12601,7 +12607,6 @@ void m68000_device::andi_l_imm32_adr16_ifm() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12651,6 +12656,7 @@ void m68000_device::andi_l_imm32_adr16_ifm() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12822,7 +12828,6 @@ void m68000_device::andi_l_imm32_adr32_ifm() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -12872,6 +12877,7 @@ void m68000_device::andi_l_imm32_adr32_ifm() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -12927,13 +12933,13 @@ void m68000_device::subi_b_imm8_ds_ifm() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13011,7 +13017,6 @@ void m68000_device::subi_b_imm8_ais_ifm() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13038,6 +13043,7 @@ void m68000_device::subi_b_imm8_ais_ifm() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13112,7 +13118,6 @@ void m68000_device::subi_b_imm8_aips_ifm() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13139,6 +13144,7 @@ void m68000_device::subi_b_imm8_aips_ifm() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13215,7 +13221,6 @@ void m68000_device::subi_b_imm8_pais_ifm() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13242,6 +13247,7 @@ void m68000_device::subi_b_imm8_pais_ifm() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13334,7 +13340,6 @@ void m68000_device::subi_b_imm8_das_ifm() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13361,6 +13366,7 @@ void m68000_device::subi_b_imm8_das_ifm() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13491,7 +13497,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13518,6 +13523,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13609,7 +13615,6 @@ void m68000_device::subi_b_imm8_adr16_ifm() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13636,6 +13641,7 @@ void m68000_device::subi_b_imm8_adr16_ifm() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13748,7 +13754,6 @@ void m68000_device::subi_b_imm8_adr32_ifm() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13775,6 +13780,7 @@ void m68000_device::subi_b_imm8_adr32_ifm() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -13824,13 +13830,13 @@ void m68000_device::subi_w_imm16_ds_ifm() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13911,7 +13917,6 @@ void m68000_device::subi_w_imm16_ais_ifm() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -13938,6 +13943,7 @@ void m68000_device::subi_w_imm16_ais_ifm() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14020,7 +14026,6 @@ void m68000_device::subi_w_imm16_aips_ifm() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14047,6 +14052,7 @@ void m68000_device::subi_w_imm16_aips_ifm() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14131,7 +14137,6 @@ void m68000_device::subi_w_imm16_pais_ifm() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14158,6 +14163,7 @@ void m68000_device::subi_w_imm16_pais_ifm() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14258,7 +14264,6 @@ void m68000_device::subi_w_imm16_das_ifm() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14285,6 +14290,7 @@ void m68000_device::subi_w_imm16_das_ifm() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14423,7 +14429,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14450,6 +14455,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14549,7 +14555,6 @@ void m68000_device::subi_w_imm16_adr16_ifm() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14576,6 +14581,7 @@ void m68000_device::subi_w_imm16_adr16_ifm() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14696,7 +14702,6 @@ void m68000_device::subi_w_imm16_adr32_ifm() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14723,6 +14728,7 @@ void m68000_device::subi_w_imm16_adr32_ifm() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -14798,7 +14804,6 @@ void m68000_device::subi_l_imm32_ds_ifm() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -14830,6 +14835,7 @@ void m68000_device::subi_l_imm32_ds_ifm() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -14935,7 +14941,6 @@ void m68000_device::subi_l_imm32_ais_ifm() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -14985,6 +14990,7 @@ void m68000_device::subi_l_imm32_ais_ifm() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15108,7 +15114,6 @@ void m68000_device::subi_l_imm32_aips_ifm() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15158,6 +15163,7 @@ void m68000_device::subi_l_imm32_aips_ifm() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15282,7 +15288,6 @@ void m68000_device::subi_l_imm32_pais_ifm() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15332,6 +15337,7 @@ void m68000_device::subi_l_imm32_pais_ifm() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15473,7 +15479,6 @@ void m68000_device::subi_l_imm32_das_ifm() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15523,6 +15528,7 @@ void m68000_device::subi_l_imm32_das_ifm() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15702,7 +15708,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15752,6 +15757,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -15895,7 +15901,6 @@ void m68000_device::subi_l_imm32_adr16_ifm() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -15945,6 +15950,7 @@ void m68000_device::subi_l_imm32_adr16_ifm() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -16109,7 +16115,6 @@ void m68000_device::subi_l_imm32_adr32_ifm() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16159,6 +16164,7 @@ void m68000_device::subi_l_imm32_adr32_ifm() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -16213,13 +16219,13 @@ void m68000_device::addi_b_imm8_ds_ifm() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16297,7 +16303,6 @@ void m68000_device::addi_b_imm8_ais_ifm() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16324,6 +16329,7 @@ void m68000_device::addi_b_imm8_ais_ifm() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16398,7 +16404,6 @@ void m68000_device::addi_b_imm8_aips_ifm() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16425,6 +16430,7 @@ void m68000_device::addi_b_imm8_aips_ifm() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16501,7 +16507,6 @@ void m68000_device::addi_b_imm8_pais_ifm() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16528,6 +16533,7 @@ void m68000_device::addi_b_imm8_pais_ifm() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16620,7 +16626,6 @@ void m68000_device::addi_b_imm8_das_ifm() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16647,6 +16652,7 @@ void m68000_device::addi_b_imm8_das_ifm() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16777,7 +16783,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16804,6 +16809,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -16895,7 +16901,6 @@ void m68000_device::addi_b_imm8_adr16_ifm() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -16922,6 +16927,7 @@ void m68000_device::addi_b_imm8_adr16_ifm() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17034,7 +17040,6 @@ void m68000_device::addi_b_imm8_adr32_ifm() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17061,6 +17066,7 @@ void m68000_device::addi_b_imm8_adr32_ifm() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -17110,13 +17116,13 @@ void m68000_device::addi_w_imm16_ds_ifm() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17197,7 +17203,6 @@ void m68000_device::addi_w_imm16_ais_ifm() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17224,6 +17229,7 @@ void m68000_device::addi_w_imm16_ais_ifm() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17306,7 +17312,6 @@ void m68000_device::addi_w_imm16_aips_ifm() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17333,6 +17338,7 @@ void m68000_device::addi_w_imm16_aips_ifm() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17417,7 +17423,6 @@ void m68000_device::addi_w_imm16_pais_ifm() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17444,6 +17449,7 @@ void m68000_device::addi_w_imm16_pais_ifm() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17544,7 +17550,6 @@ void m68000_device::addi_w_imm16_das_ifm() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17571,6 +17576,7 @@ void m68000_device::addi_w_imm16_das_ifm() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17709,7 +17715,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17736,6 +17741,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17835,7 +17841,6 @@ void m68000_device::addi_w_imm16_adr16_ifm() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -17862,6 +17867,7 @@ void m68000_device::addi_w_imm16_adr16_ifm() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -17982,7 +17988,6 @@ void m68000_device::addi_w_imm16_adr32_ifm() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18009,6 +18014,7 @@ void m68000_device::addi_w_imm16_adr32_ifm() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18084,7 +18090,6 @@ void m68000_device::addi_l_imm32_ds_ifm() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -18116,6 +18121,7 @@ void m68000_device::addi_l_imm32_ds_ifm() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -18221,7 +18227,6 @@ void m68000_device::addi_l_imm32_ais_ifm() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18271,6 +18276,7 @@ void m68000_device::addi_l_imm32_ais_ifm() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18394,7 +18400,6 @@ void m68000_device::addi_l_imm32_aips_ifm() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18444,6 +18449,7 @@ void m68000_device::addi_l_imm32_aips_ifm() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18568,7 +18574,6 @@ void m68000_device::addi_l_imm32_pais_ifm() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18618,6 +18623,7 @@ void m68000_device::addi_l_imm32_pais_ifm() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18759,7 +18765,6 @@ void m68000_device::addi_l_imm32_das_ifm() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -18809,6 +18814,7 @@ void m68000_device::addi_l_imm32_das_ifm() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -18988,7 +18994,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19038,6 +19043,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -19181,7 +19187,6 @@ void m68000_device::addi_l_imm32_adr16_ifm() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19231,6 +19236,7 @@ void m68000_device::addi_l_imm32_adr16_ifm() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -19395,7 +19401,6 @@ void m68000_device::addi_l_imm32_adr32_ifm() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19445,6 +19450,7 @@ void m68000_device::addi_l_imm32_adr32_ifm() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -19500,7 +19506,6 @@ void m68000_device::btst_imm8_ds_ifm() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -19538,6 +19543,7 @@ void m68000_device::btst_imm8_ds_ifm() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -19551,6 +19557,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -19614,7 +19621,6 @@ void m68000_device::btst_imm8_ais_ifm() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19622,6 +19628,7 @@ void m68000_device::btst_imm8_ais_ifm() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19705,7 +19712,6 @@ void m68000_device::btst_imm8_aips_ifm() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19713,6 +19719,7 @@ void m68000_device::btst_imm8_aips_ifm() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19798,7 +19805,6 @@ void m68000_device::btst_imm8_pais_ifm() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19806,6 +19812,7 @@ void m68000_device::btst_imm8_pais_ifm() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -19907,7 +19914,6 @@ void m68000_device::btst_imm8_das_ifm() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -19915,6 +19921,7 @@ void m68000_device::btst_imm8_das_ifm() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20056,7 +20063,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20064,6 +20070,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20164,7 +20171,6 @@ void m68000_device::btst_imm8_adr16_ifm() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20172,6 +20178,7 @@ void m68000_device::btst_imm8_adr16_ifm() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20294,7 +20301,6 @@ void m68000_device::btst_imm8_adr32_ifm() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20302,6 +20308,7 @@ void m68000_device::btst_imm8_adr32_ifm() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20402,7 +20409,6 @@ void m68000_device::btst_imm8_dpc_ifm() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20410,6 +20416,7 @@ void m68000_device::btst_imm8_dpc_ifm() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20550,7 +20557,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -20558,6 +20564,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20614,7 +20621,6 @@ void m68000_device::bchg_imm8_ds_ifm() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -20652,6 +20658,7 @@ void m68000_device::bchg_imm8_ds_ifm() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20670,6 +20677,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -20734,7 +20742,6 @@ void m68000_device::bchg_imm8_ais_ifm() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20761,6 +20768,7 @@ void m68000_device::bchg_imm8_ais_ifm() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20840,7 +20848,6 @@ void m68000_device::bchg_imm8_aips_ifm() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20867,6 +20874,7 @@ void m68000_device::bchg_imm8_aips_ifm() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -20948,7 +20956,6 @@ void m68000_device::bchg_imm8_pais_ifm() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -20975,6 +20982,7 @@ void m68000_device::bchg_imm8_pais_ifm() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21072,7 +21080,6 @@ void m68000_device::bchg_imm8_das_ifm() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21099,6 +21106,7 @@ void m68000_device::bchg_imm8_das_ifm() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21236,7 +21244,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21263,6 +21270,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21359,7 +21367,6 @@ void m68000_device::bchg_imm8_adr16_ifm() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21386,6 +21393,7 @@ void m68000_device::bchg_imm8_adr16_ifm() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21504,7 +21512,6 @@ void m68000_device::bchg_imm8_adr32_ifm() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -21531,6 +21538,7 @@ void m68000_device::bchg_imm8_adr32_ifm() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21583,7 +21591,6 @@ void m68000_device::bclr_imm8_ds_ifm() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -21625,6 +21632,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21647,6 +21655,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -21711,7 +21720,6 @@ void m68000_device::bclr_imm8_ais_ifm() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21742,6 +21750,7 @@ void m68000_device::bclr_imm8_ais_ifm() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21821,7 +21830,6 @@ void m68000_device::bclr_imm8_aips_ifm() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21852,6 +21860,7 @@ void m68000_device::bclr_imm8_aips_ifm() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -21933,7 +21942,6 @@ void m68000_device::bclr_imm8_pais_ifm() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -21964,6 +21972,7 @@ void m68000_device::bclr_imm8_pais_ifm() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22061,7 +22070,6 @@ void m68000_device::bclr_imm8_das_ifm() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22092,6 +22100,7 @@ void m68000_device::bclr_imm8_das_ifm() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22229,7 +22238,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22260,6 +22268,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22356,7 +22365,6 @@ void m68000_device::bclr_imm8_adr16_ifm() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22387,6 +22395,7 @@ void m68000_device::bclr_imm8_adr16_ifm() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22505,7 +22514,6 @@ void m68000_device::bclr_imm8_adr32_ifm() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22536,6 +22544,7 @@ void m68000_device::bclr_imm8_adr32_ifm() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22588,7 +22597,6 @@ void m68000_device::bset_imm8_ds_ifm() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22626,6 +22634,7 @@ void m68000_device::bset_imm8_ds_ifm() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22644,6 +22653,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22708,7 +22718,6 @@ void m68000_device::bset_imm8_ais_ifm() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -22735,6 +22744,7 @@ void m68000_device::bset_imm8_ais_ifm() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22814,7 +22824,6 @@ void m68000_device::bset_imm8_aips_ifm() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -22841,6 +22850,7 @@ void m68000_device::bset_imm8_aips_ifm() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -22922,7 +22932,6 @@ void m68000_device::bset_imm8_pais_ifm() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -22949,6 +22958,7 @@ void m68000_device::bset_imm8_pais_ifm() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23046,7 +23056,6 @@ void m68000_device::bset_imm8_das_ifm() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23073,6 +23082,7 @@ void m68000_device::bset_imm8_das_ifm() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23210,7 +23220,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23237,6 +23246,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23333,7 +23343,6 @@ void m68000_device::bset_imm8_adr16_ifm() // 08f8 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23360,6 +23369,7 @@ void m68000_device::bset_imm8_adr16_ifm() // 08f8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23478,7 +23488,6 @@ void m68000_device::bset_imm8_adr32_ifm() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23505,6 +23514,7 @@ void m68000_device::bset_imm8_adr32_ifm() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23557,13 +23567,13 @@ void m68000_device::eori_b_imm8_ds_ifm() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23644,7 +23654,6 @@ void m68000_device::eori_b_imm8_ais_ifm() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23671,6 +23680,7 @@ void m68000_device::eori_b_imm8_ais_ifm() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23749,7 +23759,6 @@ void m68000_device::eori_b_imm8_aips_ifm() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23776,6 +23785,7 @@ void m68000_device::eori_b_imm8_aips_ifm() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23856,7 +23866,6 @@ void m68000_device::eori_b_imm8_pais_ifm() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -23883,6 +23892,7 @@ void m68000_device::eori_b_imm8_pais_ifm() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -23979,7 +23989,6 @@ void m68000_device::eori_b_imm8_das_ifm() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24006,6 +24015,7 @@ void m68000_device::eori_b_imm8_das_ifm() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24142,7 +24152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24169,6 +24178,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24264,7 +24274,6 @@ void m68000_device::eori_b_imm8_adr16_ifm() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24291,6 +24300,7 @@ void m68000_device::eori_b_imm8_adr16_ifm() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24408,7 +24418,6 @@ void m68000_device::eori_b_imm8_adr32_ifm() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24435,6 +24444,7 @@ void m68000_device::eori_b_imm8_adr32_ifm() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -24529,12 +24539,12 @@ void m68000_device::eori_imm8_ccr_ifm() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24591,13 +24601,13 @@ void m68000_device::eori_w_imm16_ds_ifm() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24681,7 +24691,6 @@ void m68000_device::eori_w_imm16_ais_ifm() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24708,6 +24717,7 @@ void m68000_device::eori_w_imm16_ais_ifm() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -24794,7 +24804,6 @@ void m68000_device::eori_w_imm16_aips_ifm() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24821,6 +24830,7 @@ void m68000_device::eori_w_imm16_aips_ifm() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -24909,7 +24919,6 @@ void m68000_device::eori_w_imm16_pais_ifm() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -24936,6 +24945,7 @@ void m68000_device::eori_w_imm16_pais_ifm() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25040,7 +25050,6 @@ void m68000_device::eori_w_imm16_das_ifm() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25067,6 +25076,7 @@ void m68000_device::eori_w_imm16_das_ifm() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25211,7 +25221,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25238,6 +25247,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25341,7 +25351,6 @@ void m68000_device::eori_w_imm16_adr16_ifm() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25368,6 +25377,7 @@ void m68000_device::eori_w_imm16_adr16_ifm() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25493,7 +25503,6 @@ void m68000_device::eori_w_imm16_adr32_ifm() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25520,6 +25529,7 @@ void m68000_device::eori_w_imm16_adr32_ifm() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -25625,12 +25635,12 @@ void m68000_device::eori_i16u_sr_ifm() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25709,7 +25719,6 @@ void m68000_device::eori_l_imm32_ds_ifm() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -25742,6 +25751,7 @@ void m68000_device::eori_l_imm32_ds_ifm() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -25851,7 +25861,6 @@ void m68000_device::eori_l_imm32_ais_ifm() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -25901,6 +25910,7 @@ void m68000_device::eori_l_imm32_ais_ifm() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26029,7 +26039,6 @@ void m68000_device::eori_l_imm32_aips_ifm() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26079,6 +26088,7 @@ void m68000_device::eori_l_imm32_aips_ifm() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26208,7 +26218,6 @@ void m68000_device::eori_l_imm32_pais_ifm() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26258,6 +26267,7 @@ void m68000_device::eori_l_imm32_pais_ifm() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26404,7 +26414,6 @@ void m68000_device::eori_l_imm32_das_ifm() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26454,6 +26463,7 @@ void m68000_device::eori_l_imm32_das_ifm() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26640,7 +26650,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26690,6 +26699,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -26839,7 +26849,6 @@ void m68000_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -26889,6 +26898,7 @@ void m68000_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -27060,7 +27070,6 @@ void m68000_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27110,6 +27119,7 @@ void m68000_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -27165,13 +27175,13 @@ void m68000_device::cmpi_b_imm8_ds_ifm() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27248,7 +27258,6 @@ void m68000_device::cmpi_b_imm8_ais_ifm() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27256,6 +27265,7 @@ void m68000_device::cmpi_b_imm8_ais_ifm() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27335,7 +27345,6 @@ void m68000_device::cmpi_b_imm8_aips_ifm() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27343,6 +27352,7 @@ void m68000_device::cmpi_b_imm8_aips_ifm() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27424,7 +27434,6 @@ void m68000_device::cmpi_b_imm8_pais_ifm() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27432,6 +27441,7 @@ void m68000_device::cmpi_b_imm8_pais_ifm() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27529,7 +27539,6 @@ void m68000_device::cmpi_b_imm8_das_ifm() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27537,6 +27546,7 @@ void m68000_device::cmpi_b_imm8_das_ifm() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27672,7 +27682,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27680,6 +27689,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27776,7 +27786,6 @@ void m68000_device::cmpi_b_imm8_adr16_ifm() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27784,6 +27793,7 @@ void m68000_device::cmpi_b_imm8_adr16_ifm() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27901,7 +27911,6 @@ void m68000_device::cmpi_b_imm8_adr32_ifm() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -27909,6 +27918,7 @@ void m68000_device::cmpi_b_imm8_adr32_ifm() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -27963,13 +27973,13 @@ void m68000_device::cmpi_w_imm16_ds_ifm() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28049,7 +28059,6 @@ void m68000_device::cmpi_w_imm16_ais_ifm() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28057,6 +28066,7 @@ void m68000_device::cmpi_w_imm16_ais_ifm() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28139,7 +28149,6 @@ void m68000_device::cmpi_w_imm16_aips_ifm() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28147,6 +28156,7 @@ void m68000_device::cmpi_w_imm16_aips_ifm() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28231,7 +28241,6 @@ void m68000_device::cmpi_w_imm16_pais_ifm() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28239,6 +28248,7 @@ void m68000_device::cmpi_w_imm16_pais_ifm() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28339,7 +28349,6 @@ void m68000_device::cmpi_w_imm16_das_ifm() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28347,6 +28356,7 @@ void m68000_device::cmpi_w_imm16_das_ifm() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28485,7 +28495,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28493,6 +28502,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28592,7 +28602,6 @@ void m68000_device::cmpi_w_imm16_adr16_ifm() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28600,6 +28609,7 @@ void m68000_device::cmpi_w_imm16_adr16_ifm() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28720,7 +28730,6 @@ void m68000_device::cmpi_w_imm16_adr32_ifm() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28728,6 +28737,7 @@ void m68000_device::cmpi_w_imm16_adr32_ifm() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -28804,7 +28814,6 @@ void m68000_device::cmpi_l_imm32_ds_ifm() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -28833,6 +28842,7 @@ void m68000_device::cmpi_l_imm32_ds_ifm() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -28937,7 +28947,6 @@ void m68000_device::cmpi_l_imm32_ais_ifm() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -28945,6 +28954,7 @@ void m68000_device::cmpi_l_imm32_ais_ifm() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29071,7 +29081,6 @@ void m68000_device::cmpi_l_imm32_aips_ifm() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29079,6 +29088,7 @@ void m68000_device::cmpi_l_imm32_aips_ifm() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29206,7 +29216,6 @@ void m68000_device::cmpi_l_imm32_pais_ifm() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29214,6 +29223,7 @@ void m68000_device::cmpi_l_imm32_pais_ifm() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29358,7 +29368,6 @@ void m68000_device::cmpi_l_imm32_das_ifm() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29366,6 +29375,7 @@ void m68000_device::cmpi_l_imm32_das_ifm() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29548,7 +29558,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29556,6 +29565,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29702,7 +29712,6 @@ void m68000_device::cmpi_l_imm32_adr16_ifm() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29710,6 +29719,7 @@ void m68000_device::cmpi_l_imm32_adr16_ifm() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29877,7 +29887,6 @@ void m68000_device::cmpi_l_imm32_adr32_ifm() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -29885,6 +29894,7 @@ void m68000_device::cmpi_l_imm32_adr32_ifm() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29920,7 +29930,6 @@ void m68000_device::move_b_ds_dd_ifm() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -29929,6 +29938,7 @@ void m68000_device::move_b_ds_dd_ifm() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -29984,7 +29994,6 @@ void m68000_device::move_b_ais_dd_ifm() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -29993,6 +30002,7 @@ void m68000_device::move_b_ais_dd_ifm() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30050,7 +30060,6 @@ void m68000_device::move_b_aips_dd_ifm() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30059,6 +30068,7 @@ void m68000_device::move_b_aips_dd_ifm() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30118,7 +30128,6 @@ void m68000_device::move_b_pais_dd_ifm() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30127,6 +30136,7 @@ void m68000_device::move_b_pais_dd_ifm() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30202,7 +30212,6 @@ void m68000_device::move_b_das_dd_ifm() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30211,6 +30220,7 @@ void m68000_device::move_b_das_dd_ifm() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30324,7 +30334,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30333,6 +30342,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30407,7 +30417,6 @@ void m68000_device::move_b_adr16_dd_ifm() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30416,6 +30425,7 @@ void m68000_device::move_b_adr16_dd_ifm() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30511,7 +30521,6 @@ void m68000_device::move_b_adr32_dd_ifm() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30520,6 +30529,7 @@ void m68000_device::move_b_adr32_dd_ifm() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30594,7 +30604,6 @@ void m68000_device::move_b_dpc_dd_ifm() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30603,6 +30612,7 @@ void m68000_device::move_b_dpc_dd_ifm() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30715,7 +30725,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -30724,6 +30733,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30779,7 +30789,6 @@ void m68000_device::move_b_imm8_dd_ifm() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -30788,6 +30797,7 @@ void m68000_device::move_b_imm8_dd_ifm() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30822,7 +30832,6 @@ void m68000_device::move_b_ds_aid_ifm() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -30843,10 +30852,10 @@ void m68000_device::move_b_ds_aid_ifm() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30919,10 +30928,10 @@ void m68000_device::move_b_ais_aid_ifm() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -30999,10 +31008,10 @@ void m68000_device::move_b_aips_aid_ifm() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31081,10 +31090,10 @@ void m68000_device::move_b_pais_aid_ifm() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31179,10 +31188,10 @@ void m68000_device::move_b_das_aid_ifm() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31315,10 +31324,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31412,10 +31421,10 @@ void m68000_device::move_b_adr16_aid_ifm() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31530,10 +31539,10 @@ void m68000_device::move_b_adr32_aid_ifm() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31627,10 +31636,10 @@ void m68000_device::move_b_dpc_aid_ifm() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31762,10 +31771,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31821,7 +31830,6 @@ void m68000_device::move_b_imm8_aid_ifm() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31842,10 +31850,10 @@ void m68000_device::move_b_imm8_aid_ifm() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31878,7 +31886,6 @@ void m68000_device::move_b_ds_aipd_ifm() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31899,6 +31906,7 @@ void m68000_device::move_b_ds_aipd_ifm() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -31954,7 +31962,6 @@ void m68000_device::move_b_ais_aipd_ifm() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -31975,6 +31982,7 @@ void m68000_device::move_b_ais_aipd_ifm() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32034,7 +32042,6 @@ void m68000_device::move_b_aips_aipd_ifm() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32055,6 +32062,7 @@ void m68000_device::move_b_aips_aipd_ifm() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32116,7 +32124,6 @@ void m68000_device::move_b_pais_aipd_ifm() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32137,6 +32144,7 @@ void m68000_device::move_b_pais_aipd_ifm() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32214,7 +32222,6 @@ void m68000_device::move_b_das_aipd_ifm() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32235,6 +32242,7 @@ void m68000_device::move_b_das_aipd_ifm() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32350,7 +32358,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32371,6 +32378,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32447,7 +32455,6 @@ void m68000_device::move_b_adr16_aipd_ifm() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32468,6 +32475,7 @@ void m68000_device::move_b_adr16_aipd_ifm() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32565,7 +32573,6 @@ void m68000_device::move_b_adr32_aipd_ifm() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32586,6 +32593,7 @@ void m68000_device::move_b_adr32_aipd_ifm() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32662,7 +32670,6 @@ void m68000_device::move_b_dpc_aipd_ifm() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32683,6 +32690,7 @@ void m68000_device::move_b_dpc_aipd_ifm() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32797,7 +32805,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32818,6 +32825,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32875,7 +32883,6 @@ void m68000_device::move_b_imm8_aipd_ifm() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -32896,6 +32903,7 @@ void m68000_device::move_b_imm8_aipd_ifm() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32930,7 +32938,6 @@ void m68000_device::move_b_ds_paid_ifm() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -32957,6 +32964,7 @@ void m68000_device::move_b_ds_paid_ifm() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33006,7 +33014,6 @@ void m68000_device::move_b_ais_paid_ifm() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33033,6 +33040,7 @@ void m68000_device::move_b_ais_paid_ifm() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33086,7 +33094,6 @@ void m68000_device::move_b_aips_paid_ifm() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33113,6 +33120,7 @@ void m68000_device::move_b_aips_paid_ifm() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33168,7 +33176,6 @@ void m68000_device::move_b_pais_paid_ifm() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33195,6 +33202,7 @@ void m68000_device::move_b_pais_paid_ifm() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33266,7 +33274,6 @@ void m68000_device::move_b_das_paid_ifm() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33293,6 +33300,7 @@ void m68000_device::move_b_das_paid_ifm() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33402,7 +33410,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33429,6 +33436,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33499,7 +33507,6 @@ void m68000_device::move_b_adr16_paid_ifm() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33526,6 +33533,7 @@ void m68000_device::move_b_adr16_paid_ifm() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33617,7 +33625,6 @@ void m68000_device::move_b_adr32_paid_ifm() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33644,6 +33651,7 @@ void m68000_device::move_b_adr32_paid_ifm() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33714,7 +33722,6 @@ void m68000_device::move_b_dpc_paid_ifm() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33741,6 +33748,7 @@ void m68000_device::move_b_dpc_paid_ifm() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33849,7 +33857,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33876,6 +33883,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -33927,7 +33935,6 @@ void m68000_device::move_b_imm8_paid_ifm() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -33954,6 +33961,7 @@ void m68000_device::move_b_imm8_paid_ifm() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34003,7 +34011,6 @@ void m68000_device::move_b_ds_dad_ifm() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34023,11 +34030,11 @@ void m68000_device::move_b_ds_dad_ifm() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34105,6 +34112,7 @@ void m68000_device::move_b_ais_dad_ifm() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34124,11 +34132,11 @@ void m68000_device::move_b_ais_dad_ifm() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34210,6 +34218,7 @@ void m68000_device::move_b_aips_dad_ifm() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34229,11 +34238,11 @@ void m68000_device::move_b_aips_dad_ifm() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34317,6 +34326,7 @@ void m68000_device::move_b_pais_dad_ifm() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34336,11 +34346,11 @@ void m68000_device::move_b_pais_dad_ifm() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34440,6 +34450,7 @@ void m68000_device::move_b_das_dad_ifm() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34459,11 +34470,11 @@ void m68000_device::move_b_das_dad_ifm() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34601,6 +34612,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34620,11 +34632,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34723,6 +34735,7 @@ void m68000_device::move_b_adr16_dad_ifm() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34742,11 +34755,11 @@ void m68000_device::move_b_adr16_dad_ifm() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34866,6 +34879,7 @@ void m68000_device::move_b_adr32_dad_ifm() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -34885,11 +34899,11 @@ void m68000_device::move_b_adr32_dad_ifm() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -34988,6 +35002,7 @@ void m68000_device::move_b_dpc_dad_ifm() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35007,11 +35022,11 @@ void m68000_device::move_b_dpc_dad_ifm() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35148,6 +35163,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35167,11 +35183,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35248,7 +35264,6 @@ void m68000_device::move_b_imm8_dad_ifm() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35268,11 +35283,11 @@ void m68000_device::move_b_imm8_dad_ifm() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35365,7 +35380,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35385,11 +35399,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35505,6 +35519,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35524,11 +35539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35648,6 +35663,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35667,11 +35683,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35793,6 +35809,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35812,11 +35829,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -35954,6 +35971,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -35973,11 +35991,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36153,6 +36171,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36172,11 +36191,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36313,6 +36332,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36332,11 +36352,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36494,6 +36514,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36513,11 +36534,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36654,6 +36675,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36673,11 +36695,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36852,6 +36874,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -36871,11 +36894,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -36991,7 +37014,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37011,11 +37033,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37072,6 +37094,7 @@ void m68000_device::move_b_ds_adr16_ifm() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37091,11 +37114,11 @@ void m68000_device::move_b_ds_adr16_ifm() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37172,6 +37195,7 @@ void m68000_device::move_b_ais_adr16_ifm() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37191,11 +37215,11 @@ void m68000_device::move_b_ais_adr16_ifm() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37276,6 +37300,7 @@ void m68000_device::move_b_aips_adr16_ifm() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37295,11 +37320,11 @@ void m68000_device::move_b_aips_adr16_ifm() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37382,6 +37407,7 @@ void m68000_device::move_b_pais_adr16_ifm() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37401,11 +37427,11 @@ void m68000_device::move_b_pais_adr16_ifm() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37504,6 +37530,7 @@ void m68000_device::move_b_das_adr16_ifm() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37523,11 +37550,11 @@ void m68000_device::move_b_das_adr16_ifm() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37664,6 +37691,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37683,11 +37711,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37785,6 +37813,7 @@ void m68000_device::move_b_adr16_adr16_ifm() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37804,11 +37833,11 @@ void m68000_device::move_b_adr16_adr16_ifm() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -37927,6 +37956,7 @@ void m68000_device::move_b_adr32_adr16_ifm() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -37946,11 +37976,11 @@ void m68000_device::move_b_adr32_adr16_ifm() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38048,6 +38078,7 @@ void m68000_device::move_b_dpc_adr16_ifm() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38067,11 +38098,11 @@ void m68000_device::move_b_dpc_adr16_ifm() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38207,6 +38238,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38226,11 +38258,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38310,6 +38342,7 @@ void m68000_device::move_b_imm8_adr16_ifm() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38329,11 +38362,11 @@ void m68000_device::move_b_imm8_adr16_ifm() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38411,6 +38444,7 @@ void m68000_device::move_b_ds_adr32_ifm() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38430,11 +38464,11 @@ void m68000_device::move_b_ds_adr32_ifm() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38511,7 +38545,6 @@ void m68000_device::move_b_ais_adr32_ifm() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38552,11 +38585,11 @@ void m68000_device::move_b_ais_adr32_ifm() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38637,7 +38670,6 @@ void m68000_device::move_b_aips_adr32_ifm() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38678,11 +38710,11 @@ void m68000_device::move_b_aips_adr32_ifm() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38765,7 +38797,6 @@ void m68000_device::move_b_pais_adr32_ifm() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38806,11 +38837,11 @@ void m68000_device::move_b_pais_adr32_ifm() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -38909,7 +38940,6 @@ void m68000_device::move_b_das_adr32_ifm() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -38950,11 +38980,11 @@ void m68000_device::move_b_das_adr32_ifm() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39091,7 +39121,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39132,11 +39161,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39234,7 +39263,6 @@ void m68000_device::move_b_adr16_adr32_ifm() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39275,11 +39303,11 @@ void m68000_device::move_b_adr16_adr32_ifm() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39398,7 +39426,6 @@ void m68000_device::move_b_adr32_adr32_ifm() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39439,11 +39466,11 @@ void m68000_device::move_b_adr32_adr32_ifm() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39541,7 +39568,6 @@ void m68000_device::move_b_dpc_adr32_ifm() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39582,11 +39608,11 @@ void m68000_device::move_b_dpc_adr32_ifm() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39722,7 +39748,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39763,11 +39788,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39868,6 +39893,7 @@ void m68000_device::move_b_imm8_adr32_ifm() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -39887,11 +39913,11 @@ void m68000_device::move_b_imm8_adr32_ifm() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39924,7 +39950,6 @@ void m68000_device::move_l_ds_dd_ifm() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39933,6 +39958,7 @@ void m68000_device::move_l_ds_dd_ifm() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -39969,7 +39995,6 @@ void m68000_device::move_l_as_dd_ifm() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -39978,6 +40003,7 @@ void m68000_device::move_l_as_dd_ifm() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40059,7 +40085,6 @@ void m68000_device::move_l_ais_dd_ifm() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40068,6 +40093,7 @@ void m68000_device::move_l_ais_dd_ifm() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40152,7 +40178,6 @@ void m68000_device::move_l_aips_dd_ifm() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40161,6 +40186,7 @@ void m68000_device::move_l_aips_dd_ifm() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40246,7 +40272,6 @@ void m68000_device::move_l_pais_dd_ifm() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40255,6 +40280,7 @@ void m68000_device::move_l_pais_dd_ifm() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40357,7 +40383,6 @@ void m68000_device::move_l_das_dd_ifm() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40366,6 +40391,7 @@ void m68000_device::move_l_das_dd_ifm() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40506,7 +40532,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40515,6 +40540,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40619,7 +40645,6 @@ void m68000_device::move_l_adr16_dd_ifm() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40628,6 +40653,7 @@ void m68000_device::move_l_adr16_dd_ifm() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40753,7 +40779,6 @@ void m68000_device::move_l_adr32_dd_ifm() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40762,6 +40787,7 @@ void m68000_device::move_l_adr32_dd_ifm() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -40863,7 +40889,6 @@ void m68000_device::move_l_dpc_dd_ifm() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -40872,6 +40897,7 @@ void m68000_device::move_l_dpc_dd_ifm() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41011,7 +41037,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41020,6 +41045,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41100,7 +41126,6 @@ void m68000_device::move_l_imm32_dd_ifm() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -41109,6 +41134,7 @@ void m68000_device::move_l_imm32_dd_ifm() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41145,7 +41171,6 @@ void m68000_device::movea_l_ds_ad_ifm() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41153,6 +41178,7 @@ void m68000_device::movea_l_ds_ad_ifm() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41188,7 +41214,6 @@ void m68000_device::movea_l_as_ad_ifm() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -41196,6 +41221,7 @@ void m68000_device::movea_l_as_ad_ifm() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41276,7 +41302,6 @@ void m68000_device::movea_l_ais_ad_ifm() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41284,6 +41309,7 @@ void m68000_device::movea_l_ais_ad_ifm() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41367,7 +41393,6 @@ void m68000_device::movea_l_aips_ad_ifm() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41375,6 +41400,7 @@ void m68000_device::movea_l_aips_ad_ifm() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41459,7 +41485,6 @@ void m68000_device::movea_l_pais_ad_ifm() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41467,6 +41492,7 @@ void m68000_device::movea_l_pais_ad_ifm() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41568,7 +41594,6 @@ void m68000_device::movea_l_das_ad_ifm() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41576,6 +41601,7 @@ void m68000_device::movea_l_das_ad_ifm() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41715,7 +41741,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41723,6 +41748,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41826,7 +41852,6 @@ void m68000_device::movea_l_adr16_ad_ifm() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41834,6 +41859,7 @@ void m68000_device::movea_l_adr16_ad_ifm() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -41958,7 +41984,6 @@ void m68000_device::movea_l_adr32_ad_ifm() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -41966,6 +41991,7 @@ void m68000_device::movea_l_adr32_ad_ifm() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42066,7 +42092,6 @@ void m68000_device::movea_l_dpc_ad_ifm() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42074,6 +42099,7 @@ void m68000_device::movea_l_dpc_ad_ifm() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42212,7 +42238,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -42220,6 +42245,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42299,7 +42325,6 @@ void m68000_device::movea_l_imm32_ad_ifm() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -42307,6 +42332,7 @@ void m68000_device::movea_l_imm32_ad_ifm() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42364,7 +42390,6 @@ void m68000_device::move_l_ds_aid_ifm() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42389,6 +42414,7 @@ void m68000_device::move_l_ds_aid_ifm() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42448,7 +42474,6 @@ void m68000_device::move_l_as_aid_ifm() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42473,6 +42498,7 @@ void m68000_device::move_l_as_aid_ifm() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42579,7 +42605,6 @@ void m68000_device::move_l_ais_aid_ifm() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42604,10 +42629,10 @@ void m68000_device::move_l_ais_aid_ifm() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42712,7 +42737,6 @@ void m68000_device::move_l_aips_aid_ifm() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42737,10 +42761,10 @@ void m68000_device::move_l_aips_aid_ifm() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42846,7 +42870,6 @@ void m68000_device::move_l_pais_aid_ifm() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -42871,10 +42894,10 @@ void m68000_device::move_l_pais_aid_ifm() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -42997,7 +43020,6 @@ void m68000_device::move_l_das_aid_ifm() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43022,10 +43044,10 @@ void m68000_device::move_l_das_aid_ifm() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43186,7 +43208,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43211,10 +43232,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43339,7 +43360,6 @@ void m68000_device::move_l_adr16_aid_ifm() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43364,10 +43384,10 @@ void m68000_device::move_l_adr16_aid_ifm() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43513,7 +43533,6 @@ void m68000_device::move_l_adr32_aid_ifm() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43538,10 +43557,10 @@ void m68000_device::move_l_adr32_aid_ifm() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43663,7 +43682,6 @@ void m68000_device::move_l_dpc_aid_ifm() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43688,10 +43706,10 @@ void m68000_device::move_l_dpc_aid_ifm() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43851,7 +43869,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -43876,10 +43893,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -43978,7 +43995,6 @@ void m68000_device::move_l_imm32_aid_ifm() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44003,6 +44019,7 @@ void m68000_device::move_l_imm32_aid_ifm() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44062,7 +44079,6 @@ void m68000_device::move_l_ds_aipd_ifm() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44087,6 +44103,7 @@ void m68000_device::move_l_ds_aipd_ifm() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44146,7 +44163,6 @@ void m68000_device::move_l_as_aipd_ifm() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44171,6 +44187,7 @@ void m68000_device::move_l_as_aipd_ifm() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44277,7 +44294,6 @@ void m68000_device::move_l_ais_aipd_ifm() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44302,6 +44318,7 @@ void m68000_device::move_l_ais_aipd_ifm() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44408,7 +44425,6 @@ void m68000_device::move_l_aips_aipd_ifm() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44433,6 +44449,7 @@ void m68000_device::move_l_aips_aipd_ifm() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44540,7 +44557,6 @@ void m68000_device::move_l_pais_aipd_ifm() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44565,6 +44581,7 @@ void m68000_device::move_l_pais_aipd_ifm() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44689,7 +44706,6 @@ void m68000_device::move_l_das_aipd_ifm() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44714,6 +44730,7 @@ void m68000_device::move_l_das_aipd_ifm() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -44876,7 +44893,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -44901,6 +44917,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45027,7 +45044,6 @@ void m68000_device::move_l_adr16_aipd_ifm() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45052,6 +45068,7 @@ void m68000_device::move_l_adr16_aipd_ifm() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45199,7 +45216,6 @@ void m68000_device::move_l_adr32_aipd_ifm() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45224,6 +45240,7 @@ void m68000_device::move_l_adr32_aipd_ifm() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45347,7 +45364,6 @@ void m68000_device::move_l_dpc_aipd_ifm() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45372,6 +45388,7 @@ void m68000_device::move_l_dpc_aipd_ifm() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45533,7 +45550,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45558,6 +45574,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45658,7 +45675,6 @@ void m68000_device::move_l_imm32_aipd_ifm() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45683,6 +45699,7 @@ void m68000_device::move_l_imm32_aipd_ifm() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45720,7 +45737,6 @@ void m68000_device::move_l_ds_paid_ifm() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45770,6 +45786,7 @@ void m68000_device::move_l_ds_paid_ifm() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45803,7 +45820,6 @@ void m68000_device::move_l_as_paid_ifm() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45853,6 +45869,7 @@ void m68000_device::move_l_as_paid_ifm() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -45931,7 +45948,6 @@ void m68000_device::move_l_ais_paid_ifm() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -45981,6 +45997,7 @@ void m68000_device::move_l_ais_paid_ifm() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46062,7 +46079,6 @@ void m68000_device::move_l_aips_paid_ifm() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46112,6 +46128,7 @@ void m68000_device::move_l_aips_paid_ifm() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46194,7 +46211,6 @@ void m68000_device::move_l_pais_paid_ifm() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46244,6 +46260,7 @@ void m68000_device::move_l_pais_paid_ifm() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46343,7 +46360,6 @@ void m68000_device::move_l_das_paid_ifm() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46393,6 +46409,7 @@ void m68000_device::move_l_das_paid_ifm() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46530,7 +46547,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46580,6 +46596,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46681,7 +46698,6 @@ void m68000_device::move_l_adr16_paid_ifm() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46731,6 +46747,7 @@ void m68000_device::move_l_adr16_paid_ifm() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -46853,7 +46870,6 @@ void m68000_device::move_l_adr32_paid_ifm() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -46903,6 +46919,7 @@ void m68000_device::move_l_adr32_paid_ifm() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47001,7 +47018,6 @@ void m68000_device::move_l_dpc_paid_ifm() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47051,6 +47067,7 @@ void m68000_device::move_l_dpc_paid_ifm() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47187,7 +47204,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47237,6 +47253,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47314,7 +47331,6 @@ void m68000_device::move_l_imm32_paid_ifm() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47364,6 +47380,7 @@ void m68000_device::move_l_imm32_paid_ifm() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47442,7 +47459,6 @@ void m68000_device::move_l_ds_dad_ifm() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47467,6 +47483,7 @@ void m68000_device::move_l_ds_dad_ifm() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47549,7 +47566,6 @@ void m68000_device::move_l_as_dad_ifm() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47574,6 +47590,7 @@ void m68000_device::move_l_as_dad_ifm() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47704,6 +47721,7 @@ void m68000_device::move_l_ais_dad_ifm() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47728,11 +47746,11 @@ void m68000_device::move_l_ais_dad_ifm() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -47861,6 +47879,7 @@ void m68000_device::move_l_aips_dad_ifm() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -47885,11 +47904,11 @@ void m68000_device::move_l_aips_dad_ifm() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48019,6 +48038,7 @@ void m68000_device::move_l_pais_dad_ifm() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48043,11 +48063,11 @@ void m68000_device::move_l_pais_dad_ifm() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48194,6 +48214,7 @@ void m68000_device::move_l_das_dad_ifm() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48218,11 +48239,11 @@ void m68000_device::move_l_das_dad_ifm() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48407,6 +48428,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48431,11 +48453,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48584,6 +48606,7 @@ void m68000_device::move_l_adr16_dad_ifm() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48608,11 +48631,11 @@ void m68000_device::move_l_adr16_dad_ifm() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48782,6 +48805,7 @@ void m68000_device::move_l_adr32_dad_ifm() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48806,11 +48830,11 @@ void m68000_device::move_l_adr32_dad_ifm() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -48956,6 +48980,7 @@ void m68000_device::move_l_dpc_dad_ifm() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -48980,11 +49005,11 @@ void m68000_device::move_l_dpc_dad_ifm() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49168,6 +49193,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49192,11 +49218,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49318,7 +49344,6 @@ void m68000_device::move_l_imm32_dad_ifm() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49343,6 +49368,7 @@ void m68000_device::move_l_imm32_dad_ifm() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49464,7 +49490,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49489,6 +49514,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49610,7 +49636,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49635,6 +49660,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49803,6 +49829,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -49827,11 +49854,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -49998,6 +50025,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50022,11 +50050,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50194,6 +50222,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50218,11 +50247,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50407,6 +50436,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50431,11 +50461,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50658,6 +50688,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50682,11 +50713,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -50873,6 +50904,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -50897,11 +50929,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51109,6 +51141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51133,11 +51166,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51321,6 +51354,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51345,11 +51379,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51571,6 +51605,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51595,11 +51630,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51760,7 +51795,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51785,6 +51819,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51870,6 +51905,7 @@ void m68000_device::move_l_ds_adr16_ifm() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -51894,11 +51930,11 @@ void m68000_device::move_l_ds_adr16_ifm() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -51979,6 +52015,7 @@ void m68000_device::move_l_as_adr16_ifm() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52003,11 +52040,11 @@ void m68000_device::move_l_as_adr16_ifm() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52132,6 +52169,7 @@ void m68000_device::move_l_ais_adr16_ifm() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52156,11 +52194,11 @@ void m68000_device::move_l_ais_adr16_ifm() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52288,6 +52326,7 @@ void m68000_device::move_l_aips_adr16_ifm() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52312,11 +52351,11 @@ void m68000_device::move_l_aips_adr16_ifm() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52445,6 +52484,7 @@ void m68000_device::move_l_pais_adr16_ifm() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52469,11 +52509,11 @@ void m68000_device::move_l_pais_adr16_ifm() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52619,6 +52659,7 @@ void m68000_device::move_l_das_adr16_ifm() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52643,11 +52684,11 @@ void m68000_device::move_l_das_adr16_ifm() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -52831,6 +52872,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -52855,11 +52897,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53007,6 +53049,7 @@ void m68000_device::move_l_adr16_adr16_ifm() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53031,11 +53074,11 @@ void m68000_device::move_l_adr16_adr16_ifm() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53204,6 +53247,7 @@ void m68000_device::move_l_adr32_adr16_ifm() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53228,11 +53272,11 @@ void m68000_device::move_l_adr32_adr16_ifm() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53377,6 +53421,7 @@ void m68000_device::move_l_dpc_adr16_ifm() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53401,11 +53446,11 @@ void m68000_device::move_l_dpc_adr16_ifm() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53588,6 +53633,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53612,11 +53658,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53741,6 +53787,7 @@ void m68000_device::move_l_imm32_adr16_ifm() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53765,11 +53812,11 @@ void m68000_device::move_l_imm32_adr16_ifm() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -53871,6 +53918,7 @@ void m68000_device::move_l_ds_adr32_ifm() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -53895,11 +53943,11 @@ void m68000_device::move_l_ds_adr32_ifm() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54001,6 +54049,7 @@ void m68000_device::move_l_as_adr32_ifm() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54025,11 +54074,11 @@ void m68000_device::move_l_as_adr32_ifm() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54153,7 +54202,6 @@ void m68000_device::move_l_ais_adr32_ifm() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54202,11 +54250,11 @@ void m68000_device::move_l_ais_adr32_ifm() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54333,7 +54381,6 @@ void m68000_device::move_l_aips_adr32_ifm() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54382,11 +54429,11 @@ void m68000_device::move_l_aips_adr32_ifm() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54514,7 +54561,6 @@ void m68000_device::move_l_pais_adr32_ifm() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54563,11 +54609,11 @@ void m68000_device::move_l_pais_adr32_ifm() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54712,7 +54758,6 @@ void m68000_device::move_l_das_adr32_ifm() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54761,11 +54806,11 @@ void m68000_device::move_l_das_adr32_ifm() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -54948,7 +54993,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -54997,11 +55041,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55148,7 +55192,6 @@ void m68000_device::move_l_adr16_adr32_ifm() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55197,11 +55240,11 @@ void m68000_device::move_l_adr16_adr32_ifm() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55369,7 +55412,6 @@ void m68000_device::move_l_adr32_adr32_ifm() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55418,11 +55460,11 @@ void m68000_device::move_l_adr32_adr32_ifm() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55566,7 +55608,6 @@ void m68000_device::move_l_dpc_adr32_ifm() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55615,11 +55656,11 @@ void m68000_device::move_l_dpc_adr32_ifm() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -55801,7 +55842,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -55850,11 +55890,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56000,6 +56040,7 @@ void m68000_device::move_l_imm32_adr32_ifm() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -56024,11 +56065,11 @@ void m68000_device::move_l_imm32_adr32_ifm() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56061,7 +56102,6 @@ void m68000_device::move_w_ds_dd_ifm() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56070,6 +56110,7 @@ void m68000_device::move_w_ds_dd_ifm() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56104,7 +56145,6 @@ void m68000_device::move_w_as_dd_ifm() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -56113,6 +56153,7 @@ void m68000_device::move_w_as_dd_ifm() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56171,7 +56212,6 @@ void m68000_device::move_w_ais_dd_ifm() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56180,6 +56220,7 @@ void m68000_device::move_w_ais_dd_ifm() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56240,7 +56281,6 @@ void m68000_device::move_w_aips_dd_ifm() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56249,6 +56289,7 @@ void m68000_device::move_w_aips_dd_ifm() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56311,7 +56352,6 @@ void m68000_device::move_w_pais_dd_ifm() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56320,6 +56360,7 @@ void m68000_device::move_w_pais_dd_ifm() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56398,7 +56439,6 @@ void m68000_device::move_w_das_dd_ifm() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56407,6 +56447,7 @@ void m68000_device::move_w_das_dd_ifm() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56523,7 +56564,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56532,6 +56572,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56609,7 +56650,6 @@ void m68000_device::move_w_adr16_dd_ifm() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56618,6 +56658,7 @@ void m68000_device::move_w_adr16_dd_ifm() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56716,7 +56757,6 @@ void m68000_device::move_w_adr32_dd_ifm() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56725,6 +56765,7 @@ void m68000_device::move_w_adr32_dd_ifm() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56802,7 +56843,6 @@ void m68000_device::move_w_dpc_dd_ifm() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56811,6 +56851,7 @@ void m68000_device::move_w_dpc_dd_ifm() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56926,7 +56967,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -56935,6 +56975,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -56990,7 +57031,6 @@ void m68000_device::move_w_imm16_dd_ifm() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -56999,6 +57039,7 @@ void m68000_device::move_w_imm16_dd_ifm() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57033,12 +57074,12 @@ void m68000_device::movea_w_ds_ad_ifm() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57074,12 +57115,12 @@ void m68000_device::movea_w_as_ad_ifm() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57139,12 +57180,12 @@ void m68000_device::movea_w_ais_ad_ifm() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57205,12 +57246,12 @@ void m68000_device::movea_w_aips_ad_ifm() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57273,12 +57314,12 @@ void m68000_device::movea_w_pais_ad_ifm() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57357,12 +57398,12 @@ void m68000_device::movea_w_das_ad_ifm() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57479,12 +57520,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57562,12 +57603,12 @@ void m68000_device::movea_w_adr16_ad_ifm() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57666,12 +57707,12 @@ void m68000_device::movea_w_adr32_ad_ifm() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57749,12 +57790,12 @@ void m68000_device::movea_w_dpc_ad_ifm() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57870,12 +57911,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57931,12 +57972,12 @@ void m68000_device::movea_w_imm16_ad_ifm() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -57972,7 +58013,6 @@ void m68000_device::move_w_ds_aid_ifm() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -57998,10 +58038,10 @@ void m68000_device::move_w_ds_aid_ifm() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58034,7 +58074,6 @@ void m68000_device::move_w_as_aid_ifm() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -58060,10 +58099,10 @@ void m68000_device::move_w_as_aid_ifm() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58144,10 +58183,10 @@ void m68000_device::move_w_ais_aid_ifm() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58232,10 +58271,10 @@ void m68000_device::move_w_aips_aid_ifm() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58322,10 +58361,10 @@ void m68000_device::move_w_pais_aid_ifm() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58428,10 +58467,10 @@ void m68000_device::move_w_das_aid_ifm() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58572,10 +58611,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58677,10 +58716,10 @@ void m68000_device::move_w_adr16_aid_ifm() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58803,10 +58842,10 @@ void m68000_device::move_w_adr32_aid_ifm() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -58908,10 +58947,10 @@ void m68000_device::move_w_dpc_aid_ifm() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59051,10 +59090,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59110,7 +59149,6 @@ void m68000_device::move_w_imm16_aid_ifm() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59136,10 +59174,10 @@ void m68000_device::move_w_imm16_aid_ifm() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59172,7 +59210,6 @@ void m68000_device::move_w_ds_aipd_ifm() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59198,6 +59235,7 @@ void m68000_device::move_w_ds_aipd_ifm() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59232,7 +59270,6 @@ void m68000_device::move_w_as_aipd_ifm() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59258,6 +59295,7 @@ void m68000_device::move_w_as_aipd_ifm() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59316,7 +59354,6 @@ void m68000_device::move_w_ais_aipd_ifm() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59342,6 +59379,7 @@ void m68000_device::move_w_ais_aipd_ifm() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59404,7 +59442,6 @@ void m68000_device::move_w_aips_aipd_ifm() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59430,6 +59467,7 @@ void m68000_device::move_w_aips_aipd_ifm() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59494,7 +59532,6 @@ void m68000_device::move_w_pais_aipd_ifm() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59520,6 +59557,7 @@ void m68000_device::move_w_pais_aipd_ifm() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59600,7 +59638,6 @@ void m68000_device::move_w_das_aipd_ifm() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59626,6 +59663,7 @@ void m68000_device::move_w_das_aipd_ifm() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59744,7 +59782,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59770,6 +59807,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59849,7 +59887,6 @@ void m68000_device::move_w_adr16_aipd_ifm() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -59875,6 +59912,7 @@ void m68000_device::move_w_adr16_aipd_ifm() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -59975,7 +60013,6 @@ void m68000_device::move_w_adr32_aipd_ifm() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60001,6 +60038,7 @@ void m68000_device::move_w_adr32_aipd_ifm() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60080,7 +60118,6 @@ void m68000_device::move_w_dpc_aipd_ifm() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60106,6 +60143,7 @@ void m68000_device::move_w_dpc_aipd_ifm() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60223,7 +60261,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60249,6 +60286,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60306,7 +60344,6 @@ void m68000_device::move_w_imm16_aipd_ifm() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60332,6 +60369,7 @@ void m68000_device::move_w_imm16_aipd_ifm() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60366,7 +60404,6 @@ void m68000_device::move_w_ds_paid_ifm() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60393,6 +60430,7 @@ void m68000_device::move_w_ds_paid_ifm() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60426,7 +60464,6 @@ void m68000_device::move_w_as_paid_ifm() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60453,6 +60490,7 @@ void m68000_device::move_w_as_paid_ifm() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60510,7 +60548,6 @@ void m68000_device::move_w_ais_paid_ifm() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60537,6 +60574,7 @@ void m68000_device::move_w_ais_paid_ifm() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60598,7 +60636,6 @@ void m68000_device::move_w_aips_paid_ifm() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60625,6 +60662,7 @@ void m68000_device::move_w_aips_paid_ifm() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60688,7 +60726,6 @@ void m68000_device::move_w_pais_paid_ifm() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60715,6 +60752,7 @@ void m68000_device::move_w_pais_paid_ifm() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60794,7 +60832,6 @@ void m68000_device::move_w_das_paid_ifm() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60821,6 +60858,7 @@ void m68000_device::move_w_das_paid_ifm() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -60938,7 +60976,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -60965,6 +61002,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61043,7 +61081,6 @@ void m68000_device::move_w_adr16_paid_ifm() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61070,6 +61107,7 @@ void m68000_device::move_w_adr16_paid_ifm() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61169,7 +61207,6 @@ void m68000_device::move_w_adr32_paid_ifm() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61196,6 +61233,7 @@ void m68000_device::move_w_adr32_paid_ifm() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61274,7 +61312,6 @@ void m68000_device::move_w_dpc_paid_ifm() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61301,6 +61338,7 @@ void m68000_device::move_w_dpc_paid_ifm() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61417,7 +61455,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61444,6 +61481,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61500,7 +61538,6 @@ void m68000_device::move_w_imm16_paid_ifm() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61527,6 +61564,7 @@ void m68000_device::move_w_imm16_paid_ifm() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61581,7 +61619,6 @@ void m68000_device::move_w_ds_dad_ifm() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61606,11 +61643,11 @@ void m68000_device::move_w_ds_dad_ifm() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61664,7 +61701,6 @@ void m68000_device::move_w_as_dad_ifm() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61689,11 +61725,11 @@ void m68000_device::move_w_as_dad_ifm() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61774,6 +61810,7 @@ void m68000_device::move_w_ais_dad_ifm() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61798,11 +61835,11 @@ void m68000_device::move_w_ais_dad_ifm() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -61887,6 +61924,7 @@ void m68000_device::move_w_aips_dad_ifm() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -61911,11 +61949,11 @@ void m68000_device::move_w_aips_dad_ifm() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62002,6 +62040,7 @@ void m68000_device::move_w_pais_dad_ifm() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62026,11 +62065,11 @@ void m68000_device::move_w_pais_dad_ifm() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62133,6 +62172,7 @@ void m68000_device::move_w_das_dad_ifm() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62157,11 +62197,11 @@ void m68000_device::move_w_das_dad_ifm() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62302,6 +62342,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62326,11 +62367,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62432,6 +62473,7 @@ void m68000_device::move_w_adr16_dad_ifm() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62456,11 +62498,11 @@ void m68000_device::move_w_adr16_dad_ifm() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62583,6 +62625,7 @@ void m68000_device::move_w_adr32_dad_ifm() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62607,11 +62650,11 @@ void m68000_device::move_w_adr32_dad_ifm() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62713,6 +62756,7 @@ void m68000_device::move_w_dpc_dad_ifm() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62737,11 +62781,11 @@ void m68000_device::move_w_dpc_dad_ifm() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62881,6 +62925,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -62905,11 +62950,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -62986,7 +63031,6 @@ void m68000_device::move_w_imm16_dad_ifm() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63011,11 +63055,11 @@ void m68000_device::move_w_imm16_dad_ifm() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63108,7 +63152,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63133,11 +63176,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63230,7 +63273,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63255,11 +63297,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63378,6 +63420,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63402,11 +63445,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63529,6 +63572,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63553,11 +63597,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63682,6 +63726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63706,11 +63751,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -63851,6 +63896,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -63875,11 +63921,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64058,6 +64104,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64082,11 +64129,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64226,6 +64273,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64250,11 +64298,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64415,6 +64463,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64439,11 +64488,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64583,6 +64632,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64607,11 +64657,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64789,6 +64839,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64813,11 +64864,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -64933,7 +64984,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -64958,11 +65008,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65019,6 +65069,7 @@ void m68000_device::move_w_ds_adr16_ifm() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65043,11 +65094,11 @@ void m68000_device::move_w_ds_adr16_ifm() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65104,6 +65155,7 @@ void m68000_device::move_w_as_adr16_ifm() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65128,11 +65180,11 @@ void m68000_device::move_w_as_adr16_ifm() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65212,6 +65264,7 @@ void m68000_device::move_w_ais_adr16_ifm() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65236,11 +65289,11 @@ void m68000_device::move_w_ais_adr16_ifm() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65324,6 +65377,7 @@ void m68000_device::move_w_aips_adr16_ifm() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65348,11 +65402,11 @@ void m68000_device::move_w_aips_adr16_ifm() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65438,6 +65492,7 @@ void m68000_device::move_w_pais_adr16_ifm() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65462,11 +65517,11 @@ void m68000_device::move_w_pais_adr16_ifm() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65568,6 +65623,7 @@ void m68000_device::move_w_das_adr16_ifm() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65592,11 +65648,11 @@ void m68000_device::move_w_das_adr16_ifm() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65736,6 +65792,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65760,11 +65817,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -65865,6 +65922,7 @@ void m68000_device::move_w_adr16_adr16_ifm() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -65889,11 +65947,11 @@ void m68000_device::move_w_adr16_adr16_ifm() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66015,6 +66073,7 @@ void m68000_device::move_w_adr32_adr16_ifm() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66039,11 +66098,11 @@ void m68000_device::move_w_adr32_adr16_ifm() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66144,6 +66203,7 @@ void m68000_device::move_w_dpc_adr16_ifm() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66168,11 +66228,11 @@ void m68000_device::move_w_dpc_adr16_ifm() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66311,6 +66371,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66335,11 +66396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66419,6 +66480,7 @@ void m68000_device::move_w_imm16_adr16_ifm() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66443,11 +66505,11 @@ void m68000_device::move_w_imm16_adr16_ifm() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66525,6 +66587,7 @@ void m68000_device::move_w_ds_adr32_ifm() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66549,11 +66612,11 @@ void m68000_device::move_w_ds_adr32_ifm() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66631,6 +66694,7 @@ void m68000_device::move_w_as_adr32_ifm() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66655,11 +66719,11 @@ void m68000_device::move_w_as_adr32_ifm() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66739,7 +66803,6 @@ void m68000_device::move_w_ais_adr32_ifm() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66785,11 +66848,11 @@ void m68000_device::move_w_ais_adr32_ifm() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -66873,7 +66936,6 @@ void m68000_device::move_w_aips_adr32_ifm() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -66919,11 +66981,11 @@ void m68000_device::move_w_aips_adr32_ifm() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67009,7 +67071,6 @@ void m68000_device::move_w_pais_adr32_ifm() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67055,11 +67116,11 @@ void m68000_device::move_w_pais_adr32_ifm() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67161,7 +67222,6 @@ void m68000_device::move_w_das_adr32_ifm() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67207,11 +67267,11 @@ void m68000_device::move_w_das_adr32_ifm() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67351,7 +67411,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67397,11 +67456,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67502,7 +67561,6 @@ void m68000_device::move_w_adr16_adr32_ifm() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67548,11 +67606,11 @@ void m68000_device::move_w_adr16_adr32_ifm() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67674,7 +67732,6 @@ void m68000_device::move_w_adr32_adr32_ifm() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67720,11 +67777,11 @@ void m68000_device::move_w_adr32_adr32_ifm() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -67825,7 +67882,6 @@ void m68000_device::move_w_dpc_adr32_ifm() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -67871,11 +67927,11 @@ void m68000_device::move_w_dpc_adr32_ifm() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68014,7 +68070,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -68060,11 +68115,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68165,6 +68220,7 @@ void m68000_device::move_w_imm16_adr32_ifm() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -68189,11 +68245,11 @@ void m68000_device::move_w_imm16_adr32_ifm() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68225,7 +68281,6 @@ void m68000_device::negx_b_ds_ifm() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68233,6 +68288,7 @@ void m68000_device::negx_b_ds_ifm() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68287,7 +68343,6 @@ void m68000_device::negx_b_ais_ifm() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68314,6 +68369,7 @@ void m68000_device::negx_b_ais_ifm() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68365,7 +68421,6 @@ void m68000_device::negx_b_aips_ifm() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68392,6 +68447,7 @@ void m68000_device::negx_b_aips_ifm() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68445,7 +68501,6 @@ void m68000_device::negx_b_pais_ifm() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68472,6 +68527,7 @@ void m68000_device::negx_b_pais_ifm() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68541,7 +68597,6 @@ void m68000_device::negx_b_das_ifm() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68568,6 +68623,7 @@ void m68000_device::negx_b_das_ifm() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68675,7 +68731,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68702,6 +68757,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68770,7 +68826,6 @@ void m68000_device::negx_b_adr16_ifm() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68797,6 +68852,7 @@ void m68000_device::negx_b_adr16_ifm() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68886,7 +68942,6 @@ void m68000_device::negx_b_adr32_ifm() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -68913,6 +68968,7 @@ void m68000_device::negx_b_adr32_ifm() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -68939,7 +68995,6 @@ void m68000_device::negx_w_ds_ifm() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -68947,6 +69002,7 @@ void m68000_device::negx_w_ds_ifm() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69004,7 +69060,6 @@ void m68000_device::negx_w_ais_ifm() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69031,6 +69086,7 @@ void m68000_device::negx_w_ais_ifm() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69090,7 +69146,6 @@ void m68000_device::negx_w_aips_ifm() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69117,6 +69172,7 @@ void m68000_device::negx_w_aips_ifm() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69178,7 +69234,6 @@ void m68000_device::negx_w_pais_ifm() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69205,6 +69260,7 @@ void m68000_device::negx_w_pais_ifm() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69282,7 +69338,6 @@ void m68000_device::negx_w_das_ifm() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69309,6 +69364,7 @@ void m68000_device::negx_w_das_ifm() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69424,7 +69480,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69451,6 +69506,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69527,7 +69583,6 @@ void m68000_device::negx_w_adr16_ifm() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69554,6 +69609,7 @@ void m68000_device::negx_w_adr16_ifm() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69651,7 +69707,6 @@ void m68000_device::negx_w_adr32_ifm() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69678,6 +69733,7 @@ void m68000_device::negx_w_adr32_ifm() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69709,7 +69765,6 @@ void m68000_device::negx_l_ds_ifm() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -69740,6 +69795,7 @@ void m68000_device::negx_l_ds_ifm() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -69801,7 +69857,6 @@ void m68000_device::negx_l_ais_ifm() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69851,6 +69906,7 @@ void m68000_device::negx_l_ais_ifm() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -69930,7 +69986,6 @@ void m68000_device::negx_l_aips_ifm() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -69980,6 +70035,7 @@ void m68000_device::negx_l_aips_ifm() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70060,7 +70116,6 @@ void m68000_device::negx_l_pais_ifm() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70110,6 +70165,7 @@ void m68000_device::negx_l_pais_ifm() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70207,7 +70263,6 @@ void m68000_device::negx_l_das_ifm() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70257,6 +70312,7 @@ void m68000_device::negx_l_das_ifm() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70392,7 +70448,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70442,6 +70497,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70541,7 +70597,6 @@ void m68000_device::negx_l_adr16_ifm() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70591,6 +70646,7 @@ void m68000_device::negx_l_adr16_ifm() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70711,7 +70767,6 @@ void m68000_device::negx_l_adr32_ifm() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -70761,6 +70816,7 @@ void m68000_device::negx_l_adr32_ifm() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70792,7 +70848,6 @@ void m68000_device::move_sr_ds_ifm() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -70817,6 +70872,7 @@ void m68000_device::move_sr_ds_ifm() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -70856,7 +70912,6 @@ void m68000_device::move_sr_ais_ifm() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70884,6 +70939,7 @@ void m68000_device::move_sr_ais_ifm() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -70943,7 +70999,6 @@ void m68000_device::move_sr_aips_ifm() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -70971,6 +71026,7 @@ void m68000_device::move_sr_aips_ifm() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71032,7 +71088,6 @@ void m68000_device::move_sr_pais_ifm() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71060,6 +71115,7 @@ void m68000_device::move_sr_pais_ifm() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71137,7 +71193,6 @@ void m68000_device::move_sr_das_ifm() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71165,6 +71220,7 @@ void m68000_device::move_sr_das_ifm() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71280,7 +71336,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71308,6 +71363,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71384,7 +71440,6 @@ void m68000_device::move_sr_adr16_ifm() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71412,6 +71467,7 @@ void m68000_device::move_sr_adr16_ifm() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71509,7 +71565,6 @@ void m68000_device::move_sr_adr32_ifm() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -71537,6 +71592,7 @@ void m68000_device::move_sr_adr32_ifm() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -71734,7 +71790,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71749,6 +71804,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -71776,7 +71832,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71978,7 +72033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -71993,6 +72047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72020,7 +72075,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72226,7 +72280,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72241,6 +72294,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72268,7 +72322,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72476,7 +72529,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72491,6 +72543,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72518,7 +72571,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72742,7 +72794,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -72757,6 +72808,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -72784,7 +72836,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73046,7 +73097,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73061,6 +73111,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73088,7 +73139,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73311,7 +73361,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73326,6 +73375,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73353,7 +73403,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73597,7 +73646,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73612,6 +73660,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73639,7 +73688,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73862,7 +73910,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -73877,6 +73924,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -73904,7 +73952,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74165,7 +74212,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74180,6 +74226,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74207,7 +74254,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74408,7 +74454,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74423,6 +74468,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74450,7 +74496,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -74463,13 +74508,13 @@ void m68000_device::lea_ais_ad_ifm() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74527,11 +74572,11 @@ void m68000_device::lea_das_ad_ifm() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74627,11 +74672,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74684,11 +74729,11 @@ void m68000_device::lea_adr16_ad_ifm() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74764,11 +74809,11 @@ void m68000_device::lea_adr32_ad_ifm() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74823,11 +74868,11 @@ void m68000_device::lea_dpc_ad_ifm() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74922,11 +74967,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -74958,7 +75003,6 @@ void m68000_device::clr_b_ds_ifm() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -74966,6 +75010,7 @@ void m68000_device::clr_b_ds_ifm() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75022,7 +75067,6 @@ void m68000_device::clr_b_ais_ifm() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75049,6 +75093,7 @@ void m68000_device::clr_b_ais_ifm() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75103,7 +75148,6 @@ void m68000_device::clr_b_aips_ifm() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75130,6 +75174,7 @@ void m68000_device::clr_b_aips_ifm() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75186,7 +75231,6 @@ void m68000_device::clr_b_pais_ifm() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75213,6 +75257,7 @@ void m68000_device::clr_b_pais_ifm() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75285,7 +75330,6 @@ void m68000_device::clr_b_das_ifm() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75312,6 +75356,7 @@ void m68000_device::clr_b_das_ifm() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75424,7 +75469,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75451,6 +75495,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75522,7 +75567,6 @@ void m68000_device::clr_b_adr16_ifm() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75549,6 +75593,7 @@ void m68000_device::clr_b_adr16_ifm() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75642,7 +75687,6 @@ void m68000_device::clr_b_adr32_ifm() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75669,6 +75713,7 @@ void m68000_device::clr_b_adr32_ifm() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -75696,7 +75741,6 @@ void m68000_device::clr_w_ds_ifm() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -75704,6 +75748,7 @@ void m68000_device::clr_w_ds_ifm() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75763,7 +75808,6 @@ void m68000_device::clr_w_ais_ifm() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75790,6 +75834,7 @@ void m68000_device::clr_w_ais_ifm() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -75852,7 +75897,6 @@ void m68000_device::clr_w_aips_ifm() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75879,6 +75923,7 @@ void m68000_device::clr_w_aips_ifm() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -75943,7 +75988,6 @@ void m68000_device::clr_w_pais_ifm() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -75970,6 +76014,7 @@ void m68000_device::clr_w_pais_ifm() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76050,7 +76095,6 @@ void m68000_device::clr_w_das_ifm() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76077,6 +76121,7 @@ void m68000_device::clr_w_das_ifm() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76197,7 +76242,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76224,6 +76268,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76303,7 +76348,6 @@ void m68000_device::clr_w_adr16_ifm() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76330,6 +76374,7 @@ void m68000_device::clr_w_adr16_ifm() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76431,7 +76476,6 @@ void m68000_device::clr_w_adr32_ifm() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76458,6 +76502,7 @@ void m68000_device::clr_w_adr32_ifm() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76490,7 +76535,6 @@ void m68000_device::clr_l_ds_ifm() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -76521,6 +76565,7 @@ void m68000_device::clr_l_ds_ifm() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -76584,7 +76629,6 @@ void m68000_device::clr_l_ais_ifm() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76634,6 +76678,7 @@ void m68000_device::clr_l_ais_ifm() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76716,7 +76761,6 @@ void m68000_device::clr_l_aips_ifm() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76766,6 +76810,7 @@ void m68000_device::clr_l_aips_ifm() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76849,7 +76894,6 @@ void m68000_device::clr_l_pais_ifm() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -76899,6 +76943,7 @@ void m68000_device::clr_l_pais_ifm() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -76999,7 +77044,6 @@ void m68000_device::clr_l_das_ifm() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77049,6 +77093,7 @@ void m68000_device::clr_l_das_ifm() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77189,7 +77234,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77239,6 +77283,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77342,7 +77387,6 @@ void m68000_device::clr_l_adr16_ifm() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77392,6 +77436,7 @@ void m68000_device::clr_l_adr16_ifm() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77517,7 +77562,6 @@ void m68000_device::clr_l_adr32_ifm() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77567,6 +77611,7 @@ void m68000_device::clr_l_adr32_ifm() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -77599,7 +77644,6 @@ void m68000_device::neg_b_ds_ifm() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -77607,6 +77651,7 @@ void m68000_device::neg_b_ds_ifm() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77661,7 +77706,6 @@ void m68000_device::neg_b_ais_ifm() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77688,6 +77732,7 @@ void m68000_device::neg_b_ais_ifm() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77739,7 +77784,6 @@ void m68000_device::neg_b_aips_ifm() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77766,6 +77810,7 @@ void m68000_device::neg_b_aips_ifm() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77819,7 +77864,6 @@ void m68000_device::neg_b_pais_ifm() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77846,6 +77890,7 @@ void m68000_device::neg_b_pais_ifm() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -77915,7 +77960,6 @@ void m68000_device::neg_b_das_ifm() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -77942,6 +77986,7 @@ void m68000_device::neg_b_das_ifm() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78049,7 +78094,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78076,6 +78120,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78144,7 +78189,6 @@ void m68000_device::neg_b_adr16_ifm() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78171,6 +78215,7 @@ void m68000_device::neg_b_adr16_ifm() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78260,7 +78305,6 @@ void m68000_device::neg_b_adr32_ifm() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78287,6 +78331,7 @@ void m68000_device::neg_b_adr32_ifm() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -78313,7 +78358,6 @@ void m68000_device::neg_w_ds_ifm() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -78321,6 +78365,7 @@ void m68000_device::neg_w_ds_ifm() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78378,7 +78423,6 @@ void m68000_device::neg_w_ais_ifm() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78405,6 +78449,7 @@ void m68000_device::neg_w_ais_ifm() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78464,7 +78509,6 @@ void m68000_device::neg_w_aips_ifm() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78491,6 +78535,7 @@ void m68000_device::neg_w_aips_ifm() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78552,7 +78597,6 @@ void m68000_device::neg_w_pais_ifm() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78579,6 +78623,7 @@ void m68000_device::neg_w_pais_ifm() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78656,7 +78701,6 @@ void m68000_device::neg_w_das_ifm() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78683,6 +78727,7 @@ void m68000_device::neg_w_das_ifm() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78798,7 +78843,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78825,6 +78869,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -78901,7 +78946,6 @@ void m68000_device::neg_w_adr16_ifm() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -78928,6 +78972,7 @@ void m68000_device::neg_w_adr16_ifm() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79025,7 +79070,6 @@ void m68000_device::neg_w_adr32_ifm() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79052,6 +79096,7 @@ void m68000_device::neg_w_adr32_ifm() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79083,7 +79128,6 @@ void m68000_device::neg_l_ds_ifm() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -79114,6 +79158,7 @@ void m68000_device::neg_l_ds_ifm() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79175,7 +79220,6 @@ void m68000_device::neg_l_ais_ifm() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79225,6 +79269,7 @@ void m68000_device::neg_l_ais_ifm() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79304,7 +79349,6 @@ void m68000_device::neg_l_aips_ifm() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79354,6 +79398,7 @@ void m68000_device::neg_l_aips_ifm() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79434,7 +79479,6 @@ void m68000_device::neg_l_pais_ifm() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79484,6 +79528,7 @@ void m68000_device::neg_l_pais_ifm() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79581,7 +79626,6 @@ void m68000_device::neg_l_das_ifm() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79631,6 +79675,7 @@ void m68000_device::neg_l_das_ifm() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79766,7 +79811,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79816,6 +79860,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -79915,7 +79960,6 @@ void m68000_device::neg_l_adr16_ifm() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -79965,6 +80009,7 @@ void m68000_device::neg_l_adr16_ifm() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -80085,7 +80130,6 @@ void m68000_device::neg_l_adr32_ifm() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80135,6 +80179,7 @@ void m68000_device::neg_l_adr32_ifm() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -80198,11 +80243,11 @@ void m68000_device::move_ds_ccr_ifm() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80290,11 +80335,11 @@ void m68000_device::move_ais_ccr_ifm() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80386,11 +80431,11 @@ void m68000_device::move_aips_ccr_ifm() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80484,11 +80529,11 @@ void m68000_device::move_pais_ccr_ifm() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80598,11 +80643,11 @@ void m68000_device::move_das_ccr_ifm() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80750,11 +80795,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80863,11 +80908,11 @@ void m68000_device::move_adr16_ccr_ifm() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -80997,11 +81042,11 @@ void m68000_device::move_adr32_ccr_ifm() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81110,11 +81155,11 @@ void m68000_device::move_dpc_ccr_ifm() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81261,11 +81306,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81352,11 +81397,11 @@ void m68000_device::move_imm8_ccr_ifm() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81388,7 +81433,6 @@ void m68000_device::not_b_ds_ifm() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -81396,6 +81440,7 @@ void m68000_device::not_b_ds_ifm() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81450,7 +81495,6 @@ void m68000_device::not_b_ais_ifm() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81477,6 +81521,7 @@ void m68000_device::not_b_ais_ifm() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81528,7 +81573,6 @@ void m68000_device::not_b_aips_ifm() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81555,6 +81599,7 @@ void m68000_device::not_b_aips_ifm() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81608,7 +81653,6 @@ void m68000_device::not_b_pais_ifm() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81635,6 +81679,7 @@ void m68000_device::not_b_pais_ifm() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81704,7 +81749,6 @@ void m68000_device::not_b_das_ifm() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81731,6 +81775,7 @@ void m68000_device::not_b_das_ifm() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81838,7 +81883,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81865,6 +81909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -81933,7 +81978,6 @@ void m68000_device::not_b_adr16_ifm() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -81960,6 +82004,7 @@ void m68000_device::not_b_adr16_ifm() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82049,7 +82094,6 @@ void m68000_device::not_b_adr32_ifm() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82076,6 +82120,7 @@ void m68000_device::not_b_adr32_ifm() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -82102,7 +82147,6 @@ void m68000_device::not_w_ds_ifm() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82110,6 +82154,7 @@ void m68000_device::not_w_ds_ifm() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82167,7 +82212,6 @@ void m68000_device::not_w_ais_ifm() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82194,6 +82238,7 @@ void m68000_device::not_w_ais_ifm() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82253,7 +82298,6 @@ void m68000_device::not_w_aips_ifm() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82280,6 +82324,7 @@ void m68000_device::not_w_aips_ifm() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82341,7 +82386,6 @@ void m68000_device::not_w_pais_ifm() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82368,6 +82412,7 @@ void m68000_device::not_w_pais_ifm() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82445,7 +82490,6 @@ void m68000_device::not_w_das_ifm() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82472,6 +82516,7 @@ void m68000_device::not_w_das_ifm() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82587,7 +82632,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82614,6 +82658,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82690,7 +82735,6 @@ void m68000_device::not_w_adr16_ifm() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82717,6 +82761,7 @@ void m68000_device::not_w_adr16_ifm() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82814,7 +82859,6 @@ void m68000_device::not_w_adr32_ifm() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -82841,6 +82885,7 @@ void m68000_device::not_w_adr32_ifm() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -82872,7 +82917,6 @@ void m68000_device::not_l_ds_ifm() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -82903,6 +82947,7 @@ void m68000_device::not_l_ds_ifm() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -82964,7 +83009,6 @@ void m68000_device::not_l_ais_ifm() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83014,6 +83058,7 @@ void m68000_device::not_l_ais_ifm() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83093,7 +83138,6 @@ void m68000_device::not_l_aips_ifm() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83143,6 +83187,7 @@ void m68000_device::not_l_aips_ifm() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83223,7 +83268,6 @@ void m68000_device::not_l_pais_ifm() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83273,6 +83317,7 @@ void m68000_device::not_l_pais_ifm() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83370,7 +83415,6 @@ void m68000_device::not_l_das_ifm() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83420,6 +83464,7 @@ void m68000_device::not_l_das_ifm() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83555,7 +83600,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83605,6 +83649,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83704,7 +83749,6 @@ void m68000_device::not_l_adr16_ifm() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83754,6 +83798,7 @@ void m68000_device::not_l_adr16_ifm() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83874,7 +83919,6 @@ void m68000_device::not_l_adr32_ifm() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -83924,6 +83968,7 @@ void m68000_device::not_l_adr32_ifm() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -83993,11 +84038,11 @@ void m68000_device::move_ds_sr_ifm() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84091,11 +84136,11 @@ void m68000_device::move_ais_sr_ifm() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84193,11 +84238,11 @@ void m68000_device::move_aips_sr_ifm() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84297,11 +84342,11 @@ void m68000_device::move_pais_sr_ifm() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84417,11 +84462,11 @@ void m68000_device::move_das_sr_ifm() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84575,11 +84620,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84694,11 +84739,11 @@ void m68000_device::move_adr16_sr_ifm() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84834,11 +84879,11 @@ void m68000_device::move_adr32_sr_ifm() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -84953,11 +84998,11 @@ void m68000_device::move_dpc_sr_ifm() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -85110,11 +85155,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -85207,11 +85252,11 @@ void m68000_device::move_i16u_sr_ifm() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -85243,7 +85288,6 @@ void m68000_device::nbcd_b_ds_ifm() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -85272,6 +85316,7 @@ void m68000_device::nbcd_b_ds_ifm() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -85309,7 +85354,6 @@ void m68000_device::nbcd_b_ais_ifm() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85338,6 +85382,7 @@ void m68000_device::nbcd_b_ais_ifm() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85389,7 +85434,6 @@ void m68000_device::nbcd_b_aips_ifm() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85418,6 +85462,7 @@ void m68000_device::nbcd_b_aips_ifm() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85471,7 +85516,6 @@ void m68000_device::nbcd_b_pais_ifm() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85500,6 +85544,7 @@ void m68000_device::nbcd_b_pais_ifm() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85569,7 +85614,6 @@ void m68000_device::nbcd_b_das_ifm() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85598,6 +85642,7 @@ void m68000_device::nbcd_b_das_ifm() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85705,7 +85750,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85734,6 +85778,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85802,7 +85847,6 @@ void m68000_device::nbcd_b_adr16_ifm() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85831,6 +85875,7 @@ void m68000_device::nbcd_b_adr16_ifm() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85920,7 +85965,6 @@ void m68000_device::nbcd_b_adr32_ifm() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -85949,6 +85993,7 @@ void m68000_device::nbcd_b_adr32_ifm() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -85975,7 +86020,6 @@ void m68000_device::swap_ds_ifm() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -85984,6 +86028,7 @@ void m68000_device::swap_ds_ifm() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86020,7 +86065,6 @@ void m68000_device::pea_ais_ifm() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86068,6 +86112,7 @@ void m68000_device::pea_ais_ifm() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86123,7 +86168,6 @@ void m68000_device::pea_das_ifm() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86173,6 +86217,7 @@ void m68000_device::pea_das_ifm() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86262,7 +86307,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86314,6 +86358,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86387,6 +86432,7 @@ void m68000_device::pea_adr16_ifm() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86411,11 +86457,11 @@ void m68000_device::pea_adr16_ifm() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86510,6 +86556,7 @@ void m68000_device::pea_adr32_ifm() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86534,11 +86581,11 @@ void m68000_device::pea_adr32_ifm() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86593,7 +86640,6 @@ void m68000_device::pea_dpc_ifm() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -86643,6 +86689,7 @@ void m68000_device::pea_dpc_ifm() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86731,7 +86778,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -86783,6 +86829,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -86814,7 +86861,6 @@ void m68000_device::ext_w_ds_ifm() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -86822,6 +86868,7 @@ void m68000_device::ext_w_ds_ifm() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -86914,10 +86961,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87010,11 +87057,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87128,10 +87175,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87283,10 +87330,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87400,10 +87447,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87538,10 +87585,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87573,7 +87620,6 @@ void m68000_device::ext_l_ds_ifm() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -87581,6 +87627,7 @@ void m68000_device::ext_l_ds_ifm() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87693,10 +87740,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87810,11 +87857,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -87948,10 +87995,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88123,10 +88170,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88260,10 +88307,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88418,10 +88465,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88453,7 +88500,6 @@ void m68000_device::tst_b_ds_ifm() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -88462,6 +88508,7 @@ void m68000_device::tst_b_ds_ifm() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88516,7 +88563,6 @@ void m68000_device::tst_b_ais_ifm() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88524,6 +88570,7 @@ void m68000_device::tst_b_ais_ifm() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88583,7 +88630,6 @@ void m68000_device::tst_b_aips_ifm() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88591,6 +88637,7 @@ void m68000_device::tst_b_aips_ifm() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88652,7 +88699,6 @@ void m68000_device::tst_b_pais_ifm() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88660,6 +88706,7 @@ void m68000_device::tst_b_pais_ifm() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88737,7 +88784,6 @@ void m68000_device::tst_b_das_ifm() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88745,6 +88791,7 @@ void m68000_device::tst_b_das_ifm() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88862,7 +88909,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88870,6 +88916,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -88946,7 +88993,6 @@ void m68000_device::tst_b_adr16_ifm() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -88954,6 +89000,7 @@ void m68000_device::tst_b_adr16_ifm() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89052,7 +89099,6 @@ void m68000_device::tst_b_adr32_ifm() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89060,6 +89106,7 @@ void m68000_device::tst_b_adr32_ifm() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89092,7 +89139,6 @@ void m68000_device::tst_w_ds_ifm() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89101,6 +89147,7 @@ void m68000_device::tst_w_ds_ifm() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89158,7 +89205,6 @@ void m68000_device::tst_w_ais_ifm() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89166,6 +89212,7 @@ void m68000_device::tst_w_ais_ifm() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89228,7 +89275,6 @@ void m68000_device::tst_w_aips_ifm() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89236,6 +89282,7 @@ void m68000_device::tst_w_aips_ifm() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89300,7 +89347,6 @@ void m68000_device::tst_w_pais_ifm() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89308,6 +89354,7 @@ void m68000_device::tst_w_pais_ifm() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89388,7 +89435,6 @@ void m68000_device::tst_w_das_ifm() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89396,6 +89442,7 @@ void m68000_device::tst_w_das_ifm() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89516,7 +89563,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89524,6 +89570,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89603,7 +89650,6 @@ void m68000_device::tst_w_adr16_ifm() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89611,6 +89657,7 @@ void m68000_device::tst_w_adr16_ifm() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89712,7 +89759,6 @@ void m68000_device::tst_w_adr32_ifm() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89720,6 +89766,7 @@ void m68000_device::tst_w_adr32_ifm() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89752,7 +89799,6 @@ void m68000_device::tst_l_ds_ifm() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -89761,6 +89807,7 @@ void m68000_device::tst_l_ds_ifm() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89841,7 +89888,6 @@ void m68000_device::tst_l_ais_ifm() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89849,6 +89895,7 @@ void m68000_device::tst_l_ais_ifm() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -89933,7 +89980,6 @@ void m68000_device::tst_l_aips_ifm() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -89941,6 +89987,7 @@ void m68000_device::tst_l_aips_ifm() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90026,7 +90073,6 @@ void m68000_device::tst_l_pais_ifm() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90034,6 +90080,7 @@ void m68000_device::tst_l_pais_ifm() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90136,7 +90183,6 @@ void m68000_device::tst_l_das_ifm() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90144,6 +90190,7 @@ void m68000_device::tst_l_das_ifm() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90286,7 +90333,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90294,6 +90340,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90399,7 +90446,6 @@ void m68000_device::tst_l_adr16_ifm() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90407,6 +90453,7 @@ void m68000_device::tst_l_adr16_ifm() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90534,7 +90581,6 @@ void m68000_device::tst_l_adr32_ifm() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -90542,6 +90588,7 @@ void m68000_device::tst_l_adr32_ifm() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90576,13 +90623,13 @@ void m68000_device::tas_ds_ifm() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90668,12 +90715,12 @@ void m68000_device::tas_ais_ifm() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90760,12 +90807,12 @@ void m68000_device::tas_aips_ifm() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90854,12 +90901,12 @@ void m68000_device::tas_pais_ifm() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -90964,12 +91011,12 @@ void m68000_device::tas_das_ifm() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91114,12 +91161,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91223,12 +91270,12 @@ void m68000_device::tas_adr16_ifm() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91354,12 +91401,12 @@ void m68000_device::tas_adr32_ifm() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91473,10 +91520,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91531,7 +91578,6 @@ void m68000_device::movem_w_aips_list_ifm() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -91594,6 +91640,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91729,10 +91776,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -91905,10 +91952,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92042,10 +92089,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92203,10 +92250,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92341,10 +92388,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92516,10 +92563,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92653,10 +92700,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92711,7 +92758,6 @@ void m68000_device::movem_l_aips_list_ifm() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -92795,6 +92841,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -92951,10 +92998,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93148,10 +93195,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93306,10 +93353,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93488,10 +93535,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93647,10 +93694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -93843,10 +93890,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94022,11 +94069,11 @@ void m68000_device::trap_imm4_ifm() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94084,7 +94131,6 @@ void m68000_device::link_as_imm16_ifm() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -94127,6 +94173,7 @@ void m68000_device::link_as_imm16_ifm() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94183,7 +94230,6 @@ void m68000_device::unlk_as_ifm() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94209,6 +94255,7 @@ void m68000_device::unlk_as_ifm() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94245,13 +94292,13 @@ void m68000_device::move_as_usp_ifm() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94289,13 +94336,13 @@ void m68000_device::move_usp_as_ifm() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94331,6 +94378,7 @@ void m68000_device::reset_ifm() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94340,7 +94388,6 @@ void m68000_device::reset_ifm() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -94361,6 +94408,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94392,11 +94440,11 @@ void m68000_device::nop_ifm() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94430,6 +94478,7 @@ void m68000_device::stop_i16u_ifm() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -94439,6 +94488,7 @@ void m68000_device::stop_i16u_ifm() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -94551,11 +94601,11 @@ void m68000_device::rte_ifm() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94650,11 +94700,11 @@ void m68000_device::rts_ifm() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94685,7 +94735,6 @@ void m68000_device::trapv_ifm() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -94696,6 +94745,7 @@ void m68000_device::trapv_ifm() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -94882,11 +94932,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95007,11 +95057,11 @@ void m68000_device::rtr_ifm() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95085,7 +95135,6 @@ void m68000_device::jsr_ais_ifm() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95107,11 +95156,11 @@ void m68000_device::jsr_ais_ifm() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95191,7 +95240,6 @@ void m68000_device::jsr_das_ifm() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95213,11 +95261,11 @@ void m68000_device::jsr_das_ifm() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95317,7 +95365,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95339,11 +95386,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95419,7 +95466,6 @@ void m68000_device::jsr_adr16_ifm() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95441,11 +95487,11 @@ void m68000_device::jsr_adr16_ifm() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95540,7 +95586,6 @@ void m68000_device::jsr_adr32_ifm() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95562,11 +95607,11 @@ void m68000_device::jsr_adr32_ifm() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95645,7 +95690,6 @@ void m68000_device::jsr_dpc_ifm() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95667,11 +95711,11 @@ void m68000_device::jsr_dpc_ifm() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95770,7 +95814,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -95792,11 +95835,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95848,11 +95891,11 @@ void m68000_device::jmp_ais_ifm() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95908,11 +95951,11 @@ void m68000_device::jmp_das_ifm() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -95988,11 +96031,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96046,11 +96089,11 @@ void m68000_device::jmp_adr16_ifm() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96122,11 +96165,11 @@ void m68000_device::jmp_adr32_ifm() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96181,11 +96224,11 @@ void m68000_device::jmp_dpc_ifm() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96260,11 +96303,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96296,7 +96339,6 @@ void m68000_device::addq_b_imm3_ds_ifm() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -96304,6 +96346,7 @@ void m68000_device::addq_b_imm3_ds_ifm() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96358,7 +96401,6 @@ void m68000_device::addq_b_imm3_ais_ifm() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96386,6 +96428,7 @@ void m68000_device::addq_b_imm3_ais_ifm() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96437,7 +96480,6 @@ void m68000_device::addq_b_imm3_aips_ifm() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96465,6 +96507,7 @@ void m68000_device::addq_b_imm3_aips_ifm() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96518,7 +96561,6 @@ void m68000_device::addq_b_imm3_pais_ifm() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96546,6 +96588,7 @@ void m68000_device::addq_b_imm3_pais_ifm() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96615,7 +96658,6 @@ void m68000_device::addq_b_imm3_das_ifm() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96643,6 +96685,7 @@ void m68000_device::addq_b_imm3_das_ifm() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96750,7 +96793,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96778,6 +96820,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96846,7 +96889,6 @@ void m68000_device::addq_b_imm3_adr16_ifm() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96874,6 +96916,7 @@ void m68000_device::addq_b_imm3_adr16_ifm() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -96963,7 +97006,6 @@ void m68000_device::addq_b_imm3_adr32_ifm() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -96991,6 +97033,7 @@ void m68000_device::addq_b_imm3_adr32_ifm() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -97017,7 +97060,6 @@ void m68000_device::addq_w_imm3_ds_ifm() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97025,6 +97067,7 @@ void m68000_device::addq_w_imm3_ds_ifm() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97058,7 +97101,6 @@ void m68000_device::addq_w_imm3_as_ifm() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97089,6 +97131,7 @@ void m68000_device::addq_w_imm3_as_ifm() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97129,7 +97172,6 @@ void m68000_device::addq_w_imm3_ais_ifm() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97157,6 +97199,7 @@ void m68000_device::addq_w_imm3_ais_ifm() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97216,7 +97259,6 @@ void m68000_device::addq_w_imm3_aips_ifm() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97244,6 +97286,7 @@ void m68000_device::addq_w_imm3_aips_ifm() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97305,7 +97348,6 @@ void m68000_device::addq_w_imm3_pais_ifm() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97333,6 +97375,7 @@ void m68000_device::addq_w_imm3_pais_ifm() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97410,7 +97453,6 @@ void m68000_device::addq_w_imm3_das_ifm() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97438,6 +97480,7 @@ void m68000_device::addq_w_imm3_das_ifm() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97553,7 +97596,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97581,6 +97623,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97657,7 +97700,6 @@ void m68000_device::addq_w_imm3_adr16_ifm() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97685,6 +97727,7 @@ void m68000_device::addq_w_imm3_adr16_ifm() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97782,7 +97825,6 @@ void m68000_device::addq_w_imm3_adr32_ifm() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -97810,6 +97852,7 @@ void m68000_device::addq_w_imm3_adr32_ifm() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -97841,7 +97884,6 @@ void m68000_device::addq_l_imm3_ds_ifm() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -97874,6 +97916,7 @@ void m68000_device::addq_l_imm3_ds_ifm() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97890,7 +97933,6 @@ void m68000_device::addq_l_imm3_as_ifm() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -97921,6 +97963,7 @@ void m68000_device::addq_l_imm3_as_ifm() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97982,7 +98025,6 @@ void m68000_device::addq_l_imm3_ais_ifm() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98033,6 +98075,7 @@ void m68000_device::addq_l_imm3_ais_ifm() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98112,7 +98155,6 @@ void m68000_device::addq_l_imm3_aips_ifm() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98163,6 +98205,7 @@ void m68000_device::addq_l_imm3_aips_ifm() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98243,7 +98286,6 @@ void m68000_device::addq_l_imm3_pais_ifm() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98294,6 +98336,7 @@ void m68000_device::addq_l_imm3_pais_ifm() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98391,7 +98434,6 @@ void m68000_device::addq_l_imm3_das_ifm() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98442,6 +98484,7 @@ void m68000_device::addq_l_imm3_das_ifm() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98577,7 +98620,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98628,6 +98670,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98727,7 +98770,6 @@ void m68000_device::addq_l_imm3_adr16_ifm() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98778,6 +98820,7 @@ void m68000_device::addq_l_imm3_adr16_ifm() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98898,7 +98941,6 @@ void m68000_device::addq_l_imm3_adr32_ifm() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -98949,6 +98991,7 @@ void m68000_device::addq_l_imm3_adr32_ifm() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -98980,7 +99023,6 @@ void m68000_device::st_ds_ifm() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -98992,6 +99034,7 @@ void m68000_device::st_ds_ifm() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99043,6 +99086,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -99104,6 +99148,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -99135,12 +99180,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99169,12 +99214,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99205,6 +99250,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -99259,7 +99305,6 @@ void m68000_device::st_ais_ifm() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99321,6 +99366,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99375,7 +99421,6 @@ void m68000_device::st_aips_ifm() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99437,6 +99482,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99493,7 +99539,6 @@ void m68000_device::st_pais_ifm() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99555,6 +99600,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99627,7 +99673,6 @@ void m68000_device::st_das_ifm() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99689,6 +99734,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99801,7 +99847,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99863,6 +99908,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -99934,7 +99980,6 @@ void m68000_device::st_adr16_ifm() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -99996,6 +100041,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100089,7 +100135,6 @@ void m68000_device::st_adr32_ifm() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -100151,6 +100196,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100178,7 +100224,6 @@ void m68000_device::subq_b_imm3_ds_ifm() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100186,6 +100231,7 @@ void m68000_device::subq_b_imm3_ds_ifm() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100240,7 +100286,6 @@ void m68000_device::subq_b_imm3_ais_ifm() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100268,6 +100313,7 @@ void m68000_device::subq_b_imm3_ais_ifm() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100319,7 +100365,6 @@ void m68000_device::subq_b_imm3_aips_ifm() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100347,6 +100392,7 @@ void m68000_device::subq_b_imm3_aips_ifm() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100400,7 +100446,6 @@ void m68000_device::subq_b_imm3_pais_ifm() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100428,6 +100473,7 @@ void m68000_device::subq_b_imm3_pais_ifm() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100497,7 +100543,6 @@ void m68000_device::subq_b_imm3_das_ifm() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100525,6 +100570,7 @@ void m68000_device::subq_b_imm3_das_ifm() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100632,7 +100678,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100660,6 +100705,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100728,7 +100774,6 @@ void m68000_device::subq_b_imm3_adr16_ifm() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100756,6 +100801,7 @@ void m68000_device::subq_b_imm3_adr16_ifm() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100845,7 +100891,6 @@ void m68000_device::subq_b_imm3_adr32_ifm() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100873,6 +100918,7 @@ void m68000_device::subq_b_imm3_adr32_ifm() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -100899,7 +100945,6 @@ void m68000_device::subq_w_imm3_ds_ifm() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -100907,6 +100952,7 @@ void m68000_device::subq_w_imm3_ds_ifm() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -100940,7 +100986,6 @@ void m68000_device::subq_w_imm3_as_ifm() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -100971,6 +101016,7 @@ void m68000_device::subq_w_imm3_as_ifm() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101011,7 +101057,6 @@ void m68000_device::subq_w_imm3_ais_ifm() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101039,6 +101084,7 @@ void m68000_device::subq_w_imm3_ais_ifm() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101098,7 +101144,6 @@ void m68000_device::subq_w_imm3_aips_ifm() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101126,6 +101171,7 @@ void m68000_device::subq_w_imm3_aips_ifm() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101187,7 +101233,6 @@ void m68000_device::subq_w_imm3_pais_ifm() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101215,6 +101260,7 @@ void m68000_device::subq_w_imm3_pais_ifm() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101292,7 +101338,6 @@ void m68000_device::subq_w_imm3_das_ifm() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101320,6 +101365,7 @@ void m68000_device::subq_w_imm3_das_ifm() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101435,7 +101481,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101463,6 +101508,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101539,7 +101585,6 @@ void m68000_device::subq_w_imm3_adr16_ifm() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101567,6 +101612,7 @@ void m68000_device::subq_w_imm3_adr16_ifm() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101664,7 +101710,6 @@ void m68000_device::subq_w_imm3_adr32_ifm() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101692,6 +101737,7 @@ void m68000_device::subq_w_imm3_adr32_ifm() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101723,7 +101769,6 @@ void m68000_device::subq_l_imm3_ds_ifm() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -101756,6 +101801,7 @@ void m68000_device::subq_l_imm3_ds_ifm() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101772,7 +101818,6 @@ void m68000_device::subq_l_imm3_as_ifm() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -101803,6 +101848,7 @@ void m68000_device::subq_l_imm3_as_ifm() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -101864,7 +101910,6 @@ void m68000_device::subq_l_imm3_ais_ifm() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -101915,6 +101960,7 @@ void m68000_device::subq_l_imm3_ais_ifm() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -101994,7 +102040,6 @@ void m68000_device::subq_l_imm3_aips_ifm() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102045,6 +102090,7 @@ void m68000_device::subq_l_imm3_aips_ifm() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102125,7 +102171,6 @@ void m68000_device::subq_l_imm3_pais_ifm() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102176,6 +102221,7 @@ void m68000_device::subq_l_imm3_pais_ifm() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102273,7 +102319,6 @@ void m68000_device::subq_l_imm3_das_ifm() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102324,6 +102369,7 @@ void m68000_device::subq_l_imm3_das_ifm() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102459,7 +102505,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102510,6 +102555,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102609,7 +102655,6 @@ void m68000_device::subq_l_imm3_adr16_ifm() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102660,6 +102705,7 @@ void m68000_device::subq_l_imm3_adr16_ifm() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102780,7 +102826,6 @@ void m68000_device::subq_l_imm3_adr32_ifm() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102831,6 +102876,7 @@ void m68000_device::subq_l_imm3_adr32_ifm() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -102862,7 +102908,6 @@ void m68000_device::sf_ds_ifm() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -102874,6 +102919,7 @@ void m68000_device::sf_ds_ifm() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -102925,6 +102971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -102986,6 +103033,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -103017,12 +103065,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -103051,12 +103099,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -103087,6 +103135,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -103141,7 +103190,6 @@ void m68000_device::sf_ais_ifm() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103203,6 +103251,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103257,7 +103306,6 @@ void m68000_device::sf_aips_ifm() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103319,6 +103367,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103375,7 +103424,6 @@ void m68000_device::sf_pais_ifm() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103437,6 +103485,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103509,7 +103558,6 @@ void m68000_device::sf_das_ifm() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103571,6 +103619,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103683,7 +103732,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103745,6 +103793,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103816,7 +103865,6 @@ void m68000_device::sf_adr16_ifm() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -103878,6 +103926,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -103971,7 +104020,6 @@ void m68000_device::sf_adr32_ifm() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104033,6 +104081,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104060,7 +104109,6 @@ void m68000_device::shi_ds_ifm() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104072,6 +104120,7 @@ void m68000_device::shi_ds_ifm() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104123,6 +104172,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -104184,6 +104234,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -104215,12 +104266,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104249,12 +104300,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104285,6 +104336,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -104339,7 +104391,6 @@ void m68000_device::shi_ais_ifm() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104401,6 +104452,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104455,7 +104507,6 @@ void m68000_device::shi_aips_ifm() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104517,6 +104568,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104573,7 +104625,6 @@ void m68000_device::shi_pais_ifm() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104635,6 +104686,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104707,7 +104759,6 @@ void m68000_device::shi_das_ifm() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104769,6 +104820,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -104881,7 +104933,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -104943,6 +104994,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105014,7 +105066,6 @@ void m68000_device::shi_adr16_ifm() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105076,6 +105127,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105169,7 +105221,6 @@ void m68000_device::shi_adr32_ifm() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105231,6 +105282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105258,7 +105310,6 @@ void m68000_device::sls_ds_ifm() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105270,6 +105321,7 @@ void m68000_device::sls_ds_ifm() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105321,6 +105373,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -105382,6 +105435,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -105413,12 +105467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105447,12 +105501,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105483,6 +105537,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -105537,7 +105592,6 @@ void m68000_device::sls_ais_ifm() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105599,6 +105653,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105653,7 +105708,6 @@ void m68000_device::sls_aips_ifm() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105715,6 +105769,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105771,7 +105826,6 @@ void m68000_device::sls_pais_ifm() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105833,6 +105887,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -105905,7 +105960,6 @@ void m68000_device::sls_das_ifm() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -105967,6 +106021,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106079,7 +106134,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106141,6 +106195,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106212,7 +106267,6 @@ void m68000_device::sls_adr16_ifm() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106274,6 +106328,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106367,7 +106422,6 @@ void m68000_device::sls_adr32_ifm() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106429,6 +106483,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106456,7 +106511,6 @@ void m68000_device::scc_ds_ifm() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106468,6 +106522,7 @@ void m68000_device::scc_ds_ifm() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106519,6 +106574,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -106580,6 +106636,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -106611,12 +106668,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106645,12 +106702,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106681,6 +106738,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -106735,7 +106793,6 @@ void m68000_device::scc_ais_ifm() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106797,6 +106854,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106851,7 +106909,6 @@ void m68000_device::scc_aips_ifm() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -106913,6 +106970,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -106969,7 +107027,6 @@ void m68000_device::scc_pais_ifm() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107031,6 +107088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107103,7 +107161,6 @@ void m68000_device::scc_das_ifm() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107165,6 +107222,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107277,7 +107335,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107339,6 +107396,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107410,7 +107468,6 @@ void m68000_device::scc_adr16_ifm() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107472,6 +107529,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107565,7 +107623,6 @@ void m68000_device::scc_adr32_ifm() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107627,6 +107684,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -107654,7 +107712,6 @@ void m68000_device::scs_ds_ifm() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107666,6 +107723,7 @@ void m68000_device::scs_ds_ifm() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107717,6 +107775,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -107778,6 +107837,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -107809,12 +107869,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107843,12 +107903,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107879,6 +107939,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -107933,7 +107994,6 @@ void m68000_device::scs_ais_ifm() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -107995,6 +108055,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108049,7 +108110,6 @@ void m68000_device::scs_aips_ifm() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108111,6 +108171,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108167,7 +108228,6 @@ void m68000_device::scs_pais_ifm() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108229,6 +108289,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108301,7 +108362,6 @@ void m68000_device::scs_das_ifm() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108363,6 +108423,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108475,7 +108536,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108537,6 +108597,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108608,7 +108669,6 @@ void m68000_device::scs_adr16_ifm() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108670,6 +108730,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108763,7 +108824,6 @@ void m68000_device::scs_adr32_ifm() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108825,6 +108885,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -108852,7 +108913,6 @@ void m68000_device::sne_ds_ifm() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -108864,6 +108924,7 @@ void m68000_device::sne_ds_ifm() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -108915,6 +108976,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -108976,6 +109038,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -109007,12 +109070,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -109041,12 +109104,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -109077,6 +109140,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -109131,7 +109195,6 @@ void m68000_device::sne_ais_ifm() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109193,6 +109256,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109247,7 +109311,6 @@ void m68000_device::sne_aips_ifm() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109309,6 +109372,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109365,7 +109429,6 @@ void m68000_device::sne_pais_ifm() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109427,6 +109490,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109499,7 +109563,6 @@ void m68000_device::sne_das_ifm() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109561,6 +109624,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109673,7 +109737,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109735,6 +109798,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109806,7 +109870,6 @@ void m68000_device::sne_adr16_ifm() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -109868,6 +109931,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -109961,7 +110025,6 @@ void m68000_device::sne_adr32_ifm() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110023,6 +110086,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110050,7 +110114,6 @@ void m68000_device::seq_ds_ifm() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110062,6 +110125,7 @@ void m68000_device::seq_ds_ifm() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110113,6 +110177,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -110174,6 +110239,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -110205,12 +110271,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110239,12 +110305,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110275,6 +110341,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -110329,7 +110396,6 @@ void m68000_device::seq_ais_ifm() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110391,6 +110457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110445,7 +110512,6 @@ void m68000_device::seq_aips_ifm() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110507,6 +110573,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110563,7 +110630,6 @@ void m68000_device::seq_pais_ifm() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110625,6 +110691,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110697,7 +110764,6 @@ void m68000_device::seq_das_ifm() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110759,6 +110825,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -110871,7 +110938,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -110933,6 +110999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111004,7 +111071,6 @@ void m68000_device::seq_adr16_ifm() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111066,6 +111132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111159,7 +111226,6 @@ void m68000_device::seq_adr32_ifm() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111221,6 +111287,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111248,7 +111315,6 @@ void m68000_device::svc_ds_ifm() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111260,6 +111326,7 @@ void m68000_device::svc_ds_ifm() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111311,6 +111378,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -111372,6 +111440,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -111403,12 +111472,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111437,12 +111506,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111473,6 +111542,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -111527,7 +111597,6 @@ void m68000_device::svc_ais_ifm() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111589,6 +111658,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111643,7 +111713,6 @@ void m68000_device::svc_aips_ifm() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111705,6 +111774,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111761,7 +111831,6 @@ void m68000_device::svc_pais_ifm() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111823,6 +111892,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -111895,7 +111965,6 @@ void m68000_device::svc_das_ifm() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -111957,6 +112026,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112069,7 +112139,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112131,6 +112200,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112202,7 +112272,6 @@ void m68000_device::svc_adr16_ifm() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112264,6 +112333,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112357,7 +112427,6 @@ void m68000_device::svc_adr32_ifm() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112419,6 +112488,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112446,7 +112516,6 @@ void m68000_device::svs_ds_ifm() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112458,6 +112527,7 @@ void m68000_device::svs_ds_ifm() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112509,6 +112579,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112570,6 +112641,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112601,12 +112673,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112635,12 +112707,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112671,6 +112743,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -112725,7 +112798,6 @@ void m68000_device::svs_ais_ifm() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112787,6 +112859,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112841,7 +112914,6 @@ void m68000_device::svs_aips_ifm() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112903,6 +112975,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -112959,7 +113032,6 @@ void m68000_device::svs_pais_ifm() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113021,6 +113093,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113093,7 +113166,6 @@ void m68000_device::svs_das_ifm() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113155,6 +113227,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113267,7 +113340,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113329,6 +113401,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113400,7 +113473,6 @@ void m68000_device::svs_adr16_ifm() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113462,6 +113534,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113555,7 +113628,6 @@ void m68000_device::svs_adr32_ifm() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113617,6 +113689,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -113644,7 +113717,6 @@ void m68000_device::spl_ds_ifm() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113656,6 +113728,7 @@ void m68000_device::spl_ds_ifm() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113707,6 +113780,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -113768,6 +113842,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -113799,12 +113874,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113833,12 +113908,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113869,6 +113944,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -113923,7 +113999,6 @@ void m68000_device::spl_ais_ifm() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113985,6 +114060,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114039,7 +114115,6 @@ void m68000_device::spl_aips_ifm() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114101,6 +114176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114157,7 +114233,6 @@ void m68000_device::spl_pais_ifm() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114219,6 +114294,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114291,7 +114367,6 @@ void m68000_device::spl_das_ifm() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114353,6 +114428,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114465,7 +114541,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114527,6 +114602,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114598,7 +114674,6 @@ void m68000_device::spl_adr16_ifm() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114660,6 +114735,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114753,7 +114829,6 @@ void m68000_device::spl_adr32_ifm() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114815,6 +114890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -114842,7 +114918,6 @@ void m68000_device::smi_ds_ifm() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114854,6 +114929,7 @@ void m68000_device::smi_ds_ifm() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -114905,6 +114981,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -114966,6 +115043,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -114997,12 +115075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -115031,12 +115109,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -115067,6 +115145,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -115121,7 +115200,6 @@ void m68000_device::smi_ais_ifm() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115183,6 +115261,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115237,7 +115316,6 @@ void m68000_device::smi_aips_ifm() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115299,6 +115377,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115355,7 +115434,6 @@ void m68000_device::smi_pais_ifm() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115417,6 +115495,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115489,7 +115568,6 @@ void m68000_device::smi_das_ifm() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115551,6 +115629,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115663,7 +115742,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115725,6 +115803,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115796,7 +115875,6 @@ void m68000_device::smi_adr16_ifm() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -115858,6 +115936,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -115951,7 +116030,6 @@ void m68000_device::smi_adr32_ifm() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116013,6 +116091,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116040,7 +116119,6 @@ void m68000_device::sge_ds_ifm() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116052,6 +116130,7 @@ void m68000_device::sge_ds_ifm() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116103,6 +116182,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -116164,6 +116244,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -116195,12 +116276,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116229,12 +116310,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116265,6 +116346,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -116319,7 +116401,6 @@ void m68000_device::sge_ais_ifm() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116381,6 +116462,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116435,7 +116517,6 @@ void m68000_device::sge_aips_ifm() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116497,6 +116578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116553,7 +116635,6 @@ void m68000_device::sge_pais_ifm() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116615,6 +116696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116687,7 +116769,6 @@ void m68000_device::sge_das_ifm() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116749,6 +116830,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116861,7 +116943,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -116923,6 +117004,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -116994,7 +117076,6 @@ void m68000_device::sge_adr16_ifm() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117056,6 +117137,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117149,7 +117231,6 @@ void m68000_device::sge_adr32_ifm() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117211,6 +117292,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117238,7 +117320,6 @@ void m68000_device::slt_ds_ifm() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117250,6 +117331,7 @@ void m68000_device::slt_ds_ifm() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117301,6 +117383,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117362,6 +117445,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117393,12 +117477,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117427,12 +117511,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117463,6 +117547,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -117517,7 +117602,6 @@ void m68000_device::slt_ais_ifm() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117579,6 +117663,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117633,7 +117718,6 @@ void m68000_device::slt_aips_ifm() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117695,6 +117779,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117751,7 +117836,6 @@ void m68000_device::slt_pais_ifm() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117813,6 +117897,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -117885,7 +117970,6 @@ void m68000_device::slt_das_ifm() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117947,6 +118031,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118059,7 +118144,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118121,6 +118205,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118192,7 +118277,6 @@ void m68000_device::slt_adr16_ifm() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118254,6 +118338,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118347,7 +118432,6 @@ void m68000_device::slt_adr32_ifm() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118409,6 +118493,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118436,7 +118521,6 @@ void m68000_device::sgt_ds_ifm() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118448,6 +118532,7 @@ void m68000_device::sgt_ds_ifm() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118499,6 +118584,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118560,6 +118646,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118591,12 +118678,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118625,12 +118712,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118661,6 +118748,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -118715,7 +118803,6 @@ void m68000_device::sgt_ais_ifm() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118777,6 +118864,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118831,7 +118919,6 @@ void m68000_device::sgt_aips_ifm() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118893,6 +118980,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -118949,7 +119037,6 @@ void m68000_device::sgt_pais_ifm() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119011,6 +119098,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119083,7 +119171,6 @@ void m68000_device::sgt_das_ifm() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119145,6 +119232,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119257,7 +119345,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119319,6 +119406,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119390,7 +119478,6 @@ void m68000_device::sgt_adr16_ifm() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119452,6 +119539,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119545,7 +119633,6 @@ void m68000_device::sgt_adr32_ifm() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119607,6 +119694,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -119634,7 +119722,6 @@ void m68000_device::sle_ds_ifm() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119646,6 +119733,7 @@ void m68000_device::sle_ds_ifm() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119697,6 +119785,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119758,6 +119847,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -119789,12 +119879,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119823,12 +119913,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119859,6 +119949,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -119913,7 +120004,6 @@ void m68000_device::sle_ais_ifm() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119975,6 +120065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120029,7 +120120,6 @@ void m68000_device::sle_aips_ifm() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120091,6 +120181,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120147,7 +120238,6 @@ void m68000_device::sle_pais_ifm() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120209,6 +120299,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120281,7 +120372,6 @@ void m68000_device::sle_das_ifm() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120343,6 +120433,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120455,7 +120546,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120517,6 +120607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120588,7 +120679,6 @@ void m68000_device::sle_adr16_ifm() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120650,6 +120740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120743,7 +120834,6 @@ void m68000_device::sle_adr32_ifm() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120805,6 +120895,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -120839,6 +120930,7 @@ void m68000_device::bra_rel16_ifm() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120896,11 +120988,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -120939,6 +121031,7 @@ void m68000_device::bra_rel8_ifm() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -120972,11 +121065,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121078,11 +121171,11 @@ void m68000_device::bsr_rel16_ifm() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121184,11 +121277,11 @@ void m68000_device::bsr_rel8_ifm() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121227,6 +121320,7 @@ void m68000_device::bhi_rel16_ifm() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121284,11 +121378,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121327,6 +121421,7 @@ void m68000_device::bhi_rel8_ifm() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121360,11 +121455,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121403,6 +121498,7 @@ void m68000_device::bls_rel16_ifm() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121460,11 +121556,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121503,6 +121599,7 @@ void m68000_device::bls_rel8_ifm() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121536,11 +121633,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121579,6 +121676,7 @@ void m68000_device::bcc_rel16_ifm() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121636,11 +121734,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121679,6 +121777,7 @@ void m68000_device::bcc_rel8_ifm() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121712,11 +121811,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121755,6 +121854,7 @@ void m68000_device::bcs_rel16_ifm() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121812,11 +121912,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121855,6 +121955,7 @@ void m68000_device::bcs_rel8_ifm() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121888,11 +121989,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -121931,6 +122032,7 @@ void m68000_device::bne_rel16_ifm() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -121988,11 +122090,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122031,6 +122133,7 @@ void m68000_device::bne_rel8_ifm() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122064,11 +122167,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122107,6 +122210,7 @@ void m68000_device::beq_rel16_ifm() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122164,11 +122268,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122207,6 +122311,7 @@ void m68000_device::beq_rel8_ifm() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122240,11 +122345,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122283,6 +122388,7 @@ void m68000_device::bvc_rel16_ifm() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122340,11 +122446,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122383,6 +122489,7 @@ void m68000_device::bvc_rel8_ifm() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122416,11 +122523,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122459,6 +122566,7 @@ void m68000_device::bvs_rel16_ifm() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122516,11 +122624,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122559,6 +122667,7 @@ void m68000_device::bvs_rel8_ifm() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122592,11 +122701,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122635,6 +122744,7 @@ void m68000_device::bpl_rel16_ifm() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122692,11 +122802,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122735,6 +122845,7 @@ void m68000_device::bpl_rel8_ifm() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122768,11 +122879,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122811,6 +122922,7 @@ void m68000_device::bmi_rel16_ifm() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122868,11 +122980,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122911,6 +123023,7 @@ void m68000_device::bmi_rel8_ifm() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -122944,11 +123057,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -122987,6 +123100,7 @@ void m68000_device::bge_rel16_ifm() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123044,11 +123158,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123087,6 +123201,7 @@ void m68000_device::bge_rel8_ifm() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123120,11 +123235,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123163,6 +123278,7 @@ void m68000_device::blt_rel16_ifm() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123220,11 +123336,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123263,6 +123379,7 @@ void m68000_device::blt_rel8_ifm() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123296,11 +123413,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123339,6 +123456,7 @@ void m68000_device::bgt_rel16_ifm() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123396,11 +123514,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123439,6 +123557,7 @@ void m68000_device::bgt_rel8_ifm() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123472,11 +123591,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123515,6 +123634,7 @@ void m68000_device::ble_rel16_ifm() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123572,11 +123692,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123615,6 +123735,7 @@ void m68000_device::ble_rel8_ifm() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -123648,11 +123769,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123684,7 +123805,6 @@ void m68000_device::moveq_imm8o_dd_ifm() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -123693,6 +123813,7 @@ void m68000_device::moveq_imm8o_dd_ifm() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123725,7 +123846,6 @@ void m68000_device::or_b_ds_dd_ifm() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -123733,6 +123853,7 @@ void m68000_device::or_b_ds_dd_ifm() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123790,7 +123911,6 @@ void m68000_device::or_b_ais_dd_ifm() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123798,6 +123918,7 @@ void m68000_device::or_b_ais_dd_ifm() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123860,7 +123981,6 @@ void m68000_device::or_b_aips_dd_ifm() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123868,6 +123988,7 @@ void m68000_device::or_b_aips_dd_ifm() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -123932,7 +124053,6 @@ void m68000_device::or_b_pais_dd_ifm() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -123940,6 +124060,7 @@ void m68000_device::or_b_pais_dd_ifm() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124020,7 +124141,6 @@ void m68000_device::or_b_das_dd_ifm() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124028,6 +124148,7 @@ void m68000_device::or_b_das_dd_ifm() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124148,7 +124269,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124156,6 +124276,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124235,7 +124356,6 @@ void m68000_device::or_b_adr16_dd_ifm() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124243,6 +124363,7 @@ void m68000_device::or_b_adr16_dd_ifm() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124344,7 +124465,6 @@ void m68000_device::or_b_adr32_dd_ifm() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124352,6 +124472,7 @@ void m68000_device::or_b_adr32_dd_ifm() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124431,7 +124552,6 @@ void m68000_device::or_b_dpc_dd_ifm() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124439,6 +124559,7 @@ void m68000_device::or_b_dpc_dd_ifm() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124558,7 +124679,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124566,6 +124686,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124625,7 +124746,6 @@ void m68000_device::or_b_imm8_dd_ifm() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -124633,6 +124753,7 @@ void m68000_device::or_b_imm8_dd_ifm() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124668,7 +124789,6 @@ void m68000_device::or_w_ds_dd_ifm() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -124676,6 +124796,7 @@ void m68000_device::or_w_ds_dd_ifm() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124736,7 +124857,6 @@ void m68000_device::or_w_ais_dd_ifm() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124744,6 +124864,7 @@ void m68000_device::or_w_ais_dd_ifm() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124809,7 +124930,6 @@ void m68000_device::or_w_aips_dd_ifm() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124817,6 +124937,7 @@ void m68000_device::or_w_aips_dd_ifm() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124884,7 +125005,6 @@ void m68000_device::or_w_pais_dd_ifm() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124892,6 +125012,7 @@ void m68000_device::or_w_pais_dd_ifm() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -124975,7 +125096,6 @@ void m68000_device::or_w_das_dd_ifm() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -124983,6 +125103,7 @@ void m68000_device::or_w_das_dd_ifm() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125106,7 +125227,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125114,6 +125234,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125196,7 +125317,6 @@ void m68000_device::or_w_adr16_dd_ifm() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125204,6 +125324,7 @@ void m68000_device::or_w_adr16_dd_ifm() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125308,7 +125429,6 @@ void m68000_device::or_w_adr32_dd_ifm() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125316,6 +125436,7 @@ void m68000_device::or_w_adr32_dd_ifm() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125398,7 +125519,6 @@ void m68000_device::or_w_dpc_dd_ifm() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125406,6 +125526,7 @@ void m68000_device::or_w_dpc_dd_ifm() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125528,7 +125649,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125536,6 +125656,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125595,7 +125716,6 @@ void m68000_device::or_w_imm16_dd_ifm() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -125603,6 +125723,7 @@ void m68000_device::or_w_imm16_dd_ifm() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -125638,7 +125759,6 @@ void m68000_device::or_l_ds_dd_ifm() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -125672,6 +125792,7 @@ void m68000_device::or_l_ds_dd_ifm() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125736,7 +125857,6 @@ void m68000_device::or_l_ais_dd_ifm() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125767,6 +125887,7 @@ void m68000_device::or_l_ais_dd_ifm() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125835,7 +125956,6 @@ void m68000_device::or_l_aips_dd_ifm() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125866,6 +125986,7 @@ void m68000_device::or_l_aips_dd_ifm() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -125935,7 +126056,6 @@ void m68000_device::or_l_pais_dd_ifm() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -125966,6 +126086,7 @@ void m68000_device::or_l_pais_dd_ifm() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126052,7 +126173,6 @@ void m68000_device::or_l_das_dd_ifm() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126083,6 +126203,7 @@ void m68000_device::or_l_das_dd_ifm() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126209,7 +126330,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126240,6 +126360,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126329,7 +126450,6 @@ void m68000_device::or_l_adr16_dd_ifm() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126360,6 +126480,7 @@ void m68000_device::or_l_adr16_dd_ifm() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126471,7 +126592,6 @@ void m68000_device::or_l_adr32_dd_ifm() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126502,6 +126622,7 @@ void m68000_device::or_l_adr32_dd_ifm() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126587,7 +126708,6 @@ void m68000_device::or_l_dpc_dd_ifm() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126618,6 +126738,7 @@ void m68000_device::or_l_dpc_dd_ifm() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126743,7 +126864,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -126774,6 +126894,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -126838,7 +126959,6 @@ void m68000_device::or_l_imm32_dd_ifm() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -126872,6 +126992,7 @@ void m68000_device::or_l_imm32_dd_ifm() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -127069,11 +127190,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127101,10 +127222,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127214,7 +127335,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127224,7 +127344,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127234,6 +127353,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127473,11 +127593,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127505,10 +127625,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127618,7 +127738,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -127628,7 +127747,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -127638,6 +127756,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127881,11 +128000,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -127913,10 +128032,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128026,7 +128145,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128036,7 +128154,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128046,6 +128163,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128291,11 +128409,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128323,10 +128441,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128436,7 +128554,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128446,7 +128563,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128456,6 +128572,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128717,11 +128834,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128749,10 +128866,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -128862,7 +128979,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -128872,7 +128988,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -128882,6 +128997,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129181,11 +129297,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129213,10 +129329,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129326,7 +129442,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129336,7 +129451,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129346,6 +129460,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129606,11 +129721,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129638,10 +129753,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -129751,7 +129866,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -129761,7 +129875,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -129771,6 +129884,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130052,11 +130166,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130084,10 +130198,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130197,7 +130311,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130207,7 +130320,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130217,6 +130329,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130477,11 +130590,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130509,10 +130622,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130622,7 +130735,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -130632,7 +130744,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -130642,6 +130753,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130940,11 +131052,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -130972,10 +131084,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131085,7 +131197,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131095,7 +131206,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131105,6 +131215,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131343,11 +131454,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131375,10 +131486,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131488,7 +131599,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -131498,7 +131608,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -131508,6 +131617,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131544,7 +131654,6 @@ void m68000_device::sbcd_ds_dd_ifm() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -131573,6 +131682,7 @@ void m68000_device::sbcd_ds_dd_ifm() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -131617,7 +131727,6 @@ void m68000_device::sbcd_pais_paid_ifm() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -131664,6 +131773,7 @@ void m68000_device::sbcd_pais_paid_ifm() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131713,7 +131823,6 @@ void m68000_device::or_b_dd_ais_ifm() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131740,6 +131849,7 @@ void m68000_device::or_b_dd_ais_ifm() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131795,7 +131905,6 @@ void m68000_device::or_b_dd_aips_ifm() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131822,6 +131931,7 @@ void m68000_device::or_b_dd_aips_ifm() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131879,7 +131989,6 @@ void m68000_device::or_b_dd_pais_ifm() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -131906,6 +132015,7 @@ void m68000_device::or_b_dd_pais_ifm() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -131979,7 +132089,6 @@ void m68000_device::or_b_dd_das_ifm() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132006,6 +132115,7 @@ void m68000_device::or_b_dd_das_ifm() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132119,7 +132229,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132146,6 +132255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132218,7 +132328,6 @@ void m68000_device::or_b_dd_adr16_ifm() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132245,6 +132354,7 @@ void m68000_device::or_b_dd_adr16_ifm() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132339,7 +132449,6 @@ void m68000_device::or_b_dd_adr32_ifm() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132366,6 +132475,7 @@ void m68000_device::or_b_dd_adr32_ifm() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -132419,7 +132529,6 @@ void m68000_device::or_w_dd_ais_ifm() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132446,6 +132555,7 @@ void m68000_device::or_w_dd_ais_ifm() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132509,7 +132619,6 @@ void m68000_device::or_w_dd_aips_ifm() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132536,6 +132645,7 @@ void m68000_device::or_w_dd_aips_ifm() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132601,7 +132711,6 @@ void m68000_device::or_w_dd_pais_ifm() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132628,6 +132737,7 @@ void m68000_device::or_w_dd_pais_ifm() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132709,7 +132819,6 @@ void m68000_device::or_w_dd_das_ifm() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132736,6 +132845,7 @@ void m68000_device::or_w_dd_das_ifm() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132857,7 +132967,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132884,6 +132993,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -132964,7 +133074,6 @@ void m68000_device::or_w_dd_adr16_ifm() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -132991,6 +133100,7 @@ void m68000_device::or_w_dd_adr16_ifm() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133093,7 +133203,6 @@ void m68000_device::or_w_dd_adr32_ifm() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133120,6 +133229,7 @@ void m68000_device::or_w_dd_adr32_ifm() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133199,7 +133309,6 @@ void m68000_device::or_l_dd_ais_ifm() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133249,6 +133358,7 @@ void m68000_device::or_l_dd_ais_ifm() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133332,7 +133442,6 @@ void m68000_device::or_l_dd_aips_ifm() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133382,6 +133491,7 @@ void m68000_device::or_l_dd_aips_ifm() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133466,7 +133576,6 @@ void m68000_device::or_l_dd_pais_ifm() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133516,6 +133625,7 @@ void m68000_device::or_l_dd_pais_ifm() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133617,7 +133727,6 @@ void m68000_device::or_l_dd_das_ifm() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133667,6 +133776,7 @@ void m68000_device::or_l_dd_das_ifm() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133808,7 +133918,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -133858,6 +133967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -133962,7 +134072,6 @@ void m68000_device::or_l_dd_adr16_ifm() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134012,6 +134121,7 @@ void m68000_device::or_l_dd_adr16_ifm() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -134138,7 +134248,6 @@ void m68000_device::or_l_dd_adr32_ifm() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134188,6 +134297,7 @@ void m68000_device::or_l_dd_adr32_ifm() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -134408,11 +134518,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134481,7 +134591,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -134494,6 +134603,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134621,7 +134731,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -134652,7 +134761,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -134684,6 +134792,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -134713,14 +134822,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -134947,11 +135054,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135020,7 +135127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135033,6 +135139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135160,7 +135267,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135191,7 +135297,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135223,6 +135328,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135252,14 +135358,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -135490,11 +135594,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135563,7 +135667,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -135576,6 +135679,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135703,7 +135807,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -135734,7 +135837,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -135766,6 +135868,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -135795,14 +135898,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136035,11 +136136,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136108,7 +136209,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136121,6 +136221,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136248,7 +136349,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136279,7 +136379,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136311,6 +136410,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136340,14 +136440,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -136596,11 +136694,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136669,7 +136767,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -136682,6 +136779,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136809,7 +136907,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -136840,7 +136937,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -136872,6 +136968,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -136901,14 +136998,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137195,11 +137290,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137268,7 +137363,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137281,6 +137375,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137408,7 +137503,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137439,7 +137533,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -137471,6 +137564,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137500,14 +137594,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -137755,11 +137847,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137828,7 +137920,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -137841,6 +137932,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -137968,7 +138060,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -137999,7 +138090,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138031,6 +138121,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138060,14 +138151,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138336,11 +138425,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138409,7 +138498,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138422,6 +138510,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138549,7 +138638,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -138580,7 +138668,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -138612,6 +138699,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138641,14 +138729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -138896,11 +138982,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -138969,7 +139055,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -138982,6 +139067,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139109,7 +139195,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139140,7 +139225,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139172,6 +139256,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139201,14 +139286,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -139494,11 +139577,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139567,7 +139650,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -139580,6 +139662,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139707,7 +139790,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -139738,7 +139820,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -139770,6 +139851,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -139799,14 +139881,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140032,11 +140112,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140105,7 +140185,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -140118,6 +140197,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140245,7 +140325,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -140276,7 +140355,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -140308,6 +140386,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140337,14 +140416,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -140360,7 +140437,6 @@ void m68000_device::sub_b_ds_dd_ifm() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140368,6 +140444,7 @@ void m68000_device::sub_b_ds_dd_ifm() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140423,7 +140500,6 @@ void m68000_device::sub_b_ais_dd_ifm() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140431,6 +140507,7 @@ void m68000_device::sub_b_ais_dd_ifm() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140490,7 +140567,6 @@ void m68000_device::sub_b_aips_dd_ifm() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140498,6 +140574,7 @@ void m68000_device::sub_b_aips_dd_ifm() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140559,7 +140636,6 @@ void m68000_device::sub_b_pais_dd_ifm() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140567,6 +140643,7 @@ void m68000_device::sub_b_pais_dd_ifm() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140644,7 +140721,6 @@ void m68000_device::sub_b_das_dd_ifm() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140652,6 +140728,7 @@ void m68000_device::sub_b_das_dd_ifm() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140767,7 +140844,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140775,6 +140851,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140851,7 +140928,6 @@ void m68000_device::sub_b_adr16_dd_ifm() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140859,6 +140935,7 @@ void m68000_device::sub_b_adr16_dd_ifm() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -140956,7 +141033,6 @@ void m68000_device::sub_b_adr32_dd_ifm() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140964,6 +141040,7 @@ void m68000_device::sub_b_adr32_dd_ifm() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141040,7 +141117,6 @@ void m68000_device::sub_b_dpc_dd_ifm() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141048,6 +141124,7 @@ void m68000_device::sub_b_dpc_dd_ifm() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141162,7 +141239,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141170,6 +141246,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141227,7 +141304,6 @@ void m68000_device::sub_b_imm8_dd_ifm() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141235,6 +141311,7 @@ void m68000_device::sub_b_imm8_dd_ifm() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141269,7 +141346,6 @@ void m68000_device::sub_w_ds_dd_ifm() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141277,6 +141353,7 @@ void m68000_device::sub_w_ds_dd_ifm() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141311,7 +141388,6 @@ void m68000_device::sub_w_as_dd_ifm() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -141319,6 +141395,7 @@ void m68000_device::sub_w_as_dd_ifm() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141377,7 +141454,6 @@ void m68000_device::sub_w_ais_dd_ifm() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141385,6 +141461,7 @@ void m68000_device::sub_w_ais_dd_ifm() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141447,7 +141524,6 @@ void m68000_device::sub_w_aips_dd_ifm() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141455,6 +141531,7 @@ void m68000_device::sub_w_aips_dd_ifm() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141519,7 +141596,6 @@ void m68000_device::sub_w_pais_dd_ifm() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141527,6 +141603,7 @@ void m68000_device::sub_w_pais_dd_ifm() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141607,7 +141684,6 @@ void m68000_device::sub_w_das_dd_ifm() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141615,6 +141691,7 @@ void m68000_device::sub_w_das_dd_ifm() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141733,7 +141810,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141741,6 +141817,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141820,7 +141897,6 @@ void m68000_device::sub_w_adr16_dd_ifm() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141828,6 +141904,7 @@ void m68000_device::sub_w_adr16_dd_ifm() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -141928,7 +142005,6 @@ void m68000_device::sub_w_adr32_dd_ifm() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141936,6 +142012,7 @@ void m68000_device::sub_w_adr32_dd_ifm() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142015,7 +142092,6 @@ void m68000_device::sub_w_dpc_dd_ifm() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142023,6 +142099,7 @@ void m68000_device::sub_w_dpc_dd_ifm() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142140,7 +142217,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142148,6 +142224,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142205,7 +142282,6 @@ void m68000_device::sub_w_imm16_dd_ifm() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142213,6 +142289,7 @@ void m68000_device::sub_w_imm16_dd_ifm() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -142247,7 +142324,6 @@ void m68000_device::sub_l_ds_dd_ifm() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142280,6 +142356,7 @@ void m68000_device::sub_l_ds_dd_ifm() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142297,7 +142374,6 @@ void m68000_device::sub_l_as_dd_ifm() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -142330,6 +142406,7 @@ void m68000_device::sub_l_as_dd_ifm() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142392,7 +142469,6 @@ void m68000_device::sub_l_ais_dd_ifm() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142423,6 +142499,7 @@ void m68000_device::sub_l_ais_dd_ifm() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142488,7 +142565,6 @@ void m68000_device::sub_l_aips_dd_ifm() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142519,6 +142595,7 @@ void m68000_device::sub_l_aips_dd_ifm() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142585,7 +142662,6 @@ void m68000_device::sub_l_pais_dd_ifm() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142616,6 +142692,7 @@ void m68000_device::sub_l_pais_dd_ifm() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142699,7 +142776,6 @@ void m68000_device::sub_l_das_dd_ifm() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142730,6 +142806,7 @@ void m68000_device::sub_l_das_dd_ifm() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142851,7 +142928,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142882,6 +142958,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -142967,7 +143044,6 @@ void m68000_device::sub_l_adr16_dd_ifm() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142998,6 +143074,7 @@ void m68000_device::sub_l_adr16_dd_ifm() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143104,7 +143181,6 @@ void m68000_device::sub_l_adr32_dd_ifm() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143135,6 +143211,7 @@ void m68000_device::sub_l_adr32_dd_ifm() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143217,7 +143294,6 @@ void m68000_device::sub_l_dpc_dd_ifm() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143248,6 +143324,7 @@ void m68000_device::sub_l_dpc_dd_ifm() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143368,7 +143445,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143399,6 +143475,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143460,7 +143537,6 @@ void m68000_device::sub_l_imm32_dd_ifm() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -143493,6 +143569,7 @@ void m68000_device::sub_l_imm32_dd_ifm() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143510,7 +143587,6 @@ void m68000_device::suba_w_ds_ad_ifm() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -143541,6 +143617,7 @@ void m68000_device::suba_w_ds_ad_ifm() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143558,7 +143635,6 @@ void m68000_device::suba_w_as_ad_ifm() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -143589,6 +143665,7 @@ void m68000_device::suba_w_as_ad_ifm() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143630,7 +143707,6 @@ void m68000_device::suba_w_ais_ad_ifm() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143661,6 +143737,7 @@ void m68000_device::suba_w_ais_ad_ifm() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143706,7 +143783,6 @@ void m68000_device::suba_w_aips_ad_ifm() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143737,6 +143813,7 @@ void m68000_device::suba_w_aips_ad_ifm() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143784,7 +143861,6 @@ void m68000_device::suba_w_pais_ad_ifm() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143815,6 +143891,7 @@ void m68000_device::suba_w_pais_ad_ifm() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -143878,7 +143955,6 @@ void m68000_device::suba_w_das_ad_ifm() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -143909,6 +143985,7 @@ void m68000_device::suba_w_das_ad_ifm() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144010,7 +144087,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144041,6 +144117,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144103,7 +144180,6 @@ void m68000_device::suba_w_adr16_ad_ifm() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144134,6 +144210,7 @@ void m68000_device::suba_w_adr16_ad_ifm() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144217,7 +144294,6 @@ void m68000_device::suba_w_adr32_ad_ifm() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144248,6 +144324,7 @@ void m68000_device::suba_w_adr32_ad_ifm() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144310,7 +144387,6 @@ void m68000_device::suba_w_dpc_ad_ifm() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144341,6 +144417,7 @@ void m68000_device::suba_w_dpc_ad_ifm() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144441,7 +144518,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -144472,6 +144548,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144512,7 +144589,6 @@ void m68000_device::suba_w_imm16_ad_ifm() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -144543,6 +144619,7 @@ void m68000_device::suba_w_imm16_ad_ifm() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -144560,7 +144637,6 @@ void m68000_device::subx_b_ds_dd_ifm() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -144568,6 +144644,7 @@ void m68000_device::subx_b_ds_dd_ifm() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144629,7 +144706,6 @@ void m68000_device::subx_b_pais_paid_ifm() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -144674,6 +144750,7 @@ void m68000_device::subx_b_pais_paid_ifm() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144722,7 +144799,6 @@ void m68000_device::sub_b_dd_ais_ifm() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144749,6 +144825,7 @@ void m68000_device::sub_b_dd_ais_ifm() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144801,7 +144878,6 @@ void m68000_device::sub_b_dd_aips_ifm() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144828,6 +144904,7 @@ void m68000_device::sub_b_dd_aips_ifm() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144882,7 +144959,6 @@ void m68000_device::sub_b_dd_pais_ifm() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -144909,6 +144985,7 @@ void m68000_device::sub_b_dd_pais_ifm() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -144979,7 +145056,6 @@ void m68000_device::sub_b_dd_das_ifm() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145006,6 +145082,7 @@ void m68000_device::sub_b_dd_das_ifm() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145114,7 +145191,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145141,6 +145217,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145210,7 +145287,6 @@ void m68000_device::sub_b_dd_adr16_ifm() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145237,6 +145313,7 @@ void m68000_device::sub_b_dd_adr16_ifm() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145327,7 +145404,6 @@ void m68000_device::sub_b_dd_adr32_ifm() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145354,6 +145430,7 @@ void m68000_device::sub_b_dd_adr32_ifm() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -145381,7 +145458,6 @@ void m68000_device::subx_w_ds_dd_ifm() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -145389,6 +145465,7 @@ void m68000_device::subx_w_ds_dd_ifm() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145453,7 +145530,6 @@ void m68000_device::subx_w_pais_paid_ifm() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145501,6 +145577,7 @@ void m68000_device::subx_w_pais_paid_ifm() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145557,7 +145634,6 @@ void m68000_device::sub_w_dd_ais_ifm() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145584,6 +145660,7 @@ void m68000_device::sub_w_dd_ais_ifm() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145644,7 +145721,6 @@ void m68000_device::sub_w_dd_aips_ifm() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145671,6 +145747,7 @@ void m68000_device::sub_w_dd_aips_ifm() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145733,7 +145810,6 @@ void m68000_device::sub_w_dd_pais_ifm() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145760,6 +145836,7 @@ void m68000_device::sub_w_dd_pais_ifm() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145838,7 +145915,6 @@ void m68000_device::sub_w_dd_das_ifm() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -145865,6 +145941,7 @@ void m68000_device::sub_w_dd_das_ifm() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -145981,7 +146058,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146008,6 +146084,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146085,7 +146162,6 @@ void m68000_device::sub_w_dd_adr16_ifm() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146112,6 +146188,7 @@ void m68000_device::sub_w_dd_adr16_ifm() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146210,7 +146287,6 @@ void m68000_device::sub_w_dd_adr32_ifm() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146237,6 +146313,7 @@ void m68000_device::sub_w_dd_adr32_ifm() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146269,7 +146346,6 @@ void m68000_device::subx_l_ds_dd_ifm() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -146302,6 +146378,7 @@ void m68000_device::subx_l_ds_dd_ifm() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -146416,7 +146493,6 @@ void m68000_device::subx_l_pais_paid_ifm() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146462,6 +146538,7 @@ void m68000_device::subx_l_pais_paid_ifm() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146539,7 +146616,6 @@ void m68000_device::sub_l_dd_ais_ifm() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146589,6 +146665,7 @@ void m68000_device::sub_l_dd_ais_ifm() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146669,7 +146746,6 @@ void m68000_device::sub_l_dd_aips_ifm() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146719,6 +146795,7 @@ void m68000_device::sub_l_dd_aips_ifm() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146800,7 +146877,6 @@ void m68000_device::sub_l_dd_pais_ifm() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146850,6 +146926,7 @@ void m68000_device::sub_l_dd_pais_ifm() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -146948,7 +147025,6 @@ void m68000_device::sub_l_dd_das_ifm() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -146998,6 +147074,7 @@ void m68000_device::sub_l_dd_das_ifm() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147134,7 +147211,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -147184,6 +147260,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147284,7 +147361,6 @@ void m68000_device::sub_l_dd_adr16_ifm() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -147334,6 +147410,7 @@ void m68000_device::sub_l_dd_adr16_ifm() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147455,7 +147532,6 @@ void m68000_device::sub_l_dd_adr32_ifm() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -147505,6 +147581,7 @@ void m68000_device::sub_l_dd_adr32_ifm() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -147537,7 +147614,6 @@ void m68000_device::suba_l_ds_ad_ifm() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -147568,6 +147644,7 @@ void m68000_device::suba_l_ds_ad_ifm() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147585,7 +147662,6 @@ void m68000_device::suba_l_as_ad_ifm() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -147616,6 +147692,7 @@ void m68000_device::suba_l_as_ad_ifm() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147678,7 +147755,6 @@ void m68000_device::suba_l_ais_ad_ifm() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147707,6 +147783,7 @@ void m68000_device::suba_l_ais_ad_ifm() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147772,7 +147849,6 @@ void m68000_device::suba_l_aips_ad_ifm() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147801,6 +147877,7 @@ void m68000_device::suba_l_aips_ad_ifm() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147867,7 +147944,6 @@ void m68000_device::suba_l_pais_ad_ifm() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -147896,6 +147972,7 @@ void m68000_device::suba_l_pais_ad_ifm() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -147979,7 +148056,6 @@ void m68000_device::suba_l_das_ad_ifm() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148008,6 +148084,7 @@ void m68000_device::suba_l_das_ad_ifm() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148129,7 +148206,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148158,6 +148234,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148243,7 +148320,6 @@ void m68000_device::suba_l_adr16_ad_ifm() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148272,6 +148348,7 @@ void m68000_device::suba_l_adr16_ad_ifm() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148378,7 +148455,6 @@ void m68000_device::suba_l_adr32_ad_ifm() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148407,6 +148483,7 @@ void m68000_device::suba_l_adr32_ad_ifm() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148489,7 +148566,6 @@ void m68000_device::suba_l_dpc_ad_ifm() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148518,6 +148594,7 @@ void m68000_device::suba_l_dpc_ad_ifm() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148638,7 +148715,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -148667,6 +148743,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148728,7 +148805,6 @@ void m68000_device::suba_l_imm32_ad_ifm() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -148759,6 +148835,7 @@ void m68000_device::suba_l_imm32_ad_ifm() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -148776,7 +148853,6 @@ void m68000_device::cmp_b_ds_dd_ifm() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -148784,6 +148860,7 @@ void m68000_device::cmp_b_ds_dd_ifm() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -148838,7 +148915,6 @@ void m68000_device::cmp_b_ais_dd_ifm() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148846,6 +148922,7 @@ void m68000_device::cmp_b_ais_dd_ifm() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -148904,7 +148981,6 @@ void m68000_device::cmp_b_aips_dd_ifm() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148912,6 +148988,7 @@ void m68000_device::cmp_b_aips_dd_ifm() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -148972,7 +149049,6 @@ void m68000_device::cmp_b_pais_dd_ifm() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -148980,6 +149056,7 @@ void m68000_device::cmp_b_pais_dd_ifm() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149056,7 +149133,6 @@ void m68000_device::cmp_b_das_dd_ifm() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149064,6 +149140,7 @@ void m68000_device::cmp_b_das_dd_ifm() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149178,7 +149255,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149186,6 +149262,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149261,7 +149338,6 @@ void m68000_device::cmp_b_adr16_dd_ifm() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149269,6 +149345,7 @@ void m68000_device::cmp_b_adr16_dd_ifm() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149365,7 +149442,6 @@ void m68000_device::cmp_b_adr32_dd_ifm() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149373,6 +149449,7 @@ void m68000_device::cmp_b_adr32_dd_ifm() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149448,7 +149525,6 @@ void m68000_device::cmp_b_dpc_dd_ifm() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149456,6 +149532,7 @@ void m68000_device::cmp_b_dpc_dd_ifm() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149569,7 +149646,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149577,6 +149653,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149633,7 +149710,6 @@ void m68000_device::cmp_b_imm8_dd_ifm() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -149641,6 +149717,7 @@ void m68000_device::cmp_b_imm8_dd_ifm() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149674,7 +149751,6 @@ void m68000_device::cmp_w_ds_dd_ifm() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149682,6 +149758,7 @@ void m68000_device::cmp_w_ds_dd_ifm() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149715,7 +149792,6 @@ void m68000_device::cmp_w_as_dd_ifm() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -149723,6 +149799,7 @@ void m68000_device::cmp_w_as_dd_ifm() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149780,7 +149857,6 @@ void m68000_device::cmp_w_ais_dd_ifm() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149788,6 +149864,7 @@ void m68000_device::cmp_w_ais_dd_ifm() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149849,7 +149926,6 @@ void m68000_device::cmp_w_aips_dd_ifm() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149857,6 +149933,7 @@ void m68000_device::cmp_w_aips_dd_ifm() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -149920,7 +149997,6 @@ void m68000_device::cmp_w_pais_dd_ifm() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -149928,6 +150004,7 @@ void m68000_device::cmp_w_pais_dd_ifm() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150007,7 +150084,6 @@ void m68000_device::cmp_w_das_dd_ifm() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150015,6 +150091,7 @@ void m68000_device::cmp_w_das_dd_ifm() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150132,7 +150209,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150140,6 +150216,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150218,7 +150295,6 @@ void m68000_device::cmp_w_adr16_dd_ifm() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150226,6 +150302,7 @@ void m68000_device::cmp_w_adr16_dd_ifm() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150325,7 +150402,6 @@ void m68000_device::cmp_w_adr32_dd_ifm() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150333,6 +150409,7 @@ void m68000_device::cmp_w_adr32_dd_ifm() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150411,7 +150488,6 @@ void m68000_device::cmp_w_dpc_dd_ifm() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150419,6 +150495,7 @@ void m68000_device::cmp_w_dpc_dd_ifm() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150535,7 +150612,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150543,6 +150619,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150599,7 +150676,6 @@ void m68000_device::cmp_w_imm16_dd_ifm() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -150607,6 +150683,7 @@ void m68000_device::cmp_w_imm16_dd_ifm() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -150640,7 +150717,6 @@ void m68000_device::cmp_l_ds_dd_ifm() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -150670,6 +150746,7 @@ void m68000_device::cmp_l_ds_dd_ifm() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150686,7 +150763,6 @@ void m68000_device::cmp_l_as_dd_ifm() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -150716,6 +150792,7 @@ void m68000_device::cmp_l_as_dd_ifm() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150777,7 +150854,6 @@ void m68000_device::cmp_l_ais_dd_ifm() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150807,6 +150883,7 @@ void m68000_device::cmp_l_ais_dd_ifm() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150871,7 +150948,6 @@ void m68000_device::cmp_l_aips_dd_ifm() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150901,6 +150977,7 @@ void m68000_device::cmp_l_aips_dd_ifm() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -150966,7 +151043,6 @@ void m68000_device::cmp_l_pais_dd_ifm() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -150996,6 +151072,7 @@ void m68000_device::cmp_l_pais_dd_ifm() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151078,7 +151155,6 @@ void m68000_device::cmp_l_das_dd_ifm() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151108,6 +151184,7 @@ void m68000_device::cmp_l_das_dd_ifm() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151228,7 +151305,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151258,6 +151334,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151342,7 +151419,6 @@ void m68000_device::cmp_l_adr16_dd_ifm() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151372,6 +151448,7 @@ void m68000_device::cmp_l_adr16_dd_ifm() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151477,7 +151554,6 @@ void m68000_device::cmp_l_adr32_dd_ifm() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151507,6 +151583,7 @@ void m68000_device::cmp_l_adr32_dd_ifm() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151588,7 +151665,6 @@ void m68000_device::cmp_l_dpc_dd_ifm() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151618,6 +151694,7 @@ void m68000_device::cmp_l_dpc_dd_ifm() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151737,7 +151814,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -151767,6 +151843,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151827,7 +151904,6 @@ void m68000_device::cmp_l_imm32_dd_ifm() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -151857,6 +151933,7 @@ void m68000_device::cmp_l_imm32_dd_ifm() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151873,7 +151950,6 @@ void m68000_device::cmpa_w_ds_ad_ifm() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -151903,6 +151979,7 @@ void m68000_device::cmpa_w_ds_ad_ifm() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151919,7 +151996,6 @@ void m68000_device::cmpa_w_as_ad_ifm() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -151949,6 +152025,7 @@ void m68000_device::cmpa_w_as_ad_ifm() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -151989,7 +152066,6 @@ void m68000_device::cmpa_w_ais_ad_ifm() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152019,6 +152095,7 @@ void m68000_device::cmpa_w_ais_ad_ifm() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152063,7 +152140,6 @@ void m68000_device::cmpa_w_aips_ad_ifm() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152093,6 +152169,7 @@ void m68000_device::cmpa_w_aips_ad_ifm() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152139,7 +152216,6 @@ void m68000_device::cmpa_w_pais_ad_ifm() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152169,6 +152245,7 @@ void m68000_device::cmpa_w_pais_ad_ifm() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152231,7 +152308,6 @@ void m68000_device::cmpa_w_das_ad_ifm() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152261,6 +152337,7 @@ void m68000_device::cmpa_w_das_ad_ifm() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152361,7 +152438,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152391,6 +152467,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152452,7 +152529,6 @@ void m68000_device::cmpa_w_adr16_ad_ifm() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152482,6 +152558,7 @@ void m68000_device::cmpa_w_adr16_ad_ifm() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152564,7 +152641,6 @@ void m68000_device::cmpa_w_adr32_ad_ifm() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152594,6 +152670,7 @@ void m68000_device::cmpa_w_adr32_ad_ifm() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152655,7 +152732,6 @@ void m68000_device::cmpa_w_dpc_ad_ifm() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152685,6 +152761,7 @@ void m68000_device::cmpa_w_dpc_ad_ifm() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152784,7 +152861,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -152814,6 +152890,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152853,7 +152930,6 @@ void m68000_device::cmpa_w_imm16_ad_ifm() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -152883,6 +152959,7 @@ void m68000_device::cmpa_w_imm16_ad_ifm() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -152899,13 +152976,13 @@ void m68000_device::eor_b_dd_ds_ifm() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -152963,7 +153040,6 @@ void m68000_device::cmpm_b_aips_aipd_ifm() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -152984,6 +153060,7 @@ void m68000_device::cmpm_b_aips_aipd_ifm() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153043,7 +153120,6 @@ void m68000_device::eor_b_dd_ais_ifm() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153070,6 +153146,7 @@ void m68000_device::eor_b_dd_ais_ifm() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153125,7 +153202,6 @@ void m68000_device::eor_b_dd_aips_ifm() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153152,6 +153228,7 @@ void m68000_device::eor_b_dd_aips_ifm() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153209,7 +153286,6 @@ void m68000_device::eor_b_dd_pais_ifm() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153236,6 +153312,7 @@ void m68000_device::eor_b_dd_pais_ifm() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153309,7 +153386,6 @@ void m68000_device::eor_b_dd_das_ifm() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153336,6 +153412,7 @@ void m68000_device::eor_b_dd_das_ifm() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153449,7 +153526,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153476,6 +153552,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153548,7 +153625,6 @@ void m68000_device::eor_b_dd_adr16_ifm() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153575,6 +153651,7 @@ void m68000_device::eor_b_dd_adr16_ifm() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153669,7 +153746,6 @@ void m68000_device::eor_b_dd_adr32_ifm() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153696,6 +153772,7 @@ void m68000_device::eor_b_dd_adr32_ifm() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -153724,13 +153801,13 @@ void m68000_device::eor_w_dd_ds_ifm() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153791,7 +153868,6 @@ void m68000_device::cmpm_w_aips_aipd_ifm() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153815,6 +153891,7 @@ void m68000_device::cmpm_w_aips_aipd_ifm() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153877,7 +153954,6 @@ void m68000_device::eor_w_dd_ais_ifm() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153904,6 +153980,7 @@ void m68000_device::eor_w_dd_ais_ifm() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -153967,7 +154044,6 @@ void m68000_device::eor_w_dd_aips_ifm() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -153994,6 +154070,7 @@ void m68000_device::eor_w_dd_aips_ifm() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154059,7 +154136,6 @@ void m68000_device::eor_w_dd_pais_ifm() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154086,6 +154162,7 @@ void m68000_device::eor_w_dd_pais_ifm() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154167,7 +154244,6 @@ void m68000_device::eor_w_dd_das_ifm() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154194,6 +154270,7 @@ void m68000_device::eor_w_dd_das_ifm() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154315,7 +154392,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154342,6 +154418,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154422,7 +154499,6 @@ void m68000_device::eor_w_dd_adr16_ifm() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154449,6 +154525,7 @@ void m68000_device::eor_w_dd_adr16_ifm() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154551,7 +154628,6 @@ void m68000_device::eor_w_dd_adr32_ifm() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154578,6 +154654,7 @@ void m68000_device::eor_w_dd_adr32_ifm() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154611,7 +154688,6 @@ void m68000_device::eor_l_dd_ds_ifm() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -154644,6 +154720,7 @@ void m68000_device::eor_l_dd_ds_ifm() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -154708,7 +154785,6 @@ void m68000_device::cmpm_l_aips_aipd_ifm() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154759,6 +154835,7 @@ void m68000_device::cmpm_l_aips_aipd_ifm() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154840,7 +154917,6 @@ void m68000_device::eor_l_dd_ais_ifm() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -154890,6 +154966,7 @@ void m68000_device::eor_l_dd_ais_ifm() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -154973,7 +155050,6 @@ void m68000_device::eor_l_dd_aips_ifm() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155023,6 +155099,7 @@ void m68000_device::eor_l_dd_aips_ifm() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155107,7 +155184,6 @@ void m68000_device::eor_l_dd_pais_ifm() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155157,6 +155233,7 @@ void m68000_device::eor_l_dd_pais_ifm() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155258,7 +155335,6 @@ void m68000_device::eor_l_dd_das_ifm() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155308,6 +155384,7 @@ void m68000_device::eor_l_dd_das_ifm() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155449,7 +155526,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155499,6 +155575,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155603,7 +155680,6 @@ void m68000_device::eor_l_dd_adr16_ifm() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155653,6 +155729,7 @@ void m68000_device::eor_l_dd_adr16_ifm() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155779,7 +155856,6 @@ void m68000_device::eor_l_dd_adr32_ifm() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -155829,6 +155905,7 @@ void m68000_device::eor_l_dd_adr32_ifm() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -155862,7 +155939,6 @@ void m68000_device::cmpa_l_ds_ad_ifm() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -155892,6 +155968,7 @@ void m68000_device::cmpa_l_ds_ad_ifm() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155908,7 +155985,6 @@ void m68000_device::cmpa_l_as_ad_ifm() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -155938,6 +156014,7 @@ void m68000_device::cmpa_l_as_ad_ifm() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -155999,7 +156076,6 @@ void m68000_device::cmpa_l_ais_ad_ifm() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156029,6 +156105,7 @@ void m68000_device::cmpa_l_ais_ad_ifm() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156093,7 +156170,6 @@ void m68000_device::cmpa_l_aips_ad_ifm() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156123,6 +156199,7 @@ void m68000_device::cmpa_l_aips_ad_ifm() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156188,7 +156265,6 @@ void m68000_device::cmpa_l_pais_ad_ifm() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156218,6 +156294,7 @@ void m68000_device::cmpa_l_pais_ad_ifm() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156300,7 +156377,6 @@ void m68000_device::cmpa_l_das_ad_ifm() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156330,6 +156406,7 @@ void m68000_device::cmpa_l_das_ad_ifm() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156450,7 +156527,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156480,6 +156556,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156564,7 +156641,6 @@ void m68000_device::cmpa_l_adr16_ad_ifm() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156594,6 +156670,7 @@ void m68000_device::cmpa_l_adr16_ad_ifm() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156699,7 +156776,6 @@ void m68000_device::cmpa_l_adr32_ad_ifm() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156729,6 +156805,7 @@ void m68000_device::cmpa_l_adr32_ad_ifm() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156810,7 +156887,6 @@ void m68000_device::cmpa_l_dpc_ad_ifm() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156840,6 +156916,7 @@ void m68000_device::cmpa_l_dpc_ad_ifm() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -156959,7 +157036,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -156989,6 +157065,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157049,7 +157126,6 @@ void m68000_device::cmpa_l_imm32_ad_ifm() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -157079,6 +157155,7 @@ void m68000_device::cmpa_l_imm32_ad_ifm() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -157095,7 +157172,6 @@ void m68000_device::and_b_ds_dd_ifm() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -157103,6 +157179,7 @@ void m68000_device::and_b_ds_dd_ifm() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157160,7 +157237,6 @@ void m68000_device::and_b_ais_dd_ifm() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157168,6 +157244,7 @@ void m68000_device::and_b_ais_dd_ifm() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157230,7 +157307,6 @@ void m68000_device::and_b_aips_dd_ifm() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157238,6 +157314,7 @@ void m68000_device::and_b_aips_dd_ifm() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157302,7 +157379,6 @@ void m68000_device::and_b_pais_dd_ifm() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157310,6 +157386,7 @@ void m68000_device::and_b_pais_dd_ifm() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157390,7 +157467,6 @@ void m68000_device::and_b_das_dd_ifm() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157398,6 +157474,7 @@ void m68000_device::and_b_das_dd_ifm() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157518,7 +157595,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157526,6 +157602,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157605,7 +157682,6 @@ void m68000_device::and_b_adr16_dd_ifm() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157613,6 +157689,7 @@ void m68000_device::and_b_adr16_dd_ifm() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157714,7 +157791,6 @@ void m68000_device::and_b_adr32_dd_ifm() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157722,6 +157798,7 @@ void m68000_device::and_b_adr32_dd_ifm() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157801,7 +157878,6 @@ void m68000_device::and_b_dpc_dd_ifm() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157809,6 +157885,7 @@ void m68000_device::and_b_dpc_dd_ifm() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157928,7 +158005,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -157936,6 +158012,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -157995,7 +158072,6 @@ void m68000_device::and_b_imm8_dd_ifm() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158003,6 +158079,7 @@ void m68000_device::and_b_imm8_dd_ifm() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158038,7 +158115,6 @@ void m68000_device::and_w_ds_dd_ifm() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158046,6 +158122,7 @@ void m68000_device::and_w_ds_dd_ifm() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158106,7 +158183,6 @@ void m68000_device::and_w_ais_dd_ifm() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158114,6 +158190,7 @@ void m68000_device::and_w_ais_dd_ifm() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158179,7 +158256,6 @@ void m68000_device::and_w_aips_dd_ifm() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158187,6 +158263,7 @@ void m68000_device::and_w_aips_dd_ifm() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158254,7 +158331,6 @@ void m68000_device::and_w_pais_dd_ifm() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158262,6 +158338,7 @@ void m68000_device::and_w_pais_dd_ifm() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158345,7 +158422,6 @@ void m68000_device::and_w_das_dd_ifm() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158353,6 +158429,7 @@ void m68000_device::and_w_das_dd_ifm() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158476,7 +158553,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158484,6 +158560,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158566,7 +158643,6 @@ void m68000_device::and_w_adr16_dd_ifm() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158574,6 +158650,7 @@ void m68000_device::and_w_adr16_dd_ifm() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158678,7 +158755,6 @@ void m68000_device::and_w_adr32_dd_ifm() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158686,6 +158762,7 @@ void m68000_device::and_w_adr32_dd_ifm() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158768,7 +158845,6 @@ void m68000_device::and_w_dpc_dd_ifm() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158776,6 +158852,7 @@ void m68000_device::and_w_dpc_dd_ifm() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158898,7 +158975,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158906,6 +158982,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -158965,7 +159042,6 @@ void m68000_device::and_w_imm16_dd_ifm() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -158973,6 +159049,7 @@ void m68000_device::and_w_imm16_dd_ifm() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -159008,7 +159085,6 @@ void m68000_device::and_l_ds_dd_ifm() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159042,6 +159118,7 @@ void m68000_device::and_l_ds_dd_ifm() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159106,7 +159183,6 @@ void m68000_device::and_l_ais_dd_ifm() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159137,6 +159213,7 @@ void m68000_device::and_l_ais_dd_ifm() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159205,7 +159282,6 @@ void m68000_device::and_l_aips_dd_ifm() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159236,6 +159312,7 @@ void m68000_device::and_l_aips_dd_ifm() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159305,7 +159382,6 @@ void m68000_device::and_l_pais_dd_ifm() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159336,6 +159412,7 @@ void m68000_device::and_l_pais_dd_ifm() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159422,7 +159499,6 @@ void m68000_device::and_l_das_dd_ifm() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159453,6 +159529,7 @@ void m68000_device::and_l_das_dd_ifm() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159579,7 +159656,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159610,6 +159686,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159699,7 +159776,6 @@ void m68000_device::and_l_adr16_dd_ifm() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159730,6 +159806,7 @@ void m68000_device::and_l_adr16_dd_ifm() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159841,7 +159918,6 @@ void m68000_device::and_l_adr32_dd_ifm() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159872,6 +159948,7 @@ void m68000_device::and_l_adr32_dd_ifm() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -159957,7 +160034,6 @@ void m68000_device::and_l_dpc_dd_ifm() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159988,6 +160064,7 @@ void m68000_device::and_l_dpc_dd_ifm() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160113,7 +160190,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160144,6 +160220,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160208,7 +160285,6 @@ void m68000_device::and_l_imm32_dd_ifm() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160242,6 +160318,7 @@ void m68000_device::and_l_imm32_dd_ifm() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -160260,7 +160337,6 @@ void m68000_device::mulu_w_ds_dd_ifm() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -160318,6 +160394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160363,7 +160440,6 @@ void m68000_device::mulu_w_ais_dd_ifm() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160421,6 +160497,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160470,7 +160547,6 @@ void m68000_device::mulu_w_aips_dd_ifm() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160528,6 +160604,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160579,7 +160656,6 @@ void m68000_device::mulu_w_pais_dd_ifm() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160637,6 +160713,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160704,7 +160781,6 @@ void m68000_device::mulu_w_das_dd_ifm() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160762,6 +160838,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160867,7 +160944,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -160925,6 +161001,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -160991,7 +161068,6 @@ void m68000_device::mulu_w_adr16_dd_ifm() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161049,6 +161125,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161136,7 +161213,6 @@ void m68000_device::mulu_w_adr32_dd_ifm() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161194,6 +161270,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161260,7 +161337,6 @@ void m68000_device::mulu_w_dpc_dd_ifm() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161318,6 +161394,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161422,7 +161499,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -161480,6 +161556,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161524,7 +161601,6 @@ void m68000_device::mulu_w_imm16_dd_ifm() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -161582,6 +161658,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -161603,7 +161680,6 @@ void m68000_device::abcd_ds_dd_ifm() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161632,6 +161708,7 @@ void m68000_device::abcd_ds_dd_ifm() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161676,7 +161753,6 @@ void m68000_device::abcd_pais_paid_ifm() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -161723,6 +161799,7 @@ void m68000_device::abcd_pais_paid_ifm() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161772,7 +161849,6 @@ void m68000_device::and_b_dd_ais_ifm() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -161799,6 +161875,7 @@ void m68000_device::and_b_dd_ais_ifm() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161854,7 +161931,6 @@ void m68000_device::and_b_dd_aips_ifm() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -161881,6 +161957,7 @@ void m68000_device::and_b_dd_aips_ifm() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -161938,7 +162015,6 @@ void m68000_device::and_b_dd_pais_ifm() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -161965,6 +162041,7 @@ void m68000_device::and_b_dd_pais_ifm() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162038,7 +162115,6 @@ void m68000_device::and_b_dd_das_ifm() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162065,6 +162141,7 @@ void m68000_device::and_b_dd_das_ifm() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162178,7 +162255,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162205,6 +162281,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162277,7 +162354,6 @@ void m68000_device::and_b_dd_adr16_ifm() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162304,6 +162380,7 @@ void m68000_device::and_b_dd_adr16_ifm() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162398,7 +162475,6 @@ void m68000_device::and_b_dd_adr32_ifm() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162425,6 +162501,7 @@ void m68000_device::and_b_dd_adr32_ifm() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -162453,7 +162530,6 @@ void m68000_device::exg_dd_ds_ifm() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162481,6 +162557,7 @@ void m68000_device::exg_dd_ds_ifm() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162497,7 +162574,6 @@ void m68000_device::exg_ad_as_ifm() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -162525,6 +162601,7 @@ void m68000_device::exg_ad_as_ifm() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -162566,7 +162643,6 @@ void m68000_device::and_w_dd_ais_ifm() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162593,6 +162669,7 @@ void m68000_device::and_w_dd_ais_ifm() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -162656,7 +162733,6 @@ void m68000_device::and_w_dd_aips_ifm() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162683,6 +162759,7 @@ void m68000_device::and_w_dd_aips_ifm() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -162748,7 +162825,6 @@ void m68000_device::and_w_dd_pais_ifm() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162775,6 +162851,7 @@ void m68000_device::and_w_dd_pais_ifm() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -162856,7 +162933,6 @@ void m68000_device::and_w_dd_das_ifm() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -162883,6 +162959,7 @@ void m68000_device::and_w_dd_das_ifm() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163004,7 +163081,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163031,6 +163107,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163111,7 +163188,6 @@ void m68000_device::and_w_dd_adr16_ifm() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163138,6 +163214,7 @@ void m68000_device::and_w_dd_adr16_ifm() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163240,7 +163317,6 @@ void m68000_device::and_w_dd_adr32_ifm() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163267,6 +163343,7 @@ void m68000_device::and_w_dd_adr32_ifm() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163300,7 +163377,6 @@ void m68000_device::exg_dd_as_ifm() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -163328,6 +163404,7 @@ void m68000_device::exg_dd_as_ifm() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -163390,7 +163467,6 @@ void m68000_device::and_l_dd_ais_ifm() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163440,6 +163516,7 @@ void m68000_device::and_l_dd_ais_ifm() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163523,7 +163600,6 @@ void m68000_device::and_l_dd_aips_ifm() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163573,6 +163649,7 @@ void m68000_device::and_l_dd_aips_ifm() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163657,7 +163734,6 @@ void m68000_device::and_l_dd_pais_ifm() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163707,6 +163783,7 @@ void m68000_device::and_l_dd_pais_ifm() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163808,7 +163885,6 @@ void m68000_device::and_l_dd_das_ifm() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -163858,6 +163934,7 @@ void m68000_device::and_l_dd_das_ifm() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -163999,7 +164076,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -164049,6 +164125,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -164153,7 +164230,6 @@ void m68000_device::and_l_dd_adr16_ifm() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -164203,6 +164279,7 @@ void m68000_device::and_l_dd_adr16_ifm() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -164329,7 +164406,6 @@ void m68000_device::and_l_dd_adr32_ifm() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -164379,6 +164455,7 @@ void m68000_device::and_l_dd_adr32_ifm() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -164412,7 +164489,6 @@ void m68000_device::muls_w_ds_dd_ifm() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -164472,6 +164548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164524,7 +164601,6 @@ void m68000_device::muls_w_ais_dd_ifm() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164584,6 +164660,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164640,7 +164717,6 @@ void m68000_device::muls_w_aips_dd_ifm() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164700,6 +164776,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164758,7 +164835,6 @@ void m68000_device::muls_w_pais_dd_ifm() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164818,6 +164894,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -164892,7 +164969,6 @@ void m68000_device::muls_w_das_dd_ifm() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -164952,6 +165028,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165064,7 +165141,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165124,6 +165200,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165197,7 +165274,6 @@ void m68000_device::muls_w_adr16_dd_ifm() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165257,6 +165333,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165351,7 +165428,6 @@ void m68000_device::muls_w_adr32_dd_ifm() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165411,6 +165487,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165484,7 +165561,6 @@ void m68000_device::muls_w_dpc_dd_ifm() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165544,6 +165620,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165655,7 +165732,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -165715,6 +165791,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165766,7 +165843,6 @@ void m68000_device::muls_w_imm16_dd_ifm() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -165826,6 +165902,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -165854,7 +165931,6 @@ void m68000_device::add_b_ds_dd_ifm() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165862,6 +165938,7 @@ void m68000_device::add_b_ds_dd_ifm() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -165917,7 +165994,6 @@ void m68000_device::add_b_ais_dd_ifm() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165925,6 +166001,7 @@ void m68000_device::add_b_ais_dd_ifm() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -165984,7 +166061,6 @@ void m68000_device::add_b_aips_dd_ifm() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -165992,6 +166068,7 @@ void m68000_device::add_b_aips_dd_ifm() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166053,7 +166130,6 @@ void m68000_device::add_b_pais_dd_ifm() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166061,6 +166137,7 @@ void m68000_device::add_b_pais_dd_ifm() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166138,7 +166215,6 @@ void m68000_device::add_b_das_dd_ifm() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166146,6 +166222,7 @@ void m68000_device::add_b_das_dd_ifm() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166261,7 +166338,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166269,6 +166345,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166345,7 +166422,6 @@ void m68000_device::add_b_adr16_dd_ifm() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166353,6 +166429,7 @@ void m68000_device::add_b_adr16_dd_ifm() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166450,7 +166527,6 @@ void m68000_device::add_b_adr32_dd_ifm() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166458,6 +166534,7 @@ void m68000_device::add_b_adr32_dd_ifm() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166534,7 +166611,6 @@ void m68000_device::add_b_dpc_dd_ifm() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166542,6 +166618,7 @@ void m68000_device::add_b_dpc_dd_ifm() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166656,7 +166733,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166664,6 +166740,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166721,7 +166798,6 @@ void m68000_device::add_b_imm8_dd_ifm() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -166729,6 +166805,7 @@ void m68000_device::add_b_imm8_dd_ifm() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166763,7 +166840,6 @@ void m68000_device::add_w_ds_dd_ifm() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -166771,6 +166847,7 @@ void m68000_device::add_w_ds_dd_ifm() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166805,7 +166882,6 @@ void m68000_device::add_w_as_dd_ifm() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -166813,6 +166889,7 @@ void m68000_device::add_w_as_dd_ifm() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166871,7 +166948,6 @@ void m68000_device::add_w_ais_dd_ifm() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166879,6 +166955,7 @@ void m68000_device::add_w_ais_dd_ifm() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -166941,7 +167018,6 @@ void m68000_device::add_w_aips_dd_ifm() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -166949,6 +167025,7 @@ void m68000_device::add_w_aips_dd_ifm() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167013,7 +167090,6 @@ void m68000_device::add_w_pais_dd_ifm() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167021,6 +167097,7 @@ void m68000_device::add_w_pais_dd_ifm() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167101,7 +167178,6 @@ void m68000_device::add_w_das_dd_ifm() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167109,6 +167185,7 @@ void m68000_device::add_w_das_dd_ifm() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167227,7 +167304,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167235,6 +167311,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167314,7 +167391,6 @@ void m68000_device::add_w_adr16_dd_ifm() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167322,6 +167398,7 @@ void m68000_device::add_w_adr16_dd_ifm() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167422,7 +167499,6 @@ void m68000_device::add_w_adr32_dd_ifm() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167430,6 +167506,7 @@ void m68000_device::add_w_adr32_dd_ifm() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167509,7 +167586,6 @@ void m68000_device::add_w_dpc_dd_ifm() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167517,6 +167593,7 @@ void m68000_device::add_w_dpc_dd_ifm() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167634,7 +167711,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167642,6 +167718,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167699,7 +167776,6 @@ void m68000_device::add_w_imm16_dd_ifm() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -167707,6 +167783,7 @@ void m68000_device::add_w_imm16_dd_ifm() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -167741,7 +167818,6 @@ void m68000_device::add_l_ds_dd_ifm() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -167774,6 +167850,7 @@ void m68000_device::add_l_ds_dd_ifm() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167791,7 +167868,6 @@ void m68000_device::add_l_as_dd_ifm() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -167824,6 +167900,7 @@ void m68000_device::add_l_as_dd_ifm() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167886,7 +167963,6 @@ void m68000_device::add_l_ais_dd_ifm() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -167917,6 +167993,7 @@ void m68000_device::add_l_ais_dd_ifm() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167982,7 +168059,6 @@ void m68000_device::add_l_aips_dd_ifm() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168013,6 +168089,7 @@ void m68000_device::add_l_aips_dd_ifm() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168079,7 +168156,6 @@ void m68000_device::add_l_pais_dd_ifm() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168110,6 +168186,7 @@ void m68000_device::add_l_pais_dd_ifm() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168193,7 +168270,6 @@ void m68000_device::add_l_das_dd_ifm() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168224,6 +168300,7 @@ void m68000_device::add_l_das_dd_ifm() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168345,7 +168422,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168376,6 +168452,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168461,7 +168538,6 @@ void m68000_device::add_l_adr16_dd_ifm() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168492,6 +168568,7 @@ void m68000_device::add_l_adr16_dd_ifm() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168598,7 +168675,6 @@ void m68000_device::add_l_adr32_dd_ifm() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168629,6 +168705,7 @@ void m68000_device::add_l_adr32_dd_ifm() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168711,7 +168788,6 @@ void m68000_device::add_l_dpc_dd_ifm() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168742,6 +168818,7 @@ void m68000_device::add_l_dpc_dd_ifm() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168862,7 +168939,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168893,6 +168969,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168954,7 +169031,6 @@ void m68000_device::add_l_imm32_dd_ifm() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -168987,6 +169063,7 @@ void m68000_device::add_l_imm32_dd_ifm() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169004,7 +169081,6 @@ void m68000_device::adda_w_ds_ad_ifm() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -169035,6 +169111,7 @@ void m68000_device::adda_w_ds_ad_ifm() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169052,7 +169129,6 @@ void m68000_device::adda_w_as_ad_ifm() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -169083,6 +169159,7 @@ void m68000_device::adda_w_as_ad_ifm() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169124,7 +169201,6 @@ void m68000_device::adda_w_ais_ad_ifm() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169155,6 +169231,7 @@ void m68000_device::adda_w_ais_ad_ifm() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169200,7 +169277,6 @@ void m68000_device::adda_w_aips_ad_ifm() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169231,6 +169307,7 @@ void m68000_device::adda_w_aips_ad_ifm() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169278,7 +169355,6 @@ void m68000_device::adda_w_pais_ad_ifm() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169309,6 +169385,7 @@ void m68000_device::adda_w_pais_ad_ifm() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169372,7 +169449,6 @@ void m68000_device::adda_w_das_ad_ifm() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169403,6 +169479,7 @@ void m68000_device::adda_w_das_ad_ifm() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169504,7 +169581,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169535,6 +169611,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169597,7 +169674,6 @@ void m68000_device::adda_w_adr16_ad_ifm() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169628,6 +169704,7 @@ void m68000_device::adda_w_adr16_ad_ifm() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169711,7 +169788,6 @@ void m68000_device::adda_w_adr32_ad_ifm() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169742,6 +169818,7 @@ void m68000_device::adda_w_adr32_ad_ifm() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169804,7 +169881,6 @@ void m68000_device::adda_w_dpc_ad_ifm() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169835,6 +169911,7 @@ void m68000_device::adda_w_dpc_ad_ifm() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -169935,7 +170012,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -169966,6 +170042,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170006,7 +170083,6 @@ void m68000_device::adda_w_imm16_ad_ifm() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -170037,6 +170113,7 @@ void m68000_device::adda_w_imm16_ad_ifm() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -170054,7 +170131,6 @@ void m68000_device::addx_b_ds_dd_ifm() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170062,6 +170138,7 @@ void m68000_device::addx_b_ds_dd_ifm() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170126,7 +170203,6 @@ void m68000_device::addx_b_pais_paid_ifm() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); if(!(m_aob & 1)) @@ -170172,6 +170248,7 @@ void m68000_device::addx_b_pais_paid_ifm() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170221,7 +170298,6 @@ void m68000_device::add_b_dd_ais_ifm() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170248,6 +170324,7 @@ void m68000_device::add_b_dd_ais_ifm() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170300,7 +170377,6 @@ void m68000_device::add_b_dd_aips_ifm() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170327,6 +170403,7 @@ void m68000_device::add_b_dd_aips_ifm() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170381,7 +170458,6 @@ void m68000_device::add_b_dd_pais_ifm() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170408,6 +170484,7 @@ void m68000_device::add_b_dd_pais_ifm() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170478,7 +170555,6 @@ void m68000_device::add_b_dd_das_ifm() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170505,6 +170581,7 @@ void m68000_device::add_b_dd_das_ifm() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170613,7 +170690,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170640,6 +170716,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170709,7 +170786,6 @@ void m68000_device::add_b_dd_adr16_ifm() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170736,6 +170812,7 @@ void m68000_device::add_b_dd_adr16_ifm() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170826,7 +170903,6 @@ void m68000_device::add_b_dd_adr32_ifm() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170853,6 +170929,7 @@ void m68000_device::add_b_dd_adr32_ifm() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); @@ -170880,7 +170957,6 @@ void m68000_device::addx_w_ds_dd_ifm() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170888,6 +170964,7 @@ void m68000_device::addx_w_ds_dd_ifm() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -170955,7 +171032,6 @@ void m68000_device::addx_w_pais_paid_ifm() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171004,6 +171080,7 @@ void m68000_device::addx_w_pais_paid_ifm() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171061,7 +171138,6 @@ void m68000_device::add_w_dd_ais_ifm() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171088,6 +171164,7 @@ void m68000_device::add_w_dd_ais_ifm() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171148,7 +171225,6 @@ void m68000_device::add_w_dd_aips_ifm() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171175,6 +171251,7 @@ void m68000_device::add_w_dd_aips_ifm() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171237,7 +171314,6 @@ void m68000_device::add_w_dd_pais_ifm() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171264,6 +171340,7 @@ void m68000_device::add_w_dd_pais_ifm() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171342,7 +171419,6 @@ void m68000_device::add_w_dd_das_ifm() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171369,6 +171445,7 @@ void m68000_device::add_w_dd_das_ifm() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171485,7 +171562,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171512,6 +171588,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171589,7 +171666,6 @@ void m68000_device::add_w_dd_adr16_ifm() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171616,6 +171692,7 @@ void m68000_device::add_w_dd_adr16_ifm() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171714,7 +171791,6 @@ void m68000_device::add_w_dd_adr32_ifm() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -171741,6 +171817,7 @@ void m68000_device::add_w_dd_adr32_ifm() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171773,7 +171850,6 @@ void m68000_device::addx_l_ds_dd_ifm() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -171807,6 +171883,7 @@ void m68000_device::addx_l_ds_dd_ifm() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -171926,7 +172003,6 @@ void m68000_device::addx_l_pais_paid_ifm() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -171973,6 +172049,7 @@ void m68000_device::addx_l_pais_paid_ifm() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172051,7 +172128,6 @@ void m68000_device::add_l_dd_ais_ifm() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172101,6 +172177,7 @@ void m68000_device::add_l_dd_ais_ifm() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172181,7 +172258,6 @@ void m68000_device::add_l_dd_aips_ifm() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172231,6 +172307,7 @@ void m68000_device::add_l_dd_aips_ifm() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172312,7 +172389,6 @@ void m68000_device::add_l_dd_pais_ifm() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172362,6 +172438,7 @@ void m68000_device::add_l_dd_pais_ifm() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172460,7 +172537,6 @@ void m68000_device::add_l_dd_das_ifm() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172510,6 +172586,7 @@ void m68000_device::add_l_dd_das_ifm() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172646,7 +172723,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172696,6 +172772,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172796,7 +172873,6 @@ void m68000_device::add_l_dd_adr16_ifm() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -172846,6 +172922,7 @@ void m68000_device::add_l_dd_adr16_ifm() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -172967,7 +173044,6 @@ void m68000_device::add_l_dd_adr32_ifm() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); m_icount -= 4; @@ -173017,6 +173093,7 @@ void m68000_device::add_l_dd_adr32_ifm() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -173049,7 +173126,6 @@ void m68000_device::adda_l_ds_ad_ifm() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -173080,6 +173156,7 @@ void m68000_device::adda_l_ds_ad_ifm() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173097,7 +173174,6 @@ void m68000_device::adda_l_as_ad_ifm() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -173128,6 +173204,7 @@ void m68000_device::adda_l_as_ad_ifm() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173190,7 +173267,6 @@ void m68000_device::adda_l_ais_ad_ifm() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173219,6 +173295,7 @@ void m68000_device::adda_l_ais_ad_ifm() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173284,7 +173361,6 @@ void m68000_device::adda_l_aips_ad_ifm() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173313,6 +173389,7 @@ void m68000_device::adda_l_aips_ad_ifm() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173379,7 +173456,6 @@ void m68000_device::adda_l_pais_ad_ifm() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173408,6 +173484,7 @@ void m68000_device::adda_l_pais_ad_ifm() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173491,7 +173568,6 @@ void m68000_device::adda_l_das_ad_ifm() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173520,6 +173596,7 @@ void m68000_device::adda_l_das_ad_ifm() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173641,7 +173718,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173670,6 +173746,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173755,7 +173832,6 @@ void m68000_device::adda_l_adr16_ad_ifm() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173784,6 +173860,7 @@ void m68000_device::adda_l_adr16_ad_ifm() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -173890,7 +173967,6 @@ void m68000_device::adda_l_adr32_ad_ifm() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173919,6 +173995,7 @@ void m68000_device::adda_l_adr32_ad_ifm() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174001,7 +174078,6 @@ void m68000_device::adda_l_dpc_ad_ifm() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174030,6 +174106,7 @@ void m68000_device::adda_l_dpc_ad_ifm() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174150,7 +174227,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -174179,6 +174255,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174240,7 +174317,6 @@ void m68000_device::adda_l_imm32_ad_ifm() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -174271,6 +174347,7 @@ void m68000_device::adda_l_imm32_ad_ifm() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174287,7 +174364,6 @@ void m68000_device::asr_b_imm3_ds_ifm() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174336,6 +174412,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174352,7 +174429,6 @@ void m68000_device::lsr_b_imm3_ds_ifm() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174401,6 +174477,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174417,7 +174494,6 @@ void m68000_device::roxr_b_imm3_ds_ifm() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174466,6 +174542,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174482,7 +174559,6 @@ void m68000_device::ror_b_imm3_ds_ifm() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174531,6 +174607,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174548,7 +174625,6 @@ void m68000_device::asr_b_dd_ds_ifm() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174597,6 +174673,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174614,7 +174691,6 @@ void m68000_device::lsr_b_dd_ds_ifm() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174663,6 +174739,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174680,7 +174757,6 @@ void m68000_device::roxr_b_dd_ds_ifm() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174729,6 +174805,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174746,7 +174823,6 @@ void m68000_device::ror_b_dd_ds_ifm() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -174795,6 +174871,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174811,7 +174888,6 @@ void m68000_device::asr_w_imm3_ds_ifm() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174860,6 +174936,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174876,7 +174953,6 @@ void m68000_device::lsr_w_imm3_ds_ifm() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -174925,6 +175001,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -174941,7 +175018,6 @@ void m68000_device::roxr_w_imm3_ds_ifm() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -174990,6 +175066,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175006,7 +175083,6 @@ void m68000_device::ror_w_imm3_ds_ifm() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175055,6 +175131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175072,7 +175149,6 @@ void m68000_device::asr_w_dd_ds_ifm() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175121,6 +175197,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175138,7 +175215,6 @@ void m68000_device::lsr_w_dd_ds_ifm() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175187,6 +175263,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175204,7 +175281,6 @@ void m68000_device::roxr_w_dd_ds_ifm() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175253,6 +175329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175270,7 +175347,6 @@ void m68000_device::ror_w_dd_ds_ifm() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -175319,6 +175395,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -175335,7 +175412,6 @@ void m68000_device::asr_l_imm3_ds_ifm() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175388,6 +175464,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175406,7 +175483,6 @@ void m68000_device::lsr_l_imm3_ds_ifm() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175459,6 +175535,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175477,7 +175554,6 @@ void m68000_device::roxr_l_imm3_ds_ifm() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175530,6 +175606,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175548,7 +175625,6 @@ void m68000_device::ror_l_imm3_ds_ifm() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175601,6 +175677,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175620,7 +175697,6 @@ void m68000_device::asr_l_dd_ds_ifm() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175673,6 +175749,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175692,7 +175769,6 @@ void m68000_device::lsr_l_dd_ds_ifm() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175745,6 +175821,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175764,7 +175841,6 @@ void m68000_device::roxr_l_dd_ds_ifm() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -175817,6 +175893,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -175836,7 +175913,6 @@ void m68000_device::ror_l_dd_ds_ifm() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -175889,6 +175965,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -175932,7 +176009,6 @@ void m68000_device::asr_ais_ifm() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -175964,6 +176040,7 @@ void m68000_device::asr_ais_ifm() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176024,7 +176101,6 @@ void m68000_device::asr_aips_ifm() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176056,6 +176132,7 @@ void m68000_device::asr_aips_ifm() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176118,7 +176195,6 @@ void m68000_device::asr_pais_ifm() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176150,6 +176226,7 @@ void m68000_device::asr_pais_ifm() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176228,7 +176305,6 @@ void m68000_device::asr_das_ifm() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176260,6 +176336,7 @@ void m68000_device::asr_das_ifm() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176376,7 +176453,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176408,6 +176484,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176485,7 +176562,6 @@ void m68000_device::asr_adr16_ifm() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176517,6 +176593,7 @@ void m68000_device::asr_adr16_ifm() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176615,7 +176692,6 @@ void m68000_device::asr_adr32_ifm() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -176647,6 +176723,7 @@ void m68000_device::asr_adr32_ifm() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -176678,7 +176755,6 @@ void m68000_device::asl_b_imm3_ds_ifm() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176727,6 +176803,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176743,7 +176820,6 @@ void m68000_device::lsl_b_imm3_ds_ifm() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176792,6 +176868,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -176809,7 +176886,6 @@ void m68000_device::roxl_b_imm3_ds_ifm() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -176858,6 +176934,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176874,7 +176951,6 @@ void m68000_device::rol_b_imm3_ds_ifm() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176923,6 +176999,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -176940,7 +177017,6 @@ void m68000_device::asl_b_dd_ds_ifm() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -176989,6 +177065,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177006,7 +177083,6 @@ void m68000_device::lsl_b_dd_ds_ifm() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177055,6 +177131,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -177073,7 +177150,6 @@ void m68000_device::roxl_b_dd_ds_ifm() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177122,6 +177198,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177139,7 +177216,6 @@ void m68000_device::rol_b_dd_ds_ifm() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -177188,6 +177264,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177204,7 +177281,6 @@ void m68000_device::asl_w_imm3_ds_ifm() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177253,6 +177329,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177269,7 +177346,6 @@ void m68000_device::lsl_w_imm3_ds_ifm() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177318,6 +177394,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177335,7 +177412,6 @@ void m68000_device::roxl_w_imm3_ds_ifm() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177384,6 +177460,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177400,7 +177477,6 @@ void m68000_device::rol_w_imm3_ds_ifm() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177449,6 +177525,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177466,7 +177543,6 @@ void m68000_device::asl_w_dd_ds_ifm() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177515,6 +177591,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177532,7 +177609,6 @@ void m68000_device::lsl_w_dd_ds_ifm() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177581,6 +177657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -177599,7 +177676,6 @@ void m68000_device::roxl_w_dd_ds_ifm() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177648,6 +177724,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177665,7 +177742,6 @@ void m68000_device::rol_w_dd_ds_ifm() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -177714,6 +177790,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -177730,7 +177807,6 @@ void m68000_device::asl_l_imm3_ds_ifm() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177783,6 +177859,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177801,7 +177878,6 @@ void m68000_device::lsl_l_imm3_ds_ifm() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177856,6 +177932,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -177874,7 +177951,6 @@ void m68000_device::roxl_l_imm3_ds_ifm() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -177927,6 +178003,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -177945,7 +178022,6 @@ void m68000_device::rol_l_imm3_ds_ifm() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -177998,6 +178074,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178017,7 +178094,6 @@ void m68000_device::asl_l_dd_ds_ifm() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178070,6 +178146,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178089,7 +178166,6 @@ void m68000_device::lsl_l_dd_ds_ifm() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178144,6 +178220,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178163,7 +178240,6 @@ void m68000_device::roxl_l_dd_ds_ifm() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -178216,6 +178292,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -178235,7 +178312,6 @@ void m68000_device::rol_l_dd_ds_ifm() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -178288,6 +178364,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -178331,7 +178408,6 @@ void m68000_device::asl_ais_ifm() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178363,6 +178439,7 @@ void m68000_device::asl_ais_ifm() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178423,7 +178500,6 @@ void m68000_device::asl_aips_ifm() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178455,6 +178531,7 @@ void m68000_device::asl_aips_ifm() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178517,7 +178594,6 @@ void m68000_device::asl_pais_ifm() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178549,6 +178625,7 @@ void m68000_device::asl_pais_ifm() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178627,7 +178704,6 @@ void m68000_device::asl_das_ifm() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178659,6 +178735,7 @@ void m68000_device::asl_das_ifm() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178775,7 +178852,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178807,6 +178883,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -178884,7 +178961,6 @@ void m68000_device::asl_adr16_ifm() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -178916,6 +178992,7 @@ void m68000_device::asl_adr16_ifm() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179014,7 +179091,6 @@ void m68000_device::asl_adr32_ifm() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179046,6 +179122,7 @@ void m68000_device::asl_adr32_ifm() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179102,7 +179179,6 @@ void m68000_device::lsr_ais_ifm() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179134,6 +179210,7 @@ void m68000_device::lsr_ais_ifm() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179194,7 +179271,6 @@ void m68000_device::lsr_aips_ifm() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179226,6 +179302,7 @@ void m68000_device::lsr_aips_ifm() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179288,7 +179365,6 @@ void m68000_device::lsr_pais_ifm() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179320,6 +179396,7 @@ void m68000_device::lsr_pais_ifm() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179398,7 +179475,6 @@ void m68000_device::lsr_das_ifm() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179430,6 +179506,7 @@ void m68000_device::lsr_das_ifm() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179546,7 +179623,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179578,6 +179654,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179655,7 +179732,6 @@ void m68000_device::lsr_adr16_ifm() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179687,6 +179763,7 @@ void m68000_device::lsr_adr16_ifm() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179785,7 +179862,6 @@ void m68000_device::lsr_adr32_ifm() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179817,6 +179893,7 @@ void m68000_device::lsr_adr32_ifm() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179874,7 +179951,6 @@ void m68000_device::lsl_ais_ifm() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -179906,6 +179982,7 @@ void m68000_device::lsl_ais_ifm() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -179969,7 +180046,6 @@ void m68000_device::lsl_aips_ifm() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180001,6 +180077,7 @@ void m68000_device::lsl_aips_ifm() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180066,7 +180143,6 @@ void m68000_device::lsl_pais_ifm() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180098,6 +180174,7 @@ void m68000_device::lsl_pais_ifm() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180179,7 +180256,6 @@ void m68000_device::lsl_das_ifm() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180211,6 +180287,7 @@ void m68000_device::lsl_das_ifm() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180332,7 +180409,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180364,6 +180440,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180444,7 +180521,6 @@ void m68000_device::lsl_adr16_ifm() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180476,6 +180552,7 @@ void m68000_device::lsl_adr16_ifm() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180578,7 +180655,6 @@ void m68000_device::lsl_adr32_ifm() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180610,6 +180686,7 @@ void m68000_device::lsl_adr32_ifm() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180667,7 +180744,6 @@ void m68000_device::roxr_ais_ifm() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180699,6 +180775,7 @@ void m68000_device::roxr_ais_ifm() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180759,7 +180836,6 @@ void m68000_device::roxr_aips_ifm() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180791,6 +180867,7 @@ void m68000_device::roxr_aips_ifm() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180853,7 +180930,6 @@ void m68000_device::roxr_pais_ifm() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180885,6 +180961,7 @@ void m68000_device::roxr_pais_ifm() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -180963,7 +181040,6 @@ void m68000_device::roxr_das_ifm() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -180995,6 +181071,7 @@ void m68000_device::roxr_das_ifm() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181111,7 +181188,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181143,6 +181219,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181220,7 +181297,6 @@ void m68000_device::roxr_adr16_ifm() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181252,6 +181328,7 @@ void m68000_device::roxr_adr16_ifm() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181350,7 +181427,6 @@ void m68000_device::roxr_adr32_ifm() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181382,6 +181458,7 @@ void m68000_device::roxr_adr32_ifm() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181438,7 +181515,6 @@ void m68000_device::roxl_ais_ifm() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181470,6 +181546,7 @@ void m68000_device::roxl_ais_ifm() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181530,7 +181607,6 @@ void m68000_device::roxl_aips_ifm() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181562,6 +181638,7 @@ void m68000_device::roxl_aips_ifm() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181624,7 +181701,6 @@ void m68000_device::roxl_pais_ifm() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181656,6 +181732,7 @@ void m68000_device::roxl_pais_ifm() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181734,7 +181811,6 @@ void m68000_device::roxl_das_ifm() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181766,6 +181842,7 @@ void m68000_device::roxl_das_ifm() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181882,7 +181959,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -181914,6 +181990,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -181991,7 +182068,6 @@ void m68000_device::roxl_adr16_ifm() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182023,6 +182099,7 @@ void m68000_device::roxl_adr16_ifm() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182121,7 +182198,6 @@ void m68000_device::roxl_adr32_ifm() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182153,6 +182229,7 @@ void m68000_device::roxl_adr32_ifm() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182209,7 +182286,6 @@ void m68000_device::ror_ais_ifm() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182241,6 +182317,7 @@ void m68000_device::ror_ais_ifm() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182301,7 +182378,6 @@ void m68000_device::ror_aips_ifm() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182333,6 +182409,7 @@ void m68000_device::ror_aips_ifm() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182395,7 +182472,6 @@ void m68000_device::ror_pais_ifm() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182427,6 +182503,7 @@ void m68000_device::ror_pais_ifm() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182505,7 +182582,6 @@ void m68000_device::ror_das_ifm() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182537,6 +182613,7 @@ void m68000_device::ror_das_ifm() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182653,7 +182730,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182685,6 +182761,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182762,7 +182839,6 @@ void m68000_device::ror_adr16_ifm() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182794,6 +182870,7 @@ void m68000_device::ror_adr16_ifm() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182892,7 +182969,6 @@ void m68000_device::ror_adr32_ifm() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -182924,6 +183000,7 @@ void m68000_device::ror_adr32_ifm() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -182980,7 +183057,6 @@ void m68000_device::rol_ais_ifm() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183012,6 +183088,7 @@ void m68000_device::rol_ais_ifm() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183072,7 +183149,6 @@ void m68000_device::rol_aips_ifm() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183104,6 +183180,7 @@ void m68000_device::rol_aips_ifm() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183166,7 +183243,6 @@ void m68000_device::rol_pais_ifm() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183198,6 +183274,7 @@ void m68000_device::rol_pais_ifm() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183276,7 +183353,6 @@ void m68000_device::rol_das_ifm() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183308,6 +183384,7 @@ void m68000_device::rol_das_ifm() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183424,7 +183501,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183456,6 +183532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183533,7 +183610,6 @@ void m68000_device::rol_adr16_ifm() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183565,6 +183641,7 @@ void m68000_device::rol_adr16_ifm() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); @@ -183663,7 +183740,6 @@ void m68000_device::rol_adr32_ifm() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -183695,6 +183771,7 @@ void m68000_device::rol_adr32_ifm() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff); diff --git a/src/devices/cpu/m68000/m68000-sip.cpp b/src/devices/cpu/m68000/m68000-sip.cpp index 8be207b3208..b5e42bff910 100644 --- a/src/devices/cpu/m68000/m68000-sip.cpp +++ b/src/devices/cpu/m68000/m68000-sip.cpp @@ -12,6 +12,7 @@ void m68000_device::state_reset_ip() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156,11 +157,11 @@ void m68000_device::state_reset_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -291,6 +292,7 @@ void m68000_device::state_bus_error_ip() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -470,11 +472,11 @@ void m68000_device::state_bus_error_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -605,6 +607,7 @@ void m68000_device::state_address_error_ip() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -784,11 +787,11 @@ void m68000_device::state_address_error_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -903,10 +906,10 @@ void m68000_device::state_interrupt_ip() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -1040,11 +1043,11 @@ void m68000_device::state_interrupt_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1248,11 +1251,11 @@ void m68000_device::state_trace_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1456,11 +1459,11 @@ void m68000_device::state_illegal_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1664,11 +1667,11 @@ void m68000_device::state_priviledge_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1872,11 +1875,11 @@ void m68000_device::state_linea_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2080,11 +2083,11 @@ void m68000_device::state_linef_ip() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2150,13 +2153,13 @@ void m68000_device::ori_b_imm8_ds_ip() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2249,7 +2252,6 @@ void m68000_device::ori_b_imm8_ais_ip() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2279,6 +2281,7 @@ void m68000_device::ori_b_imm8_ais_ip() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2368,7 +2371,6 @@ void m68000_device::ori_b_imm8_aips_ip() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2398,6 +2400,7 @@ void m68000_device::ori_b_imm8_aips_ip() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2489,7 +2492,6 @@ void m68000_device::ori_b_imm8_pais_ip() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2519,6 +2521,7 @@ void m68000_device::ori_b_imm8_pais_ip() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2629,7 +2632,6 @@ void m68000_device::ori_b_imm8_das_ip() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2659,6 +2661,7 @@ void m68000_device::ori_b_imm8_das_ip() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2812,7 +2815,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2842,6 +2844,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2951,7 +2954,6 @@ void m68000_device::ori_b_imm8_adr16_ip() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2981,6 +2983,7 @@ void m68000_device::ori_b_imm8_adr16_ip() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -3115,7 +3118,6 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3145,6 +3147,7 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -3251,12 +3254,12 @@ void m68000_device::ori_imm8_ccr_ip() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3323,13 +3326,13 @@ void m68000_device::ori_w_imm16_ds_ip() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3426,7 +3429,6 @@ void m68000_device::ori_w_imm16_ais_ip() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3456,6 +3458,7 @@ void m68000_device::ori_w_imm16_ais_ip() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3555,7 +3558,6 @@ void m68000_device::ori_w_imm16_aips_ip() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3585,6 +3587,7 @@ void m68000_device::ori_w_imm16_aips_ip() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3686,7 +3689,6 @@ void m68000_device::ori_w_imm16_pais_ip() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3716,6 +3718,7 @@ void m68000_device::ori_w_imm16_pais_ip() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3836,7 +3839,6 @@ void m68000_device::ori_w_imm16_das_ip() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3866,6 +3868,7 @@ void m68000_device::ori_w_imm16_das_ip() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4029,7 +4032,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4059,6 +4061,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4178,7 +4181,6 @@ void m68000_device::ori_w_imm16_adr16_ip() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4208,6 +4210,7 @@ void m68000_device::ori_w_imm16_adr16_ip() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4352,7 +4355,6 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4382,6 +4384,7 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -4500,12 +4503,12 @@ void m68000_device::ori_i16u_sr_ip() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4597,7 +4600,6 @@ void m68000_device::ori_l_imm32_ds_ip() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4633,6 +4635,7 @@ void m68000_device::ori_l_imm32_ds_ip() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4758,7 +4761,6 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4814,6 +4816,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -4961,7 +4964,6 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5017,6 +5019,7 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5165,7 +5168,6 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5221,6 +5223,7 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5389,7 +5392,6 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5445,6 +5447,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5656,7 +5659,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5712,6 +5714,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5883,7 +5886,6 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5939,6 +5941,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -6135,7 +6138,6 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6191,6 +6193,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -6231,7 +6234,6 @@ void m68000_device::btst_dd_ds_ip() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6272,6 +6274,7 @@ void m68000_device::btst_dd_ds_ip() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6286,6 +6289,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -6353,7 +6357,6 @@ void m68000_device::movep_w_das_dd_ip() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -6375,6 +6378,7 @@ void m68000_device::movep_w_das_dd_ip() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6442,7 +6446,6 @@ void m68000_device::btst_dd_ais_ip() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6450,6 +6453,7 @@ void m68000_device::btst_dd_ais_ip() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6519,7 +6523,6 @@ void m68000_device::btst_dd_aips_ip() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6527,6 +6530,7 @@ void m68000_device::btst_dd_aips_ip() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6598,7 +6602,6 @@ void m68000_device::btst_dd_pais_ip() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6606,6 +6609,7 @@ void m68000_device::btst_dd_pais_ip() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6696,7 +6700,6 @@ void m68000_device::btst_dd_das_ip() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6704,6 +6707,7 @@ void m68000_device::btst_dd_das_ip() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6837,7 +6841,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6845,6 +6848,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6934,7 +6938,6 @@ void m68000_device::btst_dd_adr16_ip() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6942,6 +6945,7 @@ void m68000_device::btst_dd_adr16_ip() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7056,7 +7060,6 @@ void m68000_device::btst_dd_adr32_ip() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7064,6 +7067,7 @@ void m68000_device::btst_dd_adr32_ip() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7153,7 +7157,6 @@ void m68000_device::btst_dd_dpc_ip() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7161,6 +7164,7 @@ void m68000_device::btst_dd_dpc_ip() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7293,7 +7297,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7301,6 +7304,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7368,7 +7372,6 @@ void m68000_device::btst_dd_imm_ip() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -7407,6 +7410,7 @@ void m68000_device::btst_dd_imm_ip() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -7421,6 +7425,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -7443,7 +7448,6 @@ void m68000_device::bchg_dd_ds_ip() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7484,6 +7488,7 @@ void m68000_device::bchg_dd_ds_ip() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7503,6 +7508,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7612,7 +7618,6 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -7634,6 +7639,7 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7701,7 +7707,6 @@ void m68000_device::bchg_dd_ais_ip() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7731,6 +7736,7 @@ void m68000_device::bchg_dd_ais_ip() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7795,7 +7801,6 @@ void m68000_device::bchg_dd_aips_ip() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7825,6 +7830,7 @@ void m68000_device::bchg_dd_aips_ip() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7891,7 +7897,6 @@ void m68000_device::bchg_dd_pais_ip() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7921,6 +7926,7 @@ void m68000_device::bchg_dd_pais_ip() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8006,7 +8012,6 @@ void m68000_device::bchg_dd_das_ip() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8036,6 +8041,7 @@ void m68000_device::bchg_dd_das_ip() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8164,7 +8170,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8194,6 +8199,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8278,7 +8284,6 @@ void m68000_device::bchg_dd_adr16_ip() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8308,6 +8313,7 @@ void m68000_device::bchg_dd_adr16_ip() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8417,7 +8423,6 @@ void m68000_device::bchg_dd_adr32_ip() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8447,6 +8452,7 @@ void m68000_device::bchg_dd_adr32_ip() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -8482,7 +8488,6 @@ void m68000_device::bclr_dd_ds_ip() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8527,6 +8532,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8550,6 +8556,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8598,7 +8605,6 @@ void m68000_device::movep_w_dd_das_ip() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -8636,12 +8642,12 @@ void m68000_device::movep_w_dd_das_ip() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8706,7 +8712,6 @@ void m68000_device::bclr_dd_ais_ip() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8740,6 +8745,7 @@ void m68000_device::bclr_dd_ais_ip() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8804,7 +8810,6 @@ void m68000_device::bclr_dd_aips_ip() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8838,6 +8843,7 @@ void m68000_device::bclr_dd_aips_ip() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8904,7 +8910,6 @@ void m68000_device::bclr_dd_pais_ip() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8938,6 +8943,7 @@ void m68000_device::bclr_dd_pais_ip() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9023,7 +9029,6 @@ void m68000_device::bclr_dd_das_ip() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9057,6 +9062,7 @@ void m68000_device::bclr_dd_das_ip() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9185,7 +9191,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9219,6 +9224,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9303,7 +9309,6 @@ void m68000_device::bclr_dd_adr16_ip() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9337,6 +9342,7 @@ void m68000_device::bclr_dd_adr16_ip() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9446,7 +9452,6 @@ void m68000_device::bclr_dd_adr32_ip() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9480,6 +9485,7 @@ void m68000_device::bclr_dd_adr32_ip() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -9515,7 +9521,6 @@ void m68000_device::bset_dd_ds_ip() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -9556,6 +9561,7 @@ void m68000_device::bset_dd_ds_ip() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9575,6 +9581,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9659,7 +9666,6 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9697,12 +9703,12 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9767,7 +9773,6 @@ void m68000_device::bset_dd_ais_ip() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9797,6 +9802,7 @@ void m68000_device::bset_dd_ais_ip() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9861,7 +9867,6 @@ void m68000_device::bset_dd_aips_ip() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9891,6 +9896,7 @@ void m68000_device::bset_dd_aips_ip() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9957,7 +9963,6 @@ void m68000_device::bset_dd_pais_ip() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9987,6 +9992,7 @@ void m68000_device::bset_dd_pais_ip() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -10072,7 +10078,6 @@ void m68000_device::bset_dd_das_ip() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10102,6 +10107,7 @@ void m68000_device::bset_dd_das_ip() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10230,7 +10236,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10260,6 +10265,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10344,7 +10350,6 @@ void m68000_device::bset_dd_adr16_ip() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10374,6 +10379,7 @@ void m68000_device::bset_dd_adr16_ip() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10483,7 +10489,6 @@ void m68000_device::bset_dd_adr32_ip() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10513,6 +10518,7 @@ void m68000_device::bset_dd_adr32_ip() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -10574,13 +10580,13 @@ void m68000_device::andi_b_imm8_ds_ip() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10673,7 +10679,6 @@ void m68000_device::andi_b_imm8_ais_ip() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10703,6 +10708,7 @@ void m68000_device::andi_b_imm8_ais_ip() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10792,7 +10798,6 @@ void m68000_device::andi_b_imm8_aips_ip() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10822,6 +10827,7 @@ void m68000_device::andi_b_imm8_aips_ip() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10913,7 +10919,6 @@ void m68000_device::andi_b_imm8_pais_ip() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10943,6 +10948,7 @@ void m68000_device::andi_b_imm8_pais_ip() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11053,7 +11059,6 @@ void m68000_device::andi_b_imm8_das_ip() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11083,6 +11088,7 @@ void m68000_device::andi_b_imm8_das_ip() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11236,7 +11242,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11266,6 +11271,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11375,7 +11381,6 @@ void m68000_device::andi_b_imm8_adr16_ip() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11405,6 +11410,7 @@ void m68000_device::andi_b_imm8_adr16_ip() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11539,7 +11545,6 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11569,6 +11574,7 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -11675,12 +11681,12 @@ void m68000_device::andi_imm8_ccr_ip() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11747,13 +11753,13 @@ void m68000_device::andi_w_imm16_ds_ip() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11850,7 +11856,6 @@ void m68000_device::andi_w_imm16_ais_ip() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11880,6 +11885,7 @@ void m68000_device::andi_w_imm16_ais_ip() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11979,7 +11985,6 @@ void m68000_device::andi_w_imm16_aips_ip() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12009,6 +12014,7 @@ void m68000_device::andi_w_imm16_aips_ip() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12110,7 +12116,6 @@ void m68000_device::andi_w_imm16_pais_ip() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12140,6 +12145,7 @@ void m68000_device::andi_w_imm16_pais_ip() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12260,7 +12266,6 @@ void m68000_device::andi_w_imm16_das_ip() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12290,6 +12295,7 @@ void m68000_device::andi_w_imm16_das_ip() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12453,7 +12459,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12483,6 +12488,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12602,7 +12608,6 @@ void m68000_device::andi_w_imm16_adr16_ip() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12632,6 +12637,7 @@ void m68000_device::andi_w_imm16_adr16_ip() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12776,7 +12782,6 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12806,6 +12811,7 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -12924,12 +12930,12 @@ void m68000_device::andi_i16u_sr_ip() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13021,7 +13027,6 @@ void m68000_device::andi_l_imm32_ds_ip() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -13057,6 +13062,7 @@ void m68000_device::andi_l_imm32_ds_ip() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -13182,7 +13188,6 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13238,6 +13243,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13385,7 +13391,6 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13441,6 +13446,7 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13589,7 +13595,6 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13645,6 +13650,7 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13813,7 +13819,6 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13869,6 +13874,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14080,7 +14086,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14136,6 +14141,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14307,7 +14313,6 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14363,6 +14368,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14559,7 +14565,6 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14615,6 +14620,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -14680,13 +14686,13 @@ void m68000_device::subi_b_imm8_ds_ip() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14776,7 +14782,6 @@ void m68000_device::subi_b_imm8_ais_ip() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14806,6 +14811,7 @@ void m68000_device::subi_b_imm8_ais_ip() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -14891,7 +14897,6 @@ void m68000_device::subi_b_imm8_aips_ip() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14921,6 +14926,7 @@ void m68000_device::subi_b_imm8_aips_ip() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15008,7 +15014,6 @@ void m68000_device::subi_b_imm8_pais_ip() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15038,6 +15043,7 @@ void m68000_device::subi_b_imm8_pais_ip() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15144,7 +15150,6 @@ void m68000_device::subi_b_imm8_das_ip() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15174,6 +15179,7 @@ void m68000_device::subi_b_imm8_das_ip() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15321,7 +15327,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15351,6 +15356,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15456,7 +15462,6 @@ void m68000_device::subi_b_imm8_adr16_ip() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15486,6 +15491,7 @@ void m68000_device::subi_b_imm8_adr16_ip() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15615,7 +15621,6 @@ void m68000_device::subi_b_imm8_adr32_ip() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15645,6 +15650,7 @@ void m68000_device::subi_b_imm8_adr32_ip() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -15703,13 +15709,13 @@ void m68000_device::subi_w_imm16_ds_ip() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15803,7 +15809,6 @@ void m68000_device::subi_w_imm16_ais_ip() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15833,6 +15838,7 @@ void m68000_device::subi_w_imm16_ais_ip() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15928,7 +15934,6 @@ void m68000_device::subi_w_imm16_aips_ip() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15958,6 +15963,7 @@ void m68000_device::subi_w_imm16_aips_ip() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16055,7 +16061,6 @@ void m68000_device::subi_w_imm16_pais_ip() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16085,6 +16090,7 @@ void m68000_device::subi_w_imm16_pais_ip() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16201,7 +16207,6 @@ void m68000_device::subi_w_imm16_das_ip() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16231,6 +16236,7 @@ void m68000_device::subi_w_imm16_das_ip() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16388,7 +16394,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16418,6 +16423,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16533,7 +16539,6 @@ void m68000_device::subi_w_imm16_adr16_ip() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16563,6 +16568,7 @@ void m68000_device::subi_w_imm16_adr16_ip() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16702,7 +16708,6 @@ void m68000_device::subi_w_imm16_adr32_ip() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16732,6 +16737,7 @@ void m68000_device::subi_w_imm16_adr32_ip() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -16820,7 +16826,6 @@ void m68000_device::subi_l_imm32_ds_ip() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -16855,6 +16860,7 @@ void m68000_device::subi_l_imm32_ds_ip() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -16976,7 +16982,6 @@ void m68000_device::subi_l_imm32_ais_ip() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17032,6 +17037,7 @@ void m68000_device::subi_l_imm32_ais_ip() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17174,7 +17180,6 @@ void m68000_device::subi_l_imm32_aips_ip() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17230,6 +17235,7 @@ void m68000_device::subi_l_imm32_aips_ip() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17373,7 +17379,6 @@ void m68000_device::subi_l_imm32_pais_ip() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17429,6 +17434,7 @@ void m68000_device::subi_l_imm32_pais_ip() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17592,7 +17598,6 @@ void m68000_device::subi_l_imm32_das_ip() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17648,6 +17653,7 @@ void m68000_device::subi_l_imm32_das_ip() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -17852,7 +17858,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17908,6 +17913,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18073,7 +18079,6 @@ void m68000_device::subi_l_imm32_adr16_ip() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18129,6 +18134,7 @@ void m68000_device::subi_l_imm32_adr16_ip() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18318,7 +18324,6 @@ void m68000_device::subi_l_imm32_adr32_ip() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18374,6 +18379,7 @@ void m68000_device::subi_l_imm32_adr32_ip() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -18438,13 +18444,13 @@ void m68000_device::addi_b_imm8_ds_ip() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18534,7 +18540,6 @@ void m68000_device::addi_b_imm8_ais_ip() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18564,6 +18569,7 @@ void m68000_device::addi_b_imm8_ais_ip() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18649,7 +18655,6 @@ void m68000_device::addi_b_imm8_aips_ip() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18679,6 +18684,7 @@ void m68000_device::addi_b_imm8_aips_ip() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18766,7 +18772,6 @@ void m68000_device::addi_b_imm8_pais_ip() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18796,6 +18801,7 @@ void m68000_device::addi_b_imm8_pais_ip() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18902,7 +18908,6 @@ void m68000_device::addi_b_imm8_das_ip() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18932,6 +18937,7 @@ void m68000_device::addi_b_imm8_das_ip() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19079,7 +19085,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19109,6 +19114,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19214,7 +19220,6 @@ void m68000_device::addi_b_imm8_adr16_ip() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19244,6 +19249,7 @@ void m68000_device::addi_b_imm8_adr16_ip() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19373,7 +19379,6 @@ void m68000_device::addi_b_imm8_adr32_ip() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19403,6 +19408,7 @@ void m68000_device::addi_b_imm8_adr32_ip() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -19461,13 +19467,13 @@ void m68000_device::addi_w_imm16_ds_ip() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19561,7 +19567,6 @@ void m68000_device::addi_w_imm16_ais_ip() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19591,6 +19596,7 @@ void m68000_device::addi_w_imm16_ais_ip() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19686,7 +19692,6 @@ void m68000_device::addi_w_imm16_aips_ip() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19716,6 +19721,7 @@ void m68000_device::addi_w_imm16_aips_ip() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19813,7 +19819,6 @@ void m68000_device::addi_w_imm16_pais_ip() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19843,6 +19848,7 @@ void m68000_device::addi_w_imm16_pais_ip() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19959,7 +19965,6 @@ void m68000_device::addi_w_imm16_das_ip() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19989,6 +19994,7 @@ void m68000_device::addi_w_imm16_das_ip() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20146,7 +20152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20176,6 +20181,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20291,7 +20297,6 @@ void m68000_device::addi_w_imm16_adr16_ip() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20321,6 +20326,7 @@ void m68000_device::addi_w_imm16_adr16_ip() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20460,7 +20466,6 @@ void m68000_device::addi_w_imm16_adr32_ip() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20490,6 +20495,7 @@ void m68000_device::addi_w_imm16_adr32_ip() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -20578,7 +20584,6 @@ void m68000_device::addi_l_imm32_ds_ip() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -20613,6 +20618,7 @@ void m68000_device::addi_l_imm32_ds_ip() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -20734,7 +20740,6 @@ void m68000_device::addi_l_imm32_ais_ip() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20790,6 +20795,7 @@ void m68000_device::addi_l_imm32_ais_ip() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -20932,7 +20938,6 @@ void m68000_device::addi_l_imm32_aips_ip() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20988,6 +20993,7 @@ void m68000_device::addi_l_imm32_aips_ip() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21131,7 +21137,6 @@ void m68000_device::addi_l_imm32_pais_ip() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21187,6 +21192,7 @@ void m68000_device::addi_l_imm32_pais_ip() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21350,7 +21356,6 @@ void m68000_device::addi_l_imm32_das_ip() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21406,6 +21411,7 @@ void m68000_device::addi_l_imm32_das_ip() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21610,7 +21616,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21666,6 +21671,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21831,7 +21837,6 @@ void m68000_device::addi_l_imm32_adr16_ip() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21887,6 +21892,7 @@ void m68000_device::addi_l_imm32_adr16_ip() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -22076,7 +22082,6 @@ void m68000_device::addi_l_imm32_adr32_ip() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22132,6 +22137,7 @@ void m68000_device::addi_l_imm32_adr32_ip() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -22197,7 +22203,6 @@ void m68000_device::btst_imm8_ds_ip() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22238,6 +22243,7 @@ void m68000_device::btst_imm8_ds_ip() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22252,6 +22258,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -22324,7 +22331,6 @@ void m68000_device::btst_imm8_ais_ip() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22332,6 +22338,7 @@ void m68000_device::btst_imm8_ais_ip() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22427,7 +22434,6 @@ void m68000_device::btst_imm8_aips_ip() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22435,6 +22441,7 @@ void m68000_device::btst_imm8_aips_ip() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22532,7 +22539,6 @@ void m68000_device::btst_imm8_pais_ip() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22540,6 +22546,7 @@ void m68000_device::btst_imm8_pais_ip() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22656,7 +22663,6 @@ void m68000_device::btst_imm8_das_ip() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22664,6 +22670,7 @@ void m68000_device::btst_imm8_das_ip() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22823,7 +22830,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22831,6 +22837,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22946,7 +22953,6 @@ void m68000_device::btst_imm8_adr16_ip() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22954,6 +22960,7 @@ void m68000_device::btst_imm8_adr16_ip() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23094,7 +23101,6 @@ void m68000_device::btst_imm8_adr32_ip() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23102,6 +23108,7 @@ void m68000_device::btst_imm8_adr32_ip() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23217,7 +23224,6 @@ void m68000_device::btst_imm8_dpc_ip() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23225,6 +23231,7 @@ void m68000_device::btst_imm8_dpc_ip() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23383,7 +23390,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23391,6 +23397,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23457,7 +23464,6 @@ void m68000_device::bchg_imm8_ds_ip() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -23498,6 +23504,7 @@ void m68000_device::bchg_imm8_ds_ip() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23517,6 +23524,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23590,7 +23598,6 @@ void m68000_device::bchg_imm8_ais_ip() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23620,6 +23627,7 @@ void m68000_device::bchg_imm8_ais_ip() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23710,7 +23718,6 @@ void m68000_device::bchg_imm8_aips_ip() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23740,6 +23747,7 @@ void m68000_device::bchg_imm8_aips_ip() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23832,7 +23840,6 @@ void m68000_device::bchg_imm8_pais_ip() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23862,6 +23869,7 @@ void m68000_device::bchg_imm8_pais_ip() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23973,7 +23981,6 @@ void m68000_device::bchg_imm8_das_ip() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24003,6 +24010,7 @@ void m68000_device::bchg_imm8_das_ip() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24157,7 +24165,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24187,6 +24194,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24297,7 +24305,6 @@ void m68000_device::bchg_imm8_adr16_ip() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24327,6 +24334,7 @@ void m68000_device::bchg_imm8_adr16_ip() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24462,7 +24470,6 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24492,6 +24499,7 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -24553,7 +24561,6 @@ void m68000_device::bclr_imm8_ds_ip() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -24598,6 +24605,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24621,6 +24629,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24694,7 +24703,6 @@ void m68000_device::bclr_imm8_ais_ip() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24728,6 +24736,7 @@ void m68000_device::bclr_imm8_ais_ip() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24818,7 +24827,6 @@ void m68000_device::bclr_imm8_aips_ip() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24852,6 +24860,7 @@ void m68000_device::bclr_imm8_aips_ip() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24944,7 +24953,6 @@ void m68000_device::bclr_imm8_pais_ip() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24978,6 +24986,7 @@ void m68000_device::bclr_imm8_pais_ip() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25089,7 +25098,6 @@ void m68000_device::bclr_imm8_das_ip() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25123,6 +25131,7 @@ void m68000_device::bclr_imm8_das_ip() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25277,7 +25286,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25311,6 +25319,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25421,7 +25430,6 @@ void m68000_device::bclr_imm8_adr16_ip() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25455,6 +25463,7 @@ void m68000_device::bclr_imm8_adr16_ip() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25590,7 +25599,6 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25624,6 +25632,7 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -25685,7 +25694,6 @@ void m68000_device::bset_imm8_ds_ip() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -25726,6 +25734,7 @@ void m68000_device::bset_imm8_ds_ip() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25745,6 +25754,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25818,7 +25828,6 @@ void m68000_device::bset_imm8_ais_ip() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -25848,6 +25857,7 @@ void m68000_device::bset_imm8_ais_ip() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25938,7 +25948,6 @@ void m68000_device::bset_imm8_aips_ip() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -25968,6 +25977,7 @@ void m68000_device::bset_imm8_aips_ip() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26060,7 +26070,6 @@ void m68000_device::bset_imm8_pais_ip() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26090,6 +26099,7 @@ void m68000_device::bset_imm8_pais_ip() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26201,7 +26211,6 @@ void m68000_device::bset_imm8_das_ip() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26231,6 +26240,7 @@ void m68000_device::bset_imm8_das_ip() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26385,7 +26395,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26415,146 +26424,147 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; - set_8xl(m_dbout, m_aluo); - m_base_ssw = SSW_DATA; - [[fallthrough]]; case 9: - m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 9; - } else - m_inst_substate = 10; - return; - } - [[fallthrough]]; case 10: - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 - alu_and8(m_alub, 1 << (m_dcr & 7)); - sr_z(); - set_ftu_const(); - m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; - m_inst_substate = 0; - if(m_sr & SR_T) - m_next_state = S_TRACE; - return; - } -} - -void m68000_device::bset_imm8_adr16_ip() // 08f8 ffff -{ - switch(m_inst_substate) { - case 0: - // 2b9 o#w1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 1: - m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 1; - } else - m_inst_substate = 2; - return; - } - [[fallthrough]]; case 2: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - set_16l(m_dt, m_dbin); - m_irc = m_edb; - m_au = m_au + 2; - m_dbin = m_edb; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none - // 00a abwl1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 3: - m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 3; - } else - m_inst_substate = 4; - return; - } - [[fallthrough]]; case 4: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - m_dcr = m_dt; - m_at = ext32(m_dbin); - m_irc = m_edb; - m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin - alu_or8(m_dt, m_dbin); - m_dbin = m_edb; - // 004 abll3 - m_aob = m_at; - m_base_ssw = SSW_DATA | SSW_R; - [[fallthrough]]; case 5: - m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); - if(!(m_aob & 1)) - m_edb >>= 8; - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 5; - } else - m_inst_substate = 6; - return; - } - [[fallthrough]]; case 6: - m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 - alu_and8(m_dbin, 0xffff); - m_dbin = m_edb; - // 081 bcsm1 - m_aob = m_au; - m_ir = m_irc; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 7: - m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); - m_icount -= 4; - if(m_icount <= 0) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 7; - } else - m_inst_substate = 8; - return; - } - [[fallthrough]]; case 8: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_alub = m_dbin; - m_pc = m_au; - m_irc = m_edb; - m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 - alu_or8(m_dbin, 1 << (m_dcr & 7)); - m_dbin = m_edb; - // 082 bcsm2 - m_aob = m_at; - m_ird = m_ir; + set_8xl(m_dbout, m_aluo); + m_base_ssw = SSW_DATA; + [[fallthrough]]; case 9: + m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 9; + } else + m_inst_substate = 10; + return; + } + [[fallthrough]]; case 10: + // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + alu_and8(m_alub, 1 << (m_dcr & 7)); + sr_z(); + set_ftu_const(); + m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; + m_inst_substate = 0; + if(m_sr & SR_T) + m_next_state = S_TRACE; + return; + } +} + +void m68000_device::bset_imm8_adr16_ip() // 08f8 ffff +{ + switch(m_inst_substate) { + case 0: + // 2b9 o#w1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 1: + m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 1; + } else + m_inst_substate = 2; + return; + } + [[fallthrough]]; case 2: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + set_16l(m_dt, m_dbin); + m_irc = m_edb; + m_au = m_au + 2; + m_dbin = m_edb; + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // 00a abwl1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 3: + m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 3; + } else + m_inst_substate = 4; + return; + } + [[fallthrough]]; case 4: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + m_dcr = m_dt; + m_at = ext32(m_dbin); + m_irc = m_edb; + m_au = ext32(m_dbin); + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + alu_or8(m_dt, m_dbin); + m_dbin = m_edb; + // 004 abll3 + m_aob = m_at; + m_base_ssw = SSW_DATA | SSW_R; + [[fallthrough]]; case 5: + m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); + if(!(m_aob & 1)) + m_edb >>= 8; + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 5; + } else + m_inst_substate = 6; + return; + } + [[fallthrough]]; case 6: + m_au = m_pc + 2; + // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + alu_and8(m_dbin, 0xffff); + m_dbin = m_edb; + // 081 bcsm1 + m_aob = m_au; + m_ir = m_irc; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 7: + m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); + m_icount -= 4; + if(m_icount <= 0) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 7; + } else + m_inst_substate = 8; + return; + } + [[fallthrough]]; case 8: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_alub = m_dbin; + m_pc = m_au; + m_irc = m_edb; + m_au = m_au + 2; + // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + alu_or8(m_dbin, 1 << (m_dcr & 7)); + m_dbin = m_edb; + // 082 bcsm2 + m_aob = m_at; + m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26690,7 +26700,6 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26720,6 +26729,7 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -26781,13 +26791,13 @@ void m68000_device::eori_b_imm8_ds_ip() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26880,7 +26890,6 @@ void m68000_device::eori_b_imm8_ais_ip() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26910,6 +26919,7 @@ void m68000_device::eori_b_imm8_ais_ip() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26999,7 +27009,6 @@ void m68000_device::eori_b_imm8_aips_ip() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27029,6 +27038,7 @@ void m68000_device::eori_b_imm8_aips_ip() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27120,7 +27130,6 @@ void m68000_device::eori_b_imm8_pais_ip() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27150,6 +27159,7 @@ void m68000_device::eori_b_imm8_pais_ip() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27260,7 +27270,6 @@ void m68000_device::eori_b_imm8_das_ip() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27290,6 +27299,7 @@ void m68000_device::eori_b_imm8_das_ip() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27443,7 +27453,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27473,6 +27482,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27582,7 +27592,6 @@ void m68000_device::eori_b_imm8_adr16_ip() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27612,6 +27621,7 @@ void m68000_device::eori_b_imm8_adr16_ip() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27746,7 +27756,6 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27776,6 +27785,7 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -27882,12 +27892,12 @@ void m68000_device::eori_imm8_ccr_ip() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27954,13 +27964,13 @@ void m68000_device::eori_w_imm16_ds_ip() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28057,7 +28067,6 @@ void m68000_device::eori_w_imm16_ais_ip() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28087,6 +28096,7 @@ void m68000_device::eori_w_imm16_ais_ip() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28186,7 +28196,6 @@ void m68000_device::eori_w_imm16_aips_ip() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28216,6 +28225,7 @@ void m68000_device::eori_w_imm16_aips_ip() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28317,7 +28327,6 @@ void m68000_device::eori_w_imm16_pais_ip() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28347,6 +28356,7 @@ void m68000_device::eori_w_imm16_pais_ip() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28467,7 +28477,6 @@ void m68000_device::eori_w_imm16_das_ip() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28497,6 +28506,7 @@ void m68000_device::eori_w_imm16_das_ip() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28660,7 +28670,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28690,6 +28699,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28809,7 +28819,6 @@ void m68000_device::eori_w_imm16_adr16_ip() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28839,6 +28848,7 @@ void m68000_device::eori_w_imm16_adr16_ip() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28983,7 +28993,6 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29013,6 +29022,7 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -29131,12 +29141,12 @@ void m68000_device::eori_i16u_sr_ip() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29228,7 +29238,6 @@ void m68000_device::eori_l_imm32_ds_ip() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -29264,6 +29273,7 @@ void m68000_device::eori_l_imm32_ds_ip() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -29389,7 +29399,6 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29445,6 +29454,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29592,7 +29602,6 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29648,6 +29657,7 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29796,7 +29806,6 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29852,6 +29861,7 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -30020,7 +30030,6 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30076,6 +30085,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30287,7 +30297,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30343,6 +30352,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30514,7 +30524,6 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30570,6 +30579,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30766,7 +30776,6 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30822,6 +30831,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -30887,13 +30897,13 @@ void m68000_device::cmpi_b_imm8_ds_ip() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30982,7 +30992,6 @@ void m68000_device::cmpi_b_imm8_ais_ip() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -30990,6 +30999,7 @@ void m68000_device::cmpi_b_imm8_ais_ip() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31081,7 +31091,6 @@ void m68000_device::cmpi_b_imm8_aips_ip() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31089,6 +31098,7 @@ void m68000_device::cmpi_b_imm8_aips_ip() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31182,7 +31192,6 @@ void m68000_device::cmpi_b_imm8_pais_ip() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31190,6 +31199,7 @@ void m68000_device::cmpi_b_imm8_pais_ip() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31302,7 +31312,6 @@ void m68000_device::cmpi_b_imm8_das_ip() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31310,6 +31319,7 @@ void m68000_device::cmpi_b_imm8_das_ip() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31463,7 +31473,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31471,6 +31480,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31582,7 +31592,6 @@ void m68000_device::cmpi_b_imm8_adr16_ip() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31590,6 +31599,7 @@ void m68000_device::cmpi_b_imm8_adr16_ip() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31725,7 +31735,6 @@ void m68000_device::cmpi_b_imm8_adr32_ip() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31733,6 +31742,7 @@ void m68000_device::cmpi_b_imm8_adr32_ip() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31797,13 +31807,13 @@ void m68000_device::cmpi_w_imm16_ds_ip() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31896,7 +31906,6 @@ void m68000_device::cmpi_w_imm16_ais_ip() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31904,6 +31913,7 @@ void m68000_device::cmpi_w_imm16_ais_ip() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31999,7 +32009,6 @@ void m68000_device::cmpi_w_imm16_aips_ip() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32007,6 +32016,7 @@ void m68000_device::cmpi_w_imm16_aips_ip() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32104,7 +32114,6 @@ void m68000_device::cmpi_w_imm16_pais_ip() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32112,6 +32121,7 @@ void m68000_device::cmpi_w_imm16_pais_ip() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32228,7 +32238,6 @@ void m68000_device::cmpi_w_imm16_das_ip() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32236,6 +32245,7 @@ void m68000_device::cmpi_w_imm16_das_ip() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32393,7 +32403,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32401,6 +32410,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32516,7 +32526,6 @@ void m68000_device::cmpi_w_imm16_adr16_ip() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32524,6 +32533,7 @@ void m68000_device::cmpi_w_imm16_adr16_ip() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32663,7 +32673,6 @@ void m68000_device::cmpi_w_imm16_adr32_ip() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32671,6 +32680,7 @@ void m68000_device::cmpi_w_imm16_adr32_ip() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32760,7 +32770,6 @@ void m68000_device::cmpi_l_imm32_ds_ip() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -32792,6 +32801,7 @@ void m68000_device::cmpi_l_imm32_ds_ip() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -32912,7 +32922,6 @@ void m68000_device::cmpi_l_imm32_ais_ip() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32920,6 +32929,7 @@ void m68000_device::cmpi_l_imm32_ais_ip() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33065,7 +33075,6 @@ void m68000_device::cmpi_l_imm32_aips_ip() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33073,6 +33082,7 @@ void m68000_device::cmpi_l_imm32_aips_ip() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33219,7 +33229,6 @@ void m68000_device::cmpi_l_imm32_pais_ip() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33227,6 +33236,7 @@ void m68000_device::cmpi_l_imm32_pais_ip() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33393,7 +33403,6 @@ void m68000_device::cmpi_l_imm32_das_ip() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33401,6 +33410,7 @@ void m68000_device::cmpi_l_imm32_das_ip() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33608,7 +33618,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33616,6 +33625,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33784,7 +33794,6 @@ void m68000_device::cmpi_l_imm32_adr16_ip() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33792,6 +33801,7 @@ void m68000_device::cmpi_l_imm32_adr16_ip() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33984,7 +33994,6 @@ void m68000_device::cmpi_l_imm32_adr32_ip() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33992,6 +34001,7 @@ void m68000_device::cmpi_l_imm32_adr32_ip() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34034,7 +34044,6 @@ void m68000_device::move_b_ds_dd_ip() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -34043,6 +34052,7 @@ void m68000_device::move_b_ds_dd_ip() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34107,7 +34117,6 @@ void m68000_device::move_b_ais_dd_ip() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34116,6 +34125,7 @@ void m68000_device::move_b_ais_dd_ip() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34182,7 +34192,6 @@ void m68000_device::move_b_aips_dd_ip() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34191,6 +34200,7 @@ void m68000_device::move_b_aips_dd_ip() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34259,7 +34269,6 @@ void m68000_device::move_b_pais_dd_ip() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34268,6 +34277,7 @@ void m68000_device::move_b_pais_dd_ip() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34355,7 +34365,6 @@ void m68000_device::move_b_das_dd_ip() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34364,6 +34373,7 @@ void m68000_device::move_b_das_dd_ip() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34492,7 +34502,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34501,6 +34510,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34587,7 +34597,6 @@ void m68000_device::move_b_adr16_dd_ip() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34596,6 +34605,7 @@ void m68000_device::move_b_adr16_dd_ip() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34706,7 +34716,6 @@ void m68000_device::move_b_adr32_dd_ip() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34715,6 +34724,7 @@ void m68000_device::move_b_adr32_dd_ip() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34801,7 +34811,6 @@ void m68000_device::move_b_dpc_dd_ip() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34810,6 +34819,7 @@ void m68000_device::move_b_dpc_dd_ip() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34937,7 +34947,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34946,6 +34955,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35011,7 +35021,6 @@ void m68000_device::move_b_imm8_dd_ip() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -35020,6 +35029,7 @@ void m68000_device::move_b_imm8_dd_ip() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35061,7 +35071,6 @@ void m68000_device::move_b_ds_aid_ip() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -35084,10 +35093,10 @@ void m68000_device::move_b_ds_aid_ip() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35171,10 +35180,10 @@ void m68000_device::move_b_ais_aid_ip() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35262,10 +35271,10 @@ void m68000_device::move_b_aips_aid_ip() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35355,10 +35364,10 @@ void m68000_device::move_b_pais_aid_ip() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35467,10 +35476,10 @@ void m68000_device::move_b_das_aid_ip() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35620,10 +35629,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35731,10 +35740,10 @@ void m68000_device::move_b_adr16_aid_ip() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35866,10 +35875,10 @@ void m68000_device::move_b_adr32_aid_ip() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35977,10 +35986,10 @@ void m68000_device::move_b_dpc_aid_ip() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36129,10 +36138,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36198,7 +36207,6 @@ void m68000_device::move_b_imm8_aid_ip() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36221,10 +36229,10 @@ void m68000_device::move_b_imm8_aid_ip() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36264,7 +36272,6 @@ void m68000_device::move_b_ds_aipd_ip() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -36287,6 +36294,7 @@ void m68000_device::move_b_ds_aipd_ip() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36351,7 +36359,6 @@ void m68000_device::move_b_ais_aipd_ip() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36374,6 +36381,7 @@ void m68000_device::move_b_ais_aipd_ip() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36442,7 +36450,6 @@ void m68000_device::move_b_aips_aipd_ip() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36465,6 +36472,7 @@ void m68000_device::move_b_aips_aipd_ip() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36535,7 +36543,6 @@ void m68000_device::move_b_pais_aipd_ip() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36558,6 +36565,7 @@ void m68000_device::move_b_pais_aipd_ip() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36647,7 +36655,6 @@ void m68000_device::move_b_das_aipd_ip() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36670,6 +36677,7 @@ void m68000_device::move_b_das_aipd_ip() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36800,7 +36808,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36823,6 +36830,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36911,7 +36919,6 @@ void m68000_device::move_b_adr16_aipd_ip() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36934,6 +36941,7 @@ void m68000_device::move_b_adr16_aipd_ip() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37046,7 +37054,6 @@ void m68000_device::move_b_adr32_aipd_ip() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37069,6 +37076,7 @@ void m68000_device::move_b_adr32_aipd_ip() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37157,7 +37165,6 @@ void m68000_device::move_b_dpc_aipd_ip() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37180,6 +37187,7 @@ void m68000_device::move_b_dpc_aipd_ip() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37309,7 +37317,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37332,6 +37339,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37399,7 +37407,6 @@ void m68000_device::move_b_imm8_aipd_ip() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37422,6 +37429,7 @@ void m68000_device::move_b_imm8_aipd_ip() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37463,7 +37471,6 @@ void m68000_device::move_b_ds_paid_ip() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37493,6 +37500,7 @@ void m68000_device::move_b_ds_paid_ip() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37550,7 +37558,6 @@ void m68000_device::move_b_ais_paid_ip() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37580,6 +37587,7 @@ void m68000_device::move_b_ais_paid_ip() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37641,7 +37649,6 @@ void m68000_device::move_b_aips_paid_ip() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37671,6 +37678,7 @@ void m68000_device::move_b_aips_paid_ip() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37734,7 +37742,6 @@ void m68000_device::move_b_pais_paid_ip() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37764,6 +37771,7 @@ void m68000_device::move_b_pais_paid_ip() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37846,7 +37854,6 @@ void m68000_device::move_b_das_paid_ip() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37876,6 +37883,7 @@ void m68000_device::move_b_das_paid_ip() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37999,7 +38007,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38029,6 +38036,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38110,7 +38118,6 @@ void m68000_device::move_b_adr16_paid_ip() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38140,6 +38147,7 @@ void m68000_device::move_b_adr16_paid_ip() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38245,7 +38253,6 @@ void m68000_device::move_b_adr32_paid_ip() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38275,6 +38282,7 @@ void m68000_device::move_b_adr32_paid_ip() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -38356,7 +38364,6 @@ void m68000_device::move_b_dpc_paid_ip() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38386,6 +38393,7 @@ void m68000_device::move_b_dpc_paid_ip() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38508,7 +38516,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38538,6 +38545,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38598,7 +38606,6 @@ void m68000_device::move_b_imm8_paid_ip() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38628,6 +38635,7 @@ void m68000_device::move_b_imm8_paid_ip() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38686,7 +38694,6 @@ void m68000_device::move_b_ds_dad_ip() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -38708,11 +38715,11 @@ void m68000_device::move_b_ds_dad_ip() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38802,6 +38809,7 @@ void m68000_device::move_b_ais_dad_ip() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38823,11 +38831,11 @@ void m68000_device::move_b_ais_dad_ip() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38921,6 +38929,7 @@ void m68000_device::move_b_aips_dad_ip() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38942,11 +38951,11 @@ void m68000_device::move_b_aips_dad_ip() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39042,6 +39051,7 @@ void m68000_device::move_b_pais_dad_ip() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -39063,11 +39073,11 @@ void m68000_device::move_b_pais_dad_ip() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39182,6 +39192,7 @@ void m68000_device::move_b_das_dad_ip() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39203,11 +39214,11 @@ void m68000_device::move_b_das_dad_ip() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39363,6 +39374,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39384,11 +39396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39502,6 +39514,7 @@ void m68000_device::move_b_adr16_dad_ip() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39523,11 +39536,11 @@ void m68000_device::move_b_adr16_dad_ip() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39665,6 +39678,7 @@ void m68000_device::move_b_adr32_dad_ip() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -39686,11 +39700,11 @@ void m68000_device::move_b_adr32_dad_ip() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39804,6 +39818,7 @@ void m68000_device::move_b_dpc_dad_ip() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39825,11 +39840,11 @@ void m68000_device::move_b_dpc_dad_ip() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39984,6 +39999,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40005,11 +40021,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40099,7 +40115,6 @@ void m68000_device::move_b_imm8_dad_ip() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40121,11 +40136,11 @@ void m68000_device::move_b_imm8_dad_ip() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40231,7 +40246,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -40253,11 +40267,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40388,6 +40402,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40409,11 +40424,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40548,6 +40563,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40569,11 +40585,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40710,6 +40726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40731,11 +40748,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40891,6 +40908,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40912,11 +40930,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41113,6 +41131,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41134,11 +41153,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41293,6 +41312,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41314,11 +41334,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41497,6 +41517,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -41518,11 +41539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41677,6 +41698,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41698,11 +41720,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41898,6 +41920,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41919,11 +41942,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42055,7 +42078,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42077,11 +42099,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42148,6 +42170,7 @@ void m68000_device::move_b_ds_adr16_ip() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -42169,11 +42192,11 @@ void m68000_device::move_b_ds_adr16_ip() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42262,6 +42285,7 @@ void m68000_device::move_b_ais_adr16_ip() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42283,11 +42307,11 @@ void m68000_device::move_b_ais_adr16_ip() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42380,6 +42404,7 @@ void m68000_device::move_b_aips_adr16_ip() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42401,11 +42426,11 @@ void m68000_device::move_b_aips_adr16_ip() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42500,6 +42525,7 @@ void m68000_device::move_b_pais_adr16_ip() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42521,11 +42547,11 @@ void m68000_device::move_b_pais_adr16_ip() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42639,6 +42665,7 @@ void m68000_device::move_b_das_adr16_ip() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42660,11 +42687,11 @@ void m68000_device::move_b_das_adr16_ip() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42819,6 +42846,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42840,11 +42868,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42957,6 +42985,7 @@ void m68000_device::move_b_adr16_adr16_ip() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42978,11 +43007,11 @@ void m68000_device::move_b_adr16_adr16_ip() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43119,6 +43148,7 @@ void m68000_device::move_b_adr32_adr16_ip() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -43140,11 +43170,11 @@ void m68000_device::move_b_adr32_adr16_ip() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43257,6 +43287,7 @@ void m68000_device::move_b_dpc_adr16_ip() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43278,11 +43309,11 @@ void m68000_device::move_b_dpc_adr16_ip() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43436,6 +43467,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43457,11 +43489,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43554,6 +43586,7 @@ void m68000_device::move_b_imm8_adr16_ip() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43575,11 +43608,11 @@ void m68000_device::move_b_imm8_adr16_ip() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43670,6 +43703,7 @@ void m68000_device::move_b_ds_adr32_ip() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43691,11 +43725,11 @@ void m68000_device::move_b_ds_adr32_ip() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43784,7 +43818,6 @@ void m68000_device::move_b_ais_adr32_ip() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43830,11 +43863,11 @@ void m68000_device::move_b_ais_adr32_ip() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43927,7 +43960,6 @@ void m68000_device::move_b_aips_adr32_ip() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43973,11 +44005,11 @@ void m68000_device::move_b_aips_adr32_ip() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44072,7 +44104,6 @@ void m68000_device::move_b_pais_adr32_ip() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -44118,11 +44149,11 @@ void m68000_device::move_b_pais_adr32_ip() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44236,7 +44267,6 @@ void m68000_device::move_b_das_adr32_ip() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44282,11 +44312,11 @@ void m68000_device::move_b_das_adr32_ip() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44441,7 +44471,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44487,11 +44516,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44604,7 +44633,6 @@ void m68000_device::move_b_adr16_adr32_ip() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44650,11 +44678,11 @@ void m68000_device::move_b_adr16_adr32_ip() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44791,7 +44819,6 @@ void m68000_device::move_b_adr32_adr32_ip() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -44837,11 +44864,11 @@ void m68000_device::move_b_adr32_adr32_ip() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44954,7 +44981,6 @@ void m68000_device::move_b_dpc_adr32_ip() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45000,11 +45026,11 @@ void m68000_device::move_b_dpc_adr32_ip() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45158,7 +45184,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45204,11 +45229,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45325,6 +45350,7 @@ void m68000_device::move_b_imm8_adr32_ip() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45346,11 +45372,11 @@ void m68000_device::move_b_imm8_adr32_ip() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45390,7 +45416,6 @@ void m68000_device::move_l_ds_dd_ip() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45399,6 +45424,7 @@ void m68000_device::move_l_ds_dd_ip() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45442,7 +45468,6 @@ void m68000_device::move_l_as_dd_ip() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45451,6 +45476,7 @@ void m68000_device::move_l_as_dd_ip() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45545,7 +45571,6 @@ void m68000_device::move_l_ais_dd_ip() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45554,6 +45579,7 @@ void m68000_device::move_l_ais_dd_ip() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45651,7 +45677,6 @@ void m68000_device::move_l_aips_dd_ip() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45660,6 +45685,7 @@ void m68000_device::move_l_aips_dd_ip() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45758,7 +45784,6 @@ void m68000_device::move_l_pais_dd_ip() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45767,6 +45792,7 @@ void m68000_device::move_l_pais_dd_ip() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45885,7 +45911,6 @@ void m68000_device::move_l_das_dd_ip() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45894,6 +45919,7 @@ void m68000_device::move_l_das_dd_ip() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46053,7 +46079,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46062,6 +46087,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46182,7 +46208,6 @@ void m68000_device::move_l_adr16_dd_ip() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46191,6 +46216,7 @@ void m68000_device::move_l_adr16_dd_ip() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46335,7 +46361,6 @@ void m68000_device::move_l_adr32_dd_ip() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46344,6 +46369,7 @@ void m68000_device::move_l_adr32_dd_ip() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46461,7 +46487,6 @@ void m68000_device::move_l_dpc_dd_ip() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46470,6 +46495,7 @@ void m68000_device::move_l_dpc_dd_ip() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46628,7 +46654,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46637,6 +46662,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46730,7 +46756,6 @@ void m68000_device::move_l_imm32_dd_ip() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -46739,6 +46764,7 @@ void m68000_device::move_l_imm32_dd_ip() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46782,7 +46808,6 @@ void m68000_device::movea_l_ds_ad_ip() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46790,6 +46815,7 @@ void m68000_device::movea_l_ds_ad_ip() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46832,7 +46858,6 @@ void m68000_device::movea_l_as_ad_ip() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46840,6 +46865,7 @@ void m68000_device::movea_l_as_ad_ip() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46933,7 +46959,6 @@ void m68000_device::movea_l_ais_ad_ip() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46941,6 +46966,7 @@ void m68000_device::movea_l_ais_ad_ip() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47037,7 +47063,6 @@ void m68000_device::movea_l_aips_ad_ip() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47045,6 +47070,7 @@ void m68000_device::movea_l_aips_ad_ip() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47142,7 +47168,6 @@ void m68000_device::movea_l_pais_ad_ip() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47150,6 +47175,7 @@ void m68000_device::movea_l_pais_ad_ip() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47267,7 +47293,6 @@ void m68000_device::movea_l_das_ad_ip() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47275,6 +47300,7 @@ void m68000_device::movea_l_das_ad_ip() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47433,7 +47459,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47441,6 +47466,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47560,7 +47586,6 @@ void m68000_device::movea_l_adr16_ad_ip() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47568,6 +47593,7 @@ void m68000_device::movea_l_adr16_ad_ip() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47711,7 +47737,6 @@ void m68000_device::movea_l_adr32_ad_ip() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47719,6 +47744,7 @@ void m68000_device::movea_l_adr32_ad_ip() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47835,7 +47861,6 @@ void m68000_device::movea_l_dpc_ad_ip() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47843,6 +47868,7 @@ void m68000_device::movea_l_dpc_ad_ip() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48000,7 +48026,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -48008,6 +48033,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48100,7 +48126,6 @@ void m68000_device::movea_l_imm32_ad_ip() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -48108,6 +48133,7 @@ void m68000_device::movea_l_imm32_ad_ip() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48175,7 +48201,6 @@ void m68000_device::move_l_ds_aid_ip() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48203,6 +48228,7 @@ void m68000_device::move_l_ds_aid_ip() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48272,7 +48298,6 @@ void m68000_device::move_l_as_aid_ip() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48300,6 +48325,7 @@ void m68000_device::move_l_as_aid_ip() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48422,7 +48448,6 @@ void m68000_device::move_l_ais_aid_ip() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48450,10 +48475,10 @@ void m68000_device::move_l_ais_aid_ip() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48574,7 +48599,6 @@ void m68000_device::move_l_aips_aid_ip() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48602,10 +48626,10 @@ void m68000_device::move_l_aips_aid_ip() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48727,7 +48751,6 @@ void m68000_device::move_l_pais_aid_ip() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48755,10 +48778,10 @@ void m68000_device::move_l_pais_aid_ip() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48900,7 +48923,6 @@ void m68000_device::move_l_das_aid_ip() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -48928,10 +48950,10 @@ void m68000_device::move_l_das_aid_ip() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49114,7 +49136,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49142,10 +49163,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49289,7 +49310,6 @@ void m68000_device::move_l_adr16_aid_ip() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49317,10 +49337,10 @@ void m68000_device::move_l_adr16_aid_ip() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49488,7 +49508,6 @@ void m68000_device::move_l_adr32_aid_ip() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -49516,10 +49535,10 @@ void m68000_device::move_l_adr32_aid_ip() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49660,7 +49679,6 @@ void m68000_device::move_l_dpc_aid_ip() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49688,10 +49706,10 @@ void m68000_device::move_l_dpc_aid_ip() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49873,7 +49891,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49901,10 +49918,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50019,7 +50036,6 @@ void m68000_device::move_l_imm32_aid_ip() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50047,6 +50063,7 @@ void m68000_device::move_l_imm32_aid_ip() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50116,7 +50133,6 @@ void m68000_device::move_l_ds_aipd_ip() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50144,6 +50160,7 @@ void m68000_device::move_l_ds_aipd_ip() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50213,7 +50230,6 @@ void m68000_device::move_l_as_aipd_ip() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50241,6 +50257,7 @@ void m68000_device::move_l_as_aipd_ip() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50363,7 +50380,6 @@ void m68000_device::move_l_ais_aipd_ip() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50391,6 +50407,7 @@ void m68000_device::move_l_ais_aipd_ip() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50513,7 +50530,6 @@ void m68000_device::move_l_aips_aipd_ip() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50541,6 +50557,7 @@ void m68000_device::move_l_aips_aipd_ip() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50664,7 +50681,6 @@ void m68000_device::move_l_pais_aipd_ip() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50692,6 +50708,7 @@ void m68000_device::move_l_pais_aipd_ip() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50835,7 +50852,6 @@ void m68000_device::move_l_das_aipd_ip() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -50863,6 +50879,7 @@ void m68000_device::move_l_das_aipd_ip() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51047,7 +51064,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51075,6 +51091,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51220,7 +51237,6 @@ void m68000_device::move_l_adr16_aipd_ip() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51248,6 +51264,7 @@ void m68000_device::move_l_adr16_aipd_ip() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51417,7 +51434,6 @@ void m68000_device::move_l_adr32_aipd_ip() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -51445,6 +51461,7 @@ void m68000_device::move_l_adr32_aipd_ip() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51587,7 +51604,6 @@ void m68000_device::move_l_dpc_aipd_ip() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51615,6 +51631,7 @@ void m68000_device::move_l_dpc_aipd_ip() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51798,7 +51815,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51826,6 +51842,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51942,7 +51959,6 @@ void m68000_device::move_l_imm32_aipd_ip() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -51970,6 +51986,7 @@ void m68000_device::move_l_imm32_aipd_ip() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52014,7 +52031,6 @@ void m68000_device::move_l_ds_paid_ip() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52070,6 +52086,7 @@ void m68000_device::move_l_ds_paid_ip() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52110,7 +52127,6 @@ void m68000_device::move_l_as_paid_ip() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52166,6 +52182,7 @@ void m68000_device::move_l_as_paid_ip() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52257,7 +52274,6 @@ void m68000_device::move_l_ais_paid_ip() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52313,6 +52329,7 @@ void m68000_device::move_l_ais_paid_ip() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52407,7 +52424,6 @@ void m68000_device::move_l_aips_paid_ip() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52463,6 +52479,7 @@ void m68000_device::move_l_aips_paid_ip() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52558,7 +52575,6 @@ void m68000_device::move_l_pais_paid_ip() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52614,6 +52630,7 @@ void m68000_device::move_l_pais_paid_ip() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52729,7 +52746,6 @@ void m68000_device::move_l_das_paid_ip() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52785,6 +52801,7 @@ void m68000_device::move_l_das_paid_ip() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -52941,7 +52958,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52997,6 +53013,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53114,7 +53131,6 @@ void m68000_device::move_l_adr16_paid_ip() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53170,6 +53186,7 @@ void m68000_device::move_l_adr16_paid_ip() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53311,7 +53328,6 @@ void m68000_device::move_l_adr32_paid_ip() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53367,6 +53383,7 @@ void m68000_device::move_l_adr32_paid_ip() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -53481,7 +53498,6 @@ void m68000_device::move_l_dpc_paid_ip() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53537,6 +53553,7 @@ void m68000_device::move_l_dpc_paid_ip() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53692,7 +53709,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53748,6 +53764,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53838,7 +53855,6 @@ void m68000_device::move_l_imm32_paid_ip() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53894,6 +53910,7 @@ void m68000_device::move_l_imm32_paid_ip() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -53985,7 +54002,6 @@ void m68000_device::move_l_ds_dad_ip() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54013,6 +54029,7 @@ void m68000_device::move_l_ds_dad_ip() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54108,7 +54125,6 @@ void m68000_device::move_l_as_dad_ip() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54136,6 +54152,7 @@ void m68000_device::move_l_as_dad_ip() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54285,6 +54302,7 @@ void m68000_device::move_l_ais_dad_ip() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54312,11 +54330,11 @@ void m68000_device::move_l_ais_dad_ip() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54464,6 +54482,7 @@ void m68000_device::move_l_aips_dad_ip() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54491,11 +54510,11 @@ void m68000_device::move_l_aips_dad_ip() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54644,6 +54663,7 @@ void m68000_device::move_l_pais_dad_ip() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54671,11 +54691,11 @@ void m68000_device::move_l_pais_dad_ip() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54844,6 +54864,7 @@ void m68000_device::move_l_das_dad_ip() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -54871,11 +54892,11 @@ void m68000_device::move_l_das_dad_ip() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55085,6 +55106,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55112,11 +55134,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55287,6 +55309,7 @@ void m68000_device::move_l_adr16_dad_ip() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55314,11 +55337,11 @@ void m68000_device::move_l_adr16_dad_ip() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55513,6 +55536,7 @@ void m68000_device::move_l_adr32_dad_ip() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -55540,11 +55564,11 @@ void m68000_device::move_l_adr32_dad_ip() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55712,6 +55736,7 @@ void m68000_device::move_l_dpc_dad_ip() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55739,11 +55764,11 @@ void m68000_device::move_l_dpc_dad_ip() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55952,6 +55977,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55979,11 +56005,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56124,7 +56150,6 @@ void m68000_device::move_l_imm32_dad_ip() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56152,6 +56177,7 @@ void m68000_device::move_l_imm32_dad_ip() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56289,7 +56315,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56317,6 +56342,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56454,7 +56480,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56482,6 +56507,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56672,6 +56698,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56699,11 +56726,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56892,6 +56919,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56919,11 +56947,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57113,6 +57141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -57140,11 +57169,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57354,6 +57383,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57381,11 +57411,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57636,6 +57666,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57663,11 +57694,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57879,6 +57910,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57906,11 +57938,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58146,6 +58178,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -58173,11 +58206,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58386,6 +58419,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58413,11 +58447,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58667,6 +58701,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58694,11 +58729,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58881,7 +58916,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -58909,6 +58943,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59007,6 +59042,7 @@ void m68000_device::move_l_ds_adr16_ip() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59034,11 +59070,11 @@ void m68000_device::move_l_ds_adr16_ip() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59132,6 +59168,7 @@ void m68000_device::move_l_as_adr16_ip() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59159,11 +59196,11 @@ void m68000_device::move_l_as_adr16_ip() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59307,6 +59344,7 @@ void m68000_device::move_l_ais_adr16_ip() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59334,11 +59372,11 @@ void m68000_device::move_l_ais_adr16_ip() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59485,6 +59523,7 @@ void m68000_device::move_l_aips_adr16_ip() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59512,11 +59551,11 @@ void m68000_device::move_l_aips_adr16_ip() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59664,6 +59703,7 @@ void m68000_device::move_l_pais_adr16_ip() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59691,11 +59731,11 @@ void m68000_device::move_l_pais_adr16_ip() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59863,6 +59903,7 @@ void m68000_device::move_l_das_adr16_ip() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -59890,11 +59931,11 @@ void m68000_device::move_l_das_adr16_ip() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60103,6 +60144,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60130,11 +60172,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60304,6 +60346,7 @@ void m68000_device::move_l_adr16_adr16_ip() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60331,11 +60374,11 @@ void m68000_device::move_l_adr16_adr16_ip() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60529,6 +60572,7 @@ void m68000_device::move_l_adr32_adr16_ip() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -60556,11 +60600,11 @@ void m68000_device::move_l_adr32_adr16_ip() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60727,6 +60771,7 @@ void m68000_device::move_l_dpc_adr16_ip() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60754,11 +60799,11 @@ void m68000_device::move_l_dpc_adr16_ip() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60966,6 +61011,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60993,11 +61039,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61141,6 +61187,7 @@ void m68000_device::move_l_imm32_adr16_ip() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61168,11 +61215,11 @@ void m68000_device::move_l_imm32_adr16_ip() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61290,6 +61337,7 @@ void m68000_device::move_l_ds_adr32_ip() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61317,11 +61365,11 @@ void m68000_device::move_l_ds_adr32_ip() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61439,6 +61487,7 @@ void m68000_device::move_l_as_adr32_ip() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61466,11 +61515,11 @@ void m68000_device::move_l_as_adr32_ip() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61613,7 +61662,6 @@ void m68000_device::move_l_ais_adr32_ip() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61668,11 +61716,11 @@ void m68000_device::move_l_ais_adr32_ip() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61818,7 +61866,6 @@ void m68000_device::move_l_aips_adr32_ip() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61873,11 +61920,11 @@ void m68000_device::move_l_aips_adr32_ip() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62024,7 +62071,6 @@ void m68000_device::move_l_pais_adr32_ip() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -62079,11 +62125,11 @@ void m68000_device::move_l_pais_adr32_ip() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62250,7 +62296,6 @@ void m68000_device::move_l_das_adr32_ip() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62305,11 +62350,11 @@ void m68000_device::move_l_das_adr32_ip() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62517,7 +62562,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62572,11 +62616,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62745,7 +62789,6 @@ void m68000_device::move_l_adr16_adr32_ip() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62800,11 +62843,11 @@ void m68000_device::move_l_adr16_adr32_ip() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62997,7 +63040,6 @@ void m68000_device::move_l_adr32_adr32_ip() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -63052,11 +63094,11 @@ void m68000_device::move_l_adr32_adr32_ip() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63222,7 +63264,6 @@ void m68000_device::move_l_dpc_adr32_ip() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63277,11 +63318,11 @@ void m68000_device::move_l_dpc_adr32_ip() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63488,7 +63529,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63543,11 +63583,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63715,6 +63755,7 @@ void m68000_device::move_l_imm32_adr32_ip() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63742,11 +63783,11 @@ void m68000_device::move_l_imm32_adr32_ip() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63786,7 +63827,6 @@ void m68000_device::move_w_ds_dd_ip() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63795,6 +63835,7 @@ void m68000_device::move_w_ds_dd_ip() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63836,7 +63877,6 @@ void m68000_device::move_w_as_dd_ip() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63845,6 +63885,7 @@ void m68000_device::move_w_as_dd_ip() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63913,7 +63954,6 @@ void m68000_device::move_w_ais_dd_ip() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -63922,6 +63962,7 @@ void m68000_device::move_w_ais_dd_ip() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63992,7 +64033,6 @@ void m68000_device::move_w_aips_dd_ip() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64001,6 +64041,7 @@ void m68000_device::move_w_aips_dd_ip() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64073,7 +64114,6 @@ void m68000_device::move_w_pais_dd_ip() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64082,6 +64122,7 @@ void m68000_device::move_w_pais_dd_ip() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64173,7 +64214,6 @@ void m68000_device::move_w_das_dd_ip() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64182,6 +64222,7 @@ void m68000_device::move_w_das_dd_ip() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64314,7 +64355,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64323,6 +64363,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64413,7 +64454,6 @@ void m68000_device::move_w_adr16_dd_ip() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64422,6 +64462,7 @@ void m68000_device::move_w_adr16_dd_ip() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64536,7 +64577,6 @@ void m68000_device::move_w_adr32_dd_ip() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64545,6 +64585,7 @@ void m68000_device::move_w_adr32_dd_ip() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64635,7 +64676,6 @@ void m68000_device::move_w_dpc_dd_ip() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64644,6 +64684,7 @@ void m68000_device::move_w_dpc_dd_ip() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64775,7 +64816,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64784,6 +64824,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64849,7 +64890,6 @@ void m68000_device::move_w_imm16_dd_ip() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -64858,6 +64898,7 @@ void m68000_device::move_w_imm16_dd_ip() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64899,12 +64940,12 @@ void m68000_device::movea_w_ds_ad_ip() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64947,12 +64988,12 @@ void m68000_device::movea_w_as_ad_ip() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65022,12 +65063,12 @@ void m68000_device::movea_w_ais_ad_ip() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65098,12 +65139,12 @@ void m68000_device::movea_w_aips_ad_ip() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65176,12 +65217,12 @@ void m68000_device::movea_w_pais_ad_ip() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65273,12 +65314,12 @@ void m68000_device::movea_w_das_ad_ip() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65411,12 +65452,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65507,12 +65548,12 @@ void m68000_device::movea_w_adr16_ad_ip() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65627,12 +65668,12 @@ void m68000_device::movea_w_adr32_ad_ip() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65723,12 +65764,12 @@ void m68000_device::movea_w_dpc_ad_ip() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65860,12 +65901,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65931,12 +65972,12 @@ void m68000_device::movea_w_imm16_ad_ip() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65979,7 +66020,6 @@ void m68000_device::move_w_ds_aid_ip() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66008,10 +66048,10 @@ void m68000_device::move_w_ds_aid_ip() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66051,7 +66091,6 @@ void m68000_device::move_w_as_aid_ip() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66080,10 +66119,10 @@ void m68000_device::move_w_as_aid_ip() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66177,10 +66216,10 @@ void m68000_device::move_w_ais_aid_ip() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66278,10 +66317,10 @@ void m68000_device::move_w_aips_aid_ip() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66381,10 +66420,10 @@ void m68000_device::move_w_pais_aid_ip() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66503,10 +66542,10 @@ void m68000_device::move_w_das_aid_ip() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66666,10 +66705,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66787,10 +66826,10 @@ void m68000_device::move_w_adr16_aid_ip() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66932,10 +66971,10 @@ void m68000_device::move_w_adr32_aid_ip() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67053,10 +67092,10 @@ void m68000_device::move_w_dpc_aid_ip() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67215,10 +67254,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67284,7 +67323,6 @@ void m68000_device::move_w_imm16_aid_ip() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67313,10 +67351,10 @@ void m68000_device::move_w_imm16_aid_ip() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67356,7 +67394,6 @@ void m68000_device::move_w_ds_aipd_ip() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67385,6 +67422,7 @@ void m68000_device::move_w_ds_aipd_ip() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67426,7 +67464,6 @@ void m68000_device::move_w_as_aipd_ip() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67455,6 +67492,7 @@ void m68000_device::move_w_as_aipd_ip() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67523,7 +67561,6 @@ void m68000_device::move_w_ais_aipd_ip() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67552,6 +67589,7 @@ void m68000_device::move_w_ais_aipd_ip() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67624,7 +67662,6 @@ void m68000_device::move_w_aips_aipd_ip() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67653,6 +67690,7 @@ void m68000_device::move_w_aips_aipd_ip() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67727,7 +67765,6 @@ void m68000_device::move_w_pais_aipd_ip() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67756,6 +67793,7 @@ void m68000_device::move_w_pais_aipd_ip() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67849,7 +67887,6 @@ void m68000_device::move_w_das_aipd_ip() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -67878,6 +67915,7 @@ void m68000_device::move_w_das_aipd_ip() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68012,7 +68050,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68041,6 +68078,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68133,7 +68171,6 @@ void m68000_device::move_w_adr16_aipd_ip() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68162,6 +68199,7 @@ void m68000_device::move_w_adr16_aipd_ip() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68278,7 +68316,6 @@ void m68000_device::move_w_adr32_aipd_ip() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -68307,6 +68344,7 @@ void m68000_device::move_w_adr32_aipd_ip() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68399,7 +68437,6 @@ void m68000_device::move_w_dpc_aipd_ip() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68428,6 +68465,7 @@ void m68000_device::move_w_dpc_aipd_ip() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68561,7 +68599,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68590,6 +68627,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68657,7 +68695,6 @@ void m68000_device::move_w_imm16_aipd_ip() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68686,6 +68723,7 @@ void m68000_device::move_w_imm16_aipd_ip() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68727,7 +68765,6 @@ void m68000_device::move_w_ds_paid_ip() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68757,6 +68794,7 @@ void m68000_device::move_w_ds_paid_ip() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68797,7 +68835,6 @@ void m68000_device::move_w_as_paid_ip() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68827,6 +68864,7 @@ void m68000_device::move_w_as_paid_ip() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68894,7 +68932,6 @@ void m68000_device::move_w_ais_paid_ip() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68924,6 +68961,7 @@ void m68000_device::move_w_ais_paid_ip() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68995,7 +69033,6 @@ void m68000_device::move_w_aips_paid_ip() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69025,6 +69062,7 @@ void m68000_device::move_w_aips_paid_ip() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69098,7 +69136,6 @@ void m68000_device::move_w_pais_paid_ip() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69128,6 +69165,7 @@ void m68000_device::move_w_pais_paid_ip() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69220,7 +69258,6 @@ void m68000_device::move_w_das_paid_ip() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69250,6 +69287,7 @@ void m68000_device::move_w_das_paid_ip() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69383,7 +69421,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69413,6 +69450,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69504,7 +69542,6 @@ void m68000_device::move_w_adr16_paid_ip() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69534,6 +69571,7 @@ void m68000_device::move_w_adr16_paid_ip() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69649,7 +69687,6 @@ void m68000_device::move_w_adr32_paid_ip() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69679,6 +69716,7 @@ void m68000_device::move_w_adr32_paid_ip() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -69770,7 +69808,6 @@ void m68000_device::move_w_dpc_paid_ip() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69800,6 +69837,7 @@ void m68000_device::move_w_dpc_paid_ip() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69932,7 +69970,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69962,6 +69999,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70028,7 +70066,6 @@ void m68000_device::move_w_imm16_paid_ip() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70058,6 +70095,7 @@ void m68000_device::move_w_imm16_paid_ip() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70122,7 +70160,6 @@ void m68000_device::move_w_ds_dad_ip() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70150,11 +70187,11 @@ void m68000_device::move_w_ds_dad_ip() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70218,7 +70255,6 @@ void m68000_device::move_w_as_dad_ip() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70246,11 +70282,11 @@ void m68000_device::move_w_as_dad_ip() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70344,6 +70380,7 @@ void m68000_device::move_w_ais_dad_ip() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70371,11 +70408,11 @@ void m68000_device::move_w_ais_dad_ip() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70473,6 +70510,7 @@ void m68000_device::move_w_aips_dad_ip() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70500,11 +70538,11 @@ void m68000_device::move_w_aips_dad_ip() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70604,6 +70642,7 @@ void m68000_device::move_w_pais_dad_ip() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70631,11 +70670,11 @@ void m68000_device::move_w_pais_dad_ip() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70754,6 +70793,7 @@ void m68000_device::move_w_das_dad_ip() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70781,11 +70821,11 @@ void m68000_device::move_w_das_dad_ip() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70945,6 +70985,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70972,11 +71013,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71094,6 +71135,7 @@ void m68000_device::move_w_adr16_dad_ip() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71121,11 +71163,11 @@ void m68000_device::move_w_adr16_dad_ip() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71267,6 +71309,7 @@ void m68000_device::move_w_adr32_dad_ip() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -71294,11 +71337,11 @@ void m68000_device::move_w_adr32_dad_ip() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71416,6 +71459,7 @@ void m68000_device::move_w_dpc_dad_ip() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71443,11 +71487,11 @@ void m68000_device::move_w_dpc_dad_ip() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71606,6 +71650,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71633,11 +71678,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71727,7 +71772,6 @@ void m68000_device::move_w_imm16_dad_ip() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -71755,11 +71799,11 @@ void m68000_device::move_w_imm16_dad_ip() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71865,7 +71909,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -71893,11 +71936,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72003,7 +72046,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -72031,11 +72073,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72170,6 +72212,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72197,11 +72240,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72340,6 +72383,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72367,11 +72411,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72512,6 +72556,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72539,11 +72584,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72703,6 +72748,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72730,11 +72776,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72935,6 +72981,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72962,11 +73009,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73125,6 +73172,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73152,11 +73200,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73339,6 +73387,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -73366,11 +73415,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73529,6 +73578,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73556,11 +73606,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73760,6 +73810,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73787,11 +73838,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73923,7 +73974,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -73951,11 +74001,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74022,6 +74072,7 @@ void m68000_device::move_w_ds_adr16_ip() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74049,11 +74100,11 @@ void m68000_device::move_w_ds_adr16_ip() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74120,6 +74171,7 @@ void m68000_device::move_w_as_adr16_ip() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74147,11 +74199,11 @@ void m68000_device::move_w_as_adr16_ip() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74244,6 +74296,7 @@ void m68000_device::move_w_ais_adr16_ip() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74271,11 +74324,11 @@ void m68000_device::move_w_ais_adr16_ip() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74372,6 +74425,7 @@ void m68000_device::move_w_aips_adr16_ip() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74399,11 +74453,11 @@ void m68000_device::move_w_aips_adr16_ip() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74502,6 +74556,7 @@ void m68000_device::move_w_pais_adr16_ip() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74529,11 +74584,11 @@ void m68000_device::move_w_pais_adr16_ip() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74651,6 +74706,7 @@ void m68000_device::move_w_das_adr16_ip() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74678,11 +74734,11 @@ void m68000_device::move_w_das_adr16_ip() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74841,6 +74897,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74868,11 +74925,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74989,6 +75046,7 @@ void m68000_device::move_w_adr16_adr16_ip() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75016,11 +75074,11 @@ void m68000_device::move_w_adr16_adr16_ip() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75161,6 +75219,7 @@ void m68000_device::move_w_adr32_adr16_ip() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -75188,11 +75247,11 @@ void m68000_device::move_w_adr32_adr16_ip() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75309,6 +75368,7 @@ void m68000_device::move_w_dpc_adr16_ip() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75336,11 +75396,11 @@ void m68000_device::move_w_dpc_adr16_ip() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75498,6 +75558,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75525,11 +75586,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75622,6 +75683,7 @@ void m68000_device::move_w_imm16_adr16_ip() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75649,11 +75711,11 @@ void m68000_device::move_w_imm16_adr16_ip() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75744,6 +75806,7 @@ void m68000_device::move_w_ds_adr32_ip() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75771,11 +75834,11 @@ void m68000_device::move_w_ds_adr32_ip() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75866,6 +75929,7 @@ void m68000_device::move_w_as_adr32_ip() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75893,11 +75957,11 @@ void m68000_device::move_w_as_adr32_ip() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75990,7 +76054,6 @@ void m68000_device::move_w_ais_adr32_ip() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76042,11 +76105,11 @@ void m68000_device::move_w_ais_adr32_ip() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76143,7 +76206,6 @@ void m68000_device::move_w_aips_adr32_ip() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76195,11 +76257,11 @@ void m68000_device::move_w_aips_adr32_ip() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76298,7 +76360,6 @@ void m68000_device::move_w_pais_adr32_ip() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76350,11 +76411,11 @@ void m68000_device::move_w_pais_adr32_ip() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76472,7 +76533,6 @@ void m68000_device::move_w_das_adr32_ip() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76524,11 +76584,11 @@ void m68000_device::move_w_das_adr32_ip() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76687,7 +76747,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76739,11 +76798,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76860,7 +76919,6 @@ void m68000_device::move_w_adr16_adr32_ip() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76912,11 +76970,11 @@ void m68000_device::move_w_adr16_adr32_ip() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77057,7 +77115,6 @@ void m68000_device::move_w_adr32_adr32_ip() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -77109,11 +77166,11 @@ void m68000_device::move_w_adr32_adr32_ip() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77230,7 +77287,6 @@ void m68000_device::move_w_dpc_adr32_ip() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77282,11 +77338,11 @@ void m68000_device::move_w_dpc_adr32_ip() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77444,7 +77500,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77496,11 +77551,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77617,6 +77672,7 @@ void m68000_device::move_w_imm16_adr32_ip() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77644,11 +77700,11 @@ void m68000_device::move_w_imm16_adr32_ip() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77687,7 +77743,6 @@ void m68000_device::negx_b_ds_ip() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -77695,6 +77750,7 @@ void m68000_device::negx_b_ds_ip() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77758,7 +77814,6 @@ void m68000_device::negx_b_ais_ip() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77788,6 +77843,7 @@ void m68000_device::negx_b_ais_ip() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77847,7 +77903,6 @@ void m68000_device::negx_b_aips_ip() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77877,6 +77932,7 @@ void m68000_device::negx_b_aips_ip() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77938,7 +77994,6 @@ void m68000_device::negx_b_pais_ip() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77968,6 +78023,7 @@ void m68000_device::negx_b_pais_ip() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78048,7 +78104,6 @@ void m68000_device::negx_b_das_ip() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78078,6 +78133,7 @@ void m68000_device::negx_b_das_ip() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78199,7 +78255,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78229,6 +78284,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78308,7 +78364,6 @@ void m68000_device::negx_b_adr16_ip() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78338,6 +78393,7 @@ void m68000_device::negx_b_adr16_ip() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78441,7 +78497,6 @@ void m68000_device::negx_b_adr32_ip() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78471,6 +78526,7 @@ void m68000_device::negx_b_adr32_ip() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -78503,7 +78559,6 @@ void m68000_device::negx_w_ds_ip() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -78511,6 +78566,7 @@ void m68000_device::negx_w_ds_ip() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78578,7 +78634,6 @@ void m68000_device::negx_w_ais_ip() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78608,6 +78663,7 @@ void m68000_device::negx_w_ais_ip() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78677,7 +78733,6 @@ void m68000_device::negx_w_aips_ip() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78707,6 +78762,7 @@ void m68000_device::negx_w_aips_ip() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78778,7 +78834,6 @@ void m68000_device::negx_w_pais_ip() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78808,6 +78863,7 @@ void m68000_device::negx_w_pais_ip() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78898,7 +78954,6 @@ void m68000_device::negx_w_das_ip() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78928,6 +78983,7 @@ void m68000_device::negx_w_das_ip() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79059,7 +79115,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79089,6 +79144,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79178,7 +79234,6 @@ void m68000_device::negx_w_adr16_ip() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79208,6 +79263,7 @@ void m68000_device::negx_w_adr16_ip() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79321,7 +79377,6 @@ void m68000_device::negx_w_adr32_ip() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79351,6 +79406,7 @@ void m68000_device::negx_w_adr32_ip() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79389,7 +79445,6 @@ void m68000_device::negx_l_ds_ip() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -79423,6 +79478,7 @@ void m68000_device::negx_l_ds_ip() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79494,7 +79550,6 @@ void m68000_device::negx_l_ais_ip() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79550,6 +79605,7 @@ void m68000_device::negx_l_ais_ip() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79642,7 +79698,6 @@ void m68000_device::negx_l_aips_ip() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79698,6 +79753,7 @@ void m68000_device::negx_l_aips_ip() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79791,7 +79847,6 @@ void m68000_device::negx_l_pais_ip() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79847,6 +79902,7 @@ void m68000_device::negx_l_pais_ip() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79960,7 +80016,6 @@ void m68000_device::negx_l_das_ip() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80016,6 +80071,7 @@ void m68000_device::negx_l_das_ip() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80170,7 +80226,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80226,6 +80281,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80341,7 +80397,6 @@ void m68000_device::negx_l_adr16_ip() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80397,6 +80452,7 @@ void m68000_device::negx_l_adr16_ip() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80536,7 +80592,6 @@ void m68000_device::negx_l_adr32_ip() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80592,6 +80647,7 @@ void m68000_device::negx_l_adr32_ip() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -80630,7 +80686,6 @@ void m68000_device::move_sr_ds_ip() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -80658,6 +80713,7 @@ void m68000_device::move_sr_ds_ip() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -80704,7 +80760,6 @@ void m68000_device::move_sr_ais_ip() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80735,6 +80790,7 @@ void m68000_device::move_sr_ais_ip() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80804,7 +80860,6 @@ void m68000_device::move_sr_aips_ip() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80835,6 +80890,7 @@ void m68000_device::move_sr_aips_ip() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80906,7 +80962,6 @@ void m68000_device::move_sr_pais_ip() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80937,6 +80992,7 @@ void m68000_device::move_sr_pais_ip() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -81027,7 +81083,6 @@ void m68000_device::move_sr_das_ip() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81058,6 +81113,7 @@ void m68000_device::move_sr_das_ip() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81189,7 +81245,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81220,6 +81275,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81309,7 +81365,6 @@ void m68000_device::move_sr_adr16_ip() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81340,6 +81395,7 @@ void m68000_device::move_sr_adr16_ip() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81453,7 +81509,6 @@ void m68000_device::move_sr_adr32_ip() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81484,6 +81539,7 @@ void m68000_device::move_sr_adr32_ip() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -81706,7 +81762,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81721,6 +81776,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -81752,7 +81808,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81978,7 +82033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81993,6 +82047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82024,7 +82079,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82254,7 +82308,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82269,6 +82322,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82300,7 +82354,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82532,7 +82585,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82547,6 +82599,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82578,7 +82631,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82829,7 +82881,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82844,6 +82895,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82875,7 +82927,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83167,7 +83218,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83182,6 +83232,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -83213,7 +83264,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83463,7 +83513,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83478,6 +83527,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -83509,7 +83559,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83783,7 +83832,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83798,6 +83846,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -83829,7 +83878,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84079,7 +84127,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84094,6 +84141,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84125,7 +84173,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84416,7 +84463,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84431,6 +84477,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84462,7 +84509,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84687,7 +84733,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84702,6 +84747,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84733,7 +84779,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84749,13 +84794,13 @@ void m68000_device::lea_ais_ad_ip() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84823,11 +84868,11 @@ void m68000_device::lea_das_ad_ip() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84936,11 +84981,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85003,11 +85048,11 @@ void m68000_device::lea_adr16_ad_ip() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85096,11 +85141,11 @@ void m68000_device::lea_adr32_ad_ip() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85165,11 +85210,11 @@ void m68000_device::lea_dpc_ad_ip() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85277,11 +85322,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85320,7 +85365,6 @@ void m68000_device::clr_b_ds_ip() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -85328,6 +85372,7 @@ void m68000_device::clr_b_ds_ip() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85393,7 +85438,6 @@ void m68000_device::clr_b_ais_ip() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85423,6 +85467,7 @@ void m68000_device::clr_b_ais_ip() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85485,7 +85530,6 @@ void m68000_device::clr_b_aips_ip() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85515,6 +85559,7 @@ void m68000_device::clr_b_aips_ip() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85579,7 +85624,6 @@ void m68000_device::clr_b_pais_ip() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85609,6 +85653,7 @@ void m68000_device::clr_b_pais_ip() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85692,7 +85737,6 @@ void m68000_device::clr_b_das_ip() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85722,6 +85766,7 @@ void m68000_device::clr_b_das_ip() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85848,7 +85893,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85878,6 +85922,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85960,7 +86005,6 @@ void m68000_device::clr_b_adr16_ip() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85990,6 +86034,7 @@ void m68000_device::clr_b_adr16_ip() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86097,7 +86142,6 @@ void m68000_device::clr_b_adr32_ip() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86127,6 +86171,7 @@ void m68000_device::clr_b_adr32_ip() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -86160,7 +86205,6 @@ void m68000_device::clr_w_ds_ip() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -86168,6 +86212,7 @@ void m68000_device::clr_w_ds_ip() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86237,7 +86282,6 @@ void m68000_device::clr_w_ais_ip() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86267,6 +86311,7 @@ void m68000_device::clr_w_ais_ip() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86339,7 +86384,6 @@ void m68000_device::clr_w_aips_ip() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86369,6 +86413,7 @@ void m68000_device::clr_w_aips_ip() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86443,7 +86488,6 @@ void m68000_device::clr_w_pais_ip() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86473,6 +86517,7 @@ void m68000_device::clr_w_pais_ip() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86566,7 +86611,6 @@ void m68000_device::clr_w_das_ip() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86596,6 +86640,7 @@ void m68000_device::clr_w_das_ip() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86732,7 +86777,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86762,6 +86806,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86854,7 +86899,6 @@ void m68000_device::clr_w_adr16_ip() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86884,6 +86928,7 @@ void m68000_device::clr_w_adr16_ip() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -87001,7 +87046,6 @@ void m68000_device::clr_w_adr32_ip() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87031,6 +87075,7 @@ void m68000_device::clr_w_adr32_ip() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87070,7 +87115,6 @@ void m68000_device::clr_l_ds_ip() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -87104,6 +87148,7 @@ void m68000_device::clr_l_ds_ip() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -87177,7 +87222,6 @@ void m68000_device::clr_l_ais_ip() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87233,6 +87277,7 @@ void m68000_device::clr_l_ais_ip() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87328,7 +87373,6 @@ void m68000_device::clr_l_aips_ip() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87384,6 +87428,7 @@ void m68000_device::clr_l_aips_ip() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87480,7 +87525,6 @@ void m68000_device::clr_l_pais_ip() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87536,6 +87580,7 @@ void m68000_device::clr_l_pais_ip() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87652,7 +87697,6 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87708,6 +87752,7 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -87867,7 +87912,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87923,6 +87967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88042,7 +88087,6 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88098,6 +88142,7 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88242,7 +88287,6 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88298,6 +88342,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -88337,7 +88382,6 @@ void m68000_device::neg_b_ds_ip() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -88345,6 +88389,7 @@ void m68000_device::neg_b_ds_ip() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88408,7 +88453,6 @@ void m68000_device::neg_b_ais_ip() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88438,6 +88482,7 @@ void m68000_device::neg_b_ais_ip() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88497,7 +88542,6 @@ void m68000_device::neg_b_aips_ip() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88527,6 +88571,7 @@ void m68000_device::neg_b_aips_ip() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88588,7 +88633,6 @@ void m68000_device::neg_b_pais_ip() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88618,6 +88662,7 @@ void m68000_device::neg_b_pais_ip() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88698,7 +88743,6 @@ void m68000_device::neg_b_das_ip() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88728,6 +88772,7 @@ void m68000_device::neg_b_das_ip() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88849,7 +88894,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88879,6 +88923,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88958,7 +89003,6 @@ void m68000_device::neg_b_adr16_ip() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88988,6 +89032,7 @@ void m68000_device::neg_b_adr16_ip() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89091,7 +89136,6 @@ void m68000_device::neg_b_adr32_ip() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89121,6 +89165,7 @@ void m68000_device::neg_b_adr32_ip() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -89153,7 +89198,6 @@ void m68000_device::neg_w_ds_ip() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -89161,6 +89205,7 @@ void m68000_device::neg_w_ds_ip() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89228,7 +89273,6 @@ void m68000_device::neg_w_ais_ip() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89258,6 +89302,7 @@ void m68000_device::neg_w_ais_ip() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89327,7 +89372,6 @@ void m68000_device::neg_w_aips_ip() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89357,6 +89401,7 @@ void m68000_device::neg_w_aips_ip() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89428,7 +89473,6 @@ void m68000_device::neg_w_pais_ip() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89458,6 +89502,7 @@ void m68000_device::neg_w_pais_ip() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89548,7 +89593,6 @@ void m68000_device::neg_w_das_ip() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89578,6 +89622,7 @@ void m68000_device::neg_w_das_ip() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89709,7 +89754,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89739,6 +89783,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89828,7 +89873,6 @@ void m68000_device::neg_w_adr16_ip() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89858,6 +89902,7 @@ void m68000_device::neg_w_adr16_ip() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89971,7 +90016,6 @@ void m68000_device::neg_w_adr32_ip() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90001,6 +90045,7 @@ void m68000_device::neg_w_adr32_ip() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90039,7 +90084,6 @@ void m68000_device::neg_l_ds_ip() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -90073,6 +90117,7 @@ void m68000_device::neg_l_ds_ip() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -90144,7 +90189,6 @@ void m68000_device::neg_l_ais_ip() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90200,6 +90244,7 @@ void m68000_device::neg_l_ais_ip() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90292,7 +90337,6 @@ void m68000_device::neg_l_aips_ip() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90348,6 +90392,7 @@ void m68000_device::neg_l_aips_ip() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90441,7 +90486,6 @@ void m68000_device::neg_l_pais_ip() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90497,6 +90541,7 @@ void m68000_device::neg_l_pais_ip() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90610,7 +90655,6 @@ void m68000_device::neg_l_das_ip() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90666,6 +90710,7 @@ void m68000_device::neg_l_das_ip() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90820,7 +90865,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90876,6 +90920,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90991,7 +91036,6 @@ void m68000_device::neg_l_adr16_ip() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91047,6 +91091,7 @@ void m68000_device::neg_l_adr16_ip() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -91186,7 +91231,6 @@ void m68000_device::neg_l_adr32_ip() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91242,6 +91286,7 @@ void m68000_device::neg_l_adr32_ip() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -91315,11 +91360,11 @@ void m68000_device::move_ds_ccr_ip() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91420,11 +91465,11 @@ void m68000_device::move_ais_ccr_ip() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91529,11 +91574,11 @@ void m68000_device::move_aips_ccr_ip() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91640,11 +91685,11 @@ void m68000_device::move_pais_ccr_ip() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91770,11 +91815,11 @@ void m68000_device::move_das_ccr_ip() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91941,11 +91986,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92070,11 +92115,11 @@ void m68000_device::move_adr16_ccr_ip() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92223,11 +92268,11 @@ void m68000_device::move_adr32_ccr_ip() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92352,11 +92397,11 @@ void m68000_device::move_dpc_ccr_ip() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92522,11 +92567,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92626,11 +92671,11 @@ void m68000_device::move_imm8_ccr_ip() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92669,7 +92714,6 @@ void m68000_device::not_b_ds_ip() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -92677,6 +92721,7 @@ void m68000_device::not_b_ds_ip() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92740,7 +92785,6 @@ void m68000_device::not_b_ais_ip() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92770,6 +92814,7 @@ void m68000_device::not_b_ais_ip() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92829,7 +92874,6 @@ void m68000_device::not_b_aips_ip() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92859,6 +92903,7 @@ void m68000_device::not_b_aips_ip() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92920,7 +92965,6 @@ void m68000_device::not_b_pais_ip() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92950,6 +92994,7 @@ void m68000_device::not_b_pais_ip() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93030,7 +93075,6 @@ void m68000_device::not_b_das_ip() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93060,6 +93104,7 @@ void m68000_device::not_b_das_ip() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93181,7 +93226,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93211,6 +93255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93290,7 +93335,6 @@ void m68000_device::not_b_adr16_ip() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93320,6 +93364,7 @@ void m68000_device::not_b_adr16_ip() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93423,7 +93468,6 @@ void m68000_device::not_b_adr32_ip() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93453,6 +93497,7 @@ void m68000_device::not_b_adr32_ip() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -93485,7 +93530,6 @@ void m68000_device::not_w_ds_ip() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -93493,6 +93537,7 @@ void m68000_device::not_w_ds_ip() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93560,7 +93605,6 @@ void m68000_device::not_w_ais_ip() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93590,6 +93634,7 @@ void m68000_device::not_w_ais_ip() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93659,7 +93704,6 @@ void m68000_device::not_w_aips_ip() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93689,6 +93733,7 @@ void m68000_device::not_w_aips_ip() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93760,7 +93805,6 @@ void m68000_device::not_w_pais_ip() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93790,6 +93834,7 @@ void m68000_device::not_w_pais_ip() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93880,7 +93925,6 @@ void m68000_device::not_w_das_ip() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93910,6 +93954,7 @@ void m68000_device::not_w_das_ip() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94041,7 +94086,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94071,6 +94115,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94160,7 +94205,6 @@ void m68000_device::not_w_adr16_ip() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94190,6 +94234,7 @@ void m68000_device::not_w_adr16_ip() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94303,7 +94348,6 @@ void m68000_device::not_w_adr32_ip() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94333,6 +94377,7 @@ void m68000_device::not_w_adr32_ip() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94371,7 +94416,6 @@ void m68000_device::not_l_ds_ip() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -94405,6 +94449,7 @@ void m68000_device::not_l_ds_ip() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -94476,7 +94521,6 @@ void m68000_device::not_l_ais_ip() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94532,6 +94576,7 @@ void m68000_device::not_l_ais_ip() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94624,7 +94669,6 @@ void m68000_device::not_l_aips_ip() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94680,6 +94724,7 @@ void m68000_device::not_l_aips_ip() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94773,7 +94818,6 @@ void m68000_device::not_l_pais_ip() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94829,6 +94873,7 @@ void m68000_device::not_l_pais_ip() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94942,7 +94987,6 @@ void m68000_device::not_l_das_ip() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94998,6 +95042,7 @@ void m68000_device::not_l_das_ip() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95152,7 +95197,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95208,6 +95252,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95323,7 +95368,6 @@ void m68000_device::not_l_adr16_ip() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95379,6 +95423,7 @@ void m68000_device::not_l_adr16_ip() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95518,7 +95563,6 @@ void m68000_device::not_l_adr32_ip() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95574,6 +95618,7 @@ void m68000_device::not_l_adr32_ip() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -95653,11 +95698,11 @@ void m68000_device::move_ds_sr_ip() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95764,11 +95809,11 @@ void m68000_device::move_ais_sr_ip() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95879,11 +95924,11 @@ void m68000_device::move_aips_sr_ip() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95996,11 +96041,11 @@ void m68000_device::move_pais_sr_ip() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96132,11 +96177,11 @@ void m68000_device::move_das_sr_ip() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96309,11 +96354,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96444,11 +96489,11 @@ void m68000_device::move_adr16_sr_ip() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96603,11 +96648,11 @@ void m68000_device::move_adr32_sr_ip() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96738,11 +96783,11 @@ void m68000_device::move_dpc_sr_ip() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96914,11 +96959,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -97024,11 +97069,11 @@ void m68000_device::move_i16u_sr_ip() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -97067,7 +97112,6 @@ void m68000_device::nbcd_b_ds_ip() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -97099,6 +97143,7 @@ void m68000_device::nbcd_b_ds_ip() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97142,7 +97187,6 @@ void m68000_device::nbcd_b_ais_ip() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97174,6 +97218,7 @@ void m68000_device::nbcd_b_ais_ip() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97233,7 +97278,6 @@ void m68000_device::nbcd_b_aips_ip() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97265,6 +97309,7 @@ void m68000_device::nbcd_b_aips_ip() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97326,7 +97371,6 @@ void m68000_device::nbcd_b_pais_ip() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97358,6 +97402,7 @@ void m68000_device::nbcd_b_pais_ip() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97438,7 +97483,6 @@ void m68000_device::nbcd_b_das_ip() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97470,6 +97514,7 @@ void m68000_device::nbcd_b_das_ip() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97591,7 +97636,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97623,6 +97667,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97702,7 +97747,6 @@ void m68000_device::nbcd_b_adr16_ip() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97734,6 +97778,7 @@ void m68000_device::nbcd_b_adr16_ip() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97837,7 +97882,6 @@ void m68000_device::nbcd_b_adr32_ip() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97869,6 +97913,7 @@ void m68000_device::nbcd_b_adr32_ip() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -97901,7 +97946,6 @@ void m68000_device::swap_ds_ip() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -97910,6 +97954,7 @@ void m68000_device::swap_ds_ip() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -97953,7 +97998,6 @@ void m68000_device::pea_ais_ip() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98007,6 +98051,7 @@ void m68000_device::pea_ais_ip() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98072,7 +98117,6 @@ void m68000_device::pea_das_ip() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98128,6 +98172,7 @@ void m68000_device::pea_das_ip() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98230,7 +98275,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98288,6 +98332,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98374,6 +98419,7 @@ void m68000_device::pea_adr16_ip() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98401,11 +98447,11 @@ void m68000_device::pea_adr16_ip() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98516,6 +98562,7 @@ void m68000_device::pea_adr32_ip() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98543,11 +98590,11 @@ void m68000_device::pea_adr32_ip() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98612,7 +98659,6 @@ void m68000_device::pea_dpc_ip() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98668,6 +98714,7 @@ void m68000_device::pea_dpc_ip() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98769,7 +98816,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98827,6 +98873,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98865,7 +98912,6 @@ void m68000_device::ext_w_ds_ip() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -98873,6 +98919,7 @@ void m68000_device::ext_w_ds_ip() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98978,10 +99025,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99087,11 +99134,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99221,10 +99268,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99395,10 +99442,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99528,10 +99575,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99685,10 +99732,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99727,7 +99774,6 @@ void m68000_device::ext_l_ds_ip() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -99735,6 +99781,7 @@ void m68000_device::ext_l_ds_ip() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99863,10 +99910,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99996,11 +100043,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100153,10 +100200,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100350,10 +100397,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100506,10 +100553,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100686,10 +100733,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100728,7 +100775,6 @@ void m68000_device::tst_b_ds_ip() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -100737,6 +100783,7 @@ void m68000_device::tst_b_ds_ip() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100800,7 +100847,6 @@ void m68000_device::tst_b_ais_ip() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100808,6 +100854,7 @@ void m68000_device::tst_b_ais_ip() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100876,7 +100923,6 @@ void m68000_device::tst_b_aips_ip() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100884,6 +100930,7 @@ void m68000_device::tst_b_aips_ip() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100954,7 +101001,6 @@ void m68000_device::tst_b_pais_ip() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100962,6 +101008,7 @@ void m68000_device::tst_b_pais_ip() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101051,7 +101098,6 @@ void m68000_device::tst_b_das_ip() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101059,6 +101105,7 @@ void m68000_device::tst_b_das_ip() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101191,7 +101238,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101199,6 +101245,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101287,7 +101334,6 @@ void m68000_device::tst_b_adr16_ip() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101295,6 +101341,7 @@ void m68000_device::tst_b_adr16_ip() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101408,7 +101455,6 @@ void m68000_device::tst_b_adr32_ip() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101416,6 +101462,7 @@ void m68000_device::tst_b_adr32_ip() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101455,7 +101502,6 @@ void m68000_device::tst_w_ds_ip() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -101464,6 +101510,7 @@ void m68000_device::tst_w_ds_ip() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101531,7 +101578,6 @@ void m68000_device::tst_w_ais_ip() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101539,6 +101585,7 @@ void m68000_device::tst_w_ais_ip() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101611,7 +101658,6 @@ void m68000_device::tst_w_aips_ip() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101619,6 +101665,7 @@ void m68000_device::tst_w_aips_ip() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101693,7 +101740,6 @@ void m68000_device::tst_w_pais_ip() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101701,6 +101747,7 @@ void m68000_device::tst_w_pais_ip() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101794,7 +101841,6 @@ void m68000_device::tst_w_das_ip() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101802,6 +101848,7 @@ void m68000_device::tst_w_das_ip() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101938,7 +101985,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101946,6 +101992,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102038,7 +102085,6 @@ void m68000_device::tst_w_adr16_ip() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102046,6 +102092,7 @@ void m68000_device::tst_w_adr16_ip() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102163,7 +102210,6 @@ void m68000_device::tst_w_adr32_ip() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102171,6 +102217,7 @@ void m68000_device::tst_w_adr32_ip() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102210,7 +102257,6 @@ void m68000_device::tst_l_ds_ip() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -102219,6 +102265,7 @@ void m68000_device::tst_l_ds_ip() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102312,7 +102359,6 @@ void m68000_device::tst_l_ais_ip() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102320,6 +102366,7 @@ void m68000_device::tst_l_ais_ip() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102417,7 +102464,6 @@ void m68000_device::tst_l_aips_ip() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102425,6 +102471,7 @@ void m68000_device::tst_l_aips_ip() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102523,7 +102570,6 @@ void m68000_device::tst_l_pais_ip() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102531,6 +102577,7 @@ void m68000_device::tst_l_pais_ip() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102649,7 +102696,6 @@ void m68000_device::tst_l_das_ip() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102657,6 +102703,7 @@ void m68000_device::tst_l_das_ip() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102818,7 +102865,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102826,6 +102872,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102947,7 +102994,6 @@ void m68000_device::tst_l_adr16_ip() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102955,6 +103001,7 @@ void m68000_device::tst_l_adr16_ip() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103101,7 +103148,6 @@ void m68000_device::tst_l_adr32_ip() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -103109,6 +103155,7 @@ void m68000_device::tst_l_adr32_ip() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103150,13 +103197,13 @@ void m68000_device::tas_ds_ip() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103253,12 +103300,12 @@ void m68000_device::tas_ais_ip() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103356,12 +103403,12 @@ void m68000_device::tas_aips_ip() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103461,12 +103508,12 @@ void m68000_device::tas_pais_ip() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103585,12 +103632,12 @@ void m68000_device::tas_das_ip() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103752,12 +103799,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103875,12 +103922,12 @@ void m68000_device::tas_adr16_ip() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104023,12 +104070,12 @@ void m68000_device::tas_adr32_ip() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104158,10 +104205,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104226,7 +104273,6 @@ void m68000_device::movem_w_aips_list_ip() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -104295,6 +104341,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104449,10 +104496,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104647,10 +104694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104803,10 +104850,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104986,10 +105033,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105143,10 +105190,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105340,10 +105387,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105496,10 +105543,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105564,7 +105611,6 @@ void m68000_device::movem_l_aips_list_ip() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -105657,6 +105703,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105835,10 +105882,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106057,10 +106104,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106237,10 +106284,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106444,10 +106491,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106625,10 +106672,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106846,10 +106893,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107050,11 +107097,11 @@ void m68000_device::trap_imm4_ip() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107122,7 +107169,6 @@ void m68000_device::link_as_imm16_ip() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -107171,6 +107217,7 @@ void m68000_device::link_as_imm16_ip() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107237,7 +107284,6 @@ void m68000_device::unlk_as_ip() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -107266,6 +107312,7 @@ void m68000_device::unlk_as_ip() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107309,13 +107356,13 @@ void m68000_device::move_as_usp_ip() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107360,13 +107407,13 @@ void m68000_device::move_usp_as_ip() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107409,6 +107456,7 @@ void m68000_device::reset_ip() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107418,7 +107466,6 @@ void m68000_device::reset_ip() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -107439,6 +107486,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107477,11 +107525,11 @@ void m68000_device::nop_ip() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107522,6 +107570,7 @@ void m68000_device::stop_i16u_ip() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107531,6 +107580,7 @@ void m68000_device::stop_i16u_ip() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -107659,11 +107709,11 @@ void m68000_device::rte_ip() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107774,11 +107824,11 @@ void m68000_device::rts_ip() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107816,7 +107866,6 @@ void m68000_device::trapv_ip() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -107827,6 +107876,7 @@ void m68000_device::trapv_ip() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108038,11 +108088,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108182,11 +108232,11 @@ void m68000_device::rtr_ip() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108273,7 +108323,6 @@ void m68000_device::jsr_ais_ip() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108298,11 +108347,11 @@ void m68000_device::jsr_ais_ip() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108395,7 +108444,6 @@ void m68000_device::jsr_das_ip() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108420,11 +108468,11 @@ void m68000_device::jsr_das_ip() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108537,7 +108585,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108562,11 +108609,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108655,7 +108702,6 @@ void m68000_device::jsr_adr16_ip() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108680,11 +108726,11 @@ void m68000_device::jsr_adr16_ip() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108795,7 +108841,6 @@ void m68000_device::jsr_adr32_ip() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -108820,11 +108865,11 @@ void m68000_device::jsr_adr32_ip() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108916,7 +108961,6 @@ void m68000_device::jsr_dpc_ip() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108941,11 +108985,11 @@ void m68000_device::jsr_dpc_ip() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109057,7 +109101,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109082,11 +109125,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109148,11 +109191,11 @@ void m68000_device::jmp_ais_ip() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109218,11 +109261,11 @@ void m68000_device::jmp_das_ip() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109308,11 +109351,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109376,11 +109419,11 @@ void m68000_device::jmp_adr16_ip() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109465,11 +109508,11 @@ void m68000_device::jmp_adr32_ip() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109534,11 +109577,11 @@ void m68000_device::jmp_dpc_ip() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109623,11 +109666,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109666,7 +109709,6 @@ void m68000_device::addq_b_imm3_ds_ip() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -109674,6 +109716,7 @@ void m68000_device::addq_b_imm3_ds_ip() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109737,7 +109780,6 @@ void m68000_device::addq_b_imm3_ais_ip() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109768,6 +109810,7 @@ void m68000_device::addq_b_imm3_ais_ip() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109827,7 +109870,6 @@ void m68000_device::addq_b_imm3_aips_ip() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109858,6 +109900,7 @@ void m68000_device::addq_b_imm3_aips_ip() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109919,7 +109962,6 @@ void m68000_device::addq_b_imm3_pais_ip() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109950,6 +109992,7 @@ void m68000_device::addq_b_imm3_pais_ip() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110030,7 +110073,6 @@ void m68000_device::addq_b_imm3_das_ip() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110061,6 +110103,7 @@ void m68000_device::addq_b_imm3_das_ip() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110182,7 +110225,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110213,6 +110255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110292,7 +110335,6 @@ void m68000_device::addq_b_imm3_adr16_ip() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110323,6 +110365,7 @@ void m68000_device::addq_b_imm3_adr16_ip() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110426,7 +110469,6 @@ void m68000_device::addq_b_imm3_adr32_ip() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110457,6 +110499,7 @@ void m68000_device::addq_b_imm3_adr32_ip() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110489,7 +110532,6 @@ void m68000_device::addq_w_imm3_ds_ip() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -110497,6 +110539,7 @@ void m68000_device::addq_w_imm3_ds_ip() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110537,7 +110580,6 @@ void m68000_device::addq_w_imm3_as_ip() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -110571,6 +110613,7 @@ void m68000_device::addq_w_imm3_as_ip() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -110618,7 +110661,6 @@ void m68000_device::addq_w_imm3_ais_ip() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110649,6 +110691,7 @@ void m68000_device::addq_w_imm3_ais_ip() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110718,7 +110761,6 @@ void m68000_device::addq_w_imm3_aips_ip() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110749,6 +110791,7 @@ void m68000_device::addq_w_imm3_aips_ip() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110820,7 +110863,6 @@ void m68000_device::addq_w_imm3_pais_ip() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110851,6 +110893,7 @@ void m68000_device::addq_w_imm3_pais_ip() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110941,7 +110984,6 @@ void m68000_device::addq_w_imm3_das_ip() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110972,6 +111014,7 @@ void m68000_device::addq_w_imm3_das_ip() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111103,7 +111146,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111134,6 +111176,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111223,7 +111266,6 @@ void m68000_device::addq_w_imm3_adr16_ip() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111254,6 +111296,7 @@ void m68000_device::addq_w_imm3_adr16_ip() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111367,7 +111410,6 @@ void m68000_device::addq_w_imm3_adr32_ip() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111398,6 +111440,7 @@ void m68000_device::addq_w_imm3_adr32_ip() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111436,7 +111479,6 @@ void m68000_device::addq_l_imm3_ds_ip() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -111472,6 +111514,7 @@ void m68000_device::addq_l_imm3_ds_ip() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111492,7 +111535,6 @@ void m68000_device::addq_l_imm3_as_ip() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -111526,6 +111568,7 @@ void m68000_device::addq_l_imm3_as_ip() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111597,7 +111640,6 @@ void m68000_device::addq_l_imm3_ais_ip() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111654,6 +111696,7 @@ void m68000_device::addq_l_imm3_ais_ip() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111746,7 +111789,6 @@ void m68000_device::addq_l_imm3_aips_ip() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111803,6 +111845,7 @@ void m68000_device::addq_l_imm3_aips_ip() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111896,7 +111939,6 @@ void m68000_device::addq_l_imm3_pais_ip() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111953,6 +111995,7 @@ void m68000_device::addq_l_imm3_pais_ip() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112066,7 +112109,6 @@ void m68000_device::addq_l_imm3_das_ip() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112123,6 +112165,7 @@ void m68000_device::addq_l_imm3_das_ip() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112277,7 +112320,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112334,6 +112376,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112449,7 +112492,6 @@ void m68000_device::addq_l_imm3_adr16_ip() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112506,6 +112548,7 @@ void m68000_device::addq_l_imm3_adr16_ip() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112645,7 +112688,6 @@ void m68000_device::addq_l_imm3_adr32_ip() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112702,6 +112744,7 @@ void m68000_device::addq_l_imm3_adr32_ip() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112740,7 +112783,6 @@ void m68000_device::st_ds_ip() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112752,6 +112794,7 @@ void m68000_device::st_ds_ip() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112810,6 +112853,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112878,6 +112922,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112912,12 +112957,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112950,12 +112995,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112990,6 +113035,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -113052,7 +113098,6 @@ void m68000_device::st_ais_ip() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113120,6 +113165,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113182,7 +113228,6 @@ void m68000_device::st_aips_ip() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113250,6 +113295,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113314,7 +113360,6 @@ void m68000_device::st_pais_ip() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113382,6 +113427,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113465,7 +113511,6 @@ void m68000_device::st_das_ip() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113533,6 +113578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113659,7 +113705,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113727,6 +113772,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113809,7 +113855,6 @@ void m68000_device::st_adr16_ip() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113877,6 +113922,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113984,7 +114030,6 @@ void m68000_device::st_adr32_ip() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114052,6 +114097,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114085,7 +114131,6 @@ void m68000_device::subq_b_imm3_ds_ip() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114093,6 +114138,7 @@ void m68000_device::subq_b_imm3_ds_ip() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114156,7 +114202,6 @@ void m68000_device::subq_b_imm3_ais_ip() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114187,6 +114232,7 @@ void m68000_device::subq_b_imm3_ais_ip() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114246,7 +114292,6 @@ void m68000_device::subq_b_imm3_aips_ip() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114277,6 +114322,7 @@ void m68000_device::subq_b_imm3_aips_ip() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114338,7 +114384,6 @@ void m68000_device::subq_b_imm3_pais_ip() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114369,6 +114414,7 @@ void m68000_device::subq_b_imm3_pais_ip() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114449,7 +114495,6 @@ void m68000_device::subq_b_imm3_das_ip() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114480,6 +114525,7 @@ void m68000_device::subq_b_imm3_das_ip() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114601,7 +114647,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114632,6 +114677,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114711,7 +114757,6 @@ void m68000_device::subq_b_imm3_adr16_ip() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114742,6 +114787,7 @@ void m68000_device::subq_b_imm3_adr16_ip() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114845,7 +114891,6 @@ void m68000_device::subq_b_imm3_adr32_ip() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114876,6 +114921,7 @@ void m68000_device::subq_b_imm3_adr32_ip() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114908,7 +114954,6 @@ void m68000_device::subq_w_imm3_ds_ip() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114916,6 +114961,7 @@ void m68000_device::subq_w_imm3_ds_ip() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114956,7 +115002,6 @@ void m68000_device::subq_w_imm3_as_ip() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -114990,6 +115035,7 @@ void m68000_device::subq_w_imm3_as_ip() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115037,7 +115083,6 @@ void m68000_device::subq_w_imm3_ais_ip() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115068,6 +115113,7 @@ void m68000_device::subq_w_imm3_ais_ip() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115137,7 +115183,6 @@ void m68000_device::subq_w_imm3_aips_ip() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115168,6 +115213,7 @@ void m68000_device::subq_w_imm3_aips_ip() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115239,7 +115285,6 @@ void m68000_device::subq_w_imm3_pais_ip() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115270,6 +115315,7 @@ void m68000_device::subq_w_imm3_pais_ip() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115360,7 +115406,6 @@ void m68000_device::subq_w_imm3_das_ip() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115391,6 +115436,7 @@ void m68000_device::subq_w_imm3_das_ip() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115522,7 +115568,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115553,6 +115598,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115642,7 +115688,6 @@ void m68000_device::subq_w_imm3_adr16_ip() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115673,6 +115718,7 @@ void m68000_device::subq_w_imm3_adr16_ip() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115786,7 +115832,6 @@ void m68000_device::subq_w_imm3_adr32_ip() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115817,6 +115862,7 @@ void m68000_device::subq_w_imm3_adr32_ip() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -115855,7 +115901,6 @@ void m68000_device::subq_l_imm3_ds_ip() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -115891,6 +115936,7 @@ void m68000_device::subq_l_imm3_ds_ip() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115911,7 +115957,6 @@ void m68000_device::subq_l_imm3_as_ip() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -115945,6 +115990,7 @@ void m68000_device::subq_l_imm3_as_ip() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -116016,7 +116062,6 @@ void m68000_device::subq_l_imm3_ais_ip() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116073,6 +116118,7 @@ void m68000_device::subq_l_imm3_ais_ip() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116165,7 +116211,6 @@ void m68000_device::subq_l_imm3_aips_ip() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116222,6 +116267,7 @@ void m68000_device::subq_l_imm3_aips_ip() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116315,7 +116361,6 @@ void m68000_device::subq_l_imm3_pais_ip() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116372,6 +116417,7 @@ void m68000_device::subq_l_imm3_pais_ip() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116485,7 +116531,6 @@ void m68000_device::subq_l_imm3_das_ip() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116542,6 +116587,7 @@ void m68000_device::subq_l_imm3_das_ip() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116696,7 +116742,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116753,6 +116798,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116868,7 +116914,6 @@ void m68000_device::subq_l_imm3_adr16_ip() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116925,6 +116970,7 @@ void m68000_device::subq_l_imm3_adr16_ip() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -117064,7 +117110,6 @@ void m68000_device::subq_l_imm3_adr32_ip() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117121,6 +117166,7 @@ void m68000_device::subq_l_imm3_adr32_ip() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -117159,7 +117205,6 @@ void m68000_device::sf_ds_ip() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117171,6 +117216,7 @@ void m68000_device::sf_ds_ip() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117229,6 +117275,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117297,6 +117344,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117331,12 +117379,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117369,12 +117417,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117409,6 +117457,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117471,7 +117520,6 @@ void m68000_device::sf_ais_ip() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117539,6 +117587,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117601,7 +117650,6 @@ void m68000_device::sf_aips_ip() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117669,6 +117717,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117733,7 +117782,6 @@ void m68000_device::sf_pais_ip() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117801,6 +117849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117884,7 +117933,6 @@ void m68000_device::sf_das_ip() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117952,6 +118000,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118078,7 +118127,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118146,6 +118194,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118228,7 +118277,6 @@ void m68000_device::sf_adr16_ip() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118296,6 +118344,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118403,7 +118452,6 @@ void m68000_device::sf_adr32_ip() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118471,6 +118519,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -118504,7 +118553,6 @@ void m68000_device::shi_ds_ip() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118516,6 +118564,7 @@ void m68000_device::shi_ds_ip() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118574,6 +118623,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118642,6 +118692,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118676,12 +118727,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118714,12 +118765,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118754,6 +118805,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118816,7 +118868,6 @@ void m68000_device::shi_ais_ip() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118884,6 +118935,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -118946,7 +118998,6 @@ void m68000_device::shi_aips_ip() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119014,6 +119065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119078,7 +119130,6 @@ void m68000_device::shi_pais_ip() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119146,6 +119197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119229,7 +119281,6 @@ void m68000_device::shi_das_ip() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119297,6 +119348,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119423,7 +119475,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119491,6 +119542,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119573,7 +119625,6 @@ void m68000_device::shi_adr16_ip() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119641,6 +119692,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119748,7 +119800,6 @@ void m68000_device::shi_adr32_ip() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119816,6 +119867,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -119849,7 +119901,6 @@ void m68000_device::sls_ds_ip() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119861,6 +119912,7 @@ void m68000_device::sls_ds_ip() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -119919,6 +119971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119987,6 +120040,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -120021,12 +120075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -120059,12 +120113,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -120099,6 +120153,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -120161,7 +120216,6 @@ void m68000_device::sls_ais_ip() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120229,6 +120283,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120291,7 +120346,6 @@ void m68000_device::sls_aips_ip() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120359,6 +120413,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120423,7 +120478,6 @@ void m68000_device::sls_pais_ip() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120491,6 +120545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120574,7 +120629,6 @@ void m68000_device::sls_das_ip() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120642,6 +120696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120768,7 +120823,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120836,6 +120890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120918,7 +120973,6 @@ void m68000_device::sls_adr16_ip() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120986,6 +121040,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -121093,7 +121148,6 @@ void m68000_device::sls_adr32_ip() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121161,6 +121215,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -121194,7 +121249,6 @@ void m68000_device::scc_ds_ip() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121206,6 +121260,7 @@ void m68000_device::scc_ds_ip() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121264,6 +121319,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -121332,6 +121388,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -121366,12 +121423,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121404,12 +121461,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121444,6 +121501,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121506,7 +121564,6 @@ void m68000_device::scc_ais_ip() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121574,6 +121631,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121636,7 +121694,6 @@ void m68000_device::scc_aips_ip() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121704,6 +121761,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121768,7 +121826,6 @@ void m68000_device::scc_pais_ip() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121836,6 +121893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121919,7 +121977,6 @@ void m68000_device::scc_das_ip() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121987,6 +122044,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122113,7 +122171,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122181,6 +122238,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122263,7 +122321,6 @@ void m68000_device::scc_adr16_ip() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122331,6 +122388,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122438,7 +122496,6 @@ void m68000_device::scc_adr32_ip() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122506,6 +122563,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -122539,7 +122597,6 @@ void m68000_device::scs_ds_ip() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122551,6 +122608,7 @@ void m68000_device::scs_ds_ip() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122609,6 +122667,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -122677,6 +122736,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -122711,12 +122771,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122749,12 +122809,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122789,6 +122849,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122851,7 +122912,6 @@ void m68000_device::scs_ais_ip() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122919,6 +122979,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -122981,7 +123042,6 @@ void m68000_device::scs_aips_ip() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123049,6 +123109,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123113,7 +123174,6 @@ void m68000_device::scs_pais_ip() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123181,6 +123241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123264,7 +123325,6 @@ void m68000_device::scs_das_ip() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123332,6 +123392,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123458,7 +123519,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123526,6 +123586,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123608,7 +123669,6 @@ void m68000_device::scs_adr16_ip() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123676,6 +123736,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123783,7 +123844,6 @@ void m68000_device::scs_adr32_ip() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123851,6 +123911,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -123884,7 +123945,6 @@ void m68000_device::sne_ds_ip() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123896,6 +123956,7 @@ void m68000_device::sne_ds_ip() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -123954,6 +124015,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -124022,6 +124084,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -124056,12 +124119,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -124094,12 +124157,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -124134,6 +124197,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -124196,7 +124260,6 @@ void m68000_device::sne_ais_ip() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124264,6 +124327,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124326,7 +124390,6 @@ void m68000_device::sne_aips_ip() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124394,6 +124457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124458,7 +124522,6 @@ void m68000_device::sne_pais_ip() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124526,6 +124589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124609,7 +124673,6 @@ void m68000_device::sne_das_ip() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124677,6 +124740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124803,7 +124867,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124871,6 +124934,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124953,7 +125017,6 @@ void m68000_device::sne_adr16_ip() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125021,6 +125084,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -125128,7 +125192,6 @@ void m68000_device::sne_adr32_ip() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125196,6 +125259,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -125229,7 +125293,6 @@ void m68000_device::seq_ds_ip() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125241,6 +125304,7 @@ void m68000_device::seq_ds_ip() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125299,6 +125363,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -125367,6 +125432,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -125401,12 +125467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125439,12 +125505,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125479,6 +125545,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125541,7 +125608,6 @@ void m68000_device::seq_ais_ip() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125609,6 +125675,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125671,7 +125738,6 @@ void m68000_device::seq_aips_ip() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125739,6 +125805,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125803,7 +125870,6 @@ void m68000_device::seq_pais_ip() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125871,6 +125937,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125954,7 +126021,6 @@ void m68000_device::seq_das_ip() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126022,6 +126088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126148,7 +126215,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126216,6 +126282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126298,7 +126365,6 @@ void m68000_device::seq_adr16_ip() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126366,6 +126432,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126473,7 +126540,6 @@ void m68000_device::seq_adr32_ip() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126541,6 +126607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -126574,7 +126641,6 @@ void m68000_device::svc_ds_ip() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126586,6 +126652,7 @@ void m68000_device::svc_ds_ip() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126644,6 +126711,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -126712,6 +126780,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -126746,12 +126815,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126784,12 +126853,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126824,6 +126893,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126886,7 +126956,6 @@ void m68000_device::svc_ais_ip() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126954,6 +127023,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127016,7 +127086,6 @@ void m68000_device::svc_aips_ip() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127084,6 +127153,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127148,7 +127218,6 @@ void m68000_device::svc_pais_ip() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127216,6 +127285,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127299,7 +127369,6 @@ void m68000_device::svc_das_ip() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127367,6 +127436,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127493,7 +127563,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127561,6 +127630,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127643,7 +127713,6 @@ void m68000_device::svc_adr16_ip() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127711,6 +127780,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127818,7 +127888,6 @@ void m68000_device::svc_adr32_ip() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127886,6 +127955,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -127919,7 +127989,6 @@ void m68000_device::svs_ds_ip() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127931,6 +128000,7 @@ void m68000_device::svs_ds_ip() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -127989,6 +128059,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -128057,6 +128128,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -128091,12 +128163,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -128129,12 +128201,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -128169,6 +128241,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -128231,7 +128304,6 @@ void m68000_device::svs_ais_ip() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128299,6 +128371,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128361,7 +128434,6 @@ void m68000_device::svs_aips_ip() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128429,6 +128501,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128493,7 +128566,6 @@ void m68000_device::svs_pais_ip() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128561,6 +128633,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128644,7 +128717,6 @@ void m68000_device::svs_das_ip() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128712,6 +128784,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128838,7 +128911,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128906,6 +128978,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128988,7 +129061,6 @@ void m68000_device::svs_adr16_ip() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129056,6 +129128,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -129163,7 +129236,6 @@ void m68000_device::svs_adr32_ip() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129231,6 +129303,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -129264,7 +129337,6 @@ void m68000_device::spl_ds_ip() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129276,6 +129348,7 @@ void m68000_device::spl_ds_ip() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129334,6 +129407,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -129402,6 +129476,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -129436,12 +129511,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129474,12 +129549,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129514,6 +129589,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129576,7 +129652,6 @@ void m68000_device::spl_ais_ip() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129644,6 +129719,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129706,7 +129782,6 @@ void m68000_device::spl_aips_ip() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129774,6 +129849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129838,7 +129914,6 @@ void m68000_device::spl_pais_ip() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129906,6 +129981,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129989,7 +130065,6 @@ void m68000_device::spl_das_ip() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130057,6 +130132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130183,7 +130259,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130251,6 +130326,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130333,7 +130409,6 @@ void m68000_device::spl_adr16_ip() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130401,6 +130476,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130508,7 +130584,6 @@ void m68000_device::spl_adr32_ip() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130576,6 +130651,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -130609,7 +130685,6 @@ void m68000_device::smi_ds_ip() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130621,6 +130696,7 @@ void m68000_device::smi_ds_ip() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130679,6 +130755,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -130747,6 +130824,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -130781,12 +130859,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130819,12 +130897,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130859,6 +130937,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130921,7 +131000,6 @@ void m68000_device::smi_ais_ip() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130989,6 +131067,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131051,7 +131130,6 @@ void m68000_device::smi_aips_ip() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131119,6 +131197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131183,7 +131262,6 @@ void m68000_device::smi_pais_ip() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131251,6 +131329,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131334,7 +131413,6 @@ void m68000_device::smi_das_ip() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131402,6 +131480,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131528,7 +131607,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131596,6 +131674,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131678,7 +131757,6 @@ void m68000_device::smi_adr16_ip() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131746,6 +131824,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131853,7 +131932,6 @@ void m68000_device::smi_adr32_ip() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131921,6 +131999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -131954,7 +132033,6 @@ void m68000_device::sge_ds_ip() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131966,6 +132044,7 @@ void m68000_device::sge_ds_ip() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132024,6 +132103,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -132092,6 +132172,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -132126,12 +132207,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132164,12 +132245,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132204,6 +132285,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132266,7 +132348,6 @@ void m68000_device::sge_ais_ip() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132334,6 +132415,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132396,7 +132478,6 @@ void m68000_device::sge_aips_ip() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132464,6 +132545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132528,7 +132610,6 @@ void m68000_device::sge_pais_ip() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132596,6 +132677,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132679,7 +132761,6 @@ void m68000_device::sge_das_ip() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132747,6 +132828,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -132873,7 +132955,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132941,6 +133022,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133023,7 +133105,6 @@ void m68000_device::sge_adr16_ip() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133091,6 +133172,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133198,7 +133280,6 @@ void m68000_device::sge_adr32_ip() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133266,6 +133347,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -133299,7 +133381,6 @@ void m68000_device::slt_ds_ip() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133311,6 +133392,7 @@ void m68000_device::slt_ds_ip() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133369,6 +133451,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -133437,6 +133520,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -133471,12 +133555,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133509,12 +133593,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133549,6 +133633,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133611,7 +133696,6 @@ void m68000_device::slt_ais_ip() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133679,6 +133763,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133741,7 +133826,6 @@ void m68000_device::slt_aips_ip() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133809,6 +133893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133873,7 +133958,6 @@ void m68000_device::slt_pais_ip() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133941,6 +134025,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -134024,7 +134109,6 @@ void m68000_device::slt_das_ip() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134092,6 +134176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134218,7 +134303,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134286,6 +134370,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134368,7 +134453,6 @@ void m68000_device::slt_adr16_ip() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134436,6 +134520,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134543,7 +134628,6 @@ void m68000_device::slt_adr32_ip() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134611,6 +134695,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -134644,7 +134729,6 @@ void m68000_device::sgt_ds_ip() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134656,6 +134740,7 @@ void m68000_device::sgt_ds_ip() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134714,6 +134799,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -134782,6 +134868,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -134816,12 +134903,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134854,12 +134941,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134894,6 +134981,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134956,7 +135044,6 @@ void m68000_device::sgt_ais_ip() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135024,6 +135111,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135086,7 +135174,6 @@ void m68000_device::sgt_aips_ip() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135154,6 +135241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135218,7 +135306,6 @@ void m68000_device::sgt_pais_ip() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135286,6 +135373,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135369,7 +135457,6 @@ void m68000_device::sgt_das_ip() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135437,6 +135524,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135563,7 +135651,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135631,6 +135718,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135713,7 +135801,6 @@ void m68000_device::sgt_adr16_ip() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135781,6 +135868,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135888,7 +135976,6 @@ void m68000_device::sgt_adr32_ip() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135956,6 +136043,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -135989,7 +136077,6 @@ void m68000_device::sle_ds_ip() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136001,6 +136088,7 @@ void m68000_device::sle_ds_ip() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136059,6 +136147,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -136127,6 +136216,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -136161,12 +136251,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136199,12 +136289,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136239,6 +136329,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136301,7 +136392,6 @@ void m68000_device::sle_ais_ip() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136369,6 +136459,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136431,7 +136522,6 @@ void m68000_device::sle_aips_ip() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136499,6 +136589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136563,7 +136654,6 @@ void m68000_device::sle_pais_ip() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136631,6 +136721,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136714,7 +136805,6 @@ void m68000_device::sle_das_ip() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136782,6 +136872,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -136908,7 +136999,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136976,6 +137066,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137058,7 +137149,6 @@ void m68000_device::sle_adr16_ip() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137126,6 +137216,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137233,7 +137324,6 @@ void m68000_device::sle_adr32_ip() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137301,6 +137391,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -137341,6 +137432,7 @@ void m68000_device::bra_rel16_ip() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137404,11 +137496,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137454,6 +137546,7 @@ void m68000_device::bra_rel8_ip() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137490,11 +137583,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137612,11 +137705,11 @@ void m68000_device::bsr_rel16_ip() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137734,11 +137827,11 @@ void m68000_device::bsr_rel8_ip() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137784,6 +137877,7 @@ void m68000_device::bhi_rel16_ip() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137847,11 +137941,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137897,6 +137991,7 @@ void m68000_device::bhi_rel8_ip() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137933,11 +138028,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137983,6 +138078,7 @@ void m68000_device::bls_rel16_ip() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138046,11 +138142,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138096,6 +138192,7 @@ void m68000_device::bls_rel8_ip() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138132,11 +138229,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138182,6 +138279,7 @@ void m68000_device::bcc_rel16_ip() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138245,11 +138343,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138295,6 +138393,7 @@ void m68000_device::bcc_rel8_ip() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138331,11 +138430,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138381,6 +138480,7 @@ void m68000_device::bcs_rel16_ip() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138444,11 +138544,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138494,6 +138594,7 @@ void m68000_device::bcs_rel8_ip() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138530,11 +138631,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138580,6 +138681,7 @@ void m68000_device::bne_rel16_ip() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138643,11 +138745,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138693,6 +138795,7 @@ void m68000_device::bne_rel8_ip() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138729,11 +138832,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138779,6 +138882,7 @@ void m68000_device::beq_rel16_ip() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138842,11 +138946,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138892,6 +138996,7 @@ void m68000_device::beq_rel8_ip() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138928,11 +139033,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138978,6 +139083,7 @@ void m68000_device::bvc_rel16_ip() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139041,11 +139147,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139091,6 +139197,7 @@ void m68000_device::bvc_rel8_ip() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139127,11 +139234,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139177,6 +139284,7 @@ void m68000_device::bvs_rel16_ip() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139240,11 +139348,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139290,6 +139398,7 @@ void m68000_device::bvs_rel8_ip() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139326,11 +139435,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139376,6 +139485,7 @@ void m68000_device::bpl_rel16_ip() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139439,11 +139549,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139489,6 +139599,7 @@ void m68000_device::bpl_rel8_ip() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139525,11 +139636,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139575,6 +139686,7 @@ void m68000_device::bmi_rel16_ip() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139638,11 +139750,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139688,6 +139800,7 @@ void m68000_device::bmi_rel8_ip() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139724,11 +139837,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139774,6 +139887,7 @@ void m68000_device::bge_rel16_ip() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139837,11 +139951,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139887,6 +140001,7 @@ void m68000_device::bge_rel8_ip() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139923,11 +140038,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139973,6 +140088,7 @@ void m68000_device::blt_rel16_ip() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140036,11 +140152,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140086,6 +140202,7 @@ void m68000_device::blt_rel8_ip() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140122,11 +140239,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140172,6 +140289,7 @@ void m68000_device::bgt_rel16_ip() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140235,11 +140353,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140285,6 +140403,7 @@ void m68000_device::bgt_rel8_ip() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140321,11 +140440,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140371,6 +140490,7 @@ void m68000_device::ble_rel16_ip() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140434,11 +140554,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140484,6 +140604,7 @@ void m68000_device::ble_rel8_ip() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140520,11 +140641,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140563,7 +140684,6 @@ void m68000_device::moveq_imm8o_dd_ip() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -140572,6 +140692,7 @@ void m68000_device::moveq_imm8o_dd_ip() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140611,7 +140732,6 @@ void m68000_device::or_b_ds_dd_ip() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140619,6 +140739,7 @@ void m68000_device::or_b_ds_dd_ip() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140685,7 +140806,6 @@ void m68000_device::or_b_ais_dd_ip() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140693,6 +140813,7 @@ void m68000_device::or_b_ais_dd_ip() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140764,7 +140885,6 @@ void m68000_device::or_b_aips_dd_ip() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140772,6 +140892,7 @@ void m68000_device::or_b_aips_dd_ip() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140845,7 +140966,6 @@ void m68000_device::or_b_pais_dd_ip() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140853,6 +140973,7 @@ void m68000_device::or_b_pais_dd_ip() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140945,7 +141066,6 @@ void m68000_device::or_b_das_dd_ip() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140953,6 +141073,7 @@ void m68000_device::or_b_das_dd_ip() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141088,7 +141209,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141096,6 +141216,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141187,7 +141308,6 @@ void m68000_device::or_b_adr16_dd_ip() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141195,6 +141315,7 @@ void m68000_device::or_b_adr16_dd_ip() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141311,7 +141432,6 @@ void m68000_device::or_b_adr32_dd_ip() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141319,6 +141439,7 @@ void m68000_device::or_b_adr32_dd_ip() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141410,7 +141531,6 @@ void m68000_device::or_b_dpc_dd_ip() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141418,6 +141538,7 @@ void m68000_device::or_b_dpc_dd_ip() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141552,7 +141673,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141560,6 +141680,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141629,7 +141750,6 @@ void m68000_device::or_b_imm8_dd_ip() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141637,6 +141757,7 @@ void m68000_device::or_b_imm8_dd_ip() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141679,7 +141800,6 @@ void m68000_device::or_w_ds_dd_ip() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141687,6 +141807,7 @@ void m68000_device::or_w_ds_dd_ip() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141757,7 +141878,6 @@ void m68000_device::or_w_ais_dd_ip() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141765,6 +141885,7 @@ void m68000_device::or_w_ais_dd_ip() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141840,7 +141961,6 @@ void m68000_device::or_w_aips_dd_ip() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141848,6 +141968,7 @@ void m68000_device::or_w_aips_dd_ip() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141925,7 +142046,6 @@ void m68000_device::or_w_pais_dd_ip() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141933,6 +142053,7 @@ void m68000_device::or_w_pais_dd_ip() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142029,7 +142150,6 @@ void m68000_device::or_w_das_dd_ip() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142037,6 +142157,7 @@ void m68000_device::or_w_das_dd_ip() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142176,7 +142297,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142184,6 +142304,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142279,7 +142400,6 @@ void m68000_device::or_w_adr16_dd_ip() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142287,6 +142407,7 @@ void m68000_device::or_w_adr16_dd_ip() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142407,7 +142528,6 @@ void m68000_device::or_w_adr32_dd_ip() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142415,6 +142535,7 @@ void m68000_device::or_w_adr32_dd_ip() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142510,7 +142631,6 @@ void m68000_device::or_w_dpc_dd_ip() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142518,6 +142638,7 @@ void m68000_device::or_w_dpc_dd_ip() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142656,7 +142777,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142664,6 +142784,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142733,7 +142854,6 @@ void m68000_device::or_w_imm16_dd_ip() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142741,6 +142861,7 @@ void m68000_device::or_w_imm16_dd_ip() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142783,7 +142904,6 @@ void m68000_device::or_l_ds_dd_ip() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142820,6 +142940,7 @@ void m68000_device::or_l_ds_dd_ip() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -142894,7 +143015,6 @@ void m68000_device::or_l_ais_dd_ip() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142928,6 +143048,7 @@ void m68000_device::or_l_ais_dd_ip() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143006,7 +143127,6 @@ void m68000_device::or_l_aips_dd_ip() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143040,6 +143160,7 @@ void m68000_device::or_l_aips_dd_ip() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143119,7 +143240,6 @@ void m68000_device::or_l_pais_dd_ip() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143153,6 +143273,7 @@ void m68000_device::or_l_pais_dd_ip() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143252,7 +143373,6 @@ void m68000_device::or_l_das_dd_ip() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143286,6 +143406,7 @@ void m68000_device::or_l_das_dd_ip() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143428,7 +143549,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143462,6 +143582,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143564,7 +143685,6 @@ void m68000_device::or_l_adr16_dd_ip() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143598,6 +143718,7 @@ void m68000_device::or_l_adr16_dd_ip() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143725,7 +143846,6 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143759,6 +143879,7 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143857,7 +143978,6 @@ void m68000_device::or_l_dpc_dd_ip() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143891,6 +144011,7 @@ void m68000_device::or_l_dpc_dd_ip() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144032,7 +144153,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -144066,6 +144186,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144140,7 +144261,6 @@ void m68000_device::or_l_imm32_dd_ip() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -144177,6 +144297,7 @@ void m68000_device::or_l_imm32_dd_ip() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144396,11 +144517,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144432,10 +144553,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144549,7 +144670,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144559,7 +144679,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -144569,6 +144688,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144836,11 +144956,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144872,10 +144992,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144989,7 +145109,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144999,7 +145118,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145009,6 +145127,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145280,11 +145399,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145316,10 +145435,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145433,7 +145552,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145443,7 +145561,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145453,6 +145570,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145726,11 +145844,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145762,10 +145880,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145879,7 +145997,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145889,7 +146006,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145899,6 +146015,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146191,11 +146308,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146227,10 +146344,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146344,7 +146461,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146354,7 +146470,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146364,6 +146479,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146697,11 +146813,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146733,10 +146849,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146850,7 +146966,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146860,7 +146975,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146870,6 +146984,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147161,11 +147276,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147197,10 +147312,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147314,7 +147429,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147324,7 +147438,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147334,6 +147447,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147649,11 +147763,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147685,10 +147799,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147802,7 +147916,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147812,7 +147925,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147822,6 +147934,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148113,11 +148226,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148149,10 +148262,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148266,7 +148379,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148276,7 +148388,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148286,6 +148397,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148618,11 +148730,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148654,10 +148766,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148771,7 +148883,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148781,7 +148892,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148791,6 +148901,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149057,11 +149168,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149093,10 +149204,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149210,7 +149321,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -149220,7 +149330,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -149230,6 +149339,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149273,7 +149383,6 @@ void m68000_device::sbcd_ds_dd_ip() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149305,6 +149414,7 @@ void m68000_device::sbcd_ds_dd_ip() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -149355,7 +149465,6 @@ void m68000_device::sbcd_pais_paid_ip() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -149407,6 +149516,7 @@ void m68000_device::sbcd_pais_paid_ip() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149464,7 +149574,6 @@ void m68000_device::or_b_dd_ais_ip() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149494,6 +149603,7 @@ void m68000_device::or_b_dd_ais_ip() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149557,7 +149667,6 @@ void m68000_device::or_b_dd_aips_ip() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149587,6 +149696,7 @@ void m68000_device::or_b_dd_aips_ip() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149652,7 +149762,6 @@ void m68000_device::or_b_dd_pais_ip() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149682,6 +149791,7 @@ void m68000_device::or_b_dd_pais_ip() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149766,7 +149876,6 @@ void m68000_device::or_b_dd_das_ip() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149796,6 +149905,7 @@ void m68000_device::or_b_dd_das_ip() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149923,7 +150033,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149953,6 +150062,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150036,7 +150146,6 @@ void m68000_device::or_b_dd_adr16_ip() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150066,6 +150175,7 @@ void m68000_device::or_b_dd_adr16_ip() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150174,7 +150284,6 @@ void m68000_device::or_b_dd_adr32_ip() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150204,6 +150313,7 @@ void m68000_device::or_b_dd_adr32_ip() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -150266,7 +150376,6 @@ void m68000_device::or_w_dd_ais_ip() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150296,6 +150405,7 @@ void m68000_device::or_w_dd_ais_ip() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150369,7 +150479,6 @@ void m68000_device::or_w_dd_aips_ip() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150399,6 +150508,7 @@ void m68000_device::or_w_dd_aips_ip() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150474,7 +150584,6 @@ void m68000_device::or_w_dd_pais_ip() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150504,6 +150613,7 @@ void m68000_device::or_w_dd_pais_ip() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150598,7 +150708,6 @@ void m68000_device::or_w_dd_das_ip() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150628,6 +150737,7 @@ void m68000_device::or_w_dd_das_ip() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150765,7 +150875,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150795,6 +150904,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150888,7 +150998,6 @@ void m68000_device::or_w_dd_adr16_ip() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150918,6 +151027,7 @@ void m68000_device::or_w_dd_adr16_ip() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -151036,7 +151146,6 @@ void m68000_device::or_w_dd_adr32_ip() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151066,6 +151175,7 @@ void m68000_device::or_w_dd_adr32_ip() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151158,7 +151268,6 @@ void m68000_device::or_l_dd_ais_ip() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151214,6 +151323,7 @@ void m68000_device::or_l_dd_ais_ip() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151310,7 +151420,6 @@ void m68000_device::or_l_dd_aips_ip() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151366,6 +151475,7 @@ void m68000_device::or_l_dd_aips_ip() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151463,7 +151573,6 @@ void m68000_device::or_l_dd_pais_ip() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151519,6 +151628,7 @@ void m68000_device::or_l_dd_pais_ip() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151636,7 +151746,6 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151692,6 +151801,7 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -151852,7 +151962,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151908,6 +152017,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152028,7 +152138,6 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152084,6 +152193,7 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152229,7 +152339,6 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152285,6 +152394,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -152530,11 +152640,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152607,7 +152717,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -152620,6 +152729,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152751,7 +152861,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -152782,7 +152891,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -152814,6 +152922,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152847,14 +152956,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153105,11 +153212,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153182,7 +153289,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153195,6 +153301,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153326,7 +153433,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153357,7 +153463,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153389,6 +153494,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153422,14 +153528,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153684,11 +153788,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153761,7 +153865,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153774,6 +153877,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153905,7 +154009,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153936,7 +154039,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153968,6 +154070,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154001,14 +154104,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154265,11 +154366,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154342,7 +154443,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154355,6 +154455,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154486,7 +154587,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -154517,7 +154617,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -154549,6 +154648,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154582,14 +154682,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154865,11 +154963,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154942,7 +155040,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154955,6 +155052,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155086,7 +155184,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155117,7 +155214,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155149,6 +155245,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155182,14 +155279,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -155506,11 +155601,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155583,7 +155678,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -155596,6 +155690,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155727,7 +155822,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155758,7 +155852,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155790,6 +155883,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155823,14 +155917,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156105,11 +156197,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156182,7 +156274,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156195,6 +156286,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156326,7 +156418,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156357,7 +156448,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -156389,6 +156479,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156422,14 +156513,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156728,11 +156817,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156805,7 +156894,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156818,6 +156906,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156949,7 +157038,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156980,7 +157068,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157012,6 +157099,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157045,14 +157133,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157327,11 +157413,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157404,7 +157490,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -157417,6 +157502,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157548,7 +157634,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -157579,7 +157664,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157611,6 +157695,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157644,14 +157729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157967,11 +158050,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158044,7 +158127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158057,6 +158139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158188,7 +158271,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158219,7 +158301,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158251,6 +158332,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158284,14 +158366,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158541,11 +158621,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158618,7 +158698,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158631,6 +158710,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158762,7 +158842,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158793,7 +158872,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158825,6 +158903,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158858,14 +158937,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158884,7 +158961,6 @@ void m68000_device::sub_b_ds_dd_ip() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158892,6 +158968,7 @@ void m68000_device::sub_b_ds_dd_ip() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158956,7 +159033,6 @@ void m68000_device::sub_b_ais_dd_ip() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158964,6 +159040,7 @@ void m68000_device::sub_b_ais_dd_ip() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159032,7 +159109,6 @@ void m68000_device::sub_b_aips_dd_ip() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159040,6 +159116,7 @@ void m68000_device::sub_b_aips_dd_ip() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159110,7 +159187,6 @@ void m68000_device::sub_b_pais_dd_ip() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159118,6 +159194,7 @@ void m68000_device::sub_b_pais_dd_ip() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159207,7 +159284,6 @@ void m68000_device::sub_b_das_dd_ip() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159215,6 +159291,7 @@ void m68000_device::sub_b_das_dd_ip() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159345,7 +159422,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159353,6 +159429,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159441,7 +159518,6 @@ void m68000_device::sub_b_adr16_dd_ip() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159449,6 +159525,7 @@ void m68000_device::sub_b_adr16_dd_ip() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159561,7 +159638,6 @@ void m68000_device::sub_b_adr32_dd_ip() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159569,6 +159645,7 @@ void m68000_device::sub_b_adr32_dd_ip() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159657,7 +159734,6 @@ void m68000_device::sub_b_dpc_dd_ip() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159665,6 +159741,7 @@ void m68000_device::sub_b_dpc_dd_ip() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159794,7 +159871,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159802,6 +159878,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159869,7 +159946,6 @@ void m68000_device::sub_b_imm8_dd_ip() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -159877,6 +159953,7 @@ void m68000_device::sub_b_imm8_dd_ip() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159918,7 +159995,6 @@ void m68000_device::sub_w_ds_dd_ip() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159926,6 +160002,7 @@ void m68000_device::sub_w_ds_dd_ip() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159967,7 +160044,6 @@ void m68000_device::sub_w_as_dd_ip() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -159975,6 +160051,7 @@ void m68000_device::sub_w_as_dd_ip() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160043,7 +160120,6 @@ void m68000_device::sub_w_ais_dd_ip() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160051,6 +160127,7 @@ void m68000_device::sub_w_ais_dd_ip() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160123,7 +160200,6 @@ void m68000_device::sub_w_aips_dd_ip() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160131,6 +160207,7 @@ void m68000_device::sub_w_aips_dd_ip() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160205,7 +160282,6 @@ void m68000_device::sub_w_pais_dd_ip() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160213,6 +160289,7 @@ void m68000_device::sub_w_pais_dd_ip() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160306,7 +160383,6 @@ void m68000_device::sub_w_das_dd_ip() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160314,6 +160390,7 @@ void m68000_device::sub_w_das_dd_ip() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160448,7 +160525,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160456,6 +160532,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160548,7 +160625,6 @@ void m68000_device::sub_w_adr16_dd_ip() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160556,6 +160632,7 @@ void m68000_device::sub_w_adr16_dd_ip() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160672,7 +160749,6 @@ void m68000_device::sub_w_adr32_dd_ip() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160680,6 +160756,7 @@ void m68000_device::sub_w_adr32_dd_ip() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160772,7 +160849,6 @@ void m68000_device::sub_w_dpc_dd_ip() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160780,6 +160856,7 @@ void m68000_device::sub_w_dpc_dd_ip() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160913,7 +160990,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160921,6 +160997,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160988,7 +161065,6 @@ void m68000_device::sub_w_imm16_dd_ip() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160996,6 +161072,7 @@ void m68000_device::sub_w_imm16_dd_ip() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -161037,7 +161114,6 @@ void m68000_device::sub_l_ds_dd_ip() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161073,6 +161149,7 @@ void m68000_device::sub_l_ds_dd_ip() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161094,7 +161171,6 @@ void m68000_device::sub_l_as_dd_ip() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -161130,6 +161206,7 @@ void m68000_device::sub_l_as_dd_ip() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161202,7 +161279,6 @@ void m68000_device::sub_l_ais_dd_ip() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161236,6 +161312,7 @@ void m68000_device::sub_l_ais_dd_ip() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161311,7 +161388,6 @@ void m68000_device::sub_l_aips_dd_ip() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161345,6 +161421,7 @@ void m68000_device::sub_l_aips_dd_ip() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161421,7 +161498,6 @@ void m68000_device::sub_l_pais_dd_ip() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161455,6 +161531,7 @@ void m68000_device::sub_l_pais_dd_ip() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161551,7 +161628,6 @@ void m68000_device::sub_l_das_dd_ip() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161585,6 +161661,7 @@ void m68000_device::sub_l_das_dd_ip() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161722,7 +161799,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161756,6 +161832,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161854,7 +161931,6 @@ void m68000_device::sub_l_adr16_dd_ip() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161888,6 +161964,7 @@ void m68000_device::sub_l_adr16_dd_ip() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162010,7 +162087,6 @@ void m68000_device::sub_l_adr32_dd_ip() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162044,6 +162120,7 @@ void m68000_device::sub_l_adr32_dd_ip() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162139,7 +162216,6 @@ void m68000_device::sub_l_dpc_dd_ip() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162173,6 +162249,7 @@ void m68000_device::sub_l_dpc_dd_ip() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162309,7 +162386,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162343,6 +162419,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162414,7 +162491,6 @@ void m68000_device::sub_l_imm32_dd_ip() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -162450,6 +162526,7 @@ void m68000_device::sub_l_imm32_dd_ip() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162471,7 +162548,6 @@ void m68000_device::suba_w_ds_ad_ip() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -162505,6 +162581,7 @@ void m68000_device::suba_w_ds_ad_ip() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162526,7 +162603,6 @@ void m68000_device::suba_w_as_ad_ip() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -162560,6 +162636,7 @@ void m68000_device::suba_w_as_ad_ip() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162608,7 +162685,6 @@ void m68000_device::suba_w_ais_ad_ip() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162642,6 +162718,7 @@ void m68000_device::suba_w_ais_ad_ip() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162694,7 +162771,6 @@ void m68000_device::suba_w_aips_ad_ip() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162728,6 +162804,7 @@ void m68000_device::suba_w_aips_ad_ip() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162782,7 +162859,6 @@ void m68000_device::suba_w_pais_ad_ip() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162816,6 +162892,7 @@ void m68000_device::suba_w_pais_ad_ip() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162889,7 +162966,6 @@ void m68000_device::suba_w_das_ad_ip() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162923,6 +162999,7 @@ void m68000_device::suba_w_das_ad_ip() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163037,7 +163114,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163071,6 +163147,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163143,7 +163220,6 @@ void m68000_device::suba_w_adr16_ad_ip() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163177,6 +163253,7 @@ void m68000_device::suba_w_adr16_ad_ip() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163273,7 +163350,6 @@ void m68000_device::suba_w_adr32_ad_ip() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163307,6 +163383,7 @@ void m68000_device::suba_w_adr32_ad_ip() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163379,7 +163456,6 @@ void m68000_device::suba_w_dpc_ad_ip() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163413,6 +163489,7 @@ void m68000_device::suba_w_dpc_ad_ip() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163526,7 +163603,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163560,6 +163636,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163607,7 +163684,6 @@ void m68000_device::suba_w_imm16_ad_ip() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -163641,6 +163717,7 @@ void m68000_device::suba_w_imm16_ad_ip() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163662,7 +163739,6 @@ void m68000_device::subx_b_ds_dd_ip() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -163670,6 +163746,7 @@ void m68000_device::subx_b_ds_dd_ip() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -163740,7 +163817,6 @@ void m68000_device::subx_b_pais_paid_ip() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -163790,6 +163866,7 @@ void m68000_device::subx_b_pais_paid_ip() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -163846,7 +163923,6 @@ void m68000_device::sub_b_dd_ais_ip() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -163876,6 +163952,7 @@ void m68000_device::sub_b_dd_ais_ip() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -163936,7 +164013,6 @@ void m68000_device::sub_b_dd_aips_ip() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -163966,6 +164042,7 @@ void m68000_device::sub_b_dd_aips_ip() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164028,7 +164105,6 @@ void m68000_device::sub_b_dd_pais_ip() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164058,6 +164134,7 @@ void m68000_device::sub_b_dd_pais_ip() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164139,7 +164216,6 @@ void m68000_device::sub_b_dd_das_ip() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164169,6 +164245,7 @@ void m68000_device::sub_b_dd_das_ip() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164291,7 +164368,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164321,6 +164397,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164401,7 +164478,6 @@ void m68000_device::sub_b_dd_adr16_ip() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164431,6 +164507,7 @@ void m68000_device::sub_b_dd_adr16_ip() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164535,7 +164612,6 @@ void m68000_device::sub_b_dd_adr32_ip() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164565,6 +164641,7 @@ void m68000_device::sub_b_dd_adr32_ip() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -164598,7 +164675,6 @@ void m68000_device::subx_w_ds_dd_ip() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -164606,6 +164682,7 @@ void m68000_device::subx_w_ds_dd_ip() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164680,7 +164757,6 @@ void m68000_device::subx_w_pais_paid_ip() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -164734,6 +164810,7 @@ void m68000_device::subx_w_pais_paid_ip() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164800,7 +164877,6 @@ void m68000_device::sub_w_dd_ais_ip() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164830,6 +164906,7 @@ void m68000_device::sub_w_dd_ais_ip() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164900,7 +164977,6 @@ void m68000_device::sub_w_dd_aips_ip() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164930,6 +165006,7 @@ void m68000_device::sub_w_dd_aips_ip() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165002,7 +165079,6 @@ void m68000_device::sub_w_dd_pais_ip() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165032,6 +165108,7 @@ void m68000_device::sub_w_dd_pais_ip() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165123,7 +165200,6 @@ void m68000_device::sub_w_dd_das_ip() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165153,6 +165229,7 @@ void m68000_device::sub_w_dd_das_ip() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165285,7 +165362,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165315,6 +165391,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165405,7 +165482,6 @@ void m68000_device::sub_w_dd_adr16_ip() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165435,6 +165511,7 @@ void m68000_device::sub_w_dd_adr16_ip() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165549,7 +165626,6 @@ void m68000_device::sub_w_dd_adr32_ip() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165579,6 +165655,7 @@ void m68000_device::sub_w_dd_adr32_ip() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165618,7 +165695,6 @@ void m68000_device::subx_l_ds_dd_ip() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165654,6 +165730,7 @@ void m68000_device::subx_l_ds_dd_ip() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -165784,7 +165861,6 @@ void m68000_device::subx_l_pais_paid_ip() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165836,6 +165912,7 @@ void m68000_device::subx_l_pais_paid_ip() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -165926,7 +166003,6 @@ void m68000_device::sub_l_dd_ais_ip() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165982,6 +166058,7 @@ void m68000_device::sub_l_dd_ais_ip() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166075,7 +166152,6 @@ void m68000_device::sub_l_dd_aips_ip() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166131,6 +166207,7 @@ void m68000_device::sub_l_dd_aips_ip() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166225,7 +166302,6 @@ void m68000_device::sub_l_dd_pais_ip() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166281,6 +166357,7 @@ void m68000_device::sub_l_dd_pais_ip() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166395,7 +166472,6 @@ void m68000_device::sub_l_dd_das_ip() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166451,6 +166527,7 @@ void m68000_device::sub_l_dd_das_ip() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166606,7 +166683,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166662,6 +166738,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166778,7 +166855,6 @@ void m68000_device::sub_l_dd_adr16_ip() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166834,6 +166910,7 @@ void m68000_device::sub_l_dd_adr16_ip() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166974,7 +167051,6 @@ void m68000_device::sub_l_dd_adr32_ip() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -167030,6 +167106,7 @@ void m68000_device::sub_l_dd_adr32_ip() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -167069,7 +167146,6 @@ void m68000_device::suba_l_ds_ad_ip() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -167103,6 +167179,7 @@ void m68000_device::suba_l_ds_ad_ip() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167124,7 +167201,6 @@ void m68000_device::suba_l_as_ad_ip() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -167158,6 +167234,7 @@ void m68000_device::suba_l_as_ad_ip() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167230,7 +167307,6 @@ void m68000_device::suba_l_ais_ad_ip() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167262,6 +167338,7 @@ void m68000_device::suba_l_ais_ad_ip() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167337,7 +167414,6 @@ void m68000_device::suba_l_aips_ad_ip() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167369,6 +167445,7 @@ void m68000_device::suba_l_aips_ad_ip() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167445,7 +167522,6 @@ void m68000_device::suba_l_pais_ad_ip() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167477,6 +167553,7 @@ void m68000_device::suba_l_pais_ad_ip() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167573,7 +167650,6 @@ void m68000_device::suba_l_das_ad_ip() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167605,6 +167681,7 @@ void m68000_device::suba_l_das_ad_ip() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167742,7 +167819,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167774,6 +167850,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167872,7 +167949,6 @@ void m68000_device::suba_l_adr16_ad_ip() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167904,6 +167980,7 @@ void m68000_device::suba_l_adr16_ad_ip() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168026,7 +168103,6 @@ void m68000_device::suba_l_adr32_ad_ip() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168058,6 +168134,7 @@ void m68000_device::suba_l_adr32_ad_ip() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168153,7 +168230,6 @@ void m68000_device::suba_l_dpc_ad_ip() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168185,6 +168261,7 @@ void m68000_device::suba_l_dpc_ad_ip() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168321,7 +168398,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168353,6 +168429,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168424,7 +168501,6 @@ void m68000_device::suba_l_imm32_ad_ip() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -168458,6 +168534,7 @@ void m68000_device::suba_l_imm32_ad_ip() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168479,7 +168556,6 @@ void m68000_device::cmp_b_ds_dd_ip() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -168487,6 +168563,7 @@ void m68000_device::cmp_b_ds_dd_ip() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168550,7 +168627,6 @@ void m68000_device::cmp_b_ais_dd_ip() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168558,6 +168634,7 @@ void m68000_device::cmp_b_ais_dd_ip() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168625,7 +168702,6 @@ void m68000_device::cmp_b_aips_dd_ip() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168633,6 +168709,7 @@ void m68000_device::cmp_b_aips_dd_ip() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168702,7 +168779,6 @@ void m68000_device::cmp_b_pais_dd_ip() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168710,6 +168786,7 @@ void m68000_device::cmp_b_pais_dd_ip() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168798,7 +168875,6 @@ void m68000_device::cmp_b_das_dd_ip() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168806,6 +168882,7 @@ void m68000_device::cmp_b_das_dd_ip() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168935,7 +169012,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168943,6 +169019,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169030,7 +169107,6 @@ void m68000_device::cmp_b_adr16_dd_ip() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169038,6 +169114,7 @@ void m68000_device::cmp_b_adr16_dd_ip() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169149,7 +169226,6 @@ void m68000_device::cmp_b_adr32_dd_ip() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169157,6 +169233,7 @@ void m68000_device::cmp_b_adr32_dd_ip() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169244,7 +169321,6 @@ void m68000_device::cmp_b_dpc_dd_ip() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169252,6 +169328,7 @@ void m68000_device::cmp_b_dpc_dd_ip() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169380,7 +169457,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169388,6 +169464,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169454,7 +169531,6 @@ void m68000_device::cmp_b_imm8_dd_ip() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -169462,6 +169538,7 @@ void m68000_device::cmp_b_imm8_dd_ip() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169502,7 +169579,6 @@ void m68000_device::cmp_w_ds_dd_ip() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -169510,6 +169586,7 @@ void m68000_device::cmp_w_ds_dd_ip() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169550,7 +169627,6 @@ void m68000_device::cmp_w_as_dd_ip() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -169558,6 +169634,7 @@ void m68000_device::cmp_w_as_dd_ip() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169625,7 +169702,6 @@ void m68000_device::cmp_w_ais_dd_ip() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169633,6 +169709,7 @@ void m68000_device::cmp_w_ais_dd_ip() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169704,7 +169781,6 @@ void m68000_device::cmp_w_aips_dd_ip() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169712,6 +169788,7 @@ void m68000_device::cmp_w_aips_dd_ip() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169785,7 +169862,6 @@ void m68000_device::cmp_w_pais_dd_ip() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169793,6 +169869,7 @@ void m68000_device::cmp_w_pais_dd_ip() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169885,7 +169962,6 @@ void m68000_device::cmp_w_das_dd_ip() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169893,6 +169969,7 @@ void m68000_device::cmp_w_das_dd_ip() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170026,7 +170103,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170034,6 +170110,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170125,7 +170202,6 @@ void m68000_device::cmp_w_adr16_dd_ip() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170133,6 +170209,7 @@ void m68000_device::cmp_w_adr16_dd_ip() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170248,7 +170325,6 @@ void m68000_device::cmp_w_adr32_dd_ip() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170256,6 +170332,7 @@ void m68000_device::cmp_w_adr32_dd_ip() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170347,7 +170424,6 @@ void m68000_device::cmp_w_dpc_dd_ip() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170355,6 +170431,7 @@ void m68000_device::cmp_w_dpc_dd_ip() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170487,7 +170564,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170495,6 +170571,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170561,7 +170638,6 @@ void m68000_device::cmp_w_imm16_dd_ip() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -170569,6 +170645,7 @@ void m68000_device::cmp_w_imm16_dd_ip() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170609,7 +170686,6 @@ void m68000_device::cmp_l_ds_dd_ip() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170642,6 +170718,7 @@ void m68000_device::cmp_l_ds_dd_ip() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170662,7 +170739,6 @@ void m68000_device::cmp_l_as_dd_ip() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -170695,6 +170771,7 @@ void m68000_device::cmp_l_as_dd_ip() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170766,7 +170843,6 @@ void m68000_device::cmp_l_ais_dd_ip() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170799,6 +170875,7 @@ void m68000_device::cmp_l_ais_dd_ip() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170873,7 +170950,6 @@ void m68000_device::cmp_l_aips_dd_ip() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170906,6 +170982,7 @@ void m68000_device::cmp_l_aips_dd_ip() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170981,7 +171058,6 @@ void m68000_device::cmp_l_pais_dd_ip() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171014,6 +171090,7 @@ void m68000_device::cmp_l_pais_dd_ip() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171109,7 +171186,6 @@ void m68000_device::cmp_l_das_dd_ip() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171142,6 +171218,7 @@ void m68000_device::cmp_l_das_dd_ip() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171278,7 +171355,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171311,6 +171387,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171408,7 +171485,6 @@ void m68000_device::cmp_l_adr16_dd_ip() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171441,6 +171517,7 @@ void m68000_device::cmp_l_adr16_dd_ip() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171562,7 +171639,6 @@ void m68000_device::cmp_l_adr32_dd_ip() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171595,6 +171671,7 @@ void m68000_device::cmp_l_adr32_dd_ip() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171689,7 +171766,6 @@ void m68000_device::cmp_l_dpc_dd_ip() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171722,6 +171798,7 @@ void m68000_device::cmp_l_dpc_dd_ip() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171857,7 +171934,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171890,6 +171966,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171960,7 +172037,6 @@ void m68000_device::cmp_l_imm32_dd_ip() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -171993,6 +172069,7 @@ void m68000_device::cmp_l_imm32_dd_ip() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172013,7 +172090,6 @@ void m68000_device::cmpa_w_ds_ad_ip() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -172046,6 +172122,7 @@ void m68000_device::cmpa_w_ds_ad_ip() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172066,7 +172143,6 @@ void m68000_device::cmpa_w_as_ad_ip() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -172099,6 +172175,7 @@ void m68000_device::cmpa_w_as_ad_ip() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172146,7 +172223,6 @@ void m68000_device::cmpa_w_ais_ad_ip() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172179,6 +172255,7 @@ void m68000_device::cmpa_w_ais_ad_ip() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172230,7 +172307,6 @@ void m68000_device::cmpa_w_aips_ad_ip() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172263,6 +172339,7 @@ void m68000_device::cmpa_w_aips_ad_ip() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172316,7 +172393,6 @@ void m68000_device::cmpa_w_pais_ad_ip() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172349,6 +172425,7 @@ void m68000_device::cmpa_w_pais_ad_ip() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172421,7 +172498,6 @@ void m68000_device::cmpa_w_das_ad_ip() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172454,6 +172530,7 @@ void m68000_device::cmpa_w_das_ad_ip() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172567,7 +172644,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172600,6 +172676,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172671,7 +172748,6 @@ void m68000_device::cmpa_w_adr16_ad_ip() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172704,6 +172780,7 @@ void m68000_device::cmpa_w_adr16_ad_ip() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172799,7 +172876,6 @@ void m68000_device::cmpa_w_adr32_ad_ip() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172832,6 +172908,7 @@ void m68000_device::cmpa_w_adr32_ad_ip() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172903,7 +172980,6 @@ void m68000_device::cmpa_w_dpc_ad_ip() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172936,6 +173012,7 @@ void m68000_device::cmpa_w_dpc_ad_ip() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173048,7 +173125,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173081,6 +173157,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173127,7 +173204,6 @@ void m68000_device::cmpa_w_imm16_ad_ip() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -173160,6 +173236,7 @@ void m68000_device::cmpa_w_imm16_ad_ip() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173180,13 +173257,13 @@ void m68000_device::eor_b_dd_ds_ip() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173253,7 +173330,6 @@ void m68000_device::cmpm_b_aips_aipd_ip() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -173276,6 +173352,7 @@ void m68000_device::cmpm_b_aips_aipd_ip() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173344,7 +173421,6 @@ void m68000_device::eor_b_dd_ais_ip() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173374,6 +173450,7 @@ void m68000_device::eor_b_dd_ais_ip() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173437,7 +173514,6 @@ void m68000_device::eor_b_dd_aips_ip() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173467,6 +173543,7 @@ void m68000_device::eor_b_dd_aips_ip() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173532,7 +173609,6 @@ void m68000_device::eor_b_dd_pais_ip() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173562,6 +173638,7 @@ void m68000_device::eor_b_dd_pais_ip() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173646,7 +173723,6 @@ void m68000_device::eor_b_dd_das_ip() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173676,6 +173752,7 @@ void m68000_device::eor_b_dd_das_ip() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173803,7 +173880,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173833,6 +173909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173916,7 +173993,6 @@ void m68000_device::eor_b_dd_adr16_ip() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173946,6 +174022,7 @@ void m68000_device::eor_b_dd_adr16_ip() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174054,7 +174131,6 @@ void m68000_device::eor_b_dd_adr32_ip() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174084,6 +174160,7 @@ void m68000_device::eor_b_dd_adr32_ip() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -174118,13 +174195,13 @@ void m68000_device::eor_w_dd_ds_ip() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174195,7 +174272,6 @@ void m68000_device::cmpm_w_aips_aipd_ip() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -174222,6 +174298,7 @@ void m68000_device::cmpm_w_aips_aipd_ip() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174294,7 +174371,6 @@ void m68000_device::eor_w_dd_ais_ip() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174324,6 +174400,7 @@ void m68000_device::eor_w_dd_ais_ip() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174397,7 +174474,6 @@ void m68000_device::eor_w_dd_aips_ip() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174427,6 +174503,7 @@ void m68000_device::eor_w_dd_aips_ip() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174502,7 +174579,6 @@ void m68000_device::eor_w_dd_pais_ip() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174532,6 +174608,7 @@ void m68000_device::eor_w_dd_pais_ip() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174626,7 +174703,6 @@ void m68000_device::eor_w_dd_das_ip() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174656,6 +174732,7 @@ void m68000_device::eor_w_dd_das_ip() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174793,7 +174870,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174823,6 +174899,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174916,7 +174993,6 @@ void m68000_device::eor_w_dd_adr16_ip() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174946,6 +175022,7 @@ void m68000_device::eor_w_dd_adr16_ip() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -175064,7 +175141,6 @@ void m68000_device::eor_w_dd_adr32_ip() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175094,6 +175170,7 @@ void m68000_device::eor_w_dd_adr32_ip() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175134,7 +175211,6 @@ void m68000_device::eor_l_dd_ds_ip() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -175170,6 +175246,7 @@ void m68000_device::eor_l_dd_ds_ip() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -175244,7 +175321,6 @@ void m68000_device::cmpm_l_aips_aipd_ip() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -175301,6 +175377,7 @@ void m68000_device::cmpm_l_aips_aipd_ip() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175395,7 +175472,6 @@ void m68000_device::eor_l_dd_ais_ip() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175451,6 +175527,7 @@ void m68000_device::eor_l_dd_ais_ip() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175547,7 +175624,6 @@ void m68000_device::eor_l_dd_aips_ip() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175603,6 +175679,7 @@ void m68000_device::eor_l_dd_aips_ip() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175700,7 +175777,6 @@ void m68000_device::eor_l_dd_pais_ip() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175756,6 +175832,7 @@ void m68000_device::eor_l_dd_pais_ip() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175873,7 +175950,6 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175929,6 +176005,7 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176089,7 +176166,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -176145,6 +176221,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176265,7 +176342,6 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -176321,6 +176397,7 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176466,7 +176543,6 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -176522,6 +176598,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -176562,7 +176639,6 @@ void m68000_device::cmpa_l_ds_ad_ip() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -176595,6 +176671,7 @@ void m68000_device::cmpa_l_ds_ad_ip() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176615,7 +176692,6 @@ void m68000_device::cmpa_l_as_ad_ip() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -176648,6 +176724,7 @@ void m68000_device::cmpa_l_as_ad_ip() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176719,7 +176796,6 @@ void m68000_device::cmpa_l_ais_ad_ip() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176752,6 +176828,7 @@ void m68000_device::cmpa_l_ais_ad_ip() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176826,7 +176903,6 @@ void m68000_device::cmpa_l_aips_ad_ip() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176859,6 +176935,7 @@ void m68000_device::cmpa_l_aips_ad_ip() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176934,7 +177011,6 @@ void m68000_device::cmpa_l_pais_ad_ip() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176967,6 +177043,7 @@ void m68000_device::cmpa_l_pais_ad_ip() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177062,7 +177139,6 @@ void m68000_device::cmpa_l_das_ad_ip() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177095,6 +177171,7 @@ void m68000_device::cmpa_l_das_ad_ip() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177231,7 +177308,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177264,6 +177340,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177361,7 +177438,6 @@ void m68000_device::cmpa_l_adr16_ad_ip() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177394,6 +177470,7 @@ void m68000_device::cmpa_l_adr16_ad_ip() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177515,7 +177592,6 @@ void m68000_device::cmpa_l_adr32_ad_ip() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177548,6 +177624,7 @@ void m68000_device::cmpa_l_adr32_ad_ip() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177642,7 +177719,6 @@ void m68000_device::cmpa_l_dpc_ad_ip() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177675,6 +177751,7 @@ void m68000_device::cmpa_l_dpc_ad_ip() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177810,7 +177887,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177843,6 +177919,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177913,7 +177990,6 @@ void m68000_device::cmpa_l_imm32_ad_ip() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -177946,6 +178022,7 @@ void m68000_device::cmpa_l_imm32_ad_ip() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177966,7 +178043,6 @@ void m68000_device::and_b_ds_dd_ip() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -177974,6 +178050,7 @@ void m68000_device::and_b_ds_dd_ip() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178040,7 +178117,6 @@ void m68000_device::and_b_ais_dd_ip() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178048,6 +178124,7 @@ void m68000_device::and_b_ais_dd_ip() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178119,7 +178196,6 @@ void m68000_device::and_b_aips_dd_ip() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178127,6 +178203,7 @@ void m68000_device::and_b_aips_dd_ip() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178200,7 +178277,6 @@ void m68000_device::and_b_pais_dd_ip() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178208,6 +178284,7 @@ void m68000_device::and_b_pais_dd_ip() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178300,7 +178377,6 @@ void m68000_device::and_b_das_dd_ip() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178308,6 +178384,7 @@ void m68000_device::and_b_das_dd_ip() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178443,7 +178520,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178451,6 +178527,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178542,7 +178619,6 @@ void m68000_device::and_b_adr16_dd_ip() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178550,6 +178626,7 @@ void m68000_device::and_b_adr16_dd_ip() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178666,7 +178743,6 @@ void m68000_device::and_b_adr32_dd_ip() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178674,6 +178750,7 @@ void m68000_device::and_b_adr32_dd_ip() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178765,7 +178842,6 @@ void m68000_device::and_b_dpc_dd_ip() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178773,6 +178849,7 @@ void m68000_device::and_b_dpc_dd_ip() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178907,7 +178984,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178915,6 +178991,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178984,7 +179061,6 @@ void m68000_device::and_b_imm8_dd_ip() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -178992,6 +179068,7 @@ void m68000_device::and_b_imm8_dd_ip() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179034,7 +179111,6 @@ void m68000_device::and_w_ds_dd_ip() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -179042,6 +179118,7 @@ void m68000_device::and_w_ds_dd_ip() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179112,7 +179189,6 @@ void m68000_device::and_w_ais_dd_ip() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179120,6 +179196,7 @@ void m68000_device::and_w_ais_dd_ip() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179195,7 +179272,6 @@ void m68000_device::and_w_aips_dd_ip() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179203,6 +179279,7 @@ void m68000_device::and_w_aips_dd_ip() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179280,7 +179357,6 @@ void m68000_device::and_w_pais_dd_ip() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179288,6 +179364,7 @@ void m68000_device::and_w_pais_dd_ip() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179384,7 +179461,6 @@ void m68000_device::and_w_das_dd_ip() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179392,6 +179468,7 @@ void m68000_device::and_w_das_dd_ip() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179531,7 +179608,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179539,6 +179615,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179634,7 +179711,6 @@ void m68000_device::and_w_adr16_dd_ip() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179642,6 +179718,7 @@ void m68000_device::and_w_adr16_dd_ip() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179762,7 +179839,6 @@ void m68000_device::and_w_adr32_dd_ip() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179770,6 +179846,7 @@ void m68000_device::and_w_adr32_dd_ip() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179865,7 +179942,6 @@ void m68000_device::and_w_dpc_dd_ip() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179873,6 +179949,7 @@ void m68000_device::and_w_dpc_dd_ip() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -180011,7 +180088,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180019,6 +180095,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -180088,7 +180165,6 @@ void m68000_device::and_w_imm16_dd_ip() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -180096,6 +180172,7 @@ void m68000_device::and_w_imm16_dd_ip() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -180138,7 +180215,6 @@ void m68000_device::and_l_ds_dd_ip() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -180175,6 +180251,7 @@ void m68000_device::and_l_ds_dd_ip() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180249,7 +180326,6 @@ void m68000_device::and_l_ais_dd_ip() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180283,6 +180359,7 @@ void m68000_device::and_l_ais_dd_ip() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180361,7 +180438,6 @@ void m68000_device::and_l_aips_dd_ip() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180395,6 +180471,7 @@ void m68000_device::and_l_aips_dd_ip() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180474,7 +180551,6 @@ void m68000_device::and_l_pais_dd_ip() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180508,6 +180584,7 @@ void m68000_device::and_l_pais_dd_ip() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180607,7 +180684,6 @@ void m68000_device::and_l_das_dd_ip() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180641,6 +180717,7 @@ void m68000_device::and_l_das_dd_ip() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180783,7 +180860,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180817,6 +180893,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180919,7 +180996,6 @@ void m68000_device::and_l_adr16_dd_ip() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180953,6 +181029,7 @@ void m68000_device::and_l_adr16_dd_ip() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181080,7 +181157,6 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181114,6 +181190,7 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181212,7 +181289,6 @@ void m68000_device::and_l_dpc_dd_ip() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181246,6 +181322,7 @@ void m68000_device::and_l_dpc_dd_ip() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181387,7 +181464,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181421,6 +181497,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181495,7 +181572,6 @@ void m68000_device::and_l_imm32_dd_ip() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -181532,6 +181608,7 @@ void m68000_device::and_l_imm32_dd_ip() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181554,7 +181631,6 @@ void m68000_device::mulu_w_ds_dd_ip() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -181615,6 +181691,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181667,7 +181744,6 @@ void m68000_device::mulu_w_ais_dd_ip() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181728,6 +181804,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181784,7 +181861,6 @@ void m68000_device::mulu_w_aips_dd_ip() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181845,6 +181921,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181903,7 +181980,6 @@ void m68000_device::mulu_w_pais_dd_ip() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181964,6 +182040,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182041,7 +182118,6 @@ void m68000_device::mulu_w_das_dd_ip() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182102,6 +182178,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182220,7 +182297,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182281,6 +182357,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182357,7 +182434,6 @@ void m68000_device::mulu_w_adr16_dd_ip() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182418,6 +182494,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182518,7 +182595,6 @@ void m68000_device::mulu_w_adr32_dd_ip() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182579,6 +182655,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182655,7 +182732,6 @@ void m68000_device::mulu_w_dpc_dd_ip() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182716,6 +182792,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182833,7 +182910,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182894,6 +182970,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182945,7 +183022,6 @@ void m68000_device::mulu_w_imm16_dd_ip() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -183006,6 +183082,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -183031,7 +183108,6 @@ void m68000_device::abcd_ds_dd_ip() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -183063,6 +183139,7 @@ void m68000_device::abcd_ds_dd_ip() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -183113,7 +183190,6 @@ void m68000_device::abcd_pais_paid_ip() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -183165,6 +183241,7 @@ void m68000_device::abcd_pais_paid_ip() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183222,7 +183299,6 @@ void m68000_device::and_b_dd_ais_ip() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183252,6 +183328,7 @@ void m68000_device::and_b_dd_ais_ip() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183315,7 +183392,6 @@ void m68000_device::and_b_dd_aips_ip() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183345,6 +183421,7 @@ void m68000_device::and_b_dd_aips_ip() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183410,7 +183487,6 @@ void m68000_device::and_b_dd_pais_ip() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183440,6 +183516,7 @@ void m68000_device::and_b_dd_pais_ip() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183524,7 +183601,6 @@ void m68000_device::and_b_dd_das_ip() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183554,6 +183630,7 @@ void m68000_device::and_b_dd_das_ip() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183681,7 +183758,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183711,6 +183787,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183794,7 +183871,6 @@ void m68000_device::and_b_dd_adr16_ip() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183824,6 +183900,7 @@ void m68000_device::and_b_dd_adr16_ip() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183932,7 +184009,6 @@ void m68000_device::and_b_dd_adr32_ip() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183962,6 +184038,7 @@ void m68000_device::and_b_dd_adr32_ip() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -183996,7 +184073,6 @@ void m68000_device::exg_dd_ds_ip() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184027,6 +184103,7 @@ void m68000_device::exg_dd_ds_ip() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184047,7 +184124,6 @@ void m68000_device::exg_ad_as_ip() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184078,6 +184154,7 @@ void m68000_device::exg_ad_as_ip() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184126,7 +184203,6 @@ void m68000_device::and_w_dd_ais_ip() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184156,6 +184232,7 @@ void m68000_device::and_w_dd_ais_ip() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184229,7 +184306,6 @@ void m68000_device::and_w_dd_aips_ip() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184259,6 +184335,7 @@ void m68000_device::and_w_dd_aips_ip() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184334,7 +184411,6 @@ void m68000_device::and_w_dd_pais_ip() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184364,6 +184440,7 @@ void m68000_device::and_w_dd_pais_ip() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184458,7 +184535,6 @@ void m68000_device::and_w_dd_das_ip() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184488,6 +184564,7 @@ void m68000_device::and_w_dd_das_ip() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184625,7 +184702,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184655,6 +184731,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184748,7 +184825,6 @@ void m68000_device::and_w_dd_adr16_ip() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184778,6 +184854,7 @@ void m68000_device::and_w_dd_adr16_ip() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184896,7 +184973,6 @@ void m68000_device::and_w_dd_adr32_ip() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184926,6 +185002,7 @@ void m68000_device::and_w_dd_adr32_ip() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -184966,7 +185043,6 @@ void m68000_device::exg_dd_as_ip() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184997,6 +185073,7 @@ void m68000_device::exg_dd_as_ip() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -185069,7 +185146,6 @@ void m68000_device::and_l_dd_ais_ip() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185125,6 +185201,7 @@ void m68000_device::and_l_dd_ais_ip() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185221,7 +185298,6 @@ void m68000_device::and_l_dd_aips_ip() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185277,6 +185353,7 @@ void m68000_device::and_l_dd_aips_ip() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185374,7 +185451,6 @@ void m68000_device::and_l_dd_pais_ip() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185430,6 +185506,7 @@ void m68000_device::and_l_dd_pais_ip() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185547,7 +185624,6 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185603,6 +185679,7 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185763,7 +185840,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185819,6 +185895,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185939,7 +186016,6 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185995,6 +186071,7 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -186140,7 +186217,6 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -186196,6 +186272,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -186236,7 +186313,6 @@ void m68000_device::muls_w_ds_dd_ip() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -186299,6 +186375,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186358,7 +186435,6 @@ void m68000_device::muls_w_ais_dd_ip() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186421,6 +186497,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186484,7 +186561,6 @@ void m68000_device::muls_w_aips_dd_ip() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186547,6 +186623,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186612,7 +186689,6 @@ void m68000_device::muls_w_pais_dd_ip() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186675,6 +186751,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186759,7 +186836,6 @@ void m68000_device::muls_w_das_dd_ip() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186822,6 +186898,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186947,7 +187024,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187010,6 +187086,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187093,7 +187170,6 @@ void m68000_device::muls_w_adr16_dd_ip() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187156,6 +187232,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187263,7 +187340,6 @@ void m68000_device::muls_w_adr32_dd_ip() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187326,6 +187402,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187409,7 +187486,6 @@ void m68000_device::muls_w_dpc_dd_ip() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187472,6 +187548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187596,7 +187673,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187659,6 +187735,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187717,7 +187794,6 @@ void m68000_device::muls_w_imm16_dd_ip() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -187780,6 +187856,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187812,7 +187889,6 @@ void m68000_device::add_b_ds_dd_ip() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -187820,6 +187896,7 @@ void m68000_device::add_b_ds_dd_ip() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -187884,7 +187961,6 @@ void m68000_device::add_b_ais_dd_ip() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187892,6 +187968,7 @@ void m68000_device::add_b_ais_dd_ip() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -187960,7 +188037,6 @@ void m68000_device::add_b_aips_dd_ip() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187968,6 +188044,7 @@ void m68000_device::add_b_aips_dd_ip() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188038,7 +188115,6 @@ void m68000_device::add_b_pais_dd_ip() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188046,6 +188122,7 @@ void m68000_device::add_b_pais_dd_ip() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188135,7 +188212,6 @@ void m68000_device::add_b_das_dd_ip() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188143,6 +188219,7 @@ void m68000_device::add_b_das_dd_ip() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188273,7 +188350,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188281,6 +188357,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188369,7 +188446,6 @@ void m68000_device::add_b_adr16_dd_ip() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188377,6 +188453,7 @@ void m68000_device::add_b_adr16_dd_ip() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188489,7 +188566,6 @@ void m68000_device::add_b_adr32_dd_ip() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188497,6 +188573,7 @@ void m68000_device::add_b_adr32_dd_ip() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188585,7 +188662,6 @@ void m68000_device::add_b_dpc_dd_ip() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188593,6 +188669,7 @@ void m68000_device::add_b_dpc_dd_ip() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188722,7 +188799,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188730,6 +188806,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188797,7 +188874,6 @@ void m68000_device::add_b_imm8_dd_ip() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -188805,6 +188881,7 @@ void m68000_device::add_b_imm8_dd_ip() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188846,7 +188923,6 @@ void m68000_device::add_w_ds_dd_ip() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -188854,6 +188930,7 @@ void m68000_device::add_w_ds_dd_ip() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188895,7 +188972,6 @@ void m68000_device::add_w_as_dd_ip() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -188903,6 +188979,7 @@ void m68000_device::add_w_as_dd_ip() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188971,7 +189048,6 @@ void m68000_device::add_w_ais_dd_ip() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188979,6 +189055,7 @@ void m68000_device::add_w_ais_dd_ip() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189051,7 +189128,6 @@ void m68000_device::add_w_aips_dd_ip() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189059,6 +189135,7 @@ void m68000_device::add_w_aips_dd_ip() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189133,7 +189210,6 @@ void m68000_device::add_w_pais_dd_ip() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189141,6 +189217,7 @@ void m68000_device::add_w_pais_dd_ip() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189234,7 +189311,6 @@ void m68000_device::add_w_das_dd_ip() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189242,6 +189318,7 @@ void m68000_device::add_w_das_dd_ip() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189376,7 +189453,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189384,6 +189460,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189476,7 +189553,6 @@ void m68000_device::add_w_adr16_dd_ip() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189484,6 +189560,7 @@ void m68000_device::add_w_adr16_dd_ip() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189600,7 +189677,6 @@ void m68000_device::add_w_adr32_dd_ip() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189608,6 +189684,7 @@ void m68000_device::add_w_adr32_dd_ip() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189700,7 +189777,6 @@ void m68000_device::add_w_dpc_dd_ip() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189708,6 +189784,7 @@ void m68000_device::add_w_dpc_dd_ip() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189841,7 +189918,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189849,6 +189925,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189916,7 +189993,6 @@ void m68000_device::add_w_imm16_dd_ip() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -189924,6 +190000,7 @@ void m68000_device::add_w_imm16_dd_ip() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189965,7 +190042,6 @@ void m68000_device::add_l_ds_dd_ip() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -190001,6 +190077,7 @@ void m68000_device::add_l_ds_dd_ip() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190022,7 +190099,6 @@ void m68000_device::add_l_as_dd_ip() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -190058,6 +190134,7 @@ void m68000_device::add_l_as_dd_ip() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190130,7 +190207,6 @@ void m68000_device::add_l_ais_dd_ip() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190164,6 +190240,7 @@ void m68000_device::add_l_ais_dd_ip() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190239,7 +190316,6 @@ void m68000_device::add_l_aips_dd_ip() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190273,6 +190349,7 @@ void m68000_device::add_l_aips_dd_ip() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190349,7 +190426,6 @@ void m68000_device::add_l_pais_dd_ip() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190383,6 +190459,7 @@ void m68000_device::add_l_pais_dd_ip() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190479,7 +190556,6 @@ void m68000_device::add_l_das_dd_ip() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190513,6 +190589,7 @@ void m68000_device::add_l_das_dd_ip() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190650,7 +190727,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190684,6 +190760,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190782,7 +190859,6 @@ void m68000_device::add_l_adr16_dd_ip() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190816,6 +190892,7 @@ void m68000_device::add_l_adr16_dd_ip() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190938,7 +191015,6 @@ void m68000_device::add_l_adr32_dd_ip() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190972,6 +191048,7 @@ void m68000_device::add_l_adr32_dd_ip() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191067,7 +191144,6 @@ void m68000_device::add_l_dpc_dd_ip() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191101,6 +191177,7 @@ void m68000_device::add_l_dpc_dd_ip() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191237,7 +191314,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191271,6 +191347,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191342,7 +191419,6 @@ void m68000_device::add_l_imm32_dd_ip() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -191378,6 +191454,7 @@ void m68000_device::add_l_imm32_dd_ip() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191399,7 +191476,6 @@ void m68000_device::adda_w_ds_ad_ip() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -191433,6 +191509,7 @@ void m68000_device::adda_w_ds_ad_ip() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191454,7 +191531,6 @@ void m68000_device::adda_w_as_ad_ip() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -191488,6 +191564,7 @@ void m68000_device::adda_w_as_ad_ip() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191536,7 +191613,6 @@ void m68000_device::adda_w_ais_ad_ip() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191570,6 +191646,7 @@ void m68000_device::adda_w_ais_ad_ip() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191622,7 +191699,6 @@ void m68000_device::adda_w_aips_ad_ip() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191656,6 +191732,7 @@ void m68000_device::adda_w_aips_ad_ip() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191710,7 +191787,6 @@ void m68000_device::adda_w_pais_ad_ip() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191744,6 +191820,7 @@ void m68000_device::adda_w_pais_ad_ip() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191817,7 +191894,6 @@ void m68000_device::adda_w_das_ad_ip() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191851,6 +191927,7 @@ void m68000_device::adda_w_das_ad_ip() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191965,7 +192042,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191999,6 +192075,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192071,7 +192148,6 @@ void m68000_device::adda_w_adr16_ad_ip() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192105,6 +192181,7 @@ void m68000_device::adda_w_adr16_ad_ip() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192201,7 +192278,6 @@ void m68000_device::adda_w_adr32_ad_ip() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192235,6 +192311,7 @@ void m68000_device::adda_w_adr32_ad_ip() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192307,7 +192384,6 @@ void m68000_device::adda_w_dpc_ad_ip() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192341,6 +192417,7 @@ void m68000_device::adda_w_dpc_ad_ip() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192454,7 +192531,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192488,6 +192564,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192535,7 +192612,6 @@ void m68000_device::adda_w_imm16_ad_ip() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -192569,6 +192645,7 @@ void m68000_device::adda_w_imm16_ad_ip() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192590,7 +192667,6 @@ void m68000_device::addx_b_ds_dd_ip() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -192598,6 +192674,7 @@ void m68000_device::addx_b_ds_dd_ip() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192671,7 +192748,6 @@ void m68000_device::addx_b_pais_paid_ip() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -192722,6 +192798,7 @@ void m68000_device::addx_b_pais_paid_ip() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -192779,7 +192856,6 @@ void m68000_device::add_b_dd_ais_ip() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192809,6 +192885,7 @@ void m68000_device::add_b_dd_ais_ip() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192869,7 +192946,6 @@ void m68000_device::add_b_dd_aips_ip() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192899,6 +192975,7 @@ void m68000_device::add_b_dd_aips_ip() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192961,7 +193038,6 @@ void m68000_device::add_b_dd_pais_ip() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192991,6 +193067,7 @@ void m68000_device::add_b_dd_pais_ip() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193072,7 +193149,6 @@ void m68000_device::add_b_dd_das_ip() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193102,6 +193178,7 @@ void m68000_device::add_b_dd_das_ip() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193224,7 +193301,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193254,6 +193330,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193334,7 +193411,6 @@ void m68000_device::add_b_dd_adr16_ip() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193364,6 +193440,7 @@ void m68000_device::add_b_dd_adr16_ip() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193468,7 +193545,6 @@ void m68000_device::add_b_dd_adr32_ip() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193498,6 +193574,7 @@ void m68000_device::add_b_dd_adr32_ip() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -193531,7 +193608,6 @@ void m68000_device::addx_w_ds_dd_ip() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -193539,6 +193615,7 @@ void m68000_device::addx_w_ds_dd_ip() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193616,7 +193693,6 @@ void m68000_device::addx_w_pais_paid_ip() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -193671,6 +193747,7 @@ void m68000_device::addx_w_pais_paid_ip() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193738,7 +193815,6 @@ void m68000_device::add_w_dd_ais_ip() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193768,6 +193844,7 @@ void m68000_device::add_w_dd_ais_ip() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193838,7 +193915,6 @@ void m68000_device::add_w_dd_aips_ip() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193868,6 +193944,7 @@ void m68000_device::add_w_dd_aips_ip() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193940,7 +194017,6 @@ void m68000_device::add_w_dd_pais_ip() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193970,6 +194046,7 @@ void m68000_device::add_w_dd_pais_ip() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -194061,7 +194138,6 @@ void m68000_device::add_w_dd_das_ip() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194091,6 +194167,7 @@ void m68000_device::add_w_dd_das_ip() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194223,7 +194300,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194253,6 +194329,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194343,7 +194420,6 @@ void m68000_device::add_w_dd_adr16_ip() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194373,6 +194449,7 @@ void m68000_device::add_w_dd_adr16_ip() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194487,7 +194564,6 @@ void m68000_device::add_w_dd_adr32_ip() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194517,6 +194593,7 @@ void m68000_device::add_w_dd_adr32_ip() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194556,7 +194633,6 @@ void m68000_device::addx_l_ds_dd_ip() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -194593,6 +194669,7 @@ void m68000_device::addx_l_ds_dd_ip() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -194728,7 +194805,6 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194781,6 +194857,7 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -194872,7 +194949,6 @@ void m68000_device::add_l_dd_ais_ip() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194928,6 +195004,7 @@ void m68000_device::add_l_dd_ais_ip() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195021,7 +195098,6 @@ void m68000_device::add_l_dd_aips_ip() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195077,6 +195153,7 @@ void m68000_device::add_l_dd_aips_ip() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195171,7 +195248,6 @@ void m68000_device::add_l_dd_pais_ip() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195227,6 +195303,7 @@ void m68000_device::add_l_dd_pais_ip() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195341,7 +195418,6 @@ void m68000_device::add_l_dd_das_ip() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195397,6 +195473,7 @@ void m68000_device::add_l_dd_das_ip() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195552,7 +195629,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195608,6 +195684,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195724,7 +195801,6 @@ void m68000_device::add_l_dd_adr16_ip() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195780,6 +195856,7 @@ void m68000_device::add_l_dd_adr16_ip() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195920,7 +195997,6 @@ void m68000_device::add_l_dd_adr32_ip() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195976,6 +196052,7 @@ void m68000_device::add_l_dd_adr32_ip() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -196015,7 +196092,6 @@ void m68000_device::adda_l_ds_ad_ip() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -196049,6 +196125,7 @@ void m68000_device::adda_l_ds_ad_ip() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196070,7 +196147,6 @@ void m68000_device::adda_l_as_ad_ip() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -196104,6 +196180,7 @@ void m68000_device::adda_l_as_ad_ip() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196176,7 +196253,6 @@ void m68000_device::adda_l_ais_ad_ip() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196208,6 +196284,7 @@ void m68000_device::adda_l_ais_ad_ip() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196283,7 +196360,6 @@ void m68000_device::adda_l_aips_ad_ip() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196315,6 +196391,7 @@ void m68000_device::adda_l_aips_ad_ip() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196391,7 +196468,6 @@ void m68000_device::adda_l_pais_ad_ip() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196423,6 +196499,7 @@ void m68000_device::adda_l_pais_ad_ip() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196519,7 +196596,6 @@ void m68000_device::adda_l_das_ad_ip() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196551,6 +196627,7 @@ void m68000_device::adda_l_das_ad_ip() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196688,7 +196765,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196720,6 +196796,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196818,7 +196895,6 @@ void m68000_device::adda_l_adr16_ad_ip() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196850,6 +196926,7 @@ void m68000_device::adda_l_adr16_ad_ip() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196972,7 +197049,6 @@ void m68000_device::adda_l_adr32_ad_ip() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197004,6 +197080,7 @@ void m68000_device::adda_l_adr32_ad_ip() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197099,7 +197176,6 @@ void m68000_device::adda_l_dpc_ad_ip() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197131,6 +197207,7 @@ void m68000_device::adda_l_dpc_ad_ip() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197267,7 +197344,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197299,6 +197375,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197370,7 +197447,6 @@ void m68000_device::adda_l_imm32_ad_ip() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -197404,6 +197480,7 @@ void m68000_device::adda_l_imm32_ad_ip() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197424,7 +197501,6 @@ void m68000_device::asr_b_imm3_ds_ip() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197476,6 +197552,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197496,7 +197573,6 @@ void m68000_device::lsr_b_imm3_ds_ip() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197548,6 +197624,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197568,7 +197645,6 @@ void m68000_device::roxr_b_imm3_ds_ip() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197620,6 +197696,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197640,7 +197717,6 @@ void m68000_device::ror_b_imm3_ds_ip() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197692,6 +197768,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197713,7 +197790,6 @@ void m68000_device::asr_b_dd_ds_ip() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197765,6 +197841,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197786,7 +197863,6 @@ void m68000_device::lsr_b_dd_ds_ip() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197838,6 +197914,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197859,7 +197936,6 @@ void m68000_device::roxr_b_dd_ds_ip() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197911,6 +197987,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197932,7 +198009,6 @@ void m68000_device::ror_b_dd_ds_ip() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197984,6 +198060,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198004,7 +198081,6 @@ void m68000_device::asr_w_imm3_ds_ip() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198056,6 +198132,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198076,7 +198153,6 @@ void m68000_device::lsr_w_imm3_ds_ip() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198128,6 +198204,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198148,7 +198225,6 @@ void m68000_device::roxr_w_imm3_ds_ip() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198200,6 +198276,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198220,7 +198297,6 @@ void m68000_device::ror_w_imm3_ds_ip() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198272,6 +198348,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198293,7 +198370,6 @@ void m68000_device::asr_w_dd_ds_ip() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198345,6 +198421,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198366,7 +198443,6 @@ void m68000_device::lsr_w_dd_ds_ip() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198418,6 +198494,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198439,7 +198516,6 @@ void m68000_device::roxr_w_dd_ds_ip() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198491,6 +198567,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198512,7 +198589,6 @@ void m68000_device::ror_w_dd_ds_ip() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198564,6 +198640,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198584,7 +198661,6 @@ void m68000_device::asr_l_imm3_ds_ip() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198640,6 +198716,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198662,7 +198739,6 @@ void m68000_device::lsr_l_imm3_ds_ip() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198718,6 +198794,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198740,7 +198817,6 @@ void m68000_device::roxr_l_imm3_ds_ip() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198796,6 +198872,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -198818,7 +198895,6 @@ void m68000_device::ror_l_imm3_ds_ip() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198874,6 +198950,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198897,7 +198974,6 @@ void m68000_device::asr_l_dd_ds_ip() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198953,6 +199029,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198976,7 +199053,6 @@ void m68000_device::lsr_l_dd_ds_ip() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199032,6 +199108,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199055,7 +199132,6 @@ void m68000_device::roxr_l_dd_ds_ip() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -199111,6 +199187,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -199134,7 +199211,6 @@ void m68000_device::ror_l_dd_ds_ip() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199190,6 +199266,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199240,7 +199317,6 @@ void m68000_device::asr_ais_ip() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199275,6 +199351,7 @@ void m68000_device::asr_ais_ip() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199345,7 +199422,6 @@ void m68000_device::asr_aips_ip() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199380,6 +199456,7 @@ void m68000_device::asr_aips_ip() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199452,7 +199529,6 @@ void m68000_device::asr_pais_ip() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199487,6 +199563,7 @@ void m68000_device::asr_pais_ip() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199578,7 +199655,6 @@ void m68000_device::asr_das_ip() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199613,6 +199689,7 @@ void m68000_device::asr_das_ip() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199745,7 +199822,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199780,6 +199856,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199870,7 +199947,6 @@ void m68000_device::asr_adr16_ip() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199905,6 +199981,7 @@ void m68000_device::asr_adr16_ip() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -200019,7 +200096,6 @@ void m68000_device::asr_adr32_ip() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -200054,6 +200130,7 @@ void m68000_device::asr_adr32_ip() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -200092,7 +200169,6 @@ void m68000_device::asl_b_imm3_ds_ip() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200144,6 +200220,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200164,7 +200241,6 @@ void m68000_device::lsl_b_imm3_ds_ip() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200216,6 +200292,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200237,7 +200314,6 @@ void m68000_device::roxl_b_imm3_ds_ip() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200289,6 +200365,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200309,7 +200386,6 @@ void m68000_device::rol_b_imm3_ds_ip() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200361,6 +200437,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200382,7 +200459,6 @@ void m68000_device::asl_b_dd_ds_ip() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200434,6 +200510,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200455,7 +200532,6 @@ void m68000_device::lsl_b_dd_ds_ip() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200507,6 +200583,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200529,7 +200606,6 @@ void m68000_device::roxl_b_dd_ds_ip() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200581,6 +200657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200602,7 +200679,6 @@ void m68000_device::rol_b_dd_ds_ip() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200654,6 +200730,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200674,7 +200751,6 @@ void m68000_device::asl_w_imm3_ds_ip() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200726,6 +200802,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200746,7 +200823,6 @@ void m68000_device::lsl_w_imm3_ds_ip() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200798,6 +200874,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -200819,7 +200896,6 @@ void m68000_device::roxl_w_imm3_ds_ip() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200871,6 +200947,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200891,7 +200968,6 @@ void m68000_device::rol_w_imm3_ds_ip() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200943,6 +201019,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200964,7 +201041,6 @@ void m68000_device::asl_w_dd_ds_ip() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201016,6 +201092,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201037,7 +201114,6 @@ void m68000_device::lsl_w_dd_ds_ip() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201089,6 +201165,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -201111,7 +201188,6 @@ void m68000_device::roxl_w_dd_ds_ip() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201163,6 +201239,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201184,7 +201261,6 @@ void m68000_device::rol_w_dd_ds_ip() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201236,6 +201312,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201256,7 +201333,6 @@ void m68000_device::asl_l_imm3_ds_ip() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201312,6 +201388,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201334,7 +201411,6 @@ void m68000_device::lsl_l_imm3_ds_ip() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201392,6 +201468,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201414,7 +201491,6 @@ void m68000_device::roxl_l_imm3_ds_ip() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201470,6 +201546,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201492,7 +201569,6 @@ void m68000_device::rol_l_imm3_ds_ip() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201548,6 +201624,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201571,7 +201648,6 @@ void m68000_device::asl_l_dd_ds_ip() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201627,6 +201703,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201650,7 +201727,6 @@ void m68000_device::lsl_l_dd_ds_ip() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201708,6 +201784,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201731,7 +201808,6 @@ void m68000_device::roxl_l_dd_ds_ip() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201787,6 +201863,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201810,7 +201887,6 @@ void m68000_device::rol_l_dd_ds_ip() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201866,6 +201942,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201916,7 +201993,6 @@ void m68000_device::asl_ais_ip() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -201951,6 +202027,7 @@ void m68000_device::asl_ais_ip() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202021,7 +202098,6 @@ void m68000_device::asl_aips_ip() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202056,6 +202132,7 @@ void m68000_device::asl_aips_ip() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202128,7 +202205,6 @@ void m68000_device::asl_pais_ip() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202163,6 +202239,7 @@ void m68000_device::asl_pais_ip() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202254,7 +202331,6 @@ void m68000_device::asl_das_ip() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202289,6 +202365,7 @@ void m68000_device::asl_das_ip() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202421,7 +202498,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202456,6 +202532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202546,7 +202623,6 @@ void m68000_device::asl_adr16_ip() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202581,6 +202657,7 @@ void m68000_device::asl_adr16_ip() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202695,7 +202772,6 @@ void m68000_device::asl_adr32_ip() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202730,6 +202806,7 @@ void m68000_device::asl_adr32_ip() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -202796,7 +202873,6 @@ void m68000_device::lsr_ais_ip() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202831,6 +202907,7 @@ void m68000_device::lsr_ais_ip() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202901,7 +202978,6 @@ void m68000_device::lsr_aips_ip() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202936,6 +203012,7 @@ void m68000_device::lsr_aips_ip() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203008,7 +203085,6 @@ void m68000_device::lsr_pais_ip() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203043,6 +203119,7 @@ void m68000_device::lsr_pais_ip() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203134,7 +203211,6 @@ void m68000_device::lsr_das_ip() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203169,6 +203245,7 @@ void m68000_device::lsr_das_ip() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203301,7 +203378,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203336,6 +203412,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203426,7 +203503,6 @@ void m68000_device::lsr_adr16_ip() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203461,6 +203537,7 @@ void m68000_device::lsr_adr16_ip() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203575,7 +203652,6 @@ void m68000_device::lsr_adr32_ip() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203610,6 +203686,7 @@ void m68000_device::lsr_adr32_ip() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -203677,7 +203754,6 @@ void m68000_device::lsl_ais_ip() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203712,6 +203788,7 @@ void m68000_device::lsl_ais_ip() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203785,7 +203862,6 @@ void m68000_device::lsl_aips_ip() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203820,6 +203896,7 @@ void m68000_device::lsl_aips_ip() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203895,7 +203972,6 @@ void m68000_device::lsl_pais_ip() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203930,6 +204006,7 @@ void m68000_device::lsl_pais_ip() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204024,7 +204101,6 @@ void m68000_device::lsl_das_ip() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204059,6 +204135,7 @@ void m68000_device::lsl_das_ip() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204196,7 +204273,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204231,6 +204307,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204324,7 +204401,6 @@ void m68000_device::lsl_adr16_ip() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204359,6 +204435,7 @@ void m68000_device::lsl_adr16_ip() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204477,7 +204554,6 @@ void m68000_device::lsl_adr32_ip() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204512,6 +204588,7 @@ void m68000_device::lsl_adr32_ip() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -204579,7 +204656,6 @@ void m68000_device::roxr_ais_ip() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204614,6 +204690,7 @@ void m68000_device::roxr_ais_ip() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204684,7 +204761,6 @@ void m68000_device::roxr_aips_ip() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204719,6 +204795,7 @@ void m68000_device::roxr_aips_ip() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204791,7 +204868,6 @@ void m68000_device::roxr_pais_ip() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204826,6 +204902,7 @@ void m68000_device::roxr_pais_ip() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204917,7 +204994,6 @@ void m68000_device::roxr_das_ip() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204952,6 +205028,7 @@ void m68000_device::roxr_das_ip() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205084,7 +205161,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205119,6 +205195,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205209,7 +205286,6 @@ void m68000_device::roxr_adr16_ip() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205244,6 +205320,7 @@ void m68000_device::roxr_adr16_ip() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205358,7 +205435,6 @@ void m68000_device::roxr_adr32_ip() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205393,6 +205469,7 @@ void m68000_device::roxr_adr32_ip() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -205459,7 +205536,6 @@ void m68000_device::roxl_ais_ip() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205494,6 +205570,7 @@ void m68000_device::roxl_ais_ip() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205564,7 +205641,6 @@ void m68000_device::roxl_aips_ip() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205599,6 +205675,7 @@ void m68000_device::roxl_aips_ip() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205671,7 +205748,6 @@ void m68000_device::roxl_pais_ip() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205706,6 +205782,7 @@ void m68000_device::roxl_pais_ip() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205797,7 +205874,6 @@ void m68000_device::roxl_das_ip() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205832,6 +205908,7 @@ void m68000_device::roxl_das_ip() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205964,7 +206041,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205999,6 +206075,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206089,7 +206166,6 @@ void m68000_device::roxl_adr16_ip() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206124,6 +206200,7 @@ void m68000_device::roxl_adr16_ip() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206238,7 +206315,6 @@ void m68000_device::roxl_adr32_ip() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206273,6 +206349,7 @@ void m68000_device::roxl_adr32_ip() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -206339,7 +206416,6 @@ void m68000_device::ror_ais_ip() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206374,6 +206450,7 @@ void m68000_device::ror_ais_ip() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206444,7 +206521,6 @@ void m68000_device::ror_aips_ip() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206479,6 +206555,7 @@ void m68000_device::ror_aips_ip() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206551,7 +206628,6 @@ void m68000_device::ror_pais_ip() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206586,6 +206662,7 @@ void m68000_device::ror_pais_ip() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206677,7 +206754,6 @@ void m68000_device::ror_das_ip() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206712,6 +206788,7 @@ void m68000_device::ror_das_ip() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206844,7 +206921,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206879,6 +206955,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206969,7 +207046,6 @@ void m68000_device::ror_adr16_ip() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207004,6 +207080,7 @@ void m68000_device::ror_adr16_ip() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207118,7 +207195,6 @@ void m68000_device::ror_adr32_ip() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207153,6 +207229,7 @@ void m68000_device::ror_adr32_ip() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -207219,7 +207296,6 @@ void m68000_device::rol_ais_ip() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207254,6 +207330,7 @@ void m68000_device::rol_ais_ip() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207324,7 +207401,6 @@ void m68000_device::rol_aips_ip() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207359,6 +207435,7 @@ void m68000_device::rol_aips_ip() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207431,7 +207508,6 @@ void m68000_device::rol_pais_ip() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207466,6 +207542,7 @@ void m68000_device::rol_pais_ip() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207557,7 +207634,6 @@ void m68000_device::rol_das_ip() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207592,6 +207668,7 @@ void m68000_device::rol_das_ip() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207724,7 +207801,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207759,6 +207835,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207849,7 +207926,6 @@ void m68000_device::rol_adr16_ip() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207884,6 +207960,7 @@ void m68000_device::rol_adr16_ip() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207998,7 +208075,6 @@ void m68000_device::rol_adr32_ip() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -208033,6 +208109,7 @@ void m68000_device::rol_adr32_ip() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: diff --git a/src/devices/cpu/m68000/m68000-sipm.cpp b/src/devices/cpu/m68000/m68000-sipm.cpp index 0a17c6ac1ca..906708655a8 100644 --- a/src/devices/cpu/m68000/m68000-sipm.cpp +++ b/src/devices/cpu/m68000/m68000-sipm.cpp @@ -12,6 +12,7 @@ void m68000_device::state_reset_ipm() m_icount -= 2; // 296 rstp4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156,11 +157,11 @@ void m68000_device::state_reset_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -291,6 +292,7 @@ void m68000_device::state_bus_error_ipm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -470,11 +472,11 @@ void m68000_device::state_bus_error_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -605,6 +607,7 @@ void m68000_device::state_address_error_ipm() // 088 bser6 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 7: @@ -784,11 +787,11 @@ void m68000_device::state_address_error_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -903,10 +906,10 @@ void m68000_device::state_interrupt_ipm() m_irc = m_edb; // 118 itlx6 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_icount -= 2; // 292 itlx7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -1040,11 +1043,11 @@ void m68000_device::state_interrupt_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1248,11 +1251,11 @@ void m68000_device::state_trace_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1456,11 +1459,11 @@ void m68000_device::state_illegal_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1664,11 +1667,11 @@ void m68000_device::state_priviledge_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -1872,11 +1875,11 @@ void m68000_device::state_linea_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2080,11 +2083,11 @@ void m68000_device::state_linef_ipm() // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R | SSW_N; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2150,13 +2153,13 @@ void m68000_device::ori_b_imm8_ds_ipm() // 0000 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2249,7 +2252,6 @@ void m68000_device::ori_b_imm8_ais_ipm() // 0010 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2279,6 +2281,7 @@ void m68000_device::ori_b_imm8_ais_ipm() // 0010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2368,7 +2371,6 @@ void m68000_device::ori_b_imm8_aips_ipm() // 0018 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2398,6 +2400,7 @@ void m68000_device::ori_b_imm8_aips_ipm() // 0018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2489,7 +2492,6 @@ void m68000_device::ori_b_imm8_pais_ipm() // 0020 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2519,6 +2521,7 @@ void m68000_device::ori_b_imm8_pais_ipm() // 0020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -2629,7 +2632,6 @@ void m68000_device::ori_b_imm8_das_ipm() // 0028 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2659,6 +2661,7 @@ void m68000_device::ori_b_imm8_das_ipm() // 0028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2812,7 +2815,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2842,6 +2844,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -2951,7 +2954,6 @@ void m68000_device::ori_b_imm8_adr16_ipm() // 0038 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -2981,6 +2983,7 @@ void m68000_device::ori_b_imm8_adr16_ipm() // 0038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -3115,7 +3118,6 @@ void m68000_device::ori_b_imm8_adr32_ipm() // 0039 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3145,6 +3147,7 @@ void m68000_device::ori_b_imm8_adr32_ipm() // 0039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -3251,12 +3254,12 @@ void m68000_device::ori_imm8_ccr_ipm() // 003c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3323,13 +3326,13 @@ void m68000_device::ori_w_imm16_ds_ipm() // 0040 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3426,7 +3429,6 @@ void m68000_device::ori_w_imm16_ais_ipm() // 0050 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3456,6 +3458,7 @@ void m68000_device::ori_w_imm16_ais_ipm() // 0050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3555,7 +3558,6 @@ void m68000_device::ori_w_imm16_aips_ipm() // 0058 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3585,6 +3587,7 @@ void m68000_device::ori_w_imm16_aips_ipm() // 0058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3686,7 +3689,6 @@ void m68000_device::ori_w_imm16_pais_ipm() // 0060 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3716,6 +3718,7 @@ void m68000_device::ori_w_imm16_pais_ipm() // 0060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -3836,7 +3839,6 @@ void m68000_device::ori_w_imm16_das_ipm() // 0068 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -3866,6 +3868,7 @@ void m68000_device::ori_w_imm16_das_ipm() // 0068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4029,7 +4032,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4059,6 +4061,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4178,7 +4181,6 @@ void m68000_device::ori_w_imm16_adr16_ipm() // 0078 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4208,6 +4210,7 @@ void m68000_device::ori_w_imm16_adr16_ipm() // 0078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -4352,7 +4355,6 @@ void m68000_device::ori_w_imm16_adr32_ipm() // 0079 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4382,6 +4384,7 @@ void m68000_device::ori_w_imm16_adr32_ipm() // 0079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -4500,12 +4503,12 @@ void m68000_device::ori_i16u_sr_ipm() // 007c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4597,7 +4600,6 @@ void m68000_device::ori_l_imm32_ds_ipm() // 0080 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_or(m_dt, m_da[ry]); @@ -4633,6 +4635,7 @@ void m68000_device::ori_l_imm32_ds_ipm() // 0080 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -4758,7 +4761,6 @@ void m68000_device::ori_l_imm32_ais_ipm() // 0090 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -4814,6 +4816,7 @@ void m68000_device::ori_l_imm32_ais_ipm() // 0090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -4961,7 +4964,6 @@ void m68000_device::ori_l_imm32_aips_ipm() // 0098 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5017,6 +5019,7 @@ void m68000_device::ori_l_imm32_aips_ipm() // 0098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5165,7 +5168,6 @@ void m68000_device::ori_l_imm32_pais_ipm() // 00a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5221,6 +5223,7 @@ void m68000_device::ori_l_imm32_pais_ipm() // 00a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -5389,7 +5392,6 @@ void m68000_device::ori_l_imm32_das_ipm() // 00a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5445,6 +5447,7 @@ void m68000_device::ori_l_imm32_das_ipm() // 00a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5656,7 +5659,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5712,6 +5714,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -5883,7 +5886,6 @@ void m68000_device::ori_l_imm32_adr16_ipm() // 00b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -5939,6 +5941,7 @@ void m68000_device::ori_l_imm32_adr16_ipm() // 00b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -6135,7 +6138,6 @@ void m68000_device::ori_l_imm32_adr32_ipm() // 00b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6191,6 +6193,7 @@ void m68000_device::ori_l_imm32_adr32_ipm() // 00b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -6231,7 +6234,6 @@ void m68000_device::btst_dd_ds_ipm() // 0100 f1f8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -6272,6 +6274,7 @@ void m68000_device::btst_dd_ds_ipm() // 0100 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -6286,6 +6289,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -6353,7 +6357,6 @@ void m68000_device::movep_w_das_dd_ipm() // 0108 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -6375,6 +6378,7 @@ void m68000_device::movep_w_das_dd_ipm() // 0108 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6442,7 +6446,6 @@ void m68000_device::btst_dd_ais_ipm() // 0110 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6450,6 +6453,7 @@ void m68000_device::btst_dd_ais_ipm() // 0110 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6519,7 +6523,6 @@ void m68000_device::btst_dd_aips_ipm() // 0118 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6527,6 +6530,7 @@ void m68000_device::btst_dd_aips_ipm() // 0118 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6598,7 +6602,6 @@ void m68000_device::btst_dd_pais_ipm() // 0120 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6606,6 +6609,7 @@ void m68000_device::btst_dd_pais_ipm() // 0120 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6696,7 +6700,6 @@ void m68000_device::btst_dd_das_ipm() // 0128 f1f8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6704,6 +6707,7 @@ void m68000_device::btst_dd_das_ipm() // 0128 f1f8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6837,7 +6841,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6845,6 +6848,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -6934,7 +6938,6 @@ void m68000_device::btst_dd_adr16_ipm() // 0138 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -6942,6 +6945,7 @@ void m68000_device::btst_dd_adr16_ipm() // 0138 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7056,7 +7060,6 @@ void m68000_device::btst_dd_adr32_ipm() // 0139 f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7064,6 +7067,7 @@ void m68000_device::btst_dd_adr32_ipm() // 0139 f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7153,7 +7157,6 @@ void m68000_device::btst_dd_dpc_ipm() // 013a f1ff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7161,6 +7164,7 @@ void m68000_device::btst_dd_dpc_ipm() // 013a f1ff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7293,7 +7297,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -7301,6 +7304,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7368,7 +7372,6 @@ void m68000_device::btst_dd_imm_ipm() // 013c f1ff // 0ab btsi1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); @@ -7407,6 +7410,7 @@ void m68000_device::btst_dd_imm_ipm() // 013c f1ff bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); @@ -7421,6 +7425,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); @@ -7443,7 +7448,6 @@ void m68000_device::bchg_dd_ds_ipm() // 0140 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -7484,6 +7488,7 @@ void m68000_device::bchg_dd_ds_ipm() // 0140 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7503,6 +7508,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -7612,7 +7618,6 @@ void m68000_device::movep_l_das_dd_ipm() // 0148 f1f8 // 368 mpiw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -7634,6 +7639,7 @@ void m68000_device::movep_l_das_dd_ipm() // 0148 f1f8 // 36a mpiw4 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7701,7 +7707,6 @@ void m68000_device::bchg_dd_ais_ipm() // 0150 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7731,6 +7736,7 @@ void m68000_device::bchg_dd_ais_ipm() // 0150 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7795,7 +7801,6 @@ void m68000_device::bchg_dd_aips_ipm() // 0158 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7825,6 +7830,7 @@ void m68000_device::bchg_dd_aips_ipm() // 0158 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -7891,7 +7897,6 @@ void m68000_device::bchg_dd_pais_ipm() // 0160 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -7921,6 +7926,7 @@ void m68000_device::bchg_dd_pais_ipm() // 0160 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8006,7 +8012,6 @@ void m68000_device::bchg_dd_das_ipm() // 0168 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8036,6 +8041,7 @@ void m68000_device::bchg_dd_das_ipm() // 0168 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8164,7 +8170,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8194,6 +8199,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8278,7 +8284,6 @@ void m68000_device::bchg_dd_adr16_ipm() // 0178 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8308,6 +8313,7 @@ void m68000_device::bchg_dd_adr16_ipm() // 0178 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -8417,7 +8423,6 @@ void m68000_device::bchg_dd_adr32_ipm() // 0179 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8447,6 +8452,7 @@ void m68000_device::bchg_dd_adr32_ipm() // 0179 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -8482,7 +8488,6 @@ void m68000_device::bclr_dd_ds_ipm() // 0180 f1f8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -8527,6 +8532,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8550,6 +8556,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -8598,7 +8605,6 @@ void m68000_device::movep_w_dd_das_ipm() // 0188 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -8636,12 +8642,12 @@ void m68000_device::movep_w_dd_das_ipm() // 0188 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -8706,7 +8712,6 @@ void m68000_device::bclr_dd_ais_ipm() // 0190 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8740,6 +8745,7 @@ void m68000_device::bclr_dd_ais_ipm() // 0190 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8804,7 +8810,6 @@ void m68000_device::bclr_dd_aips_ipm() // 0198 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8838,6 +8843,7 @@ void m68000_device::bclr_dd_aips_ipm() // 0198 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -8904,7 +8910,6 @@ void m68000_device::bclr_dd_pais_ipm() // 01a0 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -8938,6 +8943,7 @@ void m68000_device::bclr_dd_pais_ipm() // 01a0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9023,7 +9029,6 @@ void m68000_device::bclr_dd_das_ipm() // 01a8 f1f8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9057,6 +9062,7 @@ void m68000_device::bclr_dd_das_ipm() // 01a8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9185,7 +9191,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9219,6 +9224,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9303,7 +9309,6 @@ void m68000_device::bclr_dd_adr16_ipm() // 01b8 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9337,6 +9342,7 @@ void m68000_device::bclr_dd_adr16_ipm() // 01b8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9446,7 +9452,6 @@ void m68000_device::bclr_dd_adr32_ipm() // 01b9 f1ff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -9480,6 +9485,7 @@ void m68000_device::bclr_dd_adr32_ipm() // 01b9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -9515,7 +9521,6 @@ void m68000_device::bset_dd_ds_ipm() // 01c0 f1f8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -9556,6 +9561,7 @@ void m68000_device::bset_dd_ds_ipm() // 01c0 f1f8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9575,6 +9581,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -9659,7 +9666,6 @@ void m68000_device::movep_l_dd_das_ipm() // 01c8 f1f8 // 36d mpow2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xh(m_dbout, m_da[rx]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -9697,12 +9703,12 @@ void m68000_device::movep_l_dd_das_ipm() // 01c8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9767,7 +9773,6 @@ void m68000_device::bset_dd_ais_ipm() // 01d0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9797,6 +9802,7 @@ void m68000_device::bset_dd_ais_ipm() // 01d0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9861,7 +9867,6 @@ void m68000_device::bset_dd_aips_ipm() // 01d8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9891,6 +9896,7 @@ void m68000_device::bset_dd_aips_ipm() // 01d8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -9957,7 +9963,6 @@ void m68000_device::bset_dd_pais_ipm() // 01e0 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -9987,6 +9992,7 @@ void m68000_device::bset_dd_pais_ipm() // 01e0 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -10072,7 +10078,6 @@ void m68000_device::bset_dd_das_ipm() // 01e8 f1f8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10102,6 +10107,7 @@ void m68000_device::bset_dd_das_ipm() // 01e8 f1f8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10230,7 +10236,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10260,6 +10265,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10344,7 +10350,6 @@ void m68000_device::bset_dd_adr16_ipm() // 01f8 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10374,6 +10379,7 @@ void m68000_device::bset_dd_adr16_ipm() // 01f8 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10483,7 +10489,6 @@ void m68000_device::bset_dd_adr32_ipm() // 01f9 f1ff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10513,6 +10518,7 @@ void m68000_device::bset_dd_adr32_ipm() // 01f9 f1ff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -10574,13 +10580,13 @@ void m68000_device::andi_b_imm8_ds_ipm() // 0200 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10673,7 +10679,6 @@ void m68000_device::andi_b_imm8_ais_ipm() // 0210 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10703,6 +10708,7 @@ void m68000_device::andi_b_imm8_ais_ipm() // 0210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10792,7 +10798,6 @@ void m68000_device::andi_b_imm8_aips_ipm() // 0218 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10822,6 +10827,7 @@ void m68000_device::andi_b_imm8_aips_ipm() // 0218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -10913,7 +10919,6 @@ void m68000_device::andi_b_imm8_pais_ipm() // 0220 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -10943,6 +10948,7 @@ void m68000_device::andi_b_imm8_pais_ipm() // 0220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11053,7 +11059,6 @@ void m68000_device::andi_b_imm8_das_ipm() // 0228 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11083,6 +11088,7 @@ void m68000_device::andi_b_imm8_das_ipm() // 0228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11236,7 +11242,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11266,6 +11271,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11375,7 +11381,6 @@ void m68000_device::andi_b_imm8_adr16_ipm() // 0238 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11405,6 +11410,7 @@ void m68000_device::andi_b_imm8_adr16_ipm() // 0238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -11539,7 +11545,6 @@ void m68000_device::andi_b_imm8_adr32_ipm() // 0239 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11569,6 +11574,7 @@ void m68000_device::andi_b_imm8_adr32_ipm() // 0239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -11675,12 +11681,12 @@ void m68000_device::andi_imm8_ccr_ipm() // 023c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11747,13 +11753,13 @@ void m68000_device::andi_w_imm16_ds_ipm() // 0240 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11850,7 +11856,6 @@ void m68000_device::andi_w_imm16_ais_ipm() // 0250 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -11880,6 +11885,7 @@ void m68000_device::andi_w_imm16_ais_ipm() // 0250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -11979,7 +11985,6 @@ void m68000_device::andi_w_imm16_aips_ipm() // 0258 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12009,6 +12014,7 @@ void m68000_device::andi_w_imm16_aips_ipm() // 0258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12110,7 +12116,6 @@ void m68000_device::andi_w_imm16_pais_ipm() // 0260 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12140,6 +12145,7 @@ void m68000_device::andi_w_imm16_pais_ipm() // 0260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -12260,7 +12266,6 @@ void m68000_device::andi_w_imm16_das_ipm() // 0268 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12290,6 +12295,7 @@ void m68000_device::andi_w_imm16_das_ipm() // 0268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12453,7 +12459,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12483,6 +12488,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12602,7 +12608,6 @@ void m68000_device::andi_w_imm16_adr16_ipm() // 0278 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12632,6 +12637,7 @@ void m68000_device::andi_w_imm16_adr16_ipm() // 0278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -12776,7 +12782,6 @@ void m68000_device::andi_w_imm16_adr32_ipm() // 0279 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -12806,6 +12811,7 @@ void m68000_device::andi_w_imm16_adr32_ipm() // 0279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -12924,12 +12930,12 @@ void m68000_device::andi_i16u_sr_ipm() // 027c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13021,7 +13027,6 @@ void m68000_device::andi_l_imm32_ds_ipm() // 0280 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_and(m_dt, m_da[ry]); @@ -13057,6 +13062,7 @@ void m68000_device::andi_l_imm32_ds_ipm() // 0280 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -13182,7 +13188,6 @@ void m68000_device::andi_l_imm32_ais_ipm() // 0290 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13238,6 +13243,7 @@ void m68000_device::andi_l_imm32_ais_ipm() // 0290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13385,7 +13391,6 @@ void m68000_device::andi_l_imm32_aips_ipm() // 0298 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13441,6 +13446,7 @@ void m68000_device::andi_l_imm32_aips_ipm() // 0298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13589,7 +13595,6 @@ void m68000_device::andi_l_imm32_pais_ipm() // 02a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13645,6 +13650,7 @@ void m68000_device::andi_l_imm32_pais_ipm() // 02a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -13813,7 +13819,6 @@ void m68000_device::andi_l_imm32_das_ipm() // 02a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -13869,6 +13874,7 @@ void m68000_device::andi_l_imm32_das_ipm() // 02a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14080,7 +14086,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14136,6 +14141,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14307,7 +14313,6 @@ void m68000_device::andi_l_imm32_adr16_ipm() // 02b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14363,6 +14368,7 @@ void m68000_device::andi_l_imm32_adr16_ipm() // 02b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -14559,7 +14565,6 @@ void m68000_device::andi_l_imm32_adr32_ipm() // 02b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14615,6 +14620,7 @@ void m68000_device::andi_l_imm32_adr32_ipm() // 02b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -14680,13 +14686,13 @@ void m68000_device::subi_b_imm8_ds_ipm() // 0400 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14776,7 +14782,6 @@ void m68000_device::subi_b_imm8_ais_ipm() // 0410 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14806,6 +14811,7 @@ void m68000_device::subi_b_imm8_ais_ipm() // 0410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -14891,7 +14897,6 @@ void m68000_device::subi_b_imm8_aips_ipm() // 0418 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -14921,6 +14926,7 @@ void m68000_device::subi_b_imm8_aips_ipm() // 0418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15008,7 +15014,6 @@ void m68000_device::subi_b_imm8_pais_ipm() // 0420 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15038,6 +15043,7 @@ void m68000_device::subi_b_imm8_pais_ipm() // 0420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15144,7 +15150,6 @@ void m68000_device::subi_b_imm8_das_ipm() // 0428 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15174,6 +15179,7 @@ void m68000_device::subi_b_imm8_das_ipm() // 0428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15321,7 +15327,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15351,6 +15356,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15456,7 +15462,6 @@ void m68000_device::subi_b_imm8_adr16_ipm() // 0438 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15486,6 +15491,7 @@ void m68000_device::subi_b_imm8_adr16_ipm() // 0438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -15615,7 +15621,6 @@ void m68000_device::subi_b_imm8_adr32_ipm() // 0439 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15645,6 +15650,7 @@ void m68000_device::subi_b_imm8_adr32_ipm() // 0439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -15703,13 +15709,13 @@ void m68000_device::subi_w_imm16_ds_ipm() // 0440 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15803,7 +15809,6 @@ void m68000_device::subi_w_imm16_ais_ipm() // 0450 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15833,6 +15838,7 @@ void m68000_device::subi_w_imm16_ais_ipm() // 0450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -15928,7 +15934,6 @@ void m68000_device::subi_w_imm16_aips_ipm() // 0458 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -15958,6 +15963,7 @@ void m68000_device::subi_w_imm16_aips_ipm() // 0458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16055,7 +16061,6 @@ void m68000_device::subi_w_imm16_pais_ipm() // 0460 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16085,6 +16090,7 @@ void m68000_device::subi_w_imm16_pais_ipm() // 0460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -16201,7 +16207,6 @@ void m68000_device::subi_w_imm16_das_ipm() // 0468 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16231,6 +16236,7 @@ void m68000_device::subi_w_imm16_das_ipm() // 0468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16388,7 +16394,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16418,6 +16423,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16533,7 +16539,6 @@ void m68000_device::subi_w_imm16_adr16_ipm() // 0478 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16563,6 +16568,7 @@ void m68000_device::subi_w_imm16_adr16_ipm() // 0478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -16702,7 +16708,6 @@ void m68000_device::subi_w_imm16_adr32_ipm() // 0479 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -16732,6 +16737,7 @@ void m68000_device::subi_w_imm16_adr32_ipm() // 0479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -16820,7 +16826,6 @@ void m68000_device::subi_l_imm32_ds_ipm() // 0480 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -16855,6 +16860,7 @@ void m68000_device::subi_l_imm32_ds_ipm() // 0480 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -16976,7 +16982,6 @@ void m68000_device::subi_l_imm32_ais_ipm() // 0490 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17032,6 +17037,7 @@ void m68000_device::subi_l_imm32_ais_ipm() // 0490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17174,7 +17180,6 @@ void m68000_device::subi_l_imm32_aips_ipm() // 0498 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17230,6 +17235,7 @@ void m68000_device::subi_l_imm32_aips_ipm() // 0498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17373,7 +17379,6 @@ void m68000_device::subi_l_imm32_pais_ipm() // 04a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17429,6 +17434,7 @@ void m68000_device::subi_l_imm32_pais_ipm() // 04a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -17592,7 +17598,6 @@ void m68000_device::subi_l_imm32_das_ipm() // 04a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17648,6 +17653,7 @@ void m68000_device::subi_l_imm32_das_ipm() // 04a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -17852,7 +17858,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -17908,6 +17913,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18073,7 +18079,6 @@ void m68000_device::subi_l_imm32_adr16_ipm() // 04b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18129,6 +18134,7 @@ void m68000_device::subi_l_imm32_adr16_ipm() // 04b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -18318,7 +18324,6 @@ void m68000_device::subi_l_imm32_adr32_ipm() // 04b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18374,6 +18379,7 @@ void m68000_device::subi_l_imm32_adr32_ipm() // 04b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -18438,13 +18444,13 @@ void m68000_device::addi_b_imm8_ds_ipm() // 0600 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18534,7 +18540,6 @@ void m68000_device::addi_b_imm8_ais_ipm() // 0610 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18564,6 +18569,7 @@ void m68000_device::addi_b_imm8_ais_ipm() // 0610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18649,7 +18655,6 @@ void m68000_device::addi_b_imm8_aips_ipm() // 0618 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18679,6 +18684,7 @@ void m68000_device::addi_b_imm8_aips_ipm() // 0618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18766,7 +18772,6 @@ void m68000_device::addi_b_imm8_pais_ipm() // 0620 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18796,6 +18801,7 @@ void m68000_device::addi_b_imm8_pais_ipm() // 0620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -18902,7 +18908,6 @@ void m68000_device::addi_b_imm8_das_ipm() // 0628 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -18932,6 +18937,7 @@ void m68000_device::addi_b_imm8_das_ipm() // 0628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19079,7 +19085,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19109,6 +19114,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19214,7 +19220,6 @@ void m68000_device::addi_b_imm8_adr16_ipm() // 0638 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19244,6 +19249,7 @@ void m68000_device::addi_b_imm8_adr16_ipm() // 0638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -19373,7 +19379,6 @@ void m68000_device::addi_b_imm8_adr32_ipm() // 0639 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19403,6 +19408,7 @@ void m68000_device::addi_b_imm8_adr32_ipm() // 0639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -19461,13 +19467,13 @@ void m68000_device::addi_w_imm16_ds_ipm() // 0640 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19561,7 +19567,6 @@ void m68000_device::addi_w_imm16_ais_ipm() // 0650 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19591,6 +19596,7 @@ void m68000_device::addi_w_imm16_ais_ipm() // 0650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19686,7 +19692,6 @@ void m68000_device::addi_w_imm16_aips_ipm() // 0658 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19716,6 +19721,7 @@ void m68000_device::addi_w_imm16_aips_ipm() // 0658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19813,7 +19819,6 @@ void m68000_device::addi_w_imm16_pais_ipm() // 0660 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19843,6 +19848,7 @@ void m68000_device::addi_w_imm16_pais_ipm() // 0660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -19959,7 +19965,6 @@ void m68000_device::addi_w_imm16_das_ipm() // 0668 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -19989,6 +19994,7 @@ void m68000_device::addi_w_imm16_das_ipm() // 0668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20146,7 +20152,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20176,6 +20181,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20291,7 +20297,6 @@ void m68000_device::addi_w_imm16_adr16_ipm() // 0678 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20321,6 +20326,7 @@ void m68000_device::addi_w_imm16_adr16_ipm() // 0678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -20460,7 +20466,6 @@ void m68000_device::addi_w_imm16_adr32_ipm() // 0679 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20490,6 +20495,7 @@ void m68000_device::addi_w_imm16_adr32_ipm() // 0679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -20578,7 +20584,6 @@ void m68000_device::addi_l_imm32_ds_ipm() // 0680 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_add(m_dt, m_da[ry]); @@ -20613,6 +20618,7 @@ void m68000_device::addi_l_imm32_ds_ipm() // 0680 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -20734,7 +20740,6 @@ void m68000_device::addi_l_imm32_ais_ipm() // 0690 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20790,6 +20795,7 @@ void m68000_device::addi_l_imm32_ais_ipm() // 0690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -20932,7 +20938,6 @@ void m68000_device::addi_l_imm32_aips_ipm() // 0698 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -20988,6 +20993,7 @@ void m68000_device::addi_l_imm32_aips_ipm() // 0698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21131,7 +21137,6 @@ void m68000_device::addi_l_imm32_pais_ipm() // 06a0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21187,6 +21192,7 @@ void m68000_device::addi_l_imm32_pais_ipm() // 06a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -21350,7 +21356,6 @@ void m68000_device::addi_l_imm32_das_ipm() // 06a8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21406,6 +21411,7 @@ void m68000_device::addi_l_imm32_das_ipm() // 06a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21610,7 +21616,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21666,6 +21671,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -21831,7 +21837,6 @@ void m68000_device::addi_l_imm32_adr16_ipm() // 06b8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -21887,6 +21892,7 @@ void m68000_device::addi_l_imm32_adr16_ipm() // 06b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -22076,7 +22082,6 @@ void m68000_device::addi_l_imm32_adr32_ipm() // 06b9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22132,6 +22137,7 @@ void m68000_device::addi_l_imm32_adr32_ipm() // 06b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -22197,7 +22203,6 @@ void m68000_device::btst_imm8_ds_ipm() // 0800 fff8 // 3e7 btsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -22238,6 +22243,7 @@ void m68000_device::btst_imm8_ds_ipm() // 0800 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -22252,6 +22258,7 @@ bcsr4: btsr3: // 044 btsr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); @@ -22324,7 +22331,6 @@ void m68000_device::btst_imm8_ais_ipm() // 0810 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22332,6 +22338,7 @@ void m68000_device::btst_imm8_ais_ipm() // 0810 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22427,7 +22434,6 @@ void m68000_device::btst_imm8_aips_ipm() // 0818 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22435,6 +22441,7 @@ void m68000_device::btst_imm8_aips_ipm() // 0818 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22532,7 +22539,6 @@ void m68000_device::btst_imm8_pais_ipm() // 0820 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22540,6 +22546,7 @@ void m68000_device::btst_imm8_pais_ipm() // 0820 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22656,7 +22663,6 @@ void m68000_device::btst_imm8_das_ipm() // 0828 fff8 // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22664,6 +22670,7 @@ void m68000_device::btst_imm8_das_ipm() // 0828 fff8 sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22823,7 +22830,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22831,6 +22837,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -22946,7 +22953,6 @@ void m68000_device::btst_imm8_adr16_ipm() // 0838 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -22954,6 +22960,7 @@ void m68000_device::btst_imm8_adr16_ipm() // 0838 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23094,7 +23101,6 @@ void m68000_device::btst_imm8_adr32_ipm() // 0839 ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23102,6 +23108,7 @@ void m68000_device::btst_imm8_adr32_ipm() // 0839 ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23217,7 +23224,6 @@ void m68000_device::btst_imm8_dpc_ipm() // 083a ffff // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23225,6 +23231,7 @@ void m68000_device::btst_imm8_dpc_ipm() // 083a ffff sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23383,7 +23390,6 @@ adsw2: // 215 btsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -23391,6 +23397,7 @@ adsw2: sr_z(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23457,7 +23464,6 @@ void m68000_device::bchg_imm8_ds_ipm() // 0840 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -23498,6 +23504,7 @@ void m68000_device::bchg_imm8_ds_ipm() // 0840 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23517,6 +23524,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -23590,7 +23598,6 @@ void m68000_device::bchg_imm8_ais_ipm() // 0850 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23620,6 +23627,7 @@ void m68000_device::bchg_imm8_ais_ipm() // 0850 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23710,7 +23718,6 @@ void m68000_device::bchg_imm8_aips_ipm() // 0858 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23740,6 +23747,7 @@ void m68000_device::bchg_imm8_aips_ipm() // 0858 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23832,7 +23840,6 @@ void m68000_device::bchg_imm8_pais_ipm() // 0860 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -23862,6 +23869,7 @@ void m68000_device::bchg_imm8_pais_ipm() // 0860 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -23973,7 +23981,6 @@ void m68000_device::bchg_imm8_das_ipm() // 0868 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24003,6 +24010,7 @@ void m68000_device::bchg_imm8_das_ipm() // 0868 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24157,7 +24165,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24187,6 +24194,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24297,7 +24305,6 @@ void m68000_device::bchg_imm8_adr16_ipm() // 0878 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24327,6 +24334,7 @@ void m68000_device::bchg_imm8_adr16_ipm() // 0878 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -24462,7 +24470,6 @@ void m68000_device::bchg_imm8_adr32_ipm() // 0879 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -24492,6 +24499,7 @@ void m68000_device::bchg_imm8_adr32_ipm() // 0879 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -24553,7 +24561,6 @@ void m68000_device::bclr_imm8_ds_ipm() // 0880 fff8 // 3eb bclr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -24598,6 +24605,7 @@ bclr4: m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24621,6 +24629,7 @@ bclr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -24694,7 +24703,6 @@ void m68000_device::bclr_imm8_ais_ipm() // 0890 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24728,6 +24736,7 @@ void m68000_device::bclr_imm8_ais_ipm() // 0890 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24818,7 +24827,6 @@ void m68000_device::bclr_imm8_aips_ipm() // 0898 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24852,6 +24860,7 @@ void m68000_device::bclr_imm8_aips_ipm() // 0898 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -24944,7 +24953,6 @@ void m68000_device::bclr_imm8_pais_ipm() // 08a0 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -24978,6 +24986,7 @@ void m68000_device::bclr_imm8_pais_ipm() // 08a0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25089,7 +25098,6 @@ void m68000_device::bclr_imm8_das_ipm() // 08a8 fff8 // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25123,6 +25131,7 @@ void m68000_device::bclr_imm8_das_ipm() // 08a8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25277,7 +25286,6 @@ adsw2: // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25311,6 +25319,7 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25421,7 +25430,6 @@ void m68000_device::bclr_imm8_adr16_ipm() // 08b8 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25455,6 +25463,7 @@ void m68000_device::bclr_imm8_adr16_ipm() // 08b8 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -25590,7 +25599,6 @@ void m68000_device::bclr_imm8_adr32_ipm() // 08b9 ffff // 069 bclm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_dbin; m_ftu = m_sr; // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 @@ -25624,6 +25632,7 @@ void m68000_device::bclr_imm8_adr32_ipm() // 08b9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -25685,7 +25694,6 @@ void m68000_device::bset_imm8_ds_ipm() // 08c0 fff8 // 3ef bcsr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_dt; m_at = m_dt; @@ -25726,6 +25734,7 @@ void m68000_device::bset_imm8_ds_ipm() // 08c0 fff8 bcsr4: // 0c4 bcsr4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25745,6 +25754,7 @@ bcsr3: m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); @@ -25818,7 +25828,6 @@ void m68000_device::bset_imm8_ais_ipm() // 08d0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -25848,6 +25857,7 @@ void m68000_device::bset_imm8_ais_ipm() // 08d0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -25938,7 +25948,6 @@ void m68000_device::bset_imm8_aips_ipm() // 08d8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -25968,6 +25977,7 @@ void m68000_device::bset_imm8_aips_ipm() // 08d8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26060,7 +26070,6 @@ void m68000_device::bset_imm8_pais_ipm() // 08e0 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26090,6 +26099,7 @@ void m68000_device::bset_imm8_pais_ipm() // 08e0 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26201,7 +26211,6 @@ void m68000_device::bset_imm8_das_ipm() // 08e8 fff8 // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26231,6 +26240,7 @@ void m68000_device::bset_imm8_das_ipm() // 08e8 fff8 // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26385,7 +26395,6 @@ adsw2: // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26415,146 +26424,147 @@ adsw2: // 082 bcsm2 m_aob = m_at; m_ird = m_ir; - set_8xl(m_dbout, m_aluo); - m_base_ssw = SSW_DATA; - [[fallthrough]]; case 9: - m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 9; - } else - m_inst_substate = 10; - return; - } - [[fallthrough]]; case 10: - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 - alu_and8(m_alub, 1 << (m_dcr & 7)); - sr_z(); - set_ftu_const(); - m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; - m_inst_substate = 0; - if(m_sr & SR_T) - m_next_state = S_TRACE; - return; - } -} - -void m68000_device::bset_imm8_adr16_ipm() // 08f8 ffff -{ - switch(m_inst_substate) { - case 0: - // 2b9 o#w1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 1: - m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 1; - } else - m_inst_substate = 2; - return; - } - [[fallthrough]]; case 2: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - set_16l(m_dt, m_dbin); - m_irc = m_edb; - m_au = m_au + 2; - m_dbin = m_edb; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none - // 00a abwl1 - m_aob = m_au; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 3: - m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 3; - } else - m_inst_substate = 4; - return; - } - [[fallthrough]]; case 4: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_pc = m_au; - m_dcr = m_dt; - m_at = ext32(m_dbin); - m_irc = m_edb; - m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin - alu_or8(m_dt, m_dbin); - m_dbin = m_edb; - // 004 abll3 - m_aob = m_at; - m_base_ssw = SSW_DATA | SSW_R; - [[fallthrough]]; case 5: - m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); - if(!(m_aob & 1)) - m_edb >>= 8; - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 5; - } else - m_inst_substate = 6; - return; - } - [[fallthrough]]; case 6: - m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 - alu_and8(m_dbin, 0xffff); - m_dbin = m_edb; - // 081 bcsm1 - m_aob = m_au; - m_ir = m_irc; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - m_base_ssw = SSW_PROGRAM | SSW_R; - [[fallthrough]]; case 7: - m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); - m_icount -= 4; - if(m_icount <= m_bcount) { - if(access_to_be_redone()) { - m_icount += 4; - m_inst_substate = 7; - } else - m_inst_substate = 8; - return; - } - [[fallthrough]]; case 8: - if(m_aob & 1) { - m_icount -= 4; - m_inst_state = S_ADDRESS_ERROR; - m_inst_substate = 0; - return; - } - m_alub = m_dbin; - m_pc = m_au; - m_irc = m_edb; - m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 - alu_or8(m_dbin, 1 << (m_dcr & 7)); - m_dbin = m_edb; - // 082 bcsm2 - m_aob = m_at; - m_ird = m_ir; + set_8xl(m_dbout, m_aluo); + m_base_ssw = SSW_DATA; + [[fallthrough]]; case 9: + m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 9; + } else + m_inst_substate = 10; + return; + } + [[fallthrough]]; case 10: + // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + alu_and8(m_alub, 1 << (m_dcr & 7)); + sr_z(); + set_ftu_const(); + m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; + m_inst_substate = 0; + if(m_sr & SR_T) + m_next_state = S_TRACE; + return; + } +} + +void m68000_device::bset_imm8_adr16_ipm() // 08f8 ffff +{ + switch(m_inst_substate) { + case 0: + // 2b9 o#w1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 1: + m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 1; + } else + m_inst_substate = 2; + return; + } + [[fallthrough]]; case 2: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + set_16l(m_dt, m_dbin); + m_irc = m_edb; + m_au = m_au + 2; + m_dbin = m_edb; + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // 00a abwl1 + m_aob = m_au; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 3: + m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 3; + } else + m_inst_substate = 4; + return; + } + [[fallthrough]]; case 4: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_pc = m_au; + m_dcr = m_dt; + m_at = ext32(m_dbin); + m_irc = m_edb; + m_au = ext32(m_dbin); + // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + alu_or8(m_dt, m_dbin); + m_dbin = m_edb; + // 004 abll3 + m_aob = m_at; + m_base_ssw = SSW_DATA | SSW_R; + [[fallthrough]]; case 5: + m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); + if(!(m_aob & 1)) + m_edb >>= 8; + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 5; + } else + m_inst_substate = 6; + return; + } + [[fallthrough]]; case 6: + m_au = m_pc + 2; + // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + alu_and8(m_dbin, 0xffff); + m_dbin = m_edb; + // 081 bcsm1 + m_aob = m_au; + m_ir = m_irc; + m_base_ssw = SSW_PROGRAM | SSW_R; + [[fallthrough]]; case 7: + m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); + m_icount -= 4; + if(m_icount <= m_bcount) { + if(access_to_be_redone()) { + m_icount += 4; + m_inst_substate = 7; + } else + m_inst_substate = 8; + return; + } + [[fallthrough]]; case 8: + if(m_aob & 1) { + m_icount -= 4; + m_inst_state = S_ADDRESS_ERROR; + m_inst_substate = 0; + return; + } + m_alub = m_dbin; + m_pc = m_au; + m_irc = m_edb; + m_au = m_au + 2; + // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + alu_or8(m_dbin, 1 << (m_dcr & 7)); + m_dbin = m_edb; + // 082 bcsm2 + m_aob = m_at; + m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -26690,7 +26700,6 @@ void m68000_device::bset_imm8_adr32_ipm() // 08f9 ffff // 081 bcsm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26720,6 +26729,7 @@ void m68000_device::bset_imm8_adr32_ipm() // 08f9 ffff // 082 bcsm2 m_aob = m_at; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -26781,13 +26791,13 @@ void m68000_device::eori_b_imm8_ds_ipm() // 0a00 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26880,7 +26890,6 @@ void m68000_device::eori_b_imm8_ais_ipm() // 0a10 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -26910,6 +26919,7 @@ void m68000_device::eori_b_imm8_ais_ipm() // 0a10 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -26999,7 +27009,6 @@ void m68000_device::eori_b_imm8_aips_ipm() // 0a18 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27029,6 +27038,7 @@ void m68000_device::eori_b_imm8_aips_ipm() // 0a18 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27120,7 +27130,6 @@ void m68000_device::eori_b_imm8_pais_ipm() // 0a20 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27150,6 +27159,7 @@ void m68000_device::eori_b_imm8_pais_ipm() // 0a20 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -27260,7 +27270,6 @@ void m68000_device::eori_b_imm8_das_ipm() // 0a28 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27290,6 +27299,7 @@ void m68000_device::eori_b_imm8_das_ipm() // 0a28 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27443,7 +27453,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27473,6 +27482,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27582,7 +27592,6 @@ void m68000_device::eori_b_imm8_adr16_ipm() // 0a38 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27612,6 +27621,7 @@ void m68000_device::eori_b_imm8_adr16_ipm() // 0a38 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -27746,7 +27756,6 @@ void m68000_device::eori_b_imm8_adr32_ipm() // 0a39 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27776,6 +27785,7 @@ void m68000_device::eori_b_imm8_adr32_ipm() // 0a39 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -27882,12 +27892,12 @@ void m68000_device::eori_imm8_ccr_ipm() // 0a3c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -27954,13 +27964,13 @@ void m68000_device::eori_w_imm16_ds_ipm() // 0a40 fff8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28057,7 +28067,6 @@ void m68000_device::eori_w_imm16_ais_ipm() // 0a50 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28087,6 +28096,7 @@ void m68000_device::eori_w_imm16_ais_ipm() // 0a50 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28186,7 +28196,6 @@ void m68000_device::eori_w_imm16_aips_ipm() // 0a58 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28216,6 +28225,7 @@ void m68000_device::eori_w_imm16_aips_ipm() // 0a58 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28317,7 +28327,6 @@ void m68000_device::eori_w_imm16_pais_ipm() // 0a60 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28347,6 +28356,7 @@ void m68000_device::eori_w_imm16_pais_ipm() // 0a60 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -28467,7 +28477,6 @@ void m68000_device::eori_w_imm16_das_ipm() // 0a68 fff8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28497,6 +28506,7 @@ void m68000_device::eori_w_imm16_das_ipm() // 0a68 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28660,7 +28670,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28690,6 +28699,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28809,7 +28819,6 @@ void m68000_device::eori_w_imm16_adr16_ipm() // 0a78 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -28839,6 +28848,7 @@ void m68000_device::eori_w_imm16_adr16_ipm() // 0a78 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -28983,7 +28993,6 @@ void m68000_device::eori_w_imm16_adr32_ipm() // 0a79 ffff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29013,6 +29022,7 @@ void m68000_device::eori_w_imm16_adr32_ipm() // 0a79 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -29131,12 +29141,12 @@ void m68000_device::eori_i16u_sr_ipm() // 0a7c ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29228,7 +29238,6 @@ void m68000_device::eori_l_imm32_ds_ipm() // 0a80 fff8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_eor(m_dt, m_da[ry]); @@ -29264,6 +29273,7 @@ void m68000_device::eori_l_imm32_ds_ipm() // 0a80 fff8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -29389,7 +29399,6 @@ void m68000_device::eori_l_imm32_ais_ipm() // 0a90 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29445,6 +29454,7 @@ void m68000_device::eori_l_imm32_ais_ipm() // 0a90 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29592,7 +29602,6 @@ void m68000_device::eori_l_imm32_aips_ipm() // 0a98 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29648,6 +29657,7 @@ void m68000_device::eori_l_imm32_aips_ipm() // 0a98 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -29796,7 +29806,6 @@ void m68000_device::eori_l_imm32_pais_ipm() // 0aa0 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -29852,6 +29861,7 @@ void m68000_device::eori_l_imm32_pais_ipm() // 0aa0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -30020,7 +30030,6 @@ void m68000_device::eori_l_imm32_das_ipm() // 0aa8 fff8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30076,6 +30085,7 @@ void m68000_device::eori_l_imm32_das_ipm() // 0aa8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30287,7 +30297,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30343,6 +30352,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30514,7 +30524,6 @@ void m68000_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30570,6 +30579,7 @@ void m68000_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: @@ -30766,7 +30776,6 @@ void m68000_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30822,6 +30831,7 @@ void m68000_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -30887,13 +30897,13 @@ void m68000_device::cmpi_b_imm8_ds_ipm() // 0c00 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -30982,7 +30992,6 @@ void m68000_device::cmpi_b_imm8_ais_ipm() // 0c10 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -30990,6 +30999,7 @@ void m68000_device::cmpi_b_imm8_ais_ipm() // 0c10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31081,7 +31091,6 @@ void m68000_device::cmpi_b_imm8_aips_ipm() // 0c18 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31089,6 +31098,7 @@ void m68000_device::cmpi_b_imm8_aips_ipm() // 0c18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31182,7 +31192,6 @@ void m68000_device::cmpi_b_imm8_pais_ipm() // 0c20 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31190,6 +31199,7 @@ void m68000_device::cmpi_b_imm8_pais_ipm() // 0c20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31302,7 +31312,6 @@ void m68000_device::cmpi_b_imm8_das_ipm() // 0c28 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31310,6 +31319,7 @@ void m68000_device::cmpi_b_imm8_das_ipm() // 0c28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31463,7 +31473,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31471,6 +31480,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31582,7 +31592,6 @@ void m68000_device::cmpi_b_imm8_adr16_ipm() // 0c38 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31590,6 +31599,7 @@ void m68000_device::cmpi_b_imm8_adr16_ipm() // 0c38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31725,7 +31735,6 @@ void m68000_device::cmpi_b_imm8_adr32_ipm() // 0c39 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31733,6 +31742,7 @@ void m68000_device::cmpi_b_imm8_adr32_ipm() // 0c39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31797,13 +31807,13 @@ void m68000_device::cmpi_w_imm16_ds_ipm() // 0c40 fff8 // 108 rcaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31896,7 +31906,6 @@ void m68000_device::cmpi_w_imm16_ais_ipm() // 0c50 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -31904,6 +31913,7 @@ void m68000_device::cmpi_w_imm16_ais_ipm() // 0c50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -31999,7 +32009,6 @@ void m68000_device::cmpi_w_imm16_aips_ipm() // 0c58 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32007,6 +32016,7 @@ void m68000_device::cmpi_w_imm16_aips_ipm() // 0c58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32104,7 +32114,6 @@ void m68000_device::cmpi_w_imm16_pais_ipm() // 0c60 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32112,6 +32121,7 @@ void m68000_device::cmpi_w_imm16_pais_ipm() // 0c60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32228,7 +32238,6 @@ void m68000_device::cmpi_w_imm16_das_ipm() // 0c68 fff8 // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32236,6 +32245,7 @@ void m68000_device::cmpi_w_imm16_das_ipm() // 0c68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32393,7 +32403,6 @@ adsw2: // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32401,6 +32410,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32516,7 +32526,6 @@ void m68000_device::cmpi_w_imm16_adr16_ipm() // 0c78 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32524,6 +32533,7 @@ void m68000_device::cmpi_w_imm16_adr16_ipm() // 0c78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32663,7 +32673,6 @@ void m68000_device::cmpi_w_imm16_adr32_ipm() // 0c79 ffff // 087 cpdw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32671,6 +32680,7 @@ void m68000_device::cmpi_w_imm16_adr32_ipm() // 0c79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -32760,7 +32770,6 @@ void m68000_device::cmpi_l_imm32_ds_ipm() // 0c80 fff8 // 104 rcal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] alu_sub(m_dt, m_da[ry]); @@ -32792,6 +32801,7 @@ void m68000_device::cmpi_l_imm32_ds_ipm() // 0c80 fff8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -32912,7 +32922,6 @@ void m68000_device::cmpi_l_imm32_ais_ipm() // 0c90 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -32920,6 +32929,7 @@ void m68000_device::cmpi_l_imm32_ais_ipm() // 0c90 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33065,7 +33075,6 @@ void m68000_device::cmpi_l_imm32_aips_ipm() // 0c98 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33073,6 +33082,7 @@ void m68000_device::cmpi_l_imm32_aips_ipm() // 0c98 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33219,7 +33229,6 @@ void m68000_device::cmpi_l_imm32_pais_ipm() // 0ca0 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33227,6 +33236,7 @@ void m68000_device::cmpi_l_imm32_pais_ipm() // 0ca0 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33393,7 +33403,6 @@ void m68000_device::cmpi_l_imm32_das_ipm() // 0ca8 fff8 // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33401,6 +33410,7 @@ void m68000_device::cmpi_l_imm32_das_ipm() // 0ca8 fff8 sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33608,7 +33618,6 @@ adsl2: // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33616,6 +33625,7 @@ adsl2: sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33784,7 +33794,6 @@ void m68000_device::cmpi_l_imm32_adr16_ipm() // 0cb8 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33792,6 +33801,7 @@ void m68000_device::cmpi_l_imm32_adr16_ipm() // 0cb8 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -33984,7 +33994,6 @@ void m68000_device::cmpi_l_imm32_adr32_ipm() // 0cb9 ffff // 08f cpdl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin @@ -33992,6 +34001,7 @@ void m68000_device::cmpi_l_imm32_adr32_ipm() // 0cb9 ffff sr_nzvc(); // 171 cpdl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34034,7 +34044,6 @@ void m68000_device::move_b_ds_dd_ipm() // 1000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -34043,6 +34052,7 @@ void m68000_device::move_b_ds_dd_ipm() // 1000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34107,7 +34117,6 @@ void m68000_device::move_b_ais_dd_ipm() // 1010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34116,6 +34125,7 @@ void m68000_device::move_b_ais_dd_ipm() // 1010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34182,7 +34192,6 @@ void m68000_device::move_b_aips_dd_ipm() // 1018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34191,6 +34200,7 @@ void m68000_device::move_b_aips_dd_ipm() // 1018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34259,7 +34269,6 @@ void m68000_device::move_b_pais_dd_ipm() // 1020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34268,6 +34277,7 @@ void m68000_device::move_b_pais_dd_ipm() // 1020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34355,7 +34365,6 @@ void m68000_device::move_b_das_dd_ipm() // 1028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34364,6 +34373,7 @@ void m68000_device::move_b_das_dd_ipm() // 1028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34492,7 +34502,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34501,6 +34510,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34587,7 +34597,6 @@ void m68000_device::move_b_adr16_dd_ipm() // 1038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34596,6 +34605,7 @@ void m68000_device::move_b_adr16_dd_ipm() // 1038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34706,7 +34716,6 @@ void m68000_device::move_b_adr32_dd_ipm() // 1039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34715,6 +34724,7 @@ void m68000_device::move_b_adr32_dd_ipm() // 1039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34801,7 +34811,6 @@ void m68000_device::move_b_dpc_dd_ipm() // 103a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34810,6 +34819,7 @@ void m68000_device::move_b_dpc_dd_ipm() // 103a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -34937,7 +34947,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; @@ -34946,6 +34955,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35011,7 +35021,6 @@ void m68000_device::move_b_imm8_dd_ipm() // 103c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -35020,6 +35029,7 @@ void m68000_device::move_b_imm8_dd_ipm() // 103c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35061,7 +35071,6 @@ void m68000_device::move_b_ds_aid_ipm() // 1080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -35084,10 +35093,10 @@ void m68000_device::move_b_ds_aid_ipm() // 1080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35171,10 +35180,10 @@ void m68000_device::move_b_ais_aid_ipm() // 1090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35262,10 +35271,10 @@ void m68000_device::move_b_aips_aid_ipm() // 1098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35355,10 +35364,10 @@ void m68000_device::move_b_pais_aid_ipm() // 10a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35467,10 +35476,10 @@ void m68000_device::move_b_das_aid_ipm() // 10a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35620,10 +35629,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35731,10 +35740,10 @@ void m68000_device::move_b_adr16_aid_ipm() // 10b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35866,10 +35875,10 @@ void m68000_device::move_b_adr32_aid_ipm() // 10b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -35977,10 +35986,10 @@ void m68000_device::move_b_dpc_aid_ipm() // 10ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36129,10 +36138,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36198,7 +36207,6 @@ void m68000_device::move_b_imm8_aid_ipm() // 10bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36221,10 +36229,10 @@ void m68000_device::move_b_imm8_aid_ipm() // 10bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36264,7 +36272,6 @@ void m68000_device::move_b_ds_aipd_ipm() // 10c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -36287,6 +36294,7 @@ void m68000_device::move_b_ds_aipd_ipm() // 10c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36351,7 +36359,6 @@ void m68000_device::move_b_ais_aipd_ipm() // 10d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36374,6 +36381,7 @@ void m68000_device::move_b_ais_aipd_ipm() // 10d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36442,7 +36450,6 @@ void m68000_device::move_b_aips_aipd_ipm() // 10d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36465,6 +36472,7 @@ void m68000_device::move_b_aips_aipd_ipm() // 10d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36535,7 +36543,6 @@ void m68000_device::move_b_pais_aipd_ipm() // 10e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -36558,6 +36565,7 @@ void m68000_device::move_b_pais_aipd_ipm() // 10e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36647,7 +36655,6 @@ void m68000_device::move_b_das_aipd_ipm() // 10e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36670,6 +36677,7 @@ void m68000_device::move_b_das_aipd_ipm() // 10e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36800,7 +36808,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36823,6 +36830,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -36911,7 +36919,6 @@ void m68000_device::move_b_adr16_aipd_ipm() // 10f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -36934,6 +36941,7 @@ void m68000_device::move_b_adr16_aipd_ipm() // 10f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37046,7 +37054,6 @@ void m68000_device::move_b_adr32_aipd_ipm() // 10f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37069,6 +37076,7 @@ void m68000_device::move_b_adr32_aipd_ipm() // 10f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37157,7 +37165,6 @@ void m68000_device::move_b_dpc_aipd_ipm() // 10fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37180,6 +37187,7 @@ void m68000_device::move_b_dpc_aipd_ipm() // 10fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37309,7 +37317,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dbin); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37332,6 +37339,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37399,7 +37407,6 @@ void m68000_device::move_b_imm8_aipd_ipm() // 10fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37422,6 +37429,7 @@ void m68000_device::move_b_imm8_aipd_ipm() // 10fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37463,7 +37471,6 @@ void m68000_device::move_b_ds_paid_ipm() // 1100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37493,6 +37500,7 @@ void m68000_device::move_b_ds_paid_ipm() // 1100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -37550,7 +37558,6 @@ void m68000_device::move_b_ais_paid_ipm() // 1110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37580,6 +37587,7 @@ void m68000_device::move_b_ais_paid_ipm() // 1110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37641,7 +37649,6 @@ void m68000_device::move_b_aips_paid_ipm() // 1118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37671,6 +37678,7 @@ void m68000_device::move_b_aips_paid_ipm() // 1118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37734,7 +37742,6 @@ void m68000_device::move_b_pais_paid_ipm() // 1120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37764,6 +37771,7 @@ void m68000_device::move_b_pais_paid_ipm() // 1120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -37846,7 +37854,6 @@ void m68000_device::move_b_das_paid_ipm() // 1128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -37876,6 +37883,7 @@ void m68000_device::move_b_das_paid_ipm() // 1128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -37999,7 +38007,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38029,6 +38036,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38110,7 +38118,6 @@ void m68000_device::move_b_adr16_paid_ipm() // 1138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38140,6 +38147,7 @@ void m68000_device::move_b_adr16_paid_ipm() // 1138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38245,7 +38253,6 @@ void m68000_device::move_b_adr32_paid_ipm() // 1139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38275,6 +38282,7 @@ void m68000_device::move_b_adr32_paid_ipm() // 1139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -38356,7 +38364,6 @@ void m68000_device::move_b_dpc_paid_ipm() // 113a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38386,6 +38393,7 @@ void m68000_device::move_b_dpc_paid_ipm() // 113a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38508,7 +38516,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38538,6 +38545,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -38598,7 +38606,6 @@ void m68000_device::move_b_imm8_paid_ipm() // 113c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38628,6 +38635,7 @@ void m68000_device::move_b_imm8_paid_ipm() // 113c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38686,7 +38694,6 @@ void m68000_device::move_b_ds_dad_ipm() // 1140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -38708,11 +38715,11 @@ void m68000_device::move_b_ds_dad_ipm() // 1140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38802,6 +38809,7 @@ void m68000_device::move_b_ais_dad_ipm() // 1150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38823,11 +38831,11 @@ void m68000_device::move_b_ais_dad_ipm() // 1150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -38921,6 +38929,7 @@ void m68000_device::move_b_aips_dad_ipm() // 1158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -38942,11 +38951,11 @@ void m68000_device::move_b_aips_dad_ipm() // 1158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39042,6 +39051,7 @@ void m68000_device::move_b_pais_dad_ipm() // 1160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -39063,11 +39073,11 @@ void m68000_device::move_b_pais_dad_ipm() // 1160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39182,6 +39192,7 @@ void m68000_device::move_b_das_dad_ipm() // 1168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39203,11 +39214,11 @@ void m68000_device::move_b_das_dad_ipm() // 1168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39363,6 +39374,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39384,11 +39396,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39502,6 +39514,7 @@ void m68000_device::move_b_adr16_dad_ipm() // 1178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39523,11 +39536,11 @@ void m68000_device::move_b_adr16_dad_ipm() // 1178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39665,6 +39678,7 @@ void m68000_device::move_b_adr32_dad_ipm() // 1179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -39686,11 +39700,11 @@ void m68000_device::move_b_adr32_dad_ipm() // 1179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39804,6 +39818,7 @@ void m68000_device::move_b_dpc_dad_ipm() // 117a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -39825,11 +39840,11 @@ void m68000_device::move_b_dpc_dad_ipm() // 117a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -39984,6 +39999,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40005,11 +40021,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40099,7 +40115,6 @@ void m68000_device::move_b_imm8_dad_ipm() // 117c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40121,11 +40136,11 @@ void m68000_device::move_b_imm8_dad_ipm() // 117c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40231,7 +40246,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_da[ry]); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -40253,11 +40267,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40388,6 +40402,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40409,11 +40424,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40548,6 +40563,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40569,11 +40585,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40710,6 +40726,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -40731,11 +40748,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -40891,6 +40908,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -40912,11 +40930,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41113,6 +41131,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41134,11 +41153,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41293,6 +41312,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41314,11 +41334,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41497,6 +41517,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -41518,11 +41539,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41677,6 +41698,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41698,11 +41720,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -41898,6 +41920,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -41919,11 +41942,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42055,7 +42078,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_dt); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42077,11 +42099,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42148,6 +42170,7 @@ void m68000_device::move_b_ds_adr16_ipm() // 11c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -42169,11 +42192,11 @@ void m68000_device::move_b_ds_adr16_ipm() // 11c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42262,6 +42285,7 @@ void m68000_device::move_b_ais_adr16_ipm() // 11d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42283,11 +42307,11 @@ void m68000_device::move_b_ais_adr16_ipm() // 11d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42380,6 +42404,7 @@ void m68000_device::move_b_aips_adr16_ipm() // 11d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42401,11 +42426,11 @@ void m68000_device::move_b_aips_adr16_ipm() // 11d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42500,6 +42525,7 @@ void m68000_device::move_b_pais_adr16_ipm() // 11e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -42521,11 +42547,11 @@ void m68000_device::move_b_pais_adr16_ipm() // 11e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42639,6 +42665,7 @@ void m68000_device::move_b_das_adr16_ipm() // 11e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42660,11 +42687,11 @@ void m68000_device::move_b_das_adr16_ipm() // 11e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42819,6 +42846,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42840,11 +42868,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -42957,6 +42985,7 @@ void m68000_device::move_b_adr16_adr16_ipm() // 11f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -42978,11 +43007,11 @@ void m68000_device::move_b_adr16_adr16_ipm() // 11f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43119,6 +43148,7 @@ void m68000_device::move_b_adr32_adr16_ipm() // 11f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -43140,11 +43170,11 @@ void m68000_device::move_b_adr32_adr16_ipm() // 11f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43257,6 +43287,7 @@ void m68000_device::move_b_dpc_adr16_ipm() // 11fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43278,11 +43309,11 @@ void m68000_device::move_b_dpc_adr16_ipm() // 11fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43436,6 +43467,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -43457,11 +43489,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43554,6 +43586,7 @@ void m68000_device::move_b_imm8_adr16_ipm() // 11fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43575,11 +43608,11 @@ void m68000_device::move_b_imm8_adr16_ipm() // 11fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43670,6 +43703,7 @@ void m68000_device::move_b_ds_adr32_ipm() // 13c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43691,11 +43725,11 @@ void m68000_device::move_b_ds_adr32_ipm() // 13c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43784,7 +43818,6 @@ void m68000_device::move_b_ais_adr32_ipm() // 13d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43830,11 +43863,11 @@ void m68000_device::move_b_ais_adr32_ipm() // 13d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -43927,7 +43960,6 @@ void m68000_device::move_b_aips_adr32_ipm() // 13d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -43973,11 +44005,11 @@ void m68000_device::move_b_aips_adr32_ipm() // 13d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44072,7 +44104,6 @@ void m68000_device::move_b_pais_adr32_ipm() // 13e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -44118,11 +44149,11 @@ void m68000_device::move_b_pais_adr32_ipm() // 13e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44236,7 +44267,6 @@ void m68000_device::move_b_das_adr32_ipm() // 13e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44282,11 +44312,11 @@ void m68000_device::move_b_das_adr32_ipm() // 13e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44441,7 +44471,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44487,11 +44516,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44604,7 +44633,6 @@ void m68000_device::move_b_adr16_adr32_ipm() // 13f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -44650,11 +44678,11 @@ void m68000_device::move_b_adr16_adr32_ipm() // 13f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44791,7 +44819,6 @@ void m68000_device::move_b_adr32_adr32_ipm() // 13f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -44837,11 +44864,11 @@ void m68000_device::move_b_adr32_adr32_ipm() // 13f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -44954,7 +44981,6 @@ void m68000_device::move_b_dpc_adr32_ipm() // 13fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45000,11 +45026,11 @@ void m68000_device::move_b_dpc_adr32_ipm() // 13fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45158,7 +45184,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45204,11 +45229,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45325,6 +45350,7 @@ void m68000_device::move_b_imm8_adr32_ipm() // 13fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -45346,11 +45372,11 @@ void m68000_device::move_b_imm8_adr32_ipm() // 13fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45390,7 +45416,6 @@ void m68000_device::move_l_ds_dd_ipm() // 2000 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45399,6 +45424,7 @@ void m68000_device::move_l_ds_dd_ipm() // 2000 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45442,7 +45468,6 @@ void m68000_device::move_l_as_dd_ipm() // 2008 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -45451,6 +45476,7 @@ void m68000_device::move_l_as_dd_ipm() // 2008 f1f8 sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45545,7 +45571,6 @@ void m68000_device::move_l_ais_dd_ipm() // 2010 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45554,6 +45579,7 @@ void m68000_device::move_l_ais_dd_ipm() // 2010 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45651,7 +45677,6 @@ void m68000_device::move_l_aips_dd_ipm() // 2018 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45660,6 +45685,7 @@ void m68000_device::move_l_aips_dd_ipm() // 2018 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45758,7 +45784,6 @@ void m68000_device::move_l_pais_dd_ipm() // 2020 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45767,6 +45792,7 @@ void m68000_device::move_l_pais_dd_ipm() // 2020 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -45885,7 +45911,6 @@ void m68000_device::move_l_das_dd_ipm() // 2028 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -45894,6 +45919,7 @@ void m68000_device::move_l_das_dd_ipm() // 2028 f1f8 sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46053,7 +46079,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46062,6 +46087,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46182,7 +46208,6 @@ void m68000_device::move_l_adr16_dd_ipm() // 2038 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46191,6 +46216,7 @@ void m68000_device::move_l_adr16_dd_ipm() // 2038 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46335,7 +46361,6 @@ void m68000_device::move_l_adr32_dd_ipm() // 2039 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46344,6 +46369,7 @@ void m68000_device::move_l_adr32_dd_ipm() // 2039 f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46461,7 +46487,6 @@ void m68000_device::move_l_dpc_dd_ipm() // 203a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46470,6 +46495,7 @@ void m68000_device::move_l_dpc_dd_ipm() // 203a f1ff sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46628,7 +46654,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46637,6 +46662,7 @@ adsl2: sr_nzvc(); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46730,7 +46756,6 @@ void m68000_device::move_l_imm32_dd_ipm() // 203c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -46739,6 +46764,7 @@ void m68000_device::move_l_imm32_dd_ipm() // 203c f1ff sr_nzvc(); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46782,7 +46808,6 @@ void m68000_device::movea_l_ds_ad_ipm() // 2040 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46790,6 +46815,7 @@ void m68000_device::movea_l_ds_ad_ipm() // 2040 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46832,7 +46858,6 @@ void m68000_device::movea_l_as_ad_ipm() // 2048 f1f8 // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -46840,6 +46865,7 @@ void m68000_device::movea_l_as_ad_ipm() // 2048 f1f8 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -46933,7 +46959,6 @@ void m68000_device::movea_l_ais_ad_ipm() // 2050 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -46941,6 +46966,7 @@ void m68000_device::movea_l_ais_ad_ipm() // 2050 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47037,7 +47063,6 @@ void m68000_device::movea_l_aips_ad_ipm() // 2058 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47045,6 +47070,7 @@ void m68000_device::movea_l_aips_ad_ipm() // 2058 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47142,7 +47168,6 @@ void m68000_device::movea_l_pais_ad_ipm() // 2060 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47150,6 +47175,7 @@ void m68000_device::movea_l_pais_ad_ipm() // 2060 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47267,7 +47293,6 @@ void m68000_device::movea_l_das_ad_ipm() // 2068 f1f8 // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47275,6 +47300,7 @@ void m68000_device::movea_l_das_ad_ipm() // 2068 f1f8 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47433,7 +47459,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47441,6 +47466,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47560,7 +47586,6 @@ void m68000_device::movea_l_adr16_ad_ipm() // 2078 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47568,6 +47593,7 @@ void m68000_device::movea_l_adr16_ad_ipm() // 2078 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47711,7 +47737,6 @@ void m68000_device::movea_l_adr32_ad_ipm() // 2079 f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47719,6 +47744,7 @@ void m68000_device::movea_l_adr32_ad_ipm() // 2079 f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -47835,7 +47861,6 @@ void m68000_device::movea_l_dpc_ad_ipm() // 207a f1ff // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -47843,6 +47868,7 @@ void m68000_device::movea_l_dpc_ad_ipm() // 207a f1ff alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48000,7 +48026,6 @@ adsl2: // 29f mrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -48008,6 +48033,7 @@ adsl2: alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48100,7 +48126,6 @@ void m68000_device::movea_l_imm32_ad_ipm() // 207c f1ff // 129 rrgl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -48108,6 +48133,7 @@ void m68000_device::movea_l_imm32_ad_ipm() // 207c f1ff alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48175,7 +48201,6 @@ void m68000_device::move_l_ds_aid_ipm() // 2080 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48203,6 +48228,7 @@ void m68000_device::move_l_ds_aid_ipm() // 2080 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48272,7 +48298,6 @@ void m68000_device::move_l_as_aid_ipm() // 2088 f1f8 // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -48300,6 +48325,7 @@ void m68000_device::move_l_as_aid_ipm() // 2088 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48422,7 +48448,6 @@ void m68000_device::move_l_ais_aid_ipm() // 2090 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48450,10 +48475,10 @@ void m68000_device::move_l_ais_aid_ipm() // 2090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48574,7 +48599,6 @@ void m68000_device::move_l_aips_aid_ipm() // 2098 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48602,10 +48626,10 @@ void m68000_device::move_l_aips_aid_ipm() // 2098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48727,7 +48751,6 @@ void m68000_device::move_l_pais_aid_ipm() // 20a0 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -48755,10 +48778,10 @@ void m68000_device::move_l_pais_aid_ipm() // 20a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -48900,7 +48923,6 @@ void m68000_device::move_l_das_aid_ipm() // 20a8 f1f8 // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -48928,10 +48950,10 @@ void m68000_device::move_l_das_aid_ipm() // 20a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49114,7 +49136,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49142,10 +49163,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49289,7 +49310,6 @@ void m68000_device::move_l_adr16_aid_ipm() // 20b8 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49317,10 +49337,10 @@ void m68000_device::move_l_adr16_aid_ipm() // 20b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49488,7 +49508,6 @@ void m68000_device::move_l_adr32_aid_ipm() // 20b9 f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -49516,10 +49535,10 @@ void m68000_device::move_l_adr32_aid_ipm() // 20b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49660,7 +49679,6 @@ void m68000_device::move_l_dpc_aid_ipm() // 20ba f1ff // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49688,10 +49706,10 @@ void m68000_device::move_l_dpc_aid_ipm() // 20ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -49873,7 +49891,6 @@ adsl2: // 3aa mmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -49901,10 +49918,10 @@ adsl2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50019,7 +50036,6 @@ void m68000_device::move_l_imm32_aid_ipm() // 20bc f1ff // 23f rmrl2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50047,6 +50063,7 @@ void m68000_device::move_l_imm32_aid_ipm() // 20bc f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50116,7 +50133,6 @@ void m68000_device::move_l_ds_aipd_ipm() // 20c0 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50144,6 +50160,7 @@ void m68000_device::move_l_ds_aipd_ipm() // 20c0 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50213,7 +50230,6 @@ void m68000_device::move_l_as_aipd_ipm() // 20c8 f1f8 // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -50241,6 +50257,7 @@ void m68000_device::move_l_as_aipd_ipm() // 20c8 f1f8 // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50363,7 +50380,6 @@ void m68000_device::move_l_ais_aipd_ipm() // 20d0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50391,6 +50407,7 @@ void m68000_device::move_l_ais_aipd_ipm() // 20d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50513,7 +50530,6 @@ void m68000_device::move_l_aips_aipd_ipm() // 20d8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50541,6 +50557,7 @@ void m68000_device::move_l_aips_aipd_ipm() // 20d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50664,7 +50681,6 @@ void m68000_device::move_l_pais_aipd_ipm() // 20e0 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -50692,6 +50708,7 @@ void m68000_device::move_l_pais_aipd_ipm() // 20e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -50835,7 +50852,6 @@ void m68000_device::move_l_das_aipd_ipm() // 20e8 f1f8 // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -50863,6 +50879,7 @@ void m68000_device::move_l_das_aipd_ipm() // 20e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51047,7 +51064,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51075,6 +51091,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51220,7 +51237,6 @@ void m68000_device::move_l_adr16_aipd_ipm() // 20f8 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51248,6 +51264,7 @@ void m68000_device::move_l_adr16_aipd_ipm() // 20f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51417,7 +51434,6 @@ void m68000_device::move_l_adr32_aipd_ipm() // 20f9 f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -51445,6 +51461,7 @@ void m68000_device::move_l_adr32_aipd_ipm() // 20f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51587,7 +51604,6 @@ void m68000_device::move_l_dpc_aipd_ipm() // 20fa f1ff // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51615,6 +51631,7 @@ void m68000_device::move_l_dpc_aipd_ipm() // 20fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51798,7 +51815,6 @@ adsl2: // 3ae mmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -51826,6 +51842,7 @@ adsl2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -51942,7 +51959,6 @@ void m68000_device::move_l_imm32_aipd_ipm() // 20fc f1ff // 23c rmil2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -51970,6 +51986,7 @@ void m68000_device::move_l_imm32_aipd_ipm() // 20fc f1ff // 23d rmil3 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52014,7 +52031,6 @@ void m68000_device::move_l_ds_paid_ipm() // 2100 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52070,6 +52086,7 @@ void m68000_device::move_l_ds_paid_ipm() // 2100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52110,7 +52127,6 @@ void m68000_device::move_l_as_paid_ipm() // 2108 f1f8 // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52166,6 +52182,7 @@ void m68000_device::move_l_as_paid_ipm() // 2108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -52257,7 +52274,6 @@ void m68000_device::move_l_ais_paid_ipm() // 2110 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52313,6 +52329,7 @@ void m68000_device::move_l_ais_paid_ipm() // 2110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52407,7 +52424,6 @@ void m68000_device::move_l_aips_paid_ipm() // 2118 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52463,6 +52479,7 @@ void m68000_device::move_l_aips_paid_ipm() // 2118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52558,7 +52575,6 @@ void m68000_device::move_l_pais_paid_ipm() // 2120 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52614,6 +52630,7 @@ void m68000_device::move_l_pais_paid_ipm() // 2120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -52729,7 +52746,6 @@ void m68000_device::move_l_das_paid_ipm() // 2128 f1f8 // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52785,6 +52801,7 @@ void m68000_device::move_l_das_paid_ipm() // 2128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -52941,7 +52958,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -52997,6 +53013,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53114,7 +53131,6 @@ void m68000_device::move_l_adr16_paid_ipm() // 2138 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53170,6 +53186,7 @@ void m68000_device::move_l_adr16_paid_ipm() // 2138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53311,7 +53328,6 @@ void m68000_device::move_l_adr32_paid_ipm() // 2139 f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53367,6 +53383,7 @@ void m68000_device::move_l_adr32_paid_ipm() // 2139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -53481,7 +53498,6 @@ void m68000_device::move_l_dpc_paid_ipm() // 213a f1ff // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53537,6 +53553,7 @@ void m68000_device::move_l_dpc_paid_ipm() // 213a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53692,7 +53709,6 @@ adsl2: // 38f mmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53748,6 +53764,7 @@ adsl2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -53838,7 +53855,6 @@ void m68000_device::move_l_imm32_paid_ipm() // 213c f1ff // 2fc rmml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -53894,6 +53910,7 @@ void m68000_device::move_l_imm32_paid_ipm() // 213c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -53985,7 +54002,6 @@ void m68000_device::move_l_ds_dad_ipm() // 2140 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54013,6 +54029,7 @@ void m68000_device::move_l_ds_dad_ipm() // 2140 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54108,7 +54125,6 @@ void m68000_device::move_l_as_dad_ipm() // 2148 f1f8 // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -54136,6 +54152,7 @@ void m68000_device::move_l_as_dad_ipm() // 2148 f1f8 // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54285,6 +54302,7 @@ void m68000_device::move_l_ais_dad_ipm() // 2150 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54312,11 +54330,11 @@ void m68000_device::move_l_ais_dad_ipm() // 2150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54464,6 +54482,7 @@ void m68000_device::move_l_aips_dad_ipm() // 2158 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54491,11 +54510,11 @@ void m68000_device::move_l_aips_dad_ipm() // 2158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54644,6 +54663,7 @@ void m68000_device::move_l_pais_dad_ipm() // 2160 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -54671,11 +54691,11 @@ void m68000_device::move_l_pais_dad_ipm() // 2160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -54844,6 +54864,7 @@ void m68000_device::move_l_das_dad_ipm() // 2168 f1f8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -54871,11 +54892,11 @@ void m68000_device::move_l_das_dad_ipm() // 2168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55085,6 +55106,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55112,11 +55134,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55287,6 +55309,7 @@ void m68000_device::move_l_adr16_dad_ipm() // 2178 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55314,11 +55337,11 @@ void m68000_device::move_l_adr16_dad_ipm() // 2178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55513,6 +55536,7 @@ void m68000_device::move_l_adr32_dad_ipm() // 2179 f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -55540,11 +55564,11 @@ void m68000_device::move_l_adr32_dad_ipm() // 2179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55712,6 +55736,7 @@ void m68000_device::move_l_dpc_dad_ipm() // 217a f1ff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55739,11 +55764,11 @@ void m68000_device::move_l_dpc_dad_ipm() // 217a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -55952,6 +55977,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -55979,11 +56005,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56124,7 +56150,6 @@ void m68000_device::move_l_imm32_dad_ipm() // 217c f1ff // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56152,6 +56177,7 @@ void m68000_device::move_l_imm32_dad_ipm() // 217c f1ff // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56289,7 +56315,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56317,6 +56342,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56454,7 +56480,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -56482,6 +56507,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56672,6 +56698,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56699,11 +56726,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -56892,6 +56919,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -56919,11 +56947,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57113,6 +57141,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -57140,11 +57169,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57354,6 +57383,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57381,11 +57411,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57636,6 +57666,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57663,11 +57694,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -57879,6 +57910,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -57906,11 +57938,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58146,6 +58178,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -58173,11 +58206,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58386,6 +58419,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58413,11 +58447,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58667,6 +58701,7 @@ mawl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -58694,11 +58729,11 @@ mawl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -58881,7 +58916,6 @@ rmdl2: // 2df rmdl3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -58909,6 +58943,7 @@ rmdl2: // 258 rmrl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59007,6 +59042,7 @@ void m68000_device::move_l_ds_adr16_ipm() // 21c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59034,11 +59070,11 @@ void m68000_device::move_l_ds_adr16_ipm() // 21c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59132,6 +59168,7 @@ void m68000_device::move_l_as_adr16_ipm() // 21c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -59159,11 +59196,11 @@ void m68000_device::move_l_as_adr16_ipm() // 21c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59307,6 +59344,7 @@ void m68000_device::move_l_ais_adr16_ipm() // 21d0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59334,11 +59372,11 @@ void m68000_device::move_l_ais_adr16_ipm() // 21d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59485,6 +59523,7 @@ void m68000_device::move_l_aips_adr16_ipm() // 21d8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59512,11 +59551,11 @@ void m68000_device::move_l_aips_adr16_ipm() // 21d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59664,6 +59703,7 @@ void m68000_device::move_l_pais_adr16_ipm() // 21e0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -59691,11 +59731,11 @@ void m68000_device::move_l_pais_adr16_ipm() // 21e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -59863,6 +59903,7 @@ void m68000_device::move_l_das_adr16_ipm() // 21e8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -59890,11 +59931,11 @@ void m68000_device::move_l_das_adr16_ipm() // 21e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60103,6 +60144,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60130,11 +60172,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60304,6 +60346,7 @@ void m68000_device::move_l_adr16_adr16_ipm() // 21f8 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60331,11 +60374,11 @@ void m68000_device::move_l_adr16_adr16_ipm() // 21f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60529,6 +60572,7 @@ void m68000_device::move_l_adr32_adr16_ipm() // 21f9 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -60556,11 +60600,11 @@ void m68000_device::move_l_adr32_adr16_ipm() // 21f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60727,6 +60771,7 @@ void m68000_device::move_l_dpc_adr16_ipm() // 21fa ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60754,11 +60799,11 @@ void m68000_device::move_l_dpc_adr16_ipm() // 21fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -60966,6 +61011,7 @@ adsl2: // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -60993,11 +61039,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61141,6 +61187,7 @@ void m68000_device::move_l_imm32_adr16_ipm() // 21fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61168,11 +61215,11 @@ void m68000_device::move_l_imm32_adr16_ipm() // 21fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61290,6 +61337,7 @@ void m68000_device::move_l_ds_adr32_ipm() // 23c0 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61317,11 +61365,11 @@ void m68000_device::move_l_ds_adr32_ipm() // 23c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61439,6 +61487,7 @@ void m68000_device::move_l_as_adr32_ipm() // 23c8 fff8 // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -61466,11 +61515,11 @@ void m68000_device::move_l_as_adr32_ipm() // 23c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61613,7 +61662,6 @@ void m68000_device::move_l_ais_adr32_ipm() // 23d0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61668,11 +61716,11 @@ void m68000_device::move_l_ais_adr32_ipm() // 23d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -61818,7 +61866,6 @@ void m68000_device::move_l_aips_adr32_ipm() // 23d8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -61873,11 +61920,11 @@ void m68000_device::move_l_aips_adr32_ipm() // 23d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62024,7 +62071,6 @@ void m68000_device::move_l_pais_adr32_ipm() // 23e0 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -62079,11 +62125,11 @@ void m68000_device::move_l_pais_adr32_ipm() // 23e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62250,7 +62296,6 @@ void m68000_device::move_l_das_adr32_ipm() // 23e8 fff8 // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62305,11 +62350,11 @@ void m68000_device::move_l_das_adr32_ipm() // 23e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62517,7 +62562,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62572,11 +62616,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62745,7 +62789,6 @@ void m68000_device::move_l_adr16_adr32_ipm() // 23f8 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -62800,11 +62843,11 @@ void m68000_device::move_l_adr16_adr32_ipm() // 23f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -62997,7 +63040,6 @@ void m68000_device::move_l_adr32_adr32_ipm() // 23f9 ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -63052,11 +63094,11 @@ void m68000_device::move_l_adr32_adr32_ipm() // 23f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63222,7 +63264,6 @@ void m68000_device::move_l_dpc_adr32_ipm() // 23fa ffff // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63277,11 +63318,11 @@ void m68000_device::move_l_dpc_adr32_ipm() // 23fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63488,7 +63529,6 @@ adsl2: // 32a mall3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63543,11 +63583,11 @@ adsl2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63715,6 +63755,7 @@ void m68000_device::move_l_imm32_adr32_ipm() // 23fc ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -63742,11 +63783,11 @@ void m68000_device::move_l_imm32_adr32_ipm() // 23fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63786,7 +63827,6 @@ void m68000_device::move_w_ds_dd_ipm() // 3000 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63795,6 +63835,7 @@ void m68000_device::move_w_ds_dd_ipm() // 3000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63836,7 +63877,6 @@ void m68000_device::move_w_as_dd_ipm() // 3008 f1f8 // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -63845,6 +63885,7 @@ void m68000_device::move_w_as_dd_ipm() // 3008 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63913,7 +63954,6 @@ void m68000_device::move_w_ais_dd_ipm() // 3010 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -63922,6 +63962,7 @@ void m68000_device::move_w_ais_dd_ipm() // 3010 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -63992,7 +64033,6 @@ void m68000_device::move_w_aips_dd_ipm() // 3018 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64001,6 +64041,7 @@ void m68000_device::move_w_aips_dd_ipm() // 3018 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64073,7 +64114,6 @@ void m68000_device::move_w_pais_dd_ipm() // 3020 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64082,6 +64122,7 @@ void m68000_device::move_w_pais_dd_ipm() // 3020 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64173,7 +64214,6 @@ void m68000_device::move_w_das_dd_ipm() // 3028 f1f8 // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64182,6 +64222,7 @@ void m68000_device::move_w_das_dd_ipm() // 3028 f1f8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64314,7 +64355,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64323,6 +64363,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64413,7 +64454,6 @@ void m68000_device::move_w_adr16_dd_ipm() // 3038 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64422,6 +64462,7 @@ void m68000_device::move_w_adr16_dd_ipm() // 3038 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64536,7 +64577,6 @@ void m68000_device::move_w_adr32_dd_ipm() // 3039 f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64545,6 +64585,7 @@ void m68000_device::move_w_adr32_dd_ipm() // 3039 f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64635,7 +64676,6 @@ void m68000_device::move_w_dpc_dd_ipm() // 303a f1ff // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64644,6 +64684,7 @@ void m68000_device::move_w_dpc_dd_ipm() // 303a f1ff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64775,7 +64816,6 @@ adsw2: // 29b mrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; @@ -64784,6 +64824,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64849,7 +64890,6 @@ void m68000_device::move_w_imm16_dd_ipm() // 303c f1ff // 121 rrgw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_dt; m_au = m_au + 2; @@ -64858,6 +64898,7 @@ void m68000_device::move_w_imm16_dd_ipm() // 303c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64899,12 +64940,12 @@ void m68000_device::movea_w_ds_ad_ipm() // 3040 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -64947,12 +64988,12 @@ void m68000_device::movea_w_as_ad_ipm() // 3048 f1f8 // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65022,12 +65063,12 @@ void m68000_device::movea_w_ais_ad_ipm() // 3050 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65098,12 +65139,12 @@ void m68000_device::movea_w_aips_ad_ipm() // 3058 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65176,12 +65217,12 @@ void m68000_device::movea_w_pais_ad_ipm() // 3060 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65273,12 +65314,12 @@ void m68000_device::movea_w_das_ad_ipm() // 3068 f1f8 // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65411,12 +65452,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65507,12 +65548,12 @@ void m68000_device::movea_w_adr16_ad_ipm() // 3078 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65627,12 +65668,12 @@ void m68000_device::movea_w_adr32_ad_ipm() // 3079 f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65723,12 +65764,12 @@ void m68000_device::movea_w_dpc_ad_ipm() // 307a f1ff // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65860,12 +65901,12 @@ adsw2: // 158 mrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_dbin); m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65931,12 +65972,12 @@ void m68000_device::movea_w_imm16_ad_ipm() // 307c f1ff // 279 rrgm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); m_au = m_au + 2; // 278 rrgl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -65979,7 +66020,6 @@ void m68000_device::move_w_ds_aid_ipm() // 3080 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66008,10 +66048,10 @@ void m68000_device::move_w_ds_aid_ipm() // 3080 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66051,7 +66091,6 @@ void m68000_device::move_w_as_aid_ipm() // 3088 f1f8 // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -66080,10 +66119,10 @@ void m68000_device::move_w_as_aid_ipm() // 3088 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66177,10 +66216,10 @@ void m68000_device::move_w_ais_aid_ipm() // 3090 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66278,10 +66317,10 @@ void m68000_device::move_w_aips_aid_ipm() // 3098 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66381,10 +66420,10 @@ void m68000_device::move_w_pais_aid_ipm() // 30a0 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66503,10 +66542,10 @@ void m68000_device::move_w_das_aid_ipm() // 30a8 f1f8 // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66666,10 +66705,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66787,10 +66826,10 @@ void m68000_device::move_w_adr16_aid_ipm() // 30b8 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -66932,10 +66971,10 @@ void m68000_device::move_w_adr32_aid_ipm() // 30b9 f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67053,10 +67092,10 @@ void m68000_device::move_w_dpc_aid_ipm() // 30ba f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67215,10 +67254,10 @@ adsw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67284,7 +67323,6 @@ void m68000_device::move_w_imm16_aid_ipm() // 30bc f1ff // 2fa rmrw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67313,10 +67351,10 @@ void m68000_device::move_w_imm16_aid_ipm() // 30bc f1ff // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67356,7 +67394,6 @@ void m68000_device::move_w_ds_aipd_ipm() // 30c0 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67385,6 +67422,7 @@ void m68000_device::move_w_ds_aipd_ipm() // 30c0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67426,7 +67464,6 @@ void m68000_device::move_w_as_aipd_ipm() // 30c8 f1f8 // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -67455,6 +67492,7 @@ void m68000_device::move_w_as_aipd_ipm() // 30c8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67523,7 +67561,6 @@ void m68000_device::move_w_ais_aipd_ipm() // 30d0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67552,6 +67589,7 @@ void m68000_device::move_w_ais_aipd_ipm() // 30d0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67624,7 +67662,6 @@ void m68000_device::move_w_aips_aipd_ipm() // 30d8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67653,6 +67690,7 @@ void m68000_device::move_w_aips_aipd_ipm() // 30d8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67727,7 +67765,6 @@ void m68000_device::move_w_pais_aipd_ipm() // 30e0 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -67756,6 +67793,7 @@ void m68000_device::move_w_pais_aipd_ipm() // 30e0 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -67849,7 +67887,6 @@ void m68000_device::move_w_das_aipd_ipm() // 30e8 f1f8 // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -67878,6 +67915,7 @@ void m68000_device::move_w_das_aipd_ipm() // 30e8 f1f8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68012,7 +68050,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68041,6 +68078,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68133,7 +68171,6 @@ void m68000_device::move_w_adr16_aipd_ipm() // 30f8 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68162,6 +68199,7 @@ void m68000_device::move_w_adr16_aipd_ipm() // 30f8 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68278,7 +68316,6 @@ void m68000_device::move_w_adr32_aipd_ipm() // 30f9 f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -68307,6 +68344,7 @@ void m68000_device::move_w_adr32_aipd_ipm() // 30f9 f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68399,7 +68437,6 @@ void m68000_device::move_w_dpc_aipd_ipm() // 30fa f1ff // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68428,6 +68465,7 @@ void m68000_device::move_w_dpc_aipd_ipm() // 30fa f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68561,7 +68599,6 @@ adsw2: // 3af mmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dbin; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68590,6 +68627,7 @@ adsw2: // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68657,7 +68695,6 @@ void m68000_device::move_w_imm16_aipd_ipm() // 30fc f1ff // 2fe rmiw1 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68686,6 +68723,7 @@ void m68000_device::move_w_imm16_aipd_ipm() // 30fc f1ff // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68727,7 +68765,6 @@ void m68000_device::move_w_ds_paid_ipm() // 3100 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68757,6 +68794,7 @@ void m68000_device::move_w_ds_paid_ipm() // 3100 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68797,7 +68835,6 @@ void m68000_device::move_w_as_paid_ipm() // 3108 f1f8 // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68827,6 +68864,7 @@ void m68000_device::move_w_as_paid_ipm() // 3108 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -68894,7 +68932,6 @@ void m68000_device::move_w_ais_paid_ipm() // 3110 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -68924,6 +68961,7 @@ void m68000_device::move_w_ais_paid_ipm() // 3110 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -68995,7 +69033,6 @@ void m68000_device::move_w_aips_paid_ipm() // 3118 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69025,6 +69062,7 @@ void m68000_device::move_w_aips_paid_ipm() // 3118 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69098,7 +69136,6 @@ void m68000_device::move_w_pais_paid_ipm() // 3120 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69128,6 +69165,7 @@ void m68000_device::move_w_pais_paid_ipm() // 3120 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -69220,7 +69258,6 @@ void m68000_device::move_w_das_paid_ipm() // 3128 f1f8 // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69250,6 +69287,7 @@ void m68000_device::move_w_das_paid_ipm() // 3128 f1f8 // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69383,7 +69421,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69413,6 +69450,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69504,7 +69542,6 @@ void m68000_device::move_w_adr16_paid_ipm() // 3138 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69534,6 +69571,7 @@ void m68000_device::move_w_adr16_paid_ipm() // 3138 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69649,7 +69687,6 @@ void m68000_device::move_w_adr32_paid_ipm() // 3139 f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69679,6 +69716,7 @@ void m68000_device::move_w_adr32_paid_ipm() // 3139 f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -69770,7 +69808,6 @@ void m68000_device::move_w_dpc_paid_ipm() // 313a f1ff // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69800,6 +69837,7 @@ void m68000_device::move_w_dpc_paid_ipm() // 313a f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -69932,7 +69970,6 @@ adsw2: // 38b mmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -69962,6 +69999,7 @@ adsw2: // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70028,7 +70066,6 @@ void m68000_device::move_w_imm16_paid_ipm() // 313c f1ff // 2f8 rmmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70058,6 +70095,7 @@ void m68000_device::move_w_imm16_paid_ipm() // 313c f1ff // 34b mmmw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70122,7 +70160,6 @@ void m68000_device::move_w_ds_dad_ipm() // 3140 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70150,11 +70187,11 @@ void m68000_device::move_w_ds_dad_ipm() // 3140 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70218,7 +70255,6 @@ void m68000_device::move_w_as_dad_ipm() // 3148 f1f8 // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -70246,11 +70282,11 @@ void m68000_device::move_w_as_dad_ipm() // 3148 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70344,6 +70380,7 @@ void m68000_device::move_w_ais_dad_ipm() // 3150 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70371,11 +70408,11 @@ void m68000_device::move_w_ais_dad_ipm() // 3150 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70473,6 +70510,7 @@ void m68000_device::move_w_aips_dad_ipm() // 3158 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70500,11 +70538,11 @@ void m68000_device::move_w_aips_dad_ipm() // 3158 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70604,6 +70642,7 @@ void m68000_device::move_w_pais_dad_ipm() // 3160 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -70631,11 +70670,11 @@ void m68000_device::move_w_pais_dad_ipm() // 3160 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70754,6 +70793,7 @@ void m68000_device::move_w_das_dad_ipm() // 3168 f1f8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70781,11 +70821,11 @@ void m68000_device::move_w_das_dad_ipm() // 3168 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -70945,6 +70985,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -70972,11 +71013,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71094,6 +71135,7 @@ void m68000_device::move_w_adr16_dad_ipm() // 3178 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71121,11 +71163,11 @@ void m68000_device::move_w_adr16_dad_ipm() // 3178 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71267,6 +71309,7 @@ void m68000_device::move_w_adr32_dad_ipm() // 3179 f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -71294,11 +71337,11 @@ void m68000_device::move_w_adr32_dad_ipm() // 3179 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71416,6 +71459,7 @@ void m68000_device::move_w_dpc_dad_ipm() // 317a f1ff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71443,11 +71487,11 @@ void m68000_device::move_w_dpc_dad_ipm() // 317a f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71606,6 +71650,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -71633,11 +71678,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71727,7 +71772,6 @@ void m68000_device::move_w_imm16_dad_ipm() // 317c f1ff // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -71755,11 +71799,11 @@ void m68000_device::move_w_imm16_dad_ipm() // 317c f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -71865,7 +71909,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -71893,11 +71936,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72003,7 +72046,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_da[ry]; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -72031,11 +72073,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72170,6 +72212,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72197,11 +72240,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72340,6 +72383,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72367,11 +72411,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72512,6 +72556,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -72539,11 +72584,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72703,6 +72748,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72730,11 +72776,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -72935,6 +72981,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -72962,11 +73009,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73125,6 +73172,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73152,11 +73200,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73339,6 +73387,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -73366,11 +73415,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73529,6 +73578,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73556,11 +73606,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73760,6 +73810,7 @@ maww2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -73787,11 +73838,11 @@ maww2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -73923,7 +73974,6 @@ rmdw2: // 2db rmdw2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_dt; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -73951,11 +74001,11 @@ rmdw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74022,6 +74072,7 @@ void m68000_device::move_w_ds_adr16_ipm() // 31c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74049,11 +74100,11 @@ void m68000_device::move_w_ds_adr16_ipm() // 31c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74120,6 +74171,7 @@ void m68000_device::move_w_as_adr16_ipm() // 31c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -74147,11 +74199,11 @@ void m68000_device::move_w_as_adr16_ipm() // 31c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74244,6 +74296,7 @@ void m68000_device::move_w_ais_adr16_ipm() // 31d0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74271,11 +74324,11 @@ void m68000_device::move_w_ais_adr16_ipm() // 31d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74372,6 +74425,7 @@ void m68000_device::move_w_aips_adr16_ipm() // 31d8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74399,11 +74453,11 @@ void m68000_device::move_w_aips_adr16_ipm() // 31d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74502,6 +74556,7 @@ void m68000_device::move_w_pais_adr16_ipm() // 31e0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -74529,11 +74584,11 @@ void m68000_device::move_w_pais_adr16_ipm() // 31e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74651,6 +74706,7 @@ void m68000_device::move_w_das_adr16_ipm() // 31e8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74678,11 +74734,11 @@ void m68000_device::move_w_das_adr16_ipm() // 31e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74841,6 +74897,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -74868,11 +74925,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -74989,6 +75046,7 @@ void m68000_device::move_w_adr16_adr16_ipm() // 31f8 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75016,11 +75074,11 @@ void m68000_device::move_w_adr16_adr16_ipm() // 31f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75161,6 +75219,7 @@ void m68000_device::move_w_adr32_adr16_ipm() // 31f9 ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -75188,11 +75247,11 @@ void m68000_device::move_w_adr32_adr16_ipm() // 31f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75309,6 +75368,7 @@ void m68000_device::move_w_dpc_adr16_ipm() // 31fa ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75336,11 +75396,11 @@ void m68000_device::move_w_dpc_adr16_ipm() // 31fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75498,6 +75558,7 @@ adsw2: // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -75525,11 +75586,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75622,6 +75683,7 @@ void m68000_device::move_w_imm16_adr16_ipm() // 31fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75649,11 +75711,11 @@ void m68000_device::move_w_imm16_adr16_ipm() // 31fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75744,6 +75806,7 @@ void m68000_device::move_w_ds_adr32_ipm() // 33c0 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75771,11 +75834,11 @@ void m68000_device::move_w_ds_adr32_ipm() // 33c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75866,6 +75929,7 @@ void m68000_device::move_w_as_adr32_ipm() // 33c8 fff8 // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -75893,11 +75957,11 @@ void m68000_device::move_w_as_adr32_ipm() // 33c8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -75990,7 +76054,6 @@ void m68000_device::move_w_ais_adr32_ipm() // 33d0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76042,11 +76105,11 @@ void m68000_device::move_w_ais_adr32_ipm() // 33d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76143,7 +76206,6 @@ void m68000_device::move_w_aips_adr32_ipm() // 33d8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76195,11 +76257,11 @@ void m68000_device::move_w_aips_adr32_ipm() // 33d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76298,7 +76360,6 @@ void m68000_device::move_w_pais_adr32_ipm() // 33e0 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -76350,11 +76411,11 @@ void m68000_device::move_w_pais_adr32_ipm() // 33e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76472,7 +76533,6 @@ void m68000_device::move_w_das_adr32_ipm() // 33e8 fff8 // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76524,11 +76584,11 @@ void m68000_device::move_w_das_adr32_ipm() // 33e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76687,7 +76747,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76739,11 +76798,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -76860,7 +76919,6 @@ void m68000_device::move_w_adr16_adr32_ipm() // 33f8 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -76912,11 +76970,11 @@ void m68000_device::move_w_adr16_adr32_ipm() // 33f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77057,7 +77115,6 @@ void m68000_device::move_w_adr32_adr32_ipm() // 33f9 ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -77109,11 +77166,11 @@ void m68000_device::move_w_adr32_adr32_ipm() // 33f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77230,7 +77287,6 @@ void m68000_device::move_w_dpc_adr32_ipm() // 33fa ffff // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77282,11 +77338,11 @@ void m68000_device::move_w_dpc_adr32_ipm() // 33fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77444,7 +77500,6 @@ adsw2: // 32e malw2 m_aob = merge_16_32(high16(m_at), m_dbin); m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77496,11 +77551,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77617,6 +77672,7 @@ void m68000_device::move_w_imm16_adr32_ipm() // 33fc ffff // 389 maww2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -77644,11 +77700,11 @@ void m68000_device::move_w_imm16_adr32_ipm() // 33fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77687,7 +77743,6 @@ void m68000_device::negx_b_ds_ipm() // 4000 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -77695,6 +77750,7 @@ void m68000_device::negx_b_ds_ipm() // 4000 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77758,7 +77814,6 @@ void m68000_device::negx_b_ais_ipm() // 4010 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77788,6 +77843,7 @@ void m68000_device::negx_b_ais_ipm() // 4010 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77847,7 +77903,6 @@ void m68000_device::negx_b_aips_ipm() // 4018 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77877,6 +77932,7 @@ void m68000_device::negx_b_aips_ipm() // 4018 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -77938,7 +77994,6 @@ void m68000_device::negx_b_pais_ipm() // 4020 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -77968,6 +78023,7 @@ void m68000_device::negx_b_pais_ipm() // 4020 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78048,7 +78104,6 @@ void m68000_device::negx_b_das_ipm() // 4028 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78078,6 +78133,7 @@ void m68000_device::negx_b_das_ipm() // 4028 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78199,7 +78255,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78229,6 +78284,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78308,7 +78364,6 @@ void m68000_device::negx_b_adr16_ipm() // 4038 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78338,6 +78393,7 @@ void m68000_device::negx_b_adr16_ipm() // 4038 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -78441,7 +78497,6 @@ void m68000_device::negx_b_adr32_ipm() // 4039 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78471,6 +78526,7 @@ void m68000_device::negx_b_adr32_ipm() // 4039 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -78503,7 +78559,6 @@ void m68000_device::negx_w_ds_ipm() // 4040 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -78511,6 +78566,7 @@ void m68000_device::negx_w_ds_ipm() // 4040 fff8 sr_xnzvc_u(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78578,7 +78634,6 @@ void m68000_device::negx_w_ais_ipm() // 4050 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78608,6 +78663,7 @@ void m68000_device::negx_w_ais_ipm() // 4050 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78677,7 +78733,6 @@ void m68000_device::negx_w_aips_ipm() // 4058 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78707,6 +78762,7 @@ void m68000_device::negx_w_aips_ipm() // 4058 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78778,7 +78834,6 @@ void m68000_device::negx_w_pais_ipm() // 4060 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78808,6 +78863,7 @@ void m68000_device::negx_w_pais_ipm() // 4060 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -78898,7 +78954,6 @@ void m68000_device::negx_w_das_ipm() // 4068 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -78928,6 +78983,7 @@ void m68000_device::negx_w_das_ipm() // 4068 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79059,7 +79115,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79089,6 +79144,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79178,7 +79234,6 @@ void m68000_device::negx_w_adr16_ipm() // 4078 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79208,6 +79263,7 @@ void m68000_device::negx_w_adr16_ipm() // 4078 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -79321,7 +79377,6 @@ void m68000_device::negx_w_adr32_ipm() // 4079 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79351,6 +79406,7 @@ void m68000_device::negx_w_adr32_ipm() // 4079 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79389,7 +79445,6 @@ void m68000_device::negx_l_ds_ipm() // 4080 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 @@ -79423,6 +79478,7 @@ void m68000_device::negx_l_ds_ipm() // 4080 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -79494,7 +79550,6 @@ void m68000_device::negx_l_ais_ipm() // 4090 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79550,6 +79605,7 @@ void m68000_device::negx_l_ais_ipm() // 4090 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79642,7 +79698,6 @@ void m68000_device::negx_l_aips_ipm() // 4098 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79698,6 +79753,7 @@ void m68000_device::negx_l_aips_ipm() // 4098 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79791,7 +79847,6 @@ void m68000_device::negx_l_pais_ipm() // 40a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -79847,6 +79902,7 @@ void m68000_device::negx_l_pais_ipm() // 40a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -79960,7 +80016,6 @@ void m68000_device::negx_l_das_ipm() // 40a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80016,6 +80071,7 @@ void m68000_device::negx_l_das_ipm() // 40a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80170,7 +80226,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80226,6 +80281,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80341,7 +80397,6 @@ void m68000_device::negx_l_adr16_ipm() // 40b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80397,6 +80452,7 @@ void m68000_device::negx_l_adr16_ipm() // 40b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -80536,7 +80592,6 @@ void m68000_device::negx_l_adr32_ipm() // 40b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -80592,6 +80647,7 @@ void m68000_device::negx_l_adr32_ipm() // 40b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -80630,7 +80686,6 @@ void m68000_device::move_sr_ds_ipm() // 40c0 fff8 // 3a5 strw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 340 strw2 @@ -80658,6 +80713,7 @@ void m68000_device::move_sr_ds_ipm() // 40c0 fff8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -80704,7 +80760,6 @@ void m68000_device::move_sr_ais_ipm() // 40d0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80735,6 +80790,7 @@ void m68000_device::move_sr_ais_ipm() // 40d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80804,7 +80860,6 @@ void m68000_device::move_sr_aips_ipm() // 40d8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80835,6 +80890,7 @@ void m68000_device::move_sr_aips_ipm() // 40d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -80906,7 +80962,6 @@ void m68000_device::move_sr_pais_ipm() // 40e0 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -80937,6 +80992,7 @@ void m68000_device::move_sr_pais_ipm() // 40e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -81027,7 +81083,6 @@ void m68000_device::move_sr_das_ipm() // 40e8 fff8 // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81058,6 +81113,7 @@ void m68000_device::move_sr_das_ipm() // 40e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81189,7 +81245,6 @@ adsw2: // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81220,6 +81275,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81309,7 +81365,6 @@ void m68000_device::move_sr_adr16_ipm() // 40f8 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81340,6 +81395,7 @@ void m68000_device::move_sr_adr16_ipm() // 40f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -81453,7 +81509,6 @@ void m68000_device::move_sr_adr32_ipm() // 40f9 ffff // 3a1 stmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_ftu = m_sr; // 324 sftm2 @@ -81484,6 +81539,7 @@ void m68000_device::move_sr_adr32_ipm() // 40f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -81706,7 +81762,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81721,6 +81776,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -81752,7 +81808,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81978,7 +82033,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -81993,6 +82047,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82024,7 +82079,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82254,7 +82308,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82269,6 +82322,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82300,7 +82354,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82532,7 +82585,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82547,6 +82599,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82578,7 +82631,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82829,7 +82881,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -82844,6 +82895,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -82875,7 +82927,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83167,7 +83218,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83182,6 +83232,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -83213,7 +83264,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83463,7 +83513,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83478,6 +83527,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -83509,7 +83559,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83783,7 +83832,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -83798,6 +83846,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -83829,7 +83878,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84079,7 +84127,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84094,6 +84141,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84125,7 +84173,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84416,7 +84463,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84431,6 +84477,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84462,7 +84509,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84687,7 +84733,6 @@ trap1: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84702,6 +84747,7 @@ chkr3: mmrw3: // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84733,7 +84779,6 @@ chkr4: // 150 chkr4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; goto mmrw3; @@ -84749,13 +84794,13 @@ void m68000_device::lea_ais_ad_ipm() // 41d0 f1f8 // 2f1 leaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84823,11 +84868,11 @@ void m68000_device::lea_das_ad_ipm() // 41e8 f1f8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -84936,11 +84981,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85003,11 +85048,11 @@ void m68000_device::lea_adr16_ad_ipm() // 41f8 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85096,11 +85141,11 @@ void m68000_device::lea_adr32_ad_ipm() // 41f9 f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85165,11 +85210,11 @@ void m68000_device::lea_dpc_ad_ipm() // 41fa f1ff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85277,11 +85322,11 @@ leax4: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85320,7 +85365,6 @@ void m68000_device::clr_b_ds_ipm() // 4200 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -85328,6 +85372,7 @@ void m68000_device::clr_b_ds_ipm() // 4200 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85393,7 +85438,6 @@ void m68000_device::clr_b_ais_ipm() // 4210 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85423,6 +85467,7 @@ void m68000_device::clr_b_ais_ipm() // 4210 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85485,7 +85530,6 @@ void m68000_device::clr_b_aips_ipm() // 4218 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85515,6 +85559,7 @@ void m68000_device::clr_b_aips_ipm() // 4218 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85579,7 +85624,6 @@ void m68000_device::clr_b_pais_ipm() // 4220 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85609,6 +85653,7 @@ void m68000_device::clr_b_pais_ipm() // 4220 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -85692,7 +85737,6 @@ void m68000_device::clr_b_das_ipm() // 4228 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85722,6 +85766,7 @@ void m68000_device::clr_b_das_ipm() // 4228 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85848,7 +85893,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85878,6 +85922,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -85960,7 +86005,6 @@ void m68000_device::clr_b_adr16_ipm() // 4238 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -85990,6 +86034,7 @@ void m68000_device::clr_b_adr16_ipm() // 4238 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86097,7 +86142,6 @@ void m68000_device::clr_b_adr32_ipm() // 4239 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86127,6 +86171,7 @@ void m68000_device::clr_b_adr32_ipm() // 4239 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -86160,7 +86205,6 @@ void m68000_device::clr_w_ds_ipm() // 4240 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -86168,6 +86212,7 @@ void m68000_device::clr_w_ds_ipm() // 4240 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86237,7 +86282,6 @@ void m68000_device::clr_w_ais_ipm() // 4250 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86267,6 +86311,7 @@ void m68000_device::clr_w_ais_ipm() // 4250 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86339,7 +86384,6 @@ void m68000_device::clr_w_aips_ipm() // 4258 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86369,6 +86413,7 @@ void m68000_device::clr_w_aips_ipm() // 4258 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86443,7 +86488,6 @@ void m68000_device::clr_w_pais_ipm() // 4260 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86473,6 +86517,7 @@ void m68000_device::clr_w_pais_ipm() // 4260 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -86566,7 +86611,6 @@ void m68000_device::clr_w_das_ipm() // 4268 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86596,6 +86640,7 @@ void m68000_device::clr_w_das_ipm() // 4268 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86732,7 +86777,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86762,6 +86806,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -86854,7 +86899,6 @@ void m68000_device::clr_w_adr16_ipm() // 4278 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -86884,6 +86928,7 @@ void m68000_device::clr_w_adr16_ipm() // 4278 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -87001,7 +87046,6 @@ void m68000_device::clr_w_adr32_ipm() // 4279 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87031,6 +87075,7 @@ void m68000_device::clr_w_adr32_ipm() // 4279 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87070,7 +87115,6 @@ void m68000_device::clr_l_ds_ipm() // 4280 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 @@ -87104,6 +87148,7 @@ void m68000_device::clr_l_ds_ipm() // 4280 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -87177,7 +87222,6 @@ void m68000_device::clr_l_ais_ipm() // 4290 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87233,6 +87277,7 @@ void m68000_device::clr_l_ais_ipm() // 4290 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87328,7 +87373,6 @@ void m68000_device::clr_l_aips_ipm() // 4298 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87384,6 +87428,7 @@ void m68000_device::clr_l_aips_ipm() // 4298 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87480,7 +87525,6 @@ void m68000_device::clr_l_pais_ipm() // 42a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87536,6 +87580,7 @@ void m68000_device::clr_l_pais_ipm() // 42a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -87652,7 +87697,6 @@ void m68000_device::clr_l_das_ipm() // 42a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87708,6 +87752,7 @@ void m68000_device::clr_l_das_ipm() // 42a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -87867,7 +87912,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -87923,6 +87967,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88042,7 +88087,6 @@ void m68000_device::clr_l_adr16_ipm() // 42b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88098,6 +88142,7 @@ void m68000_device::clr_l_adr16_ipm() // 42b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -88242,7 +88287,6 @@ void m68000_device::clr_l_adr32_ipm() // 42b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88298,6 +88342,7 @@ void m68000_device::clr_l_adr32_ipm() // 42b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -88337,7 +88382,6 @@ void m68000_device::neg_b_ds_ipm() // 4400 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -88345,6 +88389,7 @@ void m68000_device::neg_b_ds_ipm() // 4400 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88408,7 +88453,6 @@ void m68000_device::neg_b_ais_ipm() // 4410 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88438,6 +88482,7 @@ void m68000_device::neg_b_ais_ipm() // 4410 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88497,7 +88542,6 @@ void m68000_device::neg_b_aips_ipm() // 4418 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88527,6 +88571,7 @@ void m68000_device::neg_b_aips_ipm() // 4418 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88588,7 +88633,6 @@ void m68000_device::neg_b_pais_ipm() // 4420 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88618,6 +88662,7 @@ void m68000_device::neg_b_pais_ipm() // 4420 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -88698,7 +88743,6 @@ void m68000_device::neg_b_das_ipm() // 4428 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88728,6 +88772,7 @@ void m68000_device::neg_b_das_ipm() // 4428 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88849,7 +88894,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88879,6 +88923,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -88958,7 +89003,6 @@ void m68000_device::neg_b_adr16_ipm() // 4438 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -88988,6 +89032,7 @@ void m68000_device::neg_b_adr16_ipm() // 4438 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89091,7 +89136,6 @@ void m68000_device::neg_b_adr32_ipm() // 4439 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89121,6 +89165,7 @@ void m68000_device::neg_b_adr32_ipm() // 4439 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -89153,7 +89198,6 @@ void m68000_device::neg_w_ds_ipm() // 4440 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -89161,6 +89205,7 @@ void m68000_device::neg_w_ds_ipm() // 4440 fff8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89228,7 +89273,6 @@ void m68000_device::neg_w_ais_ipm() // 4450 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89258,6 +89302,7 @@ void m68000_device::neg_w_ais_ipm() // 4450 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89327,7 +89372,6 @@ void m68000_device::neg_w_aips_ipm() // 4458 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89357,6 +89401,7 @@ void m68000_device::neg_w_aips_ipm() // 4458 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89428,7 +89473,6 @@ void m68000_device::neg_w_pais_ipm() // 4460 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89458,6 +89502,7 @@ void m68000_device::neg_w_pais_ipm() // 4460 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -89548,7 +89593,6 @@ void m68000_device::neg_w_das_ipm() // 4468 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89578,6 +89622,7 @@ void m68000_device::neg_w_das_ipm() // 4468 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89709,7 +89754,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89739,6 +89783,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89828,7 +89873,6 @@ void m68000_device::neg_w_adr16_ipm() // 4478 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -89858,6 +89902,7 @@ void m68000_device::neg_w_adr16_ipm() // 4478 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -89971,7 +90016,6 @@ void m68000_device::neg_w_adr32_ipm() // 4479 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90001,6 +90045,7 @@ void m68000_device::neg_w_adr32_ipm() // 4479 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90039,7 +90084,6 @@ void m68000_device::neg_l_ds_ipm() // 4480 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 @@ -90073,6 +90117,7 @@ void m68000_device::neg_l_ds_ipm() // 4480 fff8 sr_xnzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -90144,7 +90189,6 @@ void m68000_device::neg_l_ais_ipm() // 4490 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90200,6 +90244,7 @@ void m68000_device::neg_l_ais_ipm() // 4490 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90292,7 +90337,6 @@ void m68000_device::neg_l_aips_ipm() // 4498 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90348,6 +90392,7 @@ void m68000_device::neg_l_aips_ipm() // 4498 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90441,7 +90486,6 @@ void m68000_device::neg_l_pais_ipm() // 44a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90497,6 +90541,7 @@ void m68000_device::neg_l_pais_ipm() // 44a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -90610,7 +90655,6 @@ void m68000_device::neg_l_das_ipm() // 44a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90666,6 +90710,7 @@ void m68000_device::neg_l_das_ipm() // 44a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90820,7 +90865,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -90876,6 +90920,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -90991,7 +91036,6 @@ void m68000_device::neg_l_adr16_ipm() // 44b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91047,6 +91091,7 @@ void m68000_device::neg_l_adr16_ipm() // 44b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -91186,7 +91231,6 @@ void m68000_device::neg_l_adr32_ipm() // 44b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91242,6 +91286,7 @@ void m68000_device::neg_l_adr32_ipm() // 44b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -91315,11 +91360,11 @@ void m68000_device::move_ds_ccr_ipm() // 44c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91420,11 +91465,11 @@ void m68000_device::move_ais_ccr_ipm() // 44d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91529,11 +91574,11 @@ void m68000_device::move_aips_ccr_ipm() // 44d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91640,11 +91685,11 @@ void m68000_device::move_pais_ccr_ipm() // 44e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91770,11 +91815,11 @@ void m68000_device::move_das_ccr_ipm() // 44e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -91941,11 +91986,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92070,11 +92115,11 @@ void m68000_device::move_adr16_ccr_ipm() // 44f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92223,11 +92268,11 @@ void m68000_device::move_adr32_ccr_ipm() // 44f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92352,11 +92397,11 @@ void m68000_device::move_dpc_ccr_ipm() // 44fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92522,11 +92567,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92626,11 +92671,11 @@ void m68000_device::move_imm8_ccr_ipm() // 44fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92669,7 +92714,6 @@ void m68000_device::not_b_ds_ipm() // 4600 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -92677,6 +92721,7 @@ void m68000_device::not_b_ds_ipm() // 4600 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92740,7 +92785,6 @@ void m68000_device::not_b_ais_ipm() // 4610 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92770,6 +92814,7 @@ void m68000_device::not_b_ais_ipm() // 4610 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92829,7 +92874,6 @@ void m68000_device::not_b_aips_ipm() // 4618 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92859,6 +92903,7 @@ void m68000_device::not_b_aips_ipm() // 4618 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -92920,7 +92965,6 @@ void m68000_device::not_b_pais_ipm() // 4620 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -92950,6 +92994,7 @@ void m68000_device::not_b_pais_ipm() // 4620 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93030,7 +93075,6 @@ void m68000_device::not_b_das_ipm() // 4628 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93060,6 +93104,7 @@ void m68000_device::not_b_das_ipm() // 4628 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93181,7 +93226,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93211,6 +93255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93290,7 +93335,6 @@ void m68000_device::not_b_adr16_ipm() // 4638 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93320,6 +93364,7 @@ void m68000_device::not_b_adr16_ipm() // 4638 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -93423,7 +93468,6 @@ void m68000_device::not_b_adr32_ipm() // 4639 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93453,6 +93497,7 @@ void m68000_device::not_b_adr32_ipm() // 4639 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -93485,7 +93530,6 @@ void m68000_device::not_w_ds_ipm() // 4640 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -93493,6 +93537,7 @@ void m68000_device::not_w_ds_ipm() // 4640 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93560,7 +93605,6 @@ void m68000_device::not_w_ais_ipm() // 4650 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93590,6 +93634,7 @@ void m68000_device::not_w_ais_ipm() // 4650 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93659,7 +93704,6 @@ void m68000_device::not_w_aips_ipm() // 4658 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93689,6 +93733,7 @@ void m68000_device::not_w_aips_ipm() // 4658 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93760,7 +93805,6 @@ void m68000_device::not_w_pais_ipm() // 4660 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93790,6 +93834,7 @@ void m68000_device::not_w_pais_ipm() // 4660 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -93880,7 +93925,6 @@ void m68000_device::not_w_das_ipm() // 4668 fff8 // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -93910,6 +93954,7 @@ void m68000_device::not_w_das_ipm() // 4668 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94041,7 +94086,6 @@ adsw2: // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94071,6 +94115,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94160,7 +94205,6 @@ void m68000_device::not_w_adr16_ipm() // 4678 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94190,6 +94234,7 @@ void m68000_device::not_w_adr16_ipm() // 4678 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -94303,7 +94348,6 @@ void m68000_device::not_w_adr32_ipm() // 4679 ffff // 2b8 nnmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94333,6 +94377,7 @@ void m68000_device::not_w_adr32_ipm() // 4679 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94371,7 +94416,6 @@ void m68000_device::not_l_ds_ipm() // 4680 fff8 // 137 nnrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 @@ -94405,6 +94449,7 @@ void m68000_device::not_l_ds_ipm() // 4680 fff8 sr_nzvc_u(); // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -94476,7 +94521,6 @@ void m68000_device::not_l_ais_ipm() // 4690 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94532,6 +94576,7 @@ void m68000_device::not_l_ais_ipm() // 4690 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94624,7 +94669,6 @@ void m68000_device::not_l_aips_ipm() // 4698 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94680,6 +94724,7 @@ void m68000_device::not_l_aips_ipm() // 4698 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94773,7 +94818,6 @@ void m68000_device::not_l_pais_ipm() // 46a0 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94829,6 +94873,7 @@ void m68000_device::not_l_pais_ipm() // 46a0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -94942,7 +94987,6 @@ void m68000_device::not_l_das_ipm() // 46a8 fff8 // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -94998,6 +95042,7 @@ void m68000_device::not_l_das_ipm() // 46a8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95152,7 +95197,6 @@ adsl2: // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95208,6 +95252,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95323,7 +95368,6 @@ void m68000_device::not_l_adr16_ipm() // 46b8 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95379,6 +95423,7 @@ void m68000_device::not_l_adr16_ipm() // 46b8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -95518,7 +95563,6 @@ void m68000_device::not_l_adr32_ipm() // 46b9 ffff // 2bc nnml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95574,6 +95618,7 @@ void m68000_device::not_l_adr32_ipm() // 46b9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -95653,11 +95698,11 @@ void m68000_device::move_ds_sr_ipm() // 46c0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95764,11 +95809,11 @@ void m68000_device::move_ais_sr_ipm() // 46d0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95879,11 +95924,11 @@ void m68000_device::move_aips_sr_ipm() // 46d8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -95996,11 +96041,11 @@ void m68000_device::move_pais_sr_ipm() // 46e0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96132,11 +96177,11 @@ void m68000_device::move_das_sr_ipm() // 46e8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96309,11 +96354,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96444,11 +96489,11 @@ void m68000_device::move_adr16_sr_ipm() // 46f8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96603,11 +96648,11 @@ void m68000_device::move_adr32_sr_ipm() // 46f9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96738,11 +96783,11 @@ void m68000_device::move_dpc_sr_ipm() // 46fa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -96914,11 +96959,11 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -97024,11 +97069,11 @@ void m68000_device::move_i16u_sr_ipm() // 46fc ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -97067,7 +97112,6 @@ void m68000_device::nbcd_b_ds_ipm() // 4800 fff8 // 13b nbcr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 @@ -97099,6 +97143,7 @@ void m68000_device::nbcd_b_ds_ipm() // 4800 fff8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -97142,7 +97187,6 @@ void m68000_device::nbcd_b_ais_ipm() // 4810 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97174,6 +97218,7 @@ void m68000_device::nbcd_b_ais_ipm() // 4810 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97233,7 +97278,6 @@ void m68000_device::nbcd_b_aips_ipm() // 4818 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97265,6 +97309,7 @@ void m68000_device::nbcd_b_aips_ipm() // 4818 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97326,7 +97371,6 @@ void m68000_device::nbcd_b_pais_ipm() // 4820 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97358,6 +97402,7 @@ void m68000_device::nbcd_b_pais_ipm() // 4820 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -97438,7 +97483,6 @@ void m68000_device::nbcd_b_das_ipm() // 4828 fff8 // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97470,6 +97514,7 @@ void m68000_device::nbcd_b_das_ipm() // 4828 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97591,7 +97636,6 @@ adsw2: // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97623,6 +97667,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97702,7 +97747,6 @@ void m68000_device::nbcd_b_adr16_ipm() // 4838 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97734,6 +97778,7 @@ void m68000_device::nbcd_b_adr16_ipm() // 4838 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -97837,7 +97882,6 @@ void m68000_device::nbcd_b_adr32_ipm() // 4839 ffff // 15c nbcm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); @@ -97869,6 +97913,7 @@ void m68000_device::nbcd_b_adr32_ipm() // 4839 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -97901,7 +97946,6 @@ void m68000_device::swap_ds_ipm() // 4840 fff8 // 341 swap1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); @@ -97910,6 +97954,7 @@ void m68000_device::swap_ds_ipm() // 4840 fff8 sr_nzvc(); // 342 swap2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -97953,7 +97998,6 @@ void m68000_device::pea_ais_ipm() // 4850 fff8 // 17c peaa1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98007,6 +98051,7 @@ void m68000_device::pea_ais_ipm() // 4850 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98072,7 +98117,6 @@ void m68000_device::pea_das_ipm() // 4868 fff8 // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98128,6 +98172,7 @@ void m68000_device::pea_das_ipm() // 4868 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98230,7 +98275,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98288,6 +98332,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98374,6 +98419,7 @@ void m68000_device::pea_adr16_ipm() // 4878 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -98401,11 +98447,11 @@ void m68000_device::pea_adr16_ipm() // 4878 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98516,6 +98562,7 @@ void m68000_device::pea_adr32_ipm() // 4879 ffff // 348 mawl3 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_at; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98543,11 +98590,11 @@ void m68000_device::pea_adr32_ipm() // 4879 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98612,7 +98659,6 @@ void m68000_device::pea_dpc_ipm() // 487a ffff // 17e pead2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_aluo) + m_at; // 17f pead3 @@ -98668,6 +98714,7 @@ void m68000_device::pea_dpc_ipm() // 487a ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98769,7 +98816,6 @@ peax3: peax4: // 218 peax4 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_at = m_au; // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 alu_and(m_au, 0xffff); @@ -98827,6 +98873,7 @@ peax4: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -98865,7 +98912,6 @@ void m68000_device::ext_w_ds_ipm() // 4880 fff8 // 133 nnrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 @@ -98873,6 +98919,7 @@ void m68000_device::ext_w_ds_ipm() // 4880 fff8 sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -98978,10 +99025,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99087,11 +99134,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99221,10 +99268,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99395,10 +99442,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99528,10 +99575,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99685,10 +99732,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99727,7 +99774,6 @@ void m68000_device::ext_l_ds_ipm() // 48c0 fff8 // 232 extr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 @@ -99735,6 +99781,7 @@ void m68000_device::ext_l_ds_ipm() // 48c0 fff8 sr_nzvc(); // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99863,10 +99910,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -99996,11 +100043,11 @@ push3: // 043 push3 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = m_at; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100153,10 +100200,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100350,10 +100397,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100506,10 +100553,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100686,10 +100733,10 @@ mmrw2: // 025 mmrw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100728,7 +100775,6 @@ void m68000_device::tst_b_ds_ipm() // 4a00 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -100737,6 +100783,7 @@ void m68000_device::tst_b_ds_ipm() // 4a00 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100800,7 +100847,6 @@ void m68000_device::tst_b_ais_ipm() // 4a10 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100808,6 +100854,7 @@ void m68000_device::tst_b_ais_ipm() // 4a10 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100876,7 +100923,6 @@ void m68000_device::tst_b_aips_ipm() // 4a18 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100884,6 +100930,7 @@ void m68000_device::tst_b_aips_ipm() // 4a18 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -100954,7 +101001,6 @@ void m68000_device::tst_b_pais_ipm() // 4a20 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -100962,6 +101008,7 @@ void m68000_device::tst_b_pais_ipm() // 4a20 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101051,7 +101098,6 @@ void m68000_device::tst_b_das_ipm() // 4a28 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101059,6 +101105,7 @@ void m68000_device::tst_b_das_ipm() // 4a28 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101191,7 +101238,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101199,6 +101245,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101287,7 +101334,6 @@ void m68000_device::tst_b_adr16_ipm() // 4a38 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101295,6 +101341,7 @@ void m68000_device::tst_b_adr16_ipm() // 4a38 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101408,7 +101455,6 @@ void m68000_device::tst_b_adr32_ipm() // 4a39 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101416,6 +101462,7 @@ void m68000_device::tst_b_adr32_ipm() // 4a39 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101455,7 +101502,6 @@ void m68000_device::tst_w_ds_ipm() // 4a40 fff8 // 12d tsrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -101464,6 +101510,7 @@ void m68000_device::tst_w_ds_ipm() // 4a40 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101531,7 +101578,6 @@ void m68000_device::tst_w_ais_ipm() // 4a50 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101539,6 +101585,7 @@ void m68000_device::tst_w_ais_ipm() // 4a50 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101611,7 +101658,6 @@ void m68000_device::tst_w_aips_ipm() // 4a58 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101619,6 +101665,7 @@ void m68000_device::tst_w_aips_ipm() // 4a58 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101693,7 +101740,6 @@ void m68000_device::tst_w_pais_ipm() // 4a60 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101701,6 +101747,7 @@ void m68000_device::tst_w_pais_ipm() // 4a60 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101794,7 +101841,6 @@ void m68000_device::tst_w_das_ipm() // 4a68 fff8 // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101802,6 +101848,7 @@ void m68000_device::tst_w_das_ipm() // 4a68 fff8 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -101938,7 +101985,6 @@ adsw2: // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -101946,6 +101992,7 @@ adsw2: sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102038,7 +102085,6 @@ void m68000_device::tst_w_adr16_ipm() // 4a78 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102046,6 +102092,7 @@ void m68000_device::tst_w_adr16_ipm() // 4a78 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102163,7 +102210,6 @@ void m68000_device::tst_w_adr32_ipm() // 4a79 ffff // 3c3 tsmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102171,6 +102217,7 @@ void m68000_device::tst_w_adr32_ipm() // 4a79 ffff sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102210,7 +102257,6 @@ void m68000_device::tst_l_ds_ipm() // 4a80 fff8 // 125 tsrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; @@ -102219,6 +102265,7 @@ void m68000_device::tst_l_ds_ipm() // 4a80 fff8 sr_nzvc(); // 362 tsrl2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102312,7 +102359,6 @@ void m68000_device::tst_l_ais_ipm() // 4a90 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102320,6 +102366,7 @@ void m68000_device::tst_l_ais_ipm() // 4a90 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102417,7 +102464,6 @@ void m68000_device::tst_l_aips_ipm() // 4a98 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102425,6 +102471,7 @@ void m68000_device::tst_l_aips_ipm() // 4a98 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102523,7 +102570,6 @@ void m68000_device::tst_l_pais_ipm() // 4aa0 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102531,6 +102577,7 @@ void m68000_device::tst_l_pais_ipm() // 4aa0 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102649,7 +102696,6 @@ void m68000_device::tst_l_das_ipm() // 4aa8 fff8 // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102657,6 +102703,7 @@ void m68000_device::tst_l_das_ipm() // 4aa8 fff8 sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102818,7 +102865,6 @@ adsl2: // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102826,6 +102872,7 @@ adsl2: sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -102947,7 +102994,6 @@ void m68000_device::tst_l_adr16_ipm() // 4ab8 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -102955,6 +103001,7 @@ void m68000_device::tst_l_adr16_ipm() // 4ab8 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103101,7 +103148,6 @@ void m68000_device::tst_l_adr32_ipm() // 4ab9 ffff // 3cb tsml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -103109,6 +103155,7 @@ void m68000_device::tst_l_adr32_ipm() // 4ab9 ffff sr_nzvc(); // 361 tsml2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103150,13 +103197,13 @@ void m68000_device::tas_ds_ipm() // 4ac0 fff8 // 345 tasr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[ry]; m_pc = m_au; // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103253,12 +103300,12 @@ void m68000_device::tas_ais_ipm() // 4ad0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103356,12 +103403,12 @@ void m68000_device::tas_aips_ipm() // 4ad8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103461,12 +103508,12 @@ void m68000_device::tas_pais_ipm() // 4ae0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103585,12 +103632,12 @@ void m68000_device::tas_das_ipm() // 4ae8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103752,12 +103799,12 @@ adsw2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -103875,12 +103922,12 @@ void m68000_device::tas_adr16_ipm() // 4af8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104023,12 +104070,12 @@ void m68000_device::tas_adr32_ipm() // 4af9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104158,10 +104205,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104226,7 +104273,6 @@ void m68000_device::movem_w_aips_list_ipm() // 4c98 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -104295,6 +104341,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104449,10 +104496,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104647,10 +104694,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104803,10 +104850,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -104986,10 +105033,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105143,10 +105190,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105340,10 +105387,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105496,10 +105543,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105564,7 +105611,6 @@ void m68000_device::movem_l_aips_list_ipm() // 4cd8 fff8 // 115 popm2 m_aob = m_da[ry]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !m_movemr; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -105657,6 +105703,7 @@ popm6: m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -105835,10 +105882,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106057,10 +106104,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106237,10 +106284,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106444,10 +106491,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106625,10 +106672,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -106846,10 +106893,10 @@ mmaw2: // 328 mmaw2 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107050,11 +107097,11 @@ void m68000_device::trap_imm4_ipm() // 4e40 fff0 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107122,7 +107169,6 @@ void m68000_device::link_as_imm16_ipm() // 4e50 fff8 // 30c link3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = high16(m_at); m_base_ssw = SSW_DATA; [[fallthrough]]; case 3: @@ -107171,6 +107217,7 @@ void m68000_device::link_as_imm16_ipm() // 4e50 fff8 // 349 mmiw2 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107237,7 +107284,6 @@ void m68000_device::unlk_as_ipm() // 4e58 fff8 // 1fe unlk2 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -107266,6 +107312,7 @@ void m68000_device::unlk_as_ipm() // 4e58 fff8 m_au = m_pc + 2; // 27d unlk4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107309,13 +107356,13 @@ void m68000_device::move_as_usp_ipm() // 4e60 fff8 // 2f5 lusp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_at = m_da[ry]; m_ftu = m_dbin; // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107360,13 +107407,13 @@ void m68000_device::move_usp_as_ipm() // 4e68 fff8 // 230 susp1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[15]; m_at = m_da[15]; m_au = m_da[ry]; // 233 extr2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107409,6 +107456,7 @@ void m68000_device::reset_ipm() // 4e70 ffff } // 3a6 rset1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107418,7 +107466,6 @@ void m68000_device::reset_ipm() // 4e70 ffff m_icount -= 2; // 27b rset2 m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = ext32(m_aluo) - 2; m_icount -= 2; m_reset_cb(1); @@ -107439,6 +107486,7 @@ rset5: // 064 rset5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107477,11 +107525,11 @@ void m68000_device::nop_ipm() // 4e71 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107522,6 +107570,7 @@ void m68000_device::stop_i16u_ipm() // 4e72 ffff } // 3a2 stop1 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_movemr = m_dbin; m_pc = m_au; m_ftu = m_dbin; @@ -107531,6 +107580,7 @@ void m68000_device::stop_i16u_ipm() // 4e72 ffff m_icount -= 2; // 327 aaa01 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_sr = m_ftu & (SR_CCR|SR_SR); update_user_super(); @@ -107659,11 +107709,11 @@ void m68000_device::rte_ipm() // 4e73 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107774,11 +107824,11 @@ void m68000_device::rts_ipm() // 4e75 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -107816,7 +107866,6 @@ void m68000_device::trapv_ipm() // 4e76 ffff // 06d trpv1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_V; m_alub = m_dbin; m_ftu = m_sr; @@ -107827,6 +107876,7 @@ void m68000_device::trapv_ipm() // 4e76 ffff trpv2: // 0e2 trpv2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108038,11 +108088,11 @@ trpv3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108182,11 +108232,11 @@ void m68000_device::rtr_ipm() // 4e77 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108273,7 +108323,6 @@ void m68000_device::jsr_ais_ipm() // 4e90 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108298,11 +108347,11 @@ void m68000_device::jsr_ais_ipm() // 4e90 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108395,7 +108444,6 @@ void m68000_device::jsr_das_ipm() // 4ea8 fff8 // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108420,11 +108468,11 @@ void m68000_device::jsr_das_ipm() // 4ea8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108537,7 +108585,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108562,11 +108609,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108655,7 +108702,6 @@ void m68000_device::jsr_adr16_ipm() // 4eb8 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108680,11 +108726,11 @@ void m68000_device::jsr_adr16_ipm() // 4eb8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108795,7 +108841,6 @@ void m68000_device::jsr_adr32_ipm() // 4eb9 ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -108820,11 +108865,11 @@ void m68000_device::jsr_adr32_ipm() // 4eb9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -108916,7 +108961,6 @@ void m68000_device::jsr_dpc_ipm() // 4eba ffff // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -108941,11 +108985,11 @@ void m68000_device::jsr_dpc_ipm() // 4eba ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109057,7 +109101,6 @@ jsrd2: // 272 jsaw3 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_pc; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109082,11 +109125,11 @@ jsrd2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109148,11 +109191,11 @@ void m68000_device::jmp_ais_ipm() // 4ed0 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109218,11 +109261,11 @@ void m68000_device::jmp_das_ipm() // 4ee8 fff8 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109308,11 +109351,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109376,11 +109419,11 @@ void m68000_device::jmp_adr16_ipm() // 4ef8 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109465,11 +109508,11 @@ void m68000_device::jmp_adr32_ipm() // 4ef9 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109534,11 +109577,11 @@ void m68000_device::jmp_dpc_ipm() // 4efa ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109623,11 +109666,11 @@ bbci3: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109666,7 +109709,6 @@ void m68000_device::addq_b_imm3_ds_ipm() // 5000 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -109674,6 +109716,7 @@ void m68000_device::addq_b_imm3_ds_ipm() // 5000 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109737,7 +109780,6 @@ void m68000_device::addq_b_imm3_ais_ipm() // 5010 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109768,6 +109810,7 @@ void m68000_device::addq_b_imm3_ais_ipm() // 5010 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109827,7 +109870,6 @@ void m68000_device::addq_b_imm3_aips_ipm() // 5018 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109858,6 +109900,7 @@ void m68000_device::addq_b_imm3_aips_ipm() // 5018 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109919,7 +109962,6 @@ void m68000_device::addq_b_imm3_pais_ipm() // 5020 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -109950,6 +109992,7 @@ void m68000_device::addq_b_imm3_pais_ipm() // 5020 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110030,7 +110073,6 @@ void m68000_device::addq_b_imm3_das_ipm() // 5028 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110061,6 +110103,7 @@ void m68000_device::addq_b_imm3_das_ipm() // 5028 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110182,7 +110225,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110213,6 +110255,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110292,7 +110335,6 @@ void m68000_device::addq_b_imm3_adr16_ipm() // 5038 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110323,6 +110365,7 @@ void m68000_device::addq_b_imm3_adr16_ipm() // 5038 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -110426,7 +110469,6 @@ void m68000_device::addq_b_imm3_adr32_ipm() // 5039 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110457,6 +110499,7 @@ void m68000_device::addq_b_imm3_adr32_ipm() // 5039 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110489,7 +110532,6 @@ void m68000_device::addq_w_imm3_ds_ipm() // 5040 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -110497,6 +110539,7 @@ void m68000_device::addq_w_imm3_ds_ipm() // 5040 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110537,7 +110580,6 @@ void m68000_device::addq_w_imm3_as_ipm() // 5048 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -110571,6 +110613,7 @@ void m68000_device::addq_w_imm3_as_ipm() // 5048 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -110618,7 +110661,6 @@ void m68000_device::addq_w_imm3_ais_ipm() // 5050 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110649,6 +110691,7 @@ void m68000_device::addq_w_imm3_ais_ipm() // 5050 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110718,7 +110761,6 @@ void m68000_device::addq_w_imm3_aips_ipm() // 5058 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110749,6 +110791,7 @@ void m68000_device::addq_w_imm3_aips_ipm() // 5058 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110820,7 +110863,6 @@ void m68000_device::addq_w_imm3_pais_ipm() // 5060 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110851,6 +110893,7 @@ void m68000_device::addq_w_imm3_pais_ipm() // 5060 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110941,7 +110984,6 @@ void m68000_device::addq_w_imm3_das_ipm() // 5068 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -110972,6 +111014,7 @@ void m68000_device::addq_w_imm3_das_ipm() // 5068 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111103,7 +111146,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111134,6 +111176,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111223,7 +111266,6 @@ void m68000_device::addq_w_imm3_adr16_ipm() // 5078 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111254,6 +111296,7 @@ void m68000_device::addq_w_imm3_adr16_ipm() // 5078 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -111367,7 +111410,6 @@ void m68000_device::addq_w_imm3_adr32_ipm() // 5079 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111398,6 +111440,7 @@ void m68000_device::addq_w_imm3_adr32_ipm() // 5079 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111436,7 +111479,6 @@ void m68000_device::addq_l_imm3_ds_ipm() // 5080 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -111472,6 +111514,7 @@ void m68000_device::addq_l_imm3_ds_ipm() // 5080 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111492,7 +111535,6 @@ void m68000_device::addq_l_imm3_as_ipm() // 5088 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -111526,6 +111568,7 @@ void m68000_device::addq_l_imm3_as_ipm() // 5088 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -111597,7 +111640,6 @@ void m68000_device::addq_l_imm3_ais_ipm() // 5090 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111654,6 +111696,7 @@ void m68000_device::addq_l_imm3_ais_ipm() // 5090 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111746,7 +111789,6 @@ void m68000_device::addq_l_imm3_aips_ipm() // 5098 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111803,6 +111845,7 @@ void m68000_device::addq_l_imm3_aips_ipm() // 5098 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111896,7 +111939,6 @@ void m68000_device::addq_l_imm3_pais_ipm() // 50a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -111953,6 +111995,7 @@ void m68000_device::addq_l_imm3_pais_ipm() // 50a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112066,7 +112109,6 @@ void m68000_device::addq_l_imm3_das_ipm() // 50a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112123,6 +112165,7 @@ void m68000_device::addq_l_imm3_das_ipm() // 50a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112277,7 +112320,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112334,6 +112376,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112449,7 +112492,6 @@ void m68000_device::addq_l_imm3_adr16_ipm() // 50b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112506,6 +112548,7 @@ void m68000_device::addq_l_imm3_adr16_ipm() // 50b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -112645,7 +112688,6 @@ void m68000_device::addq_l_imm3_adr32_ipm() // 50b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112702,6 +112744,7 @@ void m68000_device::addq_l_imm3_adr32_ipm() // 50b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112740,7 +112783,6 @@ void m68000_device::st_ds_ipm() // 50c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -112752,6 +112794,7 @@ void m68000_device::st_ds_ipm() // 50c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112810,6 +112853,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -112878,6 +112922,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -112912,12 +112957,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112950,12 +112995,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -112990,6 +113035,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -113052,7 +113098,6 @@ void m68000_device::st_ais_ipm() // 50d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113120,6 +113165,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113182,7 +113228,6 @@ void m68000_device::st_aips_ipm() // 50d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113250,6 +113295,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113314,7 +113360,6 @@ void m68000_device::st_pais_ipm() // 50e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113382,6 +113427,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113465,7 +113511,6 @@ void m68000_device::st_das_ipm() // 50e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113533,6 +113578,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113659,7 +113705,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113727,6 +113772,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113809,7 +113855,6 @@ void m68000_device::st_adr16_ipm() // 50f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -113877,6 +113922,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -113984,7 +114030,6 @@ void m68000_device::st_adr32_ipm() // 50f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 1; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -114052,6 +114097,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114085,7 +114131,6 @@ void m68000_device::subq_b_imm3_ds_ipm() // 5100 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114093,6 +114138,7 @@ void m68000_device::subq_b_imm3_ds_ipm() // 5100 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114156,7 +114202,6 @@ void m68000_device::subq_b_imm3_ais_ipm() // 5110 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114187,6 +114232,7 @@ void m68000_device::subq_b_imm3_ais_ipm() // 5110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114246,7 +114292,6 @@ void m68000_device::subq_b_imm3_aips_ipm() // 5118 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114277,6 +114322,7 @@ void m68000_device::subq_b_imm3_aips_ipm() // 5118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114338,7 +114384,6 @@ void m68000_device::subq_b_imm3_pais_ipm() // 5120 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114369,6 +114414,7 @@ void m68000_device::subq_b_imm3_pais_ipm() // 5120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -114449,7 +114495,6 @@ void m68000_device::subq_b_imm3_das_ipm() // 5128 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114480,6 +114525,7 @@ void m68000_device::subq_b_imm3_das_ipm() // 5128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114601,7 +114647,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114632,6 +114677,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114711,7 +114757,6 @@ void m68000_device::subq_b_imm3_adr16_ipm() // 5138 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114742,6 +114787,7 @@ void m68000_device::subq_b_imm3_adr16_ipm() // 5138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -114845,7 +114891,6 @@ void m68000_device::subq_b_imm3_adr32_ipm() // 5139 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114876,6 +114921,7 @@ void m68000_device::subq_b_imm3_adr32_ipm() // 5139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -114908,7 +114954,6 @@ void m68000_device::subq_w_imm3_ds_ipm() // 5140 f1f8 // 2d8 raqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -114916,6 +114961,7 @@ void m68000_device::subq_w_imm3_ds_ipm() // 5140 f1f8 sr_xnzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -114956,7 +115002,6 @@ void m68000_device::subq_w_imm3_as_ipm() // 5148 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -114990,6 +115035,7 @@ void m68000_device::subq_w_imm3_as_ipm() // 5148 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115037,7 +115083,6 @@ void m68000_device::subq_w_imm3_ais_ipm() // 5150 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115068,6 +115113,7 @@ void m68000_device::subq_w_imm3_ais_ipm() // 5150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115137,7 +115183,6 @@ void m68000_device::subq_w_imm3_aips_ipm() // 5158 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115168,6 +115213,7 @@ void m68000_device::subq_w_imm3_aips_ipm() // 5158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115239,7 +115285,6 @@ void m68000_device::subq_w_imm3_pais_ipm() // 5160 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115270,6 +115315,7 @@ void m68000_device::subq_w_imm3_pais_ipm() // 5160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -115360,7 +115406,6 @@ void m68000_device::subq_w_imm3_das_ipm() // 5168 f1f8 // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115391,6 +115436,7 @@ void m68000_device::subq_w_imm3_das_ipm() // 5168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115522,7 +115568,6 @@ adsw2: // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115553,6 +115598,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115642,7 +115688,6 @@ void m68000_device::subq_w_imm3_adr16_ipm() // 5178 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115673,6 +115718,7 @@ void m68000_device::subq_w_imm3_adr16_ipm() // 5178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -115786,7 +115832,6 @@ void m68000_device::subq_w_imm3_adr32_ipm() // 5179 f1ff // 2f3 maqw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -115817,6 +115862,7 @@ void m68000_device::subq_w_imm3_adr32_ipm() // 5179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -115855,7 +115901,6 @@ void m68000_device::subq_l_imm3_ds_ipm() // 5180 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] @@ -115891,6 +115936,7 @@ void m68000_device::subq_l_imm3_ds_ipm() // 5180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -115911,7 +115957,6 @@ void m68000_device::subq_l_imm3_as_ipm() // 5188 f1f8 // 2dc raql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dt = ext32(m_ftu); // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] @@ -115945,6 +115990,7 @@ void m68000_device::subq_l_imm3_as_ipm() // 5188 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -116016,7 +116062,6 @@ void m68000_device::subq_l_imm3_ais_ipm() // 5190 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116073,6 +116118,7 @@ void m68000_device::subq_l_imm3_ais_ipm() // 5190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116165,7 +116211,6 @@ void m68000_device::subq_l_imm3_aips_ipm() // 5198 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116222,6 +116267,7 @@ void m68000_device::subq_l_imm3_aips_ipm() // 5198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116315,7 +116361,6 @@ void m68000_device::subq_l_imm3_pais_ipm() // 51a0 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116372,6 +116417,7 @@ void m68000_device::subq_l_imm3_pais_ipm() // 51a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -116485,7 +116531,6 @@ void m68000_device::subq_l_imm3_das_ipm() // 51a8 f1f8 // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116542,6 +116587,7 @@ void m68000_device::subq_l_imm3_das_ipm() // 51a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116696,7 +116742,6 @@ adsl2: // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116753,6 +116798,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -116868,7 +116914,6 @@ void m68000_device::subq_l_imm3_adr16_ipm() // 51b8 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -116925,6 +116970,7 @@ void m68000_device::subq_l_imm3_adr16_ipm() // 51b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -117064,7 +117110,6 @@ void m68000_device::subq_l_imm3_adr32_ipm() // 51b9 f1ff // 2f7 maql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117121,6 +117166,7 @@ void m68000_device::subq_l_imm3_adr32_ipm() // 51b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -117159,7 +117205,6 @@ void m68000_device::sf_ds_ipm() // 51c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117171,6 +117216,7 @@ void m68000_device::sf_ds_ipm() // 51c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117229,6 +117275,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -117297,6 +117344,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -117331,12 +117379,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117369,12 +117417,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117409,6 +117457,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -117471,7 +117520,6 @@ void m68000_device::sf_ais_ipm() // 51d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117539,6 +117587,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117601,7 +117650,6 @@ void m68000_device::sf_aips_ipm() // 51d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117669,6 +117717,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117733,7 +117782,6 @@ void m68000_device::sf_pais_ipm() // 51e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117801,6 +117849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -117884,7 +117933,6 @@ void m68000_device::sf_das_ipm() // 51e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -117952,6 +118000,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118078,7 +118127,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118146,6 +118194,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118228,7 +118277,6 @@ void m68000_device::sf_adr16_ipm() // 51f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118296,6 +118344,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -118403,7 +118452,6 @@ void m68000_device::sf_adr32_ipm() // 51f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118471,6 +118519,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -118504,7 +118553,6 @@ void m68000_device::shi_ds_ipm() // 52c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118516,6 +118564,7 @@ void m68000_device::shi_ds_ipm() // 52c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118574,6 +118623,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -118642,6 +118692,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -118676,12 +118727,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118714,12 +118765,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118754,6 +118805,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -118816,7 +118868,6 @@ void m68000_device::shi_ais_ipm() // 52d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -118884,6 +118935,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -118946,7 +118998,6 @@ void m68000_device::shi_aips_ipm() // 52d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119014,6 +119065,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119078,7 +119130,6 @@ void m68000_device::shi_pais_ipm() // 52e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119146,6 +119197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -119229,7 +119281,6 @@ void m68000_device::shi_das_ipm() // 52e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119297,6 +119348,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119423,7 +119475,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119491,6 +119542,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119573,7 +119625,6 @@ void m68000_device::shi_adr16_ipm() // 52f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119641,6 +119692,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -119748,7 +119800,6 @@ void m68000_device::shi_adr32_ipm() // 52f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119816,6 +119867,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -119849,7 +119901,6 @@ void m68000_device::sls_ds_ipm() // 53c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -119861,6 +119912,7 @@ void m68000_device::sls_ds_ipm() // 53c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -119919,6 +119971,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -119987,6 +120040,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -120021,12 +120075,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -120059,12 +120113,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -120099,6 +120153,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -120161,7 +120216,6 @@ void m68000_device::sls_ais_ipm() // 53d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120229,6 +120283,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120291,7 +120346,6 @@ void m68000_device::sls_aips_ipm() // 53d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120359,6 +120413,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120423,7 +120478,6 @@ void m68000_device::sls_pais_ipm() // 53e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120491,6 +120545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -120574,7 +120629,6 @@ void m68000_device::sls_das_ipm() // 53e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120642,6 +120696,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120768,7 +120823,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120836,6 +120890,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -120918,7 +120973,6 @@ void m68000_device::sls_adr16_ipm() // 53f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -120986,6 +121040,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -121093,7 +121148,6 @@ void m68000_device::sls_adr32_ipm() // 53f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121161,6 +121215,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -121194,7 +121249,6 @@ void m68000_device::scc_ds_ipm() // 54c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121206,6 +121260,7 @@ void m68000_device::scc_ds_ipm() // 54c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121264,6 +121319,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -121332,6 +121388,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -121366,12 +121423,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121404,12 +121461,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121444,6 +121501,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -121506,7 +121564,6 @@ void m68000_device::scc_ais_ipm() // 54d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121574,6 +121631,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121636,7 +121694,6 @@ void m68000_device::scc_aips_ipm() // 54d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121704,6 +121761,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121768,7 +121826,6 @@ void m68000_device::scc_pais_ipm() // 54e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121836,6 +121893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -121919,7 +121977,6 @@ void m68000_device::scc_das_ipm() // 54e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -121987,6 +122044,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122113,7 +122171,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122181,6 +122238,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122263,7 +122321,6 @@ void m68000_device::scc_adr16_ipm() // 54f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122331,6 +122388,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -122438,7 +122496,6 @@ void m68000_device::scc_adr32_ipm() // 54f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_C); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122506,6 +122563,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -122539,7 +122597,6 @@ void m68000_device::scs_ds_ipm() // 55c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122551,6 +122608,7 @@ void m68000_device::scs_ds_ipm() // 55c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122609,6 +122667,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -122677,6 +122736,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -122711,12 +122771,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122749,12 +122809,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122789,6 +122849,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -122851,7 +122912,6 @@ void m68000_device::scs_ais_ipm() // 55d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -122919,6 +122979,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -122981,7 +123042,6 @@ void m68000_device::scs_aips_ipm() // 55d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123049,6 +123109,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123113,7 +123174,6 @@ void m68000_device::scs_pais_ipm() // 55e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123181,6 +123241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -123264,7 +123325,6 @@ void m68000_device::scs_das_ipm() // 55e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123332,6 +123392,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123458,7 +123519,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123526,6 +123586,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123608,7 +123669,6 @@ void m68000_device::scs_adr16_ipm() // 55f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123676,6 +123736,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -123783,7 +123844,6 @@ void m68000_device::scs_adr32_ipm() // 55f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_C; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123851,6 +123911,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -123884,7 +123945,6 @@ void m68000_device::sne_ds_ipm() // 56c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -123896,6 +123956,7 @@ void m68000_device::sne_ds_ipm() // 56c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -123954,6 +124015,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -124022,6 +124084,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -124056,12 +124119,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -124094,12 +124157,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -124134,6 +124197,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -124196,7 +124260,6 @@ void m68000_device::sne_ais_ipm() // 56d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124264,6 +124327,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124326,7 +124390,6 @@ void m68000_device::sne_aips_ipm() // 56d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124394,6 +124457,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124458,7 +124522,6 @@ void m68000_device::sne_pais_ipm() // 56e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124526,6 +124589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -124609,7 +124673,6 @@ void m68000_device::sne_das_ipm() // 56e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124677,6 +124740,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124803,7 +124867,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -124871,6 +124934,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -124953,7 +125017,6 @@ void m68000_device::sne_adr16_ipm() // 56f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125021,6 +125084,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -125128,7 +125192,6 @@ void m68000_device::sne_adr32_ipm() // 56f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_Z); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125196,6 +125259,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -125229,7 +125293,6 @@ void m68000_device::seq_ds_ipm() // 57c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125241,6 +125304,7 @@ void m68000_device::seq_ds_ipm() // 57c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125299,6 +125363,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -125367,6 +125432,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -125401,12 +125467,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125439,12 +125505,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125479,6 +125545,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -125541,7 +125608,6 @@ void m68000_device::seq_ais_ipm() // 57d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125609,6 +125675,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125671,7 +125738,6 @@ void m68000_device::seq_aips_ipm() // 57d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125739,6 +125805,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125803,7 +125870,6 @@ void m68000_device::seq_pais_ipm() // 57e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -125871,6 +125937,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -125954,7 +126021,6 @@ void m68000_device::seq_das_ipm() // 57e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126022,6 +126088,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126148,7 +126215,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126216,6 +126282,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126298,7 +126365,6 @@ void m68000_device::seq_adr16_ipm() // 57f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126366,6 +126432,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -126473,7 +126540,6 @@ void m68000_device::seq_adr32_ipm() // 57f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_Z; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126541,6 +126607,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -126574,7 +126641,6 @@ void m68000_device::svc_ds_ipm() // 58c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126586,6 +126652,7 @@ void m68000_device::svc_ds_ipm() // 58c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126644,6 +126711,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -126712,6 +126780,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -126746,12 +126815,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126784,12 +126853,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126824,6 +126893,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -126886,7 +126956,6 @@ void m68000_device::svc_ais_ipm() // 58d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -126954,6 +127023,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127016,7 +127086,6 @@ void m68000_device::svc_aips_ipm() // 58d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127084,6 +127153,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127148,7 +127218,6 @@ void m68000_device::svc_pais_ipm() // 58e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127216,6 +127285,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -127299,7 +127369,6 @@ void m68000_device::svc_das_ipm() // 58e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127367,6 +127436,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127493,7 +127563,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127561,6 +127630,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127643,7 +127713,6 @@ void m68000_device::svc_adr16_ipm() // 58f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127711,6 +127780,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -127818,7 +127888,6 @@ void m68000_device::svc_adr32_ipm() // 58f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127886,6 +127955,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -127919,7 +127989,6 @@ void m68000_device::svs_ds_ipm() // 59c0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -127931,6 +128000,7 @@ void m68000_device::svs_ds_ipm() // 59c0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -127989,6 +128059,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -128057,6 +128128,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -128091,12 +128163,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -128129,12 +128201,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -128169,6 +128241,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -128231,7 +128304,6 @@ void m68000_device::svs_ais_ipm() // 59d0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128299,6 +128371,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128361,7 +128434,6 @@ void m68000_device::svs_aips_ipm() // 59d8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128429,6 +128501,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128493,7 +128566,6 @@ void m68000_device::svs_pais_ipm() // 59e0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128561,6 +128633,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -128644,7 +128717,6 @@ void m68000_device::svs_das_ipm() // 59e8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128712,6 +128784,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128838,7 +128911,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -128906,6 +128978,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -128988,7 +129061,6 @@ void m68000_device::svs_adr16_ipm() // 59f8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129056,6 +129128,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -129163,7 +129236,6 @@ void m68000_device::svs_adr32_ipm() // 59f9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_V; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129231,6 +129303,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -129264,7 +129337,6 @@ void m68000_device::spl_ds_ipm() // 5ac0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129276,6 +129348,7 @@ void m68000_device::spl_ds_ipm() // 5ac0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129334,6 +129407,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -129402,6 +129476,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -129436,12 +129511,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129474,12 +129549,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129514,6 +129589,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -129576,7 +129652,6 @@ void m68000_device::spl_ais_ipm() // 5ad0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129644,6 +129719,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129706,7 +129782,6 @@ void m68000_device::spl_aips_ipm() // 5ad8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129774,6 +129849,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129838,7 +129914,6 @@ void m68000_device::spl_pais_ipm() // 5ae0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -129906,6 +129981,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -129989,7 +130065,6 @@ void m68000_device::spl_das_ipm() // 5ae8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130057,6 +130132,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130183,7 +130259,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130251,6 +130326,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130333,7 +130409,6 @@ void m68000_device::spl_adr16_ipm() // 5af8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130401,6 +130476,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -130508,7 +130584,6 @@ void m68000_device::spl_adr32_ipm() // 5af9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = !(m_sr & SR_N); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130576,6 +130651,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -130609,7 +130685,6 @@ void m68000_device::smi_ds_ipm() // 5bc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130621,6 +130696,7 @@ void m68000_device::smi_ds_ipm() // 5bc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130679,6 +130755,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -130747,6 +130824,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -130781,12 +130859,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130819,12 +130897,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130859,6 +130937,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -130921,7 +131000,6 @@ void m68000_device::smi_ais_ipm() // 5bd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -130989,6 +131067,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131051,7 +131130,6 @@ void m68000_device::smi_aips_ipm() // 5bd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131119,6 +131197,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131183,7 +131262,6 @@ void m68000_device::smi_pais_ipm() // 5be0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131251,6 +131329,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -131334,7 +131413,6 @@ void m68000_device::smi_das_ipm() // 5be8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131402,6 +131480,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131528,7 +131607,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131596,6 +131674,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131678,7 +131757,6 @@ void m68000_device::smi_adr16_ipm() // 5bf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131746,6 +131824,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -131853,7 +131932,6 @@ void m68000_device::smi_adr32_ipm() // 5bf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_sr & SR_N; m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131921,6 +131999,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -131954,7 +132033,6 @@ void m68000_device::sge_ds_ipm() // 5cc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -131966,6 +132044,7 @@ void m68000_device::sge_ds_ipm() // 5cc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132024,6 +132103,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -132092,6 +132172,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -132126,12 +132207,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132164,12 +132245,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132204,6 +132285,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -132266,7 +132348,6 @@ void m68000_device::sge_ais_ipm() // 5cd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132334,6 +132415,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132396,7 +132478,6 @@ void m68000_device::sge_aips_ipm() // 5cd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132464,6 +132545,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132528,7 +132610,6 @@ void m68000_device::sge_pais_ipm() // 5ce0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132596,6 +132677,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -132679,7 +132761,6 @@ void m68000_device::sge_das_ipm() // 5ce8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132747,6 +132828,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -132873,7 +132955,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -132941,6 +133022,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133023,7 +133105,6 @@ void m68000_device::sge_adr16_ipm() // 5cf8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133091,6 +133172,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -133198,7 +133280,6 @@ void m68000_device::sge_adr32_ipm() // 5cf9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133266,6 +133347,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -133299,7 +133381,6 @@ void m68000_device::slt_ds_ipm() // 5dc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133311,6 +133392,7 @@ void m68000_device::slt_ds_ipm() // 5dc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133369,6 +133451,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -133437,6 +133520,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -133471,12 +133555,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133509,12 +133593,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133549,6 +133633,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -133611,7 +133696,6 @@ void m68000_device::slt_ais_ipm() // 5dd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133679,6 +133763,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133741,7 +133826,6 @@ void m68000_device::slt_aips_ipm() // 5dd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133809,6 +133893,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -133873,7 +133958,6 @@ void m68000_device::slt_pais_ipm() // 5de0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -133941,6 +134025,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -134024,7 +134109,6 @@ void m68000_device::slt_das_ipm() // 5de8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134092,6 +134176,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134218,7 +134303,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134286,6 +134370,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134368,7 +134453,6 @@ void m68000_device::slt_adr16_ipm() // 5df8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134436,6 +134520,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -134543,7 +134628,6 @@ void m68000_device::slt_adr32_ipm() // 5df9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134611,6 +134695,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -134644,7 +134729,6 @@ void m68000_device::sgt_ds_ipm() // 5ec0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -134656,6 +134740,7 @@ void m68000_device::sgt_ds_ipm() // 5ec0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134714,6 +134799,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -134782,6 +134868,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -134816,12 +134903,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134854,12 +134941,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134894,6 +134981,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -134956,7 +135044,6 @@ void m68000_device::sgt_ais_ipm() // 5ed0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135024,6 +135111,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135086,7 +135174,6 @@ void m68000_device::sgt_aips_ipm() // 5ed8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135154,6 +135241,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135218,7 +135306,6 @@ void m68000_device::sgt_pais_ipm() // 5ee0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135286,6 +135373,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -135369,7 +135457,6 @@ void m68000_device::sgt_das_ipm() // 5ee8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135437,6 +135524,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135563,7 +135651,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135631,6 +135718,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135713,7 +135801,6 @@ void m68000_device::sgt_adr16_ipm() // 5ef8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135781,6 +135868,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -135888,7 +135976,6 @@ void m68000_device::sgt_adr32_ipm() // 5ef9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -135956,6 +136043,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -135989,7 +136077,6 @@ void m68000_device::sle_ds_ipm() // 5fc0 fff8 // 384 sccr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136001,6 +136088,7 @@ void m68000_device::sle_ds_ipm() // 5fc0 fff8 roaw2: // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136059,6 +136147,7 @@ sccr2: alu_or8(m_aluo, 0xff); // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none @@ -136127,6 +136216,7 @@ dbcc2: dbcc6: // 0c6 dbcc6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none set_ftu_const(); @@ -136161,12 +136251,12 @@ dbcc6: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136199,12 +136289,12 @@ dbcc4: // 0c7 dbcc4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136239,6 +136329,7 @@ dbcc5: // 007 dbcc5 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -136301,7 +136392,6 @@ void m68000_device::sle_ais_ipm() // 5fd0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136369,6 +136459,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136431,7 +136522,6 @@ void m68000_device::sle_aips_ipm() // 5fd8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136499,6 +136589,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136563,7 +136654,6 @@ void m68000_device::sle_pais_ipm() // 5fe0 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136631,6 +136721,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -136714,7 +136805,6 @@ void m68000_device::sle_das_ipm() // 5fe8 fff8 // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136782,6 +136872,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -136908,7 +136999,6 @@ adsw2: // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -136976,6 +137066,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137058,7 +137149,6 @@ void m68000_device::sle_adr16_ipm() // 5ff8 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137126,6 +137216,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -137233,7 +137324,6 @@ void m68000_device::sle_adr32_ipm() // 5ff9 ffff // 380 sccb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 @@ -137301,6 +137391,7 @@ morw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -137341,6 +137432,7 @@ void m68000_device::bra_rel16_ipm() // 6000 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137404,11 +137496,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137454,6 +137546,7 @@ void m68000_device::bra_rel8_ipm() // 6000 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137490,11 +137583,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137612,11 +137705,11 @@ void m68000_device::bsr_rel16_ipm() // 6100 ffff // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137734,11 +137827,11 @@ void m68000_device::bsr_rel8_ipm() // 6100 ff00 // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137784,6 +137877,7 @@ void m68000_device::bhi_rel16_ipm() // 6200 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137847,11 +137941,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137897,6 +137991,7 @@ void m68000_device::bhi_rel8_ipm() // 6200 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -137933,11 +138028,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -137983,6 +138078,7 @@ void m68000_device::bls_rel16_ipm() // 6300 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138046,11 +138142,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138096,6 +138192,7 @@ void m68000_device::bls_rel8_ipm() // 6300 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138132,11 +138229,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138182,6 +138279,7 @@ void m68000_device::bcc_rel16_ipm() // 6400 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138245,11 +138343,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138295,6 +138393,7 @@ void m68000_device::bcc_rel8_ipm() // 6400 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138331,11 +138430,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138381,6 +138480,7 @@ void m68000_device::bcs_rel16_ipm() // 6500 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138444,11 +138544,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138494,6 +138594,7 @@ void m68000_device::bcs_rel8_ipm() // 6500 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138530,11 +138631,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138580,6 +138681,7 @@ void m68000_device::bne_rel16_ipm() // 6600 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138643,11 +138745,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138693,6 +138795,7 @@ void m68000_device::bne_rel8_ipm() // 6600 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138729,11 +138832,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138779,6 +138882,7 @@ void m68000_device::beq_rel16_ipm() // 6700 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138842,11 +138946,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138892,6 +138996,7 @@ void m68000_device::beq_rel8_ipm() // 6700 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -138928,11 +139033,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -138978,6 +139083,7 @@ void m68000_device::bvc_rel16_ipm() // 6800 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139041,11 +139147,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139091,6 +139197,7 @@ void m68000_device::bvc_rel8_ipm() // 6800 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139127,11 +139234,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139177,6 +139284,7 @@ void m68000_device::bvs_rel16_ipm() // 6900 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139240,11 +139348,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139290,6 +139398,7 @@ void m68000_device::bvs_rel8_ipm() // 6900 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139326,11 +139435,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139376,6 +139485,7 @@ void m68000_device::bpl_rel16_ipm() // 6a00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139439,11 +139549,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139489,6 +139599,7 @@ void m68000_device::bpl_rel8_ipm() // 6a00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139525,11 +139636,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139575,6 +139686,7 @@ void m68000_device::bmi_rel16_ipm() // 6b00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139638,11 +139750,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139688,6 +139800,7 @@ void m68000_device::bmi_rel8_ipm() // 6b00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139724,11 +139837,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139774,6 +139887,7 @@ void m68000_device::bge_rel16_ipm() // 6c00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139837,11 +139951,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139887,6 +140001,7 @@ void m68000_device::bge_rel8_ipm() // 6c00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -139923,11 +140038,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -139973,6 +140088,7 @@ void m68000_device::blt_rel16_ipm() // 6d00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140036,11 +140152,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140086,6 +140202,7 @@ void m68000_device::blt_rel8_ipm() // 6d00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140122,11 +140239,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140172,6 +140289,7 @@ void m68000_device::bgt_rel16_ipm() // 6e00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140235,11 +140353,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140285,6 +140403,7 @@ void m68000_device::bgt_rel8_ipm() // 6e00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140321,11 +140440,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140371,6 +140490,7 @@ void m68000_device::ble_rel16_ipm() // 6f00 ffff bbcw3: // 085 bbcw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140434,11 +140554,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140484,6 +140604,7 @@ void m68000_device::ble_rel8_ipm() // 6f00 ff00 bbci2: // 045 bbci2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -140520,11 +140641,11 @@ b: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140563,7 +140684,6 @@ void m68000_device::moveq_imm8o_dd_ipm() // 7000 f100 // 23b rlql1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; @@ -140572,6 +140692,7 @@ void m68000_device::moveq_imm8o_dd_ipm() // 7000 f100 sr_nzvc(); // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140611,7 +140732,6 @@ void m68000_device::or_b_ds_dd_ipm() // 8000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -140619,6 +140739,7 @@ void m68000_device::or_b_ds_dd_ipm() // 8000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140685,7 +140806,6 @@ void m68000_device::or_b_ais_dd_ipm() // 8010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140693,6 +140813,7 @@ void m68000_device::or_b_ais_dd_ipm() // 8010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140764,7 +140885,6 @@ void m68000_device::or_b_aips_dd_ipm() // 8018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140772,6 +140892,7 @@ void m68000_device::or_b_aips_dd_ipm() // 8018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140845,7 +140966,6 @@ void m68000_device::or_b_pais_dd_ipm() // 8020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140853,6 +140973,7 @@ void m68000_device::or_b_pais_dd_ipm() // 8020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -140945,7 +141066,6 @@ void m68000_device::or_b_das_dd_ipm() // 8028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -140953,6 +141073,7 @@ void m68000_device::or_b_das_dd_ipm() // 8028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141088,7 +141209,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141096,6 +141216,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141187,7 +141308,6 @@ void m68000_device::or_b_adr16_dd_ipm() // 8038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141195,6 +141315,7 @@ void m68000_device::or_b_adr16_dd_ipm() // 8038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141311,7 +141432,6 @@ void m68000_device::or_b_adr32_dd_ipm() // 8039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141319,6 +141439,7 @@ void m68000_device::or_b_adr32_dd_ipm() // 8039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141410,7 +141531,6 @@ void m68000_device::or_b_dpc_dd_ipm() // 803a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141418,6 +141538,7 @@ void m68000_device::or_b_dpc_dd_ipm() // 803a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141552,7 +141673,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141560,6 +141680,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141629,7 +141750,6 @@ void m68000_device::or_b_imm8_dd_ipm() // 803c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -141637,6 +141757,7 @@ void m68000_device::or_b_imm8_dd_ipm() // 803c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141679,7 +141800,6 @@ void m68000_device::or_w_ds_dd_ipm() // 8040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -141687,6 +141807,7 @@ void m68000_device::or_w_ds_dd_ipm() // 8040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141757,7 +141878,6 @@ void m68000_device::or_w_ais_dd_ipm() // 8050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141765,6 +141885,7 @@ void m68000_device::or_w_ais_dd_ipm() // 8050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141840,7 +141961,6 @@ void m68000_device::or_w_aips_dd_ipm() // 8058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141848,6 +141968,7 @@ void m68000_device::or_w_aips_dd_ipm() // 8058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -141925,7 +142046,6 @@ void m68000_device::or_w_pais_dd_ipm() // 8060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -141933,6 +142053,7 @@ void m68000_device::or_w_pais_dd_ipm() // 8060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142029,7 +142150,6 @@ void m68000_device::or_w_das_dd_ipm() // 8068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142037,6 +142157,7 @@ void m68000_device::or_w_das_dd_ipm() // 8068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142176,7 +142297,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142184,6 +142304,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142279,7 +142400,6 @@ void m68000_device::or_w_adr16_dd_ipm() // 8078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142287,6 +142407,7 @@ void m68000_device::or_w_adr16_dd_ipm() // 8078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142407,7 +142528,6 @@ void m68000_device::or_w_adr32_dd_ipm() // 8079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142415,6 +142535,7 @@ void m68000_device::or_w_adr32_dd_ipm() // 8079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142510,7 +142631,6 @@ void m68000_device::or_w_dpc_dd_ipm() // 807a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142518,6 +142638,7 @@ void m68000_device::or_w_dpc_dd_ipm() // 807a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142656,7 +142777,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142664,6 +142784,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142733,7 +142854,6 @@ void m68000_device::or_w_imm16_dd_ipm() // 807c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -142741,6 +142861,7 @@ void m68000_device::or_w_imm16_dd_ipm() // 807c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -142783,7 +142904,6 @@ void m68000_device::or_l_ds_dd_ipm() // 8080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -142820,6 +142940,7 @@ void m68000_device::or_l_ds_dd_ipm() // 8080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -142894,7 +143015,6 @@ void m68000_device::or_l_ais_dd_ipm() // 8090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -142928,6 +143048,7 @@ void m68000_device::or_l_ais_dd_ipm() // 8090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143006,7 +143127,6 @@ void m68000_device::or_l_aips_dd_ipm() // 8098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143040,6 +143160,7 @@ void m68000_device::or_l_aips_dd_ipm() // 8098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143119,7 +143240,6 @@ void m68000_device::or_l_pais_dd_ipm() // 80a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143153,6 +143273,7 @@ void m68000_device::or_l_pais_dd_ipm() // 80a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143252,7 +143373,6 @@ void m68000_device::or_l_das_dd_ipm() // 80a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143286,6 +143406,7 @@ void m68000_device::or_l_das_dd_ipm() // 80a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143428,7 +143549,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143462,6 +143582,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143564,7 +143685,6 @@ void m68000_device::or_l_adr16_dd_ipm() // 80b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143598,6 +143718,7 @@ void m68000_device::or_l_adr16_dd_ipm() // 80b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143725,7 +143846,6 @@ void m68000_device::or_l_adr32_dd_ipm() // 80b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143759,6 +143879,7 @@ void m68000_device::or_l_adr32_dd_ipm() // 80b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -143857,7 +143978,6 @@ void m68000_device::or_l_dpc_dd_ipm() // 80ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -143891,6 +144011,7 @@ void m68000_device::or_l_dpc_dd_ipm() // 80ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144032,7 +144153,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -144066,6 +144186,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144140,7 +144261,6 @@ void m68000_device::or_l_imm32_dd_ipm() // 80bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -144177,6 +144297,7 @@ void m68000_device::or_l_imm32_dd_ipm() // 80bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none @@ -144396,11 +144517,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144432,10 +144553,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144549,7 +144670,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144559,7 +144679,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -144569,6 +144688,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144836,11 +144956,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144872,10 +144992,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -144989,7 +145109,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -144999,7 +145118,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145009,6 +145127,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145280,11 +145399,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145316,10 +145435,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145433,7 +145552,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145443,7 +145561,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145453,6 +145570,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145726,11 +145844,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145762,10 +145880,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -145879,7 +145997,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -145889,7 +146006,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -145899,6 +146015,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146191,11 +146308,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146227,10 +146344,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146344,7 +146461,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146354,7 +146470,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146364,6 +146479,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146697,11 +146813,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146733,10 +146849,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -146850,7 +146966,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -146860,7 +146975,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -146870,6 +146984,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147161,11 +147276,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147197,10 +147312,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147314,7 +147429,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147324,7 +147438,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147334,6 +147447,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147649,11 +147763,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147685,10 +147799,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -147802,7 +147916,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -147812,7 +147925,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -147822,6 +147934,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148113,11 +148226,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148149,10 +148262,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148266,7 +148379,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148276,7 +148388,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148286,6 +148397,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148618,11 +148730,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148654,10 +148766,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -148771,7 +148883,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -148781,7 +148892,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -148791,6 +148901,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149057,11 +149168,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149093,10 +149204,10 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149210,7 +149321,6 @@ dvumd: // 0c0 dvumd m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; m_au = m_pc + 2; // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 @@ -149220,7 +149330,6 @@ dvumf: // 080 dvumf m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; @@ -149230,6 +149339,7 @@ dvumf: dvum0: // 212 dvum0 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149273,7 +149383,6 @@ void m68000_device::sbcd_ds_dd_ipm() // 8100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -149305,6 +149414,7 @@ void m68000_device::sbcd_ds_dd_ipm() // 8100 f1f8 // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -149355,7 +149465,6 @@ void m68000_device::sbcd_pais_paid_ipm() // 8108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -149407,6 +149516,7 @@ void m68000_device::sbcd_pais_paid_ipm() // 8108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149464,7 +149574,6 @@ void m68000_device::or_b_dd_ais_ipm() // 8110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149494,6 +149603,7 @@ void m68000_device::or_b_dd_ais_ipm() // 8110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149557,7 +149667,6 @@ void m68000_device::or_b_dd_aips_ipm() // 8118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149587,6 +149696,7 @@ void m68000_device::or_b_dd_aips_ipm() // 8118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149652,7 +149762,6 @@ void m68000_device::or_b_dd_pais_ipm() // 8120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149682,6 +149791,7 @@ void m68000_device::or_b_dd_pais_ipm() // 8120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -149766,7 +149876,6 @@ void m68000_device::or_b_dd_das_ipm() // 8128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149796,6 +149905,7 @@ void m68000_device::or_b_dd_das_ipm() // 8128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -149923,7 +150033,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -149953,6 +150062,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150036,7 +150146,6 @@ void m68000_device::or_b_dd_adr16_ipm() // 8138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150066,6 +150175,7 @@ void m68000_device::or_b_dd_adr16_ipm() // 8138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150174,7 +150284,6 @@ void m68000_device::or_b_dd_adr32_ipm() // 8139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150204,6 +150313,7 @@ void m68000_device::or_b_dd_adr32_ipm() // 8139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -150266,7 +150376,6 @@ void m68000_device::or_w_dd_ais_ipm() // 8150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150296,6 +150405,7 @@ void m68000_device::or_w_dd_ais_ipm() // 8150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150369,7 +150479,6 @@ void m68000_device::or_w_dd_aips_ipm() // 8158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150399,6 +150508,7 @@ void m68000_device::or_w_dd_aips_ipm() // 8158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150474,7 +150584,6 @@ void m68000_device::or_w_dd_pais_ipm() // 8160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150504,6 +150613,7 @@ void m68000_device::or_w_dd_pais_ipm() // 8160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -150598,7 +150708,6 @@ void m68000_device::or_w_dd_das_ipm() // 8168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150628,6 +150737,7 @@ void m68000_device::or_w_dd_das_ipm() // 8168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150765,7 +150875,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150795,6 +150904,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -150888,7 +150998,6 @@ void m68000_device::or_w_dd_adr16_ipm() // 8178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -150918,6 +151027,7 @@ void m68000_device::or_w_dd_adr16_ipm() // 8178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -151036,7 +151146,6 @@ void m68000_device::or_w_dd_adr32_ipm() // 8179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151066,6 +151175,7 @@ void m68000_device::or_w_dd_adr32_ipm() // 8179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151158,7 +151268,6 @@ void m68000_device::or_l_dd_ais_ipm() // 8190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151214,6 +151323,7 @@ void m68000_device::or_l_dd_ais_ipm() // 8190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151310,7 +151420,6 @@ void m68000_device::or_l_dd_aips_ipm() // 8198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151366,6 +151475,7 @@ void m68000_device::or_l_dd_aips_ipm() // 8198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151463,7 +151573,6 @@ void m68000_device::or_l_dd_pais_ipm() // 81a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151519,6 +151628,7 @@ void m68000_device::or_l_dd_pais_ipm() // 81a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -151636,7 +151746,6 @@ void m68000_device::or_l_dd_das_ipm() // 81a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151692,6 +151801,7 @@ void m68000_device::or_l_dd_das_ipm() // 81a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -151852,7 +151962,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -151908,6 +152017,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152028,7 +152138,6 @@ void m68000_device::or_l_dd_adr16_ipm() // 81b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152084,6 +152193,7 @@ void m68000_device::or_l_dd_adr16_ipm() // 81b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -152229,7 +152339,6 @@ void m68000_device::or_l_dd_adr32_ipm() // 81b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152285,6 +152394,7 @@ void m68000_device::or_l_dd_adr32_ipm() // 81b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -152530,11 +152640,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152607,7 +152717,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -152620,6 +152729,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152751,7 +152861,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -152782,7 +152891,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -152814,6 +152922,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -152847,14 +152956,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153105,11 +153212,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153182,7 +153289,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153195,6 +153301,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153326,7 +153433,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153357,7 +153463,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153389,6 +153494,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153422,14 +153528,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -153684,11 +153788,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153761,7 +153865,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -153774,6 +153877,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -153905,7 +154009,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -153936,7 +154039,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -153968,6 +154070,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154001,14 +154104,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154265,11 +154366,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154342,7 +154443,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154355,6 +154455,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154486,7 +154587,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -154517,7 +154617,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -154549,6 +154648,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154582,14 +154682,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -154865,11 +154963,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -154942,7 +155040,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -154955,6 +155052,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155086,7 +155184,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155117,7 +155214,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155149,6 +155245,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155182,14 +155279,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -155506,11 +155601,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155583,7 +155678,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -155596,6 +155690,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155727,7 +155822,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -155758,7 +155852,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -155790,6 +155883,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -155823,14 +155917,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156105,11 +156197,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156182,7 +156274,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156195,6 +156286,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156326,7 +156418,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156357,7 +156448,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -156389,6 +156479,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156422,14 +156513,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -156728,11 +156817,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 23: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156805,7 +156894,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -156818,6 +156906,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -156949,7 +157038,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -156980,7 +157068,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157012,6 +157099,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157045,14 +157133,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157327,11 +157413,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157404,7 +157490,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -157417,6 +157502,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157548,7 +157634,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -157579,7 +157664,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -157611,6 +157695,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -157644,14 +157729,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -157967,11 +158050,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158044,7 +158127,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158057,6 +158139,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158188,7 +158271,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158219,7 +158301,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158251,6 +158332,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158284,14 +158366,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158541,11 +158621,11 @@ dvur2: // 363 b m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // 34c mmrw3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 19: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158618,7 +158698,6 @@ dvumz: // 2d5 dvumz m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs09: @@ -158631,6 +158710,7 @@ dvs09: dvuma: // 0e6 dvuma m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158762,7 +158842,6 @@ dvs17: // 04d dvs17 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; @@ -158793,7 +158872,6 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); @@ -158825,6 +158903,7 @@ dvs1e: leaa2: // 066 leaa2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158858,14 +158937,12 @@ dvum4: // 2d1 dvum4 m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; goto dvuma; dvs1c: // 251 dvs1c m_aob = m_pc; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_at, m_aluo); m_au = m_pc + 2; // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 @@ -158884,7 +158961,6 @@ void m68000_device::sub_b_ds_dd_ipm() // 9000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -158892,6 +158968,7 @@ void m68000_device::sub_b_ds_dd_ipm() // 9000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -158956,7 +159033,6 @@ void m68000_device::sub_b_ais_dd_ipm() // 9010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -158964,6 +159040,7 @@ void m68000_device::sub_b_ais_dd_ipm() // 9010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159032,7 +159109,6 @@ void m68000_device::sub_b_aips_dd_ipm() // 9018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159040,6 +159116,7 @@ void m68000_device::sub_b_aips_dd_ipm() // 9018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159110,7 +159187,6 @@ void m68000_device::sub_b_pais_dd_ipm() // 9020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159118,6 +159194,7 @@ void m68000_device::sub_b_pais_dd_ipm() // 9020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159207,7 +159284,6 @@ void m68000_device::sub_b_das_dd_ipm() // 9028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159215,6 +159291,7 @@ void m68000_device::sub_b_das_dd_ipm() // 9028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159345,7 +159422,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159353,6 +159429,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159441,7 +159518,6 @@ void m68000_device::sub_b_adr16_dd_ipm() // 9038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159449,6 +159525,7 @@ void m68000_device::sub_b_adr16_dd_ipm() // 9038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159561,7 +159638,6 @@ void m68000_device::sub_b_adr32_dd_ipm() // 9039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159569,6 +159645,7 @@ void m68000_device::sub_b_adr32_dd_ipm() // 9039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159657,7 +159734,6 @@ void m68000_device::sub_b_dpc_dd_ipm() // 903a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159665,6 +159741,7 @@ void m68000_device::sub_b_dpc_dd_ipm() // 903a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159794,7 +159871,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -159802,6 +159878,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159869,7 +159946,6 @@ void m68000_device::sub_b_imm8_dd_ipm() // 903c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -159877,6 +159953,7 @@ void m68000_device::sub_b_imm8_dd_ipm() // 903c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159918,7 +159995,6 @@ void m68000_device::sub_w_ds_dd_ipm() // 9040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -159926,6 +160002,7 @@ void m68000_device::sub_w_ds_dd_ipm() // 9040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -159967,7 +160044,6 @@ void m68000_device::sub_w_as_dd_ipm() // 9048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -159975,6 +160051,7 @@ void m68000_device::sub_w_as_dd_ipm() // 9048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160043,7 +160120,6 @@ void m68000_device::sub_w_ais_dd_ipm() // 9050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160051,6 +160127,7 @@ void m68000_device::sub_w_ais_dd_ipm() // 9050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160123,7 +160200,6 @@ void m68000_device::sub_w_aips_dd_ipm() // 9058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160131,6 +160207,7 @@ void m68000_device::sub_w_aips_dd_ipm() // 9058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160205,7 +160282,6 @@ void m68000_device::sub_w_pais_dd_ipm() // 9060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160213,6 +160289,7 @@ void m68000_device::sub_w_pais_dd_ipm() // 9060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160306,7 +160383,6 @@ void m68000_device::sub_w_das_dd_ipm() // 9068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160314,6 +160390,7 @@ void m68000_device::sub_w_das_dd_ipm() // 9068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160448,7 +160525,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160456,6 +160532,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160548,7 +160625,6 @@ void m68000_device::sub_w_adr16_dd_ipm() // 9078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160556,6 +160632,7 @@ void m68000_device::sub_w_adr16_dd_ipm() // 9078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160672,7 +160749,6 @@ void m68000_device::sub_w_adr32_dd_ipm() // 9079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160680,6 +160756,7 @@ void m68000_device::sub_w_adr32_dd_ipm() // 9079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160772,7 +160849,6 @@ void m68000_device::sub_w_dpc_dd_ipm() // 907a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160780,6 +160856,7 @@ void m68000_device::sub_w_dpc_dd_ipm() // 907a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160913,7 +160990,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -160921,6 +160997,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -160988,7 +161065,6 @@ void m68000_device::sub_w_imm16_dd_ipm() // 907c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -160996,6 +161072,7 @@ void m68000_device::sub_w_imm16_dd_ipm() // 907c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -161037,7 +161114,6 @@ void m68000_device::sub_l_ds_dd_ipm() // 9080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -161073,6 +161149,7 @@ void m68000_device::sub_l_ds_dd_ipm() // 9080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161094,7 +161171,6 @@ void m68000_device::sub_l_as_dd_ipm() // 9088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -161130,6 +161206,7 @@ void m68000_device::sub_l_as_dd_ipm() // 9088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161202,7 +161279,6 @@ void m68000_device::sub_l_ais_dd_ipm() // 9090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161236,6 +161312,7 @@ void m68000_device::sub_l_ais_dd_ipm() // 9090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161311,7 +161388,6 @@ void m68000_device::sub_l_aips_dd_ipm() // 9098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161345,6 +161421,7 @@ void m68000_device::sub_l_aips_dd_ipm() // 9098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161421,7 +161498,6 @@ void m68000_device::sub_l_pais_dd_ipm() // 90a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161455,6 +161531,7 @@ void m68000_device::sub_l_pais_dd_ipm() // 90a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161551,7 +161628,6 @@ void m68000_device::sub_l_das_dd_ipm() // 90a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161585,6 +161661,7 @@ void m68000_device::sub_l_das_dd_ipm() // 90a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161722,7 +161799,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161756,6 +161832,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -161854,7 +161931,6 @@ void m68000_device::sub_l_adr16_dd_ipm() // 90b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -161888,6 +161964,7 @@ void m68000_device::sub_l_adr16_dd_ipm() // 90b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162010,7 +162087,6 @@ void m68000_device::sub_l_adr32_dd_ipm() // 90b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162044,6 +162120,7 @@ void m68000_device::sub_l_adr32_dd_ipm() // 90b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162139,7 +162216,6 @@ void m68000_device::sub_l_dpc_dd_ipm() // 90ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162173,6 +162249,7 @@ void m68000_device::sub_l_dpc_dd_ipm() // 90ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162309,7 +162386,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -162343,6 +162419,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162414,7 +162491,6 @@ void m68000_device::sub_l_imm32_dd_ipm() // 90bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -162450,6 +162526,7 @@ void m68000_device::sub_l_imm32_dd_ipm() // 90bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162471,7 +162548,6 @@ void m68000_device::suba_w_ds_ad_ipm() // 90c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -162505,6 +162581,7 @@ void m68000_device::suba_w_ds_ad_ipm() // 90c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162526,7 +162603,6 @@ void m68000_device::suba_w_as_ad_ipm() // 90c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -162560,6 +162636,7 @@ void m68000_device::suba_w_as_ad_ipm() // 90c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162608,7 +162685,6 @@ void m68000_device::suba_w_ais_ad_ipm() // 90d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162642,6 +162718,7 @@ void m68000_device::suba_w_ais_ad_ipm() // 90d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162694,7 +162771,6 @@ void m68000_device::suba_w_aips_ad_ipm() // 90d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162728,6 +162804,7 @@ void m68000_device::suba_w_aips_ad_ipm() // 90d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162782,7 +162859,6 @@ void m68000_device::suba_w_pais_ad_ipm() // 90e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162816,6 +162892,7 @@ void m68000_device::suba_w_pais_ad_ipm() // 90e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -162889,7 +162966,6 @@ void m68000_device::suba_w_das_ad_ipm() // 90e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -162923,6 +162999,7 @@ void m68000_device::suba_w_das_ad_ipm() // 90e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163037,7 +163114,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163071,6 +163147,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163143,7 +163220,6 @@ void m68000_device::suba_w_adr16_ad_ipm() // 90f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163177,6 +163253,7 @@ void m68000_device::suba_w_adr16_ad_ipm() // 90f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163273,7 +163350,6 @@ void m68000_device::suba_w_adr32_ad_ipm() // 90f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163307,6 +163383,7 @@ void m68000_device::suba_w_adr32_ad_ipm() // 90f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163379,7 +163456,6 @@ void m68000_device::suba_w_dpc_ad_ipm() // 90fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163413,6 +163489,7 @@ void m68000_device::suba_w_dpc_ad_ipm() // 90fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163526,7 +163603,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -163560,6 +163636,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163607,7 +163684,6 @@ void m68000_device::suba_w_imm16_ad_ipm() // 90fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -163641,6 +163717,7 @@ void m68000_device::suba_w_imm16_ad_ipm() // 90fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -163662,7 +163739,6 @@ void m68000_device::subx_b_ds_dd_ipm() // 9100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -163670,6 +163746,7 @@ void m68000_device::subx_b_ds_dd_ipm() // 9100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -163740,7 +163817,6 @@ void m68000_device::subx_b_pais_paid_ipm() // 9108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -163790,6 +163866,7 @@ void m68000_device::subx_b_pais_paid_ipm() // 9108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -163846,7 +163923,6 @@ void m68000_device::sub_b_dd_ais_ipm() // 9110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -163876,6 +163952,7 @@ void m68000_device::sub_b_dd_ais_ipm() // 9110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -163936,7 +164013,6 @@ void m68000_device::sub_b_dd_aips_ipm() // 9118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -163966,6 +164042,7 @@ void m68000_device::sub_b_dd_aips_ipm() // 9118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164028,7 +164105,6 @@ void m68000_device::sub_b_dd_pais_ipm() // 9120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164058,6 +164134,7 @@ void m68000_device::sub_b_dd_pais_ipm() // 9120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164139,7 +164216,6 @@ void m68000_device::sub_b_dd_das_ipm() // 9128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164169,6 +164245,7 @@ void m68000_device::sub_b_dd_das_ipm() // 9128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164291,7 +164368,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164321,6 +164397,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164401,7 +164478,6 @@ void m68000_device::sub_b_dd_adr16_ipm() // 9138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164431,6 +164507,7 @@ void m68000_device::sub_b_dd_adr16_ipm() // 9138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164535,7 +164612,6 @@ void m68000_device::sub_b_dd_adr32_ipm() // 9139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164565,6 +164641,7 @@ void m68000_device::sub_b_dd_adr32_ipm() // 9139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -164598,7 +164675,6 @@ void m68000_device::subx_w_ds_dd_ipm() // 9140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -164606,6 +164682,7 @@ void m68000_device::subx_w_ds_dd_ipm() // 9140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164680,7 +164757,6 @@ void m68000_device::subx_w_pais_paid_ipm() // 9148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -164734,6 +164810,7 @@ void m68000_device::subx_w_pais_paid_ipm() // 9148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -164800,7 +164877,6 @@ void m68000_device::sub_w_dd_ais_ipm() // 9150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164830,6 +164906,7 @@ void m68000_device::sub_w_dd_ais_ipm() // 9150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -164900,7 +164977,6 @@ void m68000_device::sub_w_dd_aips_ipm() // 9158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -164930,6 +165006,7 @@ void m68000_device::sub_w_dd_aips_ipm() // 9158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165002,7 +165079,6 @@ void m68000_device::sub_w_dd_pais_ipm() // 9160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165032,6 +165108,7 @@ void m68000_device::sub_w_dd_pais_ipm() // 9160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -165123,7 +165200,6 @@ void m68000_device::sub_w_dd_das_ipm() // 9168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165153,6 +165229,7 @@ void m68000_device::sub_w_dd_das_ipm() // 9168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165285,7 +165362,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165315,6 +165391,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165405,7 +165482,6 @@ void m68000_device::sub_w_dd_adr16_ipm() // 9178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165435,6 +165511,7 @@ void m68000_device::sub_w_dd_adr16_ipm() // 9178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -165549,7 +165626,6 @@ void m68000_device::sub_w_dd_adr32_ipm() // 9179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165579,6 +165655,7 @@ void m68000_device::sub_w_dd_adr32_ipm() // 9179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165618,7 +165695,6 @@ void m68000_device::subx_l_ds_dd_ipm() // 9180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -165654,6 +165730,7 @@ void m68000_device::subx_l_ds_dd_ipm() // 9180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -165784,7 +165861,6 @@ void m68000_device::subx_l_pais_paid_ipm() // 9188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -165836,6 +165912,7 @@ void m68000_device::subx_l_pais_paid_ipm() // 9188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -165926,7 +166003,6 @@ void m68000_device::sub_l_dd_ais_ipm() // 9190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -165982,6 +166058,7 @@ void m68000_device::sub_l_dd_ais_ipm() // 9190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166075,7 +166152,6 @@ void m68000_device::sub_l_dd_aips_ipm() // 9198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166131,6 +166207,7 @@ void m68000_device::sub_l_dd_aips_ipm() // 9198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166225,7 +166302,6 @@ void m68000_device::sub_l_dd_pais_ipm() // 91a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166281,6 +166357,7 @@ void m68000_device::sub_l_dd_pais_ipm() // 91a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -166395,7 +166472,6 @@ void m68000_device::sub_l_dd_das_ipm() // 91a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166451,6 +166527,7 @@ void m68000_device::sub_l_dd_das_ipm() // 91a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166606,7 +166683,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166662,6 +166738,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166778,7 +166855,6 @@ void m68000_device::sub_l_dd_adr16_ipm() // 91b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -166834,6 +166910,7 @@ void m68000_device::sub_l_dd_adr16_ipm() // 91b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -166974,7 +167051,6 @@ void m68000_device::sub_l_dd_adr32_ipm() // 91b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -167030,6 +167106,7 @@ void m68000_device::sub_l_dd_adr32_ipm() // 91b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -167069,7 +167146,6 @@ void m68000_device::suba_l_ds_ad_ipm() // 91c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -167103,6 +167179,7 @@ void m68000_device::suba_l_ds_ad_ipm() // 91c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167124,7 +167201,6 @@ void m68000_device::suba_l_as_ad_ipm() // 91c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -167158,6 +167234,7 @@ void m68000_device::suba_l_as_ad_ipm() // 91c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167230,7 +167307,6 @@ void m68000_device::suba_l_ais_ad_ipm() // 91d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167262,6 +167338,7 @@ void m68000_device::suba_l_ais_ad_ipm() // 91d0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167337,7 +167414,6 @@ void m68000_device::suba_l_aips_ad_ipm() // 91d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167369,6 +167445,7 @@ void m68000_device::suba_l_aips_ad_ipm() // 91d8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167445,7 +167522,6 @@ void m68000_device::suba_l_pais_ad_ipm() // 91e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167477,6 +167553,7 @@ void m68000_device::suba_l_pais_ad_ipm() // 91e0 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167573,7 +167650,6 @@ void m68000_device::suba_l_das_ad_ipm() // 91e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167605,6 +167681,7 @@ void m68000_device::suba_l_das_ad_ipm() // 91e8 f1f8 alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167742,7 +167819,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167774,6 +167850,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -167872,7 +167949,6 @@ void m68000_device::suba_l_adr16_ad_ipm() // 91f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -167904,6 +167980,7 @@ void m68000_device::suba_l_adr16_ad_ipm() // 91f8 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168026,7 +168103,6 @@ void m68000_device::suba_l_adr32_ad_ipm() // 91f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168058,6 +168134,7 @@ void m68000_device::suba_l_adr32_ad_ipm() // 91f9 f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168153,7 +168230,6 @@ void m68000_device::suba_l_dpc_ad_ipm() // 91fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168185,6 +168261,7 @@ void m68000_device::suba_l_dpc_ad_ipm() // 91fa f1ff alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168321,7 +168398,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -168353,6 +168429,7 @@ adsl2: alu_subc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168424,7 +168501,6 @@ void m68000_device::suba_l_imm32_ad_ipm() // 91fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -168458,6 +168534,7 @@ void m68000_device::suba_l_imm32_ad_ipm() // 91fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -168479,7 +168556,6 @@ void m68000_device::cmp_b_ds_dd_ipm() // b000 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -168487,6 +168563,7 @@ void m68000_device::cmp_b_ds_dd_ipm() // b000 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168550,7 +168627,6 @@ void m68000_device::cmp_b_ais_dd_ipm() // b010 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168558,6 +168634,7 @@ void m68000_device::cmp_b_ais_dd_ipm() // b010 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168625,7 +168702,6 @@ void m68000_device::cmp_b_aips_dd_ipm() // b018 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168633,6 +168709,7 @@ void m68000_device::cmp_b_aips_dd_ipm() // b018 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168702,7 +168779,6 @@ void m68000_device::cmp_b_pais_dd_ipm() // b020 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168710,6 +168786,7 @@ void m68000_device::cmp_b_pais_dd_ipm() // b020 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168798,7 +168875,6 @@ void m68000_device::cmp_b_das_dd_ipm() // b028 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168806,6 +168882,7 @@ void m68000_device::cmp_b_das_dd_ipm() // b028 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -168935,7 +169012,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -168943,6 +169019,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169030,7 +169107,6 @@ void m68000_device::cmp_b_adr16_dd_ipm() // b038 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169038,6 +169114,7 @@ void m68000_device::cmp_b_adr16_dd_ipm() // b038 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169149,7 +169226,6 @@ void m68000_device::cmp_b_adr32_dd_ipm() // b039 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169157,6 +169233,7 @@ void m68000_device::cmp_b_adr32_dd_ipm() // b039 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169244,7 +169321,6 @@ void m68000_device::cmp_b_dpc_dd_ipm() // b03a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169252,6 +169328,7 @@ void m68000_device::cmp_b_dpc_dd_ipm() // b03a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169380,7 +169457,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169388,6 +169464,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169454,7 +169531,6 @@ void m68000_device::cmp_b_imm8_dd_ipm() // b03c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -169462,6 +169538,7 @@ void m68000_device::cmp_b_imm8_dd_ipm() // b03c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169502,7 +169579,6 @@ void m68000_device::cmp_w_ds_dd_ipm() // b040 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -169510,6 +169586,7 @@ void m68000_device::cmp_w_ds_dd_ipm() // b040 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169550,7 +169627,6 @@ void m68000_device::cmp_w_as_dd_ipm() // b048 f1f8 // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -169558,6 +169634,7 @@ void m68000_device::cmp_w_as_dd_ipm() // b048 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169625,7 +169702,6 @@ void m68000_device::cmp_w_ais_dd_ipm() // b050 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169633,6 +169709,7 @@ void m68000_device::cmp_w_ais_dd_ipm() // b050 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169704,7 +169781,6 @@ void m68000_device::cmp_w_aips_dd_ipm() // b058 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169712,6 +169788,7 @@ void m68000_device::cmp_w_aips_dd_ipm() // b058 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169785,7 +169862,6 @@ void m68000_device::cmp_w_pais_dd_ipm() // b060 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169793,6 +169869,7 @@ void m68000_device::cmp_w_pais_dd_ipm() // b060 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -169885,7 +169962,6 @@ void m68000_device::cmp_w_das_dd_ipm() // b068 f1f8 // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -169893,6 +169969,7 @@ void m68000_device::cmp_w_das_dd_ipm() // b068 f1f8 sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170026,7 +170103,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170034,6 +170110,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170125,7 +170202,6 @@ void m68000_device::cmp_w_adr16_dd_ipm() // b078 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170133,6 +170209,7 @@ void m68000_device::cmp_w_adr16_dd_ipm() // b078 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170248,7 +170325,6 @@ void m68000_device::cmp_w_adr32_dd_ipm() // b079 f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170256,6 +170332,7 @@ void m68000_device::cmp_w_adr32_dd_ipm() // b079 f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170347,7 +170424,6 @@ void m68000_device::cmp_w_dpc_dd_ipm() // b07a f1ff // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170355,6 +170431,7 @@ void m68000_device::cmp_w_dpc_dd_ipm() // b07a f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170487,7 +170564,6 @@ adsw2: // 1d3 cpmw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170495,6 +170571,7 @@ adsw2: sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170561,7 +170638,6 @@ void m68000_device::cmp_w_imm16_dd_ipm() // b07c f1ff // 1d1 cprw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -170569,6 +170645,7 @@ void m68000_device::cmp_w_imm16_dd_ipm() // b07c f1ff sr_nzvc(); // 23a rcaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -170609,7 +170686,6 @@ void m68000_device::cmp_l_ds_dd_ipm() // b080 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -170642,6 +170718,7 @@ void m68000_device::cmp_l_ds_dd_ipm() // b080 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170662,7 +170739,6 @@ void m68000_device::cmp_l_as_dd_ipm() // b088 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -170695,6 +170771,7 @@ void m68000_device::cmp_l_as_dd_ipm() // b088 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170766,7 +170843,6 @@ void m68000_device::cmp_l_ais_dd_ipm() // b090 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170799,6 +170875,7 @@ void m68000_device::cmp_l_ais_dd_ipm() // b090 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170873,7 +170950,6 @@ void m68000_device::cmp_l_aips_dd_ipm() // b098 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -170906,6 +170982,7 @@ void m68000_device::cmp_l_aips_dd_ipm() // b098 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -170981,7 +171058,6 @@ void m68000_device::cmp_l_pais_dd_ipm() // b0a0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171014,6 +171090,7 @@ void m68000_device::cmp_l_pais_dd_ipm() // b0a0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171109,7 +171186,6 @@ void m68000_device::cmp_l_das_dd_ipm() // b0a8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171142,6 +171218,7 @@ void m68000_device::cmp_l_das_dd_ipm() // b0a8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171278,7 +171355,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171311,6 +171387,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171408,7 +171485,6 @@ void m68000_device::cmp_l_adr16_dd_ipm() // b0b8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171441,6 +171517,7 @@ void m68000_device::cmp_l_adr16_dd_ipm() // b0b8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171562,7 +171639,6 @@ void m68000_device::cmp_l_adr32_dd_ipm() // b0b9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171595,6 +171671,7 @@ void m68000_device::cmp_l_adr32_dd_ipm() // b0b9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171689,7 +171766,6 @@ void m68000_device::cmp_l_dpc_dd_ipm() // b0ba f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171722,6 +171798,7 @@ void m68000_device::cmp_l_dpc_dd_ipm() // b0ba f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171857,7 +171934,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -171890,6 +171966,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -171960,7 +172037,6 @@ void m68000_device::cmp_l_imm32_dd_ipm() // b0bc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -171993,6 +172069,7 @@ void m68000_device::cmp_l_imm32_dd_ipm() // b0bc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172013,7 +172090,6 @@ void m68000_device::cmpa_w_ds_ad_ipm() // b0c0 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -172046,6 +172122,7 @@ void m68000_device::cmpa_w_ds_ad_ipm() // b0c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172066,7 +172143,6 @@ void m68000_device::cmpa_w_as_ad_ipm() // b0c8 f1f8 // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -172099,6 +172175,7 @@ void m68000_device::cmpa_w_as_ad_ipm() // b0c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172146,7 +172223,6 @@ void m68000_device::cmpa_w_ais_ad_ipm() // b0d0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172179,6 +172255,7 @@ void m68000_device::cmpa_w_ais_ad_ipm() // b0d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172230,7 +172307,6 @@ void m68000_device::cmpa_w_aips_ad_ipm() // b0d8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172263,6 +172339,7 @@ void m68000_device::cmpa_w_aips_ad_ipm() // b0d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172316,7 +172393,6 @@ void m68000_device::cmpa_w_pais_ad_ipm() // b0e0 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172349,6 +172425,7 @@ void m68000_device::cmpa_w_pais_ad_ipm() // b0e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172421,7 +172498,6 @@ void m68000_device::cmpa_w_das_ad_ipm() // b0e8 f1f8 // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172454,6 +172530,7 @@ void m68000_device::cmpa_w_das_ad_ipm() // b0e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172567,7 +172644,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172600,6 +172676,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172671,7 +172748,6 @@ void m68000_device::cmpa_w_adr16_ad_ipm() // b0f8 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172704,6 +172780,7 @@ void m68000_device::cmpa_w_adr16_ad_ipm() // b0f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172799,7 +172876,6 @@ void m68000_device::cmpa_w_adr32_ad_ipm() // b0f9 f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172832,6 +172908,7 @@ void m68000_device::cmpa_w_adr32_ad_ipm() // b0f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -172903,7 +172980,6 @@ void m68000_device::cmpa_w_dpc_ad_ipm() // b0fa f1ff // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -172936,6 +173012,7 @@ void m68000_device::cmpa_w_dpc_ad_ipm() // b0fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173048,7 +173125,6 @@ adsw2: // 1cf cpmm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -173081,6 +173157,7 @@ adsw2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173127,7 +173204,6 @@ void m68000_device::cmpa_w_imm16_ad_ipm() // b0fc f1ff // 1d9 cprm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -173160,6 +173236,7 @@ void m68000_device::cmpa_w_imm16_ad_ipm() // b0fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -173180,13 +173257,13 @@ void m68000_device::eor_b_dd_ds_ipm() // b100 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173253,7 +173330,6 @@ void m68000_device::cmpm_b_aips_aipd_ipm() // b108 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -173276,6 +173352,7 @@ void m68000_device::cmpm_b_aips_aipd_ipm() // b108 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173344,7 +173421,6 @@ void m68000_device::eor_b_dd_ais_ipm() // b110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173374,6 +173450,7 @@ void m68000_device::eor_b_dd_ais_ipm() // b110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173437,7 +173514,6 @@ void m68000_device::eor_b_dd_aips_ipm() // b118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173467,6 +173543,7 @@ void m68000_device::eor_b_dd_aips_ipm() // b118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173532,7 +173609,6 @@ void m68000_device::eor_b_dd_pais_ipm() // b120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173562,6 +173638,7 @@ void m68000_device::eor_b_dd_pais_ipm() // b120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -173646,7 +173723,6 @@ void m68000_device::eor_b_dd_das_ipm() // b128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173676,6 +173752,7 @@ void m68000_device::eor_b_dd_das_ipm() // b128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173803,7 +173880,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173833,6 +173909,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -173916,7 +173993,6 @@ void m68000_device::eor_b_dd_adr16_ipm() // b138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -173946,6 +174022,7 @@ void m68000_device::eor_b_dd_adr16_ipm() // b138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174054,7 +174131,6 @@ void m68000_device::eor_b_dd_adr32_ipm() // b139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174084,6 +174160,7 @@ void m68000_device::eor_b_dd_adr32_ipm() // b139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -174118,13 +174195,13 @@ void m68000_device::eor_w_dd_ds_ipm() // b140 f1f8 // 100 roaw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174195,7 +174272,6 @@ void m68000_device::cmpm_w_aips_aipd_ipm() // b148 f1f8 // 122 cmmw3 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -174222,6 +174298,7 @@ void m68000_device::cmpm_w_aips_aipd_ipm() // b148 f1f8 // 170 cmmw4 m_aob = m_pc; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174294,7 +174371,6 @@ void m68000_device::eor_w_dd_ais_ipm() // b150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174324,6 +174400,7 @@ void m68000_device::eor_w_dd_ais_ipm() // b150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174397,7 +174474,6 @@ void m68000_device::eor_w_dd_aips_ipm() // b158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174427,6 +174503,7 @@ void m68000_device::eor_w_dd_aips_ipm() // b158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174502,7 +174579,6 @@ void m68000_device::eor_w_dd_pais_ipm() // b160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174532,6 +174608,7 @@ void m68000_device::eor_w_dd_pais_ipm() // b160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -174626,7 +174703,6 @@ void m68000_device::eor_w_dd_das_ipm() // b168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174656,6 +174732,7 @@ void m68000_device::eor_w_dd_das_ipm() // b168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174793,7 +174870,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174823,6 +174899,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -174916,7 +174993,6 @@ void m68000_device::eor_w_dd_adr16_ipm() // b178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -174946,6 +175022,7 @@ void m68000_device::eor_w_dd_adr16_ipm() // b178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -175064,7 +175141,6 @@ void m68000_device::eor_w_dd_adr32_ipm() // b179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175094,6 +175170,7 @@ void m68000_device::eor_w_dd_adr32_ipm() // b179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175134,7 +175211,6 @@ void m68000_device::eor_l_dd_ds_ipm() // b180 f1f8 // 10c roal1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] alu_eor(m_da[rx], m_da[ry]); @@ -175170,6 +175246,7 @@ void m68000_device::eor_l_dd_ds_ipm() // b180 f1f8 m_icount -= 2; // 25b roal4 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none @@ -175244,7 +175321,6 @@ void m68000_device::cmpm_l_aips_aipd_ipm() // b188 f1f8 // 12e cmml4 m_aob = m_da[rx]; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -175301,6 +175377,7 @@ void m68000_device::cmpm_l_aips_aipd_ipm() // b188 f1f8 sr_nzvc(); // 157 cmml7 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175395,7 +175472,6 @@ void m68000_device::eor_l_dd_ais_ipm() // b190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175451,6 +175527,7 @@ void m68000_device::eor_l_dd_ais_ipm() // b190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175547,7 +175624,6 @@ void m68000_device::eor_l_dd_aips_ipm() // b198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175603,6 +175679,7 @@ void m68000_device::eor_l_dd_aips_ipm() // b198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175700,7 +175777,6 @@ void m68000_device::eor_l_dd_pais_ipm() // b1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175756,6 +175832,7 @@ void m68000_device::eor_l_dd_pais_ipm() // b1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -175873,7 +175950,6 @@ void m68000_device::eor_l_dd_das_ipm() // b1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -175929,6 +176005,7 @@ void m68000_device::eor_l_dd_das_ipm() // b1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176089,7 +176166,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -176145,6 +176221,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176265,7 +176342,6 @@ void m68000_device::eor_l_dd_adr16_ipm() // b1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -176321,6 +176397,7 @@ void m68000_device::eor_l_dd_adr16_ipm() // b1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -176466,7 +176543,6 @@ void m68000_device::eor_l_dd_adr32_ipm() // b1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -176522,6 +176598,7 @@ void m68000_device::eor_l_dd_adr32_ipm() // b1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -176562,7 +176639,6 @@ void m68000_device::cmpa_l_ds_ad_ipm() // b1c0 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -176595,6 +176671,7 @@ void m68000_device::cmpa_l_ds_ad_ipm() // b1c0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176615,7 +176692,6 @@ void m68000_device::cmpa_l_as_ad_ipm() // b1c8 f1f8 // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -176648,6 +176724,7 @@ void m68000_device::cmpa_l_as_ad_ipm() // b1c8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176719,7 +176796,6 @@ void m68000_device::cmpa_l_ais_ad_ipm() // b1d0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176752,6 +176828,7 @@ void m68000_device::cmpa_l_ais_ad_ipm() // b1d0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176826,7 +176903,6 @@ void m68000_device::cmpa_l_aips_ad_ipm() // b1d8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176859,6 +176935,7 @@ void m68000_device::cmpa_l_aips_ad_ipm() // b1d8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -176934,7 +177011,6 @@ void m68000_device::cmpa_l_pais_ad_ipm() // b1e0 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -176967,6 +177043,7 @@ void m68000_device::cmpa_l_pais_ad_ipm() // b1e0 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177062,7 +177139,6 @@ void m68000_device::cmpa_l_das_ad_ipm() // b1e8 f1f8 // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177095,6 +177171,7 @@ void m68000_device::cmpa_l_das_ad_ipm() // b1e8 f1f8 sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177231,7 +177308,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177264,6 +177340,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177361,7 +177438,6 @@ void m68000_device::cmpa_l_adr16_ad_ipm() // b1f8 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177394,6 +177470,7 @@ void m68000_device::cmpa_l_adr16_ad_ipm() // b1f8 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177515,7 +177592,6 @@ void m68000_device::cmpa_l_adr32_ad_ipm() // b1f9 f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177548,6 +177624,7 @@ void m68000_device::cmpa_l_adr32_ad_ipm() // b1f9 f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177642,7 +177719,6 @@ void m68000_device::cmpa_l_dpc_ad_ipm() // b1fa f1ff // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177675,6 +177751,7 @@ void m68000_device::cmpa_l_dpc_ad_ipm() // b1fa f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177810,7 +177887,6 @@ adsl2: // 1d7 cpml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -177843,6 +177919,7 @@ adsl2: sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177913,7 +177990,6 @@ void m68000_device::cmpa_l_imm32_ad_ipm() // b1fc f1ff // 1d5 cprl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -177946,6 +178022,7 @@ void m68000_device::cmpa_l_imm32_ad_ipm() // b1fc f1ff sr_nzvc_u(); // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -177966,7 +178043,6 @@ void m68000_device::and_b_ds_dd_ipm() // c000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -177974,6 +178050,7 @@ void m68000_device::and_b_ds_dd_ipm() // c000 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178040,7 +178117,6 @@ void m68000_device::and_b_ais_dd_ipm() // c010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178048,6 +178124,7 @@ void m68000_device::and_b_ais_dd_ipm() // c010 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178119,7 +178196,6 @@ void m68000_device::and_b_aips_dd_ipm() // c018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178127,6 +178203,7 @@ void m68000_device::and_b_aips_dd_ipm() // c018 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178200,7 +178277,6 @@ void m68000_device::and_b_pais_dd_ipm() // c020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178208,6 +178284,7 @@ void m68000_device::and_b_pais_dd_ipm() // c020 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178300,7 +178377,6 @@ void m68000_device::and_b_das_dd_ipm() // c028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178308,6 +178384,7 @@ void m68000_device::and_b_das_dd_ipm() // c028 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178443,7 +178520,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178451,6 +178527,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178542,7 +178619,6 @@ void m68000_device::and_b_adr16_dd_ipm() // c038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178550,6 +178626,7 @@ void m68000_device::and_b_adr16_dd_ipm() // c038 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178666,7 +178743,6 @@ void m68000_device::and_b_adr32_dd_ipm() // c039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178674,6 +178750,7 @@ void m68000_device::and_b_adr32_dd_ipm() // c039 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178765,7 +178842,6 @@ void m68000_device::and_b_dpc_dd_ipm() // c03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178773,6 +178849,7 @@ void m68000_device::and_b_dpc_dd_ipm() // c03a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178907,7 +178984,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -178915,6 +178991,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -178984,7 +179061,6 @@ void m68000_device::and_b_imm8_dd_ipm() // c03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -178992,6 +179068,7 @@ void m68000_device::and_b_imm8_dd_ipm() // c03c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179034,7 +179111,6 @@ void m68000_device::and_w_ds_dd_ipm() // c040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -179042,6 +179118,7 @@ void m68000_device::and_w_ds_dd_ipm() // c040 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179112,7 +179189,6 @@ void m68000_device::and_w_ais_dd_ipm() // c050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179120,6 +179196,7 @@ void m68000_device::and_w_ais_dd_ipm() // c050 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179195,7 +179272,6 @@ void m68000_device::and_w_aips_dd_ipm() // c058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179203,6 +179279,7 @@ void m68000_device::and_w_aips_dd_ipm() // c058 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179280,7 +179357,6 @@ void m68000_device::and_w_pais_dd_ipm() // c060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179288,6 +179364,7 @@ void m68000_device::and_w_pais_dd_ipm() // c060 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179384,7 +179461,6 @@ void m68000_device::and_w_das_dd_ipm() // c068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179392,6 +179468,7 @@ void m68000_device::and_w_das_dd_ipm() // c068 f1f8 sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179531,7 +179608,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179539,6 +179615,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179634,7 +179711,6 @@ void m68000_device::and_w_adr16_dd_ipm() // c078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179642,6 +179718,7 @@ void m68000_device::and_w_adr16_dd_ipm() // c078 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179762,7 +179839,6 @@ void m68000_device::and_w_adr32_dd_ipm() // c079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179770,6 +179846,7 @@ void m68000_device::and_w_adr32_dd_ipm() // c079 f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -179865,7 +179942,6 @@ void m68000_device::and_w_dpc_dd_ipm() // c07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -179873,6 +179949,7 @@ void m68000_device::and_w_dpc_dd_ipm() // c07a f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -180011,7 +180088,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180019,6 +180095,7 @@ adsw2: sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -180088,7 +180165,6 @@ void m68000_device::and_w_imm16_dd_ipm() // c07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -180096,6 +180172,7 @@ void m68000_device::and_w_imm16_dd_ipm() // c07c f1ff sr_nzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -180138,7 +180215,6 @@ void m68000_device::and_l_ds_dd_ipm() // c080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -180175,6 +180251,7 @@ void m68000_device::and_l_ds_dd_ipm() // c080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180249,7 +180326,6 @@ void m68000_device::and_l_ais_dd_ipm() // c090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180283,6 +180359,7 @@ void m68000_device::and_l_ais_dd_ipm() // c090 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180361,7 +180438,6 @@ void m68000_device::and_l_aips_dd_ipm() // c098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180395,6 +180471,7 @@ void m68000_device::and_l_aips_dd_ipm() // c098 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180474,7 +180551,6 @@ void m68000_device::and_l_pais_dd_ipm() // c0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180508,6 +180584,7 @@ void m68000_device::and_l_pais_dd_ipm() // c0a0 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180607,7 +180684,6 @@ void m68000_device::and_l_das_dd_ipm() // c0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180641,6 +180717,7 @@ void m68000_device::and_l_das_dd_ipm() // c0a8 f1f8 sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180783,7 +180860,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180817,6 +180893,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -180919,7 +180996,6 @@ void m68000_device::and_l_adr16_dd_ipm() // c0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -180953,6 +181029,7 @@ void m68000_device::and_l_adr16_dd_ipm() // c0b8 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181080,7 +181157,6 @@ void m68000_device::and_l_adr32_dd_ipm() // c0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181114,6 +181190,7 @@ void m68000_device::and_l_adr32_dd_ipm() // c0b9 f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181212,7 +181289,6 @@ void m68000_device::and_l_dpc_dd_ipm() // c0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181246,6 +181322,7 @@ void m68000_device::and_l_dpc_dd_ipm() // c0ba f1ff sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181387,7 +181464,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -181421,6 +181497,7 @@ adsl2: sr_nzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181495,7 +181572,6 @@ void m68000_device::and_l_imm32_dd_ipm() // c0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -181532,6 +181608,7 @@ void m68000_device::and_l_imm32_dd_ipm() // c0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none @@ -181554,7 +181631,6 @@ void m68000_device::mulu_w_ds_dd_ipm() // c0c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -181615,6 +181691,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181667,7 +181744,6 @@ void m68000_device::mulu_w_ais_dd_ipm() // c0d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181728,6 +181804,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181784,7 +181861,6 @@ void m68000_device::mulu_w_aips_dd_ipm() // c0d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181845,6 +181921,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -181903,7 +181980,6 @@ void m68000_device::mulu_w_pais_dd_ipm() // c0e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -181964,6 +182040,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182041,7 +182118,6 @@ void m68000_device::mulu_w_das_dd_ipm() // c0e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182102,6 +182178,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182220,7 +182297,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182281,6 +182357,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182357,7 +182434,6 @@ void m68000_device::mulu_w_adr16_dd_ipm() // c0f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182418,6 +182494,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182518,7 +182595,6 @@ void m68000_device::mulu_w_adr32_dd_ipm() // c0f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182579,6 +182655,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182655,7 +182732,6 @@ void m68000_device::mulu_w_dpc_dd_ipm() // c0fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182716,6 +182792,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182833,7 +182910,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -182894,6 +182970,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -182945,7 +183022,6 @@ void m68000_device::mulu_w_imm16_dd_ipm() // c0fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -183006,6 +183082,7 @@ mulm3: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -183031,7 +183108,6 @@ void m68000_device::abcd_ds_dd_ipm() // c100 f1f8 // 1cd rbrb1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -183063,6 +183139,7 @@ void m68000_device::abcd_ds_dd_ipm() // c100 f1f8 // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? // 238 rbrb3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -183113,7 +183190,6 @@ void m68000_device::abcd_pais_paid_ipm() // c108 f1f8 // 04e asbb4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -183165,6 +183241,7 @@ void m68000_device::abcd_pais_paid_ipm() // c108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183222,7 +183299,6 @@ void m68000_device::and_b_dd_ais_ipm() // c110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183252,6 +183328,7 @@ void m68000_device::and_b_dd_ais_ipm() // c110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183315,7 +183392,6 @@ void m68000_device::and_b_dd_aips_ipm() // c118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183345,6 +183421,7 @@ void m68000_device::and_b_dd_aips_ipm() // c118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183410,7 +183487,6 @@ void m68000_device::and_b_dd_pais_ipm() // c120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183440,6 +183516,7 @@ void m68000_device::and_b_dd_pais_ipm() // c120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -183524,7 +183601,6 @@ void m68000_device::and_b_dd_das_ipm() // c128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183554,6 +183630,7 @@ void m68000_device::and_b_dd_das_ipm() // c128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183681,7 +183758,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183711,6 +183787,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183794,7 +183871,6 @@ void m68000_device::and_b_dd_adr16_ipm() // c138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183824,6 +183900,7 @@ void m68000_device::and_b_dd_adr16_ipm() // c138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -183932,7 +184009,6 @@ void m68000_device::and_b_dd_adr32_ipm() // c139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -183962,6 +184038,7 @@ void m68000_device::and_b_dd_adr32_ipm() // c139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -183996,7 +184073,6 @@ void m68000_device::exg_dd_ds_ipm() // c140 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184027,6 +184103,7 @@ void m68000_device::exg_dd_ds_ipm() // c140 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184047,7 +184124,6 @@ void m68000_device::exg_ad_as_ipm() // c148 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184078,6 +184154,7 @@ void m68000_device::exg_ad_as_ipm() // c148 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -184126,7 +184203,6 @@ void m68000_device::and_w_dd_ais_ipm() // c150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184156,6 +184232,7 @@ void m68000_device::and_w_dd_ais_ipm() // c150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184229,7 +184306,6 @@ void m68000_device::and_w_dd_aips_ipm() // c158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184259,6 +184335,7 @@ void m68000_device::and_w_dd_aips_ipm() // c158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184334,7 +184411,6 @@ void m68000_device::and_w_dd_pais_ipm() // c160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184364,6 +184440,7 @@ void m68000_device::and_w_dd_pais_ipm() // c160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -184458,7 +184535,6 @@ void m68000_device::and_w_dd_das_ipm() // c168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184488,6 +184564,7 @@ void m68000_device::and_w_dd_das_ipm() // c168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184625,7 +184702,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184655,6 +184731,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184748,7 +184825,6 @@ void m68000_device::and_w_dd_adr16_ipm() // c178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184778,6 +184854,7 @@ void m68000_device::and_w_dd_adr16_ipm() // c178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -184896,7 +184973,6 @@ void m68000_device::and_w_dd_adr32_ipm() // c179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -184926,6 +185002,7 @@ void m68000_device::and_w_dd_adr32_ipm() // c179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -184966,7 +185043,6 @@ void m68000_device::exg_dd_as_ipm() // c188 f1f8 // 3e3 exge1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_dcr = m_da[rx]; m_at = m_da[rx]; @@ -184997,6 +185073,7 @@ void m68000_device::exg_dd_as_ipm() // c188 f1f8 m_dbin = m_edb; // 08d rcal3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; set_ftu_const(); m_icount -= 2; @@ -185069,7 +185146,6 @@ void m68000_device::and_l_dd_ais_ipm() // c190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185125,6 +185201,7 @@ void m68000_device::and_l_dd_ais_ipm() // c190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185221,7 +185298,6 @@ void m68000_device::and_l_dd_aips_ipm() // c198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185277,6 +185353,7 @@ void m68000_device::and_l_dd_aips_ipm() // c198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185374,7 +185451,6 @@ void m68000_device::and_l_dd_pais_ipm() // c1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185430,6 +185506,7 @@ void m68000_device::and_l_dd_pais_ipm() // c1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -185547,7 +185624,6 @@ void m68000_device::and_l_dd_das_ipm() // c1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185603,6 +185679,7 @@ void m68000_device::and_l_dd_das_ipm() // c1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185763,7 +185840,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185819,6 +185895,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -185939,7 +186016,6 @@ void m68000_device::and_l_dd_adr16_ipm() // c1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -185995,6 +186071,7 @@ void m68000_device::and_l_dd_adr16_ipm() // c1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -186140,7 +186217,6 @@ void m68000_device::and_l_dd_adr32_ipm() // c1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -186196,6 +186272,7 @@ void m68000_device::and_l_dd_adr32_ipm() // c1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -186236,7 +186313,6 @@ void m68000_device::muls_w_ds_dd_ipm() // c1c0 f1f8 // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_da[ry]; m_at = m_au; @@ -186299,6 +186375,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186358,7 +186435,6 @@ void m68000_device::muls_w_ais_dd_ipm() // c1d0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186421,6 +186497,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186484,7 +186561,6 @@ void m68000_device::muls_w_aips_dd_ipm() // c1d8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186547,6 +186623,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186612,7 +186689,6 @@ void m68000_device::muls_w_pais_dd_ipm() // c1e0 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186675,6 +186751,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186759,7 +186836,6 @@ void m68000_device::muls_w_das_dd_ipm() // c1e8 f1f8 // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -186822,6 +186898,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -186947,7 +187024,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187010,6 +187086,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187093,7 +187170,6 @@ void m68000_device::muls_w_adr16_dd_ipm() // c1f8 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187156,6 +187232,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187263,7 +187340,6 @@ void m68000_device::muls_w_adr32_dd_ipm() // c1f9 f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187326,6 +187402,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187409,7 +187486,6 @@ void m68000_device::muls_w_dpc_dd_ipm() // c1fa f1ff // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187472,6 +187548,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187596,7 +187673,6 @@ adsw2: // 15a mulm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dbin; m_at = m_au; @@ -187659,6 +187735,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187717,7 +187794,6 @@ void m68000_device::muls_w_imm16_dd_ipm() // c1fc f1ff // 15b mulr1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_alub = m_da[rx]; m_alue = m_dt; m_at = m_au; @@ -187780,6 +187856,7 @@ mulm5: mulm6: // 020 mulm6 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; @@ -187812,7 +187889,6 @@ void m68000_device::add_b_ds_dd_ipm() // d000 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -187820,6 +187896,7 @@ void m68000_device::add_b_ds_dd_ipm() // d000 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -187884,7 +187961,6 @@ void m68000_device::add_b_ais_dd_ipm() // d010 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187892,6 +187968,7 @@ void m68000_device::add_b_ais_dd_ipm() // d010 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -187960,7 +188037,6 @@ void m68000_device::add_b_aips_dd_ipm() // d018 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -187968,6 +188044,7 @@ void m68000_device::add_b_aips_dd_ipm() // d018 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188038,7 +188115,6 @@ void m68000_device::add_b_pais_dd_ipm() // d020 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188046,6 +188122,7 @@ void m68000_device::add_b_pais_dd_ipm() // d020 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188135,7 +188212,6 @@ void m68000_device::add_b_das_dd_ipm() // d028 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188143,6 +188219,7 @@ void m68000_device::add_b_das_dd_ipm() // d028 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188273,7 +188350,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188281,6 +188357,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188369,7 +188446,6 @@ void m68000_device::add_b_adr16_dd_ipm() // d038 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188377,6 +188453,7 @@ void m68000_device::add_b_adr16_dd_ipm() // d038 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188489,7 +188566,6 @@ void m68000_device::add_b_adr32_dd_ipm() // d039 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188497,6 +188573,7 @@ void m68000_device::add_b_adr32_dd_ipm() // d039 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188585,7 +188662,6 @@ void m68000_device::add_b_dpc_dd_ipm() // d03a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188593,6 +188669,7 @@ void m68000_device::add_b_dpc_dd_ipm() // d03a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188722,7 +188799,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188730,6 +188806,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188797,7 +188874,6 @@ void m68000_device::add_b_imm8_dd_ipm() // d03c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -188805,6 +188881,7 @@ void m68000_device::add_b_imm8_dd_ipm() // d03c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188846,7 +188923,6 @@ void m68000_device::add_w_ds_dd_ipm() // d040 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -188854,6 +188930,7 @@ void m68000_device::add_w_ds_dd_ipm() // d040 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188895,7 +188972,6 @@ void m68000_device::add_w_as_dd_ipm() // d048 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -188903,6 +188979,7 @@ void m68000_device::add_w_as_dd_ipm() // d048 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -188971,7 +189048,6 @@ void m68000_device::add_w_ais_dd_ipm() // d050 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -188979,6 +189055,7 @@ void m68000_device::add_w_ais_dd_ipm() // d050 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189051,7 +189128,6 @@ void m68000_device::add_w_aips_dd_ipm() // d058 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189059,6 +189135,7 @@ void m68000_device::add_w_aips_dd_ipm() // d058 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189133,7 +189210,6 @@ void m68000_device::add_w_pais_dd_ipm() // d060 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189141,6 +189217,7 @@ void m68000_device::add_w_pais_dd_ipm() // d060 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189234,7 +189311,6 @@ void m68000_device::add_w_das_dd_ipm() // d068 f1f8 // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189242,6 +189318,7 @@ void m68000_device::add_w_das_dd_ipm() // d068 f1f8 sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189376,7 +189453,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189384,6 +189460,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189476,7 +189553,6 @@ void m68000_device::add_w_adr16_dd_ipm() // d078 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189484,6 +189560,7 @@ void m68000_device::add_w_adr16_dd_ipm() // d078 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189600,7 +189677,6 @@ void m68000_device::add_w_adr32_dd_ipm() // d079 f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189608,6 +189684,7 @@ void m68000_device::add_w_adr32_dd_ipm() // d079 f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189700,7 +189777,6 @@ void m68000_device::add_w_dpc_dd_ipm() // d07a f1ff // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189708,6 +189784,7 @@ void m68000_device::add_w_dpc_dd_ipm() // d07a f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189841,7 +189918,6 @@ adsw2: // 1c3 romw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -189849,6 +189925,7 @@ adsw2: sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189916,7 +189993,6 @@ void m68000_device::add_w_imm16_dd_ipm() // d07c f1ff // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -189924,6 +190000,7 @@ void m68000_device::add_w_imm16_dd_ipm() // d07c f1ff sr_xnzvc(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -189965,7 +190042,6 @@ void m68000_device::add_l_ds_dd_ipm() // d080 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -190001,6 +190077,7 @@ void m68000_device::add_l_ds_dd_ipm() // d080 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190022,7 +190099,6 @@ void m68000_device::add_l_as_dd_ipm() // d088 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] @@ -190058,6 +190134,7 @@ void m68000_device::add_l_as_dd_ipm() // d088 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190130,7 +190207,6 @@ void m68000_device::add_l_ais_dd_ipm() // d090 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190164,6 +190240,7 @@ void m68000_device::add_l_ais_dd_ipm() // d090 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190239,7 +190316,6 @@ void m68000_device::add_l_aips_dd_ipm() // d098 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190273,6 +190349,7 @@ void m68000_device::add_l_aips_dd_ipm() // d098 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190349,7 +190426,6 @@ void m68000_device::add_l_pais_dd_ipm() // d0a0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190383,6 +190459,7 @@ void m68000_device::add_l_pais_dd_ipm() // d0a0 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190479,7 +190556,6 @@ void m68000_device::add_l_das_dd_ipm() // d0a8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190513,6 +190589,7 @@ void m68000_device::add_l_das_dd_ipm() // d0a8 f1f8 sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190650,7 +190727,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190684,6 +190760,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190782,7 +190859,6 @@ void m68000_device::add_l_adr16_dd_ipm() // d0b8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190816,6 +190892,7 @@ void m68000_device::add_l_adr16_dd_ipm() // d0b8 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -190938,7 +191015,6 @@ void m68000_device::add_l_adr32_dd_ipm() // d0b9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -190972,6 +191048,7 @@ void m68000_device::add_l_adr32_dd_ipm() // d0b9 f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191067,7 +191144,6 @@ void m68000_device::add_l_dpc_dd_ipm() // d0ba f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191101,6 +191177,7 @@ void m68000_device::add_l_dpc_dd_ipm() // d0ba f1ff sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191237,7 +191314,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] @@ -191271,6 +191347,7 @@ adsl2: sr_xnzvc_u(); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191342,7 +191419,6 @@ void m68000_device::add_l_imm32_dd_ipm() // d0bc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] @@ -191378,6 +191454,7 @@ void m68000_device::add_l_imm32_dd_ipm() // d0bc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191399,7 +191476,6 @@ void m68000_device::adda_w_ds_ad_ipm() // d0c0 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -191433,6 +191509,7 @@ void m68000_device::adda_w_ds_ad_ipm() // d0c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191454,7 +191531,6 @@ void m68000_device::adda_w_as_ad_ipm() // d0c8 f1f8 // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -191488,6 +191564,7 @@ void m68000_device::adda_w_as_ad_ipm() // d0c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191536,7 +191613,6 @@ void m68000_device::adda_w_ais_ad_ipm() // d0d0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191570,6 +191646,7 @@ void m68000_device::adda_w_ais_ad_ipm() // d0d0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191622,7 +191699,6 @@ void m68000_device::adda_w_aips_ad_ipm() // d0d8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191656,6 +191732,7 @@ void m68000_device::adda_w_aips_ad_ipm() // d0d8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191710,7 +191787,6 @@ void m68000_device::adda_w_pais_ad_ipm() // d0e0 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191744,6 +191820,7 @@ void m68000_device::adda_w_pais_ad_ipm() // d0e0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191817,7 +191894,6 @@ void m68000_device::adda_w_das_ad_ipm() // d0e8 f1f8 // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191851,6 +191927,7 @@ void m68000_device::adda_w_das_ad_ipm() // d0e8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -191965,7 +192042,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -191999,6 +192075,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192071,7 +192148,6 @@ void m68000_device::adda_w_adr16_ad_ipm() // d0f8 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192105,6 +192181,7 @@ void m68000_device::adda_w_adr16_ad_ipm() // d0f8 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192201,7 +192278,6 @@ void m68000_device::adda_w_adr32_ad_ipm() // d0f9 f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192235,6 +192311,7 @@ void m68000_device::adda_w_adr32_ad_ipm() // d0f9 f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192307,7 +192384,6 @@ void m68000_device::adda_w_dpc_ad_ipm() // d0fa f1ff // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192341,6 +192417,7 @@ void m68000_device::adda_w_dpc_ad_ipm() // d0fa f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192454,7 +192531,6 @@ adsw2: // 1c7 romm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -192488,6 +192564,7 @@ adsw2: m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192535,7 +192612,6 @@ void m68000_device::adda_w_imm16_ad_ipm() // d0fc f1ff // 1c9 rorm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -192569,6 +192645,7 @@ void m68000_device::adda_w_imm16_ad_ipm() // d0fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -192590,7 +192667,6 @@ void m68000_device::addx_b_ds_dd_ipm() // d100 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -192598,6 +192674,7 @@ void m68000_device::addx_b_ds_dd_ipm() // d100 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192671,7 +192748,6 @@ void m68000_device::addx_b_pais_paid_ipm() // d108 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00); @@ -192722,6 +192798,7 @@ void m68000_device::addx_b_pais_paid_ipm() // d108 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -192779,7 +192856,6 @@ void m68000_device::add_b_dd_ais_ipm() // d110 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192809,6 +192885,7 @@ void m68000_device::add_b_dd_ais_ipm() // d110 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192869,7 +192946,6 @@ void m68000_device::add_b_dd_aips_ipm() // d118 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192899,6 +192975,7 @@ void m68000_device::add_b_dd_aips_ipm() // d118 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -192961,7 +193038,6 @@ void m68000_device::add_b_dd_pais_ipm() // d120 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -192991,6 +193067,7 @@ void m68000_device::add_b_dd_pais_ipm() // d120 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193072,7 +193149,6 @@ void m68000_device::add_b_dd_das_ipm() // d128 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193102,6 +193178,7 @@ void m68000_device::add_b_dd_das_ipm() // d128 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193224,7 +193301,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193254,6 +193330,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193334,7 +193411,6 @@ void m68000_device::add_b_dd_adr16_ipm() // d138 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193364,6 +193440,7 @@ void m68000_device::add_b_dd_adr16_ipm() // d138 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193468,7 +193545,6 @@ void m68000_device::add_b_dd_adr32_ipm() // d139 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193498,6 +193574,7 @@ void m68000_device::add_b_dd_adr32_ipm() // d139 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -193531,7 +193608,6 @@ void m68000_device::addx_w_ds_dd_ipm() // d140 f1f8 // 1c1 rorw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -193539,6 +193615,7 @@ void m68000_device::addx_w_ds_dd_ipm() // d140 f1f8 sr_xnzvc_u(); // 27a rrgw2 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193616,7 +193693,6 @@ void m68000_device::addx_w_pais_paid_ipm() // d148 f1f8 // 04a asxw4 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_data(m_aob & ~1, 0xffff); @@ -193671,6 +193747,7 @@ void m68000_device::addx_w_pais_paid_ipm() // d148 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -193738,7 +193815,6 @@ void m68000_device::add_w_dd_ais_ipm() // d150 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193768,6 +193844,7 @@ void m68000_device::add_w_dd_ais_ipm() // d150 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193838,7 +193915,6 @@ void m68000_device::add_w_dd_aips_ipm() // d158 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193868,6 +193944,7 @@ void m68000_device::add_w_dd_aips_ipm() // d158 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -193940,7 +194017,6 @@ void m68000_device::add_w_dd_pais_ipm() // d160 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -193970,6 +194046,7 @@ void m68000_device::add_w_dd_pais_ipm() // d160 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -194061,7 +194138,6 @@ void m68000_device::add_w_dd_das_ipm() // d168 f1f8 // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194091,6 +194167,7 @@ void m68000_device::add_w_dd_das_ipm() // d168 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194223,7 +194300,6 @@ adsw2: // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194253,6 +194329,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194343,7 +194420,6 @@ void m68000_device::add_w_dd_adr16_ipm() // d178 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194373,6 +194449,7 @@ void m68000_device::add_w_dd_adr16_ipm() // d178 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -194487,7 +194564,6 @@ void m68000_device::add_w_dd_adr32_ipm() // d179 f1ff // 299 morw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194517,6 +194593,7 @@ void m68000_device::add_w_dd_adr32_ipm() // d179 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194556,7 +194633,6 @@ void m68000_device::addx_l_ds_dd_ipm() // d180 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] @@ -194593,6 +194669,7 @@ void m68000_device::addx_l_ds_dd_ipm() // d180 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none @@ -194728,7 +194805,6 @@ void m68000_device::addx_l_pais_paid_ipm() // d188 f1f8 // 061 asxl7 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -194781,6 +194857,7 @@ void m68000_device::addx_l_pais_paid_ipm() // d188 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -194872,7 +194949,6 @@ void m68000_device::add_l_dd_ais_ipm() // d190 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -194928,6 +195004,7 @@ void m68000_device::add_l_dd_ais_ipm() // d190 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195021,7 +195098,6 @@ void m68000_device::add_l_dd_aips_ipm() // d198 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195077,6 +195153,7 @@ void m68000_device::add_l_dd_aips_ipm() // d198 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195171,7 +195248,6 @@ void m68000_device::add_l_dd_pais_ipm() // d1a0 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195227,6 +195303,7 @@ void m68000_device::add_l_dd_pais_ipm() // d1a0 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -195341,7 +195418,6 @@ void m68000_device::add_l_dd_das_ipm() // d1a8 f1f8 // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195397,6 +195473,7 @@ void m68000_device::add_l_dd_das_ipm() // d1a8 f1f8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195552,7 +195629,6 @@ adsl2: // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195608,6 +195684,7 @@ adsl2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195724,7 +195801,6 @@ void m68000_device::add_l_dd_adr16_ipm() // d1b8 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195780,6 +195856,7 @@ void m68000_device::add_l_dd_adr16_ipm() // d1b8 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: @@ -195920,7 +195997,6 @@ void m68000_device::add_l_dd_adr32_ipm() // d1b9 f1ff // 29d morl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu->read_program(m_aob & ~1, 0xffff); @@ -195976,6 +196052,7 @@ void m68000_device::add_l_dd_adr32_ipm() // d1b9 f1ff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -196015,7 +196092,6 @@ void m68000_device::adda_l_ds_ad_ipm() // d1c0 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] @@ -196049,6 +196125,7 @@ void m68000_device::adda_l_ds_ad_ipm() // d1c0 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196070,7 +196147,6 @@ void m68000_device::adda_l_as_ad_ipm() // d1c8 f1f8 // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_da[ry]); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] @@ -196104,6 +196180,7 @@ void m68000_device::adda_l_as_ad_ipm() // d1c8 f1f8 m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196176,7 +196253,6 @@ void m68000_device::adda_l_ais_ad_ipm() // d1d0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196208,6 +196284,7 @@ void m68000_device::adda_l_ais_ad_ipm() // d1d0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196283,7 +196360,6 @@ void m68000_device::adda_l_aips_ad_ipm() // d1d8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196315,6 +196391,7 @@ void m68000_device::adda_l_aips_ad_ipm() // d1d8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196391,7 +196468,6 @@ void m68000_device::adda_l_pais_ad_ipm() // d1e0 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196423,6 +196499,7 @@ void m68000_device::adda_l_pais_ad_ipm() // d1e0 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196519,7 +196596,6 @@ void m68000_device::adda_l_das_ad_ipm() // d1e8 f1f8 // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196551,6 +196627,7 @@ void m68000_device::adda_l_das_ad_ipm() // d1e8 f1f8 alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196688,7 +196765,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196720,6 +196796,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196818,7 +196895,6 @@ void m68000_device::adda_l_adr16_ad_ipm() // d1f8 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -196850,6 +196926,7 @@ void m68000_device::adda_l_adr16_ad_ipm() // d1f8 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -196972,7 +197049,6 @@ void m68000_device::adda_l_adr32_ad_ipm() // d1f9 f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197004,6 +197080,7 @@ void m68000_device::adda_l_adr32_ad_ipm() // d1f9 f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197099,7 +197176,6 @@ void m68000_device::adda_l_dpc_ad_ipm() // d1fa f1ff // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197131,6 +197207,7 @@ void m68000_device::adda_l_dpc_ad_ipm() // d1fa f1ff alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197267,7 +197344,6 @@ adsl2: // 1cb roml1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dbin); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] @@ -197299,6 +197375,7 @@ adsl2: alu_addc(m_alub, high16(m_da[rx])); // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197370,7 +197447,6 @@ void m68000_device::adda_l_imm32_ad_ipm() // d1fc f1ff // 1c5 rorl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_at = ext32(m_dt); // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] @@ -197404,6 +197480,7 @@ void m68000_device::adda_l_imm32_ad_ipm() // d1fc f1ff m_icount -= 2; // 25d roml3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197424,7 +197501,6 @@ void m68000_device::asr_b_imm3_ds_ipm() // e000 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197476,6 +197552,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197496,7 +197573,6 @@ void m68000_device::lsr_b_imm3_ds_ipm() // e008 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197548,6 +197624,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197568,7 +197645,6 @@ void m68000_device::roxr_b_imm3_ds_ipm() // e010 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197620,6 +197696,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197640,7 +197717,6 @@ void m68000_device::ror_b_imm3_ds_ipm() // e018 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197692,6 +197768,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197713,7 +197790,6 @@ void m68000_device::asr_b_dd_ds_ipm() // e020 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197765,6 +197841,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197786,7 +197863,6 @@ void m68000_device::lsr_b_dd_ds_ipm() // e028 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197838,6 +197914,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197859,7 +197936,6 @@ void m68000_device::roxr_b_dd_ds_ipm() // e030 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -197911,6 +197987,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -197932,7 +198009,6 @@ void m68000_device::ror_b_dd_ds_ipm() // e038 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -197984,6 +198060,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198004,7 +198081,6 @@ void m68000_device::asr_w_imm3_ds_ipm() // e040 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198056,6 +198132,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198076,7 +198153,6 @@ void m68000_device::lsr_w_imm3_ds_ipm() // e048 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198128,6 +198204,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198148,7 +198225,6 @@ void m68000_device::roxr_w_imm3_ds_ipm() // e050 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198200,6 +198276,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198220,7 +198297,6 @@ void m68000_device::ror_w_imm3_ds_ipm() // e058 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198272,6 +198348,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198293,7 +198370,6 @@ void m68000_device::asr_w_dd_ds_ipm() // e060 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198345,6 +198421,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198366,7 +198443,6 @@ void m68000_device::lsr_w_dd_ds_ipm() // e068 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198418,6 +198494,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198439,7 +198516,6 @@ void m68000_device::roxr_w_dd_ds_ipm() // e070 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198491,6 +198567,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198512,7 +198589,6 @@ void m68000_device::ror_w_dd_ds_ipm() // e078 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -198564,6 +198640,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -198584,7 +198661,6 @@ void m68000_device::asr_l_imm3_ds_ipm() // e080 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198640,6 +198716,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198662,7 +198739,6 @@ void m68000_device::lsr_l_imm3_ds_ipm() // e088 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198718,6 +198794,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198740,7 +198817,6 @@ void m68000_device::roxr_l_imm3_ds_ipm() // e090 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -198796,6 +198872,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -198818,7 +198895,6 @@ void m68000_device::ror_l_imm3_ds_ipm() // e098 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198874,6 +198950,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198897,7 +198974,6 @@ void m68000_device::asr_l_dd_ds_ipm() // e0a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -198953,6 +199029,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -198976,7 +199053,6 @@ void m68000_device::lsr_l_dd_ds_ipm() // e0a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199032,6 +199108,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199055,7 +199132,6 @@ void m68000_device::roxr_l_dd_ds_ipm() // e0b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -199111,6 +199187,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -199134,7 +199211,6 @@ void m68000_device::ror_l_dd_ds_ipm() // e0b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -199190,6 +199266,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -199240,7 +199317,6 @@ void m68000_device::asr_ais_ipm() // e0d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199275,6 +199351,7 @@ void m68000_device::asr_ais_ipm() // e0d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199345,7 +199422,6 @@ void m68000_device::asr_aips_ipm() // e0d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199380,6 +199456,7 @@ void m68000_device::asr_aips_ipm() // e0d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199452,7 +199529,6 @@ void m68000_device::asr_pais_ipm() // e0e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199487,6 +199563,7 @@ void m68000_device::asr_pais_ipm() // e0e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -199578,7 +199655,6 @@ void m68000_device::asr_das_ipm() // e0e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199613,6 +199689,7 @@ void m68000_device::asr_das_ipm() // e0e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199745,7 +199822,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199780,6 +199856,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -199870,7 +199947,6 @@ void m68000_device::asr_adr16_ipm() // e0f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -199905,6 +199981,7 @@ void m68000_device::asr_adr16_ipm() // e0f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -200019,7 +200096,6 @@ void m68000_device::asr_adr32_ipm() // e0f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -200054,6 +200130,7 @@ void m68000_device::asr_adr32_ipm() // e0f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -200092,7 +200169,6 @@ void m68000_device::asl_b_imm3_ds_ipm() // e100 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200144,6 +200220,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200164,7 +200241,6 @@ void m68000_device::lsl_b_imm3_ds_ipm() // e108 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200216,6 +200292,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200237,7 +200314,6 @@ void m68000_device::roxl_b_imm3_ds_ipm() // e110 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200289,6 +200365,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200309,7 +200386,6 @@ void m68000_device::rol_b_imm3_ds_ipm() // e118 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200361,6 +200437,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200382,7 +200459,6 @@ void m68000_device::asl_b_dd_ds_ipm() // e120 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200434,6 +200510,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200455,7 +200532,6 @@ void m68000_device::lsl_b_dd_ds_ipm() // e128 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200507,6 +200583,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none @@ -200529,7 +200606,6 @@ void m68000_device::roxl_b_dd_ds_ipm() // e130 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200581,6 +200657,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200602,7 +200679,6 @@ void m68000_device::rol_b_dd_ds_ipm() // e138 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 @@ -200654,6 +200730,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200674,7 +200751,6 @@ void m68000_device::asl_w_imm3_ds_ipm() // e140 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200726,6 +200802,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200746,7 +200823,6 @@ void m68000_device::lsl_w_imm3_ds_ipm() // e148 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200798,6 +200874,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -200819,7 +200896,6 @@ void m68000_device::roxl_w_imm3_ds_ipm() // e150 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -200871,6 +200947,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200891,7 +200968,6 @@ void m68000_device::rol_w_imm3_ds_ipm() // e158 f1f8 // 381 srrw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -200943,6 +201019,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -200964,7 +201041,6 @@ void m68000_device::asl_w_dd_ds_ipm() // e160 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201016,6 +201092,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201037,7 +201114,6 @@ void m68000_device::lsl_w_dd_ds_ipm() // e168 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201089,6 +201165,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none @@ -201111,7 +201188,6 @@ void m68000_device::roxl_w_dd_ds_ipm() // e170 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201163,6 +201239,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201184,7 +201261,6 @@ void m68000_device::rol_w_dd_ds_ipm() // e178 f1f8 // 382 sriw1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 @@ -201236,6 +201312,7 @@ srrw3: nbcr3: // 253 nbcr3 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; set_ftu_const(); @@ -201256,7 +201333,6 @@ void m68000_device::asl_l_imm3_ds_ipm() // e180 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201312,6 +201388,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201334,7 +201411,6 @@ void m68000_device::lsl_l_imm3_ds_ipm() // e188 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201392,6 +201468,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201414,7 +201491,6 @@ void m68000_device::roxl_l_imm3_ds_ipm() // e190 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201470,6 +201546,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201492,7 +201569,6 @@ void m68000_device::rol_l_imm3_ds_ipm() // e198 f1f8 // 385 srrl1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_ftu); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201548,6 +201624,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201571,7 +201648,6 @@ void m68000_device::asl_l_dd_ds_ipm() // e1a0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201627,6 +201703,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201650,7 +201727,6 @@ void m68000_device::lsl_l_dd_ds_ipm() // e1a8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201708,6 +201784,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201731,7 +201808,6 @@ void m68000_device::roxl_l_dd_ds_ipm() // e1b0 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 @@ -201787,6 +201863,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 alu_andx(m_alub, 0xffff); @@ -201810,7 +201887,6 @@ void m68000_device::rol_l_dd_ds_ipm() // e1b8 f1f8 // 386 sril1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = ext32(m_da[rx]); // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 @@ -201866,6 +201942,7 @@ srrl4: m_icount -= 2; // 306 srrl5 m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 alu_and(m_alub, 0xffff); @@ -201916,7 +201993,6 @@ void m68000_device::asl_ais_ipm() // e1d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -201951,6 +202027,7 @@ void m68000_device::asl_ais_ipm() // e1d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202021,7 +202098,6 @@ void m68000_device::asl_aips_ipm() // e1d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202056,6 +202132,7 @@ void m68000_device::asl_aips_ipm() // e1d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202128,7 +202205,6 @@ void m68000_device::asl_pais_ipm() // e1e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202163,6 +202239,7 @@ void m68000_device::asl_pais_ipm() // e1e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202254,7 +202331,6 @@ void m68000_device::asl_das_ipm() // e1e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202289,6 +202365,7 @@ void m68000_device::asl_das_ipm() // e1e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202421,7 +202498,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202456,6 +202532,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202546,7 +202623,6 @@ void m68000_device::asl_adr16_ipm() // e1f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202581,6 +202657,7 @@ void m68000_device::asl_adr16_ipm() // e1f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -202695,7 +202772,6 @@ void m68000_device::asl_adr32_ipm() // e1f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202730,6 +202806,7 @@ void m68000_device::asl_adr32_ipm() // e1f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -202796,7 +202873,6 @@ void m68000_device::lsr_ais_ipm() // e2d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202831,6 +202907,7 @@ void m68000_device::lsr_ais_ipm() // e2d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -202901,7 +202978,6 @@ void m68000_device::lsr_aips_ipm() // e2d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -202936,6 +203012,7 @@ void m68000_device::lsr_aips_ipm() // e2d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203008,7 +203085,6 @@ void m68000_device::lsr_pais_ipm() // e2e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203043,6 +203119,7 @@ void m68000_device::lsr_pais_ipm() // e2e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203134,7 +203211,6 @@ void m68000_device::lsr_das_ipm() // e2e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203169,6 +203245,7 @@ void m68000_device::lsr_das_ipm() // e2e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203301,7 +203378,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203336,6 +203412,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203426,7 +203503,6 @@ void m68000_device::lsr_adr16_ipm() // e2f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203461,6 +203537,7 @@ void m68000_device::lsr_adr16_ipm() // e2f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -203575,7 +203652,6 @@ void m68000_device::lsr_adr32_ipm() // e2f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203610,6 +203686,7 @@ void m68000_device::lsr_adr32_ipm() // e2f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -203677,7 +203754,6 @@ void m68000_device::lsl_ais_ipm() // e3d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203712,6 +203788,7 @@ void m68000_device::lsl_ais_ipm() // e3d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203785,7 +203862,6 @@ void m68000_device::lsl_aips_ipm() // e3d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203820,6 +203896,7 @@ void m68000_device::lsl_aips_ipm() // e3d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -203895,7 +203972,6 @@ void m68000_device::lsl_pais_ipm() // e3e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -203930,6 +204006,7 @@ void m68000_device::lsl_pais_ipm() // e3e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204024,7 +204101,6 @@ void m68000_device::lsl_das_ipm() // e3e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204059,6 +204135,7 @@ void m68000_device::lsl_das_ipm() // e3e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204196,7 +204273,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204231,6 +204307,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204324,7 +204401,6 @@ void m68000_device::lsl_adr16_ipm() // e3f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204359,6 +204435,7 @@ void m68000_device::lsl_adr16_ipm() // e3f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -204477,7 +204554,6 @@ void m68000_device::lsl_adr32_ipm() // e3f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204512,6 +204588,7 @@ void m68000_device::lsl_adr32_ipm() // e3f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -204579,7 +204656,6 @@ void m68000_device::roxr_ais_ipm() // e4d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204614,6 +204690,7 @@ void m68000_device::roxr_ais_ipm() // e4d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204684,7 +204761,6 @@ void m68000_device::roxr_aips_ipm() // e4d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204719,6 +204795,7 @@ void m68000_device::roxr_aips_ipm() // e4d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204791,7 +204868,6 @@ void m68000_device::roxr_pais_ipm() // e4e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204826,6 +204902,7 @@ void m68000_device::roxr_pais_ipm() // e4e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -204917,7 +204994,6 @@ void m68000_device::roxr_das_ipm() // e4e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -204952,6 +205028,7 @@ void m68000_device::roxr_das_ipm() // e4e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205084,7 +205161,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205119,6 +205195,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205209,7 +205286,6 @@ void m68000_device::roxr_adr16_ipm() // e4f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205244,6 +205320,7 @@ void m68000_device::roxr_adr16_ipm() // e4f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205358,7 +205435,6 @@ void m68000_device::roxr_adr32_ipm() // e4f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205393,6 +205469,7 @@ void m68000_device::roxr_adr32_ipm() // e4f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -205459,7 +205536,6 @@ void m68000_device::roxl_ais_ipm() // e5d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205494,6 +205570,7 @@ void m68000_device::roxl_ais_ipm() // e5d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205564,7 +205641,6 @@ void m68000_device::roxl_aips_ipm() // e5d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205599,6 +205675,7 @@ void m68000_device::roxl_aips_ipm() // e5d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205671,7 +205748,6 @@ void m68000_device::roxl_pais_ipm() // e5e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205706,6 +205782,7 @@ void m68000_device::roxl_pais_ipm() // e5e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -205797,7 +205874,6 @@ void m68000_device::roxl_das_ipm() // e5e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205832,6 +205908,7 @@ void m68000_device::roxl_das_ipm() // e5e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -205964,7 +206041,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -205999,6 +206075,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206089,7 +206166,6 @@ void m68000_device::roxl_adr16_ipm() // e5f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206124,6 +206200,7 @@ void m68000_device::roxl_adr16_ipm() // e5f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206238,7 +206315,6 @@ void m68000_device::roxl_adr32_ipm() // e5f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206273,6 +206349,7 @@ void m68000_device::roxl_adr32_ipm() // e5f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -206339,7 +206416,6 @@ void m68000_device::ror_ais_ipm() // e6d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206374,6 +206450,7 @@ void m68000_device::ror_ais_ipm() // e6d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206444,7 +206521,6 @@ void m68000_device::ror_aips_ipm() // e6d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206479,6 +206555,7 @@ void m68000_device::ror_aips_ipm() // e6d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206551,7 +206628,6 @@ void m68000_device::ror_pais_ipm() // e6e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206586,6 +206662,7 @@ void m68000_device::ror_pais_ipm() // e6e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -206677,7 +206754,6 @@ void m68000_device::ror_das_ipm() // e6e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206712,6 +206788,7 @@ void m68000_device::ror_das_ipm() // e6e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206844,7 +206921,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -206879,6 +206955,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -206969,7 +207046,6 @@ void m68000_device::ror_adr16_ipm() // e6f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207004,6 +207080,7 @@ void m68000_device::ror_adr16_ipm() // e6f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207118,7 +207195,6 @@ void m68000_device::ror_adr32_ipm() // e6f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207153,6 +207229,7 @@ void m68000_device::ror_adr32_ipm() // e6f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -207219,7 +207296,6 @@ void m68000_device::rol_ais_ipm() // e7d0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207254,6 +207330,7 @@ void m68000_device::rol_ais_ipm() // e7d0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207324,7 +207401,6 @@ void m68000_device::rol_aips_ipm() // e7d8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207359,6 +207435,7 @@ void m68000_device::rol_aips_ipm() // e7d8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207431,7 +207508,6 @@ void m68000_device::rol_pais_ipm() // e7e0 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207466,6 +207542,7 @@ void m68000_device::rol_pais_ipm() // e7e0 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -207557,7 +207634,6 @@ void m68000_device::rol_das_ipm() // e7e8 fff8 // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207592,6 +207668,7 @@ void m68000_device::rol_das_ipm() // e7e8 fff8 // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207724,7 +207801,6 @@ adsw2: // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207759,6 +207835,7 @@ adsw2: // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207849,7 +207926,6 @@ void m68000_device::rol_adr16_ipm() // e7f8 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -207884,6 +207960,7 @@ void m68000_device::rol_adr16_ipm() // e7f8 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: @@ -207998,7 +208075,6 @@ void m68000_device::rol_adr32_ipm() // e7f9 ffff // 3c7 sftm1 m_aob = m_au; m_ir = m_irc; - if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 @@ -208033,6 +208109,7 @@ void m68000_device::rol_adr32_ipm() // e7f9 ffff // 38d morw2 m_aob = m_au; m_ird = m_ir; + if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: diff --git a/src/devices/cpu/m68000/m68000gen.py b/src/devices/cpu/m68000/m68000gen.py index 6fb6bed066d..3f515f79c83 100755 --- a/src/devices/cpu/m68000/m68000gen.py +++ b/src/devices/cpu/m68000/m68000gen.py @@ -1361,9 +1361,9 @@ def generate_base_code_for_microcode(ir, irmask, madr, tvn, group01): if ir_to_ird: code.append(["=", R.ird, R.ir]) + code.append(["i", "if(m_next_state != S_TRACE) m_next_state = m_int_next_state;"]) elif micro & 0x00001: code.append(["=", R.ir, R.irc]) - code.append(["i", "if(m_next_state != S_TRACE) m_next_state = m_int_next_state;"]) if abl_to_ftu: # Also used for dbin_to_movem -- cgit v1.2.3