From b9f94fe23915c0a341b83ad4db042e47c2f90942 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 8 Feb 2021 23:27:13 +0100 Subject: fidel_clockdiv: use read/write taps instead of bankdev --- src/mame/drivers/fidel_as12.cpp | 5 ++-- src/mame/drivers/fidel_elite.cpp | 29 ++++++++++--------- src/mame/drivers/fidel_sc12.cpp | 7 ++--- src/mame/machine/fidel_clockdiv.cpp | 55 +++++++++++++++++++++---------------- src/mame/machine/fidel_clockdiv.h | 12 +++----- 5 files changed, 55 insertions(+), 53 deletions(-) diff --git a/src/mame/drivers/fidel_as12.cpp b/src/mame/drivers/fidel_as12.cpp index 4d72347dba2..0febf1fa891 100644 --- a/src/mame/drivers/fidel_as12.cpp +++ b/src/mame/drivers/fidel_as12.cpp @@ -193,8 +193,7 @@ void as12_state::as12(machine_config &config) { /* basic machine hardware */ R65C02(config, m_maincpu, 4_MHz_XTAL); // R65C02P4 - m_maincpu->set_addrmap(AS_PROGRAM, &as12_state::div_trampoline); - ADDRESS_MAP_BANK(config, m_mainmap).set_map(&as12_state::main_map).set_options(ENDIANNESS_LITTLE, 8, 16); + m_maincpu->set_addrmap(AS_PROGRAM, &as12_state::main_map); const attotime irq_period = attotime::from_hz(600); // from 556 timer (22nF, 110K, 1K), ideal frequency is 600Hz TIMER(config, m_irq_on).configure_periodic(FUNC(as12_state::irq_on), irq_period); @@ -225,7 +224,7 @@ void as12_state::as12(machine_config &config) ******************************************************************************/ ROM_START( feleg ) // model AS12(or 6085) - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("feleg.1", 0x8000, 0x2000, CRC(e9df31e8) SHA1(31c52bb8f75580c82093eb950959c1bc294189a8) ) // TMM2764, no label ROM_LOAD("feleg.2", 0xc000, 0x2000, CRC(bed9c84b) SHA1(c12f39765b054d2ad81f747e698715ad4246806d) ) // " ROM_LOAD("feleg.3", 0xe000, 0x2000, CRC(b1fb49aa) SHA1(d8c9687dd564f0fa603e6d684effb1d113ac64b4) ) // " diff --git a/src/mame/drivers/fidel_elite.cpp b/src/mame/drivers/fidel_elite.cpp index d9d6c12e659..362c1522116 100644 --- a/src/mame/drivers/fidel_elite.cpp +++ b/src/mame/drivers/fidel_elite.cpp @@ -476,8 +476,7 @@ void elite_state::pc(machine_config &config) { /* basic machine hardware */ R65C02(config, m_maincpu, 4_MHz_XTAL); // R65C02P4 - m_maincpu->set_addrmap(AS_PROGRAM, &elite_state::div_trampoline); - ADDRESS_MAP_BANK(config, m_mainmap).set_map(&elite_state::pc_map).set_options(ENDIANNESS_LITTLE, 8, 16); + m_maincpu->set_addrmap(AS_PROGRAM, &elite_state::pc_map); const attotime irq_period = attotime::from_hz(38.4_kHz_XTAL/64); // through 4060 IC, 600Hz TIMER(config, m_irq_on).configure_periodic(FUNC(elite_state::irq_on), irq_period); @@ -512,7 +511,7 @@ void elite_state::eas(machine_config &config) /* basic machine hardware */ m_maincpu->set_clock(3_MHz_XTAL); - m_mainmap->set_addrmap(AS_PROGRAM, &elite_state::eas_map); + m_maincpu->set_addrmap(AS_PROGRAM, &elite_state::eas_map); I8255(config, m_ppi8255); // port B: input, port A & C: output m_ppi8255->out_pa_callback().set(FUNC(elite_state::ppi_porta_w)); @@ -545,7 +544,7 @@ void eag_state::eag(machine_config &config) /* basic machine hardware */ m_maincpu->set_clock(5_MHz_XTAL); // R65C02P4 - m_mainmap->set_addrmap(AS_PROGRAM, &eag_state::eag_map); + m_maincpu->set_addrmap(AS_PROGRAM, &eag_state::eag_map); config.device_remove("nvram"); NVRAM(config, "nvram.ic8", nvram_device::DEFAULT_ALL_0); @@ -561,7 +560,7 @@ void eag_state::eag2100(machine_config &config) eag(config); /* basic machine hardware */ - m_mainmap->set_addrmap(AS_PROGRAM, &eag_state::eag2100_map); + m_maincpu->set_addrmap(AS_PROGRAM, &eag_state::eag2100_map); } @@ -571,7 +570,7 @@ void eag_state::eag2100(machine_config &config) ******************************************************************************/ ROM_START( feasbu ) - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("hm_6", 0x8000, 0x0800, CRC(93dcc23b) SHA1(2eb8c5a85e566948bc256d6b1804694e6b0ffa6f) ) // ST M27C64A ROM_CONTINUE( 0x9000, 0x0800 ) ROM_CONTINUE( 0x8800, 0x0800 ) @@ -601,7 +600,7 @@ ROM_START( feasbu ) ROM_END ROM_START( feasbua ) // model EWC - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("white_a", 0x8000, 0x0800, CRC(93dcc23b) SHA1(2eb8c5a85e566948bc256d6b1804694e6b0ffa6f) ) // HN482764G-2 ROM_CONTINUE( 0x9000, 0x0800 ) ROM_CONTINUE( 0x8800, 0x0800 ) @@ -637,7 +636,7 @@ ROM_START( feasbua ) // model EWC ROM_END ROM_START( feasgla ) - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("4.0_86", 0x8000, 0x0800, CRC(32784e2d) SHA1(dae060a5c49cc1993a78db293cd80464adfd892d) ) ROM_CONTINUE( 0x9000, 0x0800 ) ROM_CONTINUE( 0x8800, 0x0800 ) @@ -673,7 +672,7 @@ ROM_START( feasgla ) ROM_END ROM_START( feasglaa ) // model EAS-C - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("orange", 0x8000, 0x0800, CRC(32784e2d) SHA1(dae060a5c49cc1993a78db293cd80464adfd892d) ) ROM_CONTINUE( 0x9000, 0x0800 ) ROM_CONTINUE( 0x8800, 0x0800 ) @@ -709,7 +708,7 @@ ROM_START( feasglaa ) // model EAS-C ROM_END ROM_START( feasglab ) - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("6a", 0x8000, 0x0800, CRC(2fdddb4f) SHA1(6da0a328a45462f285ae6a0756f97c5a43148f97) ) ROM_CONTINUE( 0x9000, 0x0800 ) ROM_CONTINUE( 0x8800, 0x0800 ) @@ -746,7 +745,7 @@ ROM_END ROM_START( fpres ) - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("u09_yellow", 0xb000, 0x1000, CRC(03fac294) SHA1(5a9d72978318c61185efd4bc9e4a868c226465b8) ) ROM_LOAD("u10_green", 0xc000, 0x1000, CRC(5d049d5e) SHA1(c7359bead92729e8a92d6cf1789d87ae43d23cbf) ) ROM_LOAD("u11_black", 0xd000, 0x1000, CRC(98bd01b7) SHA1(48cc560c4ca736f54e30d757990ff403c05c39ae) ) @@ -775,7 +774,7 @@ ROM_START( fpres ) ROM_END ROM_START( fpresbu ) - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("u09_yellow", 0xb000, 0x1000, CRC(bb1cb486) SHA1(b83f50a3ef361d254b88eefaa5aac657aaa72375) ) ROM_LOAD("u10_green", 0xc000, 0x1000, CRC(af0aec0e) SHA1(8293d00a12efa1c142b9e37bc7786012250536d9) ) ROM_LOAD("u11_black", 0xd000, 0x1000, CRC(214a91cc) SHA1(aab07ecdd66ac208874f4053fc4b0b0659b017aa) ) @@ -805,7 +804,7 @@ ROM_END ROM_START( feag ) // model 6081, aka "Mobile Master" - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("eg_orange.ic9", 0xa000, 0x2000, CRC(df9e7e74) SHA1(db76750eba5515213ecce07402c4d974c14e1a23) ) // M5L2764K, orange sticker ROM_LOAD("eg_black.ic5", 0xc000, 0x2000, CRC(a5f6f295) SHA1(319f00d4b7a1704a3ca722c40f4096004b4b89d2) ) // M5L2764K, black sticker ROM_LOAD("eg_green.ic4", 0xe000, 0x2000, CRC(1dc6508a) SHA1(6f2e730b216bfb900074d1d786124fc3cb038a8d) ) // M5L2764K, green sticker @@ -832,7 +831,7 @@ ROM_START( feag ) // model 6081, aka "Mobile Master" ROM_END ROM_START( feag2100 ) - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("el2100_2.ic5", 0xc000, 0x2000, CRC(76fec42f) SHA1(34660edb8458919fd179e93fdab3fe428a6625d0) ) ROM_LOAD("el2100_3.ic4", 0xe000, 0x2000, CRC(2079a506) SHA1(a7bb83138c7b6eff6ea96702d453a214697f4890) ) @@ -861,7 +860,7 @@ ROM_START( feag2100 ) ROM_END ROM_START( feag2100a ) // model 6088 - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("2100_c_black.ic5", 0xc000, 0x2000, CRC(454eb839) SHA1(83d206464c194b022d43913b5f4092a8201f36b9) ) ROM_LOAD("2100_c_green.ic4", 0xe000, 0x2000, CRC(f1f76a63) SHA1(337b4572b743d383c6a12c360875d37682de3647) ) diff --git a/src/mame/drivers/fidel_sc12.cpp b/src/mame/drivers/fidel_sc12.cpp index 594ef8c403a..c15fc07221c 100644 --- a/src/mame/drivers/fidel_sc12.cpp +++ b/src/mame/drivers/fidel_sc12.cpp @@ -212,8 +212,7 @@ void sc12_state::sc12(machine_config &config) { /* basic machine hardware */ R65C02(config, m_maincpu, 3_MHz_XTAL); // R65C02P3 - m_maincpu->set_addrmap(AS_PROGRAM, &sc12_state::div_trampoline); - ADDRESS_MAP_BANK(config, m_mainmap).set_map(&sc12_state::main_map).set_options(ENDIANNESS_LITTLE, 8, 16); + m_maincpu->set_addrmap(AS_PROGRAM, &sc12_state::main_map); const attotime irq_period = attotime::from_hz(600); // from 556 timer (22nF, 102K, 1K), ideal frequency is 600Hz TIMER(config, m_irq_on).configure_periodic(FUNC(sc12_state::irq_on), irq_period); @@ -252,14 +251,14 @@ void sc12_state::sc12b(machine_config &config) ******************************************************************************/ ROM_START( fscc12 ) // model SC12, PCB label 510-1084B01 - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("101-1068a01.ic15", 0x8000, 0x2000, CRC(63c76cdd) SHA1(e0771c98d4483a6b1620791cb99a7e46b0db95c4) ) // SSS SCM23C65E4 ROM_LOAD("orange.ic13", 0xc000, 0x1000, CRC(ed5289b2) SHA1(9b0c7f9ae4102d4a66eb8c91d4e84b9eec2ffb3d) ) // TI TMS2732AJL-45, no label, orange sticker ROM_LOAD("red.ic14", 0xe000, 0x2000, CRC(0c4968c4) SHA1(965a66870b0f8ce9549418cbda09d2ff262a1504) ) // TI TMS2764JL-25, no label, red sticker ROM_END ROM_START( fscc12b ) // model 6086, PCB label 510-1084B01 - ROM_REGION( 0x10000, "mainmap", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("101-1068a01.ic15", 0x8000, 0x2000, CRC(63c76cdd) SHA1(e0771c98d4483a6b1620791cb99a7e46b0db95c4) ) // SSS SCM23C65E4 ROM_LOAD("orange.ic13", 0xc000, 0x1000, CRC(45070a71) SHA1(8aeecff828f26fb7081902c757559903be272649) ) // TI TMS2732AJL-45, no label, orange sticker ROM_LOAD("red.ic14", 0xe000, 0x2000, CRC(183d3edc) SHA1(3296a4c3bce5209587d4a1694fce153558544e63) ) // Toshiba TMM2764D-2, no label, red sticker diff --git a/src/mame/machine/fidel_clockdiv.cpp b/src/mame/machine/fidel_clockdiv.cpp index 802a2d7bf6a..26dcd9a78fa 100644 --- a/src/mame/machine/fidel_clockdiv.cpp +++ b/src/mame/machine/fidel_clockdiv.cpp @@ -7,7 +7,8 @@ Used to compensate slow memory chips in chess computer models: SC12, AS12, PC, E TODO: - improve clock divider? it seems a little bit slower than the real machine. - Currently, a dummy timer workaround is needed, or it's much worse. + Currently, a dummy timer workaround is needed, or it's much worse (doing it with + a synchronize() will make it even worse). Is the problem here due to timing of CPU addressbus changes? We can only 'sense' the addressbus at read or write accesses. @@ -21,9 +22,12 @@ TODO: void fidel_clockdiv_state::machine_start() { - // zerofill/register for savestates + // zerofill m_div_config = 0; + m_read_tap = nullptr; + m_write_tap = nullptr; + // register for savestates save_item(NAME(m_div_status)); save_item(NAME(m_div_config)); save_item(NAME(m_div_scale)); @@ -71,27 +75,6 @@ void fidel_clockdiv_state::div_set_cpu_freq(offs_t offset) } } -void fidel_clockdiv_state::div_trampoline_w(offs_t offset, u8 data) -{ - if (m_div_config) - div_set_cpu_freq(offset & 0x6000); - - m_mainmap->write8(offset, data); -} - -u8 fidel_clockdiv_state::div_trampoline_r(offs_t offset) -{ - if (m_div_config && !machine().side_effects_disabled()) - div_set_cpu_freq(offset & 0x6000); - - return m_mainmap->read8(offset); -} - -void fidel_clockdiv_state::div_trampoline(address_map &map) -{ - map(0x0000, 0xffff).rw(FUNC(fidel_clockdiv_state::div_trampoline_r), FUNC(fidel_clockdiv_state::div_trampoline_w)); -} - void fidel_clockdiv_state::div_refresh(ioport_value val) { if (val == 0xff) @@ -112,4 +95,30 @@ void fidel_clockdiv_state::div_refresh(ioport_value val) // stop high frequency background timer if cpu divider is disabled attotime period = (val) ? attotime::from_hz(m_maincpu->clock()) : attotime::never; m_div_timer->adjust(period, 0, period); + + // set up memory passthroughs + if (m_read_tap) + { + m_read_tap->remove(); + m_write_tap->remove(); + m_read_tap = nullptr; + m_write_tap = nullptr; + } + + if (m_div_config) + { + address_space &program = m_maincpu->space(AS_PROGRAM); + + m_read_tap = program.install_read_tap(0x0000, 0xffff, "program_div_r",[this](offs_t offset, u8 &data, u8 mem_mask) + { + if (!machine().side_effects_disabled()) + div_set_cpu_freq(offset & 0x6000); + return data; + }); + m_write_tap = program.install_write_tap(0x0000, 0xffff, "program_div_w",[this](offs_t offset, u8 &data, u8 mem_mask) + { + div_set_cpu_freq(offset & 0x6000); + return data; + }); + } } diff --git a/src/mame/machine/fidel_clockdiv.h b/src/mame/machine/fidel_clockdiv.h index 2c8b6993486..aa08e0c9552 100644 --- a/src/mame/machine/fidel_clockdiv.h +++ b/src/mame/machine/fidel_clockdiv.h @@ -11,15 +11,13 @@ #pragma once -#include "machine/bankdev.h" class fidel_clockdiv_state : public driver_device { public: fidel_clockdiv_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_mainmap(*this, "mainmap") + m_maincpu(*this, "maincpu") { } DECLARE_INPUT_CHANGED_MEMBER(div_changed) { div_refresh(newval); } @@ -30,18 +28,16 @@ protected: // devices/pointers required_device m_maincpu; - optional_device m_mainmap; // dynamic cpu divider void div_refresh(ioport_value val = 0xff); - void div_trampoline_w(offs_t offset, u8 data); - u8 div_trampoline_r(offs_t offset); - - void div_trampoline(address_map &map); private: inline void div_set_cpu_freq(offs_t offset); + memory_passthrough_handler *m_read_tap; + memory_passthrough_handler *m_write_tap; + u16 m_div_status; ioport_value m_div_config; double m_div_scale; -- cgit v1.2.3