From b77f120ac769bee7d020a4a1ad2f5eef9894b6da Mon Sep 17 00:00:00 2001 From: Calvin Buckley Date: Fri, 30 Apr 2021 20:31:13 -0300 Subject: m68k: Implement FMOVEM mode 0b11 (#8022) Since the two bits seem to have symmetry, it's odd this wasn't there before. Should fix issues with Domain/OS and NeXTSTEP emulation. --- src/devices/cpu/m68000/m68kfpu.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/devices/cpu/m68000/m68kfpu.cpp b/src/devices/cpu/m68000/m68kfpu.cpp index 07cca095357..b15da8fe4bd 100644 --- a/src/devices/cpu/m68000/m68kfpu.cpp +++ b/src/devices/cpu/m68000/m68kfpu.cpp @@ -1773,6 +1773,10 @@ void m68000_base_device::fmovem(u16 w2) break; } + case 3: // Dynamic register list, postincrement or control addressing mode. + // FIXME: not really tested, but seems to work + reglist = REG_D()[(reglist >> 4) & 7]; + [[fallthrough]]; case 2: // Static register list, postdecrement or control addressing mode { for (i=0; i < 8; i++) -- cgit v1.2.3