From b02716dec0d883d49e3e01566508bbf08fdbdf4c Mon Sep 17 00:00:00 2001 From: 0kmg <9137159+0kmg@users.noreply.github.com> Date: Sun, 20 Mar 2022 19:04:33 -0800 Subject: playch10.cpp: Use memory banks for nametable RAM. (#9442) famibox.cpp: Use memory banks for nametable RAM. cham24.cpp: Use memory banks for nametable RAM. multigam.cpp: Add PPU address map and use memory banks for nametable RAM. --- src/mame/drivers/cham24.cpp | 71 ++++++++----------------- src/mame/drivers/famibox.cpp | 49 ++++++++---------- src/mame/drivers/multigam.cpp | 117 ++++++++++++++++++------------------------ src/mame/drivers/playch10.cpp | 5 +- src/mame/includes/playch10.h | 10 ++-- src/mame/machine/playch10.cpp | 61 +++++++++------------- 6 files changed, 125 insertions(+), 188 deletions(-) diff --git a/src/mame/drivers/cham24.cpp b/src/mame/drivers/cham24.cpp index 386ea34680b..ec66bfe6eba 100644 --- a/src/mame/drivers/cham24.cpp +++ b/src/mame/drivers/cham24.cpp @@ -72,6 +72,7 @@ public: : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_ppu(*this, "ppu"), + m_nt_page(*this, "nt_page%u", 0U), m_prg_banks(*this, "prg%u", 0U), m_chr_bank(*this, "chr") { } @@ -86,19 +87,17 @@ private: required_device m_maincpu; required_device m_ppu; + required_memory_bank_array<4> m_nt_page; required_memory_bank_array<2> m_prg_banks; required_memory_bank m_chr_bank; uint8_t m_prg_chunks; std::unique_ptr m_nt_ram; - uint8_t* m_nt_page[4]; uint32_t m_in_0; uint32_t m_in_1; uint32_t m_in_0_shift; uint32_t m_in_1_shift; - void nt_w(offs_t offset, uint8_t data); - uint8_t nt_r(offs_t offset); void sprite_dma_w(address_space &space, uint8_t data); uint8_t cham24_IN0_r(); void cham24_IN0_w(uint8_t data); @@ -111,51 +110,22 @@ private: -void cham24_state::cham24_set_mirroring( int mirroring ) +void cham24_state::cham24_set_mirroring(int mirroring) { - switch(mirroring) + switch (mirroring) { - case PPU_MIRROR_LOW: - m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram.get(); - break; - case PPU_MIRROR_HIGH: - m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_HORZ: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get(); - m_nt_page[2] = m_nt_ram.get() + 0x400; - m_nt_page[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_VERT: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get(); - m_nt_page[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_NONE: - default: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get() + 0x800; - m_nt_page[3] = m_nt_ram.get() + 0xc00; - break; + case PPU_MIRROR_HORZ: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(BIT(i, 1)); + break; + case PPU_MIRROR_VERT: + default: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(i & 1); + break; } } -void cham24_state::nt_w(offs_t offset, uint8_t data) -{ - int page = ((offset & 0xc00) >> 10); - m_nt_page[page][offset & 0x3ff] = data; -} - -uint8_t cham24_state::nt_r(offs_t offset) -{ - int page = ((offset & 0xc00) >> 10); - return m_nt_page[page][offset & 0x3ff]; - -} - void cham24_state::sprite_dma_w(address_space &space, uint8_t data) { int source = (data & 7); @@ -221,7 +191,10 @@ void cham24_state::cham24_map(address_map &map) void cham24_state::cham24_ppu_map(address_map &map) { map(0x0000, 0x1fff).bankr(m_chr_bank); - map(0x2000, 0x3eff).rw(FUNC(cham24_state::nt_r), FUNC(cham24_state::nt_w)); + map(0x2000, 0x23ff).mirror(0x1000).bankrw(m_nt_page[0]); + map(0x2400, 0x27ff).mirror(0x1000).bankrw(m_nt_page[1]); + map(0x2800, 0x2bff).mirror(0x1000).bankrw(m_nt_page[2]); + map(0x2c00, 0x2fff).mirror(0x1000).bankrw(m_nt_page[3]); map(0x3f00, 0x3fff).rw(m_ppu, FUNC(ppu2c0x_device::palette_read), FUNC(ppu2c0x_device::palette_write)); } @@ -250,8 +223,9 @@ INPUT_PORTS_END void cham24_state::machine_start() { - // need nametable ram, though. I doubt this uses more than 2k, but it starts up configured for 4 - m_nt_ram = std::make_unique(0x1000); + m_nt_ram = std::make_unique(0x800); + for (int i = 0; i < 4; i++) + m_nt_page[i]->configure_entries(0, 2, m_nt_ram.get(), 0x400); // set up code banking to be done in 16K chunks m_prg_chunks = memregion("user1")->bytes() / 0x4000; @@ -269,10 +243,7 @@ void cham24_state::machine_reset() m_prg_banks[1]->set_entry(m_prg_chunks - 2); m_chr_bank->set_entry(0); - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get() + 0x800; - m_nt_page[3] = m_nt_ram.get() + 0xc00; + cham24_set_mirroring(PPU_MIRROR_VERT); } diff --git a/src/mame/drivers/famibox.cpp b/src/mame/drivers/famibox.cpp index e9b160330d9..120a7b935af 100644 --- a/src/mame/drivers/famibox.cpp +++ b/src/mame/drivers/famibox.cpp @@ -80,7 +80,9 @@ public: , m_maincpu(*this, "maincpu") , m_ppu(*this, "ppu") , m_screen(*this, "screen") - , m_ctrl(*this, "ctrl%u", 1) { } + , m_ctrl(*this, "ctrl%u", 1U) + , m_nt_page(*this, "nt_page%u", 0U) + { } void famibox(machine_config &config); @@ -101,8 +103,8 @@ private: required_device m_screen; optional_device_array m_ctrl; + required_memory_bank_array<4> m_nt_page; std::unique_ptr m_nt_ram; - uint8_t* m_nt_page[4]; uint8_t m_mirroring; uint8_t m_curr_slot; @@ -121,8 +123,6 @@ private: emu_timer* m_gameplay_timer; uint8_t m_money_reg; - void famibox_nt_w(offs_t offset, uint8_t data); - uint8_t famibox_nt_r(offs_t offset); void set_mirroring(int mirroring); void sprite_dma_w(address_space &space, uint8_t data); uint8_t famibox_IN0_r(); @@ -149,38 +149,25 @@ void famibox_state::set_mirroring(int mirroring) switch (mirroring) { case PPU_MIRROR_LOW: - m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram.get(); + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(0); break; case PPU_MIRROR_HIGH: - m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram.get() + 0x400; + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(1); break; case PPU_MIRROR_HORZ: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get(); - m_nt_page[2] = m_nt_ram.get() + 0x400; - m_nt_page[3] = m_nt_ram.get() + 0x400; + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(BIT(i, 1)); break; case PPU_MIRROR_VERT: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get(); - m_nt_page[3] = m_nt_ram.get() + 0x400; + default: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(i & 1); break; } } -void famibox_state::famibox_nt_w(offs_t offset, uint8_t data) -{ - int page = BIT(offset, 10, 2); - m_nt_page[page][offset & 0x3ff] = data; -} - -uint8_t famibox_state::famibox_nt_r(offs_t offset) -{ - int page = BIT(offset, 10, 2); - return m_nt_page[page][offset & 0x3ff]; -} - /****************************************************** NES interface @@ -419,7 +406,10 @@ void famibox_state::famibox_map(address_map &map) void famibox_state::famibox_ppu_map(address_map &map) { map(0x0000, 0x1fff).bankr("ppubank1"); - map(0x2000, 0x3eff).rw(FUNC(famibox_state::famibox_nt_r), FUNC(famibox_state::famibox_nt_w)); + map(0x2000, 0x23ff).mirror(0x1000).bankrw(m_nt_page[0]); + map(0x2400, 0x27ff).mirror(0x1000).bankrw(m_nt_page[1]); + map(0x2800, 0x2bff).mirror(0x1000).bankrw(m_nt_page[2]); + map(0x2c00, 0x2fff).mirror(0x1000).bankrw(m_nt_page[3]); map(0x3f00, 0x3fff).rw(m_ppu, FUNC(ppu2c0x_device::palette_read), FUNC(ppu2c0x_device::palette_write)); } @@ -513,7 +503,10 @@ void famibox_state::machine_reset() void famibox_state::machine_start() { - m_nt_ram = std::make_unique(0x800); + m_nt_ram = std::make_unique(0x800); + + for (int i = 0; i < 4; i++) + m_nt_page[i]->configure_entries(0, 2, m_nt_ram.get(), 0x400); m_attract_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(famibox_state::famicombox_attract_timer_callback),this)); m_gameplay_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(famibox_state::famicombox_gameplay_timer_callback),this)); diff --git a/src/mame/drivers/multigam.cpp b/src/mame/drivers/multigam.cpp index 43ceeed8699..49aa9792262 100644 --- a/src/mame/drivers/multigam.cpp +++ b/src/mame/drivers/multigam.cpp @@ -126,7 +126,8 @@ public: m_dsw(*this, "DSW"), m_bank_gfx(*this, "bank_gfx"), m_bank_ppu(*this, "bank_ppu_%u", 1U), - m_bank_ram(*this, "bank_ram") + m_bank_ram(*this, "bank_ram"), + m_nt_page(*this, "nt_page%u", 0U) { } void multigam(machine_config &config); @@ -154,10 +155,10 @@ private: memory_bank_creator m_bank_gfx; memory_bank_array_creator<8> m_bank_ppu; optional_memory_bank m_bank_ram; + required_memory_bank_array<4> m_nt_page; std::unique_ptr m_nt_ram; std::unique_ptr m_vram; - uint8_t* m_nt_page[4]; uint32_t m_in_0; uint32_t m_in_1; uint32_t m_in_0_shift; @@ -190,8 +191,6 @@ private: uint8_t m_supergm3_prg_bank; uint8_t m_supergm3_chr_bank; - void multigam_nt_w(offs_t offset, uint8_t data); - uint8_t multigam_nt_r(offs_t offset); void sprite_dma_w(address_space &space, uint8_t data); uint8_t multigam_IN0_r(); void multigam_IN0_w(uint8_t data); @@ -208,6 +207,7 @@ private: void supergm3_prg_bank_w(uint8_t data); void supergm3_chr_bank_w(uint8_t data); void set_mirroring(int mirroring); + void common_start(); DECLARE_MACHINE_START(multigm3); DECLARE_MACHINE_RESET(multigm3); DECLARE_MACHINE_START(supergm3); @@ -224,6 +224,7 @@ private: void multigm3_map(address_map &map); void multigmt_map(address_map &map); void supergm3_map(address_map &map); + void ppu_map(address_map &map); }; @@ -238,54 +239,32 @@ void multigam_state::set_mirroring(int mirroring) { switch(mirroring) { - case PPU_MIRROR_LOW: - m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram.get(); - break; - case PPU_MIRROR_HIGH: - m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_HORZ: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get(); - m_nt_page[2] = m_nt_ram.get() + 0x400; - m_nt_page[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_VERT: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get(); - m_nt_page[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_NONE: - default: - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get() + 0x800; - m_nt_page[3] = m_nt_ram.get() + 0xc00; - break; + case PPU_MIRROR_LOW: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(0); + break; + case PPU_MIRROR_HIGH: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(1); + break; + case PPU_MIRROR_HORZ: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(BIT(i, 1)); + break; + case PPU_MIRROR_VERT: + default: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(i & 1); + break; } } -void multigam_state::multigam_nt_w(offs_t offset, uint8_t data) -{ - int page = ((offset & 0xc00) >> 10); - m_nt_page[page][offset & 0x3ff] = data; -} - - -uint8_t multigam_state::multigam_nt_r(offs_t offset) -{ - int page = ((offset & 0xc00) >> 10); - return m_nt_page[page][offset & 0x3ff]; -} - void multigam_state::set_videorom_bank( int start, int count, int bank, int bank_size_in_kb) { - int i; int offset = bank * (bank_size_in_kb * 0x400); /* bank_size_in_kb is used to determine how large the "bank" parameter is */ /* count determines the size of the area mapped in KB */ - for (i = 0; i < count; i++, offset += 0x400) + for (int i = 0; i < count; i++, offset += 0x400) { m_bank_ppu[i + start]->set_base(memregion("gfx1")->base() + offset); } @@ -293,11 +272,10 @@ void multigam_state::set_videorom_bank( int start, int count, int bank, int bank void multigam_state::set_videoram_bank( int start, int count, int bank, int bank_size_in_kb) { - int i; int offset = bank * (bank_size_in_kb * 0x400); /* bank_size_in_kb is used to determine how large the "bank" parameter is */ /* count determines the size of the area mapped in KB */ - for (i = 0; i < count; i++, offset += 0x400) + for (int i = 0; i < count; i++, offset += 0x400) { m_bank_ppu[i + start]->set_base(m_vram.get() + offset); } @@ -446,6 +424,16 @@ void multigam_state::multigmt_map(address_map &map) map(0x8000, 0xffff).rom().w(FUNC(multigam_state::multigam_mapper2_w)); } +void multigam_state::ppu_map(address_map &map) +{ + // map(0x0000, 0x1fff) + map(0x2000, 0x23ff).mirror(0x1000).bankrw(m_nt_page[0]); + map(0x2400, 0x27ff).mirror(0x1000).bankrw(m_nt_page[1]); + map(0x2800, 0x2bff).mirror(0x1000).bankrw(m_nt_page[2]); + map(0x2c00, 0x2fff).mirror(0x1000).bankrw(m_nt_page[3]); + map(0x3f00, 0x3fff).rw(m_ppu, FUNC(ppu2c0x_device::palette_read), FUNC(ppu2c0x_device::palette_write)); +} + /****************************************************** MMC3 (Multi Game III) @@ -1157,29 +1145,29 @@ MACHINE_RESET_MEMBER(multigam_state,multigm3) multigm3_switch_prg_rom(space, 0x01 ); } +void multigam_state::common_start() +{ + m_nt_ram = std::make_unique(0x800); + + for (int i = 0; i < 4; i++) + m_nt_page[i]->configure_entries(0, 2, m_nt_ram.get(), 0x400); + + set_mirroring(PPU_MIRROR_VERT); +} + void multigam_state::machine_start() { - m_nt_ram = std::make_unique(0x1000); - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get() + 0x800; - m_nt_page[3] = m_nt_ram.get() + 0xc00; + common_start(); - m_ppu->space(AS_PROGRAM).install_readwrite_handler(0x2000, 0x3eff, read8sm_delegate(*this, FUNC(multigam_state::multigam_nt_r)), write8sm_delegate(*this, FUNC(multigam_state::multigam_nt_w))); m_ppu->space(AS_PROGRAM).install_read_bank(0x0000, 0x1fff, m_bank_gfx); m_bank_gfx->set_base(memregion("gfx1")->base()); } MACHINE_START_MEMBER(multigam_state,multigm3) { - m_nt_ram = std::make_unique(0x1000); - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get() + 0x800; - m_nt_page[3] = m_nt_ram.get() + 0xc00; - - m_ppu->space(AS_PROGRAM).install_readwrite_handler(0x2000, 0x3eff, read8sm_delegate(*this, FUNC(multigam_state::multigam_nt_r)), write8sm_delegate(*this, FUNC(multigam_state::multigam_nt_w))); - for(int i=0; i<8; i++) + common_start(); + + for (int i = 0; i < 8; i++) m_ppu->space(AS_PROGRAM).install_read_bank(0x0000 + 0x400*i, 0x03ff + 0x400*i, m_bank_ppu[i]); set_videorom_bank(0, 8, 0, 8); @@ -1187,13 +1175,7 @@ MACHINE_START_MEMBER(multigam_state,multigm3) MACHINE_START_MEMBER(multigam_state,supergm3) { - m_nt_ram = std::make_unique(0x1000); - m_nt_page[0] = m_nt_ram.get(); - m_nt_page[1] = m_nt_ram.get() + 0x400; - m_nt_page[2] = m_nt_ram.get() + 0x800; - m_nt_page[3] = m_nt_ram.get() + 0xc00; - - m_ppu->space(AS_PROGRAM).install_readwrite_handler(0x2000, 0x3eff, read8sm_delegate(*this, FUNC(multigam_state::multigam_nt_r)), write8sm_delegate(*this, FUNC(multigam_state::multigam_nt_w))); + common_start(); m_vram = std::make_unique(0x2000); m_multigmc_mmc3_6000_ram = std::make_unique(0x2000); @@ -1213,6 +1195,7 @@ void multigam_state::multigam(machine_config &config) screen.set_screen_update("ppu", FUNC(ppu2c0x_device::screen_update)); PPU_2C02(config, m_ppu); + m_ppu->set_addrmap(0, &multigam_state::ppu_map); m_ppu->set_cpu_tag("maincpu"); m_ppu->int_callback().set_inputline(m_maincpu, INPUT_LINE_NMI); diff --git a/src/mame/drivers/playch10.cpp b/src/mame/drivers/playch10.cpp index b053c578e4e..fbe82e1b953 100644 --- a/src/mame/drivers/playch10.cpp +++ b/src/mame/drivers/playch10.cpp @@ -370,7 +370,10 @@ void playch10_state::bios_io_map(address_map &map) void playch10_state::ppu_map(address_map &map) { map(0x0000, 0x1fff).rw(FUNC(playch10_state::pc10_chr_r), FUNC(playch10_state::pc10_chr_w)); - map(0x2000, 0x3eff).rw(FUNC(playch10_state::pc10_nt_r), FUNC(playch10_state::pc10_nt_w)); + map(0x2000, 0x23ff).mirror(0x1000).bankrw(m_nt_page[0]); + map(0x2400, 0x27ff).mirror(0x1000).bankrw(m_nt_page[1]); + map(0x2800, 0x2bff).mirror(0x1000).bankrw(m_nt_page[2]); + map(0x2c00, 0x2fff).mirror(0x1000).bankrw(m_nt_page[3]); map(0x3f00, 0x3fff).rw(m_ppu, FUNC(ppu2c0x_device::palette_read), FUNC(ppu2c0x_device::palette_write)); } diff --git a/src/mame/includes/playch10.h b/src/mame/includes/playch10.h index ab2c01c1dcb..3792442f102 100644 --- a/src/mame/includes/playch10.h +++ b/src/mame/includes/playch10.h @@ -25,6 +25,7 @@ public: , m_videoram(*this, "videoram") , m_gfxdecode(*this, "gfxdecode") , m_sensor(*this, "sensor") + , m_nt_page(*this, "nt_page%u", 0U) , m_prg_banks(*this, "prg%u", 0U) , m_prg_view(*this, "prg_view") , m_vrom_region(*this, "gfx2") @@ -86,8 +87,6 @@ private: void pc10_in0_w(uint8_t data); uint8_t pc10_in0_r(); uint8_t pc10_in1_r(); - void pc10_nt_w(offs_t offset, uint8_t data); - uint8_t pc10_nt_r(offs_t offset); void pc10_chr_w(offs_t offset, uint8_t data); uint8_t pc10_chr_r(offs_t offset); void mmc1_rom_switch_w(offs_t offset, uint8_t data); @@ -153,6 +152,10 @@ private: required_device m_gfxdecode; required_device m_sensor; + required_memory_bank_array<4> m_nt_page; + std::unique_ptr m_nt_ram; + std::unique_ptr m_cart_nt_ram; + void init_prg_banking(); void prg32(int bank); void prg16(int slot, int bank); @@ -182,9 +185,6 @@ private: int m_MMC2_bank_latch[2]; uint8_t* m_vrom; std::unique_ptr m_vram; - uint8_t* m_nametable[4]; - std::unique_ptr m_nt_ram; - std::unique_ptr m_cart_nt_ram; chr_bank m_chr_page[8]; int m_mmc1_shiftreg; int m_mmc1_shiftcount; diff --git a/src/mame/machine/playch10.cpp b/src/mame/machine/playch10.cpp index fbae83e4288..6de92fd0aa1 100644 --- a/src/mame/machine/playch10.cpp +++ b/src/mame/machine/playch10.cpp @@ -46,6 +46,12 @@ void playch10_state::machine_start() // this is on the main board and does not belong to the cart board m_nt_ram = std::make_unique(0x800); + for (int i = 0; i < 4; i++) + if (m_cart_nt_ram != nullptr && i >= 2) // extra cart RAM for 4 screen mirroring + m_nt_page[i]->configure_entries(0, 2, m_cart_nt_ram.get(), 0x400); + else + m_nt_page[i]->configure_entries(0, 2, m_nt_ram.get(), 0x400); + if (m_vram != nullptr) set_videoram_bank(0, 8, 0, 8); else @@ -228,18 +234,6 @@ uint8_t playch10_state::pc10_in1_r() * *************************************/ -void playch10_state::pc10_nt_w(offs_t offset, uint8_t data) -{ - int page = BIT(offset, 10, 2); - m_nametable[page][offset & 0x3ff] = data; -} - -uint8_t playch10_state::pc10_nt_r(offs_t offset) -{ - int page = BIT(offset, 10, 2); - return m_nametable[page][offset & 0x3ff]; -} - void playch10_state::pc10_chr_w(offs_t offset, uint8_t data) { int bank = offset >> 10; @@ -259,31 +253,24 @@ void playch10_state::pc10_set_mirroring(int mirroring) { switch (mirroring) { - case PPU_MIRROR_LOW: - m_nametable[0] = m_nametable[1] = m_nametable[2] = m_nametable[3] = m_nt_ram.get(); - break; - case PPU_MIRROR_HIGH: - m_nametable[0] = m_nametable[1] = m_nametable[2] = m_nametable[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_HORZ: - m_nametable[0] = m_nt_ram.get(); - m_nametable[1] = m_nt_ram.get(); - m_nametable[2] = m_nt_ram.get() + 0x400; - m_nametable[3] = m_nt_ram.get() + 0x400; - break; - case PPU_MIRROR_VERT: - default: - m_nametable[0] = m_nt_ram.get(); - m_nametable[1] = m_nt_ram.get() + 0x400; - m_nametable[2] = m_nt_ram.get(); - m_nametable[3] = m_nt_ram.get()+ 0x400; - break; - case PPU_MIRROR_4SCREEN: - m_nametable[0] = m_nt_ram.get(); - m_nametable[1] = m_nt_ram.get() + 0x400; - m_nametable[2] = m_cart_nt_ram.get(); - m_nametable[3] = m_cart_nt_ram.get() + 0x400; - break; + case PPU_MIRROR_LOW: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(0); + break; + case PPU_MIRROR_HIGH: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(1); + break; + case PPU_MIRROR_HORZ: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(BIT(i, 1)); + break; + case PPU_MIRROR_VERT: + case PPU_MIRROR_4SCREEN: + default: + for (int i = 0; i < 4; i++) + m_nt_page[i]->set_entry(i & 1); + break; } } -- cgit v1.2.3