From af704c04bbd289e8ff8ffa5e31deebae3c43ba19 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sat, 2 Apr 2022 22:37:22 +1100 Subject: init vars for coverity (previously missed in mame/*) --- src/mame/audio/arcadia.h | 2 +- src/mame/audio/bally.h | 2 +- src/mame/audio/cmi01a.h | 22 ++++++------ src/mame/drivers/karnov.cpp | 12 +++---- src/mame/drivers/rastersp.cpp | 22 ++++++------ src/mame/includes/hng64.h | 24 ++++++------- src/mame/includes/n64.h | 58 ++++++++++++++++---------------- src/mame/includes/pc6001.h | 10 +++--- src/mame/includes/thomson.h | 10 +++--- src/mame/includes/ti85.h | 12 +++---- src/mame/includes/xbox_usb.h | 2 +- src/mame/machine/315-5881_crypt.h | 2 +- src/mame/machine/hpc3.h | 50 +++++++++++++-------------- src/mame/machine/mega32x.h | 2 +- src/mame/machine/pce_cd.h | 52 ++++++++++++++-------------- src/mame/machine/pgmprot_igs027a_type1.h | 32 +++++++++--------- src/mame/machine/psxcd.h | 2 +- src/mame/machine/rx01.h | 2 +- src/mame/machine/swim.h | 10 +++--- 19 files changed, 164 insertions(+), 164 deletions(-) diff --git a/src/mame/audio/arcadia.h b/src/mame/audio/arcadia.h index dc29ca93556..029236e6295 100644 --- a/src/mame/audio/arcadia.h +++ b/src/mame/audio/arcadia.h @@ -25,7 +25,7 @@ protected: sound_stream *m_channel = nullptr; uint8_t m_reg[3]{}; - int m_size = 0, m_pos,m_tval = 0, m_nval = 0; + int m_size = 0, m_pos = 0, m_tval = 0, m_nval = 0; unsigned m_mode = 0, m_omode = 0; unsigned m_volume = 0; unsigned m_lfsr = 0; diff --git a/src/mame/audio/bally.h b/src/mame/audio/bally.h index b85eff45b2a..094c577b755 100644 --- a/src/mame/audio/bally.h +++ b/src/mame/audio/bally.h @@ -293,7 +293,7 @@ protected: required_device m_speech_filter; required_device m_tms5200; - uint8_t m_sound_select; + uint8_t m_sound_select = 0; uint8_t pia2_porta_r(); diff --git a/src/mame/audio/cmi01a.h b/src/mame/audio/cmi01a.h index 8e08cdb7147..73c7881724c 100644 --- a/src/mame/audio/cmi01a.h +++ b/src/mame/audio/cmi01a.h @@ -79,21 +79,21 @@ private: void update_wave_addr(int inc); uint32_t m_channel; - emu_timer * m_zx_timer; - uint8_t m_zx_flag; - uint8_t m_zx_ff; + emu_timer * m_zx_timer = nullptr; + uint8_t m_zx_flag = 0; + uint8_t m_zx_ff = 0; - emu_timer * m_eosi_timer; + emu_timer * m_eosi_timer = nullptr; - emu_timer * m_bcas_timer; + emu_timer * m_bcas_timer = nullptr; std::unique_ptr m_wave_ram; - uint16_t m_segment_cnt; - uint8_t m_new_addr; // Flag - uint8_t m_vol_latch; - uint8_t m_flt_latch; - uint8_t m_rp; - uint8_t m_ws; + uint16_t m_segment_cnt = 0; + uint8_t m_new_addr = 0; // Flag + uint8_t m_vol_latch = 0; + uint8_t m_flt_latch = 0; + uint8_t m_rp = 0; + uint8_t m_ws = 0; int m_dir = 0; int m_env_dir = 0; uint8_t m_env = 0; diff --git a/src/mame/drivers/karnov.cpp b/src/mame/drivers/karnov.cpp index dad970d95de..89904f14642 100644 --- a/src/mame/drivers/karnov.cpp +++ b/src/mame/drivers/karnov.cpp @@ -181,12 +181,12 @@ private: void mcu_data_h_w(uint8_t data); void mcubl_p1_w(uint8_t data); - uint8_t m_mcu_p0; - uint8_t m_mcu_p1; - uint8_t m_mcu_p2; - uint16_t m_mcu_to_maincpu; - uint16_t m_maincpu_to_mcu; - bool m_coin_state; + uint8_t m_mcu_p0 = 0; + uint8_t m_mcu_p1 = 0; + uint8_t m_mcu_p2 = 0; + uint16_t m_mcu_to_maincpu = 0; + uint16_t m_maincpu_to_mcu = 0; + bool m_coin_state = false; }; diff --git a/src/mame/drivers/rastersp.cpp b/src/mame/drivers/rastersp.cpp index a5c9eaf267b..1e6eff96841 100644 --- a/src/mame/drivers/rastersp.cpp +++ b/src/mame/drivers/rastersp.cpp @@ -172,20 +172,20 @@ private: uint8_t interrupt_status_r(offs_t offset); std::unique_ptr m_nvram8; - uint8_t m_irq_status; - uint32_t m_dlba; + uint8_t m_irq_status = 0; + uint32_t m_dlba = 0; std::unique_ptr m_paletteram; - uint8_t m_palette_number; - uint32_t m_speedup_count; - uint32_t m_tms_io_regs[0x80]; + uint8_t m_palette_number = 0; + uint32_t m_speedup_count = 0; + uint32_t m_tms_io_regs[0x80]{}; bitmap_ind16 m_update_bitmap; - uint8_t m_port2_data; - uint32_t m_last_watchdog; - int m_left_volume; - int m_right_volume; - uint8_t m_interrupt_mask; - uint8_t m_dsp_ctrl_data; + uint8_t m_port2_data = 0; + uint32_t m_last_watchdog = 0; + int m_left_volume = 0; + int m_right_volume = 0; + uint8_t m_interrupt_mask = 0; + uint8_t m_dsp_ctrl_data = 0; }; class fbcrazy_state : public rastersp_state diff --git a/src/mame/includes/hng64.h b/src/mame/includes/hng64.h index 38fea52a27b..a67fa56c3f1 100644 --- a/src/mame/includes/hng64.h +++ b/src/mame/includes/hng64.h @@ -390,28 +390,28 @@ private: DECLARE_WRITE_LINE_MEMBER( sio0_w ); - uint8_t m_port7; - uint8_t m_port1; + uint8_t m_port7 = 0; + uint8_t m_port1 = 0; - int m_ex_ramaddr; - int m_ex_ramaddr_upper; + int m_ex_ramaddr = 0; + int m_ex_ramaddr_upper = 0; TIMER_CALLBACK_MEMBER(tempio_irqon_callback); TIMER_CALLBACK_MEMBER(tempio_irqoff_callback); - emu_timer *m_tempio_irqon_timer; - emu_timer *m_tempio_irqoff_timer; + emu_timer *m_tempio_irqon_timer = nullptr; + emu_timer *m_tempio_irqoff_timer = nullptr; void init_io(); void init_hng64_reorder_gfx(); void set_irq(uint32_t irq_vector); - uint32_t m_irq_pending; + uint32_t m_irq_pending = 0; TIMER_CALLBACK_MEMBER(comhack_callback); - emu_timer *m_comhack_timer; + emu_timer *m_comhack_timer = nullptr; - int m_irq_level; + int m_irq_level = 0; TILE_GET_INFO_MEMBER(get_hng64_tile0_8x8_info); TILE_GET_INFO_MEMBER(get_hng64_tile0_16x16_info); TILE_GET_INFO_MEMBER(get_hng64_tile1_8x8_info); @@ -450,10 +450,10 @@ private: std::unique_ptr m_poly_renderer; TIMER_CALLBACK_MEMBER(hng64_3dfifo_processed); - emu_timer *m_3dfifo_timer; + emu_timer *m_3dfifo_timer = nullptr; - uint16_t* m_vertsrom; - int m_vertsrom_size; + uint16_t* m_vertsrom = nullptr; + int m_vertsrom_size = 0; std::vector m_polys; // HNG64_MAX_POLYGONS void clear3d(); diff --git a/src/mame/includes/n64.h b/src/mame/includes/n64.h index 09e7a6848d1..a7249b53bab 100644 --- a/src/mame/includes/n64.h +++ b/src/mame/includes/n64.h @@ -224,14 +224,14 @@ private: // RSP Interface (SP) registers void sp_dma(int direction); - uint32_t sp_mem_addr; - uint32_t sp_dram_addr; - uint32_t sp_mem_addr_start; - uint32_t sp_dram_addr_start; - int sp_dma_length; - int sp_dma_count; - int sp_dma_skip; - uint32_t sp_semaphore; + uint32_t sp_mem_addr = 0; + uint32_t sp_dram_addr = 0; + uint32_t sp_mem_addr_start = 0; + uint32_t sp_dram_addr_start = 0; + int sp_dma_length = 0; + int sp_dma_count = 0; + int sp_dma_skip = 0; + uint32_t sp_semaphore = 0; // Disk Drive (DD) registers and functions void dd_set_zone_and_track_offset(); @@ -239,27 +239,27 @@ private: void dd_write_sector(); void dd_read_sector(); void dd_read_C2(); - uint32_t dd_buffer[256]; - uint32_t dd_sector_data[64]; - uint32_t dd_ram_seq_data[16]; - uint32_t dd_data_reg; - uint32_t dd_status_reg; - uint32_t dd_track_reg; - uint32_t dd_buf_status_reg; - uint32_t dd_sector_err_reg; - uint32_t dd_seq_status_reg; - uint32_t dd_seq_ctrl_reg; - uint32_t dd_sector_reg; - uint32_t dd_reset_reg; - uint32_t dd_current_reg; - bool dd_bm_reset_held; - bool dd_write; - uint8_t dd_int; - uint8_t dd_start_block; - uint8_t dd_start_sector; - uint8_t dd_sectors_per_block; - uint8_t dd_sector_size; - uint8_t dd_zone; + uint32_t dd_buffer[256]{}; + uint32_t dd_sector_data[64]{}; + uint32_t dd_ram_seq_data[16]{}; + uint32_t dd_data_reg = 0; + uint32_t dd_status_reg = 0; + uint32_t dd_track_reg = 0; + uint32_t dd_buf_status_reg = 0; + uint32_t dd_sector_err_reg = 0; + uint32_t dd_seq_status_reg = 0; + uint32_t dd_seq_ctrl_reg = 0; + uint32_t dd_sector_reg = 0; + uint32_t dd_reset_reg = 0; + uint32_t dd_current_reg = 0; + bool dd_bm_reset_held = false; + bool dd_write = 0; + uint8_t dd_int = 0; + uint8_t dd_start_block = 0; + uint8_t dd_start_sector = 0; + uint8_t dd_sectors_per_block = 0; + uint8_t dd_sector_size = 0; + uint8_t dd_zone = 0; uint32_t dd_track_offset = 0; // Peripheral Interface (PI) registers and functions diff --git a/src/mame/includes/pc6001.h b/src/mame/includes/pc6001.h index 0279a863431..cad9989c6c3 100644 --- a/src/mame/includes/pc6001.h +++ b/src/mame/includes/pc6001.h @@ -322,12 +322,12 @@ private: required_shared_ptr m_sr_scrolly; required_device m_ym; - u8 m_sr_bank_reg[16]; - bool m_sr_text_mode; - u8 m_sr_text_rows; + u8 m_sr_bank_reg[16]{}; + bool m_sr_text_mode = false; + u8 m_sr_text_rows = 0; std::unique_ptr m_gvram; - u8 m_bitmap_yoffs, m_bitmap_xoffs; - u8 m_width80; + u8 m_bitmap_yoffs = 0, m_bitmap_xoffs = 0; + u8 m_width80 = 0; // memory_view m_gvram_view; diff --git a/src/mame/includes/thomson.h b/src/mame/includes/thomson.h index a36a95f6da5..150de02dadb 100644 --- a/src/mame/includes/thomson.h +++ b/src/mame/includes/thomson.h @@ -241,7 +241,7 @@ protected: TIMER_CALLBACK_MEMBER( ans ); void thom_palette(palette_device &palette); - int m_centronics_busy; + int m_centronics_busy = 0; int m_centronics_perror; void to7_map(address_map &map); @@ -710,10 +710,10 @@ private: required_device m_pia_io; required_device m_rs232; int m_last_low; - int m_centronics_busy; - int m_rxd; - int m_cts; - int m_dsr; + int m_centronics_busy = 0; + int m_rxd = 0; + int m_cts = 0; + int m_dsr = 0; /* read data register */ uint8_t porta_in(); diff --git a/src/mame/includes/ti85.h b/src/mame/includes/ti85.h index 0508f3aef4e..0ef698e7b41 100644 --- a/src/mame/includes/ti85.h +++ b/src/mame/includes/ti85.h @@ -36,12 +36,12 @@ enum ti85_model { typedef struct { - uint8_t loop; - uint8_t setup; - float divsor; - bool interrupt; - uint8_t max; - uint8_t count; + uint8_t loop = 0; + uint8_t setup = 0; + float divsor = 1; + bool interrupt = false; + uint8_t max = 0; + uint8_t count = 0; } ti83pse_timer; typedef enum TI83PSE_CTIMER diff --git a/src/mame/includes/xbox_usb.h b/src/mame/includes/xbox_usb.h index 075f3f6f274..27b6c4262c5 100644 --- a/src/mame/includes/xbox_usb.h +++ b/src/mame/includes/xbox_usb.h @@ -440,7 +440,7 @@ protected: uint8_t *position_device_descriptor(int &size); uint8_t *position_configuration_descriptor(int index, int &size); uint8_t *position_string_descriptor(int index, int &size); - ohci_usb_controller *busmanager; + ohci_usb_controller *busmanager = nullptr; struct { int type; int controldirection; diff --git a/src/mame/machine/315-5881_crypt.h b/src/mame/machine/315-5881_crypt.h index 5a39c60e814..9b2e8c6a6c4 100644 --- a/src/mame/machine/315-5881_crypt.h +++ b/src/mame/machine/315-5881_crypt.h @@ -57,7 +57,7 @@ private: std::unique_ptr line_buffer; std::unique_ptr line_buffer_prev; uint32_t prot_cur_address = 0; - uint16_t subkey, dec_hist = 0; + uint16_t subkey = 0, dec_hist = 0; uint32_t dec_header = 0; bool enc_ready = 0; diff --git a/src/mame/machine/hpc3.h b/src/mame/machine/hpc3.h index 74eb96438e0..42fbe234780 100644 --- a/src/mame/machine/hpc3.h +++ b/src/mame/machine/hpc3.h @@ -127,9 +127,9 @@ protected: struct pbus_dma_t { - bool m_active; - uint32_t m_cur_ptr; - uint32_t m_desc_ptr; + bool m_active = false; + uint32_t m_cur_ptr = 0; + uint32_t m_desc_ptr = 0; uint32_t m_desc_flags = 0; uint32_t m_next_ptr = 0; uint32_t m_bytes_left = 0; @@ -213,9 +213,9 @@ protected: uint32_t m_dmacfg; uint32_t m_piocfg; bool m_drq; - bool m_big_endian; - bool m_to_device; - bool m_active; + bool m_big_endian = false; + bool m_to_device = false; + bool m_active = false; }; scsi_dma_t m_scsi_dma[2]; @@ -227,7 +227,7 @@ protected: std::unique_ptr m_enet_fifo[2]; private: - emu_timer *m_enet_tx_timer; + emu_timer *m_enet_tx_timer = nullptr; enum enet_dma_rx_ctrl : u32 { @@ -279,24 +279,24 @@ private: }; // ethernet registers - u32 m_enet_rx_cbp; // current receive buffer pointer - u32 m_enet_rx_nbdp; // next receive buffer descriptor pointer - u32 m_enet_rx_bc; // receive byte count - u32 m_enet_rx_ctrl; // receive status - u32 m_enet_rx_gio; // receive gio fifo pointer - u32 m_enet_rx_dev; // receive device fifo pointer - u32 m_enet_misc; // reset, clear interrupt, loopback - u32 m_enet_piocfg; // pio configuration - u32 m_enet_dmacfg; // dma configuration - u32 m_enet_tx_cbp; // current transmit buffer pointer - u32 m_enet_tx_nbdp; // next transmit buffer descriptor pointer - u32 m_enet_tx_bc; // transmit byte count - u32 m_enet_tx_ctrl; // transmit status - u32 m_enet_tx_gio; // transmit gio fifo pointer - u32 m_enet_tx_dev; // transmit device fifo pointer - u32 m_enet_rx_cbdp; // current receive buffer descriptor pointer - u32 m_enet_tx_cpfbdp; // current/previous first transmit buffer descriptor pointer - u32 m_enet_tx_ppfbdp; // previous/previous? first transmit buffer descriptor pointer + u32 m_enet_rx_cbp = 0; // current receive buffer pointer + u32 m_enet_rx_nbdp = 0; // next receive buffer descriptor pointer + u32 m_enet_rx_bc = 0; // receive byte count + u32 m_enet_rx_ctrl = 0; // receive status + u32 m_enet_rx_gio = 0; // receive gio fifo pointer + u32 m_enet_rx_dev = 0; // receive device fifo pointer + u32 m_enet_misc = 0; // reset, clear interrupt, loopback + u32 m_enet_piocfg = 0; // pio configuration + u32 m_enet_dmacfg = 0; // dma configuration + u32 m_enet_tx_cbp = 0; // current transmit buffer pointer + u32 m_enet_tx_nbdp = 0; // next transmit buffer descriptor pointer + u32 m_enet_tx_bc = 0; // transmit byte count + u32 m_enet_tx_ctrl = 0; // transmit status + u32 m_enet_tx_gio = 0; // transmit gio fifo pointer + u32 m_enet_tx_dev = 0; // transmit device fifo pointer + u32 m_enet_rx_cbdp = 0; // current receive buffer descriptor pointer + u32 m_enet_tx_cpfbdp = 0; // current/previous first transmit buffer descriptor pointer + u32 m_enet_tx_ppfbdp = 0; // previous/previous? first transmit buffer descriptor pointer }; DECLARE_DEVICE_TYPE(SGI_HPC3, hpc3_device) diff --git a/src/mame/machine/mega32x.h b/src/mame/machine/mega32x.h index 86aec57b93f..5d07d35df4d 100644 --- a/src/mame/machine/mega32x.h +++ b/src/mame/machine/mega32x.h @@ -87,7 +87,7 @@ public: void render_videobuffer_to_screenbuffer_helper(int scanline); void render_videobuffer_to_screenbuffer(int x, uint32_t priority, uint32_t &lineptr); - int sh2_master_pwmint_enable, sh2_slave_pwmint_enable; + int sh2_master_pwmint_enable = 0, sh2_slave_pwmint_enable = 0; void check_framebuffer_swap(bool enabled); void check_irqs(); diff --git a/src/mame/machine/pce_cd.h b/src/mame/machine/pce_cd.h index 3d2e3e9a354..cfa293b2ea9 100644 --- a/src/mame/machine/pce_cd.h +++ b/src/mame/machine/pce_cd.h @@ -103,7 +103,7 @@ private: uint16_t m_adpcm_latch_address; uint8_t m_adpcm_control; uint8_t m_adpcm_dma_reg; - uint8_t m_fade_reg; + uint8_t m_fade_reg = 0; void regs_map(address_map &map); void adpcm_stop(uint8_t irq_flag); @@ -138,33 +138,33 @@ private: std::unique_ptr m_bram; std::unique_ptr m_adpcm_ram; - int m_bram_locked; - int m_adpcm_read_ptr; - uint8_t m_adpcm_read_buf; - int m_adpcm_write_ptr; - uint8_t m_adpcm_write_buf; - int m_adpcm_length; - int m_adpcm_clock_divider; - uint32_t m_msm_start_addr; - uint32_t m_msm_end_addr; - uint32_t m_msm_half_addr; - uint8_t m_msm_nibble; - uint8_t m_msm_idle; - uint8_t m_msm_repeat; + int m_bram_locked = 0; + int m_adpcm_read_ptr = 0; + uint8_t m_adpcm_read_buf = 0; + int m_adpcm_write_ptr = 0; + uint8_t m_adpcm_write_buf = 0; + int m_adpcm_length = 0; + int m_adpcm_clock_divider = 0; + uint32_t m_msm_start_addr = 0; + uint32_t m_msm_end_addr = 0; + uint32_t m_msm_half_addr = 0; + uint8_t m_msm_nibble = 0; + uint8_t m_msm_idle = 0; + uint8_t m_msm_repeat = 0; /* SCSI signals */ - int m_scsi_BSY; /* Busy. Bus in use */ - int m_scsi_SEL; /* Select. Initiator has won arbitration and has selected a target */ - int m_scsi_CD; /* Control/Data. Target is sending control (data) information */ - int m_scsi_IO; /* Input/Output. Target is sending (receiving) information */ - int m_scsi_MSG; /* Message. Target is sending or receiving a message */ - int m_scsi_REQ; /* Request. Target is requesting a data transfer */ - int m_scsi_ACK; /* Acknowledge. Initiator acknowledges that it is ready for a data transfer */ - int m_scsi_ATN; /* Attention. Initiator has a message ready for the target */ - int m_scsi_RST; /* Reset. Initiator forces all targets and any other initiators to do a warm reset */ - int m_scsi_last_RST; /* To catch setting of RST signal */ - int m_cd_motor_on; - int m_selected; + int m_scsi_BSY = 0; /* Busy. Bus in use */ + int m_scsi_SEL = 0; /* Select. Initiator has won arbitration and has selected a target */ + int m_scsi_CD = 0; /* Control/Data. Target is sending control (data) information */ + int m_scsi_IO = 0; /* Input/Output. Target is sending (receiving) information */ + int m_scsi_MSG = 0; /* Message. Target is sending or receiving a message */ + int m_scsi_REQ = 0; /* Request. Target is requesting a data transfer */ + int m_scsi_ACK = 0; /* Acknowledge. Initiator acknowledges that it is ready for a data transfer */ + int m_scsi_ATN = 0; /* Attention. Initiator has a message ready for the target */ + int m_scsi_RST = 0; /* Reset. Initiator forces all targets and any other initiators to do a warm reset */ + int m_scsi_last_RST = 0; /* To catch setting of RST signal */ + int m_cd_motor_on = 0; + int m_selected = 0; std::unique_ptr m_command_buffer; int m_command_buffer_index = 0; int m_status_sent = 0; diff --git a/src/mame/machine/pgmprot_igs027a_type1.h b/src/mame/machine/pgmprot_igs027a_type1.h index 7ab97c7af63..f1cbe7ffb98 100644 --- a/src/mame/machine/pgmprot_igs027a_type1.h +++ b/src/mame/machine/pgmprot_igs027a_type1.h @@ -40,28 +40,28 @@ protected: private: /////////////// simulations - u16 m_value0; - u16 m_value1; - u16 m_valuekey; - u16 m_ddp3lastcommand; - u32 m_valueresponse; - int m_curslots; - u32 m_slots[0x100]; + u16 m_value0 = 0; + u16 m_value1 = 0; + u16 m_valuekey = 0; + u16 m_ddp3lastcommand = 0; + u32 m_valueresponse = 0; + int m_curslots = 0; + u32 m_slots[0x100]{}; // pstars / oldsplus / kov - u16 m_pstar_e7_value; - u16 m_pstar_b1_value; - u16 m_pstar_ce_value; - u16 m_kov_c0_value; - u16 m_kov_cb_value; - u16 m_kov_fe_value; - u16 m_extra_ram[0x100]; + u16 m_pstar_e7_value = 0; + u16 m_pstar_b1_value = 0; + u16 m_pstar_ce_value = 0; + u16 m_kov_c0_value = 0; + u16 m_kov_cb_value = 0; + u16 m_kov_fe_value = 0; + u16 m_extra_ram[0x100]{}; // puzzli2 s32 m_puzzli_54_trigger; typedef void (pgm_arm_type1_state::*pgm_arm_sim_command_handler)(int pc); - pgm_arm_sim_command_handler arm_sim_handler; + pgm_arm_sim_command_handler arm_sim_handler{}; /////////////// emulation u16 m_arm_type1_highlatch_arm_w = 0; @@ -102,7 +102,7 @@ private: void arm7_type1_sim_w(offs_t offset, u16 data); u16 arm7_type1_sim_protram_r(offs_t offset); u16 pstars_arm7_type1_sim_protram_r(offs_t offset); - int m_simregion; + int m_simregion = 0; /* puzzli2 protection internal state stuff */ int stage = 0; diff --git a/src/mame/machine/psxcd.h b/src/mame/machine/psxcd.h index 8c20b9dca1a..79b9e493efe 100644 --- a/src/mame/machine/psxcd.h +++ b/src/mame/machine/psxcd.h @@ -141,7 +141,7 @@ private: #endif bool open = false, m_mute = false, m_dmaload = false; - device_timer_id next_read_event; + device_timer_id next_read_event{}; int64_t next_sector_t = 0; unsigned int autopause_sector = 0, start_read_delay = 0, read_sector_cycles = 0, preread_delay = 0; diff --git a/src/mame/machine/rx01.h b/src/mame/machine/rx01.h index 56e886271c6..e4fc2fe59a6 100644 --- a/src/mame/machine/rx01.h +++ b/src/mame/machine/rx01.h @@ -74,7 +74,7 @@ private: uint16_t m_rxes = 0; // RX Error and Status int m_unit = 0; int m_interrupt = 0; - rx01_state m_state; + rx01_state m_state{}; }; // device type definition diff --git a/src/mame/machine/swim.h b/src/mame/machine/swim.h index 017a9258ece..ac3b072a449 100644 --- a/src/mame/machine/swim.h +++ b/src/mame/machine/swim.h @@ -46,11 +46,11 @@ protected: virtual void iwm_modereg_w(uint8_t data) override; private: - uint8_t m_swim_mode; - uint8_t m_swim_magic_state; - uint8_t m_parm_offset; - uint8_t m_ism_regs[8]; - uint8_t m_parms[16]; + uint8_t m_swim_mode = 0; + uint8_t m_swim_magic_state = 0; + uint8_t m_parm_offset = 0; + uint8_t m_ism_regs[8]{}; + uint8_t m_parms[16]{}; }; #endif // MAME_MACHINE_SWIM_H -- cgit v1.2.3