From ae2086be7298c9cb763bd4cdedeb37b9460cc141 Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 25 Jun 2018 10:58:02 -0400 Subject: hd63450: Configure device clock (not used yet); back out custom constructor (nw) --- src/devices/bus/vme/vme_fcscsi.cpp | 3 ++- src/devices/machine/hd63450.cpp | 2 +- src/devices/machine/hd63450.h | 11 ++++------- src/mame/drivers/esq5505.cpp | 8 ++++++-- src/mame/drivers/x68k.cpp | 5 ++++- 5 files changed, 17 insertions(+), 12 deletions(-) diff --git a/src/devices/bus/vme/vme_fcscsi.cpp b/src/devices/bus/vme/vme_fcscsi.cpp index 8264dcaf47a..10ce5ed2e47 100644 --- a/src/devices/bus/vme/vme_fcscsi.cpp +++ b/src/devices/bus/vme/vme_fcscsi.cpp @@ -248,7 +248,8 @@ MACHINE_CONFIG_START(vme_fcscsi1_card_device::device_add_mconfig) MCFG_PIT68230_PB_OUTPUT_CB(WRITE8(*this, vme_fcscsi1_card_device, led_w)) /* DMAC it is really a M68450 but the HD63850 is upwards compatible */ - MCFG_DEVICE_ADD("mc68450", HD63450, "maincpu") // MC68450 compatible + MCFG_DEVICE_ADD("mc68450", HD63450, CPU_CRYSTAL / 2) // MC68450 compatible + MCFG_HD63450_CPU("maincpu") MCFG_HD63450_CLOCKS(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_usec(4), attotime::from_hz(15625/2)) MCFG_HD63450_BURST_CLOCKS(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_nsec(50), attotime::from_nsec(50)) MCFG_HD63450_DMA_END_CB(WRITE8(*this, vme_fcscsi1_card_device, dma_end)) diff --git a/src/devices/machine/hd63450.cpp b/src/devices/machine/hd63450.cpp index d3921b2dd04..ecefb13f908 100644 --- a/src/devices/machine/hd63450.cpp +++ b/src/devices/machine/hd63450.cpp @@ -9,7 +9,7 @@ #include "emu.h" #include "hd63450.h" -DEFINE_DEVICE_TYPE(HD63450, hd63450_device, "hd63450", "Hitachi HD63450 DMA Controller") +DEFINE_DEVICE_TYPE(HD63450, hd63450_device, "hd63450", "Hitachi HD63450 DMAC") hd63450_device::hd63450_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, HD63450, tag, owner, clock), diff --git a/src/devices/machine/hd63450.h b/src/devices/machine/hd63450.h index cf3220b2ba1..17fe924bc9d 100644 --- a/src/devices/machine/hd63450.h +++ b/src/devices/machine/hd63450.h @@ -40,6 +40,9 @@ #define MCFG_HD63450_DMA_WRITE_3_CB(_devcb) \ devcb = &downcast(*device).set_dma_write_3_callback(DEVCB_##_devcb); +#define MCFG_HD63450_CPU(_tag) \ + downcast(*device).set_cpu_tag(_tag); + #define MCFG_HD63450_CLOCKS(_clk1, _clk2, _clk3, _clk4) \ downcast(*device).set_our_clocks(_clk1, _clk2, _clk3, _clk4); @@ -49,13 +52,6 @@ class hd63450_device : public device_t { public: - template - hd63450_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag) - : hd63450_device(mconfig, tag, owner, (uint32_t)0) - { - m_cpu.set_tag(std::forward(cpu_tag)); - } - hd63450_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); template devcb_base &set_dma_end_callback(Object &&cb) { return m_dma_end.set_callback(std::forward(cb)); } @@ -69,6 +65,7 @@ public: template devcb_base &set_dma_write_2_callback(Object &&cb) { return m_dma_write_2.set_callback(std::forward(cb)); } template devcb_base &set_dma_write_3_callback(Object &&cb) { return m_dma_write_3.set_callback(std::forward(cb)); } + template void set_cpu_tag(T &&cpu_tag) { m_cpu.set_tag(std::forward(cpu_tag)); } void set_our_clocks(const attotime &clk1, const attotime &clk2, const attotime &clk3, const attotime &clk4) { m_our_clock[0] = clk1; diff --git a/src/mame/drivers/esq5505.cpp b/src/mame/drivers/esq5505.cpp index adfb5e8c525..b4740d4abc6 100644 --- a/src/mame/drivers/esq5505.cpp +++ b/src/mame/drivers/esq5505.cpp @@ -669,15 +669,19 @@ MACHINE_CONFIG_START(esq5505_state::eps) MCFG_DEVICE_MODIFY( "maincpu" ) MCFG_DEVICE_PROGRAM_MAP(eps_map) + MCFG_DEVICE_MODIFY("duart") + MCFG_DEVICE_CLOCK(10_MHz_XTAL / 2) + MCFG_ESQPANEL2X40_VFX_REMOVE("panel") MCFG_ESQPANEL1X22_ADD("panel") MCFG_ESQPANEL_TX_CALLBACK(WRITELINE("duart", mc68681_device, rx_b_w)) MCFG_ESQPANEL_ANALOG_CALLBACK(WRITE16(*this, esq5505_state, analog_w)) - MCFG_DEVICE_ADD("wd1772", WD1772, 8000000) + MCFG_DEVICE_ADD("wd1772", WD1772, 8_MHz_XTAL) MCFG_FLOPPY_DRIVE_ADD("wd1772:0", ensoniq_floppies, "35dd", esq5505_state::floppy_formats) - MCFG_DEVICE_ADD("mc68450", HD63450, "maincpu") // MC68450 compatible + MCFG_DEVICE_ADD("mc68450", HD63450, 10_MHz_XTAL) // MC68450 compatible + MCFG_HD63450_CPU("maincpu") MCFG_HD63450_CLOCKS(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_usec(4), attotime::from_hz(15625/2)) MCFG_HD63450_BURST_CLOCKS(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_nsec(50), attotime::from_nsec(50)) MCFG_HD63450_DMA_END_CB(WRITE8(*this, esq5505_state, dma_end)) diff --git a/src/mame/drivers/x68k.cpp b/src/mame/drivers/x68k.cpp index 5c5be12e004..b80a454e08a 100644 --- a/src/mame/drivers/x68k.cpp +++ b/src/mame/drivers/x68k.cpp @@ -1661,7 +1661,8 @@ MACHINE_CONFIG_START(x68k_state::x68000) MCFG_I8255_IN_PORTC_CB(READ8(*this, x68k_state, ppi_port_c_r)) MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, x68k_state, ppi_port_c_w)) - MCFG_DEVICE_ADD("hd63450", HD63450, "maincpu") + MCFG_DEVICE_ADD("hd63450", HD63450, 40_MHz_XTAL / 4) + MCFG_HD63450_CPU("maincpu") MCFG_HD63450_CLOCKS(attotime::from_usec(2), attotime::from_nsec(450), attotime::from_usec(4), attotime::from_hz(15625/2)) MCFG_HD63450_BURST_CLOCKS(attotime::from_usec(2), attotime::from_nsec(450), attotime::from_nsec(50), attotime::from_nsec(50)) MCFG_HD63450_DMA_END_CB(WRITE8(*this, x68k_state, dma_end)) @@ -1771,6 +1772,8 @@ MACHINE_CONFIG_START(x68k_state::x68030) MCFG_DEVICE_PROGRAM_MAP(x68030_map) MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(x68k_state,x68k_int_ack) + MCFG_DEVICE_MODIFY("hd63450") + MCFG_DEVICE_CLOCK(50_MHz_XTAL / 4) MCFG_DEVICE_MODIFY("scc") MCFG_DEVICE_CLOCK(20_MHz_XTAL / 4) MCFG_DEVICE_MODIFY("mb89352") -- cgit v1.2.3