From a54f7e616aa057f605d48fbbe947edba1762180a Mon Sep 17 00:00:00 2001 From: Michael Zapf Date: Sat, 13 Apr 2019 00:41:26 +0200 Subject: tms99xx: Combine DBIN/IAQ operation with setaddress, no need for separate callbacks. (nw) --- src/devices/bus/ti99/internal/998board.cpp | 7 ++----- src/devices/bus/ti99/internal/datamux.cpp | 10 +++------- src/devices/bus/ti99/internal/genboard.cpp | 11 ++--------- src/devices/cpu/tms9900/tms9900.cpp | 24 +++++++++--------------- src/devices/cpu/tms9900/tms9900.h | 11 +++-------- src/devices/cpu/tms9900/tms9980a.cpp | 14 +++++--------- src/devices/cpu/tms9900/tms9995.cpp | 22 ++++++++-------------- src/devices/cpu/tms9900/tms9995.h | 14 +++----------- src/devices/cpu/tms9900/tms99com.h | 11 +++++++++++ src/mame/drivers/geneve.cpp | 10 ---------- src/mame/drivers/ti99_4p.cpp | 12 +----------- src/mame/drivers/ti99_4x.cpp | 10 ---------- src/mame/drivers/ti99_8.cpp | 10 ---------- 13 files changed, 47 insertions(+), 119 deletions(-) diff --git a/src/devices/bus/ti99/internal/998board.cpp b/src/devices/bus/ti99/internal/998board.cpp index bd0a816cad4..243c3e8c4b9 100644 --- a/src/devices/bus/ti99/internal/998board.cpp +++ b/src/devices/bus/ti99/internal/998board.cpp @@ -105,6 +105,7 @@ #include "emu.h" #include "998board.h" +#include "cpu/tms9900/tms99com.h" #define LOG_DETAIL (1U<<1) // More detail #define LOG_CRU (1U<<2) // CRU logging @@ -366,14 +367,10 @@ void mainboard8_device::cruwrite(offs_t offset, uint8_t data) // =============== Memory bus access ================== -WRITE_LINE_MEMBER( mainboard8_device::dbin_in ) -{ - m_dbin_level = (line_state)state; -} - void mainboard8_device::setaddress(offs_t mode, uint16_t offset) { LOGMASKED(LOG_ADDRESS, "set %s %04x\n", (m_dbin_level==ASSERT_LINE)? "R" : "W", offset); + m_dbin_level = ((mode & TMS99xx_BUS_DBIN)!=0); // No data is waiting on the data bus m_pending_write = false; diff --git a/src/devices/bus/ti99/internal/datamux.cpp b/src/devices/bus/ti99/internal/datamux.cpp index 7fddceeb03b..875eda20465 100644 --- a/src/devices/bus/ti99/internal/datamux.cpp +++ b/src/devices/bus/ti99/internal/datamux.cpp @@ -70,6 +70,7 @@ #include "emu.h" #include "datamux.h" +#include "cpu/tms9900/tms99com.h" #define LOG_WARN (1U<<1) // Warnings #define LOG_READY (1U<<2) // READY line @@ -77,7 +78,7 @@ #define LOG_ADDRESS (1U<<4) // Address register #define LOG_WAITCOUNT (1U<<5) // Wait state counter -#define VERBOSE ( LOG_GENERAL | LOG_WARN ) +#define VERBOSE ( LOG_GENERAL | LOG_WARN | LOG_ADDRESS ) #include "logmacro.h" @@ -431,6 +432,7 @@ void datamux_device::setaddress(offs_t mode, uint16_t addr) { m_addr_buf = addr; m_waitcount = 0; + m_dbin = ((mode & TMS99xx_BUS_DBIN)!=0); LOGMASKED(LOG_ADDRESS, "Set address %04x\n", m_addr_buf); @@ -539,12 +541,6 @@ void datamux_device::ready_join() m_ready((m_sysready==CLEAR_LINE || m_muxready==CLEAR_LINE)? CLEAR_LINE : ASSERT_LINE); } -WRITE_LINE_MEMBER( datamux_device::dbin_in ) -{ - m_dbin = (line_state)state; - LOGMASKED(LOG_ADDRESS, "Data bus in = %d\n", (m_dbin==ASSERT_LINE)? 1:0 ); -} - WRITE_LINE_MEMBER( datamux_device::ready_line ) { if (state != m_sysready) LOGMASKED(LOG_READY, "READY line from PBox = %d\n", state); diff --git a/src/devices/bus/ti99/internal/genboard.cpp b/src/devices/bus/ti99/internal/genboard.cpp index e63dd97a8fe..718f7652966 100644 --- a/src/devices/bus/ti99/internal/genboard.cpp +++ b/src/devices/bus/ti99/internal/genboard.cpp @@ -913,6 +913,8 @@ void geneve_mapper_device::setaddress(offs_t mode, uint16_t address) m_debug_no_ws = false; m_decoded.offset = address; + m_read_mode = ((mode & TMS99xx_BUS_DBIN)!=0); + decode_logical(m_read_mode, &m_decoded); if (m_decoded.function == MUNDEF) { @@ -995,15 +997,6 @@ WRITE_LINE_MEMBER( geneve_mapper_device::clock_in ) } } -/* - We need the DBIN line for the setaddress operation. -*/ -WRITE_LINE_MEMBER( geneve_mapper_device::dbin_in ) -{ - m_read_mode = (state==ASSERT_LINE); - LOGMASKED(LOG_DETAIL, "dbin = %02x\n", m_read_mode? 1:0); -} - /* PFM expansion: Setting the bank. */ diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp index b790c689ade..b881c96de4c 100644 --- a/src/devices/cpu/tms9900/tms9900.cpp +++ b/src/devices/cpu/tms9900/tms9900.cpp @@ -146,7 +146,7 @@ enum #define LOG_DETAIL (1U<<31) // Increased detail // Minimum log should be warnings -#define VERBOSE ( LOG_GENERAL | LOG_WARN ) +#define VERBOSE ( LOG_GENERAL | LOG_WARN | LOG_ADDRESSBUS ) #include "logmacro.h" @@ -165,12 +165,11 @@ tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, m_cru(nullptr), m_prgaddr_mask((1<write_word(ASSERT_LINE, m_address & m_prgaddr_mask & 0xfffe); + // Note that the bus lines form a pseudo address that is shifted right by one in the handler + m_setaddr->write_word((TMS99xx_BUS_DBIN | (m_iaq? TMS99xx_BUS_IAQ : 0))<<1, m_address & m_prgaddr_mask & 0xfffe); m_check_ready = true; m_mem_phase = 2; m_pass = 2; - LOGMASKED(LOG_ADDRESSBUS, "set address (r) %04x\n", m_address); - pulse_clock(1); // Concludes the first cycle // If READY has been found to be low, the CPU will now stay in the wait state loop } @@ -1547,7 +1543,6 @@ void tms99xx_device::mem_read() // Second phase (after READY was raised again) m_current_value = m_prgspace->read_word(m_address & m_prgaddr_mask & 0xfffe); pulse_clock(1); - if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE); m_mem_phase = 1; // reset to phase 1 LOGMASKED(LOG_MEM, "mem r %04x -> %04x\n", m_address, m_current_value); } @@ -1557,11 +1552,10 @@ void tms99xx_device::mem_write() { if (m_mem_phase==1) { - if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE); - // When writing, the data bus is asserted immediately after the address bus LOGMASKED(LOG_ADDRESSBUS, "set address (w) %04x\n", m_address); + // When writing, the data bus is asserted immediately after the address bus if (m_setaddr) - m_setaddr->write_word(CLEAR_LINE, m_address & m_prgaddr_mask & 0xfffe); + m_setaddr->write_word(TMS99xx_BUS_WRITE, m_address & m_prgaddr_mask & 0xfffe); LOGMASKED(LOG_MEM, "mem w %04x <- %04x\n", m_address, m_current_value); m_prgspace->write_word(m_address & m_prgaddr_mask & 0xfffe, m_current_value); m_check_ready = true; diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h index 6de920a95c4..c6dc14dcb47 100644 --- a/src/devices/cpu/tms9900/tms9900.h +++ b/src/devices/cpu/tms9900/tms9900.h @@ -58,11 +58,9 @@ public: // Callbacks auto extop_cb() { return m_external_operation.bind(); } auto intlevel_cb() { return m_get_intlevel.bind(); } - auto iaq_cb() { return m_iaq_line.bind(); } auto clkout_cb() { return m_clock_out_line.bind(); } auto wait_cb() { return m_wait_line.bind(); } auto holda_cb() { return m_holda_line.bind(); } - auto dbin_cb() { return m_dbin_line.bind(); } protected: tms99xx_device(const machine_config &mconfig, device_type type, @@ -160,6 +158,9 @@ protected: // Used to display the number of consumed cycles in the log. int m_first_cycle; + // Indicates the instruction acquision phase + bool m_iaq; + /************************************************************************/ // Clock output. This is not a pin of the TMS9900 because the TMS9900 @@ -173,15 +174,9 @@ protected: // HOLD Acknowledge line. When asserted (high), the CPU is in HOLD state. devcb_write_line m_holda_line; - // Signal to the outside world that we are now getting an instruction - devcb_write_line m_iaq_line; - // Get the value of the interrupt level lines devcb_read8 m_get_intlevel; - // DBIN line. When asserted (high), the CPU has disabled the data bus output buffers. - devcb_write_line m_dbin_line; - // Trigger external operation. This is achieved by putting a special value in // the most significant three bits of the address bus (TMS9995: data bus) and // pulsing the CRUCLK line. diff --git a/src/devices/cpu/tms9900/tms9980a.cpp b/src/devices/cpu/tms9900/tms9980a.cpp index 0931dde0f6e..949ad8df9a0 100644 --- a/src/devices/cpu/tms9900/tms9980a.cpp +++ b/src/devices/cpu/tms9900/tms9980a.cpp @@ -103,10 +103,8 @@ void tms9980a_device::resolve_lines() { // Resolve our external connections m_external_operation.resolve(); - m_iaq_line.resolve(); m_clock_out_line.resolve(); m_holda_line.resolve(); - m_dbin_line.resolve(); } uint16_t tms9980a_device::read_workspace_register_debug(int reg) @@ -197,9 +195,8 @@ void tms9980a_device::mem_read() { case 1: m_pass = 4; // make the CPU visit this method more than once - if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE); if (m_setaddr) - m_setaddr->write_word(ASSERT_LINE, m_address & m_prgaddr_mask & ~1); + m_setaddr->write_word((TMS99xx_BUS_DBIN | (m_iaq? TMS99xx_BUS_IAQ : 0))<<1, m_address & m_prgaddr_mask & ~1); LOGMASKED(LOG_ADDRESSBUS, "Set address bus %04x\n", m_address & m_prgaddr_mask & ~1); m_check_ready = true; break; @@ -211,7 +208,7 @@ void tms9980a_device::mem_read() break; case 3: if (m_setaddr) - m_setaddr->write_word(ASSERT_LINE, (m_address & m_prgaddr_mask) | 1); + m_setaddr->write_word((TMS99xx_BUS_DBIN | (m_iaq? TMS99xx_BUS_IAQ : 0))<<1, (m_address & m_prgaddr_mask) | 1); LOGMASKED(LOG_ADDRESSBUS, "Set address bus %04x\n", (m_address & m_prgaddr_mask) | 1); break; case 4: @@ -232,9 +229,8 @@ void tms9980a_device::mem_write() { case 1: m_pass = 4; // make the CPU visit this method once more - if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE); if (m_setaddr) - m_setaddr->write_word(CLEAR_LINE, m_address & m_prgaddr_mask & ~1); + m_setaddr->write_word(TMS99xx_BUS_WRITE, m_address & m_prgaddr_mask & ~1); LOGMASKED(LOG_ADDRESSBUS, "Set address bus %04x\n", m_address & m_prgaddr_mask & ~1); m_prgspace->write_byte(m_address & 0x3ffe & ~1, (m_current_value >> 8)&0xff); LOGMASKED(LOG_MEM, "Memory write high byte %04x <- %02x\n", m_address & m_prgaddr_mask & ~1, (m_current_value >> 8)&0xff); @@ -245,7 +241,7 @@ void tms9980a_device::mem_write() break; case 3: if (m_setaddr) - m_setaddr->write_word(CLEAR_LINE, (m_address & m_prgaddr_mask) | 1); + m_setaddr->write_word(TMS99xx_BUS_WRITE, (m_address & m_prgaddr_mask) | 1); LOGMASKED(LOG_ADDRESSBUS, "Set address bus %04x\n", (m_address & m_prgaddr_mask) | 1); m_prgspace->write_byte((m_address & m_prgaddr_mask) | 1, m_current_value & 0xff); LOGMASKED(LOG_MEM, "Memory write low byte %04x <- %02x\n", (m_address & m_prgaddr_mask) | 1, m_current_value & 0xff); @@ -262,7 +258,7 @@ void tms9980a_device::acquire_instruction() { if (m_mem_phase == 1) { - if (!m_iaq_line.isnull()) m_iaq_line(ASSERT_LINE); + m_iaq = true; m_address = PC; m_first_cycle = m_icount; } diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp index b8ae3a6b44c..6502c2c3c0b 100644 --- a/src/devices/cpu/tms9900/tms9995.cpp +++ b/src/devices/cpu/tms9900/tms9995.cpp @@ -168,6 +168,7 @@ tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, m_state_any(0), PC(0), PC_debug(0), + m_iaq(false), m_program_config("program", ENDIANNESS_BIG, 8, 16), m_setaddress_config("setaddress", ENDIANNESS_BIG, 16, 16), // data = address m_io_config("cru", ENDIANNESS_LITTLE, 8, 16, 1), @@ -175,10 +176,8 @@ tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, m_setaddr(nullptr), m_cru(nullptr), m_external_operation(*this), - m_iaq_line(*this), m_clock_out_line(*this), - m_holda_line(*this), - m_dbin_line(*this) + m_holda_line(*this) { m_check_overflow = false; } @@ -203,10 +202,8 @@ void tms9995_device::device_start() // Resolve our external connections m_external_operation.resolve(); - m_iaq_line.resolve(); m_clock_out_line.resolve(); m_holda_line.resolve(); - m_dbin_line.resolve(); // set our instruction counter set_icountptr(m_icount); @@ -1561,7 +1558,7 @@ void tms9995_device::prefetch_and_decode() // Save these values; they have been computed during the current instruction execution m_address_copy = m_address; m_value_copy = m_current_value; - if (!m_iaq_line.isnull()) m_iaq_line(ASSERT_LINE); + m_iaq = true; m_address = PC; LOGMASKED(LOG_DETAIL, "** Prefetching new instruction at %04x **\n", PC); } @@ -1575,7 +1572,7 @@ void tms9995_device::prefetch_and_decode() m_address = m_address_copy; // restore m_address m_current_value = m_value_copy; // restore m_current_value PC = (PC + 2) & 0xfffe; // advance PC - if (!m_iaq_line.isnull()) m_iaq_line(CLEAR_LINE); + m_iaq = false; LOGMASKED(LOG_DETAIL, "++ Prefetch done ++\n"); } } @@ -1845,7 +1842,6 @@ void tms9995_device::mem_read() case 1: // Set address // If this is a word access, 4 passes, else 2 passes - if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE); if (m_word_access || !m_byteop) { m_pass = 4; @@ -1857,7 +1853,7 @@ void tms9995_device::mem_read() m_check_hold = false; LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address & ~1); if (m_setaddr) - m_setaddr->write_word(ASSERT_LINE, address); + m_setaddr->write_word((TMS99xx_BUS_DBIN | (m_iaq? TMS99xx_BUS_IAQ : 0))<<1, address); m_request_auto_wait_state = m_auto_wait; pulse_clock(1); break; @@ -1872,7 +1868,7 @@ void tms9995_device::mem_read() // Set address + 1 (unless byte command) LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1); if (m_setaddr) - m_setaddr->write_word(ASSERT_LINE, m_address | 1); + m_setaddr->write_word((TMS99xx_BUS_DBIN | (m_iaq? TMS99xx_BUS_IAQ : 0))<<1, m_address | 1); m_request_auto_wait_state = m_auto_wait; pulse_clock(1); break; @@ -1979,8 +1975,6 @@ void tms9995_device::mem_write() case 1: // Set address // If this is a word access, 4 passes, else 2 passes - if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE); - if (m_word_access || !m_byteop) { m_pass = 4; @@ -1991,7 +1985,7 @@ void tms9995_device::mem_write() m_check_hold = false; LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", address); if (m_setaddr) - m_setaddr->write_word(CLEAR_LINE, address); + m_setaddr->write_word(TMS99xx_BUS_WRITE, address); LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", address, (m_current_value >> 8)&0xff); m_prgspace->write_byte(address, (m_current_value >> 8)&0xff); m_request_auto_wait_state = m_auto_wait; @@ -2005,7 +1999,7 @@ void tms9995_device::mem_write() // Set address + 1 (unless byte command) LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1); if (m_setaddr) - m_setaddr->write_word(CLEAR_LINE, m_address | 1); + m_setaddr->write_word(TMS99xx_BUS_WRITE, m_address | 1); LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", m_address | 1, m_current_value & 0xff); m_prgspace->write_byte(m_address | 1, m_current_value & 0xff); m_request_auto_wait_state = m_auto_wait; diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h index 9fd5886d8d3..9fc58630675 100644 --- a/src/devices/cpu/tms9900/tms9995.h +++ b/src/devices/cpu/tms9900/tms9995.h @@ -50,10 +50,8 @@ public: // Callbacks auto extop_cb() { return m_external_operation.bind(); } - auto iaq_cb() { return m_iaq_line.bind(); } auto clkout_cb() { return m_clock_out_line.bind(); } auto holda_cb() { return m_holda_line.bind(); } - auto dbin_cb() { return m_dbin_line.bind(); } // For debugger access uint8_t debug_read_onchip_memory(offs_t addr) { return m_onchip_memory[addr & 0xff]; }; @@ -104,6 +102,9 @@ private: // We use this additional member for the debugger only. uint16_t PC_debug; + // Indicates the instruction acquisition phase + bool m_iaq; + // 256 bytes of onchip memory uint8_t m_onchip_memory[256]; @@ -395,20 +396,11 @@ private: // chip emulations we use a dedicated callback. devcb_write8 m_external_operation; - // Signal to the outside world that we are now getting an instruction (IAQ). - // In the real hardware this line is shared with the HOLDA line, and the - // /MEMEN line is used to decide which signal we have on the line. We do not - // emulate the /MEMEN line, so we have to use two separate lines. - devcb_write_line m_iaq_line; - // Clock output. devcb_write_line m_clock_out_line; // Asserted when the CPU is in a HOLD state devcb_write_line m_holda_line; - - // DBIN line. When asserted (high), the CPU has disabled the data bus output buffers. - devcb_write_line m_dbin_line; }; diff --git a/src/devices/cpu/tms9900/tms99com.h b/src/devices/cpu/tms9900/tms99com.h index ac1a14cf9cc..6495ada9133 100644 --- a/src/devices/cpu/tms9900/tms99com.h +++ b/src/devices/cpu/tms9900/tms99com.h @@ -64,4 +64,15 @@ enum LREX_OP = 7 }; +/* + We are using setaddress this way: The address is the object to be + written; as address we use the values of the DBIN and IAQ lines. That + means we do not need separate dbin and iaq setting methods. +*/ +enum +{ + TMS99xx_BUS_WRITE = 0, + TMS99xx_BUS_DBIN = 1, + TMS99xx_BUS_IAQ = 2 +}; #endif /* __TMS99COMMON_H__ */ diff --git a/src/mame/drivers/geneve.cpp b/src/mame/drivers/geneve.cpp index 4de8d23728e..84f3f28e12b 100644 --- a/src/mame/drivers/geneve.cpp +++ b/src/mame/drivers/geneve.cpp @@ -242,7 +242,6 @@ private: DECLARE_WRITE_LINE_MEMBER(video_wait_states); DECLARE_WRITE_LINE_MEMBER(clock_out); - DECLARE_WRITE_LINE_MEMBER(dbin_line); void external_operation(offs_t offset, uint8_t data); @@ -648,14 +647,6 @@ WRITE_LINE_MEMBER( geneve_state::clock_out ) m_mapper->clock_in(state); } -/* - DBIN line from the CPU. Used to control wait state generation. -*/ -WRITE_LINE_MEMBER( geneve_state::dbin_line ) -{ - m_mapper->dbin_in(state); -} - void geneve_state::init_geneve() { } @@ -732,7 +723,6 @@ void geneve_state::geneve_common(machine_config &config) m_cpu->set_addrmap(tms9995_device::AS_SETADDRESS, &geneve_state::memmap_setaddress); m_cpu->extop_cb().set(FUNC(geneve_state::external_operation)); m_cpu->clkout_cb().set(FUNC(geneve_state::clock_out)); - m_cpu->dbin_cb().set(FUNC(geneve_state::dbin_line)); // Video hardware v99x8_device& video(V9938(config, TI_VDP_TAG, XTAL(21'477'272))); // typical 9938 clock, not verified diff --git a/src/mame/drivers/ti99_4p.cpp b/src/mame/drivers/ti99_4p.cpp index 1bf0328bdc1..5884054f796 100644 --- a/src/mame/drivers/ti99_4p.cpp +++ b/src/mame/drivers/ti99_4p.cpp @@ -170,11 +170,9 @@ private: void setaddress(offs_t mode, uint16_t address); uint16_t memread(offs_t offset); void memwrite(offs_t offset, uint16_t data); - DECLARE_WRITE_LINE_MEMBER( dbin_in ); void external_operation(offs_t offset, uint8_t data); DECLARE_WRITE_LINE_MEMBER( clock_out ); - DECLARE_WRITE_LINE_MEMBER( dbin_line ); // CRU (Communication Register Unit) handling uint8_t cruread(offs_t offset); @@ -435,6 +433,7 @@ void ti99_4p_state::setaddress(offs_t mode, uint16_t address) { m_addr_buf = address; m_waitcount = 0; + m_dbin = ((mode & TMS99xx_BUS_DBIN)!=0); LOGMASKED(LOG_ADDRESS, "set address %04x\n", m_addr_buf); @@ -613,14 +612,6 @@ void ti99_4p_state::debugger_write(offs_t offset, uint16_t data) m_peribox->memen_in(CLEAR_LINE); } -/* - Data bus in (DBIN) line from the CPU. -*/ -WRITE_LINE_MEMBER( ti99_4p_state::dbin_line ) -{ - m_dbin = (line_state)state; -} - /* The datamux is connected to the clock line in order to operate the wait state counter and to read/write the bytes. @@ -1006,7 +997,6 @@ void ti99_4p_state::ti99_4p_60hz(machine_config& config) m_cpu->extop_cb().set(FUNC(ti99_4p_state::external_operation)); m_cpu->intlevel_cb().set(FUNC(ti99_4p_state::interrupt_level)); m_cpu->clkout_cb().set(FUNC(ti99_4p_state::clock_out)); - m_cpu->dbin_cb().set(FUNC(ti99_4p_state::dbin_line)); // tms9901 TMS9901(config, m_tms9901, 0); diff --git a/src/mame/drivers/ti99_4x.cpp b/src/mame/drivers/ti99_4x.cpp index 60018662737..6a7bf511754 100644 --- a/src/mame/drivers/ti99_4x.cpp +++ b/src/mame/drivers/ti99_4x.cpp @@ -126,7 +126,6 @@ private: void cruwrite(offs_t offset, uint8_t data); void external_operation(offs_t offset, uint8_t data); DECLARE_WRITE_LINE_MEMBER( clock_out ); - DECLARE_WRITE_LINE_MEMBER( dbin_line ); // Connections from outside towards the CPU (callbacks) DECLARE_WRITE_LINE_MEMBER( console_ready_dmux ); @@ -654,14 +653,6 @@ WRITE_LINE_MEMBER( ti99_4x_state::clock_out ) m_ioport->clock_in(state); } -/* - Data bus in (DBIN) line from the CPU. -*/ -WRITE_LINE_MEMBER( ti99_4x_state::dbin_line ) -{ - m_datamux->dbin_in(state); -} - /* GROMCLK from VDP, propagating to datamux */ @@ -851,7 +842,6 @@ void ti99_4x_state::ti99_4_common(machine_config& config) m_cpu->extop_cb().set(FUNC(ti99_4x_state::external_operation)); m_cpu->intlevel_cb().set(FUNC(ti99_4x_state::interrupt_level)); m_cpu->clkout_cb().set(FUNC(ti99_4x_state::clock_out)); - m_cpu->dbin_cb().set(FUNC(ti99_4x_state::dbin_line)); // Programmable system interface (driven by CLKOUT) TMS9901(config, m_tms9901, 0); diff --git a/src/mame/drivers/ti99_8.cpp b/src/mame/drivers/ti99_8.cpp index 61bf0a416ee..ce6cacc6b39 100644 --- a/src/mame/drivers/ti99_8.cpp +++ b/src/mame/drivers/ti99_8.cpp @@ -251,7 +251,6 @@ private: void cruwrite(offs_t offset, uint8_t data); void external_operation(offs_t offset, uint8_t data); DECLARE_WRITE_LINE_MEMBER( clock_out ); - DECLARE_WRITE_LINE_MEMBER( dbin_line ); // Connections from outside towards the CPU (callbacks) DECLARE_WRITE_LINE_MEMBER( console_ready ); @@ -691,14 +690,6 @@ WRITE_LINE_MEMBER( ti99_8_state::clock_out ) m_mainboard->clock_in(state); } -/* - Data bus in (DBIN) line from the CPU. -*/ -WRITE_LINE_MEMBER( ti99_8_state::dbin_line ) -{ - m_mainboard->dbin_in(state); -} - void ti99_8_state::driver_start() { // Need to configure the speech ROM for inverse bit order @@ -740,7 +731,6 @@ void ti99_8_state::ti99_8(machine_config& config) m_cpu->set_addrmap(tms9995_device::AS_SETADDRESS, &ti99_8_state::memmap_setaddress); m_cpu->extop_cb().set(FUNC(ti99_8_state::external_operation)); m_cpu->clkout_cb().set(FUNC(ti99_8_state::clock_out)); - m_cpu->dbin_cb().set(FUNC(ti99_8_state::dbin_line)); m_cpu->holda_cb().set(TI998_MAINBOARD_TAG, FUNC(mainboard8_device::holda_line)); // 9901 configuration -- cgit v1.2.3