From a4ce9d41fa24a635e43d8da7ebf8239c1e455c0c Mon Sep 17 00:00:00 2001 From: jbu Date: Sun, 14 Dec 2014 13:55:11 +0100 Subject: Add preliminary emulation of the Rockwell A17XX chips (ROM, RAM, I/O) and fix device names in gts1 (nw) --- src/emu/cpu/pps4/pps4.c | 4 ++- src/emu/machine/machine.mak | 9 ++++++ src/emu/machine/r10696.c | 7 ----- src/emu/machine/r10696.h | 2 +- src/mame/drivers/gts1.c | 70 +++++++++++++++++++++++++++++++++++++-------- src/mame/mame.mak | 3 +- 6 files changed, 73 insertions(+), 22 deletions(-) diff --git a/src/emu/cpu/pps4/pps4.c b/src/emu/cpu/pps4/pps4.c index 0762aa53562..e3724827f08 100644 --- a/src/emu/cpu/pps4/pps4.c +++ b/src/emu/cpu/pps4/pps4.c @@ -1187,10 +1187,12 @@ void pps4_device::iRTNSK() * inverted are placed on the data lines for acceptance by * the I/O. At the same time, input data received by the I/O * device is transferred to the accumulator inverted. + * + * FIXME: Is BL on the I/D:8-5 lines during the I/O cycle? */ void pps4_device::iIOL() { - UINT8 ac = ~m_A & 15; + UINT8 ac = ((m_B & 15) << 4) | (~m_A & 15); m_I2 = ARG(); m_io->write_byte(m_I2, ac); LOG(("%s: port:%02x <- %x\n", __FUNCTION__, m_I2, ac)); diff --git a/src/emu/machine/machine.mak b/src/emu/machine/machine.mak index 19d0769a0d8..f7c194186dc 100644 --- a/src/emu/machine/machine.mak +++ b/src/emu/machine/machine.mak @@ -1320,6 +1320,15 @@ ifneq ($(filter R10788,$(MACHINES)),) MACHINEOBJS+= $(MACHINEOBJ)/r10788.o endif +#------------------------------------------------- +# +#@src/emu/machine/ra17xx.h,MACHINES += RA17XX +#------------------------------------------------- + +ifneq ($(filter RA17XX,$(MACHINES)),) +MACHINEOBJS+= $(MACHINEOBJ)/ra17xx.o +endif + #------------------------------------------------- # #@src/emu/machine/rf5c296.h,MACHINES += RF5C296 diff --git a/src/emu/machine/r10696.c b/src/emu/machine/r10696.c index ce63931a34c..50191c0ede7 100644 --- a/src/emu/machine/r10696.c +++ b/src/emu/machine/r10696.c @@ -79,13 +79,6 @@ void r10696_device::device_reset() m_io_c = 0; } - -/************************************* - * - * Constants - * - *************************************/ - /************************************* * * Command access handlers diff --git a/src/emu/machine/r10696.h b/src/emu/machine/r10696.h index 9edab948aad..996a7d43365 100644 --- a/src/emu/machine/r10696.h +++ b/src/emu/machine/r10696.h @@ -22,7 +22,7 @@ * *************************************/ -/* Set the writer used to update a display digit */ +/* Set the read and write group (4-bit; nibble) delegates */ #define MCFG_R10696_IO(_devcb_rd,_devcb_wr) \ r10696_device::set_iord(*device, DEVCB_##_devcb_rd); \ r10696_device::set_iowr(*device, DEVCB_##_devcb_wr); diff --git a/src/mame/drivers/gts1.c b/src/mame/drivers/gts1.c index 35ddbd462f2..cc3bf1c6846 100644 --- a/src/mame/drivers/gts1.c +++ b/src/mame/drivers/gts1.c @@ -67,6 +67,7 @@ ToDo: #include "machine/genpin.h" +#include "machine/ra17xx.h" #include "machine/r10696.h" #include "machine/r10788.h" #include "cpu/pps4/pps4.h" @@ -90,13 +91,17 @@ public: DECLARE_DRIVER_INIT(gts1); + DECLARE_READ8_MEMBER (gts1_solenoid_r); + DECLARE_WRITE8_MEMBER(gts1_solenoid_w); + DECLARE_READ8_MEMBER (gts1_switches_r); + DECLARE_WRITE8_MEMBER(gts1_switches_w); DECLARE_WRITE8_MEMBER(gts1_display_w); - DECLARE_READ8_MEMBER (gts1_io_r); - DECLARE_WRITE8_MEMBER(gts1_io_w); DECLARE_READ8_MEMBER (gts1_lamp_apm_r); DECLARE_WRITE8_MEMBER(gts1_lamp_apm_w); DECLARE_READ8_MEMBER (gts1_nvram_r); DECLARE_WRITE8_MEMBER(gts1_nvram_w); + DECLARE_READ8_MEMBER (gts1_io_r); + DECLARE_WRITE8_MEMBER(gts1_io_w); DECLARE_READ8_MEMBER (gts1_pa_r); DECLARE_WRITE8_MEMBER(gts1_pa_w); DECLARE_WRITE8_MEMBER(gts1_pb_w); @@ -118,12 +123,14 @@ static ADDRESS_MAP_START( gts1_data, AS_DATA, 8, gts1_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( gts1_io, AS_IO, 8, gts1_state ) - AM_RANGE(0x0030, 0x003f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U3) solenoid + dips - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U2) NVRAM io chip - AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788", r10788_device, io_r, io_w ) // (U6) display chip - AM_RANGE(0x0000, 0x00ff) AM_READ ( gts1_io_r ) AM_WRITE( gts1_io_w ) // connects to all the other chips - AM_RANGE(0x0100, 0x0100) AM_READ ( gts1_pa_r ) AM_WRITE( gts1_pa_w ) - AM_RANGE(0x0101, 0x0101) AM_WRITE(gts1_pb_w) + AM_RANGE(0x0020, 0x002f) AM_DEVREADWRITE ( "ra17xx_u4", ra17xx_device, io_r, io_w ) // (U4) solenoid + AM_RANGE(0x0030, 0x003f) AM_DEVREADWRITE ( "r10696_u3", r10696_device, io_r, io_w ) // (U3) solenoid + dips + AM_RANGE(0x0040, 0x004f) AM_DEVREADWRITE ( "ra17xx_u5", ra17xx_device, io_r, io_w ) // (U5) switch matrix + AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE ( "r10696_u2", r10696_device, io_r, io_w ) // (U2) NVRAM io chip + AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788_u6", r10788_device, io_r, io_w ) // (U6) display chip + AM_RANGE(0x0000, 0x00ff) AM_READ ( gts1_io_r ) AM_WRITE( gts1_io_w ) // catch undecoded I/O accesss + AM_RANGE(0x0100, 0x0100) AM_READ ( gts1_pa_r ) AM_WRITE( gts1_pa_w ) // CPU I/O port A (input/output) + AM_RANGE(0x0101, 0x0101) AM_WRITE( gts1_pb_w ) // CPU I/O port B (output only) ADDRESS_MAP_END static INPUT_PORTS_START( gts1 ) @@ -217,6 +224,30 @@ DRIVER_INIT_MEMBER(gts1_state,gts1) { } +READ8_MEMBER (gts1_state::gts1_solenoid_r) +{ + UINT8 data = 0; + LOG(("%s: solenoid[%02x] -> %x\n", __FUNCTION__, offset, data)); + return data; +} + +WRITE8_MEMBER(gts1_state::gts1_solenoid_w) +{ + LOG(("%s: solenoid[%02x] <- %x\n", __FUNCTION__, offset, data)); +} + +READ8_MEMBER (gts1_state::gts1_switches_r) +{ + UINT8 data = 0; + LOG(("%s: switches[%02x] -> %x\n", __FUNCTION__, offset, data)); + return data; +} + +WRITE8_MEMBER(gts1_state::gts1_switches_w) +{ + LOG(("%s: switches[%02x] <- %x\n", __FUNCTION__, offset, data)); +} + /** * @brief write a 8seg display value * @param offset digit number 0 .. 19 @@ -482,13 +513,28 @@ static MACHINE_CONFIG_START( gts1, gts1_state ) //MCFG_NVRAM_ADD_0FILL("nvram") - /* General Purpose Input/Output */ - MCFG_DEVICE_ADD( "r10696", R10696, 0 ) + /* A1753CE 2048 x 8 ROM (000-7ff), 128 x 4 RAM (00-7f) and 16 I/O lines (20 ... 2f) */ + MCFG_DEVICE_ADD( "ra17xx_u5", RA17XX, 0 ) + MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_solenoid_r) ) + MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_solenoid_w) ) + + /* A1752CF 2048 x 8 ROM (800-fff), 128 x 4 RAM (80-ff) and 16 I/O lines (40 ... 4f) */ + MCFG_DEVICE_ADD( "ra17xx_u4", RA17XX, 0 ) + MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_switches_r) ) + MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_switches_w) ) + + /* 10696 General Purpose Input/Output */ + MCFG_DEVICE_ADD( "r10696_u2", R10696, 0 ) MCFG_R10696_IO( READ8 (gts1_state,gts1_nvram_r), WRITE8(gts1_state,gts1_nvram_w) ) - /* General Purpose Display and Keyboard */ - MCFG_DEVICE_ADD( "r10788", R10788, XTAL_3_579545MHz / 18 ) // divided in the circuit + /* 10696 General Purpose Input/Output */ + MCFG_DEVICE_ADD( "r10696_u3", R10696, 0 ) + MCFG_R10696_IO( READ8 (gts1_state,gts1_lamp_apm_r), + WRITE8(gts1_state,gts1_lamp_apm_w) ) + + /* 10788 General Purpose Display and Keyboard */ + MCFG_DEVICE_ADD( "r10788_u6", R10788, XTAL_3_579545MHz / 18 ) // divided in the circuit MCFG_R10788_UPDATE( WRITE8(gts1_state,gts1_display_w) ) /* Video */ diff --git a/src/mame/mame.mak b/src/mame/mame.mak index eed730fb979..0ac96975bb1 100644 --- a/src/mame/mame.mak +++ b/src/mame/mame.mak @@ -499,9 +499,10 @@ MACHINES += PCKEYBRD MACHINES += PIC8259 MACHINES += PIT8253 MACHINES += PLA +#MACHINES += PROFILE MACHINES += R10696 MACHINES += R10788 -#MACHINES += PROFILE +MACHINES += RA17XX #MACHINES += R64H156 MACHINES += RF5C296 #MACHINES += RIOT6532 -- cgit v1.2.3