From 93d60e7c6a00e1dbe0d8e78197532c66f0259dcd Mon Sep 17 00:00:00 2001 From: couriersud Date: Tue, 5 Jul 2022 08:23:45 +0200 Subject: netlist: gtrak10 performance and other improvements and fixes (#10032) - added support parameter FORCE_TRISTATE_LOGIC on mk28000 - add system device SYS_PULSE to generate pulse based on input changes parameters are delay, pulse width, input polarity and output polarity - add USE_SPEED_HACKS define to gtrak10 to enable the use of the above Brings gtrak10 from 18% to 120%. - Improved interlaced video support in fixfreq.cpp Added two interlace modes: progressive and interlaced which can be selected in machine configuration. - more clang format work - rename link to connection - introduced typed aliases. This information may be used later to rewrite netlists. - added a three terminal base device This will allow the analog code to be more easily comparable to literature about MNA (Modal node analysis). BJT code is now a lot better readable. - fix doxygen consistency - added an example for a cmos inverter based on NMOS/PMOS fets. - TRUTHTABLE_START was renamed to TRUTH_TABLE - truth tables are now enclosed in braces - netlists are now enclosed in braces - TRUTHTABLE_END() and NETLIST_END() removed from files - Fixed static solver script - Add file path to includes in nltool --- src/devices/machine/netlist.cpp | 6 +- src/devices/video/fixfreq.cpp | 72 +- src/devices/video/fixfreq.h | 7 +- src/lib/netlist/FAQ.md | 1 + src/lib/netlist/analog/nld_bjt.cpp | 363 ++- src/lib/netlist/analog/nld_generic_models.h | 24 +- src/lib/netlist/analog/nld_mosfet.cpp | 45 +- src/lib/netlist/analog/nlid_twoterm.h | 7 + src/lib/netlist/build/.clang-format | 42 +- src/lib/netlist/build/create_devinc.py | 2 +- src/lib/netlist/build/create_modules.py | 3 +- src/lib/netlist/core/analog.h | 12 +- src/lib/netlist/core/setup.h | 35 +- src/lib/netlist/devices/nld_roms.cpp | 4 +- src/lib/netlist/devices/nld_system.cpp | 61 +- src/lib/netlist/documentation/primer_1.dox.h | 3 +- src/lib/netlist/examples/2n6027.cpp | 9 +- src/lib/netlist/examples/7400_astable.c | 3 +- src/lib/netlist/examples/74123_mstable.c | 3 +- src/lib/netlist/examples/74125.cpp | 3 +- src/lib/netlist/examples/7414.cpp | 3 +- src/lib/netlist/examples/9602_mstable.c | 3 +- src/lib/netlist/examples/bjt.c | 3 +- src/lib/netlist/examples/bjt_eb.c | 3 +- src/lib/netlist/examples/bjt_eb_pnp.c | 3 +- src/lib/netlist/examples/cccs.cpp | 3 +- src/lib/netlist/examples/cd4066.c | 3 +- src/lib/netlist/examples/cdelay.c | 6 +- src/lib/netlist/examples/cmos_inverter.cpp | 3 +- src/lib/netlist/examples/cmos_inverter_clk.cpp | 3 +- src/lib/netlist/examples/cmos_inverter_rs.cpp | 136 + src/lib/netlist/examples/congo_bongo.cpp | 18 +- src/lib/netlist/examples/cs.cpp | 3 +- src/lib/netlist/examples/diode.c | 3 +- src/lib/netlist/examples/lm3900_test.cpp | 3 +- src/lib/netlist/examples/lostfound.cpp | 15 +- src/lib/netlist/examples/mm5837_noise.c | 3 +- src/lib/netlist/examples/msx_mixer_stage.c | 3 +- src/lib/netlist/examples/ne555_astable.c | 3 +- src/lib/netlist/examples/ne566.cpp | 3 +- src/lib/netlist/examples/nld_74393_test.c | 3 +- src/lib/netlist/examples/nmos_fet.cpp | 3 +- src/lib/netlist/examples/noise.cpp | 3 +- src/lib/netlist/examples/norton_opamp.c | 9 +- src/lib/netlist/examples/opamp.c | 9 +- .../netlist/examples/opamp_amplification_curve.cpp | 3 +- src/lib/netlist/examples/rc.c | 3 +- src/lib/netlist/examples/rl.c | 3 +- src/lib/netlist/examples/sn74ls629_osc.c | 3 +- src/lib/netlist/examples/test.c | 3 +- src/lib/netlist/examples/todo.c | 11 +- src/lib/netlist/examples/turkey_shoot.cpp | 9 +- src/lib/netlist/examples/vccs.c | 3 +- src/lib/netlist/examples/vccs1.c | 3 +- src/lib/netlist/examples/vs_cs.c | 3 +- src/lib/netlist/examples/zdiode.cpp | 3 +- src/lib/netlist/generated/lib_entries.hxx | 1 + src/lib/netlist/generated/nld_devinc.h | 7 +- src/lib/netlist/generated/nlm_modules_lib.cpp | 5 +- src/lib/netlist/generated/static_solvers.cpp | 3202 +++++++++++--------- .../netlist/macro/modules/nlmod_icl8038_dip.cpp | 3 +- src/lib/netlist/macro/modules/nlmod_ne556_dip.cpp | 3 +- src/lib/netlist/macro/modules/nlmod_rtest.cpp | 3 +- src/lib/netlist/macro/nlm_base_lib.cpp | 15 +- src/lib/netlist/macro/nlm_cd4xxx_lib.cpp | 131 +- src/lib/netlist/macro/nlm_opamp_lib.cpp | 84 +- src/lib/netlist/macro/nlm_otheric_lib.cpp | 20 +- src/lib/netlist/macro/nlm_roms_lib.cpp | 33 +- src/lib/netlist/macro/nlm_ttl74xx_lib.cpp | 1950 ++++++------ src/lib/netlist/nl_base.cpp | 159 +- src/lib/netlist/nl_create_mame_solvers.sh | 2 +- src/lib/netlist/nl_dice_compat.h | 9 +- src/lib/netlist/nl_factory.h | 6 +- src/lib/netlist/nl_parser.cpp | 79 +- src/lib/netlist/nl_parser.h | 7 +- src/lib/netlist/nl_setup.cpp | 120 +- src/lib/netlist/nl_setup.h | 61 +- src/lib/netlist/nltypes.h | 57 +- src/lib/netlist/prg/nltool.cpp | 5 +- src/lib/netlist/solver/nld_matrix_solver.h | 22 +- src/lib/netlist/tools/nl_convert.cpp | 12 +- src/mame/alliedleisure/aleisttl.cpp | 3 +- src/mame/atari/atarittl.cpp | 3 +- src/mame/atari/nl_breakout.cpp | 3 +- src/mame/atari/nl_destroyr.cpp | 6 +- src/mame/atari/nl_flyball.cpp | 3 +- src/mame/atari/nl_gtrak10.cpp | 29 +- src/mame/atari/nl_pong.cpp | 3 +- src/mame/atari/nl_rebound.cpp | 6 +- src/mame/atari/nl_stuntcyc.cpp | 3 +- src/mame/atari/nl_tank.cpp | 3 +- src/mame/capcom/nl_1942.cpp | 3 +- src/mame/cinematronics/nl_armora.cpp | 3 +- src/mame/cinematronics/nl_barrier.cpp | 3 +- src/mame/cinematronics/nl_boxingb.cpp | 3 +- src/mame/cinematronics/nl_cinemat_common.h | 21 +- src/mame/cinematronics/nl_ripoff.cpp | 3 +- src/mame/cinematronics/nl_solarq.cpp | 3 +- src/mame/cinematronics/nl_spacewar.cpp | 3 +- src/mame/cinematronics/nl_speedfrk.cpp | 3 +- src/mame/cinematronics/nl_starcas.cpp | 4 +- src/mame/cinematronics/nl_starhawk.cpp | 3 +- src/mame/cinematronics/nl_sundance.cpp | 3 +- src/mame/cinematronics/nl_tailg.cpp | 3 +- src/mame/cinematronics/nl_warrior.cpp | 3 +- src/mame/exidy/exidyttl.cpp | 3 +- src/mame/exidy/nl_carpolo.cpp | 6 +- src/mame/exidy/nl_fireone.cpp | 3 +- src/mame/exidy/nl_starfire.cpp | 3 +- src/mame/galaxian/nl_konami.cpp | 18 +- src/mame/irem/nl_kidniki.cpp | 6 +- src/mame/jpm/nl_jpmsru.cpp | 3 +- src/mame/meadows/meadwttl.cpp | 3 +- src/mame/midw8080/nl_280zzzap.cpp | 8 +- src/mame/midw8080/nl_gunfight.cpp | 6 +- src/mame/midway/nl_sspeedr.cpp | 9 +- src/mame/misc/bailey.cpp | 3 +- src/mame/misc/chicago.cpp | 3 +- src/mame/misc/crazybal.cpp | 3 +- src/mame/misc/electra.cpp | 3 +- src/mame/misc/fungames.cpp | 3 +- src/mame/misc/nl_cocoloco.cpp | 3 +- src/mame/misc/pse.cpp | 3 +- src/mame/misc/usbilliards.cpp | 3 +- src/mame/namco/nl_tankbatt.cpp | 3 +- src/mame/nintendo/nl_mario.cpp | 15 +- src/mame/nintendo/nl_popeye.cpp | 6 +- src/mame/ramtek/nl_starcrus.cpp | 3 +- src/mame/ramtek/ramtek.cpp | 3 +- src/mame/sega/monacogp.cpp | 3 +- src/mame/sega/nl_astrob.cpp | 3 +- src/mame/sega/nl_brdrline.cpp | 15 +- src/mame/sega/nl_elim.cpp | 7 +- src/mame/sega/nl_frogs.cpp | 3 +- src/mame/sega/nl_segas16b.cpp | 3 +- src/mame/sega/nl_segaspeech.cpp | 3 +- src/mame/sega/nl_segausb.cpp | 3 +- src/mame/sega/nl_spacfury.cpp | 9 +- src/mame/sega/segattl.cpp | 3 +- src/mame/skeleton/nl_hazelvid.cpp | 3 +- src/mame/skeleton/nl_palestra.cpp | 3 +- src/mame/skeleton/nl_tp1983.cpp | 3 +- src/mame/skeleton/nl_tp1985.cpp | 3 +- src/mame/taito/taitottl.cpp | 3 +- src/mame/universal/nl_cheekyms.cpp | 9 +- src/mame/vtech/nl_gamemachine.cpp | 3 +- src/mame/zaccaria/nl_zac1b11142.cpp | 12 +- 147 files changed, 4228 insertions(+), 3106 deletions(-) create mode 100644 src/lib/netlist/examples/cmos_inverter_rs.cpp diff --git a/src/devices/machine/netlist.cpp b/src/devices/machine/netlist.cpp index af55f7338d0..b5e2ae547c9 100644 --- a/src/devices/machine/netlist.cpp +++ b/src/devices/machine/netlist.cpp @@ -498,7 +498,7 @@ void netlist_mame_analog_output_device::custom_netlist_additions(netlist::nlpars pstring dname = pstring("OUT_") + pin; parser.register_dev(dname, dname); - parser.register_link(dname + ".IN", pin); + parser.register_connection(dname + ".IN", pin); } void netlist_mame_analog_output_device::pre_parse_action(netlist::nlparse_t &parser) @@ -548,7 +548,7 @@ void netlist_mame_logic_output_device::custom_netlist_additions(netlist::nlparse pstring dname = pstring("OUT_") + pin; parser.register_dev(dname, dname); - parser.register_link(dname + ".IN", pin); + parser.register_connection(dname + ".IN", pin); } void netlist_mame_logic_output_device::pre_parse_action(netlist::nlparse_t &parser) @@ -852,7 +852,7 @@ void netlist_mame_stream_output_device::custom_netlist_additions(netlist::nlpars pstring dname = plib::pfmt("STREAM_OUT_{1}")(m_channel); parser.register_dev(dname, dname); - parser.register_link(dname + ".IN", pstring(m_out_name)); + parser.register_connection(dname + ".IN", pstring(m_out_name)); } void netlist_mame_stream_output_device::process(netlist::netlist_time_ext tim, netlist::nl_fptype val) diff --git a/src/devices/video/fixfreq.cpp b/src/devices/video/fixfreq.cpp index 2b6ea328f9a..37fc6d3b44c 100644 --- a/src/devices/video/fixfreq.cpp +++ b/src/devices/video/fixfreq.cpp @@ -45,7 +45,8 @@ DEFINE_DEVICE_TYPE(FIXFREQ, fixedfreq_device, "fixfreq", "Fixed-Frequency Monoch #define PORT_ADJUSTERX(_id, _name, _min, _max) \ PORT_START(# _id) \ configurer.field_alloc(IPT_ADJUSTER, (static_cast(owner).monitor_val(_id)), 0xffff, ("Monitor - " _name)); \ - PORT_MINMAX(_min, _max) PORT_CHANGED_MEMBER(DEVICE_SELF, fixedfreq_device, port_changed, _id) \ + PORT_MINMAX(_min, _max) \ + PORT_CHANGED_MEMBER(DEVICE_SELF, fixedfreq_device, port_changed, _id) \ PORT_CONDITION("ENABLE", 0x01, EQUALS, 0x01) #define IOPORT_ID(_id) ioport(# _id) @@ -91,12 +92,12 @@ void fixedfreq_monitor_state::update_sync_channel(const time_type &time, const d m_sig_field = avg_line_dur * 0.75 > m_last_line_duration; LOG("%d %f %f %f\n", m_sig_field, m_last_line_duration, avg_line_dur, time); } - if (!has_fields || (m_sig_field == 0)) - { - m_intf.vsync_end_cb(time - m_last_vsync_time); - m_last_vsync_time = time; - } - m_last_y = 0; //m_desc.vbackporch_width(); + + // notify the controlling device about the vsync and the field. + m_intf.vsync_end_cb(time - m_last_vsync_time, m_sig_field); + m_last_vsync_time = time; + + m_last_y = 0; } else if (last_vsync && !m_sig_vsync) { @@ -145,8 +146,9 @@ void fixedfreq_monitor_state::update_bm(const time_type &time) if (!m_sig_vsync && !m_sig_composite) { + //uint32_t mask = m_sig_field ? 0xffffffff : 0xffff0000; m_fragments.push_back({static_cast(m_last_y + m_sig_field * has_fields), - m_last_x * fhscale, pixels * fhscale, m_col}); + m_last_x * fhscale, pixels * fhscale, m_col}); // & mask}); } //m_intf.plot_hline(m_last_x, m_last_y + m_sig_field * has_fields, pixels, col); m_last_x = pixels; @@ -219,6 +221,7 @@ fixedfreq_device::fixedfreq_device(const machine_config &mconfig, device_type ty m_enable(*this, "ENABLE"), m_vector(*this, "VECTOR"), m_scanline_height(1.0), + m_last_rt(0.0), m_monitor(), m_state(m_monitor, *this) { @@ -233,6 +236,19 @@ void fixedfreq_device::device_config_complete() { if (!has_screen()) return; + // Video signal processing will be moved into netlist to avoid + // aborting cpu slices. When this is done, the monitor specifications + // need to move to the netlist as well. + // + // At the time of device_config_complete the monitor specification will + // not be known - the netlist is parsed during device_start. + // In this case we have to use some temporary fixed values, e.g. + // screen().set_raw(7158196, 454, 0, 454, 262, 0, 262); + // This will be overwritten during the first vblank anyhow. + // + // However the width and height determine the width of the mame window. + // It is therefore recommended to use `set_raw` in the mame driver + // to specify the window size. if (!screen().refresh_attoseconds()) screen().set_raw(m_monitor.m_monitor_clock, m_monitor.htotal(), 0, m_monitor.htotal(), m_monitor.vtotal(), 0, @@ -244,6 +260,8 @@ void fixedfreq_device::device_config_complete() void fixedfreq_device::device_start() { + LOG("start\n"); + m_state.start(); // FIXME: will be done by netlist going forward @@ -259,11 +277,11 @@ void fixedfreq_device::device_start() /* sync separator */ save_item(NAME(m_state.m_vsync_filter)); - save_item(NAME(m_state.m_sig_vsync)); save_item(NAME(m_state.m_sig_composite)); save_item(NAME(m_state.m_sig_field)); - LOG("start\n"); + + save_item(NAME(m_last_rt)); } void fixedfreq_device::device_reset() @@ -337,7 +355,8 @@ static void draw_testpat(screen_device &screen, bitmap_rgb32 &bitmap, const rect uint32_t fixedfreq_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - //printf("%f %f\n", m_state.m_fragments[0].y, m_state.m_fragments[m_state.m_fragments.size()-1].y); + //printf("%f\n", machine().time().as_double()); + //printf("%d %lu %f %f\n", m_state.m_sig_vsync, m_state.m_fragments.size(), m_state.m_fragments[0].y, m_state.m_fragments[m_state.m_fragments.size()-1].y); bool force_vector = screen.screen_type() == SCREEN_TYPE_VECTOR || (m_vector->read() & 1); bool debug_timing = (m_enable->read() & 2) == 2; bool test_pat = (m_enable->read() & 4) == 4; @@ -411,17 +430,33 @@ uint32_t fixedfreq_device::screen_update(screen_device &screen, bitmap_rgb32 &bi return 0; } -void fixedfreq_device::vsync_end_cb(double refresh_time) +void fixedfreq_device::vsync_end_cb(double refresh_time, uint32_t field) { const auto expected_frame_period(m_monitor.clock_period() * m_monitor.vtotal() * m_monitor.htotal()); + bool progressive = (m_enable->read() & 8) == 8; + + double mult = 0.5; + + if (!progressive && (m_monitor.m_fieldcount == 2)) + { + if (field == 0) + { + m_last_rt = refresh_time; + return; + } + else + mult = 1.0; + } const auto refresh_limited(std::min(4.0 * expected_frame_period, - std::max(refresh_time, 0.25 * expected_frame_period))); + std::max((refresh_time + m_last_rt) * mult, 0.25 * expected_frame_period))); + m_last_rt = refresh_time; rectangle visarea(m_monitor.minh(), m_monitor.maxh(), m_monitor.minv(), m_monitor.maxv()); - screen().configure(m_monitor.htotal_scaled(), m_monitor.vtotal(), visarea, DOUBLE_TO_ATTOSECONDS(refresh_limited)); + // reset_origin must be called first. screen().reset_origin(m_state.m_last_y-(m_monitor.vsync_width() + m_monitor.vbackporch_width()), 0); + screen().configure(m_monitor.htotal_scaled(), m_monitor.vtotal(), visarea, DOUBLE_TO_ATTOSECONDS(refresh_limited)); } NETDEV_ANALOG_CALLBACK_MEMBER(fixedfreq_device::update_composite_monochrome) @@ -478,6 +513,10 @@ static INPUT_PORTS_START(fixedfreq_base_ports) PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) PORT_CONFSETTING( 0x04, DEF_STR( On ) ) + PORT_CONFNAME( 0x08, 0x00, "Interlace mode" ) PORT_CONDITION("VECTOR", 0x01, EQUALS, 0x00) + PORT_CONFSETTING( 0x00, "Interlaced" ) + PORT_CONFSETTING( 0x08, "Progressive" ) + PORT_ADJUSTERX(HVISIBLE, "H Visible", 10, 1000) PORT_ADJUSTERX(HFRONTPORCH, "H Front porch width", 1, 100) PORT_ADJUSTERX(HSYNC, "H Sync width", 1, 100) @@ -489,7 +528,6 @@ static INPUT_PORTS_START(fixedfreq_base_ports) PORT_ADJUSTERX(SYNCTHRESHOLD, "Sync threshold mV", 10, 2000) PORT_ADJUSTERX(VSYNCTHRESHOLD, "V Sync threshold mV", 10, 1000) PORT_ADJUSTERX(GAIN, "Signal Gain", 10, 1000) - PORT_ADJUSTERX(SCANLINE_HEIGHT, "Scanline Height", 10, 300) INPUT_PORTS_END @@ -501,10 +539,14 @@ static INPUT_PORTS_START(fixedfreq_raster_ports) PORT_INCLUDE(fixedfreq_base_ports) + PORT_ADJUSTERX(SCANLINE_HEIGHT, "Scanline Height", 10, 300) + INPUT_PORTS_END static INPUT_PORTS_START(fixedfreq_vector_ports) PORT_INCLUDE(fixedfreq_base_ports) + + PORT_ADJUSTERX(SCANLINE_HEIGHT, "Scanline Height", 10, 300) INPUT_PORTS_END ioport_constructor fixedfreq_device::device_input_ports() const diff --git a/src/devices/video/fixfreq.h b/src/devices/video/fixfreq.h index bb2fdde34a9..22b84d12779 100644 --- a/src/devices/video/fixfreq.h +++ b/src/devices/video/fixfreq.h @@ -105,7 +105,7 @@ private: struct fixedfreq_monitor_intf { virtual ~fixedfreq_monitor_intf() = default; - virtual void vsync_end_cb(double refresh_time) = 0; + virtual void vsync_end_cb(double refresh_time, uint32_t field) = 0; }; struct fixedfreq_monitor_line @@ -174,7 +174,7 @@ struct fixedfreq_monitor_state m_fragments.clear(); - m_intf.vsync_end_cb(m_desc.clock_period() * m_desc.vtotal() * m_desc.htotal()); + //m_intf.vsync_end_cb(m_desc.clock_period() * m_desc.vtotal() * m_desc.htotal(), 0); } void reset() @@ -304,12 +304,13 @@ protected: virtual ioport_constructor device_input_ports() const override; - void vsync_end_cb(double refresh_time) override; + void vsync_end_cb(double refresh_time, uint32_t field) override; private: required_ioport m_enable; required_ioport m_vector; float m_scanline_height; + double m_last_rt; /* adjustable by drivers */ fixedfreq_monitor_desc m_monitor; diff --git a/src/lib/netlist/FAQ.md b/src/lib/netlist/FAQ.md index 44bcf7c924b..b8a7dc8b5eb 100644 --- a/src/lib/netlist/FAQ.md +++ b/src/lib/netlist/FAQ.md @@ -145,6 +145,7 @@ An example entry is given here: //- http://pdf.datasheetcatalog.com/datasheets/400/335051_DS.pdf //- static NETLIST_START(SN74LS629_DIP) +{ If you add an example in the examples folder this will be included in the documentation as well. diff --git a/src/lib/netlist/analog/nld_bjt.cpp b/src/lib/netlist/analog/nld_bjt.cpp index eadb725c5c1..cae3c9649b0 100644 --- a/src/lib/netlist/analog/nld_bjt.cpp +++ b/src/lib/netlist/analog/nld_bjt.cpp @@ -1,18 +1,17 @@ // license:BSD-3-Clause // copyright-holders:Couriersud -#include "solver/nld_solver.h" #include "nl_base.h" #include "nlid_twoterm.h" +#include "solver/nld_solver.h" + // Names // spell-checker: words Ebers, Moll // FIXME: Remove QBJT_switch - no more use -namespace netlist -{ -namespace analog +namespace netlist::analog { class diode { @@ -21,7 +20,8 @@ namespace analog : m_Is(nlconst::np_Is()) , m_VT(nlconst::np_VT()) , m_VT_inv(plib::reciprocal(m_VT)) - {} + { + } diode(nl_fptype Is, nl_fptype n) : m_Is(Is) @@ -35,10 +35,22 @@ namespace analog m_VT = nlconst::np_VT(n); m_VT_inv = plib::reciprocal(m_VT); } - nl_fptype I(nl_fptype V) const noexcept { return m_Is * plib::exp(V * m_VT_inv) - m_Is; } - nl_fptype g(nl_fptype V) const noexcept { return m_Is * m_VT_inv * plib::exp(V * m_VT_inv); } - nl_fptype V(nl_fptype I) const noexcept { return plib::log1p(I / m_Is) * m_VT; } // log1p(x)=log(1.0 + x) - nl_fptype gI(nl_fptype I) const noexcept { return m_VT_inv * (I + m_Is); } + nl_fptype I(nl_fptype V) const noexcept + { + return m_Is * plib::exp(V * m_VT_inv) - m_Is; + } + nl_fptype g(nl_fptype V) const noexcept + { + return m_Is * m_VT_inv * plib::exp(V * m_VT_inv); + } + nl_fptype V(nl_fptype I) const noexcept + { + return plib::log1p(I / m_Is) * m_VT; + } // log1p(x)=log(1.0 + x) + nl_fptype gI(nl_fptype I) const noexcept + { + return m_VT_inv * (I + m_Is); + } private: nl_fptype m_Is; @@ -50,20 +62,21 @@ namespace analog // nld_Q - Base classes // ----------------------------------------------------------------------------- - enum class bjt_type { + enum class bjt_type + { BJT_NPN, BJT_PNP }; - /// \brief Class representing the bjt model parameters. + /// \brief Class representing the bjt model parameters /// - /// This is the model representation of the bjt model. Typically, SPICE uses - /// the following parameters. A "Y" in the first column indicates that the - /// parameter is actually used in netlist. + /// This is the model representation of the bjt model. Typically, SPICE + /// uses the following parameters. A "Y" in the first column indicates that + /// the parameter is actually used in netlist. /// - /// | NL? | name | parameter | units | default | example | area | - /// |:---:|------|-----------------------------------------------------------------------|-------|---------:|----------------:|:----:| - /// | Y | IS | transport saturation current | A | 1E-016 | 1E-015 | * | + /// | NL? | name | parameter | units | default | example | area | xxx + /// |:---:|------|-----------------------------------------------------------------------|-------|---------:|----------------:|:----:| xxx + /// | Y | IS | transport saturation current | A | 1E-016 | 1E-015 | * | xxx /// | Y | BF | ideal maximum forward beta | - | 100 | 100 | | /// | Y | NF | forward current emission coefficient | - | 1 | 1 | | /// | | VAF | forward Early voltage | V | infinite | 200 | | @@ -105,21 +118,24 @@ namespace analog /// | | FC | coefficient for forward-bias depletion capacitance formula | - | 0.5 | | | /// | | TNOM | Parameter measurement temperature | C | 27 | 50 | | /// + class bjt_model_t { public: bjt_model_t(param_model_t &model) - : m_type((model.type() == "NPN") ? bjt_type::BJT_NPN : bjt_type::BJT_PNP) - , m_IS (model, "IS") - , m_BF (model, "BF") - , m_NF (model, "NF") - , m_BR (model, "BR") - , m_NR (model, "NR") + : m_type((model.type() == "NPN") ? bjt_type::BJT_NPN + : bjt_type::BJT_PNP) + , m_IS(model, "IS") + , m_BF(model, "BF") + , m_NF(model, "NF") + , m_BR(model, "BR") + , m_NR(model, "NR") , m_CJE(model, "CJE") , m_CJC(model, "CJC") - {} + { + } - bjt_type m_type; + bjt_type m_type; param_model_t::value_t m_IS; //!< transport saturation current param_model_t::value_t m_BF; //!< ideal maximum forward beta param_model_t::value_t m_NF; //!< forward current emission coefficient @@ -127,14 +143,12 @@ namespace analog param_model_t::value_t m_NR; //!< reverse current emission coefficient param_model_t::value_t m_CJE; //!< B-E zero-bias depletion capacitance param_model_t::value_t m_CJC; //!< B-C zero-bias depletion capacitance - }; // ----------------------------------------------------------------------------- // nld_QBJT_switch // ----------------------------------------------------------------------------- - // // + - C // B ----VVV----+ | @@ -150,7 +164,7 @@ namespace analog class nld_QBJT_switch : public base_device_t { - public: \ + public: nld_QBJT_switch(constructor_param_t data) : base_device_t(data) , m_model(*this, "MODEL", "NPN") @@ -188,48 +202,182 @@ namespace analog NETLIB_UPDATE_TERMINALSI(); private: - param_model_t m_model; - bjt_model_t m_bjt_model; + param_model_t m_model; + bjt_model_t m_bjt_model; NETLIB_NAME(two_terminal) m_RB; NETLIB_NAME(two_terminal) m_RC; NETLIB_NAME(two_terminal) m_BC; - nl_fptype m_gB; // base conductance / switch on - nl_fptype m_gC; // collector conductance / switch on - nl_fptype m_V; // internal voltage source + nl_fptype m_gB; // base conductance / switch on + nl_fptype m_gC; // collector conductance / switch on + nl_fptype m_V; // internal voltage source state_var m_state_on; + }; + + // ----------------------------------------------------------------------------- + // nld_three_terminal + // ----------------------------------------------------------------------------- + // + // PIN1 C + // P1_P2 | + // +----N 3T P----+ + // | | + // | N + // Pin2 --+ 3T P0_P1 + // B | P + // | | + // +----N 3T P----+ + // P0_P2 | + // Pin0 E + // + + struct mna2 + { + using row = std::array; + std::array arr; }; + struct mna3 + { + using row = std::array; + std::array arr; + const row &operator[](std::size_t i) const { return arr[i]; } + }; + + class nld_three_terminal : public base_device_t + { + public: + nld_three_terminal(constructor_param_t data, + std::array pins) + : base_device_t(data) + , m_P0_P2(*this, "m_P1_P3", NETLIB_DELEGATE(terminal_handler)) + , m_P1_P2(*this, "m_P2_P3", NETLIB_DELEGATE(terminal_handler)) + , m_P0_P1(*this, "m_P1_P2", NETLIB_DELEGATE(terminal_handler)) + { + register_sub_alias(pins[0], m_P0_P2.P()); // Emitter - row 1 + register_sub_alias(pins[1], m_P1_P2.P()); // Collector- row 2 + register_sub_alias(pins[2], m_P0_P2.N()); // Base -row 3 + + connect(m_P0_P2.P(), m_P0_P1.P()); + connect(m_P0_P2.N(), m_P1_P2.N()); + connect(m_P1_P2.P(), m_P0_P1.N()); + } + + NETLIB_RESETI() + { + if (m_P0_P2.solver() == nullptr && m_P1_P2.solver() == nullptr) + throw nl_exception(MF_DEVICE_FRY_1(this->name())); + } + + NETLIB_HANDLERI(terminal_handler) + { + auto *solver(m_P0_P2.solver()); + if (solver != nullptr) + solver->solve_now(); + else + m_P1_P2.solver()->solve_now(); + } + + template + nl_fptype delta_V() const noexcept + { + static_assert(PIN1 >= 0 && PIN2 >= 0 && PIN1 <= 2 && PIN2 <= 2, + "out of bounds pin number"); + static constexpr const int sel = PIN1 * 10 + PIN2; + if constexpr (sel == 0) + return 0.0; + else if constexpr (sel == 1) // P0 P1 + return m_P0_P1.deltaV(); + else if constexpr (sel == 2) // P0 P2 + return m_P0_P2.deltaV(); + else if constexpr (sel == 10) // P1 P0 + return -m_P0_P1.deltaV(); + else if constexpr (sel == 11) // P1 P1 + return 0.0; + else if constexpr (sel == 12) // P1 P2 + return m_P1_P2.deltaV(); + else if constexpr (sel == 20) // P2 P0 + return -m_P0_P2.deltaV(); + else if constexpr (sel == 21) // P2 P1 + return -m_P1_P2.deltaV(); + else if constexpr (sel == 22) // P2 P2 + return 0.0; + } + + void set_mat_ex(double xee, double xec, double xeb, double xIe, + double xce, double xcc, double xcb, double xIc, + double xbe, double xbc, double xbb, double xIb) + { + using row2 = std::array; + // rows 0 and 2 + m_P0_P2.set_mat({ + row2{xee, xeb, xIe}, + row2{xbe, xbb, xIb} + }); + // rows 1 and 2 + m_P1_P2.set_mat({ + row2{xcc, xcb, xIc}, + row2{xbc, 0, 0 } + }); + // rows 0 and 1 + m_P0_P1.set_mat({ + row2{0, xec, 0}, + row2{xce, 0, 0} + }); + } + + void set_mat_ex(const mna3 &m) + { + using row2 = std::array; + // rows 0 and 2 + m_P0_P2.set_mat({ + row2{m[0][0], m[0][2], m[0][3]}, + row2{m[2][0], m[2][2], m[2][3]} + }); + // rows 1 and 2 + m_P1_P2.set_mat({ + row2{m[1][1], m[1][2], m[1][3]}, + row2{m[2][1], 0, 0 } + }); + // rows 0 and 1 + m_P0_P1.set_mat({ + row2{0, m[0][1], 0}, + row2{m[1][0], 0, 0} + }); + } + + private: + nld_two_terminal m_P0_P2; // gee, gec - gee, gce - gee, gee - gec | Ie + nld_two_terminal m_P1_P2; // gcc, gce - gcc, gec - gcc, gcc - gce | Ic + nld_two_terminal m_P0_P1; // 0, -gec, -gcc, 0 | 0 + }; + +#define USE_THREE (1) + // ----------------------------------------------------------------------------- // nld_QBJT_EB // ----------------------------------------------------------------------------- - - class nld_QBJT_EB : public base_device_t + class nld_QBJT_EB : public nld_three_terminal { - public: \ + enum pins + { + E = 0, + C = 1, + B = 2 + }; + + public: nld_QBJT_EB(constructor_param_t data) - : base_device_t(data) + : nld_three_terminal(data, {"E", "C", "B"}) , m_model(*this, "MODEL", "NPN") , m_bjt_model(m_model) , m_gD_BC(*this, "m_D_BC") , m_gD_BE(*this, "m_D_BE") - , m_D_CB(*this, "m_D_CB", NETLIB_DELEGATE(terminal_handler)) - , m_D_EB(*this, "m_D_EB", NETLIB_DELEGATE(terminal_handler)) - , m_D_EC(*this, "m_D_EC", NETLIB_DELEGATE(terminal_handler)) , m_alpha_f(0) , m_alpha_r(0) { - register_sub_alias("E", m_D_EB.P()); // Cathode - register_sub_alias("B", m_D_EB.N()); // Anode - - register_sub_alias("C", m_D_CB.P()); // Cathode - - connect(m_D_EB.P(), m_D_EC.P()); - connect(m_D_EB.N(), m_D_CB.N()); - connect(m_D_CB.P(), m_D_EC.N()); - if (m_bjt_model.m_CJE > nlconst::zero()) { create_and_register_sub_device(*this, "m_CJE", m_CJE); @@ -242,20 +390,10 @@ namespace analog connect("B", "m_CJC.1"); connect("C", "m_CJC.2"); } - } protected: - NETLIB_RESETI(); - NETLIB_HANDLERI(terminal_handler) - { - auto *solver(m_D_EB.solver()); - if (solver != nullptr) - solver->solve_now(); - else - m_D_CB.solver()->solve_now(); - } NETLIB_IS_DYNAMIC(true) @@ -263,28 +401,21 @@ namespace analog NETLIB_UPDATE_TERMINALSI(); private: - param_model_t m_model; - bjt_model_t m_bjt_model; + param_model_t m_model; + bjt_model_t m_bjt_model; generic_diode m_gD_BC; generic_diode m_gD_BE; - - NETLIB_NAME(two_terminal) m_D_CB; // gcc, gce - gcc, gec - gcc, gcc - gce | Ic - NETLIB_NAME(two_terminal) m_D_EB; // gee, gec - gee, gce - gee, gee - gec | Ie - NETLIB_NAME(two_terminal) m_D_EC; // 0, -gec, -gcc, 0 | 0 - - nl_fptype m_alpha_f; - nl_fptype m_alpha_r; + nl_fptype m_alpha_f; + nl_fptype m_alpha_r; NETLIB_SUB_UPTR(analog, C) m_CJE; NETLIB_SUB_UPTR(analog, C) m_CJC; }; - // ---------------------------------------------------------------------------------------- // nld_QBJT_switch // ---------------------------------------------------------------------------------------- - NETLIB_RESET(QBJT_switch) { if (m_RB.solver() == nullptr && m_RC.solver() == nullptr) @@ -298,7 +429,6 @@ namespace analog m_RC.set_G_V_I(exec().gmin(), zero, zero); m_BC.set_G_V_I(exec().gmin() / nlconst::magic(10.0), zero, zero); - } NETLIB_UPDATE_PARAM(QBJT_switch) @@ -306,10 +436,10 @@ namespace analog nl_fptype IS = m_bjt_model.m_IS; nl_fptype BF = m_bjt_model.m_BF; nl_fptype NF = m_bjt_model.m_NF; - //nl_fptype VJE = m_bjt_model.dValue("VJE", 0.75); + // nl_fptype VJE = m_bjt_model.dValue("VJE", 0.75); nl_fptype alpha = BF / (nlconst::one() + BF); - +#if 0 diode d(IS, NF); // Assume 5mA Collector current for switch operation @@ -320,42 +450,65 @@ namespace analog // Base current is 0.005 / beta // as a rough estimate, we just scale the conductance down - m_gB = plib::reciprocal((m_V/(cc / BF))); + m_gB = plib::reciprocal((m_V / (cc / BF))); - //m_gB = d.gI(0.005 / alpha); + // m_gB = d.gI(0.005 / alpha); if (m_gB < exec().gmin()) m_gB = exec().gmin(); - m_gC = d.gI(cc); // very rough estimate + m_gC = d.gI(cc); // very rough estimate +#else + // diode d(IS, NF); + + // Assume 5mA Collector current for switch operation + + const auto cc(nlconst::magic(0.005)); + // Get voltage across diode + // m_V = d.V(cc / alpha); + m_V = plib::log1p((cc / alpha) / IS) * nlconst::np_VT(NF); + + // Base current is 0.005 / beta + // as a rough estimate, we just scale the conductance down + + m_gB = plib::reciprocal((m_V / (cc / BF))); + + // m_gB = d.gI(0.005 / alpha); + + if (m_gB < exec().gmin()) + m_gB = exec().gmin(); + + // m_gC = d.gI(cc); // very rough estimate + m_gC = plib::reciprocal(nlconst::np_VT(NF)) * (cc + IS); +#endif } NETLIB_UPDATE_TERMINALS(QBJT_switch) { - const nl_fptype m = (m_bjt_model.m_type == bjt_type::BJT_NPN) ? nlconst::one() : -nlconst::one(); + const nl_fptype m = (m_bjt_model.m_type == bjt_type::BJT_NPN) + ? nlconst::one() + : -nlconst::one(); - const unsigned new_state = (m_RB.deltaV() * m > m_V ) ? 1 : 0; + const unsigned new_state = (m_RB.deltaV() * m > m_V) ? 1 : 0; if (m_state_on ^ new_state) { - const auto zero(nlconst::zero()); + const auto zero(nlconst::zero()); const nl_fptype gb = new_state ? m_gB : exec().gmin(); const nl_fptype gc = new_state ? m_gC : exec().gmin(); - const nl_fptype v = new_state ? m_V * m : zero; + const nl_fptype v = new_state ? m_V * m : zero; - m_RB.set_G_V_I(gb, v, zero); + m_RB.set_G_V_I(gb, v, zero); m_RC.set_G_V_I(gc, zero, zero); m_state_on = new_state; } } - // ---------------------------------------------------------------------------------------- // nld_Q - Ebers Moll // ---------------------------------------------------------------------------------------- NETLIB_RESET(QBJT_EB) { - if (m_D_EB.solver() == nullptr && m_D_CB.solver() == nullptr) - throw nl_exception(MF_DEVICE_FRY_1(this->name())); + nld_three_terminal::reset(); if (m_CJE) { @@ -371,28 +524,31 @@ namespace analog NETLIB_UPDATE_TERMINALS(QBJT_EB) { - const nl_fptype polarity(m_bjt_model.m_type == bjt_type::BJT_NPN ? nlconst::one() : -nlconst::one()); + const nl_fptype polarity(m_bjt_model.m_type == bjt_type::BJT_NPN + ? nlconst::one() + : -nlconst::one()); - m_gD_BE.update_diode(-m_D_EB.deltaV() * polarity); - m_gD_BC.update_diode(-m_D_CB.deltaV() * polarity); + m_gD_BE.update_diode(delta_V() * polarity); + m_gD_BC.update_diode(delta_V() * polarity); const nl_fptype gee = m_gD_BE.G(); const nl_fptype gcc = m_gD_BC.G(); - const nl_fptype gec = m_alpha_r * gcc; - const nl_fptype gce = m_alpha_f * gee; + const nl_fptype gec = m_alpha_r * gcc; + const nl_fptype gce = m_alpha_f * gee; const nl_fptype sIe = -m_gD_BE.I() + m_alpha_r * m_gD_BC.I(); const nl_fptype sIc = m_alpha_f * m_gD_BE.I() - m_gD_BC.I(); - const nl_fptype Ie = (sIe + gee * m_gD_BE.Vd() - gec * m_gD_BC.Vd()) * polarity; - const nl_fptype Ic = (sIc - gce * m_gD_BE.Vd() + gcc * m_gD_BC.Vd()) * polarity; + const nl_fptype Ie = (sIe + gee * m_gD_BE.Vd() - gec * m_gD_BC.Vd()) + * polarity; + const nl_fptype Ic = (sIc - gce * m_gD_BE.Vd() + gcc * m_gD_BC.Vd()) + * polarity; // "Circuit Design", page 174 - - m_D_EB.set_mat( gee, gec - gee, -Ie, - gce - gee, gee - gec, Ie); - m_D_CB.set_mat( gcc, gce - gcc, -Ic, - gec - gcc, gcc - gce, Ic); - m_D_EC.set_mat( 0, -gec, 0, - -gce, 0, 0); + using r = mna3::row; + set_mat_ex(mna3{ + r{gee, -gec, gec - gee, -Ie }, + r{-gce, gcc, gce - gcc, -Ic }, + r{gce - gee, gec - gcc, gcc + gee - gce - gec, Ie + Ic} + }); } NETLIB_UPDATE_PARAM(QBJT_EB) @@ -402,7 +558,7 @@ namespace analog nl_fptype NF = m_bjt_model.m_NF; nl_fptype BR = m_bjt_model.m_BR; nl_fptype NR = m_bjt_model.m_NR; - //nl_fptype VJE = m_m_bjt_model.dValue("VJE", 0.75); + // nl_fptype VJE = m_m_bjt_model.dValue("VJE", 0.75); m_alpha_f = BF / (nlconst::one() + BF); m_alpha_r = BR / (nlconst::one() + BR); @@ -411,11 +567,10 @@ namespace analog m_gD_BC.set_param(IS / m_alpha_r, NR, exec().gmin(), nlconst::T0()); } -} // namespace analog +} // namespace netlist::analog -namespace devices { +namespace netlist::devices +{ NETLIB_DEVICE_IMPL_NS(analog, QBJT_EB, "QBJT_EB", "MODEL") NETLIB_DEVICE_IMPL_NS(analog, QBJT_switch, "QBJT_SW", "MODEL") -} // namespace devices - -} // namespace netlist +} // namespace netlist::devices diff --git a/src/lib/netlist/analog/nld_generic_models.h b/src/lib/netlist/analog/nld_generic_models.h index b68b0fb5cee..d8df599a511 100644 --- a/src/lib/netlist/analog/nld_generic_models.h +++ b/src/lib/netlist/analog/nld_generic_models.h @@ -216,10 +216,10 @@ namespace netlist::analog class generic_diode { public: - generic_diode(core_device_t &dev, const pstring &name) - : m_Vd(dev, name + ".m_Vd", nlconst::diode_start_voltage()) - , m_Id(dev, name + ".m_Id", nlconst::zero()) - , m_G(dev, name + ".m_G", nlconst::cgminalt()) + generic_diode() + : m_Vd(nlconst::diode_start_voltage()) + , m_Id(nlconst::zero()) + , m_G(nlconst::cgminalt()) , m_Vt(nlconst::zero()) , m_Vmin(nlconst::zero()) // not used in MOS model , m_Is(nlconst::zero()) @@ -234,6 +234,14 @@ namespace netlist::analog , nlconst::cgminalt() , nlconst::T0()); } + + generic_diode(core_device_t &dev, const pstring &name) + : generic_diode() + { + dev.state().save(dev, m_Vd, dev.name(), name + ".m_Vd"); + dev.state().save(dev, m_Id, dev.name(), name + ".m_Id"); + dev.state().save(dev, m_G, dev.name(), name + ".m_G"); + } // Basic math // // I(V) = f(V) @@ -253,7 +261,7 @@ namespace netlist::analog // if the old voltage is less than zero and new is above // make sure we move enough so that matrix and current // changes. - const nl_fptype old = std::max(nlconst::zero(), m_Vd()); + const nl_fptype old = std::max(nlconst::zero(), m_Vd); const nl_fptype d = std::min(+fp_constants::DIODE_MAXDIFF(), nVd - old); const nl_fptype a = plib::abs(d) * m_VtInv; m_Vd = old + plib::signum(d) * plib::log1p(a) * m_Vt; @@ -351,9 +359,9 @@ namespace netlist::analog // owning object must save those ... private: - state_var m_Vd; - state_var m_Id; - state_var m_G; + nl_fptype m_Vd; + nl_fptype m_Id; + nl_fptype m_G; nl_fptype m_Vt; nl_fptype m_Vmin; diff --git a/src/lib/netlist/analog/nld_mosfet.cpp b/src/lib/netlist/analog/nld_mosfet.cpp index 805c2dd1e4b..8cbd368759f 100644 --- a/src/lib/netlist/analog/nld_mosfet.cpp +++ b/src/lib/netlist/analog/nld_mosfet.cpp @@ -30,17 +30,11 @@ #define BODY_CONNECTED_TO_SOURCE (1) -namespace netlist -{ -namespace analog +namespace netlist::analog { using constants = plib::constants; - // ----------------------------------------------------------------------------- - // nld_FET - Base classes - // ----------------------------------------------------------------------------- - /// \brief Class representing the nmos/pmos model parameters. /// /// This is the model representation of the nmos model. @@ -53,7 +47,7 @@ namespace analog /// Typically, SPICE uses the following parameters. A "Y" in the first /// column indicates that the parameter is actually used in netlist. /// - /// | NL? |Name | Description|Units |Default |Example | + /// |NL? |Name | Description|Units |Default |Example | /// |:---:|------|-----------------------------------------------------------------------|-------|---------:|----------------:| /// | Y |Vto | Zero-bias threshold voltage | V | 0 | 1 | /// | Y |Kp | Transconductance parameter | A/V² | 0.00002 | 0.00003 | @@ -576,16 +570,43 @@ namespace analog // S D m_SD.set_mat( zero, gSD + gBD, zero, // S gDS + gDB, zero, zero ); // D + + /// | + /// | D S G I + /// | + /// | D gDD gDS + gDB gDG ID + /// + /// | S gSD + gBD gSSBB gSG + gBG IS+IB + /// + /// | G gGD gGS + gGB gGG IG + /// | + /// | forward=yes, bulk diode=no, backgate transconductance=no + /// | IG = 0, gGG = 0, gGS, gGB =0, gGD=0l + /// gDD=gds + gbd=gds + /// gSD+gBD=-gds + gmb - gbd = -gds + /// + /// | D S G I + /// | + /// | D gDD gDS + gDB gDG ID + /// + /// | S gSD + gBD gSSBB gSG + gBG IS+IB + /// + /// | G 0 0 0 0 + /// | + /// | + /// | + /// | + /// | + /// | } NETLIB_UPDATE_PARAM(MOSFET) { } -} // namespace analog +} // namespace netlist::analog -namespace devices { +namespace netlist::devices { NETLIB_DEVICE_IMPL_NS(analog, MOSFET, "MOSFET", "MODEL") -} // namespace devices +} // namespace netlist::devices -} // namespace netlist diff --git a/src/lib/netlist/analog/nlid_twoterm.h b/src/lib/netlist/analog/nlid_twoterm.h index c2d9eee3333..f940b8fa6dc 100644 --- a/src/lib/netlist/analog/nlid_twoterm.h +++ b/src/lib/netlist/analog/nlid_twoterm.h @@ -119,6 +119,13 @@ namespace netlist::analog m_N.set_go_gt_I(a21, a22, rhs2); } + void set_mat(const std::array,2> &a) const noexcept + { + // GO, GT, I + m_P.set_go_gt_I(a[0][1], a[0][0], a[0][2]); + m_N.set_go_gt_I(a[1][0], a[1][1], a[1][2]); + } + void clear_mat() const noexcept { const auto z = nlconst::zero(); diff --git a/src/lib/netlist/build/.clang-format b/src/lib/netlist/build/.clang-format index 46d1fb6dcec..09d57438f7b 100644 --- a/src/lib/netlist/build/.clang-format +++ b/src/lib/netlist/build/.clang-format @@ -36,6 +36,9 @@ SpacesInAngles: false SpaceBeforeAssignmentOperators: true AlignConsecutiveDeclarations: true +#Clang>=14 +#AlignArrayOfStructures: Left + AllowShortIfStatementsOnASingleLine: false AllowShortCaseLabelsOnASingleLine: true AllowAllArgumentsOnNextLine: false @@ -68,16 +71,17 @@ IncludeCategories: Priority: 10 StatementMacros: - - "NETLIB_DEVICE_IMPL_NS" - - "TTL_7400_NAND" - - "TTL_7402_NOR" - - "NET_C" - - "TRUTHTABLE_ENTRY" - - "LOCAL_LIB_ENTRY" + - "DIPPINS" - "TT_HEAD" - "TT_LINE" - "TT_FAMILY" - - "DIPPINS" +# - "TRUTH_TABLE" +# - "NETLIB_DEVICE_IMPL_NS" +# - "TTL_7400_NAND" +# - "TTL_7402_NOR" +# - "NET_C" +# - "TRUTHTABLE_ENTRY" + - "LOCAL_LIB_ENTRY" #StatementAttributeLikeMacros: # - "NETLIST_NAME" @@ -87,16 +91,22 @@ TypenameMacros: - "NETLIST_NAME" - "NETLIB_NAME" +WhitespaceSensitiveMacros: + - "ALIAS" + - "NET_C" + - "DIPPINS" + IndentPPDirectives: BeforeHash -MacroBlockBegin: "^static NETLIST_START\\(.*\\)|static TRUTHTABLE_START\\(.*\\)$" +MacroBlockBegin: "^static NETLIST_START\\(.+\\)|static TRUTHTABLE_START\\(.*\\)$" MacroBlockEnd: "^NETLIST_END\\(\\)|TRUTHTABLE_END\\(\\)$" # ReferenceAlignment: Middle -# Avoid formatting (breaking) doxygen -CommentPragmas: '^\\.+' -# Avoid formatting cspell ignored comments -CommentPragmas: '^#.+' -# Avoid breaking tables -CommentPragmas: '^\|.+' -# Avoid breaking clang-tidy -CommentPragmas: '^ NOLINT.+' + +# Avoid formatting +# -- clang-tidy +# - cspell +# - Doxygen tables +# - Doxygen commands +# - ignored comments +# - nltool parsed documentation +CommentPragmas: '^( NOLINT.+| spell-checker.+|/ \|.+|/ \\.+|#.+|-.+)' diff --git a/src/lib/netlist/build/create_devinc.py b/src/lib/netlist/build/create_devinc.py index 660759e18d1..6888d71183f 100644 --- a/src/lib/netlist/build/create_devinc.py +++ b/src/lib/netlist/build/create_devinc.py @@ -76,7 +76,7 @@ def process_file(srcfile): if m is not None: process_entry(srcfile, m.group(1), "") else: - m = re.match(r"(static)*TRUTHTABLE_START\((\w+),(\w+),(\w+),([a-zA-Z0-9_+@,]*)", ls) + m = re.match(r"(static)*TRUTH_TABLE\((\w+),(\w+),(\w+),([a-zA-Z0-9_+@,]*)", ls) if m is not None: process_entry(srcfile, m.group(2), m.group(5)) else: diff --git a/src/lib/netlist/build/create_modules.py b/src/lib/netlist/build/create_modules.py index c3c9e7c19aa..bf34a748321 100644 --- a/src/lib/netlist/build/create_modules.py +++ b/src/lib/netlist/build/create_modules.py @@ -76,8 +76,9 @@ if __name__ == '__main__': print("#include \"devices/net_lib.h\"") print("") print("NETLIST_START(modules_lib)") + print("{") print("") for entry in files_sorted: process_file(entry) print("") - print("NETLIST_END()") + print("}") diff --git a/src/lib/netlist/core/analog.h b/src/lib/netlist/core/analog.h index da9639a3de1..a6f15b76f58 100644 --- a/src/lib/netlist/core/analog.h +++ b/src/lib/netlist/core/analog.h @@ -90,9 +90,9 @@ namespace netlist false); private: - nl_fptype *m_Idr; ///< drive current - nl_fptype *m_go; ///< conductance for Voltage from other term - nl_fptype *m_gt; ///< conductance for total conductance + nl_fptype *m_Idr; //!< drive current + nl_fptype *m_go; //!< conductance for Voltage from other term + nl_fptype *m_gt; //!< conductance for total conductance }; // ------------------------------------------------------------------------- @@ -107,9 +107,9 @@ namespace netlist { public: /// \brief Constructor - analog_input_t(core_device_t &dev, ///< owning device - const pstring & aname, ///< name of terminal - nl_delegate delegate ///< delegate + analog_input_t(core_device_t &dev, //!< owning device + const pstring & aname, //!< name of terminal + nl_delegate delegate //!< delegate ); /// \brief returns voltage at terminal. diff --git a/src/lib/netlist/core/setup.h b/src/lib/netlist/core/setup.h index 63210a96a06..0168417c35c 100644 --- a/src/lib/netlist/core/setup.h +++ b/src/lib/netlist/core/setup.h @@ -78,17 +78,40 @@ namespace netlist namespace detail { - // ----------------------------------------------------------------------------- - // abstract_t - // ----------------------------------------------------------------------------- + struct alias_t + { + alias_t(alias_type type, pstring alias, pstring references) + : m_type(type) + , m_alias(alias) + , m_references(references) + {} + + alias_t(const alias_t &) = default; + alias_t &operator=(const alias_t &) = default; + alias_t(alias_t &&) noexcept = default; + alias_t &operator=(alias_t &&) noexcept = default; + + pstring name() const { return m_alias; } + pstring references() const { return m_references; } + alias_type type() const { return m_type; } + private: + alias_type m_type; + pstring m_alias; + pstring m_references; + }; + /// + /// \brief class containing the abstract net list + /// + /// After parsing a net list this class contains all raw + /// connections, parameter values and devices. struct abstract_t { - using link_t = std::pair; + using connection_t = std::pair; abstract_t(log_type &log) : m_factory(log) { } - std::unordered_map m_alias; - std::vector m_links; + std::unordered_map m_aliases; + std::vector m_connections; std::unordered_map m_param_values; models_t::raw_map_t m_models; diff --git a/src/lib/netlist/devices/nld_roms.cpp b/src/lib/netlist/devices/nld_roms.cpp index 024d508497a..a9d52850dba 100644 --- a/src/lib/netlist/devices/nld_roms.cpp +++ b/src/lib/netlist/devices/nld_roms.cpp @@ -25,6 +25,7 @@ namespace netlist::devices { NETLIB_OBJECT(mk28000_prom) { NETLIB_CONSTRUCTOR(mk28000_prom) + , m_TE(*this, "FORCE_TRISTATE_LOGIC", 0) , m_enable_lo(*this, "m_enable_lo", false) , m_enable_hi(*this, "m_enable_hi", false) , m_latched_rom(*this, "m_latched_rom", 0) @@ -32,7 +33,7 @@ namespace netlist::devices { , m_ARQ(*this, "ARQ", NETLIB_DELEGATE(addr)) , m_OE1(*this, "OE1", NETLIB_DELEGATE(oe1)) , m_OE2(*this, "OE2", NETLIB_DELEGATE(oe2)) - , m_O(*this, 1, "O{}", 0) + , m_O(*this, 1, "O{}", m_TE()) , m_ROM(*this, "ROM") , m_power_pins(*this) { @@ -81,6 +82,7 @@ namespace netlist::devices { } } + param_logic_t m_TE; state_var m_enable_lo; state_var m_enable_hi; state_var m_latched_rom; diff --git a/src/lib/netlist/devices/nld_system.cpp b/src/lib/netlist/devices/nld_system.cpp index 0a972928fd2..e2580a296c6 100644 --- a/src/lib/netlist/devices/nld_system.cpp +++ b/src/lib/netlist/devices/nld_system.cpp @@ -13,9 +13,9 @@ namespace netlist::devices { - // ----------------------------------------------------------------------------- + // ------------------------------------------------------------------------- // extclock - // ----------------------------------------------------------------------------- + // ------------------------------------------------------------------------- NETLIB_OBJECT(extclock) { @@ -107,6 +107,62 @@ namespace netlist::devices { std::array m_inc; }; + // ------------------------------------------------------------------------- + // sys_pulse + // ------------------------------------------------------------------------- + + NETLIB_OBJECT(sys_pulse) + { + NETLIB_CONSTRUCTOR(sys_pulse) + , m_I(*this, "I", NETLIB_DELEGATE(input)) + , m_FB(*this, "FB", NETLIB_DELEGATE(feedback)) + , m_Q(*this, "Q") + , m_delay(*this, "DELAY", 10) + , m_duration(*this, "DURATION", 100) + , m_invert_input(*this, "INVERT_INPUT", 1) + , m_invert_output(*this, "INVERT_OUTPUT", 1) + , m_last(*this, "m_last", 0) + { + connect(m_Q, m_FB); + } + + //NETLIB_UPDATE_PARAMI(); + NETLIB_RESETI() + { + //m_Q.initial(0); + } + + private: + NETLIB_HANDLERI(input) + { + netlist_sig_t nval = m_I() ^ m_invert_input; + if (nval && !m_last) + { + // L_to_H + m_Q.push(1 ^ m_invert_output, NLTIME_FROM_NS(static_cast(m_delay()))); + } + m_last = nval; + } + + NETLIB_HANDLERI(feedback) + { + if (m_FB() == (1 ^ m_invert_output)) + m_Q.push(0 ^ m_invert_output, NLTIME_FROM_NS(static_cast(m_duration()))); + } + + logic_input_t m_I; + logic_input_t m_FB; + logic_output_t m_Q; + + param_int_t m_delay; + param_int_t m_duration; + param_logic_t m_invert_input; + param_logic_t m_invert_output; + + state_var m_last; + }; + + NETLIB_DEVICE_IMPL(netlistparams, "PARAMETER", "") NETLIB_DEVICE_IMPL(nc_pin, "NC_PIN", "") @@ -119,6 +175,7 @@ namespace netlist::devices { NETLIB_DEVICE_IMPL(sys_dsw1, "SYS_DSW", "+I,+1,+2") NETLIB_DEVICE_IMPL(sys_dsw2, "SYS_DSW2", "") NETLIB_DEVICE_IMPL(sys_compd, "SYS_COMPD", "") + NETLIB_DEVICE_IMPL(sys_pulse, "SYS_PULSE", "DELAY,DURATION,INVERT_INPUT,INVERT_OUTPUT") using NETLIB_NAME(sys_noise_mt_u) = NETLIB_NAME(sys_noise); diff --git a/src/lib/netlist/documentation/primer_1.dox.h b/src/lib/netlist/documentation/primer_1.dox.h index 11d22a99a13..6c2642fbcde 100644 --- a/src/lib/netlist/documentation/primer_1.dox.h +++ b/src/lib/netlist/documentation/primer_1.dox.h @@ -19,6 +19,7 @@ Now in netlist syntax this looks like: #include "netlist/devices/net_lib.h" NETLIST_START(charge_discharge) +{ ANALOG_INPUT(V5, 5) // Clock needs a 5V power supply @@ -34,7 +35,7 @@ NETLIST_START(charge_discharge) NET_C(V5, I.VCC) ALIAS(O, R.2) // Output O == C.1 == R.2 -NETLIST_END() +} ~~~ Save this example as e.g. test1.cpp. Now that's a c++ extension. The background diff --git a/src/lib/netlist/examples/2n6027.cpp b/src/lib/netlist/examples/2n6027.cpp index bfad3c065ec..4f95a5d8e95 100644 --- a/src/lib/netlist/examples/2n6027.cpp +++ b/src/lib/netlist/examples/2n6027.cpp @@ -27,6 +27,7 @@ NETLIST_EXTERNAL(loc_lib) * ---------------------------------------------------------------------------*/ NETLIST_START(ex2N6027) +{ SOLVER(Solver, 48000) PARAM(Solver.DYNAMIC_TS, 1) @@ -54,10 +55,11 @@ NETLIST_START(ex2N6027) NET_C(GND, C.2, R4.2, R3.2) -NETLIST_END() +} NETLIST_START(PUT_2N6027) +{ NET_MODEL("2N6027_NPN NPN(IS=5E-15 VAF=100 IKF=0.3 ISE=1.85E-12 NE=1.45 RE=0.15 RC=0.15 CJE=7E-10 TF=0.6E-8 CJC=2.2E-10 TR=4.76E-8 XTB=3)") NET_MODEL("2N6027_PNP PNP(IS=2E-15 VAF=100 IKF=0.3 ISE=1.90E-12 NE=1.5 RE=0.15 RC=0.15 CJE=7E-10 TF=1.6E-8 CJC=2.2E-10 TR=5.1E-8 XTB=3)") @@ -87,10 +89,11 @@ NETLIST_START(PUT_2N6027) ALIAS(A, Q2.E) ALIAS(K, Q1.E) -NETLIST_END() +} NETLIST_START(loc_lib) +{ LOCAL_LIB_ENTRY(PUT_2N6027) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/7400_astable.c b/src/lib/netlist/examples/7400_astable.c index cb49db8a1a4..31505fd3661 100644 --- a/src/lib/netlist/examples/7400_astable.c +++ b/src/lib/netlist/examples/7400_astable.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(7400_astable) +{ /* * Astable multivibrator using two 7400 gates (or inverters) @@ -32,4 +33,4 @@ NETLIST_START(7400_astable) LOG(logn1Q, n1.Q) LOG(logn2Q, n2.Q) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/74123_mstable.c b/src/lib/netlist/examples/74123_mstable.c index 5243f4c0ad2..8322dbe5c8f 100644 --- a/src/lib/netlist/examples/74123_mstable.c +++ b/src/lib/netlist/examples/74123_mstable.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(74123_mstable) +{ /* * Monoflog @@ -44,4 +45,4 @@ NETLIST_START(74123_mstable) LOG(log_Q, mf.Q) LOG(log_X, clk.Q) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/74125.cpp b/src/lib/netlist/examples/74125.cpp index 640e2bd8b86..d5d9245e60b 100644 --- a/src/lib/netlist/examples/74125.cpp +++ b/src/lib/netlist/examples/74125.cpp @@ -13,6 +13,7 @@ // RL.1 : Output NETLIST_START(main) +{ SOLVER(Solver, 48000) // could be 1 in this example @@ -38,5 +39,5 @@ NETLIST_START(main) NET_C(GND, RL.2, C1.GND, C2.GND, C3.GND, X1.GND, X2.GND) NET_C(VCC, C1.VCC, C2.VCC, C3.VCC, X1.VCC, X2.VCC) -NETLIST_END() +} //! [74125_example] diff --git a/src/lib/netlist/examples/7414.cpp b/src/lib/netlist/examples/7414.cpp index 0301d9d62ec..32877e3648b 100644 --- a/src/lib/netlist/examples/7414.cpp +++ b/src/lib/netlist/examples/7414.cpp @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(7414_astable) +{ /* * Simple oscillator with 74LS14 @@ -30,4 +31,4 @@ NETLIST_START(7414_astable) NET_C(GND, U4A1.GND) NET_C(R39.1, U4A1.Q) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/9602_mstable.c b/src/lib/netlist/examples/9602_mstable.c index f253c9e994c..db51af94a37 100644 --- a/src/lib/netlist/examples/9602_mstable.c +++ b/src/lib/netlist/examples/9602_mstable.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(74123_mstable) +{ /* * Monoflog @@ -50,4 +51,4 @@ NETLIST_START(74123_mstable) NET_C(mf.12, V5) NET_C(mf.13, V5) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/bjt.c b/src/lib/netlist/examples/bjt.c index b654750bcad..06e4ed5618c 100644 --- a/src/lib/netlist/examples/bjt.c +++ b/src/lib/netlist/examples/bjt.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(bjt) +{ /* Standard stuff */ CLOCK(clk, 1000) // 1000 Hz @@ -43,4 +44,4 @@ NETLIST_START(bjt) LOG(logB, Q.B) LOG(logC, Q.C) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/bjt_eb.c b/src/lib/netlist/examples/bjt_eb.c index 554cacd967d..b8438dae205 100644 --- a/src/lib/netlist/examples/bjt_eb.c +++ b/src/lib/netlist/examples/bjt_eb.c @@ -10,6 +10,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(bjt) +{ /* Standard stuff */ CLOCK(clk, 10000) // 10000 Hz @@ -41,4 +42,4 @@ NETLIST_START(bjt) //LOG(logB, Q.B) //LOG(logC, Q.C) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/bjt_eb_pnp.c b/src/lib/netlist/examples/bjt_eb_pnp.c index 9bd052f7df1..74038ea61ba 100644 --- a/src/lib/netlist/examples/bjt_eb_pnp.c +++ b/src/lib/netlist/examples/bjt_eb_pnp.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(bjt) +{ /* Standard stuff */ CLOCK(clk, 1000) // 1000 Hz @@ -32,4 +33,4 @@ NETLIST_START(bjt) LOG(logB, Q1.B) LOG(logC, Q1.C) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/cccs.cpp b/src/lib/netlist/examples/cccs.cpp index 02cccd1736e..478f67a8b72 100644 --- a/src/lib/netlist/examples/cccs.cpp +++ b/src/lib/netlist/examples/cccs.cpp @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(cccs) +{ CLOCK(clk, 1000) // 1000 Hz SOLVER(Solver, 48000) @@ -36,4 +37,4 @@ NETLIST_START(cccs) NET_C(R3.1, CS1.P) NET_C(GND, CS1.N, R3.2) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/cd4066.c b/src/lib/netlist/examples/cd4066.c index fbb8e75ba2d..4d5c6d1ed93 100644 --- a/src/lib/netlist/examples/cd4066.c +++ b/src/lib/netlist/examples/cd4066.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(cd4066) +{ /* Standard stuff */ CLOCK(clk, 1000) // 1000 Hz @@ -43,4 +44,4 @@ NETLIST_START(cd4066) LOG(logB, clk) LOG(logC, R1.1) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/cdelay.c b/src/lib/netlist/examples/cdelay.c index c48279fa5ab..e7826d1baf7 100644 --- a/src/lib/netlist/examples/cdelay.c +++ b/src/lib/netlist/examples/cdelay.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(perf) +{ SOLVER(Solver, 48000) PARAM(Solver.ACCURACY, 1e-20) @@ -15,7 +16,7 @@ NETLIST_START(perf) TTL_7400_NAND(n1,clk,clk) -NETLIST_END() +} #ifndef P_FREQ #define P_FREQ 4800 @@ -26,6 +27,7 @@ NETLIST_END() #endif NETLIST_START(cap_delay) +{ /* * delay circuit @@ -50,4 +52,4 @@ NETLIST_START(cap_delay) LOG(logn1Q, C.2) LOG(logn2Q, n1.Q) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/cmos_inverter.cpp b/src/lib/netlist/examples/cmos_inverter.cpp index 022da27d23d..576a8beeec8 100644 --- a/src/lib/netlist/examples/cmos_inverter.cpp +++ b/src/lib/netlist/examples/cmos_inverter.cpp @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(cmos_inverter) +{ /* Standard stuff */ //EXTERNAL_SOURCE(modules_lib) @@ -46,4 +47,4 @@ NETLIST_START(cmos_inverter) LOG(log_G, M.G) LOG(log_D, M.D) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/cmos_inverter_clk.cpp b/src/lib/netlist/examples/cmos_inverter_clk.cpp index d115867d9ee..83b812373df 100644 --- a/src/lib/netlist/examples/cmos_inverter_clk.cpp +++ b/src/lib/netlist/examples/cmos_inverter_clk.cpp @@ -11,6 +11,7 @@ #define USE_CLOCK (1) NETLIST_START(cmos_inverter_clk) +{ /* Standard stuff */ //SOLVER(Solver, 480000) @@ -60,4 +61,4 @@ NETLIST_START(cmos_inverter_clk) LOG(log_D, M.D) LOGD(log_X, RG.1, RG.2) #endif -NETLIST_END() +} diff --git a/src/lib/netlist/examples/cmos_inverter_rs.cpp b/src/lib/netlist/examples/cmos_inverter_rs.cpp new file mode 100644 index 00000000000..443f7721506 --- /dev/null +++ b/src/lib/netlist/examples/cmos_inverter_rs.cpp @@ -0,0 +1,136 @@ +// license:CC0 +// copyright-holders:Couriersud +/* + * bjt.c + * + */ + +#include "netlist/devices/net_lib.h" + +// Run this with ... ./nltool -c run -t 1 -n cmos_inverter ../examples/cmos_inverter_dk.cpp + +static NETLIST_START(CD4069_ANALOG_GATE) +{ + + //MOSFET(P, "PMOS(VTO=-1.0 KP=2e-3 LAMBDA=2E-2)") + //MOSFET(M, "NMOS(VTO=1.0 KP=2e-3 LAMBDA=2E-2)") + // https://www.youtube.com/watch?v=jayFN7XqPJw + MOSFET(P, "PMOS(VTO=-1.22 KP=0.044 LAMBDA=0.05 GAMMA=0.25 L=4.22e-6 W=30e-6)") + MOSFET(M, "NMOS(VTO=1.22 KP=0.044 LAMBDA=0.05 GAMMA=0.25 L=4.22e-6 W=30e-6)") + + ALIAS(VDD, P.S) + ALIAS(VSS, M.S) + ALIAS(Q, M.D) + ALIAS(A, M.G) + +#if 0 + // No real difference + DIODE(D1, "1N4148") + NET_C(D1.K, A) + NET_C(D1.A, VSS) + + DIODE(D2, "1N4148") + NET_C(D2.A, A) + NET_C(D2.K, VDD) +#endif + NET_C(P.D, M.D) + NET_C(M.G, P.G) + +} + +//- Identifier: CD4069_ANALOG_DIP +//- Title: CD4069UBM/CD4069UBC Inverter Circuits +//- Pinalias: A1,Y1,A2,Y2,A3,Y3,VSS,Y4,A4,Y5,A5,Y6,A6,VDD +//- Package: DIP +//- NamingConvention: Naming conventions follow National Semiconductor datasheet +//- FunctionTable: +//- http://pdf.datasheetcatalog.com/datasheets/150/206783_DS.pdf +//- +//- This uses two NMOS/PMOS transistors to model +// the input to output voltage transfer function. +// +static NETLIST_START(CD4069_ANALOG_DIP) +{ + CD4069_ANALOG_GATE(A) + CD4069_ANALOG_GATE(B) + CD4069_ANALOG_GATE(C) + CD4069_ANALOG_GATE(D) + CD4069_ANALOG_GATE(E) + CD4069_ANALOG_GATE(F) + + NET_C(A.VDD, B.VDD, C.VDD, D.VDD, E.VDD, F.VDD) + NET_C(A.VSS, B.VSS, C.VSS, D.VSS, E.VSS, F.VSS) + + DIPPINS( /* +--------------+ */ + A.A, /* A1 |1 ++ 14| VDD */ A.VDD, + A.Q, /* Y1 |2 13| A6 */ F.A, + B.A, /* A2 |3 12| Y6 */ F.Q, + B.Q, /* Y2 |4 4069 11| A5 */ E.A, + C.A, /* A3 |5 10| Y5 */ E.Q, + C.Q, /* Y3 |6 9| A4 */ D.A, + A.VSS, /* VSS |7 8| Y4 */ D.Q + /* +--------------+ */ + ) +} + +NETLIST_START(cmos_inverter) +{ + /* Standard stuff */ + + //EXTERNAL_SOURCE(modules_lib) + + //INCLUDE(modules_lib) + + SOLVER(Solver, 48000) + PARAM(Solver.ACCURACY, 1e-7) + PARAM(Solver.NR_LOOPS, 50) + PARAM(Solver.METHOD, "MAT_CR") + ANALOG_INPUT(V5, 5) + + RTEST(X) + NET_C(X.1, V5) + NET_C(X.2, GND) + + LOCAL_LIB_ENTRY(CD4069_ANALOG_GATE) + //SUBMODEL(CD4069_ANALOG_GATE, GATE) + CD4069_ANALOG_GATE(G1) + CD4069_ANALOG_GATE(G2) + CD4069_ANALOG_GATE(G3) + + NET_C(V5, G1.VDD, G2.VDD, G3.VDD) + NET_C(GND, G1.VSS, G2.VSS, G3.VSS) + + RES(R1, 18000) + RES(R2, 3300000) + CAP(C, CAP_U(10)) // is 20! + NET_C(G1.Q, G2.A) + NET_C(G2.Q, G3.A, C.1) + NET_C(G3.Q, R1.1) + NET_C(C.2, R1.2, R2.1) + NET_C(R2.2, G1.A) + + RES(R47,10000) + RES(R46,1000) + RES(R48,2000) // is 1000!, but assume 50:50 on modulated signal + CAP(C45, CAP_U(22)) + QBJT_EB(Q,"2SC1815") + NET_C(G1.Q, R47.1) + NET_C(R47.2, Q.B) + NET_C(V5, Q.C) + NET_C(R46.1, Q.E) + NET_C(R46.2, C45.1) + NET_C(R48.1, C45.1) + NET_C(GND, C45.2, R48.2) + + + // capacitance over D - S +#if 0 + CAP(C, CAP_N(1)) + NET_C(M.D, C.1) + NET_C(M.S, C.2) +#endif + //LOG(log_G, IN.P) + //LOG(log_D, G1.Q) + LOG(log_D, C45.1) + +} diff --git a/src/lib/netlist/examples/congo_bongo.cpp b/src/lib/netlist/examples/congo_bongo.cpp index 32119dc2a51..89fabfef98d 100644 --- a/src/lib/netlist/examples/congo_bongo.cpp +++ b/src/lib/netlist/examples/congo_bongo.cpp @@ -36,6 +36,7 @@ NETLIST_EXTERNAL(congob_lib) NETLIST_START(congo_bongo) +{ // EESCHEMA NETLIST VERSION 1.1 (SPICE FORMAT) CREATION DATE: WED 01 JUL 2015 11:09:25 PM CEST // TO EXCLUDE A COMPONENT FROM THE SPICE NETLIST ADD [SPICE_NETLIST_ENABLED] USER FIELD SET TO: N // TO REORDER THE COMPONENT SPICE NODE SEQUENCE ADD [SPICE_NODE_SEQUENCE] USER FIELD AND DEFINE SEQUENCE: 2,1,0 @@ -109,9 +110,10 @@ NETLIST_START(congo_bongo) OPTIMIZE_FRONTIER(R19.2, RES_K(51), 50) #endif -NETLIST_END() +} NETLIST_START(CongoBongo_schematics) +{ CAP(C20, CAP_N(68)) CAP(C21, CAP_U(1)) @@ -358,9 +360,10 @@ NETLIST_START(CongoBongo_schematics) NET_C(C36.2, C35.1, R49.1) NET_C(D4.A, C39.2, R53.1) NET_C(D4.K, C38.1, R52.1) -NETLIST_END() +} NETLIST_START(CongoBongo_amp) +{ // .INCLUDE "NLSPICE.LIB" // .TRAN 1E-5 1 // .END @@ -422,9 +425,10 @@ NETLIST_START(CongoBongo_amp) NET_C(IN1.1, R77.1) NET_C(IN2.1, R77.2) -NETLIST_END() +} NETLIST_START(CongoBongo_dsg) +{ // .INCLUDE "NLSPICE.LIB" // .END ALIAS(SOU1, U12.14) @@ -464,9 +468,10 @@ NETLIST_START(CongoBongo_dsg) NET_C(U12.10, U12.12, I_V6.Q) NET_C(U12.13, R19.1, R20.2) NET_C(R14.1, C15.2, ROU5.2) -NETLIST_END() +} NETLIST_START(G501534_DIP) +{ //AFUNC(f, 2, "A0 A1 A1 A1 * * 0.01 * *") //AFUNC(f, 2, "A0") //AFUNC(f, 2, "A0 6 - A1 3 pow * 0.02 * 6 +") @@ -496,10 +501,11 @@ NETLIST_START(G501534_DIP) NET_C(f.Q, RO.1) ALIAS(3, RO.2) -NETLIST_END() +} NETLIST_START(congob_lib) +{ LOCAL_LIB_ENTRY(G501534_DIP) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/cs.cpp b/src/lib/netlist/examples/cs.cpp index 562270a23be..3c476f1a68c 100644 --- a/src/lib/netlist/examples/cs.cpp +++ b/src/lib/netlist/examples/cs.cpp @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(cs) +{ SOLVER(Solver, 48000) PARAM(Solver.ACCURACY, 1e-12) @@ -24,4 +25,4 @@ NETLIST_START(cs) NET_C(GND, CS1.2, R1.2) LOG(log_P, R1.1) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/diode.c b/src/lib/netlist/examples/diode.c index b628a18af4a..da45f8fe366 100644 --- a/src/lib/netlist/examples/diode.c +++ b/src/lib/netlist/examples/diode.c @@ -7,6 +7,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(diode) +{ /* Standard stuff */ CLOCK(clk, 1000) // 1000 Hz @@ -28,4 +29,4 @@ NETLIST_START(diode) LOG(logB, clk) LOG(logC, D.A) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/lm3900_test.cpp b/src/lib/netlist/examples/lm3900_test.cpp index a48a2cd8a78..90a9fcd5754 100644 --- a/src/lib/netlist/examples/lm3900_test.cpp +++ b/src/lib/netlist/examples/lm3900_test.cpp @@ -19,6 +19,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(main) +{ /* Standard stuff */ @@ -100,4 +101,4 @@ NETLIST_START(main) LOG(log_Y, R1.1) LOG(log_Z, f) #endif -NETLIST_END() +} diff --git a/src/lib/netlist/examples/lostfound.cpp b/src/lib/netlist/examples/lostfound.cpp index d7d2a94ac66..da9b1cca780 100644 --- a/src/lib/netlist/examples/lostfound.cpp +++ b/src/lib/netlist/examples/lostfound.cpp @@ -30,7 +30,8 @@ * | 1 | * | 1 | 1 || TOGGLE | * +-----+-----+-----+---++---+-----+ */ - TRUTHTABLE_START(TTL_74107, 6, 4, "+CLK,+J,+K,+CLRQ,@VCC,@GND") + TRUTH_TABLE(TTL_74107, 6, 4, "+CLK,+J,+K,+CLRQ,@VCC,@GND") +{ TT_HEAD("CLRQ, CLK, _CO, J, K,_QX | Q, QQ, CO, QX") TT_LINE(" 0, 0, X, X, X, X | 0, 1, 0, 0 | 16, 25, 1, 1") TT_LINE(" 0, 1, X, X, X, X | 0, 1, 1, 0 | 16, 25, 1, 1") @@ -62,7 +63,7 @@ TT_LINE(" 1, 0, 1, 1, 1, 1 | 0, 1, 0, 0 | 16, 25, 1, 1") TT_LINE(" 1, 0, 1, 1, 1, 0 | 1, 0, 0, 1 | 25, 16, 1, 1") - TRUTHTABLE_END() + } #endif /// \brief Use the truthtable implementation of 7448 instead of the coded device @@ -76,7 +77,8 @@ #endif #if (NL_USE_TRUTHTABLE_7448) - TRUTHTABLE_START(TTL_7448, 7, 7, "+A,+B,+C,+D,+LTQ,+BIQ,+RBIQ,@VCC,@GND") + TRUTH_TABLE(TTL_7448, 7, 7, "+A,+B,+C,+D,+LTQ,+BIQ,+RBIQ,@VCC,@GND") +{ TT_HEAD(" LTQ,BIQ,RBIQ, A , B , C , D | a, b, c, d, e, f, g") TT_LINE(" 1, 1, 1, 0, 0, 0, 0 | 1, 1, 1, 1, 1, 1, 0|100,100,100,100,100,100,100") @@ -105,10 +107,11 @@ TT_LINE(" X, 0, X, X, X, X, X | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") // BI TT_FAMILY("74XX") - TRUTHTABLE_END() + } // FIXME: We need a more elegant solution than defining twice - TRUTHTABLE_START(TTL_7448_TT, 7, 7, "") + TRUTH_TABLE(TTL_7448_TT, 7, 7, "") +{ TT_HEAD(" LTQ,BIQ,RBIQ, A , B , C , D | a, b, c, d, e, f, g") TT_LINE(" 1, 1, 1, 0, 0, 0, 0 | 1, 1, 1, 1, 1, 1, 0|100,100,100,100,100,100,100") @@ -137,7 +140,7 @@ TT_LINE(" X, 0, X, X, X, X, X | 0, 0, 0, 0, 0, 0, 0|100,100,100,100,100,100,100") // BI TT_FAMILY("74XX") - TRUTHTABLE_END() + } #endif diff --git a/src/lib/netlist/examples/mm5837_noise.c b/src/lib/netlist/examples/mm5837_noise.c index 5a314335e15..99c40529ec9 100644 --- a/src/lib/netlist/examples/mm5837_noise.c +++ b/src/lib/netlist/examples/mm5837_noise.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(ne555_astable) +{ /* * Astable ne555 @@ -35,4 +36,4 @@ NETLIST_START(ne555_astable) LOG(log3, NOISE.3) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/msx_mixer_stage.c b/src/lib/netlist/examples/msx_mixer_stage.c index 5e9b8c106be..537fe987884 100644 --- a/src/lib/netlist/examples/msx_mixer_stage.c +++ b/src/lib/netlist/examples/msx_mixer_stage.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(msx) +{ /* The BJT is used as an amplifier. RESCHED_LOOPS must be relatively high to * allow Newton-Raphson to finish. */ @@ -62,4 +63,4 @@ NETLIST_START(msx) //LOG(logB, T2.B) LOG(logC, T2.C) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/ne555_astable.c b/src/lib/netlist/examples/ne555_astable.c index 16290109261..7ae970e6bac 100644 --- a/src/lib/netlist/examples/ne555_astable.c +++ b/src/lib/netlist/examples/ne555_astable.c @@ -10,6 +10,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(ne555_astable) +{ /* * Astable ne555 @@ -49,5 +50,5 @@ NETLIST_START(ne555_astable) LOG(log2, C.1) LOG(log3, 555.OUT) -NETLIST_END() +} //! [ne555_example] diff --git a/src/lib/netlist/examples/ne566.cpp b/src/lib/netlist/examples/ne566.cpp index 37bb2898f56..e31ce5a80fe 100644 --- a/src/lib/netlist/examples/ne566.cpp +++ b/src/lib/netlist/examples/ne566.cpp @@ -14,6 +14,7 @@ // X.4 : Triangle out NETLIST_START(oscillator) +{ SOLVER(Solver, 48000) @@ -30,5 +31,5 @@ NETLIST_START(oscillator) NET_C(I_VC, X.5) NET_C(GND, X.1, C1.2) NET_C(C1.1, X.7) -NETLIST_END() +} //! [ne566_example] diff --git a/src/lib/netlist/examples/nld_74393_test.c b/src/lib/netlist/examples/nld_74393_test.c index 771593ff797..d6c4ba3cc5b 100644 --- a/src/lib/netlist/examples/nld_74393_test.c +++ b/src/lib/netlist/examples/nld_74393_test.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(perf) +{ SOLVER(Solver, 48000) @@ -23,4 +24,4 @@ NETLIST_START(perf) NET_C(CLK, TESTCHIP.1, TESTCHIP.13) NET_C(CLK2, TESTCHIP.2, TESTCHIP.12) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/nmos_fet.cpp b/src/lib/netlist/examples/nmos_fet.cpp index e970c49bfba..c9c1eed7497 100644 --- a/src/lib/netlist/examples/nmos_fet.cpp +++ b/src/lib/netlist/examples/nmos_fet.cpp @@ -10,6 +10,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(nmos) +{ /* Standard stuff */ CLOCK(clk, 100) // 100 Hz @@ -51,4 +52,4 @@ NETLIST_START(nmos) LOG(log_G, M.G) LOG(log_D, M.D) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/noise.cpp b/src/lib/netlist/examples/noise.cpp index 5fcda7a01dc..2d117d60396 100644 --- a/src/lib/netlist/examples/noise.cpp +++ b/src/lib/netlist/examples/noise.cpp @@ -14,6 +14,7 @@ // X.4 : Triangle out NETLIST_START(noise) +{ SOLVER(Solver, 48000) @@ -32,5 +33,5 @@ NETLIST_START(noise) NET_C(noise.2, R2.1) NET_C(GND, R2.2, nclk.GND) -NETLIST_END() +} //! [noise_example] diff --git a/src/lib/netlist/examples/norton_opamp.c b/src/lib/netlist/examples/norton_opamp.c index a6cf52ce152..cf9c55622b2 100644 --- a/src/lib/netlist/examples/norton_opamp.c +++ b/src/lib/netlist/examples/norton_opamp.c @@ -7,6 +7,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(main) +{ /* Standard stuff */ @@ -44,9 +45,10 @@ NETLIST_START(main) LOG(logX, op1.OUT) LOG(logY, clk) -NETLIST_END() +} NETLIST_START(opamp) +{ /* Opamp model from * @@ -94,9 +96,10 @@ NETLIST_START(opamp) NET_C(CP1.1, RP1.1) NET_C(EBUF.IP, RP1.1) -NETLIST_END() +} NETLIST_START(opamp_fast) +{ /* * Fast norton opamp model without bandwidth @@ -123,4 +126,4 @@ NETLIST_START(opamp_fast) PARAM(G1.G, 1000000) PARAM(G1.RO, RES_K(8)) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/opamp.c b/src/lib/netlist/examples/opamp.c index 077cef5eeac..b2d9a027e91 100644 --- a/src/lib/netlist/examples/opamp.c +++ b/src/lib/netlist/examples/opamp.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(main) +{ /* Standard stuff */ @@ -52,9 +53,10 @@ NETLIST_START(main) LOG(log_X, op1.OUT) LOG(log_Y, clk) -NETLIST_END() +} NETLIST_START(opamp) +{ /* Opamp model from * @@ -96,9 +98,10 @@ NETLIST_START(opamp) NET_C(CP1.1, RP1.1) NET_C(EBUF.IP, RP1.1) -NETLIST_END() +} NETLIST_START(opamp_mod) +{ /* Opamp model from * @@ -184,4 +187,4 @@ NETLIST_START(opamp_mod) #endif NET_C(EBUF.IP, RP1.1) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/opamp_amplification_curve.cpp b/src/lib/netlist/examples/opamp_amplification_curve.cpp index 063867926f3..0cf540eb9f2 100644 --- a/src/lib/netlist/examples/opamp_amplification_curve.cpp +++ b/src/lib/netlist/examples/opamp_amplification_curve.cpp @@ -21,6 +21,7 @@ #define OPAMP_TEST "MB3614(DAB=0.0015)" NETLIST_START(main) +{ /* Standard stuff */ @@ -91,4 +92,4 @@ NETLIST_START(main) LOG(log_Y, R1.1) LOG(log_Z, f) #endif -NETLIST_END() +} diff --git a/src/lib/netlist/examples/rc.c b/src/lib/netlist/examples/rc.c index 140440011b9..b18670292ab 100644 --- a/src/lib/netlist/examples/rc.c +++ b/src/lib/netlist/examples/rc.c @@ -6,6 +6,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(rc) +{ /* * delay circuit @@ -28,4 +29,4 @@ NETLIST_START(rc) LOG(tt, C1.1) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/rl.c b/src/lib/netlist/examples/rl.c index b9f4e4e64c0..3684aa1b701 100644 --- a/src/lib/netlist/examples/rl.c +++ b/src/lib/netlist/examples/rl.c @@ -6,6 +6,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(lr) +{ /* * delay circuit @@ -29,4 +30,4 @@ NETLIST_START(lr) //LOG(log_1, R1.1) //LOG(log_2, clk) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/sn74ls629_osc.c b/src/lib/netlist/examples/sn74ls629_osc.c index 748f549651f..7f923407e26 100644 --- a/src/lib/netlist/examples/sn74ls629_osc.c +++ b/src/lib/netlist/examples/sn74ls629_osc.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(ls629) +{ /* * Astable ne555 @@ -32,4 +33,4 @@ NETLIST_START(ls629) LOG(log2, OSC.Y) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/test.c b/src/lib/netlist/examples/test.c index 9980e47ae74..ee107971442 100644 --- a/src/lib/netlist/examples/test.c +++ b/src/lib/netlist/examples/test.c @@ -10,6 +10,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(bjt) +{ /* Standard stuff */ CLOCK(clk, 1000) // 1000 Hz @@ -84,4 +85,4 @@ NETLIST_START(bjt) //LOG(logB, Q1.B) //LOG(logC, Q1.C) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/todo.c b/src/lib/netlist/examples/todo.c index ecf113d8ff6..6f50b0f22d1 100644 --- a/src/lib/netlist/examples/todo.c +++ b/src/lib/netlist/examples/todo.c @@ -8,6 +8,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(7400_TTL) +{ NET_REGISTER_DEV(7400, s1) NET_REGISTER_DEV(7400, s2) NET_REGISTER_DEV(7400, s3) @@ -29,16 +30,18 @@ NETLIST_START(7400_TTL) ALIAS(13, s4.B); ALIAS(11, s4.Q); -NETLIST_END() +} NETLIST_START(lib) - TRUTHTABLE_START(7400A, 2, 1, 0, "+A,B") +{ + TRUTH_TABLE(7400A, 2, 1, 0, "+A,B") +{ TT_HEAD(" A , B | Q ") TT_LINE(" 0 , X | 1 |22") TT_LINE(" X , 0 | 1 |22") TT_LINE(" 1 , 1 | 0 |15") - TRUTHTABLE_END() -NETLIST_END() + } +} diff --git a/src/lib/netlist/examples/turkey_shoot.cpp b/src/lib/netlist/examples/turkey_shoot.cpp index e5b7f26c72e..ec010b132da 100644 --- a/src/lib/netlist/examples/turkey_shoot.cpp +++ b/src/lib/netlist/examples/turkey_shoot.cpp @@ -58,6 +58,7 @@ NETLIST_START(turkey_shoot_vga) +{ // EESCHEMA NETLIST VERSION 1.1 (SPICE FORMAT) CREATION DATE: WED 01 JUL 2015 11:09:25 PM CEST // TO EXCLUDE A COMPONENT FROM THE SPICE NETLIST ADD [SPICE_NETLIST_ENABLED] USER FIELD SET TO: N // TO REORDER THE COMPONENT SPICE NODE SEQUENCE ADD [SPICE_NODE_SEQUENCE] USER FIELD AND DEFINE SEQUENCE: 2,1,0 @@ -93,9 +94,10 @@ NETLIST_START(turkey_shoot_vga) INCLUDE(turkey_shoot_schematics) -NETLIST_END() +} NETLIST_START(turkey_shoot_schematics) +{ ANALOG_INPUT(I_V12, 12) ANALOG_INPUT(I_V5, 5) @@ -187,10 +189,11 @@ NETLIST_START(turkey_shoot_schematics) ALIAS(BLUE, C54.1) -NETLIST_END() +} NETLIST_START(SHIM74LS374_DIP) +{ NET_MODEL("SPECIAL FAMILY(IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 ORH=1.0e10)") //LOGIC_INPUT8(D, 0, "74XX") @@ -207,5 +210,5 @@ NETLIST_START(SHIM74LS374_DIP) ALIAS(16, D.Q6) ALIAS(19, D.Q7) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/vccs.c b/src/lib/netlist/examples/vccs.c index a5e25588717..ef9e2c35a16 100644 --- a/src/lib/netlist/examples/vccs.c +++ b/src/lib/netlist/examples/vccs.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(vccs) +{ CLOCK(clk, 1000) // 1000 Hz SOLVER(Solver, 48000) @@ -27,4 +28,4 @@ NETLIST_START(vccs) LOG(logX, VV.OP) LOG(logY, clk) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/vccs1.c b/src/lib/netlist/examples/vccs1.c index 89bd9c74ae7..2ef8ccd0074 100644 --- a/src/lib/netlist/examples/vccs1.c +++ b/src/lib/netlist/examples/vccs1.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(vccs) +{ CLOCK(clk, 1000) // 1000 Hz SOLVER(Solver, 48000) @@ -32,4 +33,4 @@ NETLIST_START(vccs) LOG(logX, VV.OP) LOG(logY, clk) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/vs_cs.c b/src/lib/netlist/examples/vs_cs.c index b0c424abcb2..8ed8b150533 100644 --- a/src/lib/netlist/examples/vs_cs.c +++ b/src/lib/netlist/examples/vs_cs.c @@ -10,6 +10,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(rc) +{ /* * delay circuit @@ -49,4 +50,4 @@ NETLIST_START(rc) LOG(tt, VS1.P) LOG(tx, R2.2) -NETLIST_END() +} diff --git a/src/lib/netlist/examples/zdiode.cpp b/src/lib/netlist/examples/zdiode.cpp index 644f813d78c..6b28b245055 100644 --- a/src/lib/netlist/examples/zdiode.cpp +++ b/src/lib/netlist/examples/zdiode.cpp @@ -15,6 +15,7 @@ // ZD.K: voltage at Zener NETLIST_START(zdiode) +{ SOLVER(Solver, 48000) PARAM(Solver.DYNAMIC_TS, 1) @@ -41,5 +42,5 @@ NETLIST_START(zdiode) NET_C(RL.1, ZD.K) NET_C(RL.2, GND) -NETLIST_END() +} //! [zdiode_example] diff --git a/src/lib/netlist/generated/lib_entries.hxx b/src/lib/netlist/generated/lib_entries.hxx index debc626fd47..66407355e33 100644 --- a/src/lib/netlist/generated/lib_entries.hxx +++ b/src/lib/netlist/generated/lib_entries.hxx @@ -114,6 +114,7 @@ LIB_ENTRY(sys_dsw1) LIB_ENTRY(sys_dsw2) LIB_ENTRY(sys_noise_mt_n) LIB_ENTRY(sys_noise_mt_u) +LIB_ENTRY(sys_pulse) LIB_ENTRY(tristate) LIB_ENTRY(tristate3) LIB_ENTRY(varclock) diff --git a/src/lib/netlist/generated/nld_devinc.h b/src/lib/netlist/generated/nld_devinc.h index 3442ec3ed93..2482ba8da9b 100644 --- a/src/lib/netlist/generated/nld_devinc.h +++ b/src/lib/netlist/generated/nld_devinc.h @@ -751,6 +751,10 @@ #define SYS_COMPD(...) \ NET_REGISTER_DEVEXT(SYS_COMPD, __VA_ARGS__) +// usage : SYS_PULSE(name, DELAY, DURATION, INVERT_INPUT, INVERT_OUTPUT) +#define SYS_PULSE(...) \ + NET_REGISTER_DEVEXT(SYS_PULSE, __VA_ARGS__) + // usage : SYS_NOISE_MT_U(name, SIGMA) #define SYS_NOISE_MT_U(...) \ NET_REGISTER_DEVEXT(SYS_NOISE_MT_U, __VA_ARGS__) @@ -1267,8 +1271,7 @@ NETLIST_EXTERNAL(roms_lib) #define TTL_74279B(...) \ NET_REGISTER_DEVEXT(TTL_74279B, __VA_ARGS__) -// usage : TTL_9312(name, A, B, C, G, D0, D1, D2, D3, D4, D5, D6, D7) -// auto connect: VCC, GND +// usage : TTL_9312(name, ) #define TTL_9312(...) \ NET_REGISTER_DEVEXT(TTL_9312, __VA_ARGS__) diff --git a/src/lib/netlist/generated/nlm_modules_lib.cpp b/src/lib/netlist/generated/nlm_modules_lib.cpp index ad8f77a3d8b..6c7aee23a60 100644 --- a/src/lib/netlist/generated/nlm_modules_lib.cpp +++ b/src/lib/netlist/generated/nlm_modules_lib.cpp @@ -1,14 +1,15 @@ // license:CC0 // copyright-holders:Couriersud -// File programmatically created Sun May 22 19:30:34 2022 +// File programmatically created Sat Jul 2 23:43:48 2022 #include "devices/net_lib.h" NETLIST_START(modules_lib) +{ EXTERNAL_LIB_ENTRY(ICL8038_DIP) EXTERNAL_LIB_ENTRY(NE556_DIP) EXTERNAL_LIB_ENTRY(RTEST) -NETLIST_END() +} diff --git a/src/lib/netlist/generated/static_solvers.cpp b/src/lib/netlist/generated/static_solvers.cpp index edfb3233632..07f7f883e6c 100644 --- a/src/lib/netlist/generated/static_solvers.cpp +++ b/src/lib/netlist/generated/static_solvers.cpp @@ -4889,182 +4889,6 @@ static void nl_gcr_95_double_double_24643c159711f292(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } -// armora,solarq,starcas,wotw -static void nl_gcr_22_double_double_1250f340dea396ae(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - double m_A10(0.0); - double m_A11(0.0); - double m_A12(0.0); - double m_A13(0.0); - double m_A14(0.0); - double m_A15(0.0); - double m_A16(0.0); - double m_A17(0.0); - double m_A18(0.0); - double m_A19(0.0); - double m_A20(0.0); - double m_A21(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A0 += gt[3]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 += Idr[3]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; - RHS0 -= go[3] * *cnV[3]; - m_A2 += gt[4]; - m_A2 += gt[5]; - m_A3 += go[4]; - double RHS1 = Idr[4]; - RHS1 += Idr[5]; - RHS1 -= go[5] * *cnV[5]; - m_A4 += gt[6]; - m_A4 += gt[7]; - m_A4 += gt[8]; - m_A4 += gt[9]; - m_A4 += gt[10]; - m_A4 += gt[11]; - m_A4 += gt[12]; - m_A4 += gt[13]; - m_A7 += go[6]; - m_A6 += go[7]; - m_A6 += go[8]; - m_A5 += go[9]; - m_A5 += go[10]; - double RHS2 = Idr[6]; - RHS2 += Idr[7]; - RHS2 += Idr[8]; - RHS2 += Idr[9]; - RHS2 += Idr[10]; - RHS2 += Idr[11]; - RHS2 += Idr[12]; - RHS2 += Idr[13]; - RHS2 -= go[11] * *cnV[11]; - RHS2 -= go[12] * *cnV[12]; - RHS2 -= go[13] * *cnV[13]; - m_A10 += gt[14]; - m_A10 += gt[15]; - m_A10 += gt[16]; - m_A10 += gt[17]; - m_A10 += gt[18]; - m_A10 += gt[19]; - m_A9 += go[14]; - m_A9 += go[15]; - m_A8 += go[16]; - double RHS3 = Idr[14]; - RHS3 += Idr[15]; - RHS3 += Idr[16]; - RHS3 += Idr[17]; - RHS3 += Idr[18]; - RHS3 += Idr[19]; - RHS3 -= go[17] * *cnV[17]; - RHS3 -= go[18] * *cnV[18]; - RHS3 -= go[19] * *cnV[19]; - m_A15 += gt[20]; - m_A15 += gt[21]; - m_A15 += gt[22]; - m_A15 += gt[23]; - m_A15 += gt[24]; - m_A16 += go[20]; - m_A16 += go[21]; - m_A13 += go[22]; - m_A13 += go[23]; - double RHS4 = Idr[20]; - RHS4 += Idr[21]; - RHS4 += Idr[22]; - RHS4 += Idr[23]; - RHS4 += Idr[24]; - RHS4 -= go[24] * *cnV[24]; - m_A21 += gt[25]; - m_A21 += gt[26]; - m_A21 += gt[27]; - m_A21 += gt[28]; - m_A21 += gt[29]; - m_A20 += go[25]; - m_A20 += go[26]; - m_A18 += go[27]; - m_A17 += go[28]; - double RHS5 = Idr[25]; - RHS5 += Idr[26]; - RHS5 += Idr[27]; - RHS5 += Idr[28]; - RHS5 += Idr[29]; - RHS5 -= go[29] * *cnV[29]; - const double f0 = 1.0 / m_A0; - const double f0_3 = -f0 * m_A8; - m_A10 += m_A1 * f0_3; - RHS3 += f0_3 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_5 = -f1 * m_A17; - m_A21 += m_A3 * f1_5; - RHS5 += f1_5 * RHS1; - const double f2 = 1.0 / m_A4; - const double f2_3 = -f2 * m_A9; - m_A10 += m_A5 * f2_3; - m_A11 += m_A6 * f2_3; - m_A12 += m_A7 * f2_3; - RHS3 += f2_3 * RHS2; - const double f2_4 = -f2 * m_A13; - m_A14 += m_A5 * f2_4; - m_A15 += m_A6 * f2_4; - m_A16 += m_A7 * f2_4; - RHS4 += f2_4 * RHS2; - const double f2_5 = -f2 * m_A18; - m_A19 += m_A5 * f2_5; - m_A20 += m_A6 * f2_5; - m_A21 += m_A7 * f2_5; - RHS5 += f2_5 * RHS2; - const double f3 = 1.0 / m_A10; - const double f3_4 = -f3 * m_A14; - m_A15 += m_A11 * f3_4; - m_A16 += m_A12 * f3_4; - RHS4 += f3_4 * RHS3; - const double f3_5 = -f3 * m_A19; - m_A20 += m_A11 * f3_5; - m_A21 += m_A12 * f3_5; - RHS5 += f3_5 * RHS3; - const double f4 = 1.0 / m_A15; - const double f4_5 = -f4 * m_A20; - m_A21 += m_A16 * f4_5; - RHS5 += f4_5 * RHS4; - V[5] = RHS5 / m_A21; - double tmp4 = 0.0; - tmp4 += m_A16 * V[5]; - V[4] = (RHS4 - tmp4) / m_A15; - double tmp3 = 0.0; - tmp3 += m_A11 * V[4]; - tmp3 += m_A12 * V[5]; - V[3] = (RHS3 - tmp3) / m_A10; - double tmp2 = 0.0; - tmp2 += m_A5 * V[3]; - tmp2 += m_A6 * V[4]; - tmp2 += m_A7 * V[5]; - V[2] = (RHS2 - tmp2) / m_A4; - double tmp1 = 0.0; - tmp1 += m_A3 * V[5]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[3]; - V[0] = (RHS0 - tmp0) / m_A0; -} - // armora static void nl_gcr_22_double_double_a6cfda6668b153c2(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -12112,63 +11936,6 @@ static void nl_gcr_46_double_double_536c3652eb3bc075(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } -// astrob,cheekyms,fireone,speedfrk,rebound -static void nl_gcr_7_double_double_7c86a9bc1c6aef4c(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; - m_A2 += gt[3]; - m_A2 += gt[4]; - m_A3 += go[3]; - double RHS1 = Idr[3]; - RHS1 += Idr[4]; - RHS1 -= go[4] * *cnV[4]; - m_A6 += gt[5]; - m_A6 += gt[6]; - m_A6 += gt[7]; - m_A6 += gt[8]; - m_A5 += go[5]; - m_A4 += go[6]; - double RHS2 = Idr[5]; - RHS2 += Idr[6]; - RHS2 += Idr[7]; - RHS2 += Idr[8]; - RHS2 -= go[7] * *cnV[7]; - RHS2 -= go[8] * *cnV[8]; - const double f0 = 1.0 / m_A0; - const double f0_2 = -f0 * m_A4; - m_A6 += m_A1 * f0_2; - RHS2 += f0_2 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_2 = -f1 * m_A5; - m_A6 += m_A3 * f1_2; - RHS2 += f1_2 * RHS1; - V[2] = RHS2 / m_A6; - double tmp1 = 0.0; - tmp1 += m_A3 * V[2]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[2]; - V[0] = (RHS0 - tmp0) / m_A0; -} - // barrier,spacewar static void nl_gcr_10_double_double_a50a4b733e95414a(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -13220,79 +12987,6 @@ static void nl_gcr_47_double_double_6ef39a62161d596c(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } -// boxingb,solarq -static void nl_gcr_10_double_double_d7d45dc58b08cab9(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 -= go[1] * *cnV[1]; - m_A2 += gt[2]; - m_A2 += gt[3]; - m_A2 += gt[4]; - m_A2 += gt[5]; - m_A3 += go[2]; - double RHS1 = Idr[2]; - RHS1 += Idr[3]; - RHS1 += Idr[4]; - RHS1 += Idr[5]; - RHS1 -= go[3] * *cnV[3]; - RHS1 -= go[4] * *cnV[4]; - RHS1 -= go[5] * *cnV[5]; - m_A5 += gt[6]; - m_A5 += gt[7]; - m_A5 += gt[8]; - m_A6 += go[6]; - m_A4 += go[7]; - double RHS2 = Idr[6]; - RHS2 += Idr[7]; - RHS2 += Idr[8]; - RHS2 -= go[8] * *cnV[8]; - m_A9 += gt[9]; - m_A9 += gt[10]; - m_A7 += go[9]; - m_A8 += go[10]; - double RHS3 = Idr[9]; - RHS3 += Idr[10]; - const double f0 = 1.0 / m_A0; - const double f0_2 = -f0 * m_A4; - m_A5 += m_A1 * f0_2; - RHS2 += f0_2 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_3 = -f1 * m_A7; - m_A9 += m_A3 * f1_3; - RHS3 += f1_3 * RHS1; - const double f2 = 1.0 / m_A5; - const double f2_3 = -f2 * m_A8; - m_A9 += m_A6 * f2_3; - RHS3 += f2_3 * RHS2; - V[3] = RHS3 / m_A9; - double tmp2 = 0.0; - tmp2 += m_A6 * V[3]; - V[2] = (RHS2 - tmp2) / m_A5; - double tmp1 = 0.0; - tmp1 += m_A3 * V[3]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[2]; - V[0] = (RHS0 - tmp0) / m_A0; -} - // boxingb static void nl_gcr_16_double_double_50f5194a994d56ec(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -13941,188 +13635,6 @@ static void nl_gcr_23_double_double_53e1117fdb16f546(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } -// boxingb,starcas,wotw -static void nl_gcr_23_double_double_ea2b6e3a05e6ef0b(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - double m_A10(0.0); - double m_A11(0.0); - double m_A12(0.0); - double m_A13(0.0); - double m_A14(0.0); - double m_A15(0.0); - double m_A16(0.0); - double m_A17(0.0); - double m_A18(0.0); - double m_A19(0.0); - double m_A20(0.0); - double m_A21(0.0); - double m_A22(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A0 += gt[3]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 += Idr[3]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; - RHS0 -= go[3] * *cnV[3]; - m_A2 += gt[4]; - m_A2 += gt[5]; - m_A2 += gt[6]; - m_A2 += gt[7]; - m_A2 += gt[8]; - m_A2 += gt[9]; - m_A4 += go[4]; - m_A3 += go[5]; - m_A3 += go[6]; - double RHS1 = Idr[4]; - RHS1 += Idr[5]; - RHS1 += Idr[6]; - RHS1 += Idr[7]; - RHS1 += Idr[8]; - RHS1 += Idr[9]; - RHS1 -= go[7] * *cnV[7]; - RHS1 -= go[8] * *cnV[8]; - RHS1 -= go[9] * *cnV[9]; - m_A5 += gt[10]; - m_A5 += gt[11]; - m_A5 += gt[12]; - m_A5 += gt[13]; - m_A7 += go[10]; - m_A6 += go[11]; - m_A6 += go[12]; - double RHS2 = Idr[10]; - RHS2 += Idr[11]; - RHS2 += Idr[12]; - RHS2 += Idr[13]; - RHS2 -= go[13] * *cnV[13]; - m_A8 += gt[14]; - m_A8 += gt[15]; - m_A9 += go[14]; - double RHS3 = Idr[14]; - RHS3 += Idr[15]; - RHS3 -= go[15] * *cnV[15]; - m_A12 += gt[16]; - m_A12 += gt[17]; - m_A12 += gt[18]; - m_A12 += gt[19]; - m_A12 += gt[20]; - m_A12 += gt[21]; - m_A11 += go[16]; - m_A11 += go[17]; - m_A10 += go[18]; - double RHS4 = Idr[16]; - RHS4 += Idr[17]; - RHS4 += Idr[18]; - RHS4 += Idr[19]; - RHS4 += Idr[20]; - RHS4 += Idr[21]; - RHS4 -= go[19] * *cnV[19]; - RHS4 -= go[20] * *cnV[20]; - RHS4 -= go[21] * *cnV[21]; - m_A17 += gt[22]; - m_A17 += gt[23]; - m_A17 += gt[24]; - m_A17 += gt[25]; - m_A17 += gt[26]; - m_A15 += go[22]; - m_A15 += go[23]; - m_A14 += go[24]; - double RHS5 = Idr[22]; - RHS5 += Idr[23]; - RHS5 += Idr[24]; - RHS5 += Idr[25]; - RHS5 += Idr[26]; - RHS5 -= go[25] * *cnV[25]; - RHS5 -= go[26] * *cnV[26]; - m_A22 += gt[27]; - m_A22 += gt[28]; - m_A22 += gt[29]; - m_A22 += gt[30]; - m_A22 += gt[31]; - m_A20 += go[27]; - m_A19 += go[28]; - double RHS6 = Idr[27]; - RHS6 += Idr[28]; - RHS6 += Idr[29]; - RHS6 += Idr[30]; - RHS6 += Idr[31]; - RHS6 -= go[29] * *cnV[29]; - RHS6 -= go[30] * *cnV[30]; - RHS6 -= go[31] * *cnV[31]; - const double f0 = 1.0 / m_A0; - const double f0_4 = -f0 * m_A10; - m_A12 += m_A1 * f0_4; - RHS4 += f0_4 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_4 = -f1 * m_A11; - m_A12 += m_A3 * f1_4; - m_A13 += m_A4 * f1_4; - RHS4 += f1_4 * RHS1; - const double f1_5 = -f1 * m_A14; - m_A16 += m_A3 * f1_5; - m_A17 += m_A4 * f1_5; - RHS5 += f1_5 * RHS1; - const double f2 = 1.0 / m_A5; - const double f2_5 = -f2 * m_A15; - m_A17 += m_A6 * f2_5; - m_A18 += m_A7 * f2_5; - RHS5 += f2_5 * RHS2; - const double f2_6 = -f2 * m_A19; - m_A21 += m_A6 * f2_6; - m_A22 += m_A7 * f2_6; - RHS6 += f2_6 * RHS2; - const double f3 = 1.0 / m_A8; - const double f3_6 = -f3 * m_A20; - m_A22 += m_A9 * f3_6; - RHS6 += f3_6 * RHS3; - const double f4 = 1.0 / m_A12; - const double f4_5 = -f4 * m_A16; - m_A17 += m_A13 * f4_5; - RHS5 += f4_5 * RHS4; - const double f5 = 1.0 / m_A17; - const double f5_6 = -f5 * m_A21; - m_A22 += m_A18 * f5_6; - RHS6 += f5_6 * RHS5; - V[6] = RHS6 / m_A22; - double tmp5 = 0.0; - tmp5 += m_A18 * V[6]; - V[5] = (RHS5 - tmp5) / m_A17; - double tmp4 = 0.0; - tmp4 += m_A13 * V[5]; - V[4] = (RHS4 - tmp4) / m_A12; - double tmp3 = 0.0; - tmp3 += m_A9 * V[6]; - V[3] = (RHS3 - tmp3) / m_A8; - double tmp2 = 0.0; - tmp2 += m_A6 * V[5]; - tmp2 += m_A7 * V[6]; - V[2] = (RHS2 - tmp2) / m_A5; - double tmp1 = 0.0; - tmp1 += m_A3 * V[4]; - tmp1 += m_A4 * V[5]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[4]; - V[0] = (RHS0 - tmp0) / m_A0; -} - // boxingb static void nl_gcr_23_double_double_f43cf2a28a5a5561(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -18961,7 +18473,7 @@ static void nl_gcr_77_double_double_437326911721091(double * __restrict V, const V[0] = (RHS0 - tmp0) / m_A0; } -// brdrline,dpatrol,stuntcyc +// brdrline,stuntcyc static void nl_gcr_7_double_double_59cb6bf7cb9d17dc(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) { @@ -25445,8 +24957,8 @@ static void nl_gcr_399_double_double_4334c95878d1be92(double * __restrict V, con V[0] = (RHS0 - tmp0) / m_A0; } -// dpatrol,stuntcyc -static void nl_gcr_10_double_double_85652d3e3ada285a(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) +// elim,zektor +static void nl_gcr_10_double_double_11c2ae166b240b6e(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) { @@ -25472,18 +24984,18 @@ static void nl_gcr_10_double_double_85652d3e3ada285a(double * __restrict V, cons RHS0 -= go[2] * *cnV[2]; m_A2 += gt[3]; m_A2 += gt[4]; - m_A2 += gt[5]; m_A3 += go[3]; double RHS1 = Idr[3]; RHS1 += Idr[4]; - RHS1 += Idr[5]; RHS1 -= go[4] * *cnV[4]; - RHS1 -= go[5] * *cnV[5]; - m_A4 += gt[6]; - m_A4 += gt[7]; - m_A4 += gt[8]; - m_A5 += go[6]; - double RHS2 = Idr[6]; + m_A5 += gt[5]; + m_A5 += gt[6]; + m_A5 += gt[7]; + m_A5 += gt[8]; + m_A6 += go[5]; + m_A4 += go[6]; + double RHS2 = Idr[5]; + RHS2 += Idr[6]; RHS2 += Idr[7]; RHS2 += Idr[8]; RHS2 -= go[7] * *cnV[7]; @@ -25492,40 +25004,43 @@ static void nl_gcr_10_double_double_85652d3e3ada285a(double * __restrict V, cons m_A9 += gt[10]; m_A9 += gt[11]; m_A9 += gt[12]; + m_A9 += gt[13]; m_A8 += go[9]; m_A7 += go[10]; - m_A6 += go[11]; double RHS3 = Idr[9]; RHS3 += Idr[10]; RHS3 += Idr[11]; RHS3 += Idr[12]; + RHS3 += Idr[13]; + RHS3 -= go[11] * *cnV[11]; RHS3 -= go[12] * *cnV[12]; + RHS3 -= go[13] * *cnV[13]; const double f0 = 1.0 / m_A0; - const double f0_3 = -f0 * m_A6; - m_A9 += m_A1 * f0_3; - RHS3 += f0_3 * RHS0; + const double f0_2 = -f0 * m_A4; + m_A5 += m_A1 * f0_2; + RHS2 += f0_2 * RHS0; const double f1 = 1.0 / m_A2; const double f1_3 = -f1 * m_A7; m_A9 += m_A3 * f1_3; RHS3 += f1_3 * RHS1; - const double f2 = 1.0 / m_A4; + const double f2 = 1.0 / m_A5; const double f2_3 = -f2 * m_A8; - m_A9 += m_A5 * f2_3; + m_A9 += m_A6 * f2_3; RHS3 += f2_3 * RHS2; V[3] = RHS3 / m_A9; double tmp2 = 0.0; - tmp2 += m_A5 * V[3]; - V[2] = (RHS2 - tmp2) / m_A4; + tmp2 += m_A6 * V[3]; + V[2] = (RHS2 - tmp2) / m_A5; double tmp1 = 0.0; tmp1 += m_A3 * V[3]; V[1] = (RHS1 - tmp1) / m_A2; double tmp0 = 0.0; - tmp0 += m_A1 * V[3]; + tmp0 += m_A1 * V[2]; V[0] = (RHS0 - tmp0) / m_A0; } -// dpatrol -static void nl_gcr_20_double_double_18f4d9160b51d613(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) +// elim,zektor +static void nl_gcr_10_double_double_81f40a54af2ca202(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) { @@ -25540,140 +25055,77 @@ static void nl_gcr_20_double_double_18f4d9160b51d613(double * __restrict V, cons double m_A7(0.0); double m_A8(0.0); double m_A9(0.0); - double m_A10(0.0); - double m_A11(0.0); - double m_A12(0.0); - double m_A13(0.0); - double m_A14(0.0); - double m_A15(0.0); - double m_A16(0.0); - double m_A17(0.0); - double m_A18(0.0); - double m_A19(0.0); m_A0 += gt[0]; m_A0 += gt[1]; m_A0 += gt[2]; - m_A0 += gt[3]; m_A1 += go[0]; double RHS0 = Idr[0]; RHS0 += Idr[1]; RHS0 += Idr[2]; - RHS0 += Idr[3]; RHS0 -= go[1] * *cnV[1]; RHS0 -= go[2] * *cnV[2]; - RHS0 -= go[3] * *cnV[3]; + m_A2 += gt[3]; m_A2 += gt[4]; - m_A3 += go[4]; - double RHS1 = Idr[4]; - m_A4 += gt[5]; - m_A4 += gt[6]; - m_A4 += gt[7]; - m_A4 += gt[8]; - m_A4 += gt[9]; + m_A3 += go[3]; + double RHS1 = Idr[3]; + RHS1 += Idr[4]; + RHS1 -= go[4] * *cnV[4]; + m_A5 += gt[5]; + m_A5 += gt[6]; + m_A5 += gt[7]; + m_A5 += gt[8]; m_A6 += go[5]; - m_A5 += go[6]; + m_A4 += go[6]; double RHS2 = Idr[5]; RHS2 += Idr[6]; RHS2 += Idr[7]; RHS2 += Idr[8]; - RHS2 += Idr[9]; RHS2 -= go[7] * *cnV[7]; RHS2 -= go[8] * *cnV[8]; - RHS2 -= go[9] * *cnV[9]; - m_A8 += gt[10]; - m_A8 += gt[11]; - m_A8 += gt[12]; - m_A8 += gt[13]; - m_A8 += gt[14]; - m_A8 += gt[15]; - m_A8 += gt[16]; - m_A10 += go[10]; - m_A9 += go[11]; - m_A7 += go[12]; - double RHS3 = Idr[10]; + m_A9 += gt[9]; + m_A9 += gt[10]; + m_A9 += gt[11]; + m_A9 += gt[12]; + m_A9 += gt[13]; + m_A9 += gt[14]; + m_A8 += go[9]; + m_A7 += go[10]; + double RHS3 = Idr[9]; + RHS3 += Idr[10]; RHS3 += Idr[11]; RHS3 += Idr[12]; RHS3 += Idr[13]; RHS3 += Idr[14]; - RHS3 += Idr[15]; - RHS3 += Idr[16]; + RHS3 -= go[11] * *cnV[11]; + RHS3 -= go[12] * *cnV[12]; RHS3 -= go[13] * *cnV[13]; RHS3 -= go[14] * *cnV[14]; - RHS3 -= go[15] * *cnV[15]; - RHS3 -= go[16] * *cnV[16]; - m_A14 += gt[17]; - m_A14 += gt[18]; - m_A14 += gt[19]; - m_A14 += gt[20]; - m_A11 += go[17]; - m_A12 += go[18]; - m_A13 += go[19]; - double RHS4 = Idr[17]; - RHS4 += Idr[18]; - RHS4 += Idr[19]; - RHS4 += Idr[20]; - RHS4 -= go[20] * *cnV[20]; - m_A19 += gt[21]; - m_A19 += gt[22]; - m_A19 += gt[23]; - m_A16 += go[21]; - m_A17 += go[22]; - double RHS5 = Idr[21]; - RHS5 += Idr[22]; - RHS5 += Idr[23]; - RHS5 -= go[23] * *cnV[23]; const double f0 = 1.0 / m_A0; - const double f0_3 = -f0 * m_A7; - m_A8 += m_A1 * f0_3; - RHS3 += f0_3 * RHS0; + const double f0_2 = -f0 * m_A4; + m_A5 += m_A1 * f0_2; + RHS2 += f0_2 * RHS0; const double f1 = 1.0 / m_A2; - const double f1_4 = -f1 * m_A11; - m_A14 += m_A3 * f1_4; - RHS4 += f1_4 * RHS1; - const double f2 = 1.0 / m_A4; - const double f2_4 = -f2 * m_A12; - m_A14 += m_A5 * f2_4; - m_A15 += m_A6 * f2_4; - RHS4 += f2_4 * RHS2; - const double f2_5 = -f2 * m_A16; - m_A18 += m_A5 * f2_5; - m_A19 += m_A6 * f2_5; - RHS5 += f2_5 * RHS2; - const double f3 = 1.0 / m_A8; - const double f3_4 = -f3 * m_A13; - m_A14 += m_A9 * f3_4; - m_A15 += m_A10 * f3_4; - RHS4 += f3_4 * RHS3; - const double f3_5 = -f3 * m_A17; - m_A18 += m_A9 * f3_5; - m_A19 += m_A10 * f3_5; - RHS5 += f3_5 * RHS3; - const double f4 = 1.0 / m_A14; - const double f4_5 = -f4 * m_A18; - m_A19 += m_A15 * f4_5; - RHS5 += f4_5 * RHS4; - V[5] = RHS5 / m_A19; - double tmp4 = 0.0; - tmp4 += m_A15 * V[5]; - V[4] = (RHS4 - tmp4) / m_A14; - double tmp3 = 0.0; - tmp3 += m_A9 * V[4]; - tmp3 += m_A10 * V[5]; - V[3] = (RHS3 - tmp3) / m_A8; + const double f1_3 = -f1 * m_A7; + m_A9 += m_A3 * f1_3; + RHS3 += f1_3 * RHS1; + const double f2 = 1.0 / m_A5; + const double f2_3 = -f2 * m_A8; + m_A9 += m_A6 * f2_3; + RHS3 += f2_3 * RHS2; + V[3] = RHS3 / m_A9; double tmp2 = 0.0; - tmp2 += m_A5 * V[4]; - tmp2 += m_A6 * V[5]; - V[2] = (RHS2 - tmp2) / m_A4; + tmp2 += m_A6 * V[3]; + V[2] = (RHS2 - tmp2) / m_A5; double tmp1 = 0.0; - tmp1 += m_A3 * V[4]; + tmp1 += m_A3 * V[3]; V[1] = (RHS1 - tmp1) / m_A2; double tmp0 = 0.0; - tmp0 += m_A1 * V[3]; + tmp0 += m_A1 * V[2]; V[0] = (RHS0 - tmp0) / m_A0; } -// dpatrol,stuntcyc -static void nl_gcr_22_double_double_ca68d70bd8f2f62e(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) +// elim,zektor +static void nl_gcr_12_double_double_d224211d1af6811d(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) { @@ -25690,362 +25142,45 @@ static void nl_gcr_22_double_double_ca68d70bd8f2f62e(double * __restrict V, cons double m_A9(0.0); double m_A10(0.0); double m_A11(0.0); - double m_A12(0.0); - double m_A13(0.0); - double m_A14(0.0); - double m_A15(0.0); - double m_A16(0.0); - double m_A17(0.0); - double m_A18(0.0); - double m_A19(0.0); - double m_A20(0.0); - double m_A21(0.0); m_A0 += gt[0]; m_A0 += gt[1]; m_A0 += gt[2]; m_A0 += gt[3]; - m_A2 += go[0]; - m_A2 += go[1]; - m_A1 += go[2]; + m_A0 += gt[4]; + m_A0 += gt[5]; + m_A0 += gt[6]; + m_A0 += gt[7]; + m_A0 += gt[8]; + m_A0 += gt[9]; + m_A0 += gt[10]; + m_A0 += gt[11]; + m_A0 += gt[12]; + m_A0 += gt[13]; + m_A0 += gt[14]; + m_A0 += gt[15]; + m_A0 += gt[16]; + m_A0 += gt[17]; + m_A1 += go[0]; double RHS0 = Idr[0]; RHS0 += Idr[1]; RHS0 += Idr[2]; RHS0 += Idr[3]; - RHS0 -= go[3] * *cnV[3]; - m_A3 += gt[4]; - m_A3 += gt[5]; - m_A3 += gt[6]; - m_A3 += gt[7]; - m_A5 += go[4]; - m_A5 += go[5]; - m_A4 += go[6]; - double RHS1 = Idr[4]; - RHS1 += Idr[5]; - RHS1 += Idr[6]; - RHS1 += Idr[7]; - RHS1 -= go[7] * *cnV[7]; - m_A6 += gt[8]; - m_A6 += gt[9]; - m_A6 += gt[10]; - m_A7 += go[8]; - double RHS2 = Idr[8]; - RHS2 += Idr[9]; - RHS2 += Idr[10]; - RHS2 -= go[9] * *cnV[9]; - RHS2 -= go[10] * *cnV[10]; - m_A10 += gt[11]; - m_A10 += gt[12]; - m_A10 += gt[13]; - m_A12 += go[11]; - m_A9 += go[12]; - m_A8 += go[13]; - double RHS3 = Idr[11]; - RHS3 += Idr[12]; - RHS3 += Idr[13]; - m_A16 += gt[14]; - m_A16 += gt[15]; - m_A16 += gt[16]; - m_A16 += gt[17]; - m_A16 += gt[18]; - m_A17 += go[14]; - m_A14 += go[15]; - m_A14 += go[16]; - m_A13 += go[17]; - m_A13 += go[18]; - double RHS4 = Idr[14]; - RHS4 += Idr[15]; - RHS4 += Idr[16]; - RHS4 += Idr[17]; - RHS4 += Idr[18]; - m_A21 += gt[19]; - m_A21 += gt[20]; - m_A21 += gt[21]; - m_A18 += go[19]; - m_A20 += go[20]; - m_A19 += go[21]; - double RHS5 = Idr[19]; - RHS5 += Idr[20]; - RHS5 += Idr[21]; - const double f0 = 1.0 / m_A0; - const double f0_3 = -f0 * m_A8; - m_A10 += m_A1 * f0_3; - m_A11 += m_A2 * f0_3; - RHS3 += f0_3 * RHS0; - const double f0_4 = -f0 * m_A13; - m_A15 += m_A1 * f0_4; - m_A16 += m_A2 * f0_4; - RHS4 += f0_4 * RHS0; - const double f1 = 1.0 / m_A3; - const double f1_3 = -f1 * m_A9; - m_A10 += m_A4 * f1_3; - m_A11 += m_A5 * f1_3; - RHS3 += f1_3 * RHS1; - const double f1_4 = -f1 * m_A14; - m_A15 += m_A4 * f1_4; - m_A16 += m_A5 * f1_4; - RHS4 += f1_4 * RHS1; - const double f2 = 1.0 / m_A6; - const double f2_5 = -f2 * m_A18; - m_A21 += m_A7 * f2_5; - RHS5 += f2_5 * RHS2; - const double f3 = 1.0 / m_A10; - const double f3_4 = -f3 * m_A15; - m_A16 += m_A11 * f3_4; - m_A17 += m_A12 * f3_4; - RHS4 += f3_4 * RHS3; - const double f3_5 = -f3 * m_A19; - m_A20 += m_A11 * f3_5; - m_A21 += m_A12 * f3_5; - RHS5 += f3_5 * RHS3; - const double f4 = 1.0 / m_A16; - const double f4_5 = -f4 * m_A20; - m_A21 += m_A17 * f4_5; - RHS5 += f4_5 * RHS4; - V[5] = RHS5 / m_A21; - double tmp4 = 0.0; - tmp4 += m_A17 * V[5]; - V[4] = (RHS4 - tmp4) / m_A16; - double tmp3 = 0.0; - tmp3 += m_A11 * V[4]; - tmp3 += m_A12 * V[5]; - V[3] = (RHS3 - tmp3) / m_A10; - double tmp2 = 0.0; - tmp2 += m_A7 * V[5]; - V[2] = (RHS2 - tmp2) / m_A6; - double tmp1 = 0.0; - tmp1 += m_A4 * V[3]; - tmp1 += m_A5 * V[4]; - V[1] = (RHS1 - tmp1) / m_A3; - double tmp0 = 0.0; - tmp0 += m_A1 * V[3]; - tmp0 += m_A2 * V[4]; - V[0] = (RHS0 - tmp0) / m_A0; -} - -// elim,zektor -static void nl_gcr_10_double_double_11c2ae166b240b6e(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; - m_A2 += gt[3]; - m_A2 += gt[4]; - m_A3 += go[3]; - double RHS1 = Idr[3]; - RHS1 += Idr[4]; - RHS1 -= go[4] * *cnV[4]; - m_A5 += gt[5]; - m_A5 += gt[6]; - m_A5 += gt[7]; - m_A5 += gt[8]; - m_A6 += go[5]; - m_A4 += go[6]; - double RHS2 = Idr[5]; - RHS2 += Idr[6]; - RHS2 += Idr[7]; - RHS2 += Idr[8]; - RHS2 -= go[7] * *cnV[7]; - RHS2 -= go[8] * *cnV[8]; - m_A9 += gt[9]; - m_A9 += gt[10]; - m_A9 += gt[11]; - m_A9 += gt[12]; - m_A9 += gt[13]; - m_A8 += go[9]; - m_A7 += go[10]; - double RHS3 = Idr[9]; - RHS3 += Idr[10]; - RHS3 += Idr[11]; - RHS3 += Idr[12]; - RHS3 += Idr[13]; - RHS3 -= go[11] * *cnV[11]; - RHS3 -= go[12] * *cnV[12]; - RHS3 -= go[13] * *cnV[13]; - const double f0 = 1.0 / m_A0; - const double f0_2 = -f0 * m_A4; - m_A5 += m_A1 * f0_2; - RHS2 += f0_2 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_3 = -f1 * m_A7; - m_A9 += m_A3 * f1_3; - RHS3 += f1_3 * RHS1; - const double f2 = 1.0 / m_A5; - const double f2_3 = -f2 * m_A8; - m_A9 += m_A6 * f2_3; - RHS3 += f2_3 * RHS2; - V[3] = RHS3 / m_A9; - double tmp2 = 0.0; - tmp2 += m_A6 * V[3]; - V[2] = (RHS2 - tmp2) / m_A5; - double tmp1 = 0.0; - tmp1 += m_A3 * V[3]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[2]; - V[0] = (RHS0 - tmp0) / m_A0; -} - -// elim,zektor -static void nl_gcr_10_double_double_81f40a54af2ca202(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; - m_A2 += gt[3]; - m_A2 += gt[4]; - m_A3 += go[3]; - double RHS1 = Idr[3]; - RHS1 += Idr[4]; - RHS1 -= go[4] * *cnV[4]; - m_A5 += gt[5]; - m_A5 += gt[6]; - m_A5 += gt[7]; - m_A5 += gt[8]; - m_A6 += go[5]; - m_A4 += go[6]; - double RHS2 = Idr[5]; - RHS2 += Idr[6]; - RHS2 += Idr[7]; - RHS2 += Idr[8]; - RHS2 -= go[7] * *cnV[7]; - RHS2 -= go[8] * *cnV[8]; - m_A9 += gt[9]; - m_A9 += gt[10]; - m_A9 += gt[11]; - m_A9 += gt[12]; - m_A9 += gt[13]; - m_A9 += gt[14]; - m_A8 += go[9]; - m_A7 += go[10]; - double RHS3 = Idr[9]; - RHS3 += Idr[10]; - RHS3 += Idr[11]; - RHS3 += Idr[12]; - RHS3 += Idr[13]; - RHS3 += Idr[14]; - RHS3 -= go[11] * *cnV[11]; - RHS3 -= go[12] * *cnV[12]; - RHS3 -= go[13] * *cnV[13]; - RHS3 -= go[14] * *cnV[14]; - const double f0 = 1.0 / m_A0; - const double f0_2 = -f0 * m_A4; - m_A5 += m_A1 * f0_2; - RHS2 += f0_2 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_3 = -f1 * m_A7; - m_A9 += m_A3 * f1_3; - RHS3 += f1_3 * RHS1; - const double f2 = 1.0 / m_A5; - const double f2_3 = -f2 * m_A8; - m_A9 += m_A6 * f2_3; - RHS3 += f2_3 * RHS2; - V[3] = RHS3 / m_A9; - double tmp2 = 0.0; - tmp2 += m_A6 * V[3]; - V[2] = (RHS2 - tmp2) / m_A5; - double tmp1 = 0.0; - tmp1 += m_A3 * V[3]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[2]; - V[0] = (RHS0 - tmp0) / m_A0; -} - -// elim,zektor -static void nl_gcr_12_double_double_d224211d1af6811d(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - double m_A10(0.0); - double m_A11(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A0 += gt[3]; - m_A0 += gt[4]; - m_A0 += gt[5]; - m_A0 += gt[6]; - m_A0 += gt[7]; - m_A0 += gt[8]; - m_A0 += gt[9]; - m_A0 += gt[10]; - m_A0 += gt[11]; - m_A0 += gt[12]; - m_A0 += gt[13]; - m_A0 += gt[14]; - m_A0 += gt[15]; - m_A0 += gt[16]; - m_A0 += gt[17]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 += Idr[3]; - RHS0 += Idr[4]; - RHS0 += Idr[5]; - RHS0 += Idr[6]; - RHS0 += Idr[7]; - RHS0 += Idr[8]; - RHS0 += Idr[9]; - RHS0 += Idr[10]; - RHS0 += Idr[11]; - RHS0 += Idr[12]; - RHS0 += Idr[13]; - RHS0 += Idr[14]; - RHS0 += Idr[15]; - RHS0 += Idr[16]; - RHS0 += Idr[17]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; + RHS0 += Idr[4]; + RHS0 += Idr[5]; + RHS0 += Idr[6]; + RHS0 += Idr[7]; + RHS0 += Idr[8]; + RHS0 += Idr[9]; + RHS0 += Idr[10]; + RHS0 += Idr[11]; + RHS0 += Idr[12]; + RHS0 += Idr[13]; + RHS0 += Idr[14]; + RHS0 += Idr[15]; + RHS0 += Idr[16]; + RHS0 += Idr[17]; + RHS0 -= go[1] * *cnV[1]; + RHS0 -= go[2] * *cnV[2]; RHS0 -= go[3] * *cnV[3]; RHS0 -= go[4] * *cnV[4]; RHS0 -= go[5] * *cnV[5]; @@ -32851,6 +31986,63 @@ static void nl_gcr_79_double_double_c1d22fe6e895255d(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } +// fireone,astrob,rebound,speedfrk,cheekyms +static void nl_gcr_7_double_double_7c86a9bc1c6aef4c(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A0 += gt[2]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 += Idr[2]; + RHS0 -= go[1] * *cnV[1]; + RHS0 -= go[2] * *cnV[2]; + m_A2 += gt[3]; + m_A2 += gt[4]; + m_A3 += go[3]; + double RHS1 = Idr[3]; + RHS1 += Idr[4]; + RHS1 -= go[4] * *cnV[4]; + m_A6 += gt[5]; + m_A6 += gt[6]; + m_A6 += gt[7]; + m_A6 += gt[8]; + m_A5 += go[5]; + m_A4 += go[6]; + double RHS2 = Idr[5]; + RHS2 += Idr[6]; + RHS2 += Idr[7]; + RHS2 += Idr[8]; + RHS2 -= go[7] * *cnV[7]; + RHS2 -= go[8] * *cnV[8]; + const double f0 = 1.0 / m_A0; + const double f0_2 = -f0 * m_A4; + m_A6 += m_A1 * f0_2; + RHS2 += f0_2 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_2 = -f1 * m_A5; + m_A6 += m_A3 * f1_2; + RHS2 += f1_2 * RHS1; + V[2] = RHS2 / m_A6; + double tmp1 = 0.0; + tmp1 += m_A3 * V[2]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[2]; + V[0] = (RHS0 - tmp0) / m_A0; +} + // fireone static void nl_gcr_7_double_double_e7fb484f621b3ab9(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -37695,151 +36887,6 @@ static void nl_gcr_10_double_double_934712b55bb3b2b2(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } -// gamemachine,tank -static void nl_gcr_19_double_double_491f95430bfdfd05(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - double m_A10(0.0); - double m_A11(0.0); - double m_A12(0.0); - double m_A13(0.0); - double m_A14(0.0); - double m_A15(0.0); - double m_A16(0.0); - double m_A17(0.0); - double m_A18(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; - m_A2 += gt[3]; - m_A2 += gt[4]; - m_A2 += gt[5]; - m_A3 += go[3]; - double RHS1 = Idr[3]; - RHS1 += Idr[4]; - RHS1 += Idr[5]; - RHS1 -= go[4] * *cnV[4]; - RHS1 -= go[5] * *cnV[5]; - m_A4 += gt[6]; - m_A4 += gt[7]; - m_A4 += gt[8]; - m_A5 += go[6]; - double RHS2 = Idr[6]; - RHS2 += Idr[7]; - RHS2 += Idr[8]; - RHS2 -= go[7] * *cnV[7]; - RHS2 -= go[8] * *cnV[8]; - m_A6 += gt[9]; - m_A6 += gt[10]; - m_A6 += gt[11]; - m_A7 += go[9]; - double RHS3 = Idr[9]; - RHS3 += Idr[10]; - RHS3 += Idr[11]; - RHS3 -= go[10] * *cnV[10]; - RHS3 -= go[11] * *cnV[11]; - m_A8 += gt[12]; - m_A8 += gt[13]; - m_A8 += gt[14]; - m_A9 += go[12]; - double RHS4 = Idr[12]; - RHS4 += Idr[13]; - RHS4 += Idr[14]; - RHS4 -= go[13] * *cnV[13]; - RHS4 -= go[14] * *cnV[14]; - m_A10 += gt[15]; - m_A10 += gt[16]; - m_A10 += gt[17]; - m_A11 += go[15]; - double RHS5 = Idr[15]; - RHS5 += Idr[16]; - RHS5 += Idr[17]; - RHS5 -= go[16] * *cnV[16]; - RHS5 -= go[17] * *cnV[17]; - m_A18 += gt[18]; - m_A18 += gt[19]; - m_A18 += gt[20]; - m_A18 += gt[21]; - m_A18 += gt[22]; - m_A18 += gt[23]; - m_A18 += gt[24]; - m_A17 += go[18]; - m_A16 += go[19]; - m_A15 += go[20]; - m_A14 += go[21]; - m_A13 += go[22]; - m_A12 += go[23]; - double RHS6 = Idr[18]; - RHS6 += Idr[19]; - RHS6 += Idr[20]; - RHS6 += Idr[21]; - RHS6 += Idr[22]; - RHS6 += Idr[23]; - RHS6 += Idr[24]; - RHS6 -= go[24] * *cnV[24]; - const double f0 = 1.0 / m_A0; - const double f0_6 = -f0 * m_A12; - m_A18 += m_A1 * f0_6; - RHS6 += f0_6 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_6 = -f1 * m_A13; - m_A18 += m_A3 * f1_6; - RHS6 += f1_6 * RHS1; - const double f2 = 1.0 / m_A4; - const double f2_6 = -f2 * m_A14; - m_A18 += m_A5 * f2_6; - RHS6 += f2_6 * RHS2; - const double f3 = 1.0 / m_A6; - const double f3_6 = -f3 * m_A15; - m_A18 += m_A7 * f3_6; - RHS6 += f3_6 * RHS3; - const double f4 = 1.0 / m_A8; - const double f4_6 = -f4 * m_A16; - m_A18 += m_A9 * f4_6; - RHS6 += f4_6 * RHS4; - const double f5 = 1.0 / m_A10; - const double f5_6 = -f5 * m_A17; - m_A18 += m_A11 * f5_6; - RHS6 += f5_6 * RHS5; - V[6] = RHS6 / m_A18; - double tmp5 = 0.0; - tmp5 += m_A11 * V[6]; - V[5] = (RHS5 - tmp5) / m_A10; - double tmp4 = 0.0; - tmp4 += m_A9 * V[6]; - V[4] = (RHS4 - tmp4) / m_A8; - double tmp3 = 0.0; - tmp3 += m_A7 * V[6]; - V[3] = (RHS3 - tmp3) / m_A6; - double tmp2 = 0.0; - tmp2 += m_A5 * V[6]; - V[2] = (RHS2 - tmp2) / m_A4; - double tmp1 = 0.0; - tmp1 += m_A3 * V[6]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[6]; - V[0] = (RHS0 - tmp0) / m_A0; -} - // gamemachine static void nl_gcr_7_double_double_782d79b5cbe953b1(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -39055,6 +38102,352 @@ static void nl_gcr_14_double_double_d05b3dbe370c7904(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } +// jpmsru +static void nl_gcr_55_double_double_4963a2f104e4c797(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + double m_A10(0.0); + double m_A11(0.0); + double m_A12(0.0); + double m_A13(0.0); + double m_A14(0.0); + double m_A15(0.0); + double m_A16(0.0); + double m_A17(0.0); + double m_A18(0.0); + double m_A19(0.0); + double m_A20(0.0); + double m_A21(0.0); + double m_A22(0.0); + double m_A23(0.0); + double m_A24(0.0); + double m_A25(0.0); + double m_A26(0.0); + double m_A27(0.0); + double m_A28(0.0); + double m_A29(0.0); + double m_A30(0.0); + double m_A31(0.0); + double m_A32(0.0); + double m_A33(0.0); + double m_A34(0.0); + double m_A35(0.0); + double m_A36(0.0); + double m_A37(0.0); + double m_A38(0.0); + double m_A39(0.0); + double m_A40(0.0); + double m_A41(0.0); + double m_A42(0.0); + double m_A43(0.0); + double m_A44(0.0); + double m_A45(0.0); + double m_A46(0.0); + double m_A47(0.0); + double m_A48(0.0); + double m_A49(0.0); + double m_A50(0.0); + double m_A51(0.0); + double m_A52(0.0); + double m_A53(0.0); + double m_A54(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 -= go[1] * *cnV[1]; + m_A2 += gt[2]; + m_A2 += gt[3]; + m_A2 += gt[4]; + m_A2 += gt[5]; + m_A4 += go[2]; + m_A3 += go[3]; + m_A5 += go[4]; + double RHS1 = Idr[2]; + RHS1 += Idr[3]; + RHS1 += Idr[4]; + RHS1 += Idr[5]; + RHS1 -= go[5] * *cnV[5]; + m_A6 += gt[6]; + m_A6 += gt[7]; + m_A6 += gt[8]; + m_A7 += go[6]; + double RHS2 = Idr[6]; + RHS2 += Idr[7]; + RHS2 += Idr[8]; + RHS2 -= go[7] * *cnV[7]; + RHS2 -= go[8] * *cnV[8]; + m_A8 += gt[9]; + m_A8 += gt[10]; + m_A9 += go[9]; + double RHS3 = Idr[9]; + RHS3 += Idr[10]; + RHS3 -= go[10] * *cnV[10]; + m_A10 += gt[11]; + m_A10 += gt[12]; + m_A11 += go[11]; + double RHS4 = Idr[11]; + RHS4 += Idr[12]; + RHS4 -= go[12] * *cnV[12]; + m_A12 += gt[13]; + m_A12 += gt[14]; + m_A13 += go[13]; + double RHS5 = Idr[13]; + RHS5 += Idr[14]; + RHS5 -= go[14] * *cnV[14]; + m_A14 += gt[15]; + m_A14 += gt[16]; + m_A15 += go[15]; + double RHS6 = Idr[15]; + RHS6 += Idr[16]; + RHS6 -= go[16] * *cnV[16]; + m_A16 += gt[17]; + m_A16 += gt[18]; + m_A18 += go[17]; + m_A17 += go[18]; + double RHS7 = Idr[17]; + RHS7 += Idr[18]; + m_A19 += gt[19]; + m_A19 += gt[20]; + m_A20 += go[19]; + double RHS8 = Idr[19]; + RHS8 += Idr[20]; + RHS8 -= go[20] * *cnV[20]; + m_A21 += gt[21]; + m_A21 += gt[22]; + m_A21 += gt[23]; + m_A22 += go[21]; + double RHS9 = Idr[21]; + RHS9 += Idr[22]; + RHS9 += Idr[23]; + RHS9 -= go[22] * *cnV[22]; + RHS9 -= go[23] * *cnV[23]; + m_A25 += gt[24]; + m_A25 += gt[25]; + m_A25 += gt[26]; + m_A25 += gt[27]; + m_A25 += gt[28]; + m_A23 += go[24]; + m_A27 += go[25]; + double RHS10 = Idr[24]; + RHS10 += Idr[25]; + RHS10 += Idr[26]; + RHS10 += Idr[27]; + RHS10 += Idr[28]; + RHS10 -= go[26] * *cnV[26]; + RHS10 -= go[27] * *cnV[27]; + RHS10 -= go[28] * *cnV[28]; + m_A29 += gt[29]; + m_A29 += gt[30]; + m_A30 += go[29]; + double RHS11 = Idr[29]; + RHS11 += Idr[30]; + RHS11 -= go[30] * *cnV[30]; + m_A33 += gt[31]; + m_A33 += gt[32]; + m_A33 += gt[33]; + m_A33 += gt[34]; + m_A33 += gt[35]; + m_A35 += go[31]; + m_A31 += go[32]; + m_A32 += go[33]; + double RHS12 = Idr[31]; + RHS12 += Idr[32]; + RHS12 += Idr[33]; + RHS12 += Idr[34]; + RHS12 += Idr[35]; + RHS12 -= go[34] * *cnV[34]; + RHS12 -= go[35] * *cnV[35]; + m_A39 += gt[36]; + m_A39 += gt[37]; + m_A39 += gt[38]; + m_A39 += gt[39]; + m_A40 += go[36]; + m_A37 += go[37]; + m_A36 += go[38]; + double RHS13 = Idr[36]; + RHS13 += Idr[37]; + RHS13 += Idr[38]; + RHS13 += Idr[39]; + RHS13 -= go[39] * *cnV[39]; + m_A45 += gt[40]; + m_A45 += gt[41]; + m_A45 += gt[42]; + m_A43 += go[40]; + m_A46 += go[41]; + m_A42 += go[42]; + double RHS14 = Idr[40]; + RHS14 += Idr[41]; + RHS14 += Idr[42]; + m_A54 += gt[43]; + m_A54 += gt[44]; + m_A54 += gt[45]; + m_A54 += gt[46]; + m_A54 += gt[47]; + m_A54 += gt[48]; + m_A54 += gt[49]; + m_A54 += gt[50]; + m_A54 += gt[51]; + m_A52 += go[43]; + m_A51 += go[44]; + m_A50 += go[45]; + m_A49 += go[46]; + m_A48 += go[47]; + m_A47 += go[48]; + m_A53 += go[49]; + double RHS15 = Idr[43]; + RHS15 += Idr[44]; + RHS15 += Idr[45]; + RHS15 += Idr[46]; + RHS15 += Idr[47]; + RHS15 += Idr[48]; + RHS15 += Idr[49]; + RHS15 += Idr[50]; + RHS15 += Idr[51]; + RHS15 -= go[50] * *cnV[50]; + RHS15 -= go[51] * *cnV[51]; + const double f0 = 1.0 / m_A0; + const double f0_12 = -f0 * m_A31; + m_A33 += m_A1 * f0_12; + RHS12 += f0_12 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_10 = -f1 * m_A23; + m_A24 += m_A3 * f1_10; + m_A25 += m_A4 * f1_10; + m_A26 += m_A5 * f1_10; + RHS10 += f1_10 * RHS1; + const double f3 = 1.0 / m_A8; + const double f3_15 = -f3 * m_A47; + m_A54 += m_A9 * f3_15; + RHS15 += f3_15 * RHS3; + const double f4 = 1.0 / m_A10; + const double f4_15 = -f4 * m_A48; + m_A54 += m_A11 * f4_15; + RHS15 += f4_15 * RHS4; + const double f5 = 1.0 / m_A12; + const double f5_15 = -f5 * m_A49; + m_A54 += m_A13 * f5_15; + RHS15 += f5_15 * RHS5; + const double f6 = 1.0 / m_A14; + const double f6_15 = -f6 * m_A50; + m_A54 += m_A15 * f6_15; + RHS15 += f6_15 * RHS6; + const double f7 = 1.0 / m_A16; + const double f7_10 = -f7 * m_A24; + m_A26 += m_A17 * f7_10; + m_A28 += m_A18 * f7_10; + RHS10 += f7_10 * RHS7; + const double f7_12 = -f7 * m_A32; + m_A33 += m_A17 * f7_12; + m_A34 += m_A18 * f7_12; + RHS12 += f7_12 * RHS7; + const double f7_13 = -f7 * m_A36; + m_A38 += m_A17 * f7_13; + m_A40 += m_A18 * f7_13; + RHS13 += f7_13 * RHS7; + const double f7_14 = -f7 * m_A42; + m_A44 += m_A17 * f7_14; + m_A45 += m_A18 * f7_14; + RHS14 += f7_14 * RHS7; + const double f8 = 1.0 / m_A19; + const double f8_15 = -f8 * m_A51; + m_A54 += m_A20 * f8_15; + RHS15 += f8_15 * RHS8; + const double f9 = 1.0 / m_A21; + const double f9_14 = -f9 * m_A43; + m_A45 += m_A22 * f9_14; + RHS14 += f9_14 * RHS9; + const double f10 = 1.0 / m_A25; + const double f10_13 = -f10 * m_A37; + m_A38 += m_A26 * f10_13; + m_A39 += m_A27 * f10_13; + m_A40 += m_A28 * f10_13; + RHS13 += f10_13 * RHS10; + const double f11 = 1.0 / m_A29; + const double f11_15 = -f11 * m_A52; + m_A54 += m_A30 * f11_15; + RHS15 += f11_15 * RHS11; + const double f12 = 1.0 / m_A33; + const double f12_13 = -f12 * m_A38; + m_A40 += m_A34 * f12_13; + m_A41 += m_A35 * f12_13; + RHS13 += f12_13 * RHS12; + const double f12_14 = -f12 * m_A44; + m_A45 += m_A34 * f12_14; + m_A46 += m_A35 * f12_14; + RHS14 += f12_14 * RHS12; + const double f14 = 1.0 / m_A45; + const double f14_15 = -f14 * m_A53; + m_A54 += m_A46 * f14_15; + RHS15 += f14_15 * RHS14; + V[15] = RHS15 / m_A54; + double tmp14 = 0.0; + tmp14 += m_A46 * V[15]; + V[14] = (RHS14 - tmp14) / m_A45; + double tmp13 = 0.0; + tmp13 += m_A40 * V[14]; + tmp13 += m_A41 * V[15]; + V[13] = (RHS13 - tmp13) / m_A39; + double tmp12 = 0.0; + tmp12 += m_A34 * V[14]; + tmp12 += m_A35 * V[15]; + V[12] = (RHS12 - tmp12) / m_A33; + double tmp11 = 0.0; + tmp11 += m_A30 * V[15]; + V[11] = (RHS11 - tmp11) / m_A29; + double tmp10 = 0.0; + tmp10 += m_A26 * V[12]; + tmp10 += m_A27 * V[13]; + tmp10 += m_A28 * V[14]; + V[10] = (RHS10 - tmp10) / m_A25; + double tmp9 = 0.0; + tmp9 += m_A22 * V[14]; + V[9] = (RHS9 - tmp9) / m_A21; + double tmp8 = 0.0; + tmp8 += m_A20 * V[15]; + V[8] = (RHS8 - tmp8) / m_A19; + double tmp7 = 0.0; + tmp7 += m_A17 * V[12]; + tmp7 += m_A18 * V[14]; + V[7] = (RHS7 - tmp7) / m_A16; + double tmp6 = 0.0; + tmp6 += m_A15 * V[15]; + V[6] = (RHS6 - tmp6) / m_A14; + double tmp5 = 0.0; + tmp5 += m_A13 * V[15]; + V[5] = (RHS5 - tmp5) / m_A12; + double tmp4 = 0.0; + tmp4 += m_A11 * V[15]; + V[4] = (RHS4 - tmp4) / m_A10; + double tmp3 = 0.0; + tmp3 += m_A9 * V[15]; + V[3] = (RHS3 - tmp3) / m_A8; + double tmp2 = 0.0; + tmp2 += m_A7 * V[10]; + V[2] = (RHS2 - tmp2) / m_A6; + double tmp1 = 0.0; + tmp1 += m_A3 * V[7]; + tmp1 += m_A4 * V[10]; + tmp1 += m_A5 * V[12]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[12]; + V[0] = (RHS0 - tmp0) / m_A0; +} + // kidniki static void nl_gcr_198_double_double_43f7ff9bc651cc7a(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -47417,6 +46810,79 @@ static void nl_gcr_84_double_double_c61e08cf5e35918(double * __restrict V, const V[0] = (RHS0 - tmp0) / m_A0; } +// solarq,boxingb +static void nl_gcr_10_double_double_d7d45dc58b08cab9(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 -= go[1] * *cnV[1]; + m_A2 += gt[2]; + m_A2 += gt[3]; + m_A2 += gt[4]; + m_A2 += gt[5]; + m_A3 += go[2]; + double RHS1 = Idr[2]; + RHS1 += Idr[3]; + RHS1 += Idr[4]; + RHS1 += Idr[5]; + RHS1 -= go[3] * *cnV[3]; + RHS1 -= go[4] * *cnV[4]; + RHS1 -= go[5] * *cnV[5]; + m_A5 += gt[6]; + m_A5 += gt[7]; + m_A5 += gt[8]; + m_A6 += go[6]; + m_A4 += go[7]; + double RHS2 = Idr[6]; + RHS2 += Idr[7]; + RHS2 += Idr[8]; + RHS2 -= go[8] * *cnV[8]; + m_A9 += gt[9]; + m_A9 += gt[10]; + m_A7 += go[9]; + m_A8 += go[10]; + double RHS3 = Idr[9]; + RHS3 += Idr[10]; + const double f0 = 1.0 / m_A0; + const double f0_2 = -f0 * m_A4; + m_A5 += m_A1 * f0_2; + RHS2 += f0_2 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_3 = -f1 * m_A7; + m_A9 += m_A3 * f1_3; + RHS3 += f1_3 * RHS1; + const double f2 = 1.0 / m_A5; + const double f2_3 = -f2 * m_A8; + m_A9 += m_A6 * f2_3; + RHS3 += f2_3 * RHS2; + V[3] = RHS3 / m_A9; + double tmp2 = 0.0; + tmp2 += m_A6 * V[3]; + V[2] = (RHS2 - tmp2) / m_A5; + double tmp1 = 0.0; + tmp1 += m_A3 * V[3]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[2]; + V[0] = (RHS0 - tmp0) / m_A0; +} + // solarq static void nl_gcr_15_double_double_7caaa135bff3d9f3(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -47680,198 +47146,6 @@ static void nl_gcr_20_double_double_66496d6073aca98e(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } -// solarq,starcas,wotw -static void nl_gcr_25_double_double_4cb524006206eb1a(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) - -{ - - plib::unused_var(cnV); - double m_A0(0.0); - double m_A1(0.0); - double m_A2(0.0); - double m_A3(0.0); - double m_A4(0.0); - double m_A5(0.0); - double m_A6(0.0); - double m_A7(0.0); - double m_A8(0.0); - double m_A9(0.0); - double m_A10(0.0); - double m_A11(0.0); - double m_A12(0.0); - double m_A13(0.0); - double m_A14(0.0); - double m_A15(0.0); - double m_A16(0.0); - double m_A17(0.0); - double m_A18(0.0); - double m_A19(0.0); - double m_A20(0.0); - double m_A21(0.0); - double m_A22(0.0); - double m_A23(0.0); - double m_A24(0.0); - m_A0 += gt[0]; - m_A0 += gt[1]; - m_A0 += gt[2]; - m_A0 += gt[3]; - m_A1 += go[0]; - double RHS0 = Idr[0]; - RHS0 += Idr[1]; - RHS0 += Idr[2]; - RHS0 += Idr[3]; - RHS0 -= go[1] * *cnV[1]; - RHS0 -= go[2] * *cnV[2]; - RHS0 -= go[3] * *cnV[3]; - m_A2 += gt[4]; - m_A2 += gt[5]; - m_A2 += gt[6]; - m_A2 += gt[7]; - m_A2 += gt[8]; - m_A2 += gt[9]; - m_A2 += gt[10]; - m_A2 += gt[11]; - m_A5 += go[4]; - m_A4 += go[5]; - m_A4 += go[6]; - m_A3 += go[7]; - m_A3 += go[8]; - double RHS1 = Idr[4]; - RHS1 += Idr[5]; - RHS1 += Idr[6]; - RHS1 += Idr[7]; - RHS1 += Idr[8]; - RHS1 += Idr[9]; - RHS1 += Idr[10]; - RHS1 += Idr[11]; - RHS1 -= go[9] * *cnV[9]; - RHS1 -= go[10] * *cnV[10]; - RHS1 -= go[11] * *cnV[11]; - m_A6 += gt[12]; - m_A6 += gt[13]; - m_A7 += go[12]; - double RHS2 = Idr[12]; - RHS2 += Idr[13]; - RHS2 -= go[13] * *cnV[13]; - m_A10 += gt[14]; - m_A10 += gt[15]; - m_A10 += gt[16]; - m_A10 += gt[17]; - m_A10 += gt[18]; - m_A10 += gt[19]; - m_A9 += go[14]; - m_A9 += go[15]; - m_A8 += go[16]; - double RHS3 = Idr[14]; - RHS3 += Idr[15]; - RHS3 += Idr[16]; - RHS3 += Idr[17]; - RHS3 += Idr[18]; - RHS3 += Idr[19]; - RHS3 -= go[17] * *cnV[17]; - RHS3 -= go[18] * *cnV[18]; - RHS3 -= go[19] * *cnV[19]; - m_A15 += gt[20]; - m_A15 += gt[21]; - m_A15 += gt[22]; - m_A15 += gt[23]; - m_A15 += gt[24]; - m_A16 += go[20]; - m_A16 += go[21]; - m_A13 += go[22]; - m_A13 += go[23]; - double RHS4 = Idr[20]; - RHS4 += Idr[21]; - RHS4 += Idr[22]; - RHS4 += Idr[23]; - RHS4 += Idr[24]; - RHS4 -= go[24] * *cnV[24]; - m_A18 += gt[25]; - m_A18 += gt[26]; - m_A18 += gt[27]; - m_A19 += go[25]; - m_A17 += go[26]; - double RHS5 = Idr[25]; - RHS5 += Idr[26]; - RHS5 += Idr[27]; - RHS5 -= go[27] * *cnV[27]; - m_A24 += gt[28]; - m_A24 += gt[29]; - m_A24 += gt[30]; - m_A24 += gt[31]; - m_A23 += go[28]; - m_A22 += go[29]; - m_A22 += go[30]; - m_A20 += go[31]; - double RHS6 = Idr[28]; - RHS6 += Idr[29]; - RHS6 += Idr[30]; - RHS6 += Idr[31]; - const double f0 = 1.0 / m_A0; - const double f0_3 = -f0 * m_A8; - m_A10 += m_A1 * f0_3; - RHS3 += f0_3 * RHS0; - const double f1 = 1.0 / m_A2; - const double f1_3 = -f1 * m_A9; - m_A10 += m_A3 * f1_3; - m_A11 += m_A4 * f1_3; - m_A12 += m_A5 * f1_3; - RHS3 += f1_3 * RHS1; - const double f1_4 = -f1 * m_A13; - m_A14 += m_A3 * f1_4; - m_A15 += m_A4 * f1_4; - m_A16 += m_A5 * f1_4; - RHS4 += f1_4 * RHS1; - const double f1_6 = -f1 * m_A20; - m_A21 += m_A3 * f1_6; - m_A22 += m_A4 * f1_6; - m_A24 += m_A5 * f1_6; - RHS6 += f1_6 * RHS1; - const double f2 = 1.0 / m_A6; - const double f2_5 = -f2 * m_A17; - m_A18 += m_A7 * f2_5; - RHS5 += f2_5 * RHS2; - const double f3 = 1.0 / m_A10; - const double f3_4 = -f3 * m_A14; - m_A15 += m_A11 * f3_4; - m_A16 += m_A12 * f3_4; - RHS4 += f3_4 * RHS3; - const double f3_6 = -f3 * m_A21; - m_A22 += m_A11 * f3_6; - m_A24 += m_A12 * f3_6; - RHS6 += f3_6 * RHS3; - const double f4 = 1.0 / m_A15; - const double f4_6 = -f4 * m_A22; - m_A24 += m_A16 * f4_6; - RHS6 += f4_6 * RHS4; - const double f5 = 1.0 / m_A18; - const double f5_6 = -f5 * m_A23; - m_A24 += m_A19 * f5_6; - RHS6 += f5_6 * RHS5; - V[6] = RHS6 / m_A24; - double tmp5 = 0.0; - tmp5 += m_A19 * V[6]; - V[5] = (RHS5 - tmp5) / m_A18; - double tmp4 = 0.0; - tmp4 += m_A16 * V[6]; - V[4] = (RHS4 - tmp4) / m_A15; - double tmp3 = 0.0; - tmp3 += m_A11 * V[4]; - tmp3 += m_A12 * V[6]; - V[3] = (RHS3 - tmp3) / m_A10; - double tmp2 = 0.0; - tmp2 += m_A7 * V[5]; - V[2] = (RHS2 - tmp2) / m_A6; - double tmp1 = 0.0; - tmp1 += m_A3 * V[3]; - tmp1 += m_A4 * V[4]; - tmp1 += m_A5 * V[6]; - V[1] = (RHS1 - tmp1) / m_A2; - double tmp0 = 0.0; - tmp0 += m_A1 * V[3]; - V[0] = (RHS0 - tmp0) / m_A0; -} - // solarq static void nl_gcr_303_double_double_62612f71055b8fd4(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -61450,6 +60724,556 @@ static void nl_gcr_12_double_double_88a8ef5f6bd43d48(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } +// starcas,wotw,solarq,armora +static void nl_gcr_22_double_double_1250f340dea396ae(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + double m_A10(0.0); + double m_A11(0.0); + double m_A12(0.0); + double m_A13(0.0); + double m_A14(0.0); + double m_A15(0.0); + double m_A16(0.0); + double m_A17(0.0); + double m_A18(0.0); + double m_A19(0.0); + double m_A20(0.0); + double m_A21(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A0 += gt[2]; + m_A0 += gt[3]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 += Idr[2]; + RHS0 += Idr[3]; + RHS0 -= go[1] * *cnV[1]; + RHS0 -= go[2] * *cnV[2]; + RHS0 -= go[3] * *cnV[3]; + m_A2 += gt[4]; + m_A2 += gt[5]; + m_A3 += go[4]; + double RHS1 = Idr[4]; + RHS1 += Idr[5]; + RHS1 -= go[5] * *cnV[5]; + m_A4 += gt[6]; + m_A4 += gt[7]; + m_A4 += gt[8]; + m_A4 += gt[9]; + m_A4 += gt[10]; + m_A4 += gt[11]; + m_A4 += gt[12]; + m_A4 += gt[13]; + m_A7 += go[6]; + m_A6 += go[7]; + m_A6 += go[8]; + m_A5 += go[9]; + m_A5 += go[10]; + double RHS2 = Idr[6]; + RHS2 += Idr[7]; + RHS2 += Idr[8]; + RHS2 += Idr[9]; + RHS2 += Idr[10]; + RHS2 += Idr[11]; + RHS2 += Idr[12]; + RHS2 += Idr[13]; + RHS2 -= go[11] * *cnV[11]; + RHS2 -= go[12] * *cnV[12]; + RHS2 -= go[13] * *cnV[13]; + m_A10 += gt[14]; + m_A10 += gt[15]; + m_A10 += gt[16]; + m_A10 += gt[17]; + m_A10 += gt[18]; + m_A10 += gt[19]; + m_A9 += go[14]; + m_A9 += go[15]; + m_A8 += go[16]; + double RHS3 = Idr[14]; + RHS3 += Idr[15]; + RHS3 += Idr[16]; + RHS3 += Idr[17]; + RHS3 += Idr[18]; + RHS3 += Idr[19]; + RHS3 -= go[17] * *cnV[17]; + RHS3 -= go[18] * *cnV[18]; + RHS3 -= go[19] * *cnV[19]; + m_A15 += gt[20]; + m_A15 += gt[21]; + m_A15 += gt[22]; + m_A15 += gt[23]; + m_A15 += gt[24]; + m_A16 += go[20]; + m_A16 += go[21]; + m_A13 += go[22]; + m_A13 += go[23]; + double RHS4 = Idr[20]; + RHS4 += Idr[21]; + RHS4 += Idr[22]; + RHS4 += Idr[23]; + RHS4 += Idr[24]; + RHS4 -= go[24] * *cnV[24]; + m_A21 += gt[25]; + m_A21 += gt[26]; + m_A21 += gt[27]; + m_A21 += gt[28]; + m_A21 += gt[29]; + m_A20 += go[25]; + m_A20 += go[26]; + m_A18 += go[27]; + m_A17 += go[28]; + double RHS5 = Idr[25]; + RHS5 += Idr[26]; + RHS5 += Idr[27]; + RHS5 += Idr[28]; + RHS5 += Idr[29]; + RHS5 -= go[29] * *cnV[29]; + const double f0 = 1.0 / m_A0; + const double f0_3 = -f0 * m_A8; + m_A10 += m_A1 * f0_3; + RHS3 += f0_3 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_5 = -f1 * m_A17; + m_A21 += m_A3 * f1_5; + RHS5 += f1_5 * RHS1; + const double f2 = 1.0 / m_A4; + const double f2_3 = -f2 * m_A9; + m_A10 += m_A5 * f2_3; + m_A11 += m_A6 * f2_3; + m_A12 += m_A7 * f2_3; + RHS3 += f2_3 * RHS2; + const double f2_4 = -f2 * m_A13; + m_A14 += m_A5 * f2_4; + m_A15 += m_A6 * f2_4; + m_A16 += m_A7 * f2_4; + RHS4 += f2_4 * RHS2; + const double f2_5 = -f2 * m_A18; + m_A19 += m_A5 * f2_5; + m_A20 += m_A6 * f2_5; + m_A21 += m_A7 * f2_5; + RHS5 += f2_5 * RHS2; + const double f3 = 1.0 / m_A10; + const double f3_4 = -f3 * m_A14; + m_A15 += m_A11 * f3_4; + m_A16 += m_A12 * f3_4; + RHS4 += f3_4 * RHS3; + const double f3_5 = -f3 * m_A19; + m_A20 += m_A11 * f3_5; + m_A21 += m_A12 * f3_5; + RHS5 += f3_5 * RHS3; + const double f4 = 1.0 / m_A15; + const double f4_5 = -f4 * m_A20; + m_A21 += m_A16 * f4_5; + RHS5 += f4_5 * RHS4; + V[5] = RHS5 / m_A21; + double tmp4 = 0.0; + tmp4 += m_A16 * V[5]; + V[4] = (RHS4 - tmp4) / m_A15; + double tmp3 = 0.0; + tmp3 += m_A11 * V[4]; + tmp3 += m_A12 * V[5]; + V[3] = (RHS3 - tmp3) / m_A10; + double tmp2 = 0.0; + tmp2 += m_A5 * V[3]; + tmp2 += m_A6 * V[4]; + tmp2 += m_A7 * V[5]; + V[2] = (RHS2 - tmp2) / m_A4; + double tmp1 = 0.0; + tmp1 += m_A3 * V[5]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[3]; + V[0] = (RHS0 - tmp0) / m_A0; +} + +// starcas,wotw,boxingb +static void nl_gcr_23_double_double_ea2b6e3a05e6ef0b(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + double m_A10(0.0); + double m_A11(0.0); + double m_A12(0.0); + double m_A13(0.0); + double m_A14(0.0); + double m_A15(0.0); + double m_A16(0.0); + double m_A17(0.0); + double m_A18(0.0); + double m_A19(0.0); + double m_A20(0.0); + double m_A21(0.0); + double m_A22(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A0 += gt[2]; + m_A0 += gt[3]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 += Idr[2]; + RHS0 += Idr[3]; + RHS0 -= go[1] * *cnV[1]; + RHS0 -= go[2] * *cnV[2]; + RHS0 -= go[3] * *cnV[3]; + m_A2 += gt[4]; + m_A2 += gt[5]; + m_A2 += gt[6]; + m_A2 += gt[7]; + m_A2 += gt[8]; + m_A2 += gt[9]; + m_A4 += go[4]; + m_A3 += go[5]; + m_A3 += go[6]; + double RHS1 = Idr[4]; + RHS1 += Idr[5]; + RHS1 += Idr[6]; + RHS1 += Idr[7]; + RHS1 += Idr[8]; + RHS1 += Idr[9]; + RHS1 -= go[7] * *cnV[7]; + RHS1 -= go[8] * *cnV[8]; + RHS1 -= go[9] * *cnV[9]; + m_A5 += gt[10]; + m_A5 += gt[11]; + m_A5 += gt[12]; + m_A5 += gt[13]; + m_A7 += go[10]; + m_A6 += go[11]; + m_A6 += go[12]; + double RHS2 = Idr[10]; + RHS2 += Idr[11]; + RHS2 += Idr[12]; + RHS2 += Idr[13]; + RHS2 -= go[13] * *cnV[13]; + m_A8 += gt[14]; + m_A8 += gt[15]; + m_A9 += go[14]; + double RHS3 = Idr[14]; + RHS3 += Idr[15]; + RHS3 -= go[15] * *cnV[15]; + m_A12 += gt[16]; + m_A12 += gt[17]; + m_A12 += gt[18]; + m_A12 += gt[19]; + m_A12 += gt[20]; + m_A12 += gt[21]; + m_A11 += go[16]; + m_A11 += go[17]; + m_A10 += go[18]; + double RHS4 = Idr[16]; + RHS4 += Idr[17]; + RHS4 += Idr[18]; + RHS4 += Idr[19]; + RHS4 += Idr[20]; + RHS4 += Idr[21]; + RHS4 -= go[19] * *cnV[19]; + RHS4 -= go[20] * *cnV[20]; + RHS4 -= go[21] * *cnV[21]; + m_A17 += gt[22]; + m_A17 += gt[23]; + m_A17 += gt[24]; + m_A17 += gt[25]; + m_A17 += gt[26]; + m_A15 += go[22]; + m_A15 += go[23]; + m_A14 += go[24]; + double RHS5 = Idr[22]; + RHS5 += Idr[23]; + RHS5 += Idr[24]; + RHS5 += Idr[25]; + RHS5 += Idr[26]; + RHS5 -= go[25] * *cnV[25]; + RHS5 -= go[26] * *cnV[26]; + m_A22 += gt[27]; + m_A22 += gt[28]; + m_A22 += gt[29]; + m_A22 += gt[30]; + m_A22 += gt[31]; + m_A20 += go[27]; + m_A19 += go[28]; + double RHS6 = Idr[27]; + RHS6 += Idr[28]; + RHS6 += Idr[29]; + RHS6 += Idr[30]; + RHS6 += Idr[31]; + RHS6 -= go[29] * *cnV[29]; + RHS6 -= go[30] * *cnV[30]; + RHS6 -= go[31] * *cnV[31]; + const double f0 = 1.0 / m_A0; + const double f0_4 = -f0 * m_A10; + m_A12 += m_A1 * f0_4; + RHS4 += f0_4 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_4 = -f1 * m_A11; + m_A12 += m_A3 * f1_4; + m_A13 += m_A4 * f1_4; + RHS4 += f1_4 * RHS1; + const double f1_5 = -f1 * m_A14; + m_A16 += m_A3 * f1_5; + m_A17 += m_A4 * f1_5; + RHS5 += f1_5 * RHS1; + const double f2 = 1.0 / m_A5; + const double f2_5 = -f2 * m_A15; + m_A17 += m_A6 * f2_5; + m_A18 += m_A7 * f2_5; + RHS5 += f2_5 * RHS2; + const double f2_6 = -f2 * m_A19; + m_A21 += m_A6 * f2_6; + m_A22 += m_A7 * f2_6; + RHS6 += f2_6 * RHS2; + const double f3 = 1.0 / m_A8; + const double f3_6 = -f3 * m_A20; + m_A22 += m_A9 * f3_6; + RHS6 += f3_6 * RHS3; + const double f4 = 1.0 / m_A12; + const double f4_5 = -f4 * m_A16; + m_A17 += m_A13 * f4_5; + RHS5 += f4_5 * RHS4; + const double f5 = 1.0 / m_A17; + const double f5_6 = -f5 * m_A21; + m_A22 += m_A18 * f5_6; + RHS6 += f5_6 * RHS5; + V[6] = RHS6 / m_A22; + double tmp5 = 0.0; + tmp5 += m_A18 * V[6]; + V[5] = (RHS5 - tmp5) / m_A17; + double tmp4 = 0.0; + tmp4 += m_A13 * V[5]; + V[4] = (RHS4 - tmp4) / m_A12; + double tmp3 = 0.0; + tmp3 += m_A9 * V[6]; + V[3] = (RHS3 - tmp3) / m_A8; + double tmp2 = 0.0; + tmp2 += m_A6 * V[5]; + tmp2 += m_A7 * V[6]; + V[2] = (RHS2 - tmp2) / m_A5; + double tmp1 = 0.0; + tmp1 += m_A3 * V[4]; + tmp1 += m_A4 * V[5]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[4]; + V[0] = (RHS0 - tmp0) / m_A0; +} + +// starcas,wotw,solarq +static void nl_gcr_25_double_double_4cb524006206eb1a(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + double m_A10(0.0); + double m_A11(0.0); + double m_A12(0.0); + double m_A13(0.0); + double m_A14(0.0); + double m_A15(0.0); + double m_A16(0.0); + double m_A17(0.0); + double m_A18(0.0); + double m_A19(0.0); + double m_A20(0.0); + double m_A21(0.0); + double m_A22(0.0); + double m_A23(0.0); + double m_A24(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A0 += gt[2]; + m_A0 += gt[3]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 += Idr[2]; + RHS0 += Idr[3]; + RHS0 -= go[1] * *cnV[1]; + RHS0 -= go[2] * *cnV[2]; + RHS0 -= go[3] * *cnV[3]; + m_A2 += gt[4]; + m_A2 += gt[5]; + m_A2 += gt[6]; + m_A2 += gt[7]; + m_A2 += gt[8]; + m_A2 += gt[9]; + m_A2 += gt[10]; + m_A2 += gt[11]; + m_A5 += go[4]; + m_A4 += go[5]; + m_A4 += go[6]; + m_A3 += go[7]; + m_A3 += go[8]; + double RHS1 = Idr[4]; + RHS1 += Idr[5]; + RHS1 += Idr[6]; + RHS1 += Idr[7]; + RHS1 += Idr[8]; + RHS1 += Idr[9]; + RHS1 += Idr[10]; + RHS1 += Idr[11]; + RHS1 -= go[9] * *cnV[9]; + RHS1 -= go[10] * *cnV[10]; + RHS1 -= go[11] * *cnV[11]; + m_A6 += gt[12]; + m_A6 += gt[13]; + m_A7 += go[12]; + double RHS2 = Idr[12]; + RHS2 += Idr[13]; + RHS2 -= go[13] * *cnV[13]; + m_A10 += gt[14]; + m_A10 += gt[15]; + m_A10 += gt[16]; + m_A10 += gt[17]; + m_A10 += gt[18]; + m_A10 += gt[19]; + m_A9 += go[14]; + m_A9 += go[15]; + m_A8 += go[16]; + double RHS3 = Idr[14]; + RHS3 += Idr[15]; + RHS3 += Idr[16]; + RHS3 += Idr[17]; + RHS3 += Idr[18]; + RHS3 += Idr[19]; + RHS3 -= go[17] * *cnV[17]; + RHS3 -= go[18] * *cnV[18]; + RHS3 -= go[19] * *cnV[19]; + m_A15 += gt[20]; + m_A15 += gt[21]; + m_A15 += gt[22]; + m_A15 += gt[23]; + m_A15 += gt[24]; + m_A16 += go[20]; + m_A16 += go[21]; + m_A13 += go[22]; + m_A13 += go[23]; + double RHS4 = Idr[20]; + RHS4 += Idr[21]; + RHS4 += Idr[22]; + RHS4 += Idr[23]; + RHS4 += Idr[24]; + RHS4 -= go[24] * *cnV[24]; + m_A18 += gt[25]; + m_A18 += gt[26]; + m_A18 += gt[27]; + m_A19 += go[25]; + m_A17 += go[26]; + double RHS5 = Idr[25]; + RHS5 += Idr[26]; + RHS5 += Idr[27]; + RHS5 -= go[27] * *cnV[27]; + m_A24 += gt[28]; + m_A24 += gt[29]; + m_A24 += gt[30]; + m_A24 += gt[31]; + m_A23 += go[28]; + m_A22 += go[29]; + m_A22 += go[30]; + m_A20 += go[31]; + double RHS6 = Idr[28]; + RHS6 += Idr[29]; + RHS6 += Idr[30]; + RHS6 += Idr[31]; + const double f0 = 1.0 / m_A0; + const double f0_3 = -f0 * m_A8; + m_A10 += m_A1 * f0_3; + RHS3 += f0_3 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_3 = -f1 * m_A9; + m_A10 += m_A3 * f1_3; + m_A11 += m_A4 * f1_3; + m_A12 += m_A5 * f1_3; + RHS3 += f1_3 * RHS1; + const double f1_4 = -f1 * m_A13; + m_A14 += m_A3 * f1_4; + m_A15 += m_A4 * f1_4; + m_A16 += m_A5 * f1_4; + RHS4 += f1_4 * RHS1; + const double f1_6 = -f1 * m_A20; + m_A21 += m_A3 * f1_6; + m_A22 += m_A4 * f1_6; + m_A24 += m_A5 * f1_6; + RHS6 += f1_6 * RHS1; + const double f2 = 1.0 / m_A6; + const double f2_5 = -f2 * m_A17; + m_A18 += m_A7 * f2_5; + RHS5 += f2_5 * RHS2; + const double f3 = 1.0 / m_A10; + const double f3_4 = -f3 * m_A14; + m_A15 += m_A11 * f3_4; + m_A16 += m_A12 * f3_4; + RHS4 += f3_4 * RHS3; + const double f3_6 = -f3 * m_A21; + m_A22 += m_A11 * f3_6; + m_A24 += m_A12 * f3_6; + RHS6 += f3_6 * RHS3; + const double f4 = 1.0 / m_A15; + const double f4_6 = -f4 * m_A22; + m_A24 += m_A16 * f4_6; + RHS6 += f4_6 * RHS4; + const double f5 = 1.0 / m_A18; + const double f5_6 = -f5 * m_A23; + m_A24 += m_A19 * f5_6; + RHS6 += f5_6 * RHS5; + V[6] = RHS6 / m_A24; + double tmp5 = 0.0; + tmp5 += m_A19 * V[6]; + V[5] = (RHS5 - tmp5) / m_A18; + double tmp4 = 0.0; + tmp4 += m_A16 * V[6]; + V[4] = (RHS4 - tmp4) / m_A15; + double tmp3 = 0.0; + tmp3 += m_A11 * V[4]; + tmp3 += m_A12 * V[6]; + V[3] = (RHS3 - tmp3) / m_A10; + double tmp2 = 0.0; + tmp2 += m_A7 * V[5]; + V[2] = (RHS2 - tmp2) / m_A6; + double tmp1 = 0.0; + tmp1 += m_A3 * V[3]; + tmp1 += m_A4 * V[4]; + tmp1 += m_A5 * V[6]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[3]; + V[0] = (RHS0 - tmp0) / m_A0; +} + // starcas,wotw static void nl_gcr_62_double_double_a582a424cb61c678(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -68961,6 +68785,85 @@ static void nl_gcr_7_double_double_723fa454468a93d(double * __restrict V, const V[0] = (RHS0 - tmp0) / m_A0; } +// stuntcyc +static void nl_gcr_10_double_double_85652d3e3ada285a(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A0 += gt[2]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 += Idr[2]; + RHS0 -= go[1] * *cnV[1]; + RHS0 -= go[2] * *cnV[2]; + m_A2 += gt[3]; + m_A2 += gt[4]; + m_A2 += gt[5]; + m_A3 += go[3]; + double RHS1 = Idr[3]; + RHS1 += Idr[4]; + RHS1 += Idr[5]; + RHS1 -= go[4] * *cnV[4]; + RHS1 -= go[5] * *cnV[5]; + m_A4 += gt[6]; + m_A4 += gt[7]; + m_A4 += gt[8]; + m_A5 += go[6]; + double RHS2 = Idr[6]; + RHS2 += Idr[7]; + RHS2 += Idr[8]; + RHS2 -= go[7] * *cnV[7]; + RHS2 -= go[8] * *cnV[8]; + m_A9 += gt[9]; + m_A9 += gt[10]; + m_A9 += gt[11]; + m_A9 += gt[12]; + m_A8 += go[9]; + m_A7 += go[10]; + m_A6 += go[11]; + double RHS3 = Idr[9]; + RHS3 += Idr[10]; + RHS3 += Idr[11]; + RHS3 += Idr[12]; + RHS3 -= go[12] * *cnV[12]; + const double f0 = 1.0 / m_A0; + const double f0_3 = -f0 * m_A6; + m_A9 += m_A1 * f0_3; + RHS3 += f0_3 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_3 = -f1 * m_A7; + m_A9 += m_A3 * f1_3; + RHS3 += f1_3 * RHS1; + const double f2 = 1.0 / m_A4; + const double f2_3 = -f2 * m_A8; + m_A9 += m_A5 * f2_3; + RHS3 += f2_3 * RHS2; + V[3] = RHS3 / m_A9; + double tmp2 = 0.0; + tmp2 += m_A5 * V[3]; + V[2] = (RHS2 - tmp2) / m_A4; + double tmp1 = 0.0; + tmp1 += m_A3 * V[3]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[3]; + V[0] = (RHS0 - tmp0) / m_A0; +} + // stuntcyc static void nl_gcr_20_double_double_c924fe5960b1479e(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -69118,6 +69021,156 @@ static void nl_gcr_20_double_double_c924fe5960b1479e(double * __restrict V, cons V[0] = (RHS0 - tmp0) / m_A0; } +// stuntcyc +static void nl_gcr_22_double_double_ca68d70bd8f2f62e(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + double m_A10(0.0); + double m_A11(0.0); + double m_A12(0.0); + double m_A13(0.0); + double m_A14(0.0); + double m_A15(0.0); + double m_A16(0.0); + double m_A17(0.0); + double m_A18(0.0); + double m_A19(0.0); + double m_A20(0.0); + double m_A21(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A0 += gt[2]; + m_A0 += gt[3]; + m_A2 += go[0]; + m_A2 += go[1]; + m_A1 += go[2]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 += Idr[2]; + RHS0 += Idr[3]; + RHS0 -= go[3] * *cnV[3]; + m_A3 += gt[4]; + m_A3 += gt[5]; + m_A3 += gt[6]; + m_A3 += gt[7]; + m_A5 += go[4]; + m_A5 += go[5]; + m_A4 += go[6]; + double RHS1 = Idr[4]; + RHS1 += Idr[5]; + RHS1 += Idr[6]; + RHS1 += Idr[7]; + RHS1 -= go[7] * *cnV[7]; + m_A6 += gt[8]; + m_A6 += gt[9]; + m_A6 += gt[10]; + m_A7 += go[8]; + double RHS2 = Idr[8]; + RHS2 += Idr[9]; + RHS2 += Idr[10]; + RHS2 -= go[9] * *cnV[9]; + RHS2 -= go[10] * *cnV[10]; + m_A10 += gt[11]; + m_A10 += gt[12]; + m_A10 += gt[13]; + m_A12 += go[11]; + m_A9 += go[12]; + m_A8 += go[13]; + double RHS3 = Idr[11]; + RHS3 += Idr[12]; + RHS3 += Idr[13]; + m_A16 += gt[14]; + m_A16 += gt[15]; + m_A16 += gt[16]; + m_A16 += gt[17]; + m_A16 += gt[18]; + m_A17 += go[14]; + m_A14 += go[15]; + m_A14 += go[16]; + m_A13 += go[17]; + m_A13 += go[18]; + double RHS4 = Idr[14]; + RHS4 += Idr[15]; + RHS4 += Idr[16]; + RHS4 += Idr[17]; + RHS4 += Idr[18]; + m_A21 += gt[19]; + m_A21 += gt[20]; + m_A21 += gt[21]; + m_A18 += go[19]; + m_A20 += go[20]; + m_A19 += go[21]; + double RHS5 = Idr[19]; + RHS5 += Idr[20]; + RHS5 += Idr[21]; + const double f0 = 1.0 / m_A0; + const double f0_3 = -f0 * m_A8; + m_A10 += m_A1 * f0_3; + m_A11 += m_A2 * f0_3; + RHS3 += f0_3 * RHS0; + const double f0_4 = -f0 * m_A13; + m_A15 += m_A1 * f0_4; + m_A16 += m_A2 * f0_4; + RHS4 += f0_4 * RHS0; + const double f1 = 1.0 / m_A3; + const double f1_3 = -f1 * m_A9; + m_A10 += m_A4 * f1_3; + m_A11 += m_A5 * f1_3; + RHS3 += f1_3 * RHS1; + const double f1_4 = -f1 * m_A14; + m_A15 += m_A4 * f1_4; + m_A16 += m_A5 * f1_4; + RHS4 += f1_4 * RHS1; + const double f2 = 1.0 / m_A6; + const double f2_5 = -f2 * m_A18; + m_A21 += m_A7 * f2_5; + RHS5 += f2_5 * RHS2; + const double f3 = 1.0 / m_A10; + const double f3_4 = -f3 * m_A15; + m_A16 += m_A11 * f3_4; + m_A17 += m_A12 * f3_4; + RHS4 += f3_4 * RHS3; + const double f3_5 = -f3 * m_A19; + m_A20 += m_A11 * f3_5; + m_A21 += m_A12 * f3_5; + RHS5 += f3_5 * RHS3; + const double f4 = 1.0 / m_A16; + const double f4_5 = -f4 * m_A20; + m_A21 += m_A17 * f4_5; + RHS5 += f4_5 * RHS4; + V[5] = RHS5 / m_A21; + double tmp4 = 0.0; + tmp4 += m_A17 * V[5]; + V[4] = (RHS4 - tmp4) / m_A16; + double tmp3 = 0.0; + tmp3 += m_A11 * V[4]; + tmp3 += m_A12 * V[5]; + V[3] = (RHS3 - tmp3) / m_A10; + double tmp2 = 0.0; + tmp2 += m_A7 * V[5]; + V[2] = (RHS2 - tmp2) / m_A6; + double tmp1 = 0.0; + tmp1 += m_A4 * V[3]; + tmp1 += m_A5 * V[4]; + V[1] = (RHS1 - tmp1) / m_A3; + double tmp0 = 0.0; + tmp0 += m_A1 * V[3]; + tmp0 += m_A2 * V[4]; + V[0] = (RHS0 - tmp0) / m_A0; +} + // sundance static void nl_gcr_100_double_double_e02a162cb515a958(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) @@ -71570,220 +71623,365 @@ static void nl_gcr_31_double_double_5ccf7da1202da2e5(double * __restrict V, cons double m_A16(0.0); double m_A17(0.0); double m_A18(0.0); - double m_A19(0.0); - double m_A20(0.0); - double m_A21(0.0); - double m_A22(0.0); - double m_A23(0.0); - double m_A24(0.0); - double m_A25(0.0); - double m_A26(0.0); - double m_A27(0.0); - double m_A28(0.0); - double m_A29(0.0); - double m_A30(0.0); + double m_A19(0.0); + double m_A20(0.0); + double m_A21(0.0); + double m_A22(0.0); + double m_A23(0.0); + double m_A24(0.0); + double m_A25(0.0); + double m_A26(0.0); + double m_A27(0.0); + double m_A28(0.0); + double m_A29(0.0); + double m_A30(0.0); + m_A0 += gt[0]; + m_A0 += gt[1]; + m_A0 += gt[2]; + m_A0 += gt[3]; + m_A0 += gt[4]; + m_A0 += gt[5]; + m_A0 += gt[6]; + m_A0 += gt[7]; + m_A1 += go[0]; + double RHS0 = Idr[0]; + RHS0 += Idr[1]; + RHS0 += Idr[2]; + RHS0 += Idr[3]; + RHS0 += Idr[4]; + RHS0 += Idr[5]; + RHS0 += Idr[6]; + RHS0 += Idr[7]; + RHS0 -= go[1] * *cnV[1]; + RHS0 -= go[2] * *cnV[2]; + RHS0 -= go[3] * *cnV[3]; + RHS0 -= go[4] * *cnV[4]; + RHS0 -= go[5] * *cnV[5]; + RHS0 -= go[6] * *cnV[6]; + RHS0 -= go[7] * *cnV[7]; + m_A2 += gt[8]; + m_A2 += gt[9]; + m_A2 += gt[10]; + m_A3 += go[8]; + double RHS1 = Idr[8]; + RHS1 += Idr[9]; + RHS1 += Idr[10]; + RHS1 -= go[9] * *cnV[9]; + RHS1 -= go[10] * *cnV[10]; + m_A4 += gt[11]; + m_A4 += gt[12]; + m_A4 += gt[13]; + m_A5 += go[11]; + double RHS2 = Idr[11]; + RHS2 += Idr[12]; + RHS2 += Idr[13]; + RHS2 -= go[12] * *cnV[12]; + RHS2 -= go[13] * *cnV[13]; + m_A6 += gt[14]; + m_A6 += gt[15]; + m_A6 += gt[16]; + m_A7 += go[14]; + double RHS3 = Idr[14]; + RHS3 += Idr[15]; + RHS3 += Idr[16]; + RHS3 -= go[15] * *cnV[15]; + RHS3 -= go[16] * *cnV[16]; + m_A8 += gt[17]; + m_A8 += gt[18]; + m_A8 += gt[19]; + m_A9 += go[17]; + double RHS4 = Idr[17]; + RHS4 += Idr[18]; + RHS4 += Idr[19]; + RHS4 -= go[18] * *cnV[18]; + RHS4 -= go[19] * *cnV[19]; + m_A10 += gt[20]; + m_A10 += gt[21]; + m_A10 += gt[22]; + m_A11 += go[20]; + double RHS5 = Idr[20]; + RHS5 += Idr[21]; + RHS5 += Idr[22]; + RHS5 -= go[21] * *cnV[21]; + RHS5 -= go[22] * *cnV[22]; + m_A12 += gt[23]; + m_A12 += gt[24]; + m_A12 += gt[25]; + m_A13 += go[23]; + double RHS6 = Idr[23]; + RHS6 += Idr[24]; + RHS6 += Idr[25]; + RHS6 -= go[24] * *cnV[24]; + RHS6 -= go[25] * *cnV[25]; + m_A14 += gt[26]; + m_A14 += gt[27]; + m_A14 += gt[28]; + m_A15 += go[26]; + double RHS7 = Idr[26]; + RHS7 += Idr[27]; + RHS7 += Idr[28]; + RHS7 -= go[27] * *cnV[27]; + RHS7 -= go[28] * *cnV[28]; + m_A16 += gt[29]; + m_A16 += gt[30]; + m_A16 += gt[31]; + m_A17 += go[29]; + double RHS8 = Idr[29]; + RHS8 += Idr[30]; + RHS8 += Idr[31]; + RHS8 -= go[30] * *cnV[30]; + RHS8 -= go[31] * *cnV[31]; + m_A19 += gt[32]; + m_A19 += gt[33]; + m_A20 += go[32]; + m_A18 += go[33]; + double RHS9 = Idr[32]; + RHS9 += Idr[33]; + m_A30 += gt[34]; + m_A30 += gt[35]; + m_A30 += gt[36]; + m_A30 += gt[37]; + m_A30 += gt[38]; + m_A30 += gt[39]; + m_A30 += gt[40]; + m_A30 += gt[41]; + m_A30 += gt[42]; + m_A30 += gt[43]; + m_A28 += go[34]; + m_A27 += go[35]; + m_A26 += go[36]; + m_A25 += go[37]; + m_A29 += go[38]; + m_A24 += go[39]; + m_A23 += go[40]; + m_A22 += go[41]; + m_A21 += go[42]; + double RHS10 = Idr[34]; + RHS10 += Idr[35]; + RHS10 += Idr[36]; + RHS10 += Idr[37]; + RHS10 += Idr[38]; + RHS10 += Idr[39]; + RHS10 += Idr[40]; + RHS10 += Idr[41]; + RHS10 += Idr[42]; + RHS10 += Idr[43]; + RHS10 -= go[43] * *cnV[43]; + const double f0 = 1.0 / m_A0; + const double f0_9 = -f0 * m_A18; + m_A19 += m_A1 * f0_9; + RHS9 += f0_9 * RHS0; + const double f1 = 1.0 / m_A2; + const double f1_10 = -f1 * m_A21; + m_A30 += m_A3 * f1_10; + RHS10 += f1_10 * RHS1; + const double f2 = 1.0 / m_A4; + const double f2_10 = -f2 * m_A22; + m_A30 += m_A5 * f2_10; + RHS10 += f2_10 * RHS2; + const double f3 = 1.0 / m_A6; + const double f3_10 = -f3 * m_A23; + m_A30 += m_A7 * f3_10; + RHS10 += f3_10 * RHS3; + const double f4 = 1.0 / m_A8; + const double f4_10 = -f4 * m_A24; + m_A30 += m_A9 * f4_10; + RHS10 += f4_10 * RHS4; + const double f5 = 1.0 / m_A10; + const double f5_10 = -f5 * m_A25; + m_A30 += m_A11 * f5_10; + RHS10 += f5_10 * RHS5; + const double f6 = 1.0 / m_A12; + const double f6_10 = -f6 * m_A26; + m_A30 += m_A13 * f6_10; + RHS10 += f6_10 * RHS6; + const double f7 = 1.0 / m_A14; + const double f7_10 = -f7 * m_A27; + m_A30 += m_A15 * f7_10; + RHS10 += f7_10 * RHS7; + const double f8 = 1.0 / m_A16; + const double f8_10 = -f8 * m_A28; + m_A30 += m_A17 * f8_10; + RHS10 += f8_10 * RHS8; + const double f9 = 1.0 / m_A19; + const double f9_10 = -f9 * m_A29; + m_A30 += m_A20 * f9_10; + RHS10 += f9_10 * RHS9; + V[10] = RHS10 / m_A30; + double tmp9 = 0.0; + tmp9 += m_A20 * V[10]; + V[9] = (RHS9 - tmp9) / m_A19; + double tmp8 = 0.0; + tmp8 += m_A17 * V[10]; + V[8] = (RHS8 - tmp8) / m_A16; + double tmp7 = 0.0; + tmp7 += m_A15 * V[10]; + V[7] = (RHS7 - tmp7) / m_A14; + double tmp6 = 0.0; + tmp6 += m_A13 * V[10]; + V[6] = (RHS6 - tmp6) / m_A12; + double tmp5 = 0.0; + tmp5 += m_A11 * V[10]; + V[5] = (RHS5 - tmp5) / m_A10; + double tmp4 = 0.0; + tmp4 += m_A9 * V[10]; + V[4] = (RHS4 - tmp4) / m_A8; + double tmp3 = 0.0; + tmp3 += m_A7 * V[10]; + V[3] = (RHS3 - tmp3) / m_A6; + double tmp2 = 0.0; + tmp2 += m_A5 * V[10]; + V[2] = (RHS2 - tmp2) / m_A4; + double tmp1 = 0.0; + tmp1 += m_A3 * V[10]; + V[1] = (RHS1 - tmp1) / m_A2; + double tmp0 = 0.0; + tmp0 += m_A1 * V[9]; + V[0] = (RHS0 - tmp0) / m_A0; +} + +// tank,gamemachine +static void nl_gcr_19_double_double_491f95430bfdfd05(double * __restrict V, const double * __restrict go, const double * __restrict gt, const double * __restrict Idr, const double * const * __restrict cnV) + +{ + + plib::unused_var(cnV); + double m_A0(0.0); + double m_A1(0.0); + double m_A2(0.0); + double m_A3(0.0); + double m_A4(0.0); + double m_A5(0.0); + double m_A6(0.0); + double m_A7(0.0); + double m_A8(0.0); + double m_A9(0.0); + double m_A10(0.0); + double m_A11(0.0); + double m_A12(0.0); + double m_A13(0.0); + double m_A14(0.0); + double m_A15(0.0); + double m_A16(0.0); + double m_A17(0.0); + double m_A18(0.0); m_A0 += gt[0]; m_A0 += gt[1]; m_A0 += gt[2]; - m_A0 += gt[3]; - m_A0 += gt[4]; - m_A0 += gt[5]; - m_A0 += gt[6]; - m_A0 += gt[7]; m_A1 += go[0]; double RHS0 = Idr[0]; RHS0 += Idr[1]; RHS0 += Idr[2]; - RHS0 += Idr[3]; - RHS0 += Idr[4]; - RHS0 += Idr[5]; - RHS0 += Idr[6]; - RHS0 += Idr[7]; RHS0 -= go[1] * *cnV[1]; RHS0 -= go[2] * *cnV[2]; - RHS0 -= go[3] * *cnV[3]; - RHS0 -= go[4] * *cnV[4]; - RHS0 -= go[5] * *cnV[5]; - RHS0 -= go[6] * *cnV[6]; - RHS0 -= go[7] * *cnV[7]; - m_A2 += gt[8]; - m_A2 += gt[9]; - m_A2 += gt[10]; - m_A3 += go[8]; - double RHS1 = Idr[8]; - RHS1 += Idr[9]; - RHS1 += Idr[10]; - RHS1 -= go[9] * *cnV[9]; - RHS1 -= go[10] * *cnV[10]; - m_A4 += gt[11]; - m_A4 += gt[12]; - m_A4 += gt[13]; - m_A5 += go[11]; - double RHS2 = Idr[11]; - RHS2 += Idr[12]; - RHS2 += Idr[13]; - RHS2 -= go[12] * *cnV[12]; - RHS2 -= go[13] * *cnV[13]; - m_A6 += gt[14]; - m_A6 += gt[15]; - m_A6 += gt[16]; - m_A7 += go[14]; - double RHS3 = Idr[14]; - RHS3 += Idr[15]; - RHS3 += Idr[16]; - RHS3 -= go[15] * *cnV[15]; - RHS3 -= go[16] * *cnV[16]; - m_A8 += gt[17]; - m_A8 += gt[18]; - m_A8 += gt[19]; - m_A9 += go[17]; - double RHS4 = Idr[17]; - RHS4 += Idr[18]; - RHS4 += Idr[19]; - RHS4 -= go[18] * *cnV[18]; - RHS4 -= go[19] * *cnV[19]; - m_A10 += gt[20]; - m_A10 += gt[21]; - m_A10 += gt[22]; - m_A11 += go[20]; - double RHS5 = Idr[20]; - RHS5 += Idr[21]; - RHS5 += Idr[22]; - RHS5 -= go[21] * *cnV[21]; - RHS5 -= go[22] * *cnV[22]; - m_A12 += gt[23]; - m_A12 += gt[24]; - m_A12 += gt[25]; - m_A13 += go[23]; - double RHS6 = Idr[23]; + m_A2 += gt[3]; + m_A2 += gt[4]; + m_A2 += gt[5]; + m_A3 += go[3]; + double RHS1 = Idr[3]; + RHS1 += Idr[4]; + RHS1 += Idr[5]; + RHS1 -= go[4] * *cnV[4]; + RHS1 -= go[5] * *cnV[5]; + m_A4 += gt[6]; + m_A4 += gt[7]; + m_A4 += gt[8]; + m_A5 += go[6]; + double RHS2 = Idr[6]; + RHS2 += Idr[7]; + RHS2 += Idr[8]; + RHS2 -= go[7] * *cnV[7]; + RHS2 -= go[8] * *cnV[8]; + m_A6 += gt[9]; + m_A6 += gt[10]; + m_A6 += gt[11]; + m_A7 += go[9]; + double RHS3 = Idr[9]; + RHS3 += Idr[10]; + RHS3 += Idr[11]; + RHS3 -= go[10] * *cnV[10]; + RHS3 -= go[11] * *cnV[11]; + m_A8 += gt[12]; + m_A8 += gt[13]; + m_A8 += gt[14]; + m_A9 += go[12]; + double RHS4 = Idr[12]; + RHS4 += Idr[13]; + RHS4 += Idr[14]; + RHS4 -= go[13] * *cnV[13]; + RHS4 -= go[14] * *cnV[14]; + m_A10 += gt[15]; + m_A10 += gt[16]; + m_A10 += gt[17]; + m_A11 += go[15]; + double RHS5 = Idr[15]; + RHS5 += Idr[16]; + RHS5 += Idr[17]; + RHS5 -= go[16] * *cnV[16]; + RHS5 -= go[17] * *cnV[17]; + m_A18 += gt[18]; + m_A18 += gt[19]; + m_A18 += gt[20]; + m_A18 += gt[21]; + m_A18 += gt[22]; + m_A18 += gt[23]; + m_A18 += gt[24]; + m_A17 += go[18]; + m_A16 += go[19]; + m_A15 += go[20]; + m_A14 += go[21]; + m_A13 += go[22]; + m_A12 += go[23]; + double RHS6 = Idr[18]; + RHS6 += Idr[19]; + RHS6 += Idr[20]; + RHS6 += Idr[21]; + RHS6 += Idr[22]; + RHS6 += Idr[23]; RHS6 += Idr[24]; - RHS6 += Idr[25]; RHS6 -= go[24] * *cnV[24]; - RHS6 -= go[25] * *cnV[25]; - m_A14 += gt[26]; - m_A14 += gt[27]; - m_A14 += gt[28]; - m_A15 += go[26]; - double RHS7 = Idr[26]; - RHS7 += Idr[27]; - RHS7 += Idr[28]; - RHS7 -= go[27] * *cnV[27]; - RHS7 -= go[28] * *cnV[28]; - m_A16 += gt[29]; - m_A16 += gt[30]; - m_A16 += gt[31]; - m_A17 += go[29]; - double RHS8 = Idr[29]; - RHS8 += Idr[30]; - RHS8 += Idr[31]; - RHS8 -= go[30] * *cnV[30]; - RHS8 -= go[31] * *cnV[31]; - m_A19 += gt[32]; - m_A19 += gt[33]; - m_A20 += go[32]; - m_A18 += go[33]; - double RHS9 = Idr[32]; - RHS9 += Idr[33]; - m_A30 += gt[34]; - m_A30 += gt[35]; - m_A30 += gt[36]; - m_A30 += gt[37]; - m_A30 += gt[38]; - m_A30 += gt[39]; - m_A30 += gt[40]; - m_A30 += gt[41]; - m_A30 += gt[42]; - m_A30 += gt[43]; - m_A28 += go[34]; - m_A27 += go[35]; - m_A26 += go[36]; - m_A25 += go[37]; - m_A29 += go[38]; - m_A24 += go[39]; - m_A23 += go[40]; - m_A22 += go[41]; - m_A21 += go[42]; - double RHS10 = Idr[34]; - RHS10 += Idr[35]; - RHS10 += Idr[36]; - RHS10 += Idr[37]; - RHS10 += Idr[38]; - RHS10 += Idr[39]; - RHS10 += Idr[40]; - RHS10 += Idr[41]; - RHS10 += Idr[42]; - RHS10 += Idr[43]; - RHS10 -= go[43] * *cnV[43]; const double f0 = 1.0 / m_A0; - const double f0_9 = -f0 * m_A18; - m_A19 += m_A1 * f0_9; - RHS9 += f0_9 * RHS0; + const double f0_6 = -f0 * m_A12; + m_A18 += m_A1 * f0_6; + RHS6 += f0_6 * RHS0; const double f1 = 1.0 / m_A2; - const double f1_10 = -f1 * m_A21; - m_A30 += m_A3 * f1_10; - RHS10 += f1_10 * RHS1; + const double f1_6 = -f1 * m_A13; + m_A18 += m_A3 * f1_6; + RHS6 += f1_6 * RHS1; const double f2 = 1.0 / m_A4; - const double f2_10 = -f2 * m_A22; - m_A30 += m_A5 * f2_10; - RHS10 += f2_10 * RHS2; + const double f2_6 = -f2 * m_A14; + m_A18 += m_A5 * f2_6; + RHS6 += f2_6 * RHS2; const double f3 = 1.0 / m_A6; - const double f3_10 = -f3 * m_A23; - m_A30 += m_A7 * f3_10; - RHS10 += f3_10 * RHS3; + const double f3_6 = -f3 * m_A15; + m_A18 += m_A7 * f3_6; + RHS6 += f3_6 * RHS3; const double f4 = 1.0 / m_A8; - const double f4_10 = -f4 * m_A24; - m_A30 += m_A9 * f4_10; - RHS10 += f4_10 * RHS4; + const double f4_6 = -f4 * m_A16; + m_A18 += m_A9 * f4_6; + RHS6 += f4_6 * RHS4; const double f5 = 1.0 / m_A10; - const double f5_10 = -f5 * m_A25; - m_A30 += m_A11 * f5_10; - RHS10 += f5_10 * RHS5; - const double f6 = 1.0 / m_A12; - const double f6_10 = -f6 * m_A26; - m_A30 += m_A13 * f6_10; - RHS10 += f6_10 * RHS6; - const double f7 = 1.0 / m_A14; - const double f7_10 = -f7 * m_A27; - m_A30 += m_A15 * f7_10; - RHS10 += f7_10 * RHS7; - const double f8 = 1.0 / m_A16; - const double f8_10 = -f8 * m_A28; - m_A30 += m_A17 * f8_10; - RHS10 += f8_10 * RHS8; - const double f9 = 1.0 / m_A19; - const double f9_10 = -f9 * m_A29; - m_A30 += m_A20 * f9_10; - RHS10 += f9_10 * RHS9; - V[10] = RHS10 / m_A30; - double tmp9 = 0.0; - tmp9 += m_A20 * V[10]; - V[9] = (RHS9 - tmp9) / m_A19; - double tmp8 = 0.0; - tmp8 += m_A17 * V[10]; - V[8] = (RHS8 - tmp8) / m_A16; - double tmp7 = 0.0; - tmp7 += m_A15 * V[10]; - V[7] = (RHS7 - tmp7) / m_A14; - double tmp6 = 0.0; - tmp6 += m_A13 * V[10]; - V[6] = (RHS6 - tmp6) / m_A12; + const double f5_6 = -f5 * m_A17; + m_A18 += m_A11 * f5_6; + RHS6 += f5_6 * RHS5; + V[6] = RHS6 / m_A18; double tmp5 = 0.0; - tmp5 += m_A11 * V[10]; + tmp5 += m_A11 * V[6]; V[5] = (RHS5 - tmp5) / m_A10; double tmp4 = 0.0; - tmp4 += m_A9 * V[10]; + tmp4 += m_A9 * V[6]; V[4] = (RHS4 - tmp4) / m_A8; double tmp3 = 0.0; - tmp3 += m_A7 * V[10]; + tmp3 += m_A7 * V[6]; V[3] = (RHS3 - tmp3) / m_A6; double tmp2 = 0.0; - tmp2 += m_A5 * V[10]; + tmp2 += m_A5 * V[6]; V[2] = (RHS2 - tmp2) / m_A4; double tmp1 = 0.0; - tmp1 += m_A3 * V[10]; + tmp1 += m_A3 * V[6]; V[1] = (RHS1 - tmp1) / m_A2; double tmp0 = 0.0; - tmp0 += m_A1 * V[9]; + tmp0 += m_A1 * V[6]; V[0] = (RHS0 - tmp0) / m_A0; } @@ -80133,8 +80331,6 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_57_double_double_bb501e6a23177009", reinterpret_cast(&nl_gcr_57_double_double_bb501e6a23177009)}, // NOLINT // 280zzzap {"nl_gcr_95_double_double_24643c159711f292", reinterpret_cast(&nl_gcr_95_double_double_24643c159711f292)}, // NOLINT -// armora,solarq,starcas,wotw - {"nl_gcr_22_double_double_1250f340dea396ae", reinterpret_cast(&nl_gcr_22_double_double_1250f340dea396ae)}, // NOLINT // armora {"nl_gcr_22_double_double_a6cfda6668b153c2", reinterpret_cast(&nl_gcr_22_double_double_a6cfda6668b153c2)}, // NOLINT // armora,boxingb @@ -80163,8 +80359,6 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_43_double_double_cf1018e7ed626623", reinterpret_cast(&nl_gcr_43_double_double_cf1018e7ed626623)}, // NOLINT // astrob {"nl_gcr_46_double_double_536c3652eb3bc075", reinterpret_cast(&nl_gcr_46_double_double_536c3652eb3bc075)}, // NOLINT -// astrob,cheekyms,fireone,speedfrk,rebound - {"nl_gcr_7_double_double_7c86a9bc1c6aef4c", reinterpret_cast(&nl_gcr_7_double_double_7c86a9bc1c6aef4c)}, // NOLINT // barrier,spacewar {"nl_gcr_10_double_double_a50a4b733e95414a", reinterpret_cast(&nl_gcr_10_double_double_a50a4b733e95414a)}, // NOLINT // barrier,spacewar @@ -80179,8 +80373,6 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_31_double_double_79e756c5892cf87d", reinterpret_cast(&nl_gcr_31_double_double_79e756c5892cf87d)}, // NOLINT // barrier,spacewar {"nl_gcr_47_double_double_6ef39a62161d596c", reinterpret_cast(&nl_gcr_47_double_double_6ef39a62161d596c)}, // NOLINT -// boxingb,solarq - {"nl_gcr_10_double_double_d7d45dc58b08cab9", reinterpret_cast(&nl_gcr_10_double_double_d7d45dc58b08cab9)}, // NOLINT // boxingb {"nl_gcr_16_double_double_50f5194a994d56ec", reinterpret_cast(&nl_gcr_16_double_double_50f5194a994d56ec)}, // NOLINT // boxingb @@ -80189,8 +80381,6 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_22_double_double_a6b734322b3ea924", reinterpret_cast(&nl_gcr_22_double_double_a6b734322b3ea924)}, // NOLINT // boxingb {"nl_gcr_23_double_double_53e1117fdb16f546", reinterpret_cast(&nl_gcr_23_double_double_53e1117fdb16f546)}, // NOLINT -// boxingb,starcas,wotw - {"nl_gcr_23_double_double_ea2b6e3a05e6ef0b", reinterpret_cast(&nl_gcr_23_double_double_ea2b6e3a05e6ef0b)}, // NOLINT // boxingb {"nl_gcr_23_double_double_f43cf2a28a5a5561", reinterpret_cast(&nl_gcr_23_double_double_f43cf2a28a5a5561)}, // NOLINT // boxingb @@ -80221,7 +80411,7 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_75_double_double_75400df5d559a266", reinterpret_cast(&nl_gcr_75_double_double_75400df5d559a266)}, // NOLINT // brdrline {"nl_gcr_77_double_double_437326911721091", reinterpret_cast(&nl_gcr_77_double_double_437326911721091)}, // NOLINT -// brdrline,dpatrol,stuntcyc +// brdrline,stuntcyc {"nl_gcr_7_double_double_59cb6bf7cb9d17dc", reinterpret_cast(&nl_gcr_7_double_double_59cb6bf7cb9d17dc)}, // NOLINT // brdrline {"nl_gcr_83_double_double_f99b1245e708ec85", reinterpret_cast(&nl_gcr_83_double_double_f99b1245e708ec85)}, // NOLINT @@ -80257,12 +80447,6 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_16_double_double_8c0f7f2284333de5", reinterpret_cast(&nl_gcr_16_double_double_8c0f7f2284333de5)}, // NOLINT // destroyr {"nl_gcr_399_double_double_4334c95878d1be92", reinterpret_cast(&nl_gcr_399_double_double_4334c95878d1be92)}, // NOLINT -// dpatrol,stuntcyc - {"nl_gcr_10_double_double_85652d3e3ada285a", reinterpret_cast(&nl_gcr_10_double_double_85652d3e3ada285a)}, // NOLINT -// dpatrol - {"nl_gcr_20_double_double_18f4d9160b51d613", reinterpret_cast(&nl_gcr_20_double_double_18f4d9160b51d613)}, // NOLINT -// dpatrol,stuntcyc - {"nl_gcr_22_double_double_ca68d70bd8f2f62e", reinterpret_cast(&nl_gcr_22_double_double_ca68d70bd8f2f62e)}, // NOLINT // elim,zektor {"nl_gcr_10_double_double_11c2ae166b240b6e", reinterpret_cast(&nl_gcr_10_double_double_11c2ae166b240b6e)}, // NOLINT // elim,zektor @@ -80307,6 +80491,8 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_73_double_double_643133e86b2b1628", reinterpret_cast(&nl_gcr_73_double_double_643133e86b2b1628)}, // NOLINT // fireone {"nl_gcr_79_double_double_c1d22fe6e895255d", reinterpret_cast(&nl_gcr_79_double_double_c1d22fe6e895255d)}, // NOLINT +// fireone,astrob,rebound,speedfrk,cheekyms + {"nl_gcr_7_double_double_7c86a9bc1c6aef4c", reinterpret_cast(&nl_gcr_7_double_double_7c86a9bc1c6aef4c)}, // NOLINT // fireone {"nl_gcr_7_double_double_e7fb484f621b3ab9", reinterpret_cast(&nl_gcr_7_double_double_e7fb484f621b3ab9)}, // NOLINT // fireone @@ -80337,8 +80523,6 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_9_double_double_815733e3f2e05029", reinterpret_cast(&nl_gcr_9_double_double_815733e3f2e05029)}, // NOLINT // gamemachine {"nl_gcr_10_double_double_934712b55bb3b2b2", reinterpret_cast(&nl_gcr_10_double_double_934712b55bb3b2b2)}, // NOLINT -// gamemachine,tank - {"nl_gcr_19_double_double_491f95430bfdfd05", reinterpret_cast(&nl_gcr_19_double_double_491f95430bfdfd05)}, // NOLINT // gamemachine {"nl_gcr_7_double_double_782d79b5cbe953b1", reinterpret_cast(&nl_gcr_7_double_double_782d79b5cbe953b1)}, // NOLINT // gtrak10 @@ -80347,6 +80531,8 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_112_double_double_743595e64cee0a5e", reinterpret_cast(&nl_gcr_112_double_double_743595e64cee0a5e)}, // NOLINT // gunfight {"nl_gcr_14_double_double_d05b3dbe370c7904", reinterpret_cast(&nl_gcr_14_double_double_d05b3dbe370c7904)}, // NOLINT +// jpmsru + {"nl_gcr_55_double_double_4963a2f104e4c797", reinterpret_cast(&nl_gcr_55_double_double_4963a2f104e4c797)}, // NOLINT // kidniki {"nl_gcr_198_double_double_43f7ff9bc651cc7a", reinterpret_cast(&nl_gcr_198_double_double_43f7ff9bc651cc7a)}, // NOLINT // kidniki @@ -80407,12 +80593,12 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_30_double_double_8cc4eb213eaeef9b", reinterpret_cast(&nl_gcr_30_double_double_8cc4eb213eaeef9b)}, // NOLINT // segausb {"nl_gcr_84_double_double_c61e08cf5e35918", reinterpret_cast(&nl_gcr_84_double_double_c61e08cf5e35918)}, // NOLINT +// solarq,boxingb + {"nl_gcr_10_double_double_d7d45dc58b08cab9", reinterpret_cast(&nl_gcr_10_double_double_d7d45dc58b08cab9)}, // NOLINT // solarq {"nl_gcr_15_double_double_7caaa135bff3d9f3", reinterpret_cast(&nl_gcr_15_double_double_7caaa135bff3d9f3)}, // NOLINT // solarq {"nl_gcr_20_double_double_66496d6073aca98e", reinterpret_cast(&nl_gcr_20_double_double_66496d6073aca98e)}, // NOLINT -// solarq,starcas,wotw - {"nl_gcr_25_double_double_4cb524006206eb1a", reinterpret_cast(&nl_gcr_25_double_double_4cb524006206eb1a)}, // NOLINT // solarq {"nl_gcr_303_double_double_62612f71055b8fd4", reinterpret_cast(&nl_gcr_303_double_double_62612f71055b8fd4)}, // NOLINT // solarq @@ -80465,6 +80651,12 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_109_double_double_5d550fc7441617a2", reinterpret_cast(&nl_gcr_109_double_double_5d550fc7441617a2)}, // NOLINT // starcas,wotw {"nl_gcr_12_double_double_88a8ef5f6bd43d48", reinterpret_cast(&nl_gcr_12_double_double_88a8ef5f6bd43d48)}, // NOLINT +// starcas,wotw,solarq,armora + {"nl_gcr_22_double_double_1250f340dea396ae", reinterpret_cast(&nl_gcr_22_double_double_1250f340dea396ae)}, // NOLINT +// starcas,wotw,boxingb + {"nl_gcr_23_double_double_ea2b6e3a05e6ef0b", reinterpret_cast(&nl_gcr_23_double_double_ea2b6e3a05e6ef0b)}, // NOLINT +// starcas,wotw,solarq + {"nl_gcr_25_double_double_4cb524006206eb1a", reinterpret_cast(&nl_gcr_25_double_double_4cb524006206eb1a)}, // NOLINT // starcas,wotw {"nl_gcr_62_double_double_a582a424cb61c678", reinterpret_cast(&nl_gcr_62_double_double_a582a424cb61c678)}, // NOLINT // starcas,wotw @@ -80499,8 +80691,12 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_45_double_double_528a27fe9ed07d67", reinterpret_cast(&nl_gcr_45_double_double_528a27fe9ed07d67)}, // NOLINT // starhawk {"nl_gcr_7_double_double_723fa454468a93d", reinterpret_cast(&nl_gcr_7_double_double_723fa454468a93d)}, // NOLINT +// stuntcyc + {"nl_gcr_10_double_double_85652d3e3ada285a", reinterpret_cast(&nl_gcr_10_double_double_85652d3e3ada285a)}, // NOLINT // stuntcyc {"nl_gcr_20_double_double_c924fe5960b1479e", reinterpret_cast(&nl_gcr_20_double_double_c924fe5960b1479e)}, // NOLINT +// stuntcyc + {"nl_gcr_22_double_double_ca68d70bd8f2f62e", reinterpret_cast(&nl_gcr_22_double_double_ca68d70bd8f2f62e)}, // NOLINT // sundance {"nl_gcr_100_double_double_e02a162cb515a958", reinterpret_cast(&nl_gcr_100_double_double_e02a162cb515a958)}, // NOLINT // sundance,warrior @@ -80519,6 +80715,8 @@ const plib::static_library::symbol nl_static_solver_syms[] = { {"nl_gcr_23_double_double_c4cec7aed23b7b94", reinterpret_cast(&nl_gcr_23_double_double_c4cec7aed23b7b94)}, // NOLINT // tailg {"nl_gcr_31_double_double_5ccf7da1202da2e5", reinterpret_cast(&nl_gcr_31_double_double_5ccf7da1202da2e5)}, // NOLINT +// tank,gamemachine + {"nl_gcr_19_double_double_491f95430bfdfd05", reinterpret_cast(&nl_gcr_19_double_double_491f95430bfdfd05)}, // NOLINT // tank {"nl_gcr_328_double_double_930b64361c2cdba8", reinterpret_cast(&nl_gcr_328_double_double_930b64361c2cdba8)}, // NOLINT // tank diff --git a/src/lib/netlist/macro/modules/nlmod_icl8038_dip.cpp b/src/lib/netlist/macro/modules/nlmod_icl8038_dip.cpp index a409e490750..dac830bcb88 100644 --- a/src/lib/netlist/macro/modules/nlmod_icl8038_dip.cpp +++ b/src/lib/netlist/macro/modules/nlmod_icl8038_dip.cpp @@ -8,6 +8,7 @@ // NETLIST_START(ICL8038_DIP) +{ VCVS(VI, 1) CCCS(CI1, -1) CCCS(CI2, 2) @@ -58,4 +59,4 @@ NETLIST_START(ICL8038_DIP) ALIAS(5, CI2.IP) // R2 ALIAS(10, VO.IP) // C1 ALIAS(6, COMP.VCC) // V+ -NETLIST_END() +} diff --git a/src/lib/netlist/macro/modules/nlmod_ne556_dip.cpp b/src/lib/netlist/macro/modules/nlmod_ne556_dip.cpp index 7f278a18b6d..fa6924cda92 100644 --- a/src/lib/netlist/macro/modules/nlmod_ne556_dip.cpp +++ b/src/lib/netlist/macro/modules/nlmod_ne556_dip.cpp @@ -5,6 +5,7 @@ #include "devices/net_lib.h" NETLIST_START(NE556_DIP) +{ NE555(A) NE555(B) @@ -21,4 +22,4 @@ NETLIST_START(NE556_DIP) A.GND, /* GND |7 8| 2TRIG */ B.TRIG /* +--------------+ */ ) -NETLIST_END() +} diff --git a/src/lib/netlist/macro/modules/nlmod_rtest.cpp b/src/lib/netlist/macro/modules/nlmod_rtest.cpp index c2ad129c6e3..e105f357dd5 100644 --- a/src/lib/netlist/macro/modules/nlmod_rtest.cpp +++ b/src/lib/netlist/macro/modules/nlmod_rtest.cpp @@ -4,9 +4,10 @@ #include "devices/net_lib.h" NETLIST_START(RTEST) +{ RES(R1, RES_K(10)) ALIAS(1, R1.1) ALIAS(2, R1.2) -NETLIST_END() +} diff --git a/src/lib/netlist/macro/nlm_base_lib.cpp b/src/lib/netlist/macro/nlm_base_lib.cpp index dfd885e2156..4cbd809924b 100644 --- a/src/lib/netlist/macro/nlm_base_lib.cpp +++ b/src/lib/netlist/macro/nlm_base_lib.cpp @@ -11,6 +11,7 @@ * ---------------------------------------------------------------------------*/ static NETLIST_START(diode_models) +{ NET_MODEL("D _(IS=1e-15 N=1 NBV=3 IBV=0.001 BV=1E9)") NET_MODEL("1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)") @@ -39,26 +40,28 @@ static NETLIST_START(diode_models) NET_MODEL("1N5240 D(BV=10 IS=14.4p RS=32.0 N=1.10 CJO=24.1p VJ=0.750 M=0.330 TT=50.1n)") NET_MODEL("1N5240B D(BV=10 IS=14.4p RS=32.0 N=1.10 CJO=24.1p VJ=0.750 M=0.330 TT=50.1n)") -NETLIST_END() +} /* ---------------------------------------------------------------------------- * Mosfet Models * ---------------------------------------------------------------------------*/ static NETLIST_START(mosfet_models) +{ //NET_MODEL("NMOS _(VTO=0.0 N=1.0 IS=1E-14 KP=2E-5 UO=600 PHI=0.6 LD=0.0 L=1.0 TOX=1E-7 W=1.0 NSUB=0.0 GAMMA=0.0 RD=0.0 RS=0.0 LAMBDA=0.0)") //NET_MODEL("PMOS _(VTO=0.0 N=1.0 IS=1E-14 KP=2E-5 UO=600 PHI=0.6 LD=0.0 L=1.0 TOX=1E-7 W=1.0 NSUB=0.0 GAMMA=0.0 RD=0.0 RS=0.0 LAMBDA=0.0)") // NMOS_DEFAULT and PMOS_DEFAULT are created in nl_setup.cpp NET_MODEL("NMOS NMOS_DEFAULT(VTO=0.0 N=1.0 IS=1E-14 KP=0.0 UO=600 PHI=0.0 LD=0.0 L=100e-6 TOX=1E-7 W=100e-6 NSUB=0.0 GAMMA=0.0 RD=0.0 RS=0.0 LAMBDA=0.0 CGSO=0 CGDO=0 CGBO=0)") NET_MODEL("PMOS PMOS_DEFAULT(VTO=0.0 N=1.0 IS=1E-14 KP=0.0 UO=600 PHI=0.0 LD=0.0 L=100e-6 TOX=1E-7 W=100e-6 NSUB=0.0 GAMMA=0.0 RD=0.0 RS=0.0 LAMBDA=0.0 CGSO=0 CGDO=0 CGBO=0)") -NETLIST_END() +} /* ---------------------------------------------------------------------------- * BJT Models * ---------------------------------------------------------------------------*/ static NETLIST_START(bjt_models) +{ NET_MODEL("NPN _(IS=1e-15 BF=100 NF=1 BR=1 NR=1 CJE=0 CJC=0)") NET_MODEL("PNP _(IS=1e-15 BF=100 NF=1 BR=1 NR=1 CJE=0 CJC=0)") @@ -98,13 +101,14 @@ static NETLIST_START(bjt_models) NET_MODEL("BC817-25 NPN(IS=9.198E-14 NF=1.003 ISE=4.468E-16 NE=1.65 BF=338.8 IKF=0.4913 VAF=107.9 NR=1.002 ISC=5.109E-15 NC=1.071 BR=29.48 IKR=0.193 VAR=25 RB=1 IRB=1000 RBM=1 RE=0.2126 RC=0.143 XTB=0 EG=1.11 XTI=3 CJE=3.825E-11 VJE=0.7004 MJE=0.364 TF=5.229E-10 XTF=219.7 VTF=3.502 ITF=7.257 PTF=0 CJC=1.27E-11 VJC=0.4431 MJC=0.3983 XCJC=0.4555 TR=7E-11 CJS=0 VJS=0.75 MJS=0.333 FC=0.905 Vceo=45 Icrating=500m mfg=Philips)") NET_MODEL("9013 NPN(IS=3.40675E-14 BF=166 VAF=67 IKF=1.164 ISE=12.37e-15 NE=2 BR=15.17 VAR=40.84 IKR=0.261352 ISC=1.905E-15 NC=1.066 RB=63.2 IRB=5.62E-6 RBM=22.1 RE=0.02 RC=0.7426 CJE=3.53E-11 VJE=0.808 MJE=0.372 CJC=1.74E-11 VJC=0.614 MJC=0.388 XCJC=0.349 XTB=1.4025 EG=1.0999 XTI=3 VC=0.5 VCEO=20)") -NETLIST_END() +} /* ---------------------------------------------------------------------------- * Family models * ---------------------------------------------------------------------------*/ static NETLIST_START(family_models) +{ // FAMILIES always need a type. UNKNOWN below will break NET_MODEL("FAMILY _(TYPE=UNKNOWN IVL=0.16 IVH=0.4 OVL=0.1 OVH=1.0 ORL=1.0 ORH=130.0)") @@ -121,13 +125,14 @@ static NETLIST_START(family_models) NET_MODEL("CD4XXX FAMILY(TYPE=CMOS IVL=0.3 IVH=0.7 OVL=0.05 OVH=0.05 ORL=500 ORH=500)") NET_MODEL("74XXOC FAMILY(TYPE=TTL IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 ORH=1.0e8)") -NETLIST_END() +} /* ---------------------------------------------------------------------------- * Always included * ---------------------------------------------------------------------------*/ NETLIST_START(base_lib) +{ NET_REGISTER_DEV(GNDA, GND) NET_REGISTER_DEV(PARAMETER, NETLIST) @@ -157,5 +162,5 @@ NETLIST_START(base_lib) INCLUDE(modules_lib) -NETLIST_END() +} diff --git a/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp b/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp index 7c3edca19df..0444f9b94b9 100644 --- a/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp +++ b/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp @@ -20,6 +20,7 @@ //- +---+---++---+ //- static NETLIST_START(CD4001_DIP) +{ CD4001_GATE(A) CD4001_GATE(B) CD4001_GATE(C) @@ -28,17 +29,18 @@ static NETLIST_START(CD4001_DIP) NET_C(A.VDD, B.VDD, C.VDD, D.VDD) NET_C(A.VSS, B.VSS, C.VSS, D.VSS) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VDD */ A.VDD, - A.B, /* B1 |2 13| B4 */ D.B, - A.Q, /* Y1 |3 12| A4 */ D.A, - B.Q, /* Y2 |4 4001 11| Y4 */ D.Q, - B.A, /* A2 |5 10| Y3 */ C.Q, - B.B, /* B2 |6 9| B3 */ C.B, - A.VSS, /* VSS |7 8| A3 */ C.A - /* +--------------+ */ + DIPPINS( + /*# +--------------+ */ + A.A, /*# A1 |1 ++ 14| VDD */ A.VDD, // + A.B, /*# B1 |2 13| B4 */ D.B, // + A.Q, /*# Y1 |3 12| A4 */ D.A, // + B.Q, /*# Y2 |4 4001 11| Y4 */ D.Q, // + B.A, /*# A2 |5 10| Y3 */ C.Q, // + B.B, /*# B2 |6 9| B3 */ C.B, // + A.VSS, /*# VSS |7 8| A3 */ C.A // + /*# +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4006_DIP //- Title: CD4006BM/CD4006BC 18-Stage Static Shift Register @@ -49,6 +51,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS005942.PDF //- static NETLIST_START(CD4006_DIP) +{ CD4006(A) NC_PIN(NC) @@ -62,7 +65,7 @@ static NETLIST_START(CD4006_DIP) A.VSS, /* VSS |7 8| D4+4 */ A.D4P4 /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4011_DIP //- Title: CD4011BM/CD4011BC Quad 2-Input NAND Buffered B Series Gate @@ -81,6 +84,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(CD4011_DIP) +{ CD4011_GATE(A) CD4011_GATE(B) CD4011_GATE(C) @@ -99,7 +103,7 @@ static NETLIST_START(CD4011_DIP) A.VSS, /* VSS |7 8| E */ C.A /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4013_DIP //- Title: CD4013BM/CD4013BC Dual D Flip-Flop @@ -121,6 +125,7 @@ NETLIST_END() //- +-----+---+---+---++---+----+ //- static NETLIST_START(CD4013_DIP) +{ CD4013(A) CD4013(B) @@ -137,7 +142,7 @@ static NETLIST_START(CD4013_DIP) A.VSS, /* VSS |7 8| SET2 */ B.SET /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4016_DIP //- Title: CD4016BM/CD4016BC Quad Bilateral Switch @@ -148,6 +153,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/185/108711_DS.pdf //- static NETLIST_START(CD4016_DIP) +{ CD4066_GATE(A) CD4066_GATE(B) CD4066_GATE(C) @@ -171,7 +177,7 @@ static NETLIST_START(CD4016_DIP) A.VSS, /* VSS |7 8| INOUTC */ C.R.2 /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4017_DIP //- Title: CD4017BM/CD4017BC Decade Counter/Divider with 10 Decoded Outputs @@ -182,6 +188,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/166/108736_DS.pdf //- static NETLIST_START(CD4017_DIP) +{ CD4017(A) DIPPINS( /* +--------------+ */ @@ -195,7 +202,7 @@ static NETLIST_START(CD4017_DIP) A.VSS, /* VSS |8 9| Q8 */ A.Q8 /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4020_DIP //- Title: CD4020BC 14-Stage Ripple Carry Binary Counters @@ -206,6 +213,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/90/109006_DS.pdf //- static NETLIST_START(CD4020_DIP) +{ CD4020(A) DIPPINS( /* +--------------+ */ @@ -218,7 +226,7 @@ static NETLIST_START(CD4020_DIP) A.Q4, /* Q4 |7 10| PHI1 */ A.IP, A.VSS, /* VSS |8 9| Q1 */ A.Q1 /* +--------------+ */) -NETLIST_END() +} //- Identifier: CD4022_DIP //- Title: CD4022BM/CD4022BC Divide-by-8 Counter/Divider with 8 Decoded Outputs @@ -229,6 +237,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/166/108736_DS.pdf //- static NETLIST_START(CD4022_DIP) +{ CD4022(A) NC_PIN(NC) @@ -243,7 +252,7 @@ static NETLIST_START(CD4022_DIP) A.VSS, /* VSS |8 9| NC */ NC.I /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4024_DIP //- Title: CD4024BM/CD4024BC 7-Stage Ripple Carry Binary Counter @@ -254,6 +263,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/120/108894_DS.pdf //- static NETLIST_START(CD4024_DIP) +{ CD4024(A) NC_PIN(NC) @@ -266,7 +276,7 @@ static NETLIST_START(CD4024_DIP) A.Q4, /* Q4 |6 9| Q3 */ A.Q3, A.VSS, /* VSS |7 8| NC */ NC.I /* +--------------+ */) -NETLIST_END() +} //- Identifier: CD4029_DIP //- Title: CD4029BM/CD4029BC Presettable Binary/Decade Up/Down Counter @@ -387,6 +397,7 @@ NETLIST_END() //- +-----+-----+-----++----+----+----+----+ //- static NETLIST_START(CD4029_DIP) +{ CD4029(A) DIPPINS( /* +--------------+ */ @@ -399,7 +410,7 @@ static NETLIST_START(CD4029_DIP) A.CO, /* CO |7 10| U/D */ A.UD, A.VSS, /* VSS |8 9| B/D */ A.BD /* +--------------+ */) -NETLIST_END() +} //- Identifier: CD4030_DIP //- Title: CD4030M/CD4030C Quad EXCLUSIVE-OR Gate @@ -412,6 +423,7 @@ NETLIST_END() //- https://www.uni-kl.de/elektronik-lager/418055 //- static NETLIST_START(CD4030_DIP) +{ CD4030_GATE(A) CD4030_GATE(B) CD4030_GATE(C) @@ -427,7 +439,7 @@ static NETLIST_START(CD4030_DIP) A.VSS, /* VSS |7 8| A3 */ C.A /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4042_DIP //- Title: CD4042BM/CD4042BC Quad Clocked D Latch @@ -452,6 +464,7 @@ NETLIST_END() //- if D changes Q and QQ(/Q) will instantly change. //- static NETLIST_START(CD4042_DIP) +{ CD4042(A) DIPPINS( /* +--------------+ */ @@ -465,7 +478,7 @@ static NETLIST_START(CD4042_DIP) A.VSS, /* VSS |8 9| Q2Q */ A.Q2Q /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4049_DIP //- Title: CD4049UBM/CD4049UBC Hex Inverting Buffer @@ -478,6 +491,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/134/109125_DS.pdf //- static NETLIST_START(CD4049_DIP) +{ CD4049_GATE(A) CD4049_GATE(B) CD4049_GATE(C) @@ -511,7 +525,7 @@ static NETLIST_START(CD4049_DIP) A.VSS, /* VSS |8 9| D */ D.A /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4053_DIP //- Title: CD4053BM/CD4053BC Triple 2-Channel AnalogMultiplexer/Demultiplexer @@ -522,6 +536,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS005662.PDF //- static NETLIST_START(CD4053_DIP) +{ CD4053_GATE(A) CD4053_GATE(B) CD4053_GATE(C) @@ -546,7 +561,7 @@ static NETLIST_START(CD4053_DIP) A.VSS, /* VSS |8 9| C */ C.S /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4066_DIP //- Title: CD4066BM/CD4066BC Quad Bilateral Switch @@ -557,6 +572,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS005665.PDF //- static NETLIST_START(CD4066_DIP) +{ CD4066_GATE(A) CD4066_GATE(B) CD4066_GATE(C) @@ -580,7 +596,7 @@ static NETLIST_START(CD4066_DIP) A.VSS, /* VSS |7 8| INOUTC */ C.R.2 /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4069_DIP //- Title: CD4069UBM/CD4069UBC Inverter Circuits @@ -591,6 +607,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/150/206783_DS.pdf //- static NETLIST_START(CD4069_DIP) +{ CD4069_GATE(A) CD4069_GATE(B) CD4069_GATE(C) @@ -611,7 +628,7 @@ static NETLIST_START(CD4069_DIP) A.VSS, /* VSS |7 8| Y4 */ D.Q /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4070_DIP //- Title: CD4070BM/CD4070BC Quad 2-Input EXCLUSIVE-OR Gate @@ -622,6 +639,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/150/206783_DS.pdf //- static NETLIST_START(CD4070_DIP) +{ CD4070_GATE(A) CD4070_GATE(B) CD4070_GATE(C) @@ -640,7 +658,7 @@ static NETLIST_START(CD4070_DIP) A.VSS, /* VSS |7 8| E */ C.A /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4071_DIP //- Title: CD4071BC Quad 2-Input OR Buffered B Series Gate @@ -651,6 +669,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/185/109289_DS.pdf //- static NETLIST_START(CD4071_DIP) +{ CD4071_GATE(A) CD4071_GATE(B) CD4071_GATE(C) @@ -669,7 +688,7 @@ static NETLIST_START(CD4071_DIP) A.VSS, /* VSS |7 8| E */ C.A /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4076_DIP //- Title: CD4076BM/CD4076BC TRI-STATE(R) Quad D Flip-Flop @@ -706,6 +725,7 @@ NETLIST_END() //- +-----+-----+-----++-----+ //- static NETLIST_START(CD4076_DIP) +{ CD4076(A) DIPPINS( /* +--------------+ */ @@ -719,7 +739,7 @@ static NETLIST_START(CD4076_DIP) A.VSS, /* VSS |8 9| ID1 */ A.ID1 /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4081_DIP //- Title: CD4081BC Quad 2-Input AND Buffered B Series Gate @@ -730,6 +750,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/185/109289_DS.pdf //- static NETLIST_START(CD4081_DIP) +{ CD4081_GATE(A) CD4081_GATE(B) CD4081_GATE(C) @@ -748,7 +769,7 @@ static NETLIST_START(CD4081_DIP) A.VSS, /* VSS |7 8| E */ C.A /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4316_DIP //- Title: 74HC/HCT4316 Quad bilateral switches @@ -759,6 +780,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/philips/74HCT4316.pdf //- static NETLIST_START(CD4316_DIP) +{ CD4316_GATE(A) CD4316_GATE(B) CD4316_GATE(C) @@ -784,7 +806,7 @@ static NETLIST_START(CD4316_DIP) A.VSS, /* GND |8 9| VEE */ VEE /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: CD4538_DIP //- Title: CD4538BC Dual Precision Monostable @@ -800,6 +822,7 @@ NETLIST_END() //- https://pdf1.alldatasheet.com/datasheet-pdf/view/50871/FAIRCHILD/CD4538.html //- static NETLIST_START(CD4538_DIP) +{ CD4538(A) CD4538(B) @@ -817,10 +840,11 @@ static NETLIST_START(CD4538_DIP) A.VSS, /* GND |8 9| VEE */ B.QQ /* +--------------+ */ ) -NETLIST_END() +} //FIXME: Documentation static NETLIST_START(MM5837_DIP) +{ MM5837(A) NC_PIN(NC) @@ -836,75 +860,84 @@ static NETLIST_START(MM5837_DIP) A.VSS, /* VSS |4 5| NC */ NC.I /* +--------+ */ ) -NETLIST_END() +} -static TRUTHTABLE_START(CD4001_GATE, 2, 1, "") +static TRUTH_TABLE(CD4001_GATE, 2, 1, "") +{ TT_HEAD("A , B | Q ") TT_LINE("0,0|1|110") TT_LINE("X,1|0|120") TT_LINE("1,X|0|120") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(CD4011_GATE, 2, 1, "") +static TRUTH_TABLE(CD4011_GATE, 2, 1, "") +{ TT_HEAD("A,B|Q ") TT_LINE("0,X|1|100") TT_LINE("X,0|1|100") TT_LINE("1,1|0|100") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(CD4030_GATE, 2, 1, "") +static TRUTH_TABLE(CD4030_GATE, 2, 1, "") +{ TT_HEAD("A,B|Q ") TT_LINE("0,0|0|100") TT_LINE("0,1|1|100") TT_LINE("1,0|1|100") TT_LINE("1,1|0|100") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(CD4049_GATE, 1, 1, "") +static TRUTH_TABLE(CD4049_GATE, 1, 1, "") +{ TT_HEAD("A|Q ") TT_LINE("0|1|45") TT_LINE("1|0|45") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(CD4069_GATE, 1, 1, "") +static TRUTH_TABLE(CD4069_GATE, 1, 1, "") +{ TT_HEAD("A|Q ") TT_LINE("0|1|55") TT_LINE("1|0|55") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(CD4070_GATE, 2, 1, "") +static TRUTH_TABLE(CD4070_GATE, 2, 1, "") +{ TT_HEAD("A,B|Q ") TT_LINE("0,0|0|15") TT_LINE("0,1|1|22") TT_LINE("1,0|1|22") TT_LINE("1,1|0|15") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(CD4071_GATE, 2, 1, "") +static TRUTH_TABLE(CD4071_GATE, 2, 1, "") +{ TT_HEAD("A,B|Q ") TT_LINE("0,0|0|200") TT_LINE("0,1|1|200") TT_LINE("1,0|1|200") TT_LINE("1,1|1|200") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(CD4081_GATE, 2, 1, "") +static TRUTH_TABLE(CD4081_GATE, 2, 1, "") +{ TT_HEAD("A,B|Q ") TT_LINE("0,0|0|200") TT_LINE("0,1|0|200") TT_LINE("1,0|0|200") TT_LINE("1,1|1|200") TT_FAMILY("CD4XXX") -TRUTHTABLE_END() +} NETLIST_START(cd4xxx_lib) +{ TRUTHTABLE_ENTRY(CD4001_GATE) TRUTHTABLE_ENTRY(CD4011_GATE) @@ -942,4 +975,4 @@ NETLIST_START(cd4xxx_lib) LOCAL_LIB_ENTRY(MM5837_DIP) -NETLIST_END() +} diff --git a/src/lib/netlist/macro/nlm_opamp_lib.cpp b/src/lib/netlist/macro/nlm_opamp_lib.cpp index 7d59217416b..207d1b9659b 100644 --- a/src/lib/netlist/macro/nlm_opamp_lib.cpp +++ b/src/lib/netlist/macro/nlm_opamp_lib.cpp @@ -22,6 +22,7 @@ */ static NETLIST_START(opamp_layout_4_4_11) +{ DIPPINS( /* +--------------+ */ A.OUT, /* |1 ++ 14| */ D.OUT, A.MINUS, /* |2 13| */ D.MINUS, @@ -34,13 +35,14 @@ static NETLIST_START(opamp_layout_4_4_11) ) NET_C(A.GND, B.GND, C.GND, D.GND) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) -NETLIST_END() +} /* * Generic layout with 2 opamps, VCC on pin 8 and GND on pin 4 */ static NETLIST_START(opamp_layout_2_8_4) +{ DIPPINS( /* +--------------+ */ A.OUT, /* |1 ++ 8| */ A.VCC, A.MINUS, /* |2 7| */ B.OUT, @@ -50,13 +52,14 @@ static NETLIST_START(opamp_layout_2_8_4) ) NET_C(A.GND, B.GND) NET_C(A.VCC, B.VCC) -NETLIST_END() +} /* * Generic layout with 2 opamps, VCC+ on pins 9/13, VCC- on pin 4 and compensation */ static NETLIST_START(opamp_layout_2_13_9_4) +{ DIPPINS( /* +--------------+ */ A.MINUS, /* |1 ++ 14| */ A.N2, A.PLUS, /* |2 13| */ A.VCC, @@ -68,7 +71,7 @@ static NETLIST_START(opamp_layout_2_13_9_4) /* +--------------+ */ ) NET_C(A.GND, B.GND) -NETLIST_END() +} /* * Generic layout with 1 opamp, VCC+ on pin 7, VCC- on pin 4 and compensation @@ -76,6 +79,7 @@ NETLIST_END() */ static NETLIST_START(opamp_layout_1_7_4) +{ DIPPINS( /* +--------------+ */ NC /* OFFSET */, /* |1 ++ 8| */ NC, A.MINUS, /* |2 7| */ A.VCC, @@ -83,13 +87,14 @@ static NETLIST_START(opamp_layout_1_7_4) A.GND, /* |4 5| */ NC /* OFFSET */ /* +--------------+ */ ) -NETLIST_END() +} /* * Generic layout with 1 opamp, VCC+ on pin 8, VCC- on pin 5 and compensation */ static NETLIST_START(opamp_layout_1_8_5) +{ DIPPINS( /* +--------------+ */ NC.1, /* |1 10| */ NC.3, OFFSET.N1, /* |2 9| */ NC.2, @@ -103,13 +108,14 @@ static NETLIST_START(opamp_layout_1_8_5) NET_C(A.MINUS, MINUS) NET_C(A.PLUS, PLUS) NET_C(A.OUT, OUT) -NETLIST_END() +} /* * Generic layout with 1 opamp, VCC+ on pin 11, VCC- on pin 6 and compensation */ static NETLIST_START(opamp_layout_1_11_6) +{ DIPPINS( /* +--------------+ */ NC.1, /* |1 ++ 14| */ NC.7, NC.2, /* |2 13| */ NC.6, @@ -125,9 +131,10 @@ static NETLIST_START(opamp_layout_1_11_6) NET_C(A.MINUS, MINUS) NET_C(A.PLUS, PLUS) NET_C(A.OUT, OUT) -NETLIST_END() +} static NETLIST_START(MB3614_DIP) +{ OPAMP(A, "MB3614") OPAMP(B, "MB3614") OPAMP(C, "MB3614") @@ -135,9 +142,10 @@ static NETLIST_START(MB3614_DIP) INCLUDE(opamp_layout_4_4_11) -NETLIST_END() +} static NETLIST_START(MC3340_DIP) +{ // A netlist description of the Motorola MC3340 Electronic Attenuator // IC, a voltage-controlled amplifier/attenuator. It amplifies or // attenuates an input signal according to the voltage of a second, @@ -305,24 +313,27 @@ static NETLIST_START(MC3340_DIP) ALIAS(6, ROLLOFF) ALIAS(7, OUTPUT) ALIAS(8, VCC) -NETLIST_END() +} static NETLIST_START(TL081_DIP) +{ OPAMP(A, "TL084") INCLUDE(opamp_layout_1_7_4) -NETLIST_END() +} static NETLIST_START(TL082_DIP) +{ OPAMP(A, "TL084") OPAMP(B, "TL084") INCLUDE(opamp_layout_2_8_4) -NETLIST_END() +} static NETLIST_START(TL084_DIP) +{ OPAMP(A, "TL084") OPAMP(B, "TL084") OPAMP(C, "TL084") @@ -330,9 +341,10 @@ static NETLIST_START(TL084_DIP) INCLUDE(opamp_layout_4_4_11) -NETLIST_END() +} static NETLIST_START(LM324_DIP) +{ OPAMP(A, "LM324") OPAMP(B, "LM324") OPAMP(C, "LM324") @@ -340,9 +352,10 @@ static NETLIST_START(LM324_DIP) INCLUDE(opamp_layout_4_4_11) -NETLIST_END() +} static NETLIST_START(LM2902_DIP) +{ // Same datasheet and mostly same characteristics as LM324 OPAMP(A, "LM324") OPAMP(B, "LM324") @@ -351,9 +364,10 @@ static NETLIST_START(LM2902_DIP) INCLUDE(opamp_layout_4_4_11) -NETLIST_END() +} static NETLIST_START(LM348_DIP) +{ OPAMP(A, "UA741") OPAMP(B, "UA741") OPAMP(C, "UA741") @@ -361,62 +375,69 @@ static NETLIST_START(LM348_DIP) INCLUDE(opamp_layout_4_4_11) -NETLIST_END() +} static NETLIST_START(LM358_DIP) +{ OPAMP(A, "LM358") OPAMP(B, "LM358") INCLUDE(opamp_layout_2_8_4) -NETLIST_END() +} static NETLIST_START(UA741_DIP8) +{ OPAMP(A, "UA741") INCLUDE(opamp_layout_1_7_4) -NETLIST_END() +} static NETLIST_START(UA741_DIP10) +{ OPAMP(A, "UA741") INCLUDE(opamp_layout_1_8_5) -NETLIST_END() +} static NETLIST_START(UA741_DIP14) +{ OPAMP(A, "UA741") INCLUDE(opamp_layout_1_11_6) -NETLIST_END() +} static NETLIST_START(MC1558_DIP) +{ OPAMP(A, "UA741") OPAMP(B, "UA741") INCLUDE(opamp_layout_2_8_4) -NETLIST_END() +} static NETLIST_START(LM747_DIP) +{ OPAMP(A, "LM747") OPAMP(B, "LM747") INCLUDE(opamp_layout_2_13_9_4) NET_C(A.VCC, B.VCC) -NETLIST_END() +} static NETLIST_START(LM747A_DIP) +{ OPAMP(A, "LM747A") OPAMP(B, "LM747A") INCLUDE(opamp_layout_2_13_9_4) NET_C(A.VCC, B.VCC) -NETLIST_END() +} //- Identifier: AN6551_SIL //- Title: AN6551 Dual Operational Amplifier @@ -427,6 +448,7 @@ NETLIST_END() //- https://datasheetspdf.com/pdf-file/182163/PanasonicSemiconductor/AN6551/1 //- static NETLIST_START(AN6551_SIL) +{ OPAMP(A, "AN6551") OPAMP(B, "AN6551") @@ -441,10 +463,11 @@ static NETLIST_START(AN6551_SIL) ALIAS(7, B.MINUS) ALIAS(8, B.OUT) ALIAS(9, B.VCC) -NETLIST_END() +} #if USE_LM3900_MODEL == 0 static NETLIST_START(LM3900) +{ /* * Fast norton opamp model without bandwidth @@ -472,7 +495,7 @@ static NETLIST_START(LM3900) //PARAM(G1.RI, 1) PARAM(G1.RO, RES_K(8)) -NETLIST_END() +} #endif #if USE_LM3900_MODEL == 1 @@ -482,6 +505,7 @@ NETLIST_END() // // PIN ORDER: IN+ IN- VCC VSS OUT static NETLIST_START(LM3900) +{ PARAM(E1.G, 0.5) //ALIAS(IN+, Q2.B) //ALIAS(IN-, Q2.C) @@ -524,11 +548,12 @@ static NETLIST_START(LM3900) NET_C(Q6.E, Q10.B, Q4.C) NET_C(Q6.C, Q10.E, Q9.C, Q7.E) NET_C(Q2.B, Q1.C, Q1.B, Q11.E) -NETLIST_END() +} #endif #if USE_LM3900_MODEL == 2 static NETLIST_START(LM3900) +{ OPAMP(A, "LM3900") DIODE(D1, "D(IS=1e-15 N=1)") @@ -545,11 +570,12 @@ static NETLIST_START(LM3900) NET_C(CS1.ON, A.MINUS) NET_C(CS1.OP, A.GND, D1.K) -NETLIST_END() +} #endif #if USE_LM3900_MODEL == 3 static NETLIST_START(LM3900) +{ ALIAS(VCC, Q5.C) ALIAS(GND, Q1.E) @@ -573,11 +599,12 @@ static NETLIST_START(LM3900) NET_C(Q1.E, Q2.E, Q4.C, C1.2, I1.2, Q6.E) NET_C(Q1.C, Q2.B) NET_C(Q2.C, Q3.B, Q4.B, C1.1) -NETLIST_END() +} #endif #if USE_LM3900_MODEL == 4 static NETLIST_START(LM3900) +{ OPAMP(A, "OPAMP(TYPE=3 VLH=0.5 VLL=0.03 FPF=2k UGF=2.5M SLEW=1M RI=10M RO=100 DAB=0.0015)") DIODE(D1, "D(IS=6e-15 N=1)") @@ -604,10 +631,11 @@ static NETLIST_START(LM3900) NET_C(D2.K, A.GND) NET_C(VS1.OP, A.MINUS) NET_C(VS1.ON, A.PLUS, A.GND) -NETLIST_END() +} #endif NETLIST_START(opamp_lib) +{ LOCAL_LIB_ENTRY(opamp_layout_4_4_11) LOCAL_LIB_ENTRY(opamp_layout_2_8_4) LOCAL_LIB_ENTRY(opamp_layout_2_13_9_4) @@ -654,4 +682,4 @@ NETLIST_START(opamp_lib) LOCAL_LIB_ENTRY(LM3900) LOCAL_LIB_ENTRY(AN6551_SIL) -NETLIST_END() +} diff --git a/src/lib/netlist/macro/nlm_otheric_lib.cpp b/src/lib/netlist/macro/nlm_otheric_lib.cpp index 02e61055956..5ec6ca822a8 100644 --- a/src/lib/netlist/macro/nlm_otheric_lib.cpp +++ b/src/lib/netlist/macro/nlm_otheric_lib.cpp @@ -20,6 +20,7 @@ */ static NETLIST_START(MC14584B_DIP) +{ MC14584B_GATE(A) MC14584B_GATE(B) MC14584B_GATE(C) @@ -39,7 +40,7 @@ static NETLIST_START(MC14584B_DIP) A.VSS,/* VSS |7 8| Y4 */ D.Q /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: NE566_DIP //- Title: NE566 Voltage Controlled Oscillator @@ -57,6 +58,7 @@ NETLIST_END() //. static NETLIST_START(NE566_DIP) +{ VCVS(VI, 1) CCCS(CI1, -1) @@ -126,7 +128,7 @@ static NETLIST_START(NE566_DIP) NET_C(COMP.VCC, FO.A1) -NETLIST_END() +} //- Identifier: NE555_DIP //- Title: NE555 PRECISION TIMERS @@ -154,6 +156,7 @@ NETLIST_END() //- |High | >1/3 VDD | <2/3 VDD | As previously established|| //- static NETLIST_START(NE555_DIP) +{ NE555(A) @@ -166,9 +169,10 @@ static NETLIST_START(NE555_DIP) ALIAS(7, A.DISCH) // Pin 7 ALIAS(8, A.VCC) // Pin 8 -NETLIST_END() +} static NETLIST_START(MC1455P_DIP) +{ MC1455P(A) @@ -181,17 +185,19 @@ static NETLIST_START(MC1455P_DIP) ALIAS(7, A.DISCH) // Pin 7 ALIAS(8, A.VCC) // Pin 8 -NETLIST_END() +} -static TRUTHTABLE_START(MC14584B_GATE, 1, 1, "") +static TRUTH_TABLE(MC14584B_GATE, 1, 1, "") +{ TT_HEAD(" A | Q ") TT_LINE(" 0 | 1 |100") TT_LINE(" 1 | 0 |100") // 2.1V negative going and 2.7V positive going at 5V TT_FAMILY("FAMILY(TYPE=CMOS IVL=0.42 IVH=0.54 OVL=0.05 OVH=0.05 ORL=10.0 ORH=10.0)") -TRUTHTABLE_END() +} NETLIST_START(otheric_lib) +{ TRUTHTABLE_ENTRY(MC14584B_GATE) @@ -199,5 +205,5 @@ NETLIST_START(otheric_lib) LOCAL_LIB_ENTRY(NE566_DIP) LOCAL_LIB_ENTRY(NE555_DIP) LOCAL_LIB_ENTRY(MC1455P_DIP) -NETLIST_END() +} diff --git a/src/lib/netlist/macro/nlm_roms_lib.cpp b/src/lib/netlist/macro/nlm_roms_lib.cpp index d728078c87f..cf5933bbc58 100644 --- a/src/lib/netlist/macro/nlm_roms_lib.cpp +++ b/src/lib/netlist/macro/nlm_roms_lib.cpp @@ -26,6 +26,7 @@ //- static NETLIST_START(PROM_82S126_DIP) +{ PROM_82S126(A) @@ -51,7 +52,7 @@ static NETLIST_START(PROM_82S126_DIP) ALIAS(14, A.CE2Q) ALIAS(15, A.A7) ALIAS(16, A.VCC) -NETLIST_END() +} //- Identifier: PROM_74S287_DIP //- Title: 74S287 (256 x 4) 1024-Bit TTL PROM @@ -75,6 +76,7 @@ NETLIST_END() //- static NETLIST_START(PROM_74S287_DIP) +{ PROM_74S287(A) @@ -100,7 +102,7 @@ static NETLIST_START(PROM_74S287_DIP) ALIAS(14, A.CE2Q) ALIAS(15, A.A7) ALIAS(16, A.VCC) -NETLIST_END() +} //- Identifier: PROM_82S123_DIP //- Title: 82S123 256 bit TTL bipolar PROM @@ -124,6 +126,7 @@ NETLIST_END() //- static NETLIST_START(PROM_82S123_DIP) +{ PROM_82S123(A) @@ -150,7 +153,7 @@ static NETLIST_START(PROM_82S123_DIP) ALIAS(14, A.A4) ALIAS(15, A.CEQ) ALIAS(16, A.VCC) -NETLIST_END() +} /* * nld_82S16.h @@ -194,6 +197,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/400/500340_DS.pdf //- static NETLIST_START(EPROM_2716_DIP) +{ EPROM_2716(A) @@ -227,7 +231,7 @@ static NETLIST_START(EPROM_2716_DIP) ALIAS(22, A.A9) ALIAS(23, A.A8) ALIAS(24, A.VCC) -NETLIST_END() +} /* DM82S16: 256 Bit bipolar ram * @@ -246,6 +250,7 @@ NETLIST_END() */ static NETLIST_START(TTL_82S16_DIP) +{ TTL_82S16(A) DIPPINS( /* +--------------+ */ @@ -259,7 +264,7 @@ static NETLIST_START(TTL_82S16_DIP) A.GND, /* GND |8 9| A5 */ A.A5 /* +--------------+ */ ) -NETLIST_END() +} /* 82S115: 4K-bit TTL bipolar PROM (512 x 8) * @@ -280,6 +285,7 @@ NETLIST_END() */ static NETLIST_START(PROM_82S115_DIP) +{ PROM_82S115(A) NC_PIN(NC) @@ -298,7 +304,7 @@ static NETLIST_START(PROM_82S115_DIP) A.GND, /* GND |12 13| FE1 */ NC.I /* +--------------+ */ ) -NETLIST_END() +} //- Identifier: PROM_MK28000_DIP //- Title: MK28000 (2048 x 8 or 4096 x 4) 16384-Bit TTL PROM @@ -311,6 +317,7 @@ NETLIST_END() //- None. static NETLIST_START(PROM_MK28000_DIP) +{ PROM_MK28000(A) @@ -340,7 +347,7 @@ static NETLIST_START(PROM_MK28000_DIP) ALIAS(22, A.O2) ALIAS(23, A.O1) ALIAS(24, A.OE1) -NETLIST_END() +} //- Identifier: ROM_MCM14524_DIP //- Title: MCM14524 1024-BIT READ ONLY MEMORY @@ -355,6 +362,7 @@ NETLIST_END() //- http://www.bitsavers.org/components/motorola/_dataBooks/1978_Motorola_CMOS_Data_Book.pdf 7-439 (pdf page 488) static NETLIST_START(ROM_MCM14524_DIP) +{ ROM_MCM14524(A) @@ -373,7 +381,7 @@ static NETLIST_START(ROM_MCM14524_DIP) A.GND, /* VSS |8 9| A3 */ A.A3 /* +------------+ */ ) -NETLIST_END() +} /* 2102: 1024 x 1-bit Static RAM * @@ -389,6 +397,7 @@ NETLIST_END() * +--------------+ */ static NETLIST_START(RAM_2102A_DIP) +{ RAM_2102A(A) DIPPINS( /* +--------------+ */ @@ -402,10 +411,11 @@ static NETLIST_START(RAM_2102A_DIP) A.A0, /* A0 |8 9| GND */ A.GND /* +--------------+ */ ) -NETLIST_END() +} //FIXME: Documentation static NETLIST_START(ROM_TMS4800_DIP) +{ ROM_TMS4800(A) DIPPINS( /* +----------------+ */ @@ -423,10 +433,11 @@ static NETLIST_START(ROM_TMS4800_DIP) A.A7, /* A7 |12 13| AR */ A.AR /* +----------------+ */ ) -NETLIST_END() +} NETLIST_START(roms_lib) +{ LOCAL_LIB_ENTRY(PROM_82S123_DIP) LOCAL_LIB_ENTRY(PROM_82S126_DIP) @@ -438,5 +449,5 @@ NETLIST_START(roms_lib) LOCAL_LIB_ENTRY(ROM_MCM14524_DIP) LOCAL_LIB_ENTRY(RAM_2102A_DIP) LOCAL_LIB_ENTRY(ROM_TMS4800_DIP) - NETLIST_END() + } diff --git a/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp b/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp index c918d5015e6..19b4d05a1c6 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp +++ b/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp @@ -1,6 +1,8 @@ - // license:CC0 +// license:CC0 // copyright-holders:Couriersud +//#rewritten with sed -e "s_^\(.*\)/\*\(.*\)\*/\(.*\)\$_\1\3 // \2_g" ../macro/nlm_ttl74xx_lib.cpp + #include "devices/net_lib.h" //- Identifier: TTL_7400_DIP @@ -30,18 +32,16 @@ static NETLIST_START(TTL_7400_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| B4 */ D.B, - A.Q, /* Y1 |3 12| A4 */ D.A, - B.A, /* A2 |4 7400 11| Y4 */ D.Q, - B.B, /* B2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ - ) + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, D.B, // B1 |2 13| B4 + A.Q, D.A, // Y1 |3 12| A4 + B.A, D.Q, // A2 |4 7400 11| Y4 + B.B, C.B, // B2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q) // GND |7 8| Y3 + // +--------------+ } -NETLIST_END() //- Identifier: TTL_7402_DIP //- Title: 5402/DM5402/DM7402 Quad 2-Input NOR Gates @@ -61,6 +61,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7402_DIP) +{ TTL_7402_NOR(A) TTL_7402_NOR(B) TTL_7402_NOR(C) @@ -69,17 +70,17 @@ static NETLIST_START(TTL_7402_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.Q, /* Y1 |1 ++ 14| VCC */ A.VCC, - A.A, /* A1 |2 13| Y4 */ D.Q, - A.B, /* B1 |3 12| B4 */ D.B, - B.Q, /* Y2 |4 7402 11| A4 */ D.A, - B.A, /* A2 |5 10| Y3 */ C.Q, - B.B, /* B2 |6 9| B3 */ C.B, - A.GND, /* GND |7 8| A3 */ C.A - /* +--------------+ */ + DIPPINS( // +--------------+ + A.Q, A.VCC, // Y1 |1 ++ 14| VCC + A.A, D.Q, // A1 |2 13| Y4 + A.B, D.B, // B1 |3 12| B4 + B.Q, D.A, // Y2 |4 7402 11| A4 + B.A, C.Q, // A2 |5 10| Y3 + B.B, C.B, // B2 |6 9| B3 + A.GND, C.A // GND |7 8| A3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7404_DIP //- Title: 5404/DM5404/DM7404 Hex Inverting Gates @@ -97,6 +98,7 @@ NETLIST_END() //- +---++---+ //- static NETLIST_START(TTL_7404_DIP) +{ TTL_7404_INVERT(A) TTL_7404_INVERT(B) TTL_7404_INVERT(C) @@ -107,17 +109,17 @@ static NETLIST_START(TTL_7404_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.Q, /* Y1 |2 13| A6 */ F.A, - B.A, /* A2 |3 12| Y6 */ F.Q, - B.Q, /* Y2 |4 7404 11| A5 */ E.A, - C.A, /* A3 |5 10| Y5 */ E.Q, - C.Q, /* Y3 |6 9| A4 */ D.A, - A.GND, /* GND |7 8| Y4 */ D.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.Q, F.A, // Y1 |2 13| A6 + B.A, F.Q, // A2 |3 12| Y6 + B.Q, E.A, // Y2 |4 7404 11| A5 + C.A, E.Q, // A3 |5 10| Y5 + C.Q, D.A, // Y3 |6 9| A4 + A.GND, D.Q // GND |7 8| Y4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7406_DIP //- Title: DM5406/DM7406 Hex Inverting Buffers with High Voltage Open-Collector Outputs @@ -136,6 +138,7 @@ NETLIST_END() //- +---++---+ //- static NETLIST_START(TTL_7406_DIP) +{ TTL_7406_GATE(A) TTL_7406_GATE(B) TTL_7406_GATE(C) @@ -146,17 +149,17 @@ static NETLIST_START(TTL_7406_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.Y, /* Y1 |2 13| A6 */ F.A, - B.A, /* A2 |3 12| Y6 */ F.Y, - B.Y, /* Y2 |4 7406 11| A5 */ E.A, - C.A, /* A3 |5 10| Y5 */ E.Y, - C.Y, /* Y3 |6 9| A4 */ D.A, - A.GND, /* GND |7 8| Y4 */ D.Y - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.Y, F.A, // Y1 |2 13| A6 + B.A, F.Y, // A2 |3 12| Y6 + B.Y, E.A, // Y2 |4 7406 11| A5 + C.A, E.Y, // A3 |5 10| Y5 + C.Y, D.A, // Y3 |6 9| A4 + A.GND, D.Y // GND |7 8| Y4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7407_DIP //- Title: DM5407/DM7407 Hex Buffers with High Voltage Open-Collector Outputs @@ -175,6 +178,7 @@ NETLIST_END() //- +---++---+ //- static NETLIST_START(TTL_7407_DIP) +{ TTL_7407_GATE(A) TTL_7407_GATE(B) TTL_7407_GATE(C) @@ -185,17 +189,17 @@ static NETLIST_START(TTL_7407_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.Y, /* Y1 |2 13| A6 */ F.A, - B.A, /* A2 |3 12| Y6 */ F.Y, - B.Y, /* Y2 |4 7407 11| A5 */ E.A, - C.A, /* A3 |5 10| Y5 */ E.Y, - C.Y, /* Y3 |6 9| A4 */ D.A, - A.GND,/* GND |7 8| Y4 */ D.Y - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.Y, F.A, // Y1 |2 13| A6 + B.A, F.Y, // A2 |3 12| Y6 + B.Y, E.A, // Y2 |4 7407 11| A5 + C.A, E.Y, // A3 |5 10| Y5 + C.Y, D.A, // Y3 |6 9| A4 + A.GND, D.Y // GND |7 8| Y4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7408_DIP //- Title: 5408/DM5408/DM7408 Quad 2-Input AND Gates @@ -215,6 +219,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7408_DIP) +{ TTL_7408_AND(A) TTL_7408_AND(B) TTL_7408_AND(C) @@ -223,17 +228,17 @@ static NETLIST_START(TTL_7408_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| B4 */ D.B, - A.Q, /* Y1 |3 12| A4 */ D.A, - B.A, /* A2 |4 7408 11| Y4 */ D.Q, - B.B, /* B2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, D.B, // B1 |2 13| B4 + A.Q, D.A, // Y1 |3 12| A4 + B.A, D.Q, // A2 |4 7408 11| Y4 + B.B, C.B, // B2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7410_DIP //- Title: 5410/DM5410/DM7410 Triple 3-Input NAND Gates @@ -253,6 +258,7 @@ NETLIST_END() //- +---+---+---++---+ //- static NETLIST_START(TTL_7410_DIP) +{ TTL_7410_NAND(A) TTL_7410_NAND(B) TTL_7410_NAND(C) @@ -260,17 +266,17 @@ static NETLIST_START(TTL_7410_DIP) NET_C(A.VCC, B.VCC, C.VCC) NET_C(A.GND, B.GND, C.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| C1 */ A.C, - B.A, /* A2 |3 12| Y1 */ A.Q, - B.B, /* B2 |4 7410 11| C3 */ C.C, - B.C, /* C2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, A.C, // B1 |2 13| C1 + B.A, A.Q, // A2 |3 12| Y1 + B.B, C.C, // B2 |4 7410 11| C3 + B.C, C.B, // C2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7411_DIP //- Title: DM7411 Triple 3-Input AND Gate @@ -290,6 +296,7 @@ NETLIST_END() //- +---+---+---++---+ //- static NETLIST_START(TTL_7411_DIP) +{ TTL_7411_AND(A) TTL_7411_AND(B) TTL_7411_AND(C) @@ -297,17 +304,17 @@ static NETLIST_START(TTL_7411_DIP) NET_C(A.VCC, B.VCC, C.VCC) NET_C(A.GND, B.GND, C.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| C1 */ A.C, - B.A, /* A2 |3 12| Y1 */ A.Q, - B.B, /* B2 |4 7411 11| C3 */ C.C, - B.C, /* C2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, A.C, // B1 |2 13| C1 + B.A, A.Q, // A2 |3 12| Y1 + B.B, C.C, // B2 |4 7411 11| C3 + B.C, C.B, // C2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7414_DIP //- Title: DM5414/DM7414 Hex Inverter withSchmitt Trigger Inputs @@ -325,22 +332,25 @@ NETLIST_END() //- +---++---+ //- static NETLIST_START(TTL_7414_GATE) +{ SCHMITT_TRIGGER(X, "DM7414") ALIAS(A, X.A) ALIAS(Q, X.Q) ALIAS(GND, X.GND) ALIAS(VCC, X.VCC) -NETLIST_END() +} static NETLIST_START(TTL_74LS14_GATE) +{ SCHMITT_TRIGGER(X, "DM74LS14") ALIAS(A, X.A) ALIAS(Q, X.Q) ALIAS(GND, X.GND) ALIAS(VCC, X.VCC) -NETLIST_END() +} static NETLIST_START(TTL_7414_DIP) +{ SCHMITT_TRIGGER(A, "DM7414") SCHMITT_TRIGGER(B, "DM7414") SCHMITT_TRIGGER(C, "DM7414") @@ -351,19 +361,20 @@ static NETLIST_START(TTL_7414_DIP) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.Q, /* Y1 |2 13| A6 */ F.A, - B.A, /* A2 |3 12| Y6 */ F.Q, - B.Q, /* Y2 |4 7414 11| A5 */ E.A, - C.A, /* A3 |5 10| Y5 */ E.Q, - C.Q, /* Y3 |6 9| A4 */ D.A, - A.GND, /* GND |7 8| Y4 */ D.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.Q, F.A, // Y1 |2 13| A6 + B.A, F.Q, // A2 |3 12| Y6 + B.Q, E.A, // Y2 |4 7414 11| A5 + C.A, E.Q, // A3 |5 10| Y5 + C.Q, D.A, // Y3 |6 9| A4 + A.GND, D.Q // GND |7 8| Y4 + // +--------------+ ) -NETLIST_END() +} static NETLIST_START(TTL_74LS14_DIP) +{ SCHMITT_TRIGGER(A, "DM74LS14") SCHMITT_TRIGGER(B, "DM74LS14") SCHMITT_TRIGGER(C, "DM74LS14") @@ -374,17 +385,17 @@ static NETLIST_START(TTL_74LS14_DIP) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.Q, /* Y1 |2 13| A6 */ F.A, - B.A, /* A2 |3 12| Y6 */ F.Q, - B.Q, /* Y2 |4 74LS14 11| A5 */ E.A, - C.A, /* A3 |5 10| Y5 */ E.Q, - C.Q, /* Y3 |6 9| A4 */ D.A, - A.GND, /* GND |7 8| Y4 */ D.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.Q, F.A, // Y1 |2 13| A6 + B.A, F.Q, // A2 |3 12| Y6 + B.Q, E.A, // Y2 |4 74LS14 11| A5 + C.A, E.Q, // A3 |5 10| Y5 + C.Q, D.A, // Y3 |6 9| A4 + A.GND, D.Q // GND |7 8| Y4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7416_DIP //- Title: DM5416/DM7416 Hex Inverting Buffers with High Voltage Open-Collector Outputs @@ -402,6 +413,7 @@ NETLIST_END() //- +---++---+ //- static NETLIST_START(TTL_7416_DIP) +{ TTL_7416_GATE(A) TTL_7416_GATE(B) TTL_7416_GATE(C) @@ -412,17 +424,17 @@ static NETLIST_START(TTL_7416_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.Q, /* Y1 |2 13| A6 */ F.A, - B.A, /* A2 |3 12| Y6 */ F.Q, - B.Q, /* Y2 |4 7416 11| A5 */ E.A, - C.A, /* A3 |5 10| Y5 */ E.Q, - C.Q, /* Y3 |6 9| A4 */ D.A, - A.GND, /* GND |7 8| Y4 */ D.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.Q, F.A, // Y1 |2 13| A6 + B.A, F.Q, // A2 |3 12| Y6 + B.Q, E.A, // Y2 |4 7416 11| A5 + C.A, E.Q, // A3 |5 10| Y5 + C.Q, D.A, // Y3 |6 9| A4 + A.GND, D.Q // GND |7 8| Y4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7417_DIP //- Title: DM5417/DM7417 Hex Buffers withHigh Voltage Open-Collector Output @@ -440,6 +452,7 @@ NETLIST_END() //- +---++---+ //- static NETLIST_START(TTL_7417_DIP) +{ TTL_7417_GATE(A) TTL_7417_GATE(B) TTL_7417_GATE(C) @@ -450,17 +463,17 @@ static NETLIST_START(TTL_7417_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.Q, /* Y1 |2 13| A6 */ F.A, - B.A, /* A2 |3 12| Y6 */ F.Q, - B.Q, /* Y2 |4 7417 11| A5 */ E.A, - C.A, /* A3 |5 10| Y5 */ E.Q, - C.Q, /* Y3 |6 9| A4 */ D.A, - A.GND, /* GND |7 8| Y4 */ D.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.Q, F.A, // Y1 |2 13| A6 + B.A, F.Q, // A2 |3 12| Y6 + B.Q, E.A, // Y2 |4 7417 11| A5 + C.A, E.Q, // A3 |5 10| Y5 + C.Q, D.A, // Y3 |6 9| A4 + A.GND, D.Q // GND |7 8| Y4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7420_DIP //- Title: 5420/DM5420/DM7420 Dual 4-Input NAND Gates @@ -481,6 +494,7 @@ NETLIST_END() //- +---+---+---+---++---+ //- static NETLIST_START(TTL_7420_DIP) +{ TTL_7420_NAND(A) TTL_7420_NAND(B) @@ -488,17 +502,17 @@ static NETLIST_START(TTL_7420_DIP) NET_C(A.GND, B.GND) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| D2 */ B.D, - NC.I, /* NC |3 12| C2 */ B.C, - A.C, /* C1 |4 7420 11| NC */ NC.I, - A.D, /* D1 |5 10| B2 */ B.B, - A.Q, /* Y1 |6 9| A2 */ B.A, - A.GND, /* GND |7 8| Y2 */ B.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, B.D, // B1 |2 13| D2 + NC.I, B.C, // NC |3 12| C2 + A.C, NC.I, // C1 |4 7420 11| NC + A.D, B.B, // D1 |5 10| B2 + A.Q, B.A, // Y1 |6 9| A2 + A.GND, B.Q // GND |7 8| Y2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7421_DIP //- Title: 54LS21/DM54LS21/DM74LS21 Dual 4-Input AND Gates @@ -519,6 +533,7 @@ NETLIST_END() //- +---+---+---+---++---+ //- static NETLIST_START(TTL_7421_DIP) +{ TTL_7421_AND(A) TTL_7421_AND(B) @@ -526,17 +541,17 @@ static NETLIST_START(TTL_7421_DIP) NET_C(A.GND, B.GND) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| D2 */ B.D, - NC.I, /* NC |3 12| C2 */ B.C, - A.C, /* C1 |4 7421 11| NC */ NC.I, - A.D, /* D1 |5 10| B2 */ B.B, - A.Q, /* Y1 |6 9| A2 */ B.A, - A.GND, /* GND |7 8| Y2 */ B.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, B.D, // B1 |2 13| D2 + NC.I, B.C, // NC |3 12| C2 + A.C, NC.I, // C1 |4 7421 11| NC + A.D, B.B, // D1 |5 10| B2 + A.Q, B.A, // Y1 |6 9| A2 + A.GND, B.Q // GND |7 8| Y2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7425_DIP //- Title: 5425/DM7425 Dual 4-Input NOR Gate (with Strobe) @@ -559,6 +574,7 @@ NETLIST_END() //- +---+---+---+---+---++---+ //- static NETLIST_START(TTL_7425_DIP) +{ TTL_7425_NOR(A) TTL_7425_NOR(B) @@ -567,17 +583,17 @@ static NETLIST_START(TTL_7425_DIP) NC_PIN(XA) // FIXME: Functionality needs to be implemented NC_PIN(XB) // FIXME: Functionality needs to be implemented - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| D2 */ B.D, - XA.I, /* X1 |3 12| C2 */ B.C, - A.C, /* C1 |4 7425 11| X2 */ XB.I, - A.D, /* D1 |5 10| B2 */ B.B, - A.Q, /* Y1 |6 9| A2 */ B.A, - A.GND, /* GND |7 8| Y2 */ B.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, B.D, // B1 |2 13| D2 + XA.I, B.C, // X1 |3 12| C2 + A.C, XB.I, // C1 |4 7425 11| X2 + A.D, B.B, // D1 |5 10| B2 + A.Q, B.A, // Y1 |6 9| A2 + A.GND, B.Q // GND |7 8| Y2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7427_DIP //- Title: DM7427 Triple 3-Input NOR Gates @@ -597,6 +613,7 @@ NETLIST_END() //- +---+---+---++---+ //- static NETLIST_START(TTL_7427_DIP) +{ TTL_7427_NOR(A) TTL_7427_NOR(B) TTL_7427_NOR(C) @@ -604,17 +621,17 @@ static NETLIST_START(TTL_7427_DIP) NET_C(A.VCC, B.VCC, C.VCC) NET_C(A.GND, B.GND, C.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| C1 */ A.C, - B.A, /* A2 |3 12| Y1 */ A.Q, - B.B, /* B2 |4 7427 11| C3 */ C.C, - B.C, /* C2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, A.C, // B1 |2 13| C1 + B.A, A.Q, // A2 |3 12| Y1 + B.B, C.C, // B2 |4 7427 11| C3 + B.C, C.B, // C2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7430_DIP //- Title: 5430/DM5430/DM7430 8-Input NAND Gate @@ -638,20 +655,21 @@ NETLIST_END() //- +---+---+---+---+---+---+---+---++---+ //- static NETLIST_START(TTL_7430_DIP) +{ TTL_7430_NAND(A) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.A, /* A |1 ++ 14| VCC */ A.VCC, - A.B, /* B |2 13| NC */ NC.I, - A.C, /* C |3 12| H */ A.H, - A.D, /* D |4 7430 11| G */ A.G, - A.E, /* E |5 10| NC */ NC.I, - A.F, /* F |6 9| NC */ NC.I, - A.GND, /* GND |7 8| Y */ A.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A |1 ++ 14| VCC + A.B, NC.I, // B |2 13| NC + A.C, A.H, // C |3 12| H + A.D, A.G, // D |4 7430 11| G + A.E, NC.I, // E |5 10| NC + A.F, NC.I, // F |6 9| NC + A.GND, A.Q // GND |7 8| Y + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7432_DIP //- Title: 5432/DM5432/DM7432 Quad 2-Input OR Gates @@ -671,6 +689,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7432_DIP) +{ TTL_7432_OR(A) TTL_7432_OR(B) TTL_7432_OR(C) @@ -679,17 +698,17 @@ static NETLIST_START(TTL_7432_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| B4 */ D.B, - A.Q, /* Y1 |3 12| A4 */ D.A, - B.A, /* A2 |4 7432 11| Y4 */ D.Q, - B.B, /* B2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, D.B, // B1 |2 13| B4 + A.Q, D.A, // Y1 |3 12| A4 + B.A, D.Q, // A2 |4 7432 11| Y4 + B.B, C.B, // B2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7437_DIP //- Title: 5437/DM5437/DM7437 Quad 2-Input NAND Buffers @@ -710,6 +729,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7437_DIP) +{ TTL_7437_NAND(A) TTL_7437_NAND(B) TTL_7437_NAND(C) @@ -718,17 +738,17 @@ static NETLIST_START(TTL_7437_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| B4 */ D.B, - A.Q, /* Y1 |3 12| A4 */ D.A, - B.A, /* A2 |4 7437 11| Y4 */ D.Q, - B.B, /* B2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, D.B, // B1 |2 13| B4 + A.Q, D.A, // Y1 |3 12| A4 + B.A, D.Q, // A2 |4 7437 11| Y4 + B.B, C.B, // B2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7438_DIP //- Title: DM74LS38 Quad 2-Input NAND Buffer with Open-Collector Outputs @@ -748,6 +768,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7438_DIP) +{ TTL_7438_NAND(A) TTL_7438_NAND(B) TTL_7438_NAND(C) @@ -756,17 +777,17 @@ static NETLIST_START(TTL_7438_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| B4 */ D.B, - A.Q, /* Y1 |3 12| A4 */ D.A, - B.A, /* A2 |4 7438 11| Y4 */ D.Q, - B.B, /* B2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, D.B, // B1 |2 13| B4 + A.Q, D.A, // Y1 |3 12| A4 + B.A, D.Q, // A2 |4 7438 11| Y4 + B.B, C.B, // B2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7442_DIP //- Title: 5442A/DM5442A/DM7442A BCD to Decimal Decoders @@ -798,20 +819,21 @@ NETLIST_END() //- +---+---+---+---++---+---+---+---+---+---+---+---+---+---+ //- static NETLIST_START(TTL_7442_DIP) +{ NET_REGISTER_DEV(TTL_7442, A) - DIPPINS( /* +--------------+ */ - A.Q0, /* 0 |1 ++ 16| VCC */ A.VCC, - A.Q1, /* 1 |2 15| A */ A.A, - A.Q2, /* 2 |3 14| B */ A.B, - A.Q3, /* 3 |4 13| C */ A.C, - A.Q4, /* 4 |5 7442 12| D */ A.D, - A.Q5, /* 5 |6 11| 9 */ A.Q9, - A.Q6, /* 6 |7 10| 8 */ A.Q8, - A.GND, /* GND |8 9| 7 */ A.Q7 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.Q0, A.VCC, // 0 |1 ++ 16| VCC + A.Q1, A.A, // 1 |2 15| A + A.Q2, A.B, // 2 |3 14| B + A.Q3, A.C, // 3 |4 13| C + A.Q4, A.D, // 4 |5 7442 12| D + A.Q5, A.Q9, // 5 |6 11| 9 + A.Q6, A.Q8, // 6 |7 10| 8 + A.GND, A.Q7 // GND |8 9| 7 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7448_DIP //- Title: DM5448/DM48LS48/DM7448/DM74LS48 BCD to 7-Segment Decoder @@ -846,21 +868,22 @@ NETLIST_END() //- +-----+------+----+----+----+----++-----+---+---+---+---+---+---+---+ //- static NETLIST_START(TTL_7448_DIP) +{ TTL_7448(A) - DIPPINS( /* +--------------+ */ - A.B, /* B |1 ++ 16| VCC */ A.VCC, - A.C, /* C |2 15| f */ A.f, - A.LTQ, /* LTQ |3 14| g */ A.g, - A.BIQ, /* BIQ |4 7448 13| a */ A.a, - A.RBIQ, /* RBIQ |5 12| b */ A.b, - A.D, /* D |6 11| c */ A.c, - A.A, /* A |7 10| d */ A.d, - A.GND, /* GND |8 9| e */ A.e - /* +--------------+ */ + DIPPINS( // +--------------+ + A.B, A.VCC, // B |1 ++ 16| VCC + A.C, A.f, // C |2 15| f + A.LTQ, A.g, // LTQ |3 14| g + A.BIQ, A.a, // BIQ |4 7448 13| a + A.RBIQ, A.b, // RBIQ |5 12| b + A.D, A.c, // D |6 11| c + A.A, A.d, // A |7 10| d + A.GND, A.e // GND |8 9| e + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7450_DIP //- Title: DM7450 Expandable Dual 2-Wide 2-Input AND-OR-INVERT Gate @@ -881,6 +904,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7450_DIP) +{ TTL_7450_ANDORINVERT(A) TTL_7450_ANDORINVERT(B) @@ -888,17 +912,17 @@ static NETLIST_START(TTL_7450_DIP) NET_C(A.GND, B.GND) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.A, /* 1A |1 ++ 14| VCC */ A.VCC, - B.A, /* 2A |2 13| 1B */ A.B, - B.B, /* 2B |3 12| 1XQ */ NC.I, - B.C, /* 2C |4 7450 11| 1X */ NC.I, - B.D, /* 2D |5 10| 1D */ A.D, - B.Q, /* 2Y |6 9| 1C */ A.C, - A.GND, /* GND |7 8| 1Y */ A.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // 1A |1 ++ 14| VCC + B.A, A.B, // 2A |2 13| 1B + B.B, NC.I, // 2B |3 12| 1XQ + B.C, NC.I, // 2C |4 7450 11| 1X + B.D, A.D, // 2D |5 10| 1D + B.Q, A.C, // 2Y |6 9| 1C + A.GND, A.Q // GND |7 8| 1Y + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7473_DIP //- Title: 5473/DM5473/DM7473 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs @@ -919,23 +943,24 @@ NETLIST_END() //- +-----+-------+---+---++---+----+ //- static NETLIST_START(TTL_7473_DIP) +{ TTL_7473(A) TTL_7473(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.CLK, /* CLK1 |1 ++ 14| J1 */ A.J, - A.CLRQ, /* CLR1 |2 13| QQ1 */ A.QQ, - A.K, /* K1 |3 12| Q1 */ A.Q, - A.VCC, /* VCC |4 7473 11| GND */ A.GND, - B.CLK, /* CLK2 |5 10| K2 */ B.K, - B.CLRQ, /* CLR2 |6 9| Q2 */ B.Q, - B.J, /* J2 |7 8| QQ2 */ B.QQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLK, A.J, // CLK1 |1 ++ 14| J1 + A.CLRQ, A.QQ, // CLR1 |2 13| QQ1 + A.K, A.Q, // K1 |3 12| Q1 + A.VCC, A.GND, // VCC |4 7473 11| GND + B.CLK, B.K, // CLK2 |5 10| K2 + B.CLRQ, B.Q, // CLR2 |6 9| Q2 + B.J, B.QQ // J2 |7 8| QQ2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7473A_DIP //- Title: DM54LS73A/DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs @@ -957,23 +982,24 @@ NETLIST_END() //- +-----+-----+---+---++---+----+ //- static NETLIST_START(TTL_7473A_DIP) +{ TTL_7473A(A) TTL_7473A(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.CLK, /* CLK1 |1 ++ 14| J1 */ A.J, - A.CLRQ, /* CLR1 |2 13| QQ1 */ A.QQ, - A.K, /* K1 |3 12| Q1 */ A.Q, - A.VCC, /* VCC |4 7473A 11| GND */ A.GND, - B.CLK, /* CLK2 |5 10| K2 */ B.K, - B.CLRQ, /* CLR2 |6 9| Q2 */ B.Q, - B.J, /* J2 |7 8| QQ2 */ B.QQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLK, A.J, // CLK1 |1 ++ 14| J1 + A.CLRQ, A.QQ, // CLR1 |2 13| QQ1 + A.K, A.Q, // K1 |3 12| Q1 + A.VCC, A.GND, // VCC |4 7473A 11| GND + B.CLK, B.K, // CLK2 |5 10| K2 + B.CLRQ, B.Q, // CLR2 |6 9| Q2 + B.J, B.QQ // J2 |7 8| QQ2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7474_DIP //- Title: 5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs @@ -995,23 +1021,24 @@ NETLIST_END() //- +----+-----+-----+---++---+----+ //- static NETLIST_START(TTL_7474_DIP) +{ TTL_7474(A) TTL_7474(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* CLR1 |1 ++ 14| VCC */ A.VCC, - A.D, /* D1 |2 13| CLR2 */ B.CLRQ, - A.CLK, /* CLK1 |3 12| D2 */ B.D, - A.PREQ, /* PR1 |4 7474 11| CLK2 */ B.CLK, - A.Q, /* Q1 |5 10| PR2 */ B.PREQ, - A.QQ, /* QQ1 |6 9| Q2 */ B.Q, - A.GND, /* GND |7 8| QQ2 */ B.QQ - /* +-------------+ */ + DIPPINS( // +--------------+ + A.CLRQ, A.VCC, // CLR1 |1 ++ 14| VCC + A.D, B.CLRQ, // D1 |2 13| CLR2 + A.CLK, B.D, // CLK1 |3 12| D2 + A.PREQ, B.CLK, // PR1 |4 7474 11| CLK2 + A.Q, B.PREQ, // Q1 |5 10| PR2 + A.QQ, B.Q, // QQ1 |6 9| Q2 + A.GND, B.QQ // GND |7 8| QQ2 + // +-------------+ ) -NETLIST_END() +} //- Identifier: TTL_7475_DIP //- Title: DM5475/DM7475/DM7475A/DM74LS75 4-bit D Latch @@ -1030,6 +1057,7 @@ NETLIST_END() //- +---+---++---+----+ //- static NETLIST_START(TTL_7475_DIP) +{ TTL_7475_GATE(A) TTL_7475_GATE(B) TTL_7475_GATE(C) @@ -1041,18 +1069,18 @@ static NETLIST_START(TTL_7475_DIP) NET_C(A.CLK, B.CLK) NET_C(C.CLK, D.CLK) - DIPPINS( /* +--------------+ */ - A.QQ, /* QQ1 |1 ++ 16| Q1 */ A.Q, - A.D, /* D1 |2 15| Q2 */ B.Q, - B.D, /* D2 |3 14| QQ2 */ B.QQ, - C.CLK, /* E34 |4 7475 13| E12 */ A.CLK, - A.VCC, /* VCC |5 12| GND */ A.GND, - C.D, /* D3 |6 11| QQ3 */ C.QQ, - D.D, /* D4 |7 10| Q3 */ C.Q, - D.QQ, /* QQ4 |8 9| Q4 */ D.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.QQ, A.Q, // QQ1 |1 ++ 16| Q1 + A.D, B.Q, // D1 |2 15| Q2 + B.D, B.QQ, // D2 |3 14| QQ2 + C.CLK, A.CLK, // E34 |4 7475 13| E12 + A.VCC, A.GND, // VCC |5 12| GND + C.D, C.QQ, // D3 |6 11| QQ3 + D.D, C.Q, // D4 |7 10| Q3 + D.QQ, D.Q // QQ4 |8 9| Q4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7477_DIP //- Title: DM74LS77 4-bit D Latch @@ -1071,6 +1099,7 @@ NETLIST_END() //- +---+---++---+----+ //- static NETLIST_START(TTL_7477_DIP) +{ TTL_7477_GATE(A) TTL_7477_GATE(B) TTL_7477_GATE(C) @@ -1084,17 +1113,17 @@ static NETLIST_START(TTL_7477_DIP) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.D, /* D1 |1 ++ 14| Q1 */ A.Q, - B.D, /* D2 |2 13| Q2 */ B.Q, - C.CLK, /* E34 |3 12| E12 */ A.CLK, - A.VCC, /* VCC |4 7477 11| GND */ A.GND, - C.D, /* D3 |5 10| NC */ NC.I, - D.D, /* D4 |6 9| Q3 */ C.Q, - NC.I, /* NC |7 8| Q4 */ D.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.D, A.Q, // D1 |1 ++ 14| Q1 + B.D, B.Q, // D2 |2 13| Q2 + C.CLK, A.CLK, // E34 |3 12| E12 + A.VCC, A.GND, // VCC |4 7477 11| GND + C.D, NC.I, // D3 |5 10| NC + D.D, C.Q, // D4 |6 9| Q3 + NC.I, D.Q // NC |7 8| Q4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7483_DIP //- Title: DM5483/DM7483/DM74LS83A 4-bit Binary Adders With Fast Carry @@ -1105,20 +1134,21 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006378.PDF //- static NETLIST_START(TTL_7483_DIP) +{ TTL_7483(A) - DIPPINS( /* +--------------+ */ - A.A4, /* A4 |1 ++ 16| B4 */ A.B4, - A.S3, /* S3 |2 15| S4 */ A.S4, - A.A3, /* A3 |3 14| C4 */ A.C4, - A.B3, /* B3 |4 7483 13| C0 */ A.C0, - A.VCC, /* VCC |5 12| GND */ A.GND, - A.S2, /* S2 |6 11| B1 */ A.B1, - A.B2, /* B2 |7 10| A1 */ A.A1, - A.A2, /* A2 |8 9| S1 */ A.S1 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A4, A.B4, // A4 |1 ++ 16| B4 + A.S3, A.S4, // S3 |2 15| S4 + A.A3, A.C4, // A3 |3 14| C4 + A.B3, A.C0, // B3 |4 7483 13| C0 + A.VCC, A.GND, // VCC |5 12| GND + A.S2, A.B1, // S2 |6 11| B1 + A.B2, A.A1, // B2 |7 10| A1 + A.A2, A.S1 // A2 |8 9| S1 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7485_DIP //- Title: DM5485/DM7485/DM74L85/DM74LS85 4-Bit Magnitude Comparators @@ -1129,20 +1159,21 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006379.PDF //- static NETLIST_START(TTL_7485_DIP) +{ TTL_7485(A) - DIPPINS( /* +--------------+ */ - A.B3, /* B3 |1 ++ 16| VCC */ A.VCC, - A.LTIN, /* LTIN |2 15| A3 */ A.A3, - A.EQIN, /* EQIN |3 14| B2 */ A.B2, - A.GTIN, /* GTIN |4 7485 13| A2 */ A.A2, - A.GTOUT, /* GTOUT |5 12| A1 */ A.A1, - A.EQOUT, /* EQOUT |6 11| B1 */ A.B1, - A.LTOUT, /* LTOUT |7 10| A0 */ A.A0, - A.GND, /* GND |8 9| B0 */ A.B0 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.B3, A.VCC, // B3 |1 ++ 16| VCC + A.LTIN, A.A3, // LTIN |2 15| A3 + A.EQIN, A.B2, // EQIN |3 14| B2 + A.GTIN, A.A2, // GTIN |4 7485 13| A2 + A.GTOUT, A.A1, // GTOUT |5 12| A1 + A.EQOUT, A.B1, // EQOUT |6 11| B1 + A.LTOUT, A.A0, // LTOUT |7 10| A0 + A.GND, A.B0 // GND |8 9| B0 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7486_DIP //- Title: 5486/DM5486/DM7486 Quad 2-Input Exclusive-OR Gates @@ -1162,6 +1193,7 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7486_DIP) +{ TTL_7486_XOR(A) TTL_7486_XOR(B) TTL_7486_XOR(C) @@ -1170,17 +1202,17 @@ static NETLIST_START(TTL_7486_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 14| VCC */ A.VCC, - A.B, /* B1 |2 13| B4 */ D.B, - A.Q, /* Y1 |3 12| A4 */ D.A, - B.A, /* A2 |4 7486 11| Y4 */ D.Q, - B.B, /* B2 |5 10| B3 */ C.B, - B.Q, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 14| VCC + A.B, D.B, // B1 |2 13| B4 + A.Q, D.A, // Y1 |3 12| A4 + B.A, D.Q, // A2 |4 7486 11| Y4 + B.B, C.B, // B2 |5 10| B3 + B.Q, C.A, // Y2 |6 9| A3 + A.GND, C.Q // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7490_DIP //- Title: DM5490/DM7490A Decade Counter @@ -1220,20 +1252,21 @@ NETLIST_END() //- +-----+-----+-----+-----++----+----+----+----+ //- static NETLIST_START(TTL_7490_DIP) +{ TTL_7490(A) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.B, /* B |1 ++ 14| A */ A.A, - A.R1, /* R01 |2 13| NC */ NC.I, - A.R2, /* R02 |3 12| QA */ A.QA, - NC.I, /* NC |4 7490 11| QD */ A.QD, - A.VCC, /* VCC |5 10| GND */ A.GND, - A.R91, /* R91 |6 9| QB */ A.QB, - A.R92, /* R92 |7 8| QC */ A.QC - /* +--------------+ */ + DIPPINS( // +--------------+ + A.B, A.A, // B |1 ++ 14| A + A.R1, NC.I, // R01 |2 13| NC + A.R2, A.QA, // R02 |3 12| QA + NC.I, A.QD, // NC |4 7490 11| QD + A.VCC, A.GND, // VCC |5 10| GND + A.R91, A.QB, // R91 |6 9| QB + A.R92, A.QC // R92 |7 8| QC + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7492_DIP //- Title: SN5492A, SN54LS92, SN7492A, SN74LS92 Divide-By-Twelve Counter @@ -1270,21 +1303,22 @@ NETLIST_END() //- | X | 0 || COUNT | //- +-----+-----++----+----+----+----+ //- - static NETLIST_START(TTL_7492_DIP) +static NETLIST_START(TTL_7492_DIP) +{ TTL_7492(A) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.B, /* CLKB |1 ++ 14| CLKA */ A.A, - NC.I, /* NC |2 13| NC */ NC.I, - NC.I, /* NC |3 12| QA */ A.QA, - NC.I, /* NC |4 7492 11| QD */ A.QD, - A.VCC, /* VCC |5 10| GND */ A.GND, - A.R1, /* R01 |6 9| QB */ A.QB, - A.R2, /* R02 |7 8| QC */ A.QC - /* +--------------+ */ + DIPPINS( // +--------------+ + A.B, A.A, // CLKB |1 ++ 14| CLKA + NC.I, NC.I, // NC |2 13| NC + NC.I, A.QA, // NC |3 12| QA + NC.I, A.QD, // NC |4 7492 11| QD + A.VCC, A.GND, // VCC |5 10| GND + A.R1, A.QB, // R01 |6 9| QB + A.R2, A.QC // R02 |7 8| QC + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7493_DIP //- Title: 7493 Binary Counters @@ -1330,21 +1364,22 @@ NETLIST_END() //- //- - static NETLIST_START(TTL_7493_DIP) +static NETLIST_START(TTL_7493_DIP) +{ TTL_7493(A) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.CLKB, /* CLKB |1 ++ 14| CLKA */ A.CLKA, - A.R1, /* R01 |2 13| NC */ NC.I, - A.R2, /* R02 |3 12| QA */ A.QA, - NC.I, /* NC |4 7493 11| QD */ A.QD, - A.VCC, /* VCC |5 10| GND */ A.GND, - NC.I, /* NC |6 9| QB */ A.QB, - NC.I, /* NC |7 8| QC */ A.QC - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLKB, A.CLKA, // CLKB |1 ++ 14| CLKA + A.R1, NC.I, // R01 |2 13| NC + A.R2, A.QA, // R02 |3 12| QA + NC.I, A.QD, // NC |4 7493 11| QD + A.VCC, A.GND, // VCC |5 10| GND + NC.I, A.QB, // NC |6 9| QB + NC.I, A.QC // NC |7 8| QC + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_7497_DIP //- Title: 5497/DM7497 Synchronous Modulo-64 Bit Rate Multiplier @@ -1355,20 +1390,21 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS009780.PDF //- static NETLIST_START(TTL_7497_DIP) +{ TTL_7497(A) - DIPPINS( /* +--------------+ */ - A.B1, /* S1 |1 ++ 16| VCC */ A.VCC, - A.B4, /* S4 |2 15| S3 */ A.B3, - A.B5, /* S5 |3 14| S2 */ A.B2, - A.B0, /* S0 |4 7497 13| MR */ A.CLR, - A.ZQ, /* ZQ |5 12| EY */ A.UNITYQ, - A.Y, /* Y |6 11| CEQ */ A.ENQ, - A.ENOUTQ, /* TCQ |7 10| EZQ */ A.STRBQ, - A.GND, /* GND |8 9| CP */ A.CLK - /* +--------------+ */ + DIPPINS( // +--------------+ + A.B1, A.VCC, // S1 |1 ++ 16| VCC + A.B4, A.B3, // S4 |2 15| S3 + A.B5, A.B2, // S5 |3 14| S2 + A.B0, A.CLR, // S0 |4 7497 13| MR + A.ZQ, A.UNITYQ, // ZQ |5 12| EY + A.Y, A.ENQ, // Y |6 11| CEQ + A.ENOUTQ, A.STRBQ, // TCQ |7 10| EZQ + A.GND, A.CLK // GND |8 9| CP + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74107_DIP //- Title: SN54107, SN74107 Dual J-K Flip-Flops With Clear @@ -1389,23 +1425,24 @@ NETLIST_END() //- +------+-------+---+---++---+----+ //- static NETLIST_START(TTL_74107_DIP) +{ TTL_74107(A) TTL_74107(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.J, /* 1J |1 ++ 14| VCC */ A.VCC, - A.QQ, /* 1QQ |2 13| 1CLRQ */ A.CLRQ, - A.Q, /* 1Q |3 12| 1CLK */ A.CLK, - A.K, /* 1K |4 74107 11| 2K */ B.K, - B.Q, /* 2Q |5 10| 2CLRQ */ B.CLRQ, - B.QQ, /* 2QQ |6 9| 2CLK */ B.CLK, - B.GND, /* GND |7 8| 2J */ B.J - /* +--------------+ */ + DIPPINS( // +--------------+ + A.J, A.VCC, // 1J |1 ++ 14| VCC + A.QQ, A.CLRQ, // 1QQ |2 13| 1CLRQ + A.Q, A.CLK, // 1Q |3 12| 1CLK + A.K, B.K, // 1K |4 74107 11| 2K + B.Q, B.CLRQ, // 2Q |5 10| 2CLRQ + B.QQ, B.CLK, // 2QQ |6 9| 2CLK + B.GND, B.J // GND |7 8| 2J + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74107A_DIP //- Title: DM54LS107A/DM74LS107A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops withClear and Complementary Outputs @@ -1427,23 +1464,24 @@ NETLIST_END() //- +------+-----+---+---++---+----+ //- static NETLIST_START(TTL_74107A_DIP) +{ TTL_74107A(A) TTL_74107A(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.J, /* J1 |1 ++ 14| VCC */ A.VCC, - A.QQ, /* QQ1 |2 13| CLRQ1 */ A.CLRQ, - A.Q, /* Q1 |3 12| CLK1 */ A.CLK, - A.K, /* K1 |4 74107A 11| K2 */ B.K, - B.Q, /* Q2 |5 10| CLRQ2 */ B.CLRQ, - B.QQ, /* QQ2 |6 9| CLK2 */ B.CLK, - B.GND, /* GND |7 8| J2 */ B.J - /* +--------------+ */ + DIPPINS( // +--------------+ + A.J, A.VCC, // J1 |1 ++ 14| VCC + A.QQ, A.CLRQ, // QQ1 |2 13| CLRQ1 + A.Q, A.CLK, // Q1 |3 12| CLK1 + A.K, B.K, // K1 |4 74107A 11| K2 + B.Q, B.CLRQ, // Q2 |5 10| CLRQ2 + B.QQ, B.CLK, // QQ2 |6 9| CLK2 + B.GND, B.J // GND |7 8| J2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74113_DIP //- Title: DM54S113/DM74S113 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Complementary Outputs @@ -1465,23 +1503,24 @@ NETLIST_END() //- +-----+-----+---+---++---+----+ //- static NETLIST_START(TTL_74113_DIP) +{ TTL_74113(A) TTL_74113(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.CLK, /* CLK1 |1 ++ 14| VCC */ A.VCC, - A.K, /* K1 |2 13| CLK2 */ B.CLK, - A.J, /* J1 |3 12| K2 */ B.K, - A.SETQ, /* PRQ1 |4 74113 11| J2 */ B.J, - A.Q, /* Q1 |5 10| PRQ2 */ B.SETQ, - A.QQ, /* QQ1 |6 9| Q2 */ B.Q, - A.GND, /* GND |7 8| QQ2 */ B.QQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLK, A.VCC, // CLK1 |1 ++ 14| VCC + A.K, B.CLK, // K1 |2 13| CLK2 + A.J, B.K, // J1 |3 12| K2 + A.SETQ, B.J, // PRQ1 |4 74113 11| J2 + A.Q, B.SETQ, // Q1 |5 10| PRQ2 + A.QQ, B.Q, // QQ1 |6 9| Q2 + A.GND, B.QQ // GND |7 8| QQ2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74113A_DIP //- Title: DM54S113/DM74S113 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Complementary Outputs @@ -1503,23 +1542,24 @@ NETLIST_END() //- +------+-----+---+---++---+----+ //- static NETLIST_START(TTL_74113A_DIP) +{ TTL_74113A(A) TTL_74113A(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.CLK, /* CLK1 |1 ++ 14| VCC */ A.VCC, - A.K, /* K1 |2 13| CLK2 */ B.CLK, - A.J, /* J1 |3 12| K2 */ B.K, - A.SETQ, /* PRQ1 |4 74113A 11| J2 */ B.J, - A.Q, /* Q1 |5 10| PRQ2 */ B.SETQ, - A.QQ, /* QQ1 |6 9| Q2 */ B.Q, - A.GND, /* GND |7 8| QQ2 */ B.QQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLK, A.VCC, // CLK1 |1 ++ 14| VCC + A.K, B.CLK, // K1 |2 13| CLK2 + A.J, B.K, // J1 |3 12| K2 + A.SETQ, B.J, // PRQ1 |4 74113A 11| J2 + A.Q, B.SETQ, // Q1 |5 10| PRQ2 + A.QQ, B.Q, // QQ1 |6 9| Q2 + A.GND, B.QQ // GND |7 8| QQ2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74121_DIP //- Title: DM74121 One-Shot with Clear and Complementary Outputs @@ -1535,6 +1575,7 @@ NETLIST_END() //- https://pdf1.alldatasheet.com/datasheet-pdf/view/50894/FAIRCHILD/74121.html //- static NETLIST_START(TTL_74121_DIP) +{ TTL_74121(A) NC_PIN(NC) RES(RINT, RES_K(2)) @@ -1545,17 +1586,17 @@ static NETLIST_START(TTL_74121_DIP) NET_C(RINT.1, RD.2) NET_C(RD.1, A.GND) - DIPPINS( /* +--------------+ */ - A.QQ, /* QQ |1 ++ 14| VCC */ A.VCC, - NC.I, /* NC |2 13| NC */ NC.I, - A.A1, /* A1 |3 12| NC */ NC.I, - A.A2, /* A2 |4 74121 11| REXT/CEXT */ A.RC, - A.B, /* B |5 10| CEXT */ A.C, - A.Q, /* Q |6 9| RINT */ RINT.1, - A.GND, /* GND |7 8| NC */ NC.I - /* +--------------+ */ + DIPPINS( // +--------------+ + A.QQ, A.VCC, // QQ |1 ++ 14| VCC + NC.I, NC.I, // NC |2 13| NC + A.A1, NC.I, // A1 |3 12| NC + A.A2, A.RC, // A2 |4 74121 11| REXT/CEXT + A.B, A.C, // B |5 10| CEXT + A.Q, RINT.1, // Q |6 9| RINT + A.GND, NC.I // GND |7 8| NC + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74123_DIP //- Title: DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs @@ -1571,24 +1612,25 @@ NETLIST_END() //- https://pdf1.alldatasheet.com/datasheet-pdf/view/50893/FAIRCHILD/DM74123.html //- static NETLIST_START(TTL_74123_DIP) +{ TTL_74123(A) TTL_74123(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 16| VCC */ A.VCC, - A.B, /* B1 |2 15| RC1 */ A.RC, - A.CLRQ, /* CLRQ1 |3 14| C1 */ A.C, - A.QQ, /* QQ1 |4 74123 13| Q1 */ A.Q, - B.Q, /* Q2 |5 12| QQ2 */ B.QQ, - B.C, /* C2 |6 11| CLRQ */ B.CLRQ, - B.RC, /* RC2 |7 10| B2 */ B.B, - A.GND, /* GND |8 9| A2 */ B.A - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A1 |1 ++ 16| VCC + A.B, A.RC, // B1 |2 15| RC1 + A.CLRQ, A.C, // CLRQ1 |3 14| C1 + A.QQ, A.Q, // QQ1 |4 74123 13| Q1 + B.Q, B.QQ, // Q2 |5 12| QQ2 + B.C, B.CLRQ, // C2 |6 11| CLRQ + B.RC, B.B, // RC2 |7 10| B2 + A.GND, B.A // GND |8 9| A2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74125_DIP //- Title: SN74125 QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS @@ -1613,6 +1655,7 @@ NETLIST_END() //- | H | X | Z | //- static NETLIST_START(TTL_74125_DIP) +{ TTL_74125_GATE(A) TTL_74125_GATE(B) TTL_74125_GATE(C) @@ -1627,17 +1670,17 @@ static NETLIST_START(TTL_74125_DIP) PARAM(C.FORCE_TRISTATE_LOGIC, "$(@.FORCE_TRISTATE_LOGIC)") PARAM(D.FORCE_TRISTATE_LOGIC, "$(@.FORCE_TRISTATE_LOGIC)") - DIPPINS( /* +--------------+ */ - A.GQ, /* 1GQ |1 ++ 14| VCC */ A.VCC, - A.A, /* 1A |2 13| 4GQ */ D.GQ, - A.Y, /* 1Y |3 12| 4A */ D.A, - B.GQ, /* 2GQ |4 74125 11| 4Y */ D.Y, - B.A, /* 2A |5 10| 3GQ */ C.GQ, - B.Y, /* 2Y |6 9| 3A */ C.A, - A.GND, /* GND |7 8| 3Y */ C.Y - /* +--------------+ */ + DIPPINS( // +--------------+ + A.GQ, A.VCC, // 1GQ |1 ++ 14| VCC + A.A, D.GQ, // 1A |2 13| 4GQ + A.Y, D.A, // 1Y |3 12| 4A + B.GQ, D.Y, // 2GQ |4 74125 11| 4Y + B.A, C.GQ, // 2A |5 10| 3GQ + B.Y, C.A, // 2Y |6 9| 3A + A.GND, C.Y // GND |7 8| 3Y + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74126_DIP //- Title: DM74LS126A Quad 3-STATE Buffer @@ -1656,6 +1699,7 @@ NETLIST_END() //- +---+---++------+ //- static NETLIST_START(TTL_74126_DIP) +{ TTL_74126_GATE(A) TTL_74126_GATE(B) TTL_74126_GATE(C) @@ -1670,17 +1714,19 @@ static NETLIST_START(TTL_74126_DIP) PARAM(C.FORCE_TRISTATE_LOGIC, "$(@.FORCE_TRISTATE_LOGIC)") PARAM(D.FORCE_TRISTATE_LOGIC, "$(@.FORCE_TRISTATE_LOGIC)") - DIPPINS( /* +--------------+ */ - A.G, /* C1 |1 ++ 14| VCC */ A.VCC, - A.A, /* A1 |2 13| C4 */ D.G, - A.Y, /* Y1 |3 12| A4 */ D.A, - B.G, /* C2 |4 74126 11| Y4 */ D.Y, - B.A, /* A2 |5 10| C3 */ C.G, - B.Y, /* Y2 |6 9| A3 */ C.A, - A.GND, /* GND |7 8| Y3 */ C.Y - /* +--------------+ */ + DIPPINS( // +--------------+ + A.G, A.VCC, // C1 |1 ++ 14| VCC + A.A, D.G, // A1 |2 13| C4 + A.Y, D.A, // Y1 |3 12| A4 + B.G, D.Y, // C2 |4 74126 11| Y4 + B.A, C.G, // A2 |5 10| C3 + B.Y, C.A, // Y2 |6 9| A3 + A.GND, C.Y // GND |7 8| Y3 + // +--------------+ ) -NETLIST_END() +} + +// FIXME: Pinalias completely wrong. //- Identifier: TTL_74139_DIP //- Title: 54LS139/DM54LS139/DM74LS139 Decoders/Demultiplexers @@ -1701,24 +1747,25 @@ NETLIST_END() //- +---+-------+-------------+ //- static NETLIST_START(TTL_74139_DIP) +{ NET_REGISTER_DEV(TTL_74139_GATE, A) NET_REGISTER_DEV(TTL_74139_GATE, B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.E, /* /Ea |1 ++ 16| VCC */ A.VCC, - A.A, /* A0a |2 15| /Eb */ B.E, - A.B, /* A1a |3 14| A0b */ B.A, - A.0, /* /O0a |4 74139 13| A1b */ B.B, - A.1, /* /O1a |5 12| /O0b */ B.0, - A.2, /* /O2a |6 11| /O1b */ B.1, - A.3, /* /O3a |7 10| /O2b */ B.2, - A.GND,/* GND |8 9| /O3b */ B.3 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.E, A.VCC, // /Ea |1 ++ 16| VCC + A.A, B.E, // A0a |2 15| /Eb + A.B, B.A, // A1a |3 14| A0b + A.O0, B.B, // /O0a |4 74139 13| A1b + A.O1, B.O0, // /O1a |5 12| /O0b + A.O2, B.O1, // /O2a |6 11| /O1b + A.O3, B.O2, // /O3a |7 10| /O2b + A.GND, B.O3 // GND |8 9| /O3b + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74153_DIP //- Title: 54153/DM54153/DM74153 Dual 4-Line to 1-LineData Selectors/Multiplexers @@ -1743,6 +1790,7 @@ NETLIST_END() //- +---+---+----+----+----+----+---++---+ //- static NETLIST_START(TTL_74153_DIP) +{ NET_REGISTER_DEV(TTL_74153, A) NET_REGISTER_DEV(TTL_74153, B) @@ -1752,18 +1800,18 @@ static NETLIST_START(TTL_74153_DIP) NET_C(A.A, B.A) NET_C(A.B, B.B) - DIPPINS( /* +--------------+ */ - A.G, /* G1 |1 ++ 16| VCC */ A.VCC, - A.B, /* B |2 15| G2 */ B.G, - A.C3, /* 1C3 |3 14| A */ A.A, - A.C2, /* 1C2 |4 74153 13| 2C3 */ B.C3, - A.C1, /* 1C1 |5 12| 2C2 */ B.C2, - A.C0, /* 1C0 |6 11| 2C1 */ B.C1, - A.AY, /* Y1 |7 10| 2C0 */ B.C0, - A.GND, /* GND |8 9| Y2 */ B.AY - /* +--------------+ */ + DIPPINS( // +--------------+ + A.G, A.VCC, // G1 |1 ++ 16| VCC + A.B, B.G, // B |2 15| G2 + A.C3, A.A, // 1C3 |3 14| A + A.C2, B.C3, // 1C2 |4 74153 13| 2C3 + A.C1, B.C2, // 1C1 |5 12| 2C2 + A.C0, B.C1, // 1C0 |6 11| 2C1 + A.AY, B.C0, // Y1 |7 10| 2C0 + A.GND, B.AY // GND |8 9| Y2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74155_DIP //- Title: 54LS155/DM54LS155/DM74LS155 Dual 2-Line to 4-Line Decoders/Demultiplexers @@ -1801,6 +1849,7 @@ NETLIST_END() //- +---+---+---+---++-----+-----+-----+-----+-----+-----+-----+-----+ //- static NETLIST_START(TTL_74155_DIP) +{ NET_REGISTER_DEV(TTL_74155A_GATE, A) NET_REGISTER_DEV(TTL_74155B_GATE, B) @@ -1810,18 +1859,18 @@ static NETLIST_START(TTL_74155_DIP) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.C, /* C1 |1 ++ 16| VCC */ A.VCC, - A.G, /* G1 |2 15| B4 */ B.C, - A.B, /* B |3 14| B4 */ B.G, - A.3, /* 1Y3 |4 74155 13| A4 */ B.A, - B.2, /* 1Y2 |5 12| Y4 */ B.3, - B.1, /* 1Y1 |6 11| B3 */ B.2, - B.0, /* 1Y0 |7 10| A3 */ B.1, - A.GND, /* GND |8 9| Y3 */ B.0 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.C, A.VCC, // C1 |1 ++ 16| VCC + A.G, B.C, // G1 |2 15| C2 + A.B, B.G, // B |3 14| G2 + A.Y3, B.A, // 1Y3 |4 74155 13| A + B.Y2, B.Y3, // 1Y2 |5 12| 2Y3 + B.Y1, B.Y2, // 1Y1 |6 11| 2Y2 + B.Y0, B.Y1, // 1Y0 |7 10| 2Y1 + A.GND, B.Y0 // GND |8 9| 2Y0 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74156_DIP //- Title: 54LS156/DM54LS156/DM74LS156 Dual 2-Line to 4-Line Decoders/Demultiplexers with Open-Collector Outputs @@ -1859,6 +1908,7 @@ NETLIST_END() //- +---+---+---+---++-----+-----+-----+-----+-----+-----+-----+-----+ //- static NETLIST_START(TTL_74156_DIP) +{ NET_REGISTER_DEV(TTL_74156A_GATE, A) NET_REGISTER_DEV(TTL_74156B_GATE, B) @@ -1868,18 +1918,18 @@ static NETLIST_START(TTL_74156_DIP) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.C, /* C1 |1 ++ 16| VCC */ A.VCC, - A.G, /* G1 |2 15| B4 */ B.C, - A.B, /* B |3 14| B4 */ B.G, - A.3, /* 1Y3 |4 74156 13| A4 */ B.A, - B.2, /* 1Y2 |5 12| Y4 */ B.3, - B.1, /* 1Y1 |6 11| B3 */ B.2, - B.0, /* 1Y0 |7 10| A3 */ B.1, - A.GND, /* GND |8 9| Y3 */ B.0 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.C, A.VCC, // C1 |1 ++ 16| VCC + A.G, B.C, // G1 |2 15| C2 + A.B, B.G, // B |3 14| G2 + A.Y3, B.A, // 1Y3 |4 74156 13| A + B.Y2, B.Y3, // 1Y2 |5 12| 2Y3 + B.Y1, B.Y2, // 1Y1 |6 11| 2Y2 + B.Y0, B.Y1, // 1Y0 |7 10| 2Y1 + A.GND, B.Y0 // GND |8 9| 2Y0 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74157_DIP //- Title: 54157/DM54157/DM74157 Quad 2-Line to 1-Line Data Selectors/Multiplexers @@ -1900,6 +1950,7 @@ NETLIST_END() //- +---+---+---+---++---+ //- static NETLIST_START(TTL_74157_DIP) +{ NET_REGISTER_DEV(TTL_74157_GATE, A) NET_REGISTER_DEV(TTL_74157_GATE, B) NET_REGISTER_DEV(TTL_74157_GATE, C) @@ -1911,18 +1962,18 @@ static NETLIST_START(TTL_74157_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.S, /* S |1 ++ 16| VCC */ A.VCC, - A.I, /* A1 |2 15| G */ A.E, - A.J, /* B1 |3 14| A4 */ D.I, - A.O, /* Y1 |4 74157 13| B4 */ D.J, - B.I, /* A2 |5 12| Y4 */ D.O, - B.J, /* B2 |6 11| A3 */ C.I, - B.O, /* Y2 |7 10| B3 */ C.J, - A.GND, /* GND |8 9| Y3 */ C.O - /* +--------------+ */ + DIPPINS( // +--------------+ + A.S, A.VCC, // S |1 ++ 16| VCC + A.I, A.E, // A1 |2 15| G + A.J, D.I, // B1 |3 14| A4 + A.O, D.J, // Y1 |4 74157 13| B4 + B.I, D.O, // A2 |5 12| Y4 + B.J, C.I, // B2 |6 11| A3 + B.O, C.J, // Y2 |7 10| B3 + A.GND, C.O // GND |8 9| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74161_DIP //- Title: DM54161/DM74161 Synchronous 4-Bit Counter @@ -1933,20 +1984,21 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006551.PDF //- static NETLIST_START(TTL_74161_DIP) +{ TTL_74161(A) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* /CLEAR |1 ++ 16| VCC */ A.VCC, - A.CLK, /* CLOCK |2 15| RC */ A.RC, - A.A, /* A |3 14| QA */ A.QA, - A.B, /* B |4 74161 13| QB */ A.QB, - A.C, /* C |5 12| QC */ A.QC, - A.D, /* D |6 11| QD */ A.QD, - A.ENP, /* Enable P |7 10| Enable T */ A.ENT, - A.GND, /* GND |8 9| /LOAD */ A.LOADQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLRQ, A.VCC, // /CLEAR |1 ++ 16| VCC + A.CLK, A.RC, // CLOCK |2 15| RC + A.A, A.QA, // A |3 14| QA + A.B, A.QB, // B |4 74161 13| QB + A.C, A.QC, // C |5 12| QC + A.D, A.QD, // D |6 11| QD + A.ENP, A.ENT, // Enable P |7 10| Enable T + A.GND, A.LOADQ // GND |8 9| /LOAD + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74163_DIP //- Title: DM74163 Synchronous 4-Bit Counter @@ -1957,20 +2009,21 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006551.PDF //- static NETLIST_START(TTL_74163_DIP) +{ TTL_74163(A) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* /CLEAR |1 ++ 16| VCC */ A.VCC, - A.CLK, /* CLOCK |2 15| RC */ A.RC, - A.A, /* A |3 14| QA */ A.QA, - A.B, /* B |4 74163 13| QB */ A.QB, - A.C, /* C |5 12| QC */ A.QC, - A.D, /* D |6 11| QD */ A.QD, - A.ENP, /* Enable P |7 10| Enable T */ A.ENT, - A.GND, /* GND |8 9| /LOAD */ A.LOADQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLRQ, A.VCC, // /CLEAR |1 ++ 16| VCC + A.CLK, A.RC, // CLOCK |2 15| RC + A.A, A.QA, // A |3 14| QA + A.B, A.QB, // B |4 74163 13| QB + A.C, A.QC, // C |5 12| QC + A.D, A.QD, // D |6 11| QD + A.ENP, A.ENT, // Enable P |7 10| Enable T + A.GND, A.LOADQ // GND |8 9| /LOAD + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74164_DIP //- Title: DM74164 8-Bit Serial In/Parallel Out Shift Registers @@ -1991,19 +2044,20 @@ NETLIST_END() //- +-------+-------+---+---++----+----+-----+----+ //- static NETLIST_START(TTL_74164_DIP) +{ TTL_74164(A) - DIPPINS( /* +--------------+ */ - A.A, /* A |1 ++ 14| VCC */ A.VCC, - A.B, /* B |2 13| QH */ A.QH, - A.QA, /* QA |3 12| QG */ A.QG, - A.QB, /* QB |4 74164 11| QF */ A.QF, - A.QC, /* QC |5 10| QE */ A.QE, - A.QD, /* QD |6 9| CLRQ */ A.CLRQ, - A.GND, /* GND |7 8| CLK */ A.CLK - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A, A.VCC, // A |1 ++ 14| VCC + A.B, A.QH, // B |2 13| QH + A.QA, A.QG, // QA |3 12| QG + A.QB, A.QF, // QB |4 74164 11| QF + A.QC, A.QE, // QC |5 10| QE + A.QD, A.CLRQ, // QD |6 9| CLRQ + A.GND, A.CLK // GND |7 8| CLK + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74165_DIP //- Title: 54165/DM74165 8-Bit Parallel-to-Serial Converter @@ -2024,20 +2078,21 @@ NETLIST_END() //- +-----+-----+-----++----+----+----+----+----+----+----+----+ //- static NETLIST_START(TTL_74165_DIP) +{ TTL_74165(A) - DIPPINS( /* +--------------+ */ - A.SH_LDQ, /* PLQ |1 ++ 16| VCC */ A.VCC, - A.CLK, /* CP1 |2 15| CP2 */ A.CLKINH, - A.E, /* P4 |3 14| P3 */ A.D, - A.F, /* P5 |4 74165 13| P2 */ A.C, - A.G, /* P6 |5 12| P1 */ A.B, - A.H, /* P7 |6 11| P0 */ A.A, - A.QHQ, /* QQ7 |7 10| DS */ A.SER, - A.GND, /* GND |8 9| Q7 */ A.QH - /* +--------------+ */ + DIPPINS( // +--------------+ + A.SH_LDQ, A.VCC, // PLQ |1 ++ 16| VCC + A.CLK, A.CLKINH, // CP1 |2 15| CP2 + A.E, A.D, // P4 |3 14| P3 + A.F, A.C, // P5 |4 74165 13| P2 + A.G, A.B, // P6 |5 12| P1 + A.H, A.A, // P7 |6 11| P0 + A.QHQ, A.SER, // QQ7 |7 10| DS + A.GND, A.QH // GND |8 9| Q7 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74166_DIP //- Title: DM74LS166 8-Bit Parallel-In/Serial-Out Shift Registers @@ -2059,20 +2114,21 @@ NETLIST_END() //- +------+--------+--------+-----+-----+------++----+----+-----+----+ //- static NETLIST_START(TTL_74166_DIP) +{ TTL_74166(A) - DIPPINS( /* +--------------+ */ - A.SER, /* SER |1 ++ 16| VCC */ A.VCC, - A.A, /* A |2 15| SH/LDQ */ A.SH_LDQ, - A.B, /* B |3 14| H */ A.H, - A.C, /* C |4 74166 13| QH */ A.QH, - A.D, /* D |5 12| G */ A.G, - A.CLKINH, /* CLKINH |6 11| F */ A.F, - A.CLK, /* CLK |7 10| E */ A.E, - A.GND, /* GND |8 9| CLRQ */ A.CLRQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.SER, A.VCC, // SER |1 ++ 16| VCC + A.A, A.SH_LDQ, // A |2 15| SH/LDQ + A.B, A.H, // B |3 14| H + A.C, A.QH, // C |4 74166 13| QH + A.D, A.G, // D |5 12| G + A.CLKINH, A.F, // CLKINH |6 11| F + A.CLK, A.E, // CLK |7 10| E + A.GND, A.CLRQ // GND |8 9| CLRQ + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74174_DIP //- Title: DM74174 Hex/Quad D-Type Flip-Flop with Clear @@ -2092,88 +2148,93 @@ NETLIST_END() //- +------+-----+---++---+ //- static NETLIST_START(TTL_74174_DIP) +{ TTL_74174(A) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC - A.Q1, /* Q1 |2 15| Q6 */ A.Q6, - A.D1, /* D1 |3 14| D6 */ A.D6, - A.D2, /* D2 |4 74174 13| D5 */ A.D5, - A.Q2, /* Q2 |5 12| Q5 */ A.Q5, - A.D3, /* D3 |6 11| D4 */ A.D4, - A.Q3, /* Q3 |7 10| Q4 */ A.Q4, - A.GND, /* GND |8 9| CLK */ A.CLK - /* +--------------+ */ + DIPPINS( // +------------+ + A.CLRQ, A.VCC, // CLRQ |1 ++ 16| VCC + A.Q1, A.Q6, // Q1 |2 15| Q6 + A.D1, A.D6, // D1 |3 14| D6 + A.D2, A.D5, // D2 |4 74174 13| D5 + A.Q2, A.Q5, // Q2 |5 12| Q5 + A.D3, A.D4, // D3 |6 11| D4 + A.Q3, A.Q4, // Q3 |7 10| Q4 + A.GND, A.CLK // GND |8 9| CLK + // +------------+ ) -NETLIST_END() +} -//FIXME: add documentation +// FIXME: add documentation static NETLIST_START(TTL_74175_DIP) +{ TTL_74175(A) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC, - A.Q1, /* Q1 |2 15| Q4 */ A.Q4, - A.Q1Q, /* Q1Q |3 14| Q4Q */ A.Q4Q, - A.D1, /* D1 |4 74175 13| D4 */ A.D4, - A.D2, /* D2 |5 12| D3 */ A.D3, - A.Q2Q, /* Q2Q |6 11| Q3Q */ A.Q3Q, - A.Q2, /* Q2 |7 10| Q3 */ A.Q3, - A.GND, /* GND |8 9| CLK */ A.CLK - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLRQ, A.VCC, // CLRQ |1 ++ 16| VCC + A.Q1, A.Q4, // Q1 |2 15| Q4 + A.Q1Q, A.Q4Q, // Q1Q |3 14| Q4Q + A.D1, A.D4, // D1 |4 74175 13| D4 + A.D2, A.D3, // D2 |5 12| D3 + A.Q2Q, A.Q3Q, // Q2Q |6 11| Q3Q + A.Q2, A.Q3, // Q2 |7 10| Q3 + A.GND, A.CLK // GND |8 9| CLK + // +--------------+ ) -NETLIST_END() +} -//FIXME: add documentation +// FIXME: add documentation static NETLIST_START(TTL_74192_DIP) +{ TTL_74192(A) - DIPPINS( /* +--------------+ */ - A.B, /* B |1 ++ 16| VCC */ A.VCC, - A.QB, /* QB |2 15| A */ A.A, - A.QA, /* QA |3 14| CLEAR */ A.CLEAR, - A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ, - A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ, - A.QC, /* QC |6 11| LOADQ */ A.LOADQ, - A.QD, /* QD |7 10| C */ A.C, - A.GND, /* GND |8 9| D */ A.D - /* +--------------+ */ + DIPPINS( // +--------------+ + A.B, A.VCC, // B |1 ++ 16| VCC + A.QB, A.A, // QB |2 15| A + A.QA, A.CLEAR, // QA |3 14| CLEAR + A.CD, A.BORROWQ, // CD |4 74192 13| BORROWQ + A.CU, A.CARRYQ, // CU |5 12| CARRYQ + A.QC, A.LOADQ, // QC |6 11| LOADQ + A.QD, A.C, // QD |7 10| C + A.GND, A.D // GND |8 9| D + // +--------------+ ) -NETLIST_END() +} -//FIXME: add documentation +// FIXME: add documentation static NETLIST_START(TTL_74193_DIP) +{ TTL_74193(A) - DIPPINS( /* +--------------+ */ - A.B, /* B |1 ++ 16| VCC */ A.VCC, - A.QB, /* QB |2 15| A */ A.A, - A.QA, /* QA |3 14| CLEAR */ A.CLEAR, - A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ, - A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ, - A.QC, /* QC |6 11| LOADQ */ A.LOADQ, - A.QD, /* QD |7 10| C */ A.C, - A.GND, /* GND |8 9| D */ A.D - /* +--------------+ */ + DIPPINS( // +--------------+ + A.B, A.VCC, // B |1 ++ 16| VCC + A.QB, A.A, // QB |2 15| A + A.QA, A.CLEAR, // QA |3 14| CLEAR + A.CD, A.BORROWQ, // CD |4 74192 13| BORROWQ + A.CU, A.CARRYQ, // CU |5 12| CARRYQ + A.QC, A.LOADQ, // QC |6 11| LOADQ + A.QD, A.C, // QD |7 10| C + A.GND, A.D // GND |8 9| D + // +--------------+ ) -NETLIST_END() +} -//FIXME: add documentation +// FIXME: add documentation static NETLIST_START(TTL_74194_DIP) +{ TTL_74194(A) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC, - A.SRIN, /* SRIN |2 15| QA */ A.QA, - A.A, /* A |3 14| QB */ A.QB, - A.B, /* B |4 74194 13| QC */ A.QC, - A.C, /* C |5 12| QD */ A.QD, - A.D, /* D |6 11| CLK */ A.CLK, - A.SLIN, /* SLIN |7 10| S1 */ A.S1, - A.GND, /* GND |8 9| S0 */ A.S0 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLRQ, A.VCC, // CLRQ |1 ++ 16| VCC + A.SRIN, A.QA, // SRIN |2 15| QA + A.A, A.QB, // A |3 14| QB + A.B, A.QC, // B |4 74194 13| QC + A.C, A.QD, // C |5 12| QD + A.D, A.CLK, // D |6 11| CLK + A.SLIN, A.S1, // SLIN |7 10| S1 + A.GND, A.S0 // GND |8 9| S0 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74260_DIP //- Title: DM54LS260/DM74LS260 Dual 5-Input NOR Gate @@ -2195,23 +2256,24 @@ NETLIST_END() //- +---+---+---+---+---++---+ //- static NETLIST_START(TTL_74260_DIP) +{ TTL_74260_NOR(A) TTL_74260_NOR(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.C, /* C1 |1 ++ 14| VCC */ A.VCC, - A.D, /* D1 |2 13| B1 */ A.B, - A.E, /* E1 |3 12| A1 */ A.A, - B.E, /* E2 |4 74260 11| D2 */ B.D, - A.Q, /* Y1 |5 10| C2 */ B.C, - B.Q, /* Y2 |6 9| B2 */ B.B, - A.GND, /* GND |7 8| A2 */ B.A - /* +--------------+ */ + DIPPINS( // +--------------+ + A.C, A.VCC, // C1 |1 ++ 14| VCC + A.D, A.B, // D1 |2 13| B1 + A.E, A.A, // E1 |3 12| A1 + B.E, B.D, // E2 |4 74260 11| D2 + A.Q, B.C, // Y1 |5 10| C2 + B.Q, B.B, // Y2 |6 9| B2 + A.GND, B.A // GND |7 8| A2 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74279_DIP //- Title: 54279/DM74279 Quad Set-Reset Latch @@ -2235,6 +2297,7 @@ NETLIST_END() #endif static NETLIST_START(TTL_74279_DIP) +{ TTL_74279B(A) TTL_74279A(B) TTL_74279B(C) @@ -2243,35 +2306,36 @@ static NETLIST_START(TTL_74279_DIP) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) - DIPPINS( /* +--------------+ */ - A.R, /* 1RQ |1 ++ 16| VCC */ A.VCC, - A.S1, /* 1S1Q |2 15| 4SQ */ D.S, - A.S2, /* 1S2Q |3 14| 4RQ */ D.R, - A.Q, /* 1Q |4 74279 13| 4Q */ D.Q, - B.R, /* 2RQ |5 12| 3S2Q */ C.S2, - B.S, /* 2SQ |6 11| 3S1Q */ C.S1, - B.Q, /* 2Q |7 10| 3RQ */ C.R, - A.GND, /* GND |8 9| 3Q */ C.Q - /* +--------------+ */ + DIPPINS( // +--------------+ + A.R, A.VCC, // 1RQ |1 ++ 16| VCC + A.S1, D.S, // 1S1Q |2 15| 4SQ + A.S2, D.R, // 1S2Q |3 14| 4RQ + A.Q, D.Q, // 1Q |4 74279 13| 4Q + B.R, C.S2, // 2RQ |5 12| 3S2Q + B.S, C.S1, // 2SQ |6 11| 3S1Q + B.Q, C.R, // 2Q |7 10| 3RQ + A.GND, C.Q // GND |8 9| 3Q + // +--------------+ ) -NETLIST_END() +} // FIXME: Documentation static NETLIST_START(TTL_74365_DIP) +{ TTL_74365(A) - DIPPINS( /* +--------------+ */ - A.G1Q, /* G1Q |1 ++ 16| VCC */ A.VCC, - A.A1, /* A1 |2 15| G2Q */ A.G2Q, - A.Y1, /* Y1 |3 14| A6 */ A.A6, - A.A2, /* A2 |4 74365 13| Y6 */ A.Y6, - A.Y2, /* Y2 |5 12| A5 */ A.A5, - A.A3, /* A3 |6 11| Y5 */ A.Y5, - A.Y3, /* Y3 |7 10| A4 */ A.A4, - A.GND, /* GND |8 9| Y4 */ A.Y4 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.G1Q, A.VCC, // G1Q |1 ++ 16| VCC + A.A1, A.G2Q, // A1 |2 15| G2Q + A.Y1, A.A6, // Y1 |3 14| A6 + A.A2, A.Y6, // A2 |4 74365 13| Y6 + A.Y2, A.A5, // Y2 |5 12| A5 + A.A3, A.Y5, // A3 |6 11| Y5 + A.Y3, A.A4, // Y3 |7 10| A4 + A.GND, A.Y4 // GND |8 9| Y4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74290_DIP //- Title: SN54290/SN74290, SN54LS290/SN74LS290 Decade Counter @@ -2311,20 +2375,21 @@ NETLIST_END() //- +-----+-----+-----+-----++----+----+----+----+ //- static NETLIST_START(TTL_74290_DIP) +{ TTL_7490(A) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - A.R91, /* R91 |1 ++ 14| VCC */ A.VCC, - NC.I, /* NC |2 13| R02 */ A.R2, - A.R92, /* R92 |3 12| R01 */ A.R1, - A.QC, /* QC |4 74290 11| CKB */ A.B, - A.QB, /* QB |5 10| CKA */ A.A, - NC.I, /* NC |6 9| QA */ A.QA, - A.GND, /* GND |7 8| QD */ A.QD - /* +--------------+ */ + DIPPINS( // +--------------+ + A.R91, A.VCC, // R91 |1 ++ 14| VCC + NC.I, A.R2, // NC |2 13| R02 + A.R92, A.R1, // R92 |3 12| R01 + A.QC, A.B, // QC |4 74290 11| CKB + A.QB, A.A, // QB |5 10| CKA + NC.I, A.QA, // NC |6 9| QA + A.GND, A.QD // GND |7 8| QD + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74293_DIP //- Title: SN54293/SN74293, SN54LS293/SN74LS293 Binary Counters @@ -2369,21 +2434,22 @@ NETLIST_END() //- //- - static NETLIST_START(TTL_74293_DIP) +static NETLIST_START(TTL_74293_DIP) +{ TTL_7493(A) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - NC.I, /* NC |1 ++ 14| VCC */ A.VCC, - NC.I, /* NC |2 13| R02 */ A.R2, - NC.I, /* NC |3 12| R01 */ A.R1, - A.QC, /* QC |4 74293 11| CKB */ A.CLKB, - A.QB, /* QB |5 10| CKA */ A.CLKA, - NC.I, /* NC |6 9| QA */ A.QA, - A.GND, /* GND |7 8| QD */ A.QD - /* +--------------+ */ + DIPPINS( // +--------------+ + NC.I, A.VCC, // NC |1 ++ 14| VCC + NC.I, A.R2, // NC |2 13| R02 + NC.I, A.R1, // NC |3 12| R01 + A.QC, A.CLKB, // QC |4 74293 11| CKB + A.QB, A.CLKA, // QB |5 10| CKA + NC.I, A.QA, // NC |6 9| QA + A.GND, A.QD // GND |7 8| QD + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74377_DIP //- Title: DM54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock @@ -2402,6 +2468,7 @@ NETLIST_END() //- +----+-----+----++----+ //- static NETLIST_START(TTL_74377_DIP) +{ TTL_74377_GATE(A) TTL_74377_GATE(B) TTL_74377_GATE(C) @@ -2425,20 +2492,20 @@ static NETLIST_START(TTL_74377_DIP) HINT(G.QQ, NC) HINT(H.QQ, NC) - DIPPINS( /* +--------------+ */ - A.E, /* EQ |1 ++ 20| VCC */ A.VCC, - A.Q, /* Q0 |2 19| Q7 */ H.Q, - A.D, /* D0 |3 18| D7 */ H.D, - B.D, /* D1 |4 74377 17| D6 */ G.D, - B.Q, /* Q1 |5 16| Q6 */ G.Q, - C.Q, /* Q2 |6 15| Q5 */ F.Q, - C.D, /* D2 |7 14| D5 */ F.D, - D.D, /* D3 |8 13| D4 */ E.D, - D.Q, /* Q3 |9 12| Q4 */ E.Q, - A.GND, /* GND |10 11| CP */ A.CP - /* +--------------+ */ - ) -NETLIST_END() + DIPPINS( // +--------------+ + A.E, A.VCC, // EQ |1 ++ 20| VCC + A.Q, H.Q, // Q0 |2 19| Q7 + A.D, H.D, // D0 |3 18| D7 + B.D, G.D, // D1 |4 74377 17| D6 + B.Q, G.Q, // Q1 |5 16| Q6 + C.Q, F.Q, // Q2 |6 15| Q5 + C.D, F.D, // D2 |7 14| D5 + D.D, E.D, // D3 |8 13| D4 + D.Q, E.Q, // Q3 |9 12| Q4 + A.GND, A.CP // GND |10 11| CP + // +--------------+ + ) +} //- Identifier: TTL_74378_DIP //- Title: DM54LS378/DM74LS378 Parallel D Register with Enable @@ -2457,6 +2524,7 @@ NETLIST_END() //- +----+-----+----++----+ //- static NETLIST_START(TTL_74378_DIP) +{ TTL_74377_GATE(A) TTL_74377_GATE(B) TTL_74377_GATE(C) @@ -2469,18 +2537,18 @@ static NETLIST_START(TTL_74378_DIP) NET_C(A.CP, B.CP, C.CP, D.CP, E.CP, F.CP) NET_C(A.E, B.E, C.E, D.E, E.E, F.E) - DIPPINS( /* +--------------+ */ - A.E, /* EQ |1 ++ 16| VCC */ A.VCC, - A.Q, /* Q0 |2 15| Q5 */ F.Q, - A.D, /* D0 |3 14| D5 */ F.D, - B.D, /* D1 |4 74378 13| D4 */ E.D, - B.Q, /* Q1 |5 12| Q4 */ E.Q, - C.D, /* D2 |6 11| D3 */ D.D, - C.Q, /* Q2 |7 10| Q3 */ D.Q, - A.GND, /* GND |8 9| CP */ A.CP - /* +--------------+ */ + DIPPINS( // +--------------+ + A.E, A.VCC, // EQ |1 ++ 16| VCC + A.Q, F.Q, // Q0 |2 15| Q5 + A.D, F.D, // D0 |3 14| D5 + B.D, E.D, // D1 |4 74378 13| D4 + B.Q, E.Q, // Q1 |5 12| Q4 + C.D, D.D, // D2 |6 11| D3 + C.Q, D.Q, // Q2 |7 10| Q3 + A.GND, A.CP // GND |8 9| CP + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74379_DIP //- Title: 54LS379/DM74LS379 Quad Parallel Register with Enable @@ -2499,6 +2567,7 @@ NETLIST_END() //- +----+-----+----++----+-----+ //- static NETLIST_START(TTL_74379_DIP) +{ TTL_74377_GATE(A) TTL_74377_GATE(B) TTL_74377_GATE(C) @@ -2509,18 +2578,18 @@ static NETLIST_START(TTL_74379_DIP) NET_C(A.CP, B.CP, C.CP, D.CP) NET_C(A.E, B.E, C.E, D.E) - DIPPINS( /* +--------------+ */ - A.E, /* EQ |1 ++ 16| VCC */ A.VCC, - A.Q, /* Q0 |2 15| Q3 */ D.Q, - A.QQ, /* QQ0 |3 14| QQ3 */ D.QQ, - A.D, /* D0 |4 74379 13| D3 */ D.D, - B.D, /* D1 |5 12| D2 */ C.D, - B.QQ, /* QQ1 |6 11| QQ2 */ C.QQ, - B.Q, /* Q1 |7 10| Q2 */ C.Q, - A.GND, /* GND |8 9| CP */ A.CP - /* +--------------+ */ + DIPPINS( // +--------------+ + A.E, A.VCC, // EQ |1 ++ 16| VCC + A.Q, D.Q, // Q0 |2 15| Q3 + A.QQ, D.QQ, // QQ0 |3 14| QQ3 + A.D, D.D, // D0 |4 74379 13| D3 + B.D, C.D, // D1 |5 12| D2 + B.QQ, C.QQ, // QQ1 |6 11| QQ2 + B.Q, C.Q, // Q1 |7 10| Q2 + A.GND, A.CP // GND |8 9| CP + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_74393_DIP //- Title: Dual 4-Bit Binary Counter @@ -2531,23 +2600,24 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006434.PDF //- static NETLIST_START(TTL_74393_DIP) +{ TTL_74393(A) TTL_74393(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.CP, /* 1A |1 ++ 14| VCC */ A.VCC, - A.MR, /* 1CLR |2 13| 2A */ B.CP, - A.Q0, /* 1QA |3 12| 2CLR */ B.MR, - A.Q1, /* 1QB |4 74393 11| 2QA */ B.Q0, - A.Q2, /* 1QC |5 10| 2QB */ B.Q1, - A.Q3, /* 1QD |6 9| 2QC */ B.Q2, - A.GND, /* GND |7 8| 2QD */ B.Q3 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CP, A.VCC, // 1A |1 ++ 14| VCC + A.MR, B.CP, // 1CLR |2 13| 2A + A.Q0, B.MR, // 1QA |3 12| 2CLR + A.Q1, B.Q0, // 1QB |4 74393 11| 2QA + A.Q2, B.Q1, // 1QC |5 10| 2QB + A.Q3, B.Q2, // 1QD |6 9| 2QC + A.GND, B.Q3 // GND |7 8| 2QD + // +--------------+ ) -NETLIST_END() +} //- Identifier: SN74LS629_DIP //- Title: SN74LS629 VOLTAGE-CONTROLLED OSCILLATORS @@ -2571,6 +2641,7 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheets/400/335051_DS.pdf //- static NETLIST_START(SN74LS629_DIP) +{ SN74LS629(A, CAP_U(1)) SN74LS629(B, CAP_U(1)) @@ -2580,18 +2651,18 @@ static NETLIST_START(SN74LS629_DIP) NET_C(A.OSCVCC, B.OSCVCC) NC_PIN(NC) - DIPPINS( /* +--------------+ */ - B.FC, /* 2FC |1 ++ 16| VCC */ A.VCC, - A.FC, /* 1FC |2 15| OSC VCC */ A.OSCVCC, - A.RNG, /* 1RNG |3 14| 2RNG */ B.RNG, - NC.I, /* 1CX1 |4 74LS629 13| 2CX1 */ NC.I, - NC.I, /* 1CX2 |5 12| 2CX2 */ NC.I, - A.ENQ, /* 1ENQ |6 11| 2ENQ */ B.ENQ, - B.Y, /* 1Y |7 10| 2Y */ B.Y, - A.OSCGND, /* OSC GND |8 9| GND */ A.GND - /* +--------------+ */ + DIPPINS( // +--------------+ + B.FC, A.VCC, // 2FC |1 ++ 16| VCC + A.FC, A.OSCVCC, // 1FC |2 15| OSC VCC + A.RNG, B.RNG, // 1RNG |3 14| 2RNG + NC.I, NC.I, // 1CX1 |4 74LS629 13| 2CX1 + NC.I, NC.I, // 1CX2 |5 12| 2CX2 + A.ENQ, B.ENQ, // 1ENQ |6 11| 2ENQ + B.Y, B.Y, // 1Y |7 10| 2Y + A.OSCGND, A.GND // OSC GND |8 9| GND + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_9310_DIP //- Title: DM9310/DM8310 Synchronous 4-Bit Decade Counter @@ -2602,20 +2673,21 @@ NETLIST_END() //- https://ia800608.us.archive.org/5/items/bitsavers_nationaldaTTLDatabook_40452765/1976_National_TTL_Databook.pdf //- static NETLIST_START(TTL_9310_DIP) +{ TTL_9310(A) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* /CLEAR |1 ++ 16| VCC */ A.VCC, - A.CLK, /* CLOCK |2 15| RC */ A.RC, - A.A, /* A |3 14| QA */ A.QA, - A.B, /* B |4 9310 13| QB */ A.QB, - A.C, /* C |5 12| QC */ A.QC, - A.D, /* D |6 11| QD */ A.QD, - A.ENP, /* Enable P |7 10| Enable T */ A.ENT, - A.GND, /* GND |8 9| /LOAD */ A.LOADQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLRQ, A.VCC, // /CLEAR |1 ++ 16| VCC + A.CLK, A.RC, // CLOCK |2 15| RC + A.A, A.QA, // A |3 14| QA + A.B, A.QB, // B |4 9310 13| QB + A.C, A.QC, // C |5 12| QC + A.D, A.QD, // D |6 11| QD + A.ENP, A.ENT, // Enable P |7 10| Enable T + A.GND, A.LOADQ // GND |8 9| /LOAD + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_9312_DIP //- Title: DM9312/DM8312 One of Eight Line Data Selectors/Multiplexers @@ -2640,37 +2712,39 @@ NETLIST_END() //- +---+---+---+---++----+-----+ //- static NETLIST_START(TTL_9312_DIP) +{ TTL_9312(A) - DIPPINS( /* +--------------+ */ - A.D0, /* D0 |1 ++ 16| VCC */ A.VCC, - A.D1, /* D1 |2 15| Y */ A.Y, - A.D2, /* D2 |3 14| YQ */ A.YQ, - A.D3, /* D3 |4 9312 13| C */ A.C, - A.D4, /* D4 |5 12| B */ A.B, - A.D5, /* D5 |6 11| A */ A.A, - A.D6, /* D6 |7 10| G */ A.G, //Strobe - A.GND, /* GND |8 9| D7 */ A.D7 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.D0, A.VCC, // D0 |1 ++ 16| VCC + A.D1, A.Y, // D1 |2 15| Y + A.D2, A.YQ, // D2 |3 14| YQ + A.D3, A.C, // D3 |4 9312 13| C + A.D4, A.B, // D4 |5 12| B + A.D5, A.A, // D5 |6 11| A + A.D6, A.G, // Strobe // D6 |7 10| G + A.GND, A.D7 // GND |8 9| D7 + // +--------------+ ) -NETLIST_END() +} // FIXME: Documentation static NETLIST_START(TTL_9314_DIP) +{ TTL_9314(A) - DIPPINS( /* +--------------+ */ - A.EQ, /* /E |1 ++ 16| VCC */ A.VCC, - A.S0Q, /* /S0 |2 15| Q0 */ A.Q0, - A.D0, /* D0 |3 14| /S1 */ A.S1Q, - A.D1, /* D1 |4 DM9314 13| Q1 */ A.Q1, - A.S2Q, /* /S2 |5 12| Q2 */ A.Q2, - A.D2, /* D2 |6 11| /S3 */ A.S3Q, - A.D3, /* D3 |7 10| Q3 */ A.Q3, - A.GND, /* GND |8 9| /MR */ A.MRQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.EQ, A.VCC, // /E |1 ++ 16| VCC + A.S0Q, A.Q0, // /S0 |2 15| Q0 + A.D0, A.S1Q, // D0 |3 14| /S1 + A.D1, A.Q1, // D1 |4 DM9314 13| Q1 + A.S2Q, A.Q2, // /S2 |5 12| Q2 + A.D2, A.S3Q, // D2 |6 11| /S3 + A.D3, A.Q3, // D3 |7 10| Q3 + A.GND, A.MRQ // GND |8 9| /MR + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_9316_DIP //- Title: DM9316/DM8316 Synchronous 4-Bit Counters @@ -2681,20 +2755,21 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006606.PDF //- static NETLIST_START(TTL_9316_DIP) +{ TTL_9316(A) - DIPPINS( /* +--------------+ */ - A.CLRQ, /* CLEARQ |1 ++ 16| VCC */ A.VCC, - A.CLK, /* CLOCK |2 15| RC */ A.RC, - A.A, /* A |3 14| QA */ A.QA, - A.B, /* B |4 9316 13| QB */ A.QB, - A.C, /* C |5 12| QC */ A.QC, - A.D, /* D |6 11| QD */ A.QD, - A.ENP, /* Enable P |7 10| Enable T */ A.ENT, - A.GND, /* GND |8 9| LOADQ */ A.LOADQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.CLRQ, A.VCC, // CLEARQ |1 ++ 16| VCC + A.CLK, A.RC, // CLOCK |2 15| RC + A.A, A.QA, // A |3 14| QA + A.B, A.QB, // B |4 9316 13| QB + A.C, A.QC, // C |5 12| QC + A.D, A.QD, // D |6 11| QD + A.ENP, A.ENT, // Enable P |7 10| Enable T + A.GND, A.LOADQ // GND |8 9| LOADQ + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_9322_DIP //- Title: DM9322/DM8322 Quad 2-Line to 1-Line Data Selectors/Multiplexers @@ -2705,20 +2780,21 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006606.PDF //- static NETLIST_START(TTL_9322_DIP) +{ TTL_9322(A) - DIPPINS( /* +--------------+ */ - A.SELECT, /* SELECT |1 ++ 16| VCC */ A.VCC, - A.A1, /* A1 |2 15| STROBE */ A.STROBE, - A.B1, /* B1 |3 14| A4 */ A.A4, - A.Y1, /* Y1 |4 9322 13| B4 */ A.B4, - A.A2, /* A2 |5 12| Y4 */ A.Y4, - A.B2, /* B2 |6 11| A3 */ A.A3, - A.Y2, /* Y2 |7 10| B3 */ A.B3, - A.GND, /* GND |8 9| Y3 */ A.Y3 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.SELECT, A.VCC, // SELECT |1 ++ 16| VCC + A.A1, A.STROBE, // A1 |2 15| STROBE + A.B1, A.A4, // B1 |3 14| A4 + A.Y1, A.B4, // Y1 |4 9322 13| B4 + A.A2, A.Y4, // A2 |5 12| Y4 + A.B2, A.A3, // B2 |6 11| A3 + A.Y2, A.B3, // Y2 |7 10| B3 + A.GND, A.Y3 // GND |8 9| Y3 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_9321_DIP //- Title: DM9321/DM8321 Dual 4-Line to 1-Line Data Selectors/Multiplexers @@ -2727,42 +2803,43 @@ NETLIST_END() //- NamingConvention: Naming conventions follow National Semiconductor datasheet //- static NETLIST_START(TTL_9321_DIP) +{ TTL_9321(A) TTL_9321(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.E, /* /E |1 ++ 16| VCC */ A.VCC, - A.A0, /* A0 |2 15| /E */ B.E, - A.A1, /* A1 |3 14| A0 */ B.A0, - A.D0, /* /D0 |4 9321 13| A1 */ B.A1, - A.D1, /* /D1 |5 12| /D0 */ B.D0, - A.D2, /* /D2 |6 11| /D1 */ B.D1, - A.D3, /* /D3 |7 10| /D2 */ B.D2, - A.GND, /* GND |8 9| /D3 */ B.D3 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.E, A.VCC, // /E |1 ++ 16| VCC + A.A0, B.E, // A0 |2 15| /E + A.A1, B.A0, // A1 |3 14| A0 + A.D0, B.A1, // /D0 |4 9321 13| A1 + A.D1, B.D0, // /D1 |5 12| /D0 + A.D2, B.D1, // /D2 |6 11| /D1 + A.D3, B.D2, // /D3 |7 10| /D2 + A.GND, B.D3 // GND |8 9| /D3 + // +--------------+ ) -NETLIST_END() - +} -//FIXME: Documentation +// FIXME: Documentation static NETLIST_START(TTL_9334_DIP) +{ TTL_9334(A) - DIPPINS(/* +--------------+ */ - A.A0, /* A0 |1 ++ 16| VCC */ A.VCC, - A.A1, /* A1 |2 15| /C */ A.CQ, - A.A2, /* A2 |3 14| /E */ A.EQ, - A.Q0, /* Q0 |4 DM9334 13| D */ A.D, - A.Q1, /* Q1 |5 12| Q7 */ A.Q7, - A.Q2, /* Q2 |6 11| Q6 */ A.Q6, - A.Q3, /* Q3 |7 10| Q5 */ A.Q5, - A.GND,/* GND |8 9| Q4 */ A.Q4 - /* +--------------+ */ + DIPPINS( // +--------------+ + A.A0, A.VCC, // A0 |1 ++ 16| VCC + A.A1, A.CQ, // A1 |2 15| /C + A.A2, A.EQ, // A2 |3 14| /E + A.Q0, A.D, // Q0 |4 DM9334 13| D + A.Q1, A.Q7, // Q1 |5 12| Q7 + A.Q2, A.Q6, // Q2 |6 11| Q6 + A.Q3, A.Q5, // Q3 |7 10| Q5 + A.GND, A.Q4 // GND |8 9| Q4 + // +--------------+ ) -NETLIST_END() +} //- Identifier: TTL_9602_DIP //- Title: DM9602/DM6802 Dual Retriggerable, Resettable One Shots @@ -2778,167 +2855,184 @@ NETLIST_END() //- https://pdf1.alldatasheet.com/datasheet-pdf/view/51137/FAIRCHILD/DM9602.html //- static NETLIST_START(TTL_9602_DIP) +{ TTL_9602(A) TTL_9602(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) - DIPPINS( /* +--------------+ */ - A.C, /* C1 |1 ++ 16| VCC */ A.VCC, - A.RC, /* RC1 |2 15| C2 */ B.C, - A.CLRQ, /* CLRQ1 |3 14| RC2 */ B.RC, - A.B, /* B1 |4 9602 13| CLRQ2 */ B.CLRQ, - A.A, /* A1 |5 12| B2 */ B.B, - A.Q, /* Q1 |6 11| A2 */ B.A, - A.QQ, /* QQ1 |7 10| Q2 */ B.Q, - A.GND, /* GND |8 9| QQ2 */ B.QQ - /* +--------------+ */ + DIPPINS( // +--------------+ + A.C, A.VCC, // C1 |1 ++ 16| VCC + A.RC, B.C, // RC1 |2 15| C2 + A.CLRQ, B.RC, // CLRQ1 |3 14| RC2 + A.B, B.CLRQ, // B1 |4 9602 13| CLRQ2 + A.A, B.B, // A1 |5 12| B2 + A.Q, B.A, // Q1 |6 11| A2 + A.QQ, B.Q, // QQ1 |7 10| Q2 + A.GND, B.QQ // GND |8 9| QQ2 + // +--------------+ ) -NETLIST_END() +} // FIXME: Documentation and naming static NETLIST_START(TTL_8277_DIP) +{ TTL_8277(A) - DIPPINS( /* +--------------+ */ - A.RESET, /* RESET |1 ++ 16| VCC */ A.VCC, - A.Q7QA, /* /Q7A |2 15| /Q7B */ A.Q7QB, - A.Q7A, /* Q7A |3 14| Q7B */ A.Q7B, - A.DSA, /* DSA |4 8277 13| DSB */ A.DSB, - A.D1A, /* D1A |5 12| D1B */ A.D1B, - A.D0A, /* D0A |6 11| D0B */ A.D0B, - A.CLKA, /* CLKA |7 10| CLKB */ A.CLKB, - A.GND, /* GND |8 9| CLK */ A.CLK - /* +--------------+ */ + DIPPINS( // +--------------+ + A.RESET, A.VCC, // RESET |1 ++ 16| VCC + A.Q7QA, A.Q7QB, // /Q7A |2 15| /Q7B + A.Q7A, A.Q7B, // Q7A |3 14| Q7B + A.DSA, A.DSB, // DSA |4 8277 13| DSB + A.D1A, A.D1B, // D1A |5 12| D1B + A.D0A, A.D0B, // D0A |6 11| D0B + A.CLKA, A.CLKB, // CLKA |7 10| CLKB + A.GND, A.CLK // GND |8 9| CLK + // +--------------+ ) -NETLIST_END() +} // FIXME: Documentation, add model, seems to be a CMOS device static NETLIST_START(TTL_AM2847_DIP) +{ TTL_AM2847(A) - DIPPINS( /* +--------------+ */ - A.OUTA, /* OUTA |1 ++ 16| VSS */ A.VSS, - A.RCA, /* RCA |2 15| IND */ A.IND, - A.INA, /* INA |3 14| RCD */ A.RCD, - A.OUTB, /* OUTB |4 Am2847 13| OUTD */ A.OUTD, - A.RCB, /* RCB |5 12| VGG */ A.VGG, - A.INB, /* INB |6 11| CP */ A.CP, - A.OUTC, /* OUTC |7 10| INC */ A.INC, - A.VDD, /* VDD |8 9| RCC */ A.RCC - /* +--------------+ */ + DIPPINS( // +--------------+ + A.OUTA, A.VSS, // OUTA |1 ++ 16| VSS + A.RCA, A.IND, // RCA |2 15| IND + A.INA, A.RCD, // INA |3 14| RCD + A.OUTB, A.OUTD, // OUTB |4 Am2847 13| OUTD + A.RCB, A.VGG, // RCB |5 12| VGG + A.INB, A.CP, // INB |6 11| CP + A.OUTC, A.INC, // OUTC |7 10| INC + A.VDD, A.RCC // VDD |8 9| RCC + // +--------------+ ) -NETLIST_END() +} -static TRUTHTABLE_START(TTL_7400_NAND, 2, 1, "+A,+B,@VCC,@GND") +static TRUTH_TABLE(TTL_7400_NAND, 2, 1, "+A,+B,@VCC,@GND") +{ TT_HEAD("A,B|Q ") TT_LINE("0,X|1|22") TT_LINE("X,0|1|22") TT_LINE("1,1|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7402_NOR, 2, 1, "+A,+B,@VCC,@GND") +static TRUTH_TABLE(TTL_7402_NOR, 2, 1, "+A,+B,@VCC,@GND") +{ TT_HEAD("A,B|Q ") TT_LINE("0,0|1|22") TT_LINE("X,1|0|15") TT_LINE("1,X|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7404_INVERT, 1, 1, "+A,@VCC,@GND") +static TRUTH_TABLE(TTL_7404_INVERT, 1, 1, "+A,@VCC,@GND") +{ TT_HEAD(" A | Q ") TT_LINE(" 0 | 1 |22") TT_LINE(" 1 | 0 |15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7406_GATE, 1, 1, "") +static TRUTH_TABLE(TTL_7406_GATE, 1, 1, "") +{ TT_HEAD("A|Y ") TT_LINE("0|1|15") TT_LINE("1|0|23") - /* Open Collector */ + // Open Collector TT_FAMILY("74XXOC") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7407_GATE, 1, 1, "") +static TRUTH_TABLE(TTL_7407_GATE, 1, 1, "") +{ TT_HEAD("A|Y ") TT_LINE("0|0|15") TT_LINE("1|1|23") - /* Open Collector */ + // Open Collector TT_FAMILY("74XXOC") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7408_GATE, 2, 1, "") +static TRUTH_TABLE(TTL_7408_GATE, 2, 1, "") +{ TT_HEAD("A,B|Q ") TT_LINE("0,X|0|15") TT_LINE("X,0|0|15") TT_LINE("1,1|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7408_AND, 2, 1, "+A,+B,@VCC,@GND") +static TRUTH_TABLE(TTL_7408_AND, 2, 1, "+A,+B,@VCC,@GND") +{ TT_HEAD("A,B|Q ") TT_LINE("0,X|0|15") TT_LINE("X,0|0|15") TT_LINE("1,1|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7410_NAND, 3, 1, "+A,+B,+C,@VCC,@GND") +static TRUTH_TABLE(TTL_7410_NAND, 3, 1, "+A,+B,+C,@VCC,@GND") +{ TT_HEAD("A,B,C|Q ") TT_LINE("0,X,X|1|22") TT_LINE("X,0,X|1|22") TT_LINE("X,X,0|1|22") TT_LINE("1,1,1|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7410_GATE, 3, 1, "") +static TRUTH_TABLE(TTL_7410_GATE, 3, 1, "") +{ TT_HEAD("A,B,C|Q ") TT_LINE("0,X,X|1|22") TT_LINE("X,0,X|1|22") TT_LINE("X,X,0|1|22") TT_LINE("1,1,1|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7411_AND, 3, 1, "+A,+B,+C,@VCC,@GND") +static TRUTH_TABLE(TTL_7411_AND, 3, 1, "+A,+B,+C,@VCC,@GND") +{ TT_HEAD("A,B,C|Q ") TT_LINE("0,X,X|0|15") TT_LINE("X,0,X|0|15") TT_LINE("X,X,0|0|15") TT_LINE("1,1,1|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7411_GATE, 3, 1, "") +static TRUTH_TABLE(TTL_7411_GATE, 3, 1, "") +{ TT_HEAD("A,B,C|Q ") TT_LINE("0,X,X|0|15") TT_LINE("X,0,X|0|15") TT_LINE("X,X,0|0|15") TT_LINE("1,1,1|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7416_GATE, 1, 1, "") +static TRUTH_TABLE(TTL_7416_GATE, 1, 1, "") +{ TT_HEAD("A|Q") TT_LINE("0|1|15") TT_LINE("1|0|23") - /* Open Collector */ + // Open Collector TT_FAMILY("74XXOC") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7417_GATE, 1, 1, "") +static TRUTH_TABLE(TTL_7417_GATE, 1, 1, "") +{ TT_HEAD("A|Q") TT_LINE("0|0|15") TT_LINE("1|1|23") - /* Open Collector */ + // Open Collector TT_FAMILY("74XXOC") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7420_NAND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") +static TRUTH_TABLE(TTL_7420_NAND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") +{ TT_HEAD("A,B,C,D|Q ") TT_LINE("0,X,X,X|1|22") TT_LINE("X,0,X,X|1|22") @@ -2946,9 +3040,10 @@ static TRUTHTABLE_START(TTL_7420_NAND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") TT_LINE("X,X,X,0|1|22") TT_LINE("1,1,1,1|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7421_AND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") +static TRUTH_TABLE(TTL_7421_AND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") +{ TT_HEAD("A,B,C,D|Q ") TT_LINE("0,X,X,X|0|22") TT_LINE("X,0,X,X|0|22") @@ -2956,9 +3051,10 @@ static TRUTHTABLE_START(TTL_7421_AND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") TT_LINE("X,X,X,0|0|22") TT_LINE("1,1,1,1|1|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7425_NOR, 4, 1, "+A,+B,+C,+D,@VCC,@GND") +static TRUTH_TABLE(TTL_7425_NOR, 4, 1, "+A,+B,+C,+D,@VCC,@GND") +{ TT_HEAD("A,B,C,D|Q ") TT_LINE("1,X,X,X|0|15") TT_LINE("X,1,X,X|0|15") @@ -2966,18 +3062,20 @@ static TRUTHTABLE_START(TTL_7425_NOR, 4, 1, "+A,+B,+C,+D,@VCC,@GND") TT_LINE("X,X,X,1|0|15") TT_LINE("0,0,0,0|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7427_NOR, 3, 1, "+A,+B,+C,@VCC,@GND") +static TRUTH_TABLE(TTL_7427_NOR, 3, 1, "+A,+B,+C,@VCC,@GND") +{ TT_HEAD("A,B,C|Q ") TT_LINE("1,X,X|0|15") TT_LINE("X,1,X|0|15") TT_LINE("X,X,1|0|15") TT_LINE("0,0,0|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7430_NAND, 8, 1, "+A,+B,+C,+D,+E,+F,+G,+H,@VCC,@GND") +static TRUTH_TABLE(TTL_7430_NAND, 8, 1, "+A,+B,+C,+D,+E,+F,+G,+H,@VCC,@GND") +{ TT_HEAD("A,B,C,D,E,F,G,H|Q ") TT_LINE("0,X,X,X,X,X,X,X|1|22") TT_LINE("X,0,X,X,X,X,X,X|1|22") @@ -2989,38 +3087,42 @@ static TRUTHTABLE_START(TTL_7430_NAND, 8, 1, "+A,+B,+C,+D,+E,+F,+G,+H,@VCC,@GND" TT_LINE("X,X,X,X,X,X,X,0|1|22") TT_LINE("1,1,1,1,1,1,1,1|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7432_OR, 2, 1, "+A,+B,@VCC,@GND") +static TRUTH_TABLE(TTL_7432_OR, 2, 1, "+A,+B,@VCC,@GND") +{ TT_HEAD("A,B|Q ") TT_LINE("1,X|1|22") TT_LINE("X,1|1|22") TT_LINE("0,0|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} /* FIXME: Same as 7400, but drains higher output currents. * Netlist currently does not model over currents (should it ever?) */ -static TRUTHTABLE_START(TTL_7437_NAND, 2, 1, "+A,+B") +static TRUTH_TABLE(TTL_7437_NAND, 2, 1, "+A,+B") +{ TT_HEAD("A,B|Q ") TT_LINE("0,X|1|22") TT_LINE("X,0|1|22") TT_LINE("1,1|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7438_NAND, 2, 1, "+A,+B") +static TRUTH_TABLE(TTL_7438_NAND, 2, 1, "+A,+B") +{ TT_HEAD("A,B|Q ") TT_LINE("0,X|1|22") TT_LINE("X,0|1|22") TT_LINE("1,1|0|15") - /* Open Collector */ + // Open Collector TT_FAMILY("74XXOC") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7442, 4, 10, "") +static TRUTH_TABLE(TTL_7442, 4, 10, "") +{ TT_HEAD("D,C,B,A|0,1,2,3,4,5,6,7,8,9") TT_LINE("0,0,0,0|0,1,1,1,1,1,1,1,1,1|30,30,30,30,30,30,30,30,30,30") TT_LINE("0,0,0,1|1,0,1,1,1,1,1,1,1,1|30,30,30,30,30,30,30,30,30,30") @@ -3034,30 +3136,32 @@ static TRUTHTABLE_START(TTL_7442, 4, 10, "") TT_LINE("1,0,0,1|1,1,1,1,1,1,1,1,1,0|30,30,30,30,30,30,30,30,30,30") TT_LINE("1,0,1,X|1,1,1,1,1,1,1,1,1,1|30,30,30,30,30,30,30,30,30,30") TT_LINE("1,1,X,X|1,1,1,1,1,1,1,1,1,1|30,30,30,30,30,30,30,30,30,30") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_7486_XOR, 2, 1, "+A,+B,@VCC,@GND") +static TRUTH_TABLE(TTL_7486_XOR, 2, 1, "+A,+B,@VCC,@GND") +{ TT_HEAD("A,B|Q ") TT_LINE("0,0|0|15") TT_LINE("0,1|1|22") TT_LINE("1,0|1|22") TT_LINE("1,1|0|15") TT_FAMILY("74XX") -TRUTHTABLE_END() - +} -static TRUTHTABLE_START(TTL_74139_GATE, 3, 4, "") - TT_HEAD("E,A,B|0,1,2,3") +static TRUTH_TABLE(TTL_74139_GATE, 3, 4, "") +{ + TT_HEAD("E,A,B|O0,O1,O2,O3") TT_LINE("1,X,X|1,1,1,1|14") TT_LINE("0,0,0|0,1,1,1|14") TT_LINE("0,0,1|1,0,1,1|14") TT_LINE("0,1,0|1,1,0,1|14") TT_LINE("0,1,1|1,1,1,0|14") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_74155A_GATE, 4, 4, "") - TT_HEAD("B,A,G,C|0,1,2,3") +static TRUTH_TABLE(TTL_74155A_GATE, 4, 4, "") +{ + TT_HEAD("B,A,G,C|Y0,Y1,Y2,Y3") TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13") TT_LINE("X,X,0,0|1,1,1,1|13,13,13,13") TT_LINE("0,0,0,1|0,1,1,1|13,13,13,13") @@ -3065,10 +3169,11 @@ static TRUTHTABLE_START(TTL_74155A_GATE, 4, 4, "") TT_LINE("1,0,0,1|1,1,0,1|13,13,13,13") TT_LINE("1,1,0,1|1,1,1,0|13,13,13,13") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_74155B_GATE, 4, 4, "") - TT_HEAD("B,A,G,C|0,1,2,3") +static TRUTH_TABLE(TTL_74155B_GATE, 4, 4, "") +{ + TT_HEAD("B,A,G,C|Y0,Y1,Y2,Y3") TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13") TT_LINE("X,X,0,1|1,1,1,1|13,13,13,13") TT_LINE("0,0,0,0|0,1,1,1|13,13,13,13") @@ -3076,33 +3181,36 @@ static TRUTHTABLE_START(TTL_74155B_GATE, 4, 4, "") TT_LINE("1,0,0,0|1,1,0,1|13,13,13,13") TT_LINE("1,1,0,0|1,1,1,0|13,13,13,13") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_74156A_GATE, 4, 4, "") - TT_HEAD("B,A,G,C|0,1,2,3") +static TRUTH_TABLE(TTL_74156A_GATE, 4, 4, "") +{ + TT_HEAD("B,A,G,C|Y0,Y1,Y2,Y3") TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13") TT_LINE("X,X,0,0|1,1,1,1|13,13,13,13") TT_LINE("0,0,0,1|0,1,1,1|13,13,13,13") TT_LINE("0,1,0,1|1,0,1,1|13,13,13,13") TT_LINE("1,0,0,1|1,1,0,1|13,13,13,13") TT_LINE("1,1,0,1|1,1,1,0|13,13,13,13") - /* Open Collector */ + // Open Collector TT_FAMILY("74XXOC") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_74156B_GATE, 4, 4, "") - TT_HEAD("B,A,G,C|0,1,2,3") +static TRUTH_TABLE(TTL_74156B_GATE, 4, 4, "") +{ + TT_HEAD("B,A,G,C|Y0,Y1,Y2,Y3") TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13") TT_LINE("X,X,0,1|1,1,1,1|13,13,13,13") TT_LINE("0,0,0,0|0,1,1,1|13,13,13,13") TT_LINE("0,1,0,0|1,0,1,1|13,13,13,13") TT_LINE("1,0,0,0|1,1,0,1|13,13,13,13") TT_LINE("1,1,0,0|1,1,1,0|13,13,13,13") - /* Open Collector */ + // Open Collector TT_FAMILY("74XXOC") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_74157_GATE, 4, 4, "") +static TRUTH_TABLE(TTL_74157_GATE, 4, 4, "") +{ TT_HEAD("E,S,I,J|O") TT_LINE("1,X,X,X|0|14") TT_LINE("0,1,X,0|0|14") @@ -3110,9 +3218,10 @@ static TRUTHTABLE_START(TTL_74157_GATE, 4, 4, "") TT_LINE("0,0,0,X|0|14") TT_LINE("0,0,1,X|1|14") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_74260_NOR, 5, 1, "+A,+B,+C,+D,+E,@VCC,@GND") +static TRUTH_TABLE(TTL_74260_NOR, 5, 1, "+A,+B,+C,+D,+E,@VCC,@GND") +{ TT_HEAD("A,B,C,D,E|Q") TT_LINE("0,0,0,0,0|1|10") TT_LINE("X,X,X,X,1|0|12") @@ -3121,19 +3230,21 @@ static TRUTHTABLE_START(TTL_74260_NOR, 5, 1, "+A,+B,+C,+D,+E,@VCC,@GND") TT_LINE("X,1,X,X,X|0|12") TT_LINE("1,X,X,X,X|0|12") TT_FAMILY("74XX") -TRUTHTABLE_END() +} // FIXME: We need "private" devices -static TRUTHTABLE_START(TTL_74279A, 3, 1, "") +static TRUTH_TABLE(TTL_74279A, 3, 1, "") +{ TT_HEAD("S,R,_Q|Q") TT_LINE("0,X,X|1|22") TT_LINE("1,0,X|0|27") TT_LINE("1,1,0|0|27") TT_LINE("1,1,1|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_74279B, 4, 1, "") +static TRUTH_TABLE(TTL_74279B, 4, 1, "") +{ TT_HEAD("S1,S2,R,_Q|Q") TT_LINE("0,X,X,X|1|22") TT_LINE("X,0,X,X|1|22") @@ -3141,9 +3252,10 @@ static TRUTHTABLE_START(TTL_74279B, 4, 1, "") TT_LINE("1,1,1,0|0|27") TT_LINE("1,1,1,1|1|22") TT_FAMILY("74XX") -TRUTHTABLE_END() +} -static TRUTHTABLE_START(TTL_9312, 12, 2, "+A,+B,+C,+G,+D0,+D1,+D2,+D3,+D4,+D5,+D6,+D7,@VCC,@GND") +static TRUTH_TABLE(TTL_9312, 12, 2, + "+A,+B,+C,+G,+D0,+D1,+D2,+D3,+D4,+D5,+D6,+D7,@VCC,@GND") { TT_HEAD(" C, B, A, G,D0,D1,D2,D3,D4,D5,D6,D7| Y,YQ") TT_LINE(" X, X, X, 1, X, X, X, X, X, X, X, X| 0, 1|33,19") @@ -3165,13 +3277,17 @@ static TRUTHTABLE_START(TTL_9312, 12, 2, "+A,+B,+C,+G,+D0,+D1,+D2,+D3,+D4,+D5,+D TT_LINE(" 1, 1, 1, 0, X, X, X, X, X, X, X, 1| 1, 0|33,28") TT_FAMILY("74XX") } -TRUTHTABLE_END() NETLIST_START(ttl74xx_lib) - NET_MODEL("DM7414 SCHMITT_TRIGGER(VTP=1.7 VTM=0.9 VI=4.35 RI=6.15k VOH=3.5 ROH=120 VOL=0.1 ROL=37.5 TPLH=15 TPHL=15)") - NET_MODEL("TTL_7414_GATE SCHMITT_TRIGGER(VTP=1.7 VTM=0.9 VI=4.35 RI=6.15k VOH=3.5 ROH=120 VOL=0.1 ROL=37.5 TPLH=15 TPHL=15)") - NET_MODEL("DM74LS14 SCHMITT_TRIGGER(VTP=1.6 VTM=0.8 VI=4.4 RI=19.3k VOH=3.45 ROH=130 VOL=0.1 ROL=31.2 TPLH=15 TPHL=15)") - //NET_MODEL("DM7414 FAMILY(IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 ORH=1.0e8)") +{ + NET_MODEL( + "DM7414 SCHMITT_TRIGGER(VTP=1.7 VTM=0.9 VI=4.35 RI=6.15k VOH=3.5 ROH=120 VOL=0.1 ROL=37.5 TPLH=15 TPHL=15)") + NET_MODEL( + "TTL_7414_GATE SCHMITT_TRIGGER(VTP=1.7 VTM=0.9 VI=4.35 RI=6.15k VOH=3.5 ROH=120 VOL=0.1 ROL=37.5 TPLH=15 TPHL=15)") + NET_MODEL( + "DM74LS14 SCHMITT_TRIGGER(VTP=1.6 VTM=0.8 VI=4.4 RI=19.3k VOH=3.45 ROH=130 VOL=0.1 ROL=31.2 TPLH=15 TPHL=15)") + // NET_MODEL("DM7414 FAMILY(IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 + // ORH=1.0e8)") TRUTHTABLE_ENTRY(TTL_7400_NAND) TRUTHTABLE_ENTRY(TTL_7402_NOR) @@ -3287,4 +3403,4 @@ NETLIST_START(ttl74xx_lib) LOCAL_LIB_ENTRY(TTL_9334_DIP) LOCAL_LIB_ENTRY(TTL_8277_DIP) LOCAL_LIB_ENTRY(TTL_AM2847_DIP) -NETLIST_END() +} diff --git a/src/lib/netlist/nl_base.cpp b/src/lib/netlist/nl_base.cpp index 96790951b33..57f1de4291d 100644 --- a/src/lib/netlist/nl_base.cpp +++ b/src/lib/netlist/nl_base.cpp @@ -50,7 +50,7 @@ namespace netlist // ------------------------------------------------------------------------- detail::device_object_t::device_object_t(core_device_t *dev, - const pstring & aname) + const pstring &aname) : object_t(aname) , m_device(dev) { @@ -90,13 +90,14 @@ namespace netlist , m_time(netlist_time_ext::zero()) , m_main_clock(nullptr) , m_use_stats(false) - , m_queue(state.pool(), config::max_queue_size::value, + , m_queue( + state.pool(), config::max_queue_size::value, detail::queue_t::id_delegate(&netlist_state_t ::find_net_id, &state), detail::queue_t::obj_delegate(&netlist_state_t ::net_by_id, &state)) { state.save(*this, - static_cast(m_queue), aname, - "m_queue"); + static_cast(m_queue), + aname, "m_queue"); state.save(*this, m_time, aname, "m_time"); } @@ -136,21 +137,21 @@ namespace netlist if (m_use_stats) { netlist_state_t::stats_info si{m_queue, m_stat_mainloop, - m_perf_out_processed}; + m_perf_out_processed}; m_state.print_stats(si); } log().verbose("Current pool memory allocated: {1:12} kB", - nl_state().pool().cur_alloc() >> 10); + nl_state().pool().cur_alloc() >> 10); log().verbose("Maximum pool memory allocated: {1:12} kB", - nl_state().pool().max_alloc() >> 10); + nl_state().pool().max_alloc() >> 10); } // ------------------------------------------------------------------------- // netlist_state_t // ------------------------------------------------------------------------- - netlist_state_t::netlist_state_t(const pstring &name, - plib::plog_delegate logger) + netlist_state_t::netlist_state_t(const pstring & name, + plib::plog_delegate logger) : m_log(logger) , m_dummy_version(1) { @@ -181,8 +182,8 @@ namespace netlist // This is for core macro libraries m_setup->parser().add_include("devices/net_lib.h", - content); -#if 1 + content); +#if 0 NETLIST_NAME(base_lib)(m_setup->parser()); //#m_setup->parser().register_source("../macro/modules/nlmod_{1}.cpp"); //#m_setup->parser().register_source("../macro/nlm_{1}.cpp"); @@ -200,12 +201,12 @@ namespace netlist // FIXME: This is very slow - need optimized parsing scanning pstring dir = "src/lib/netlist/macro/"; // m_setup->parser().register_source("src/lib/netlist/macro/nlm_{}.cpp"); - m_setup->parser().register_source( - dir + "nlm_base_lib.cpp"); - m_setup->parser().register_source( - dir + "nlm_opamp_lib.cpp"); - m_setup->parser().register_source( - dir + "nlm_roms_lib.cpp"); + m_setup->parser().register_source(dir + + "nlm_base_lib.cpp"); + m_setup->parser().register_source(dir + + "nlm_opamp_lib.cpp"); + m_setup->parser().register_source(dir + + "nlm_roms_lib.cpp"); m_setup->parser().register_source( dir + "nlm_cd4xxx_lib.cpp"); m_setup->parser().register_source( @@ -333,7 +334,7 @@ namespace netlist pstring netlist_state_t::version_patchlevel() { return plib::pfmt("{1}.{2}.{3}")(NL_VERSION_MAJOR, NL_VERSION_MINOR, - NL_VERSION_PATCHLEVEL); + NL_VERSION_PATCHLEVEL); } void netlist_state_t::free_setup_resources() { m_setup = nullptr; } @@ -398,12 +399,12 @@ namespace netlist log().verbose("Devices not yet updated:"); for (auto &dev : m_devices) if (!plib::container::contains(devices_called, - dev.second.get())) + dev.second.get())) { // FIXME: doesn't seem to be needed, use cases include // analog output devices. Check and remove log().error("\t Device {1} not yet updated", - dev.second->name()); + dev.second->name()); // dev.second->update(); } } @@ -421,15 +422,15 @@ namespace netlist index.push_back(i); std::sort(index.begin(), index.end(), - [&](size_t i1, size_t i2) - { - return this->m_devices[i1] - .second->stats() - ->m_stat_total_time.total() - < this->m_devices[i2] - .second->stats() - ->m_stat_total_time.total(); - }); + [&](size_t i1, size_t i2) + { + return this->m_devices[i1] + .second->stats() + ->m_stat_total_time.total() + < this->m_devices[i2] + .second->stats() + ->m_stat_total_time.total(); + }); plib::pperftime_t::type total_time(0); plib::pperftime_t::ctype total_count(0); @@ -438,19 +439,19 @@ namespace netlist { auto *entry = this->m_devices[j].second.get(); auto *stats = entry->stats(); - log().verbose("Device {1:20} : {2:12} {3:12} {4:15} {5:12}", - entry->name(), stats->m_stat_call_count(), - stats->m_stat_total_time.count(), + log().verbose( + "Device {1:20} : {2:12} {3:12} {4:15} {5:12}", entry->name(), + stats->m_stat_call_count(), stats->m_stat_total_time.count(), stats->m_stat_total_time.total(), stats->m_stat_inc_active()); total_time += stats->m_stat_total_time.total(); total_count += stats->m_stat_total_time.count(); } log().verbose("Total calls : {1:12} {2:12} {3:12}", total_count, - total_time, - total_time - / gsl::narrow( - (total_count > 0) ? total_count : 1)); + total_time, + total_time + / gsl::narrow( + (total_count > 0) ? total_count : 1)); log().verbose("Total loop {1:15}", si.m_stat_mainloop()); log().verbose("Total time {1:15}", total_time); @@ -479,7 +480,7 @@ namespace netlist log().verbose("Queue Pushes {1:15}", si.m_queue.m_prof_call()); log().verbose("Queue Moves {1:15}", - si.m_queue.m_prof_sort_move()); + si.m_queue.m_prof_sort_move()); log().verbose("Queue Removes {1:15}", si.m_queue.m_prof_remove()); log().verbose(""); @@ -488,7 +489,7 @@ namespace netlist log().verbose("Total overhead {1:15}", total_overhead); plib::pperftime_t::type overhead_per_pop = (si.m_stat_mainloop() - 2 * total_overhead - - (total_time - total_overhead)) + - (total_time - total_overhead)) / gsl::narrow::type>( si.m_queue.m_prof_call()); log().verbose("Overhead per pop {1:11}", overhead_per_pop); @@ -505,17 +506,18 @@ namespace netlist > 3 * stats->m_stat_total_time.count() && stats->m_stat_inc_active() > trigger) log().verbose("HINT({}, NO_DEACTIVATE) // {} {} {}", ep->name(), - gsl::narrow(stats->m_stat_inc_active()) - / gsl::narrow( - stats->m_stat_total_time.count()), - stats->m_stat_inc_active(), - stats->m_stat_total_time.count()); + gsl::narrow(stats->m_stat_inc_active()) + / gsl::narrow( + stats->m_stat_total_time.count()), + stats->m_stat_inc_active(), + stats->m_stat_total_time.count()); } log().verbose(""); } - core_device_t *netlist_state_t::get_single_device(const pstring &classname, - bool (*cc)(core_device_t *)) const + core_device_t * + netlist_state_t::get_single_device(const pstring &classname, + bool (*cc)(core_device_t *)) const { core_device_t *ret = nullptr; for (const auto &d : m_devices) @@ -575,35 +577,37 @@ namespace netlist { } - void base_device_t::register_sub_alias(const pstring &name, - const detail::core_terminal_t & term) + void base_device_t::register_sub_alias(const pstring & name, + const detail::core_terminal_t &term) { pstring alias = this->name() + "." + name; // everything already fully qualified - state().parser().register_alias_no_fqn(alias, term.name()); + state().parser().register_fqn_alias(detail::alias_type::FUNCTIONAL, + alias, term.name()); } void base_device_t::register_sub_alias(const pstring &name, - const pstring & aliased) + const pstring &aliased) { pstring alias = this->name() + "." + name; pstring aliased_fqn = this->name() + "." + aliased; // everything already fully qualified - state().parser().register_alias_no_fqn(alias, aliased_fqn); + state().parser().register_fqn_alias(detail::alias_type::FUNCTIONAL, + alias, aliased_fqn); } void base_device_t::connect(const detail::core_terminal_t &t1, - const detail::core_terminal_t & t2) + const detail::core_terminal_t &t2) { - state().parser().register_link_fqn(t1.name(), t2.name()); + state().parser().register_connection_fqn(t1.name(), t2.name()); } void base_device_t::connect(const pstring &t1, const pstring &t2) { - state().parser().register_link_fqn(name() + "." + t1, - name() + "." + t2); + state().parser().register_connection_fqn(name() + "." + t1, + name() + "." + t2); } // ------------------------------------------------------------------------- @@ -634,8 +638,8 @@ namespace netlist { set_logic_family(desc); if (logic_family() == nullptr) - throw nl_exception(MF_NULLPTR_FAMILY(this->name(), - "")); + throw nl_exception(MF_NULLPTR_FAMILY( + this->name(), "")); } // ------------------------------------------------------------------------- @@ -643,7 +647,7 @@ namespace netlist // ------------------------------------------------------------------------- analog_t::analog_t(core_device_t &dev, const pstring &aname, - const state_e state, nl_delegate delegate) + const state_e state, nl_delegate delegate) : core_terminal_t(dev, aname, state, delegate) { } @@ -653,7 +657,7 @@ namespace netlist // ------------------------------------------------------------------------- detail::net_t::net_t(netlist_state_t &nl, const pstring &aname, - core_terminal_t *rail_terminal) + core_terminal_t *rail_terminal) : netlist_object_t(nl.exec(), aname) , m_new_Q(*this, "m_new_Q", netlist_sig_t(0)) , m_cur_Q(*this, "m_cur_Q", netlist_sig_t(0)) @@ -774,7 +778,7 @@ namespace netlist // ------------------------------------------------------------------------- logic_net_t::logic_net_t(netlist_state_t &nl, const pstring &aname, - detail::core_terminal_t *rail_terminal) + detail::core_terminal_t *rail_terminal) : net_t(nl, aname, rail_terminal) { } @@ -784,7 +788,7 @@ namespace netlist // ------------------------------------------------------------------------- analog_net_t::analog_net_t(netlist_state_t &nl, const pstring &aname, - detail::core_terminal_t *rail_terminal) + detail::core_terminal_t *rail_terminal) : net_t(nl, aname, rail_terminal) , m_cur_Analog(*this, "m_cur_Analog", nlconst::zero()) , m_solver(nullptr) @@ -802,7 +806,9 @@ namespace netlist // ------------------------------------------------------------------------- detail::core_terminal_t::core_terminal_t(core_device_t &dev, - const pstring &aname, const state_e state, nl_delegate delegate) + const pstring &aname, + const state_e state, + nl_delegate delegate) : device_object_t(&dev, dev.name() + "." + aname) , m_Q_CIR(*this, "m_Q", 0) , m_delegate(delegate) @@ -851,14 +857,15 @@ namespace netlist // ------------------------------------------------------------------------- terminal_t::terminal_t(core_device_t &dev, const pstring &aname, - terminal_t *other_terminal, nl_delegate delegate) + terminal_t *other_terminal, nl_delegate delegate) : terminal_t(dev, aname, other_terminal, {nullptr, nullptr}, delegate) { } terminal_t::terminal_t(core_device_t &dev, const pstring &aname, - terminal_t * other_terminal, - const std::array &splitter_terms, nl_delegate delegate) + terminal_t * other_terminal, + const std::array &splitter_terms, + nl_delegate delegate) : analog_t(dev, aname, STATE_BIDIR, delegate) , m_Idr(nullptr) , m_go(nullptr) @@ -868,7 +875,7 @@ namespace netlist } void terminal_t::set_ptrs(nl_fptype *gt, nl_fptype *go, - nl_fptype *Idr) noexcept(false) + nl_fptype *Idr) noexcept(false) { // NOLINTNEXTLINE(readability-implicit-bool-conversion) if (!(gt && go && Idr) && (gt || go || Idr)) @@ -888,7 +895,7 @@ namespace netlist // ------------------------------------------------------------------------- logic_t::logic_t(device_t &dev, const pstring &aname, - const state_e terminal_state, nl_delegate delegate) + const state_e terminal_state, nl_delegate delegate) : core_terminal_t(dev, aname, terminal_state, delegate) , logic_family_t(dev.logic_family()) { @@ -899,7 +906,7 @@ namespace netlist // ------------------------------------------------------------------------- logic_input_t::logic_input_t(device_t &dev, const pstring &aname, - nl_delegate delegate) + nl_delegate delegate) : logic_t(dev, aname, STATE_INP_ACTIVE, delegate) { state().setup().register_term(*this); @@ -910,7 +917,7 @@ namespace netlist // ------------------------------------------------------------------------- logic_output_t::logic_output_t(device_t &dev, const pstring &aname, - [[maybe_unused]] bool dummy) + [[maybe_unused]] bool dummy) : logic_t(dev, aname, STATE_OUT, nl_delegate()) , m_my_net(dev.state(), name() + ".net", this) { @@ -931,11 +938,11 @@ namespace netlist // ------------------------------------------------------------------------- tristate_output_t::tristate_output_t(device_t &dev, const pstring &aname, - bool force_logic) + bool force_logic) : logic_output_t(dev, aname) , m_last_logic(dev, name() + "." + "m_last_logic", 1) // force change , m_tristate(dev, name() + "." + "m_tristate", - force_logic ? 0 : 2) // force change + force_logic ? 0 : 2) // force change , m_force_logic(force_logic) { } @@ -945,7 +952,7 @@ namespace netlist // ------------------------------------------------------------------------- analog_input_t::analog_input_t(core_device_t &dev, const pstring &aname, - nl_delegate delegate) + nl_delegate delegate) : analog_t(dev, aname, STATE_INP_ACTIVE, delegate) { state().setup().register_term(*this); @@ -1011,22 +1018,22 @@ namespace netlist pstring param_t::get_initial(const core_device_t *dev, bool *found) const { pstring res = dev->state().setup().get_initial_param_val(this->name(), - ""); + ""); *found = (!res.empty()); return res; } param_str_t::param_str_t(core_device_t &device, const pstring &name, - const pstring &val) + const pstring &val) : param_t(device, name) { m_param = plib::make_unique(val); *m_param = device.state().setup().get_initial_param_val(this->name(), - val); + val); } param_str_t::param_str_t(netlist_state_t &state, const pstring &name, - const pstring &val) + const pstring &val) : param_t(name) { // device-less parameter, no registration, owner is responsible @@ -1037,7 +1044,7 @@ namespace netlist void param_str_t::changed() noexcept {} param_ptr_t::param_ptr_t(core_device_t &device, const pstring &name, - uint8_t *val) + uint8_t *val) : param_t(device, name) , m_param(val) { diff --git a/src/lib/netlist/nl_create_mame_solvers.sh b/src/lib/netlist/nl_create_mame_solvers.sh index 58351e52d47..25826efaed3 100644 --- a/src/lib/netlist/nl_create_mame_solvers.sh +++ b/src/lib/netlist/nl_create_mame_solvers.sh @@ -1,7 +1,7 @@ #!/bin/sh GENERATED=src/lib/netlist/generated/static_solvers.cpp -FILES=`ls src/mame/machine/nl_*.cpp src/mame/audio/nl_*.cpp | grep -v pongdoubles` +FILES=`find src/mame -name "nl_*.cpp" | grep -v pongdoubles` OUTDIR=/tmp/static_syms diff --git a/src/lib/netlist/nl_dice_compat.h b/src/lib/netlist/nl_dice_compat.h index 165c5e9eb7a..3088829b5f9 100644 --- a/src/lib/netlist/nl_dice_compat.h +++ b/src/lib/netlist/nl_dice_compat.h @@ -55,8 +55,8 @@ sed -e 's/#define \(.*\)"\(.*\)"[ \t]*,[ \t]*\(.*\)/NET_ALIAS(\1,\2.\3)/' src/ma #define CONNECTION( ... ) CONNECTIONY( CONNECTIONX( __VA_ARGS__ ) ) #define CONNECTIONY(a) a -#define CONNECTIONX(a, b, c, d) setup.register_link(a "." # b, c "." # d); -#define NET_CSTR(a, b) setup.register_link( a, b); +#define CONNECTIONX(a, b, c, d) setup.register_connection(a "." # b, c "." # d); +#define NET_CSTR(a, b) setup.register_connection( a, b); #define OHM(x) (x) #define K_OHM(x) ((x) * 1000.0) @@ -117,8 +117,9 @@ public: #endif -#define CIRCUIT_LAYOUT(x) NETLIST_START(x) -#define CIRCUIT_LAYOUT_END NETLIST_END() +#define CIRCUIT_LAYOUT(x) NETLIST_START(x) { + +#define CIRCUIT_LAYOUT_END } #define CHIP_555_Mono(name, pdesc) \ NE555_DIP(name) \ diff --git a/src/lib/netlist/nl_factory.h b/src/lib/netlist/nl_factory.h index 0141a168c2c..ed4eb276c1f 100644 --- a/src/lib/netlist/nl_factory.h +++ b/src/lib/netlist/nl_factory.h @@ -114,9 +114,9 @@ namespace netlist::factory element_type type() const noexcept { return m_properties.type(); } private: - pstring m_name; ///< device name - properties m_properties; ///< source file and other information and - ///< settings + pstring m_name; //!< device name + properties m_properties; //!< source file and other information and + //!< settings }; template diff --git a/src/lib/netlist/nl_parser.cpp b/src/lib/netlist/nl_parser.cpp index 3e4ecd0937c..4d4638bea21 100644 --- a/src/lib/netlist/nl_parser.cpp +++ b/src/lib/netlist/nl_parser.cpp @@ -33,6 +33,8 @@ namespace netlist .comment("/*", "*/", "//"); m_tok_paren_left = m_tokenizer.register_token("("); m_tok_paren_right = m_tokenizer.register_token(")"); + m_tok_brace_left = m_tokenizer.register_token("{"); + m_tok_brace_right = m_tokenizer.register_token("}"); m_tok_comma = m_tokenizer.register_token(","); m_tok_static = m_tokenizer.register_token("static"); @@ -52,11 +54,9 @@ namespace netlist "EXTERNAL_LIB_ENTRY"); m_tok_SUBMODEL = m_tokenizer.register_token("SUBMODEL"); m_tok_NETLIST_START = m_tokenizer.register_token("NETLIST_START"); - m_tok_NETLIST_END = m_tokenizer.register_token("NETLIST_END"); m_tok_NETLIST_EXTERNAL = m_tokenizer.register_token("NETLIST_EXTERNAL"); m_tok_EXTERNAL_SOURCE = m_tokenizer.register_token("EXTERNAL_SOURCE"); - m_tok_TRUTHTABLE_START = m_tokenizer.register_token("TRUTHTABLE_START"); - m_tok_TRUTHTABLE_END = m_tokenizer.register_token("TRUTHTABLE_END"); + m_tok_TRUTH_TABLE = m_tokenizer.register_token("TRUTH_TABLE"); m_tok_TRUTHTABLE_ENTRY = m_tokenizer.register_token("TRUTHTABLE_ENTRY"); m_tok_TT_HEAD = m_tokenizer.register_token("TT_HEAD"); m_tok_TT_LINE = m_tokenizer.register_token("TT_LINE"); @@ -77,8 +77,8 @@ namespace netlist return parse(tokstor, nlname); } - void parser_t::parse_tokens(plib::istream_uptr &&strm, - token_store_t & tokstor) + void + parser_t::parse_tokens(plib::istream_uptr &&strm, token_store_t &tokstor) { plib::putf8_reader u8reader(strm.release_stream()); m_tokenizer.append_to_store(&u8reader, tokstor); @@ -100,23 +100,16 @@ namespace netlist return false; } - if (token.is(m_tok_NETLIST_END) || token.is(m_tok_TRUTHTABLE_END)) + if (token.is(m_tok_brace_right)) // Netlist ended? { if (!in_nl) error(MF_PARSER_UNEXPECTED_1(token.str())); else - { in_nl = false; - } - require_token(m_tok_paren_left); - require_token(m_tok_paren_right); - m_cur_local->push_back(token); - m_cur_local->push_back(token_t(m_tok_paren_left)); - m_cur_local->push_back(token_t(m_tok_paren_right)); } else if (token.is(m_tok_NETLIST_START) - || token.is(m_tok_TRUTHTABLE_START)) + || token.is(m_tok_TRUTH_TABLE)) { if (in_nl) error(MF_PARSER_UNEXPECTED_1(token.str())); @@ -125,22 +118,24 @@ namespace netlist if (token.is(m_tok_NETLIST_START) && (name.str() == nlname || nlname.empty())) { - require_token(m_tok_paren_right); parse_netlist(); return true; } - if (token.is(m_tok_TRUTHTABLE_START) && name.str() == nlname) + if (token.is(m_tok_TRUTH_TABLE)) { - net_truth_table_start(nlname); - return true; + if (name.str() == nlname) + { + net_truth_table_start(nlname); + return true; + } } // create a new cached local store m_local.emplace(name.str(), token_store_t()); m_cur_local = &m_local[name.str()]; auto sl = location(); - auto li = plib::pfmt( - "# {1} \"{2}\"")(sl.line(), sl.file_name()); + auto li = plib::pfmt("# {1} \"{2}\"")(sl.line(), + sl.file_name()); m_cur_local->push_back(token_t(token_type::LINEMARKER, li)); m_cur_local->push_back(token); @@ -149,6 +144,14 @@ namespace netlist // m_cur_local->push_back(token_t(m_tok_paren_right)); in_nl = true; } + else if (token.is(m_tok_brace_left)) + { + // FIXME - do nothing for now + if (!in_nl) + printf("FIXME\n"); + else + m_cur_local->push_back(token); + } // FIXME: do we really need this going forward ? there should be no // need // for NETLIST_EXTERNAL in netlist files @@ -176,6 +179,9 @@ namespace netlist void parser_t::parse_netlist() { + require_token(m_tok_paren_right); + require_token(m_tok_brace_left); + while (true) { token_t token = get_token(); @@ -222,14 +228,9 @@ namespace netlist require_token(m_tok_paren_right); } else if (token.is(m_tok_NET_REGISTER_DEV)) - { net_register_dev(); - } - else if (token.is(m_tok_NETLIST_END)) - { - netdev_netlist_end(); + else if (token.is(m_tok_brace_right)) return; - } else if (!token.is_type(token_type::IDENTIFIER)) error(MF_EXPECTED_IDENTIFIER_GOT_1(token.str())); else @@ -265,6 +266,7 @@ namespace netlist require_token(m_tok_comma); pstring def_param = get_string(); require_token(m_tok_paren_right); + require_token(m_tok_brace_left); netlist::tt_desc desc; desc.name = nlname; @@ -299,9 +301,7 @@ namespace netlist } else { - require_token(token, m_tok_TRUTHTABLE_END); - require_token(m_tok_paren_left); - require_token(m_tok_paren_right); + require_token(token, m_tok_brace_right); // FIXME: proper location m_setup.truth_table_create(desc, def_param, location()); return; @@ -309,13 +309,6 @@ namespace netlist } } - void parser_t::netdev_netlist_end() - { - // don't do much - require_token(m_tok_paren_left); - require_token(m_tok_paren_right); - } - void parser_t::net_model() { require_token(m_tok_paren_left); @@ -413,7 +406,7 @@ namespace netlist while (true) { pstring t1 = get_identifier(); - m_setup.register_link(first, t1); + m_setup.register_connection(first, t1); m_setup.log().debug("Parser: Connect: {1} {2}\n", first, t1); token_t n = get_token(); if (n.is(m_tok_paren_right)) @@ -446,8 +439,10 @@ namespace netlist std::size_t n = pins.size(); for (std::size_t i = 0; i < n / 2; i++) { - m_setup.register_alias(plib::pfmt("{1}")(i + 1), pins[i * 2]); - m_setup.register_alias(plib::pfmt("{1}")(n - i), pins[i * 2 + 1]); + m_setup.register_alias(detail::alias_type::PACKAGE_PIN, + plib::pfmt("{1}")(i + 1), pins[i * 2]); + m_setup.register_alias(detail::alias_type::PACKAGE_PIN, + plib::pfmt("{1}")(n - i), pins[i * 2 + 1]); } } @@ -481,7 +476,7 @@ namespace netlist if (tok.is_type(token_type::STRING)) { m_setup.log().debug("Parser: DefParam: {1} {2}\n", param, - tok.str()); + tok.str()); m_setup.register_default_param(param, tok.str()); require_token(m_tok_paren_right); } @@ -584,8 +579,8 @@ namespace netlist return false; } - plib::istream_uptr source_token_t::stream( - [[maybe_unused]] const pstring &name) + plib::istream_uptr + source_token_t::stream([[maybe_unused]] const pstring &name) { return plib::istream_uptr(); } diff --git a/src/lib/netlist/nl_parser.h b/src/lib/netlist/nl_parser.h index 87997866e32..a17780dcff6 100644 --- a/src/lib/netlist/nl_parser.h +++ b/src/lib/netlist/nl_parser.h @@ -42,7 +42,6 @@ namespace netlist void net_c(); void frontier(); void device(const pstring &dev_type); - void netdev_netlist_end(); void net_model(); void net_sub_model(); void net_include(); @@ -61,6 +60,8 @@ namespace netlist token_id_t m_tok_paren_left; token_id_t m_tok_paren_right; + token_id_t m_tok_brace_left; + token_id_t m_tok_brace_right; token_id_t m_tok_comma; token_id_t m_tok_static; token_id_t m_tok_ALIAS; @@ -73,7 +74,6 @@ namespace netlist token_id_t m_tok_NET_MODEL; token_id_t m_tok_NET_REGISTER_DEV; token_id_t m_tok_NETLIST_START; - token_id_t m_tok_NETLIST_END; token_id_t m_tok_NETLIST_EXTERNAL; token_id_t m_tok_SUBMODEL; token_id_t m_tok_INCLUDE; @@ -81,8 +81,7 @@ namespace netlist token_id_t m_tok_LOCAL_SOURCE; token_id_t m_tok_LOCAL_LIB_ENTRY; token_id_t m_tok_EXTERNAL_LIB_ENTRY; - token_id_t m_tok_TRUTHTABLE_START; - token_id_t m_tok_TRUTHTABLE_END; + token_id_t m_tok_TRUTH_TABLE; token_id_t m_tok_TRUTHTABLE_ENTRY; token_id_t m_tok_TT_HEAD; token_id_t m_tok_TT_LINE; diff --git a/src/lib/netlist/nl_setup.cpp b/src/lib/netlist/nl_setup.cpp index 19ed531b853..30393603daa 100644 --- a/src/lib/netlist/nl_setup.cpp +++ b/src/lib/netlist/nl_setup.cpp @@ -36,11 +36,40 @@ namespace netlist { } - void nlparse_t::register_alias(const pstring &alias, const pstring &out) + void + nlparse_t::register_fqn_alias(detail::alias_type type, const pstring &alias, + const pstring &points_to) + { + if (!m_abstract.m_aliases + .insert({alias, detail::alias_t(type, alias, points_to)}) + .second) + { + log().fatal(MF_ALIAS_ALREAD_EXISTS_1(alias)); + throw nl_exception(MF_ALIAS_ALREAD_EXISTS_1(alias)); + } + } + + void + nlparse_t::register_alias(const pstring &alias, const pstring &points_to) + { + detail::alias_type type = detail::alias_type::PACKAGE_PIN; + for (auto &c : alias) + if (c < '0' || c > '9') + { + type = detail::alias_type::READABILITY; + break; + } + + register_alias(type, alias, points_to); + } + + void + nlparse_t::register_alias(detail::alias_type type, const pstring &alias, + const pstring &points_to) { pstring alias_fqn = build_fqn(alias); - pstring out_fqn = build_fqn(out); - register_alias_no_fqn(alias_fqn, out_fqn); + pstring points_to_fqn = build_fqn(points_to); + register_fqn_alias(type, alias_fqn, points_to_fqn); } void nlparse_t::register_dip_alias_arr(const pstring &terms) @@ -56,8 +85,10 @@ namespace netlist std::size_t n = list.size(); for (std::size_t i = 0; i < n / 2; i++) { - register_alias(plib::pfmt("{1}")(i + 1), list[i * 2]); - register_alias(plib::pfmt("{1}")(n - i), list[i * 2 + 1]); + register_alias(detail::alias_type::PACKAGE_PIN, + plib::pfmt("{1}")(i + 1), list[i * 2]); + register_alias(detail::alias_type::PACKAGE_PIN, + plib::pfmt("{1}")(n - i), list[i * 2 + 1]); } } @@ -126,7 +157,7 @@ namespace netlist pstring output_name = *token_ptr; log().debug("Link: {1} {2}", tp, output_name); - register_link(name + "." + tp.substr(1), output_name); + register_connection(name + "." + tp.substr(1), output_name); ++token_ptr; } else if (plib::startsWith(tp, "@")) @@ -134,7 +165,7 @@ namespace netlist pstring term = tp.substr(1); log().debug("Link: {1} {2}", tp, term); - register_link(name + "." + term, term); + register_connection(name + "." + term, term); } else { @@ -178,13 +209,13 @@ namespace netlist } } - void nlparse_t::register_link(const pstring &sin, const pstring &sout) + void nlparse_t::register_connection(const pstring &sin, const pstring &sout) { - register_link_fqn(build_fqn(plib::trim(sin)), - build_fqn(plib::trim(sout))); + register_connection_fqn(build_fqn(plib::trim(sin)), + build_fqn(plib::trim(sout))); } - void nlparse_t::register_link_arr(const pstring &terms) + void nlparse_t::register_connection_arr(const pstring &terms) { const auto list(plib::psplit(terms, pstring(", "))); if (list.size() < 2) @@ -194,7 +225,7 @@ namespace netlist } for (std::size_t i = 1; i < list.size(); i++) { - register_link(list[0], list[i]); + register_connection(list[0], list[i]); } } @@ -301,11 +332,11 @@ namespace netlist register_dev("FRONTIER_DEV", frontier_name); register_param(frontier_name + ".RIN", r_IN); register_param(frontier_name + ".ROUT", r_OUT); - register_link(frontier_name + ".G", "GND"); + register_connection(frontier_name + ".G", "GND"); pstring attach_fully_qualified_name = build_fqn(attach); pstring front_fqn = build_fqn(frontier_name); bool found = false; - for (auto &link : m_abstract.m_links) + for (auto &link : m_abstract.m_connections) { if (link.first == attach_fully_qualified_name) { @@ -323,7 +354,7 @@ namespace netlist log().fatal(MF_FOUND_NO_OCCURRENCE_OF_1(attach)); throw nl_exception(MF_FOUND_NO_OCCURRENCE_OF_1(attach)); } - register_link(attach, frontier_name + ".Q"); + register_connection(attach, frontier_name + ".Q"); } void nlparse_t::register_source_proc(const pstring &name, nlsetup_func func) @@ -350,20 +381,11 @@ namespace netlist } void - nlparse_t::register_alias_no_fqn(const pstring &alias, const pstring &out) + nlparse_t::register_connection_fqn(const pstring &sin, const pstring &sout) { - if (!m_abstract.m_alias.insert({alias, out}).second) - { - log().fatal(MF_ALIAS_ALREAD_EXISTS_1(alias)); - throw nl_exception(MF_ALIAS_ALREAD_EXISTS_1(alias)); - } - } - - void nlparse_t::register_link_fqn(const pstring &sin, const pstring &sout) - { - detail::abstract_t::link_t temp(sin, sout); + detail::abstract_t::connection_t temp(sin, sout); log().debug("link {1} <== {2}", sin, sout); - m_abstract.m_links.push_back(temp); + m_abstract.m_connections.push_back(temp); } bool nlparse_t::device_exists(const pstring &name) const @@ -433,7 +455,7 @@ namespace netlist pstring name = "log_" + ll; register_dev("LOG", name); - register_link(name + ".I", ll); + register_connection(name + ".I", ll); } } @@ -443,15 +465,15 @@ namespace netlist pstring pin_fully_qualified_name = build_fqn(pin); bool found = false; - for (auto link = m_abstract.m_links.begin(); - link != m_abstract.m_links.end();) + for (auto link = m_abstract.m_connections.begin(); + link != m_abstract.m_connections.end();) { if ((link->first == pin_fully_qualified_name) || (link->second == pin_fully_qualified_name)) { log().verbose("removing connection: {1} <==> {2}\n", link->first, link->second); - link = m_abstract.m_links.erase(link); + link = m_abstract.m_connections.erase(link); found = true; } else @@ -610,8 +632,9 @@ namespace netlist do { ret = temp; - auto p = m_abstract.m_alias.find(ret); - temp = (p != m_abstract.m_alias.end() ? p->second : ""); + auto p = m_abstract.m_aliases.find(ret); + temp = (p != m_abstract.m_aliases.end() ? p->second.references() + : ""); } while (!temp.empty() && temp != ret); log().debug("{1}==>{2}\n", name, ret); @@ -628,10 +651,10 @@ namespace netlist { ret = temp; temp = ""; - for (const auto &e : m_abstract.m_alias) + for (const auto &e : m_abstract.m_aliases) { // FIXME: this will resolve first one found - if (e.second == ret) + if (e.second.references() == ret) { temp = e.first; break; @@ -657,7 +680,7 @@ namespace netlist } } - for (const auto &t : m_abstract.m_alias) + for (const auto &t : m_abstract.m_aliases) { if (plib::startsWith(t.first, devname)) { @@ -1175,6 +1198,7 @@ namespace netlist // // #include "netlist/devices/net_lib.h" // NETLIST_START(charge_discharge) +{ // SOLVER(solver, 48000) // Fixed frequency solver // CLOCK(I, 200) // 200 Hz clock as input, TTL logic output // RES(R, RES_K(1)) @@ -1185,7 +1209,7 @@ namespace netlist // NET_C(C.2, GND) // // ALIAS(O, R.2) // Output O == C.1 == R.2 - // // NETLIST_END() + // // } // // Just save the net list as /tmp/test1.cpp, run // ./nltool --cmd=run -t 0.05 -l O -l I /tmp/test1.cpp @@ -1193,10 +1217,10 @@ namespace netlist // // g++-7 (Ubuntu 7.4.0-1ubuntu1~16.04~ppa1) 7.4.0 // - while (!m_links.empty() && tries > 0) + while (!m_connections.empty() && tries > 0) { - auto li = m_links.begin(); - while (li != m_links.end()) + auto li = m_connections.begin(); + while (li != m_connections.end()) { const pstring t1s = li->first; const pstring t2s = li->second; @@ -1204,24 +1228,24 @@ namespace netlist detail::core_terminal_t *t2 = find_terminal(t2s); if (connect(*t1, *t2)) - li = m_links.erase(li); + li = m_connections.erase(li); else li++; } tries--; } #else - while (!m_abstract.m_links.empty() && tries > 0) + while (!m_abstract.m_connections.empty() && tries > 0) { - for (std::size_t i = 0; i < m_abstract.m_links.size();) + for (std::size_t i = 0; i < m_abstract.m_connections.size();) { - const pstring t1s(m_abstract.m_links[i].first); - const pstring t2s(m_abstract.m_links[i].second); + const pstring t1s(m_abstract.m_connections[i].first); + const pstring t2s(m_abstract.m_connections[i].second); detail::core_terminal_t *t1 = find_terminal(t1s); detail::core_terminal_t *t2 = find_terminal(t2s); if (connect(*t1, *t2)) - m_abstract.m_links.erase( - m_abstract.m_links.begin() + m_abstract.m_connections.erase( + m_abstract.m_connections.begin() + plib::narrow_cast(i)); else i++; @@ -1231,7 +1255,7 @@ namespace netlist #endif if (tries == 0) { - for (auto &link : m_abstract.m_links) + for (auto &link : m_abstract.m_connections) log().warning(MF_CONNECTING_1_TO_2(de_alias(link.first), de_alias(link.second))); diff --git a/src/lib/netlist/nl_setup.h b/src/lib/netlist/nl_setup.h index dad4f894375..7c5cc2e7930 100644 --- a/src/lib/netlist/nl_setup.h +++ b/src/lib/netlist/nl_setup.h @@ -49,7 +49,7 @@ setup.register_link(# name "." # input, # output); #define NET_C(term1, ...) \ - setup.register_link_arr( # term1 ", " # __VA_ARGS__); + setup.register_connection_arr( # term1 ", " # __VA_ARGS__); #define PARAM(name, val) \ setup.register_param(NET_STR(name), NET_STR(val)); @@ -70,9 +70,6 @@ #define NETLIST_START(name) \ void NETLIST_NAME(name)([[maybe_unused]] netlist::nlparse_t &setup) \ -{ \ - -#define NETLIST_END() } #define LOCAL_SOURCE(name) \ setup.register_source_proc(# name, &NETLIST_NAME(name)); @@ -110,22 +107,27 @@ void NETLIST_NAME(name)([[maybe_unused]] netlist::nlparse_t &setup) \ #if 0 #define TRUTHTABLE_START(cname, in, out, pdef_params) \ void NETLIST_NAME(cname ## _impl)(netlist::tt_desc &desc); \ - static NETLIST_START(cname) \ + static NETLIST_START(cname) +{ \ netlist::tt_desc xdesc{ #cname, in, out, "" }; \ auto sloc = PSOURCELOC(); \ const pstring def_params = pdef_params; \ NETLIST_NAME(cname ## _impl)(xdesc); \ setup.truth_table_create(xdesc, def_params, std::move(sloc)); \ - NETLIST_END() \ + } \ static void NETLIST_NAME(cname ## _impl)(netlist::tt_desc &desc) \ { #else -#define TRUTHTABLE_START(cname, in, out, pdef_params) \ - NETLIST_START(cname) \ - netlist::tt_desc desc{ #cname, in, out, "", {} }; \ - auto sloc = PSOURCELOC(); \ - const pstring def_params = pdef_params; \ - plib::functor_guard lg([&](){ setup.truth_table_create(desc, def_params, std::move(sloc)); }); +#define TRUTH_TABLE(cname, in, out, pdef_params) \ + void NETLIST_NAME(cname ## _impl)(netlist::nlparse_t &setup, netlist::tt_desc &desc); \ + static void NETLIST_NAME(cname)(netlist::nlparse_t &setup) \ + { \ + netlist::tt_desc desc{ #cname, in, out, "", {} }; \ + NETLIST_NAME(cname ## _impl)(setup, desc); \ + setup.truth_table_create(desc, pdef_params, PSOURCELOC()); \ + } \ + static void NETLIST_NAME(cname ## _impl)([[maybe_unused]] netlist::nlparse_t &setup, netlist::tt_desc &desc) \ + #endif #define TT_HEAD(x) \ @@ -137,9 +139,6 @@ void NETLIST_NAME(name)([[maybe_unused]] netlist::nlparse_t &setup) \ #define TT_FAMILY(x) \ desc.family = x; -#define TRUTHTABLE_END() \ - NETLIST_END() - #define TRUTHTABLE_ENTRY(name) \ LOCAL_SOURCE(name) \ INCLUDE(name) @@ -176,8 +175,30 @@ namespace netlist nlparse_t(log_type &log, detail::abstract_t &abstract); void register_model(const pstring &model_in); - void register_alias(const pstring &alias, const pstring &out); - void register_alias_no_fqn(const pstring &alias, const pstring &out); + + /// \brief Register an aliases + /// + /// Both alias and points_to are considered to be relative to the + /// current netlist naming level and changed to fully qualified names. + /// The alias type will be automatically determined. If it is a number, + /// it will be PACKAGE_PIN - in all other cases READABILITY. + /// This call is only used by the ALIAS macro. + /// \param alias the alias to be qualified + /// \param points_to the pin aliased + void register_alias(const pstring &alias, const pstring &points_to); + /// \brief Register an aliases + /// + /// Both alias and points_to are considered to be relative to the + /// current netlist naming level and changed to fully qualified names. + /// \param type the alias type see \ref alias_type + /// \param alias the alias to be qualified + /// \param points_to the pin aliased + void register_alias(detail::alias_type type, const pstring &alias, const pstring &points_to); + /// \brief Register an aliases where alias and references are fully qualified names + /// \param type the alias type see \ref alias_type + /// \param alias the alias to be qualified + /// \param points_to the pin aliased + void register_fqn_alias(detail::alias_type type, const pstring &alias, const pstring &points_to); void register_dip_alias_arr(const pstring &terms); // last argument only needed by nltool @@ -192,10 +213,10 @@ namespace netlist void register_hint(const pstring &object_name, const pstring &hint_name); - void register_link(const pstring &sin, const pstring &sout); - void register_link_arr(const pstring &terms); + void register_connection(const pstring &sin, const pstring &sout); + void register_connection_arr(const pstring &terms); // also called from devices for late binding connected terminals - void register_link_fqn(const pstring &sin, const pstring &sout); + void register_connection_fqn(const pstring &sin, const pstring &sout); void register_param(const pstring ¶m, const pstring &value); diff --git a/src/lib/netlist/nltypes.h b/src/lib/netlist/nltypes.h index 3e36fd912d9..15cd65a9471 100644 --- a/src/lib/netlist/nltypes.h +++ b/src/lib/netlist/nltypes.h @@ -99,7 +99,6 @@ namespace netlist } // namespace netlist - namespace netlist { @@ -172,9 +171,10 @@ namespace netlist /// \note This is not the right location yet. /// - using device_arena = std::conditional_t, - config::mempool_align::value>, + config::mempool_align::value>, plib::aligned_arena<>>; using host_arena = plib::aligned_arena<>; @@ -190,8 +190,8 @@ namespace netlist /// enum class time_step_type { - FORWARD, ///< forward time - RESTORE ///< restore state before last forward + FORWARD, //!< forward time + RESTORE //!< restore state before last forward }; /// \brief Delegate type for device notification. @@ -207,9 +207,27 @@ namespace netlist /// enum class terminal_type { - TERMINAL = 0, ///< object is an analog terminal - INPUT = 1, ///< object is an input - OUTPUT = 2, ///< object is an output + TERMINAL = 0, //!< object is an analog terminal + INPUT = 1, //!< object is an input + OUTPUT = 2, //!< object is an output + }; + + /// + /// \brief The kind of alias + /// + /// The information should later be used to create a netlist from + /// an abstract net list representation. + /// + enum class alias_type + { + UNKNOWN, //!< Used as a placeholder during code changes + INTERNAL, //!< the alias references a internal pin + FUNCTIONAL, //!< Used for aliases e.g. in BJTs : ALIAS("B", + //!< somesub.p()) + PACKAGE_PIN, //!< the alias references a package pin, e.g. ALIAS(13, + //!< B.CLK) + READABILITY, //!< the alias is used to improved readability, e.g. + //!< ALIAS(hblank, IC3.3) }; } // namespace detail @@ -218,11 +236,11 @@ namespace netlist using netlist_time_ext = plib::ptime< std::conditional::type, + INT128, std::int64_t>::type, config::INTERNAL_RES::value>; static_assert(noexcept(netlist_time::from_nsec(1)), - "Not evaluated as constexpr"); + "Not evaluated as constexpr"); //============================================================ // MACROS @@ -251,8 +269,8 @@ namespace netlist template struct times_ns1 { - static constexpr netlist_time value( - [[maybe_unused]] std::size_t N = 0) + static constexpr netlist_time + value([[maybe_unused]] std::size_t N = 0) { return NLTIME_FROM_NS(value0); } @@ -264,7 +282,7 @@ namespace netlist /// \brief: used to hold two static netlist_time values /// template + netlist_time::internal_type value1> struct times_ns2 { static constexpr netlist_time value(std::size_t N) @@ -276,8 +294,8 @@ namespace netlist /// \brief: used to hold three static netlist_time values /// template + netlist_time::internal_type value1, + netlist_time::internal_type value2> struct times_ns3 { static constexpr netlist_time value(std::size_t N) @@ -313,7 +331,7 @@ namespace netlist /// Allows a descriptive text to be passed to the exception explicit nl_exception(const pstring &text //!< text to be passed - ) + ) : plib::pexception(text) { } @@ -322,10 +340,9 @@ namespace netlist /// Allows to use \ref plib::pfmt logic to be used in exception template - explicit nl_exception(const pstring &fmt //!< format to be used - , - Args &&...args //!< arguments to be passed - ) + explicit nl_exception(const pstring &fmt, //!< format to be used + Args &&...args //!< arguments to be passed + ) : plib::pexception(plib::pfmt(fmt)(std::forward(args)...)) { } diff --git a/src/lib/netlist/prg/nltool.cpp b/src/lib/netlist/prg/nltool.cpp index 33640511e4e..85654e174ce 100644 --- a/src/lib/netlist/prg/nltool.cpp +++ b/src/lib/netlist/prg/nltool.cpp @@ -224,7 +224,8 @@ private: }; static NETLIST_START(dummy) -NETLIST_END() +{ +} // ************************************************************************** // CORE IMPLEMENTATION @@ -285,6 +286,8 @@ public: for (const auto & r : roms) parser().register_source(r); + parser().add_include(plib::util::path(filename)); + for (const auto & i : includes) parser().add_include(i); diff --git a/src/lib/netlist/solver/nld_matrix_solver.h b/src/lib/netlist/solver/nld_matrix_solver.h index cdee6dbb5ff..21725ab3100 100644 --- a/src/lib/netlist/solver/nld_matrix_solver.h +++ b/src/lib/netlist/solver/nld_matrix_solver.h @@ -119,23 +119,23 @@ namespace netlist::solver , m_gs_sor(parent, prefix + "SOR_FACTOR", defaults.m_gs_sor()) , m_method(parent, prefix + "METHOD", defaults.m_method()) , m_fp_type(parent, prefix + "FPTYPE", defaults.m_fp_type()) - , m_reltol(parent, prefix + "RELTOL", defaults.m_reltol()) ///< SPICE RELTOL parameter - , m_vntol(parent, prefix + "VNTOL", defaults.m_vntol()) ///< SPICE VNTOL parameter - , m_accuracy(parent, prefix + "ACCURACY", defaults.m_accuracy()) ///< Iterative solver accuracy - , m_nr_loops(parent, prefix + "NR_LOOPS", defaults.m_nr_loops()) ///< Maximum number of Newton-Raphson loops - , m_gs_loops(parent, prefix + "GS_LOOPS", defaults.m_gs_loops()) ///< Maximum number of Gauss-Seidel loops + , m_reltol(parent, prefix + "RELTOL", defaults.m_reltol()) //!< SPICE RELTOL parameter + , m_vntol(parent, prefix + "VNTOL", defaults.m_vntol()) //!< SPICE VNTOL parameter + , m_accuracy(parent, prefix + "ACCURACY", defaults.m_accuracy()) //!< Iterative solver accuracy + , m_nr_loops(parent, prefix + "NR_LOOPS", defaults.m_nr_loops()) //!< Maximum number of Newton-Raphson loops + , m_gs_loops(parent, prefix + "GS_LOOPS", defaults.m_gs_loops()) //!< Maximum number of Gauss-Seidel loops // general parameters , m_gmin(parent, prefix + "GMIN", defaults.m_gmin()) - , m_pivot(parent, prefix + "PIVOT", defaults.m_pivot()) ///< use pivoting on supported solvers - , m_nr_recalc_delay(parent, prefix + "NR_RECALC_DELAY", defaults.m_nr_recalc_delay()) ///< Delay to next solve attempt if nr loops exceeded + , m_pivot(parent, prefix + "PIVOT", defaults.m_pivot()) //!< use pivoting on supported solvers + , m_nr_recalc_delay(parent, prefix + "NR_RECALC_DELAY", defaults.m_nr_recalc_delay()) //!< Delay to next solve attempt if nr loops exceeded , m_parallel(parent, prefix + "PARALLEL", defaults.m_parallel()) - , m_min_ts_ts(parent, prefix + "MIN_TS_TS", defaults.m_min_ts_ts()) ///< The minimum time step for solvers with time stepping devices. + , m_min_ts_ts(parent, prefix + "MIN_TS_TS", defaults.m_min_ts_ts()) //!< The minimum time step for solvers with time stepping devices. // automatic time step - , m_dynamic_ts(parent, prefix + "DYNAMIC_TS", defaults.m_dynamic_ts()) ///< Use dynamic time stepping - , m_dynamic_lte(parent, prefix + "DYNAMIC_LTE", defaults.m_dynamic_lte()) ///< dynamic time stepping slope - , m_dynamic_min_ts(parent, prefix + "DYNAMIC_MIN_TIMESTEP", defaults.m_dynamic_min_ts()) ///< smallest time step allowed + , m_dynamic_ts(parent, prefix + "DYNAMIC_TS", defaults.m_dynamic_ts()) //!< Use dynamic time stepping + , m_dynamic_lte(parent, prefix + "DYNAMIC_LTE", defaults.m_dynamic_lte()) //!< dynamic time stepping slope + , m_dynamic_min_ts(parent, prefix + "DYNAMIC_MIN_TIMESTEP", defaults.m_dynamic_min_ts()) //!< smallest time step allowed // matrix sorting , m_sort_type(parent, prefix + "SORT_TYPE", defaults.m_sort_type()) diff --git a/src/lib/netlist/tools/nl_convert.cpp b/src/lib/netlist/tools/nl_convert.cpp index 78ed6f12d77..b8ca2314200 100644 --- a/src/lib/netlist/tools/nl_convert.cpp +++ b/src/lib/netlist/tools/nl_convert.cpp @@ -400,13 +400,14 @@ void nl_convert_spice_t::convert(const pstring &contents) } out("NETLIST_START(dummy)\n"); + out("{\n"); add_term("0", "GND"); add_term("GND", "GND"); // For Kicad convert_block(nl); dump_nl(); // FIXME: Parameter - out("NETLIST_END()\n"); + out("}\n"); } static pstring rem(const std::vector &vps, std::size_t start) @@ -451,13 +452,14 @@ void nl_convert_spice_t::process_line(const pstring &line) { m_subckt = tt[1] + "_"; out("NETLIST_START({})\n", tt[1]); + out("{\n"); for (std::size_t i=2; i