From 92e498d402091dda1badfc355bddaa8e50d3b68f Mon Sep 17 00:00:00 2001 From: Lord-Nightmare Date: Thu, 16 Mar 2017 16:04:15 -0400 Subject: upd7725: Add siack and soack registers and their requisite jumps, not used yet. Fix missing si register and flags registers savestate registration. [Lord Nightmare] --- src/devices/cpu/upd7725/upd7725.cpp | 26 ++++++++++++++++++++++++++ src/devices/cpu/upd7725/upd7725.h | 6 +++++- 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp index f0647e1bd0e..8f443bb3973 100644 --- a/src/devices/cpu/upd7725/upd7725.cpp +++ b/src/devices/cpu/upd7725/upd7725.cpp @@ -112,11 +112,30 @@ void necdsp_device::device_start() save_item(NAME(regs.n)); save_item(NAME(regs.a)); save_item(NAME(regs.b)); + save_item(NAME(regs.flaga.s1)); + save_item(NAME(regs.flaga.s0)); + save_item(NAME(regs.flaga.c)); + save_item(NAME(regs.flaga.z)); + save_item(NAME(regs.flaga.ov1)); + save_item(NAME(regs.flaga.ov0)); + save_item(NAME(regs.flaga.ov0p)); + save_item(NAME(regs.flaga.ov0pp)); + save_item(NAME(regs.flagb.s1)); + save_item(NAME(regs.flagb.s0)); + save_item(NAME(regs.flagb.c)); + save_item(NAME(regs.flagb.z)); + save_item(NAME(regs.flagb.ov1)); + save_item(NAME(regs.flagb.ov0)); + save_item(NAME(regs.flagb.ov0p)); + save_item(NAME(regs.flagb.ov0pp)); save_item(NAME(regs.tr)); save_item(NAME(regs.trb)); save_item(NAME(regs.dr)); + save_item(NAME(regs.si)); save_item(NAME(regs.so)); save_item(NAME(regs.idb)); + save_item(NAME(regs.siack)); + save_item(NAME(regs.soack)); save_item(NAME(regs.sr.rqm)); save_item(NAME(regs.sr.usf0)); save_item(NAME(regs.sr.usf1)); @@ -164,6 +183,8 @@ void necdsp_device::device_reset() regs.si = 0x0000; regs.so = 0x0000; regs.idb = 0x0000; + regs.siack = 0; + regs.soack = 0; } //------------------------------------------------- @@ -531,6 +552,11 @@ void necdsp_device::exec_jp(uint32_t opcode) { case 0x0b2: if((regs.dp & 0x0f) == 0x0f) regs.pc = jps; return; //JDPLF case 0x0b3: if((regs.dp & 0x0f) != 0x0f) regs.pc = jps; return; //JDPLNF + case 0x0b4: if(regs.siack == 0) regs.pc = jps; return; //JNSIAK + case 0x0b6: if(regs.siack == 1) regs.pc = jps; return; //JSIAK + case 0x0b8: if(regs.soack == 0) regs.pc = jps; return; //JNSOAK + case 0x0ba: if(regs.soack == 1) regs.pc = jps; return; //JSOAK + case 0x0bc: if(regs.sr.rqm == 0) regs.pc = jps; return; //JNRQM case 0x0be: if(regs.sr.rqm == 1) regs.pc = jps; return; //JRQM diff --git a/src/devices/cpu/upd7725/upd7725.h b/src/devices/cpu/upd7725/upd7725.h index 47ae0bf6f8c..481c6e59585 100644 --- a/src/devices/cpu/upd7725/upd7725.h +++ b/src/devices/cpu/upd7725/upd7725.h @@ -181,6 +181,8 @@ private: uint16_t si; uint16_t so; uint16_t idb; + bool siack; // Serial in ACK + bool soack; // Serial out ACK } regs; void exec_op(uint32_t opcode); @@ -255,7 +257,9 @@ enum UPD7725_TRB, UPD7725_SI, UPD7725_SO, - UPD7725_IDB + UPD7725_IDB, + UPD7725_SIACK, + UPD7725_SOACK }; #endif /* __UPD7725_H__ */ -- cgit v1.2.3