From 90371fc002f18363a98a499585441e9e1eb68616 Mon Sep 17 00:00:00 2001 From: Paul-Arnold <98924583+Paul-Arnold@users.noreply.github.com> Date: Tue, 4 Oct 2022 20:18:53 +0100 Subject: Change cpu32 and M68340 to 16 bit data bus instead of 32 [Paul Arnold] --- src/devices/cpu/m68000/fscpu32.cpp | 13 ++---- src/devices/cpu/m68000/fscpu32.h | 7 +-- src/devices/cpu/m68000/m68kcpu.cpp | 2 +- src/devices/cpu/m68000/m68kdasm.h | 12 ++--- src/devices/machine/68340.cpp | 34 ++++++++------ src/devices/machine/68340.h | 12 ++--- src/devices/machine/68340dma.cpp | 8 ++-- src/devices/machine/68340sim.cpp | 92 +++++++++++++++++++++++++------------- src/devices/machine/68340tmu.cpp | 2 + src/mame/barcrest/mpu5.cpp | 44 +++++++++--------- src/mame/barcrest/mpu5.h | 16 +++---- src/mame/bfm/bfm_sc4.cpp | 14 +++--- src/mame/bfm/bfm_sc4.h | 8 ++-- src/mame/bfm/bfm_swp.cpp | 34 ++++++-------- src/mame/jpm/pluto5.cpp | 27 ++++++----- src/mame/misc/astrafr.cpp | 64 +++++++++++++------------- src/mame/misc/cupidon.cpp | 11 ++--- src/tools/unidasm.cpp | 2 +- 18 files changed, 207 insertions(+), 195 deletions(-) diff --git a/src/devices/cpu/m68000/fscpu32.cpp b/src/devices/cpu/m68000/fscpu32.cpp index c66733536dd..e633d7a059d 100644 --- a/src/devices/cpu/m68000/fscpu32.cpp +++ b/src/devices/cpu/m68000/fscpu32.cpp @@ -5,21 +5,14 @@ #include "fscpu32.h" #include "m68kdasm.h" -DEFINE_DEVICE_TYPE(FSCPU32, fscpu32_device, "fscpu32", "Freescale CPU32 Core") - std::unique_ptr fscpu32_device::create_disassembler() { - return std::make_unique(m68k_disassembler::TYPE_68340); -} - -fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : m68000_base_device(mconfig, tag, owner, clock, FSCPU32, 32,32) -{ + return std::make_unique(m68k_disassembler::TYPE_CPU32); } fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, - const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map) - : m68000_base_device(mconfig, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map) + const device_type type, address_map_constructor internal_map) + : m68000_base_device(mconfig, tag, owner, clock, type, 16,32, internal_map) { } diff --git a/src/devices/cpu/m68000/fscpu32.h b/src/devices/cpu/m68000/fscpu32.h index b2099373214..66bb7e1f114 100644 --- a/src/devices/cpu/m68000/fscpu32.h +++ b/src/devices/cpu/m68000/fscpu32.h @@ -10,9 +10,6 @@ class fscpu32_device : public m68000_base_device { public: - // construction/destruction - fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - virtual std::unique_ptr create_disassembler() override; virtual u32 execute_min_cycles() const noexcept override { return 2; } @@ -23,9 +20,7 @@ public: protected: fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, - const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map); + const device_type type, address_map_constructor internal_map); }; -DECLARE_DEVICE_TYPE(FSCPU32, fscpu32_device) - #endif diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp index 8ec55e893ac..2b00922c9e1 100644 --- a/src/devices/cpu/m68000/m68kcpu.cpp +++ b/src/devices/cpu/m68000/m68kcpu.cpp @@ -2134,7 +2134,7 @@ void m68000_base_device::init_cpu_fscpu32(void) m_cpu_type = CPU_TYPE_FSCPU32; - init32(*m_program, *m_oprogram); + init16(*m_program, *m_oprogram); m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ m_state_table = m68ki_instruction_state_table[6]; m_cyc_instruction = m68ki_cycles[6]; diff --git a/src/devices/cpu/m68000/m68kdasm.h b/src/devices/cpu/m68000/m68kdasm.h index b7e3f9de246..b40c02c381c 100644 --- a/src/devices/cpu/m68000/m68kdasm.h +++ b/src/devices/cpu/m68000/m68kdasm.h @@ -27,7 +27,7 @@ public: TYPE_68020 = 8, TYPE_68030 = 16, TYPE_68040 = 32, - TYPE_68340 = 64, // (CPU32) + TYPE_CPU32 = 64, TYPE_COLDFIRE = 128, }; @@ -42,13 +42,13 @@ protected: M68000_ONLY = (TYPE_68000 | TYPE_68008), M68010_ONLY = TYPE_68010, M68010_LESS = (TYPE_68000 | TYPE_68008 | TYPE_68010), - M68010_PLUS = (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE), - M68020_ONLY = (TYPE_68020 | TYPE_68340), - M68020_LESS = (TYPE_68010 | TYPE_68020 | TYPE_68340), - M68020_PLUS = (TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE), + M68010_PLUS = (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_CPU32 | TYPE_COLDFIRE), + M68020_ONLY = (TYPE_68020 | TYPE_CPU32), + M68020_LESS = (TYPE_68010 | TYPE_68020 | TYPE_CPU32), + M68020_PLUS = (TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_CPU32 | TYPE_COLDFIRE), M68030_ONLY = TYPE_68030, - M68030_LESS = (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68340 ), + M68030_LESS = (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_CPU32 ), M68030_PLUS = (TYPE_68030 | TYPE_68040), M68040_PLUS = TYPE_68040, diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp index 56a4ff007a6..710e7cadeb0 100644 --- a/src/devices/machine/68340.cpp +++ b/src/devices/machine/68340.cpp @@ -127,16 +127,16 @@ uint8_t m68340_cpu_device::int_ack(offs_t offset) /* 68340 specifics - MOVE */ -uint32_t m68340_cpu_device::m68340_internal_base_r(offs_t offset, uint32_t mem_mask) +uint16_t m68340_cpu_device::m68340_internal_base_r(offs_t offset, uint16_t mem_mask) { if (!machine().side_effects_disabled()) - LOGMASKED(LOG_BASE, "%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask); - return m_m68340_base; + LOGMASKED(LOG_BASE, "%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*2,mem_mask); + return ((!BIT(offset, 0) ? (m_m68340_base >> 16): m_m68340_base)) & 0xffff; } -void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask); + LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*2,data,mem_mask); // other conditions? if (m_dfc==0x7) @@ -152,9 +152,17 @@ void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uin m_internal->unmap_readwrite(base + 0x780, base + 0x7bf); } + + uint32_t data32 = data; + uint32_t mem_mask32 = mem_mask; + if (!BIT(offset,0)) + { + data32 <<= 16; + mem_mask32 <<= 16; + } - COMBINE_DATA(&m_m68340_base); - LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc(), offset*4,data,mem_mask); + m_m68340_base = (m_m68340_base & ~mem_mask32) | (data32 & mem_mask32); + LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc(), offset*2,data,mem_mask); // map new modules if (m_m68340_base & 1) @@ -168,8 +176,8 @@ void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uin read8sm_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_r)), write8sm_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_w)),0xffffffff); m_internal->install_readwrite_handler(base + 0x040, base + 0x05f, - read32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_r)), - write32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_w))); + read16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_r)), + write16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_w))); m_internal->install_readwrite_handler(base + 0x600, base + 0x63f, read16s_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::read)), write16s_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::write)),0xffffffff); @@ -180,13 +188,13 @@ void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uin read8sm_delegate(*m_serial, FUNC(mc68340_serial_module_device::read)), write8sm_delegate(*m_serial, FUNC(mc68340_serial_module_device::write)),0xffffffff); m_internal->install_readwrite_handler(base + 0x780, base + 0x7bf, - read32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_r)), - write32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_w))); + read16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_r)), + write16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_w))); } } else { - LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc(), offset*4,data,mem_mask); + LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc(), offset*2,data,mem_mask); } } @@ -214,7 +222,7 @@ void m68340_cpu_device::device_add_mconfig(machine_config &config) //************************************************************************** m68340_cpu_device::m68340_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : fscpu32_device(mconfig, tag, owner, clock, M68340, 32,32, address_map_constructor(FUNC(m68340_cpu_device::m68340_internal_map), this)) + : fscpu32_device(mconfig, tag, owner, clock, M68340, address_map_constructor(FUNC(m68340_cpu_device::m68340_internal_map), this)) , m_serial(*this, "serial") , m_timer(*this, "timer%u", 1U) , m_clock_mode(0) diff --git a/src/devices/machine/68340.h b/src/devices/machine/68340.h index 464c7131b90..ef89972a72c 100644 --- a/src/devices/machine/68340.h +++ b/src/devices/machine/68340.h @@ -83,16 +83,16 @@ private: m_clock_mode |= (m68340_sim::CLOCK_MODCK | m68340_sim::CLOCK_PLL); } - uint32_t m68340_internal_base_r(offs_t offset, uint32_t mem_mask = ~0); - void m68340_internal_base_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t m68340_internal_dma_r(offs_t offset, uint32_t mem_mask = ~0); - void m68340_internal_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t m68340_internal_base_r(offs_t offset, uint16_t mem_mask = ~0); + void m68340_internal_base_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t m68340_internal_dma_r(offs_t offset, uint16_t mem_mask = ~0); + void m68340_internal_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint16_t m68340_internal_sim_r(offs_t offset, uint16_t mem_mask = ~0); uint8_t m68340_internal_sim_ports_r(offs_t offset); - uint32_t m68340_internal_sim_cs_r(offs_t offset, uint32_t mem_mask = ~0); + uint16_t m68340_internal_sim_cs_r(offs_t offset, uint16_t mem_mask = ~0); void m68340_internal_sim_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void m68340_internal_sim_ports_w(offs_t offset, uint8_t data); - void m68340_internal_sim_cs_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void m68340_internal_sim_cs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); // Clock/VCO setting TODO: support external clock with PLL and Limp mode DECLARE_WRITE_LINE_MEMBER( set_modck ); diff --git a/src/devices/machine/68340dma.cpp b/src/devices/machine/68340dma.cpp index 6cff61a9464..1a832ff95c4 100644 --- a/src/devices/machine/68340dma.cpp +++ b/src/devices/machine/68340dma.cpp @@ -6,22 +6,22 @@ #include "68340.h" -uint32_t m68340_cpu_device::m68340_internal_dma_r(offs_t offset, uint32_t mem_mask) +uint16_t m68340_cpu_device::m68340_internal_dma_r(offs_t offset, uint16_t mem_mask) { assert(m_m68340DMA); //m68340_dma &dma = *m_m68340DMA; - logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask); + logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", m_ppc, offset*2,mem_mask); return 0x00000000; } -void m68340_cpu_device::m68340_internal_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void m68340_cpu_device::m68340_internal_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask) { assert(m_m68340DMA); //m68340_dma &dma = *m_m68340DMA; - logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask); + logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", m_ppc, offset*2,data,mem_mask); } void m68340_dma::reset() diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp index 865a7eafc52..e70bb6bf9b6 100644 --- a/src/devices/machine/68340sim.cpp +++ b/src/devices/machine/68340sim.cpp @@ -344,87 +344,119 @@ void m68340_cpu_device::m68340_internal_sim_ports_w(offs_t offset, uint8_t data) } } -uint32_t m68340_cpu_device::m68340_internal_sim_cs_r(offs_t offset, uint32_t mem_mask) +uint16_t m68340_cpu_device::m68340_internal_sim_cs_r(offs_t offset, uint16_t mem_mask) { + uint32_t data = 0; LOGR("%s\n", FUNCNAME); - offset += m68340_sim::REG_AM_CS0>>2; + offset += m68340_sim::REG_AM_CS0>>1; assert(m_m68340SIM); m68340_sim &sim = *m_m68340SIM; - switch (offset<<2) + switch (offset << 1) { - case m68340_sim::REG_AM_CS0: return sim.m_am[0]; - case m68340_sim::REG_BA_CS0: return sim.m_ba[0]; - case m68340_sim::REG_AM_CS1: return sim.m_am[1]; - case m68340_sim::REG_BA_CS1: return sim.m_ba[1]; - case m68340_sim::REG_AM_CS2: return sim.m_am[2]; - case m68340_sim::REG_BA_CS2: return sim.m_ba[2]; - case m68340_sim::REG_AM_CS3: return sim.m_am[3]; - case m68340_sim::REG_BA_CS3: return sim.m_ba[3]; + case m68340_sim::REG_AM_CS0: data = sim.m_am[0]; break; + case m68340_sim::REG_BA_CS0: data = sim.m_ba[0]; break; + case m68340_sim::REG_AM_CS1: data = sim.m_am[1]; break; + case m68340_sim::REG_BA_CS1: data = sim.m_ba[1]; break; + case m68340_sim::REG_AM_CS2: data = sim.m_am[2]; break; + case m68340_sim::REG_BA_CS2: data = sim.m_ba[2]; break; + case m68340_sim::REG_AM_CS3: data = sim.m_am[3]; break; + case m68340_sim::REG_BA_CS3: data = sim.m_ba[3]; break; default: - logerror("%08x m68340_internal_sim_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask); + logerror("%08x m68340_internal_sim_r %08x, (%08x)\n", m_ppc, offset*2,mem_mask); } - return 0x00000000; + return (BIT(offset,0) ? data : (data >> 16)) & 0xffff; } -void m68340_cpu_device::m68340_internal_sim_cs_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void m68340_cpu_device::m68340_internal_sim_cs_w(offs_t offset, uint16_t data, uint16_t mem_mask) { LOG("%s\n", FUNCNAME); - offset += m68340_sim::REG_AM_CS0>>2; - if (offset & 1) + auto combine_data32 = [&](uint32_t *varptr) { - LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); - LOGCS("- Base: %08x BFC:%02x WP:%d FTE:%d NCS:%d Valid: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, data & 0x08 ? 1 : 0, data & 0x04 ? 1 : 0, data & 0x02 ? 1 : 0, data & 0x01 ? "Yes" : "No"); + uint32_t data32 = data; + uint32_t mem_mask32 = mem_mask; + + if(!BIT(offset,0)) + { + data32 <<= 16; + mem_mask32 <<= 16; + } + + *varptr = (*varptr & ~mem_mask32) | (data32 & mem_mask32); + }; + + offset += m68340_sim::REG_AM_CS0>>1; + + if (BIT(offset, 1)) + { + if (BIT(offset, 0)) + { + LOGCS("%08x (LSWORD) Base address CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask); + LOGCS("- Base: %04x BFC:%02x WP:%d FTE:%d NCS:%d Valid: %s\n", data & 0xff00, (data & 0xf0) >> 4, data & 0x08 ? 1 : 0, data & 0x04 ? 1 : 0, data & 0x02 ? 1 : 0, data & 0x01 ? "Yes" : "No"); + } + else + { + LOGCS("%08x (MSWORD) Base address CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask); + LOGCS("- Base: %04x\n", data); + } } else { - LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); - LOGCS("- Mask: %08x FCM:%02x DD:%d PS: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, (data >> 2) & 0x03, std::array{{"Reserved", "16-Bit", "8-bit", "External DSACK response"}}[data & 0x03]); + if (BIT(offset, 0)) + { + LOGCS("%08x Address mask CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask); + LOGCS("- FCM:%02x DD:%d PS: %s\n", (data & 0xf0) >> 4, (data >> 2) & 0x03, std::array{{"Reserved", "16-Bit", "8-bit", "External DSACK response"}}[data & 0x03]); + } + else + { + LOGCS("%08x Address mask CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask); + LOGCS("- Mask: %04x\n", data & 0xff00); + } } assert(m_m68340SIM); m68340_sim &sim = *m_m68340SIM; - switch (offset << 2) + switch ((offset << 1) & ~3) { case m68340_sim::REG_AM_CS0: - COMBINE_DATA(&sim.m_am[0]); + combine_data32(&sim.m_am[0]); break; case m68340_sim::REG_BA_CS0: - COMBINE_DATA(&sim.m_ba[0]); + combine_data32(&sim.m_ba[0]); break; case m68340_sim::REG_AM_CS1: - COMBINE_DATA(&sim.m_am[1]); + combine_data32(&sim.m_am[1]); break; case m68340_sim::REG_BA_CS1: - COMBINE_DATA(&sim.m_ba[1]); + combine_data32(&sim.m_ba[1]); break; case m68340_sim::REG_AM_CS2: - COMBINE_DATA(&sim.m_am[2]); + combine_data32(&sim.m_am[2]); break; case m68340_sim::REG_BA_CS2: - COMBINE_DATA(&sim.m_ba[2]); + combine_data32(&sim.m_ba[2]); break; case m68340_sim::REG_AM_CS3: - COMBINE_DATA(&sim.m_am[3]); + combine_data32(&sim.m_am[3]); break; case m68340_sim::REG_BA_CS3: - COMBINE_DATA(&sim.m_ba[3]); + combine_data32(&sim.m_ba[3]); break; default: - logerror("%08x m68340_internal_sim_cs_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask); + logerror("%08x m68340_internal_sim_cs_w %08x, %08x (%08x)\n", m_ppc, offset*2,data,mem_mask); break; } } diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp index 6eddadf6f94..1b358e14f6c 100644 --- a/src/devices/machine/68340tmu.cpp +++ b/src/devices/machine/68340tmu.cpp @@ -318,6 +318,8 @@ void mc68340_timer_module_device::device_start() m_tout_out_cb.resolve_safe(); m_tgate_in_cb.resolve_safe(); m_tin_in_cb.resolve_safe(); + + m_ir = 0x000f; } void mc68340_timer_module_device::device_reset() diff --git a/src/mame/barcrest/mpu5.cpp b/src/mame/barcrest/mpu5.cpp index 2bd2366d988..f14e394fe09 100644 --- a/src/mame/barcrest/mpu5.cpp +++ b/src/mame/barcrest/mpu5.cpp @@ -177,20 +177,18 @@ uint8_t mpu5_state::asic_r8(offs_t offset) } -uint32_t mpu5_state::asic_r32(offs_t offset, uint32_t mem_mask) +uint16_t mpu5_state::asic_r16(offs_t offset, uint16_t mem_mask) { - uint32_t retdata = 0; - if (ACCESSING_BITS_24_31) retdata |= asic_r8((offset*4)+0) <<24; - if (ACCESSING_BITS_16_23) retdata |= asic_r8((offset*4)+1) <<16; - if (ACCESSING_BITS_8_15) retdata |= asic_r8((offset*4)+2) <<8; - if (ACCESSING_BITS_0_7) retdata |= asic_r8((offset*4)+3) <<0; + uint16_t retdata = 0; + if (ACCESSING_BITS_8_15) retdata |= asic_r8((offset*2)+0) <<8; + if (ACCESSING_BITS_0_7) retdata |= asic_r8((offset*2)+1) <<0; return retdata; } -uint32_t mpu5_state::mpu5_mem_r(offs_t offset, uint32_t mem_mask) +uint16_t mpu5_state::mpu5_mem_r(offs_t offset, uint16_t mem_mask) { int pc = m_maincpu->pc(); - int addr = offset *4; + int addr = offset * 2; int cs = m_maincpu->get_cs(addr); switch ( cs ) @@ -207,7 +205,7 @@ uint32_t mpu5_state::mpu5_mem_r(offs_t offset, uint32_t mem_mask) break; case 0xf0: - return asic_r32(offset&3,mem_mask); + return asic_r16(offset&1,mem_mask); default: logerror("%08x maincpu read access offset %08x mem_mask %08x cs %d\n", pc, offset*4, mem_mask, cs); @@ -216,11 +214,11 @@ uint32_t mpu5_state::mpu5_mem_r(offs_t offset, uint32_t mem_mask) case 3: case 4: - offset &=0x3fff; + offset &=0x7fff; return m_mainram[offset]; case 1: - if (offset < 0x100000) // make sure to log an error instead of crashing when reading beyond end of region + if (offset < 0x200000) // make sure to log an error instead of crashing when reading beyond end of region return m_cpuregion[offset]; [[fallthrough]]; default: @@ -296,23 +294,21 @@ void mpu5_state::asic_w8(offs_t offset, uint8_t data) } -void mpu5_state::asic_w32(offs_t offset, uint32_t data, uint32_t mem_mask) +void mpu5_state::asic_w16(offs_t offset, uint16_t data, uint16_t mem_mask) { - if (ACCESSING_BITS_24_31) asic_w8((offset*4)+0, (data>>24)&0xff); - if (ACCESSING_BITS_16_23) asic_w8((offset*4)+1, (data>>16)&0xff); - if (ACCESSING_BITS_8_15) asic_w8((offset*4)+2, (data>>8) &0xff); - if (ACCESSING_BITS_0_7) asic_w8((offset*4)+3, (data>>0) &0xff); + if (ACCESSING_BITS_8_15) asic_w8((offset*2)+0, (data>>8) &0xff); + if (ACCESSING_BITS_0_7) asic_w8((offset*2)+1, (data>>0) &0xff); } -uint32_t mpu5_state::pic_r(offs_t offset) +uint16_t mpu5_state::pic_r(offs_t offset) { int pc = m_maincpu->pc(); logerror("%08x maincpu read from PIC - offset %01x\n", pc, offset); return m_pic_output_bit; } -void mpu5_state::pic_w(offs_t offset, uint32_t data) +void mpu5_state::pic_w(offs_t offset, uint16_t data) { switch (offset) { @@ -367,10 +363,10 @@ void mpu5_state::pic_w(offs_t offset, uint32_t data) } -void mpu5_state::mpu5_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void mpu5_state::mpu5_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) { int pc = m_maincpu->pc(); - int addr = offset *4; + int addr = offset * 2; int cs = m_maincpu->get_cs(addr); switch ( cs ) @@ -392,7 +388,7 @@ void mpu5_state::mpu5_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) case 0xf0: { - asic_w32(offset&3,data,mem_mask); + asic_w16(offset&1,data,mem_mask); break; } @@ -405,7 +401,7 @@ void mpu5_state::mpu5_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) case 3: case 4: - offset &=0x3fff; + offset &=0x7fff; COMBINE_DATA(&m_mainram[offset]); break; @@ -429,8 +425,8 @@ INPUT_PORTS_END void mpu5_state::machine_start() { - m_cpuregion = (uint32_t*)memregion( "maincpu" )->base(); - m_mainram = make_unique_clear(0x10000); + m_cpuregion = (uint16_t*)memregion( "maincpu" )->base(); + m_mainram = make_unique_clear(0x20000); m_pic_output_bit =0; } diff --git a/src/mame/barcrest/mpu5.h b/src/mame/barcrest/mpu5.h index eae2a755340..5ca15429b47 100644 --- a/src/mame/barcrest/mpu5.h +++ b/src/mame/barcrest/mpu5.h @@ -22,22 +22,22 @@ public: void mpu5(machine_config &config); private: - uint32_t mpu5_mem_r(offs_t offset, uint32_t mem_mask = ~0); - void mpu5_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t mpu5_mem_r(offs_t offset, uint16_t mem_mask = ~0); + void mpu5_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint32_t asic_r32(offs_t offset, uint32_t mem_mask = ~0); + uint16_t asic_r16(offs_t offset, uint16_t mem_mask = ~0); uint8_t asic_r8(offs_t offset); - void asic_w32(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void asic_w16(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void asic_w8(offs_t offset, uint8_t data); - uint32_t pic_r(offs_t offset); - void pic_w(offs_t offset, uint32_t data); + uint16_t pic_r(offs_t offset); + void pic_w(offs_t offset, uint16_t data); virtual void machine_start() override; void mpu5_map(address_map &map); - uint32_t* m_cpuregion = nullptr; - std::unique_ptr m_mainram; + uint16_t* m_cpuregion = nullptr; + std::unique_ptr m_mainram; uint8_t m_led_strobe_temp = 0; uint8_t m_led_strobe = 0; diff --git a/src/mame/bfm/bfm_sc4.cpp b/src/mame/bfm/bfm_sc4.cpp index 624aa130931..83df93c11eb 100644 --- a/src/mame/bfm/bfm_sc4.cpp +++ b/src/mame/bfm/bfm_sc4.cpp @@ -616,10 +616,10 @@ void sc4_state::sc4_map(address_map &map) -uint32_t sc4_adder4_state::adder4_mem_r(offs_t offset, uint32_t mem_mask) +uint16_t sc4_adder4_state::adder4_mem_r(offs_t offset, uint16_t mem_mask) { int pc = m_adder4cpu->pc(); - int cs = m_adder4cpu->get_cs(offset * 4); + int cs = m_adder4cpu->get_cs(offset * 2); switch ( cs ) { @@ -627,7 +627,7 @@ uint32_t sc4_adder4_state::adder4_mem_r(offs_t offset, uint32_t mem_mask) return m_adder4cpuregion[offset]; case 2: - offset &=0x3fff; + offset &=0x7fff; return m_adder4ram[offset]; default: @@ -639,10 +639,10 @@ uint32_t sc4_adder4_state::adder4_mem_r(offs_t offset, uint32_t mem_mask) return 0x0000; } -void sc4_adder4_state::adder4_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void sc4_adder4_state::adder4_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) { int pc = m_adder4cpu->pc(); - int cs = m_adder4cpu->get_cs(offset * 4); + int cs = m_adder4cpu->get_cs(offset * 2); switch ( cs ) { @@ -652,7 +652,7 @@ void sc4_adder4_state::adder4_mem_w(offs_t offset, uint32_t data, uint32_t mem_m break; case 2: - offset &=0x3fff; + offset &=0x7fff; COMBINE_DATA(&m_adder4ram[offset]); break; @@ -1268,7 +1268,7 @@ void sc4_adder4_state::machine_start() { sc4_state::machine_start(); - m_adder4ram = make_unique_clear(0x10000); + m_adder4ram = make_unique_clear(0x8000); } void sc4_adder4_state::sc4_adder4(machine_config &config) diff --git a/src/mame/bfm/bfm_sc4.h b/src/mame/bfm/bfm_sc4.h index 764307e84fd..e42b6ca71e5 100644 --- a/src/mame/bfm/bfm_sc4.h +++ b/src/mame/bfm/bfm_sc4.h @@ -653,11 +653,11 @@ public: , m_adder4cpu(*this, "adder4") { } - required_region_ptr m_adder4cpuregion; - std::unique_ptr m_adder4ram{}; + required_region_ptr m_adder4cpuregion; + std::unique_ptr m_adder4ram{}; - uint32_t adder4_mem_r(offs_t offset, uint32_t mem_mask = ~0); - void adder4_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t adder4_mem_r(offs_t offset, uint16_t mem_mask = ~0); + void adder4_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); virtual void machine_start() override; // devices diff --git a/src/mame/bfm/bfm_swp.cpp b/src/mame/bfm/bfm_swp.cpp index 39efea62b2d..9205d6ea68b 100644 --- a/src/mame/bfm/bfm_swp.cpp +++ b/src/mame/bfm/bfm_swp.cpp @@ -112,14 +112,14 @@ class bfm_swp_state : public driver_device public: bfm_swp_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") + m_maincpu(*this, "maincpu"), + m_cpuregion(*this, "maincpu") { } - uint32_t* m_cpuregion = nullptr; - std::unique_ptr m_mainram; + std::unique_ptr m_mainram; - uint32_t bfm_swp_mem_r(offs_t offset, uint32_t mem_mask = ~0); - void bfm_swp_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t bfm_swp_mem_r(offs_t offset, uint16_t mem_mask = ~0); + void bfm_swp_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) @@ -133,24 +133,22 @@ protected: // devices required_device m_maincpu; + required_region_ptr m_cpuregion; virtual void machine_start() override; }; -uint32_t bfm_swp_state::bfm_swp_mem_r(offs_t offset, uint32_t mem_mask) +uint16_t bfm_swp_state::bfm_swp_mem_r(offs_t offset, uint16_t mem_mask) { int pc = m_maincpu->pc(); - int cs = m_maincpu->get_cs(offset * 4); + int cs = m_maincpu->get_cs(offset * 2); switch ( cs ) { case 1: - if (offset<0x100000/4) - return m_cpuregion[offset]; - [[fallthrough]]; // FIXME: really? + return m_cpuregion[offset & 0xfffff]; case 2: - offset&=0x3fff; - return m_mainram[offset]; + return m_mainram[offset & 0x1fff]; default: logerror("%08x maincpu read access offset %08x mem_mask %08x cs %d\n", pc, offset*4, mem_mask, cs); @@ -159,10 +157,10 @@ uint32_t bfm_swp_state::bfm_swp_mem_r(offs_t offset, uint32_t mem_mask) return 0x0000; } -void bfm_swp_state::bfm_swp_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void bfm_swp_state::bfm_swp_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) { int pc = m_maincpu->pc(); - int cs = m_maincpu->get_cs(offset * 4); + int cs = m_maincpu->get_cs(offset * 2); switch ( cs ) { @@ -170,8 +168,7 @@ void bfm_swp_state::bfm_swp_mem_w(offs_t offset, uint32_t data, uint32_t mem_mas logerror("%08x maincpu write access offset %08x data %08x mem_mask %08x cs %d\n", pc, offset*4, data, mem_mask, cs); [[fallthrough]]; case 2: - offset&=0x3fff; - COMBINE_DATA(&m_mainram[offset]); + COMBINE_DATA(&m_mainram[offset & 0x1fff]); } } @@ -182,7 +179,6 @@ void bfm_swp_state::bfm_swp_mem_w(offs_t offset, uint32_t data, uint32_t mem_mas void bfm_swp_state::bfm_swp_map(address_map &map) { map(0x00000000, 0xffffffff).rw(FUNC(bfm_swp_state::bfm_swp_mem_r), FUNC(bfm_swp_state::bfm_swp_mem_w)); - map(0x00000000, 0x000fffff).rom(); } @@ -192,9 +188,7 @@ INPUT_PORTS_END void bfm_swp_state::machine_start() { - m_cpuregion = (uint32_t*)memregion( "maincpu" )->base(); - m_mainram = make_unique_clear(0x10000); - + m_mainram = make_unique_clear((1024 * 16) / 2); } diff --git a/src/mame/jpm/pluto5.cpp b/src/mame/jpm/pluto5.cpp index 53b83adfae3..c878d697d90 100644 --- a/src/mame/jpm/pluto5.cpp +++ b/src/mame/jpm/pluto5.cpp @@ -201,11 +201,11 @@ public: void init_hb(); private: - uint32_t* m_cpuregion = 0; - std::unique_ptr m_mainram; + uint16_t* m_cpuregion = 0; + std::unique_ptr m_mainram; - uint32_t pluto5_mem_r(offs_t offset, uint32_t mem_mask = ~0); - void pluto5_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t pluto5_mem_r(offs_t offset, uint16_t mem_mask = ~0); + void pluto5_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void pluto5_map(address_map &map); @@ -215,15 +215,14 @@ private: virtual void machine_start() override; }; -uint32_t pluto5_state::pluto5_mem_r(offs_t offset, uint32_t mem_mask) +uint16_t pluto5_state::pluto5_mem_r(offs_t offset, uint16_t mem_mask) { int pc = m_maincpu->pc(); - int cs = m_maincpu->get_cs(offset * 4); - + int cs = m_maincpu->get_cs(offset * 2); switch ( cs ) { case 1: - if (offset < 0x100000) // If reading beyond end of region, log error instead of crashing + if (offset < 0x200000) // If reading beyond end of region, log error instead of crashing return m_cpuregion[offset]; [[fallthrough]]; default: @@ -234,10 +233,10 @@ uint32_t pluto5_state::pluto5_mem_r(offs_t offset, uint32_t mem_mask) return 0x0000; } -void pluto5_state::pluto5_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void pluto5_state::pluto5_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) { int pc = m_maincpu->pc(); - int cs = m_maincpu->get_cs(offset * 4); + int cs = m_maincpu->get_cs(offset * 2); switch ( cs ) { @@ -259,8 +258,8 @@ INPUT_PORTS_END void pluto5_state::machine_start() { - m_cpuregion = (uint32_t*)memregion( "maincpu" )->base(); - m_mainram = make_unique_clear(0x10000); + m_cpuregion = (uint16_t*)memregion( "maincpu" )->base(); + m_mainram = make_unique_clear(0x20000); } @@ -903,8 +902,8 @@ static void astra_addresslines( uint16_t* src, size_t srcsize, int small ) { for (int x = 0; x m_mainram{}; + std::unique_ptr m_mainram{}; - uint32_t* m_slavecpuregion = nullptr; + uint16_t* m_slavecpuregion = nullptr; int m_slavecpuregion_size = 0; - std::unique_ptr m_slaveram{}; + std::unique_ptr m_slaveram{}; - uint32_t astrafr_mem_r(offs_t offset, uint32_t mem_mask = ~0); - void astrafr_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t astrafr_mem_r(offs_t offset, uint16_t mem_mask = ~0); + void astrafr_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint32_t astrafr_slave_mem_r(offs_t offset, uint32_t mem_mask = ~0); - void astrafr_slave_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t astrafr_slave_mem_r(offs_t offset, uint16_t mem_mask = ~0); + void astrafr_slave_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); // ports move above from game to game.. @@ -141,9 +141,9 @@ private: -uint32_t astrafr_state::astrafr_mem_r(offs_t offset, uint32_t mem_mask) +uint16_t astrafr_state::astrafr_mem_r(offs_t offset, uint16_t mem_mask) { - int cs = m_maincpu->get_cs(offset * 4); + int cs = m_maincpu->get_cs(offset * 2); switch ( cs ) { @@ -154,7 +154,7 @@ uint32_t astrafr_state::astrafr_mem_r(offs_t offset, uint32_t mem_mask) return 0x0000; case 2: - offset &= 0x3fff; + offset &= 0x7fff; return m_mainram[offset]; default: @@ -167,9 +167,9 @@ uint32_t astrafr_state::astrafr_mem_r(offs_t offset, uint32_t mem_mask) -void astrafr_state::astrafr_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void astrafr_state::astrafr_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - int address = offset * 4; + int address = offset * 2; int cs = m_maincpu->get_cs(address); @@ -179,14 +179,12 @@ void astrafr_state::astrafr_mem_w(offs_t offset, uint32_t data, uint32_t mem_mas case 3: address &= 0xfffff; - if (ACCESSING_BITS_24_31) astra_fgpa_w(address+0, data >> 24); - if (ACCESSING_BITS_16_23) astra_fgpa_w(address+1, data >> 16); - if (ACCESSING_BITS_8_15) astra_fgpa_w(address+2, data >> 8); - if (ACCESSING_BITS_0_7) astra_fgpa_w(address+3, data >> 0); + if (ACCESSING_BITS_8_15) astra_fgpa_w(address+0, data >> 8); + if (ACCESSING_BITS_0_7) astra_fgpa_w(address+1, data >> 0); break; case 2: - offset &= 0x3fff; + offset &= 0x7fff; COMBINE_DATA(&m_mainram[offset]); break; @@ -196,9 +194,9 @@ void astrafr_state::astrafr_mem_w(offs_t offset, uint32_t data, uint32_t mem_mas } } -uint32_t astrafr_state::astrafr_slave_mem_r(offs_t offset, uint32_t mem_mask) +uint16_t astrafr_state::astrafr_slave_mem_r(offs_t offset, uint16_t mem_mask) { - int cs = m_slavecpu->get_cs(offset * 4); + int cs = m_slavecpu->get_cs(offset * 2); switch ( cs ) { @@ -209,7 +207,7 @@ uint32_t astrafr_state::astrafr_slave_mem_r(offs_t offset, uint32_t mem_mask) return 0x0000; case 2: - offset &= 0x3fff; + offset &= 0x7fff; return m_slaveram[offset]; default: @@ -220,9 +218,9 @@ uint32_t astrafr_state::astrafr_slave_mem_r(offs_t offset, uint32_t mem_mask) return 0x0000; } -void astrafr_state::astrafr_slave_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void astrafr_state::astrafr_slave_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - int address = offset * 4; + int address = offset * 2; int cs = m_slavecpu->get_cs(address); @@ -232,14 +230,12 @@ void astrafr_state::astrafr_slave_mem_w(offs_t offset, uint32_t data, uint32_t m case 3: address &= 0xfffff; - if (ACCESSING_BITS_24_31) astra_fgpa_slave_w(address+0, data >> 24); - if (ACCESSING_BITS_16_23) astra_fgpa_slave_w(address+1, data >> 16); - if (ACCESSING_BITS_8_15) astra_fgpa_slave_w(address+2, data >> 8); - if (ACCESSING_BITS_0_7) astra_fgpa_slave_w(address+3, data >> 0); + if (ACCESSING_BITS_8_15) astra_fgpa_slave_w(address+0, data >> 8); + if (ACCESSING_BITS_0_7) astra_fgpa_slave_w(address+1, data >> 0); break; case 2: - offset &= 0x3fff; + offset &= 0x7fff; COMBINE_DATA(&m_slaveram[offset]); break; @@ -279,15 +275,15 @@ INPUT_PORTS_END MACHINE_START_MEMBER(astrafr_state,astra_common) { - m_cpuregion = (uint32_t*)memregion( "maincpu" )->base(); - m_cpuregion_size = memregion( "maincpu" )->bytes()/4; - m_mainram = make_unique_clear(0x10000); + m_cpuregion = (uint16_t*)memregion( "maincpu" )->base(); + m_cpuregion_size = memregion( "maincpu" )->bytes()/2; + m_mainram = make_unique_clear(0x20000); if (memregion("slavecpu")) { - m_slavecpuregion = (uint32_t*)memregion( "slavecpu" )->base(); - m_slavecpuregion_size = memregion( "slavecpu" )->bytes()/4; - m_slaveram = make_unique_clear(0x10000); + m_slavecpuregion = (uint16_t*)memregion( "slavecpu" )->base(); + m_slavecpuregion_size = memregion( "slavecpu" )->bytes()/2; + m_slaveram = make_unique_clear(0x20000); } diff --git a/src/mame/misc/cupidon.cpp b/src/mame/misc/cupidon.cpp index 4f0066ebf99..4981a566d3b 100644 --- a/src/mame/misc/cupidon.cpp +++ b/src/mame/misc/cupidon.cpp @@ -38,11 +38,11 @@ public: protected: // devices required_device m_maincpu; - required_shared_ptr m_gfxram; + required_shared_ptr m_gfxram; uint32_t screen_update_cupidon(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t cupidon_return_ffffffff() + uint16_t cupidon_return_ffffffff() { return -1; // or it hits an illegal opcode (sleep on the 68340?) } @@ -60,12 +60,9 @@ uint32_t cupidon_state::screen_update_cupidon(screen_device &screen, bitmap_ind1 { uint16_t *const destline = &bitmap.pix(ytile*16 + y); - for (int x=0;x<8;x++) + for (int x=0;x<16;x++) { - uint32_t gfx = m_gfxram[count]; - - destline[(xtile*16)+(x*2)+0] = (gfx >> 16)&0xffff; - destline[(xtile*16)+(x*2)+1] = (gfx >> 0)&0xffff; + destline[(xtile*16)+(x*2)+0] = m_gfxram[count]; count++; } diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index e9d99c82255..c318e6b6130 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -432,6 +432,7 @@ static const dasm_table_entry dasm_table[] = { "f2mc16", le, 0, []() -> util::disasm_interface * { return new f2mc16_disassembler; } }, { "f8", be, 0, []() -> util::disasm_interface * { return new f8_disassembler; } }, { "fr", be, 0, []() -> util::disasm_interface * { return new fr_disassembler; } }, + { "fscpu32", be, 0, []() -> util::disasm_interface * { return new m68k_disassembler(m68k_disassembler::TYPE_CPU32); } }, { "g65816", le, 0, []() -> util::disasm_interface * { return new g65816_disassembler(&g65816_unidasm); } }, { "gigatron", be, -1, []() -> util::disasm_interface * { return new gigatron_disassembler; } }, { "gt913", be, 0, []() -> util::disasm_interface * { return new gt913_disassembler; } }, @@ -506,7 +507,6 @@ static const dasm_table_entry dasm_table[] = { "m6805", be, 0, []() -> util::disasm_interface * { return new m6805_disassembler; } }, { "m6808", be, 0, []() -> util::disasm_interface * { return new m680x_disassembler(6808); } }, { "m6809", be, 0, []() -> util::disasm_interface * { return new m6809_disassembler; } }, - { "m68340", be, 0, []() -> util::disasm_interface * { return new m68k_disassembler(m68k_disassembler::TYPE_68340); } }, { "m68hc05", be, 0, []() -> util::disasm_interface * { return new m68hc05_disassembler; } }, { "m740", le, 0, []() -> util::disasm_interface * { return new m740_disassembler(&m740_unidasm); } }, { "mb86233", le, -2, []() -> util::disasm_interface * { return new mb86233_disassembler; } }, -- cgit v1.2.3