From 8aed8123a1efce4cc34ed62c9ce0371f2207d572 Mon Sep 17 00:00:00 2001 From: Ryan Holtz Date: Wed, 12 Sep 2018 09:14:27 +0200 Subject: -sun4: Trigger a bus error to indicate unplugged S-Bus slots. Silenced some logging. nw --- src/mame/drivers/sun4.cpp | 60 +++++++++++++++++++++++++++++++++-------------- 1 file changed, 42 insertions(+), 18 deletions(-) diff --git a/src/mame/drivers/sun4.cpp b/src/mame/drivers/sun4.cpp index 4e5fecd6cbe..8f0bce74465 100644 --- a/src/mame/drivers/sun4.cpp +++ b/src/mame/drivers/sun4.cpp @@ -577,6 +577,8 @@ private: DECLARE_READ32_MEMBER( ram_r ); DECLARE_WRITE32_MEMBER( ram_w ); DECLARE_READ32_MEMBER( ss1_sl0_id ); + DECLARE_READ32_MEMBER( ss1_sl1_id ); + DECLARE_READ32_MEMBER( ss1_sl2_id ); DECLARE_READ32_MEMBER( ss1_sl3_id ); DECLARE_READ32_MEMBER( timer_r ); DECLARE_WRITE32_MEMBER( timer_w ); @@ -1546,6 +1548,8 @@ void sun4_state::type1space_map(address_map &map) map(0x08400000, 0x0840000f).rw(FUNC(sun4_state::dma_r), FUNC(sun4_state::dma_w)); map(0x08800000, 0x0880002f).m(m_scsi, FUNC(ncr53c90a_device::map)).umask32(0xff000000); map(0x08c00000, 0x08c00003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w)); + map(0x0a000000, 0x0a000003).r(FUNC(sun4_state::ss1_sl1_id)); // slot 1 contains nothing + map(0x0c000000, 0x0c000003).r(FUNC(sun4_state::ss1_sl2_id)); // slot 2 contains nothing map(0x0e000000, 0x0e000003).r(FUNC(sun4_state::ss1_sl3_id)); // slot 3 contains video board map(0x0e800000, 0x0e8fffff).ram().share("bw2_vram"); } @@ -1756,14 +1760,14 @@ void sun4_state::dma_check_interrupts() m_dma_irq = irq_or_err_pending && irq_enabled; if (old_irq != m_dma_irq) { - logerror("m_dma_irq %d because irq_or_err_pending:%d and irq_enabled:%d\n", m_dma_irq ? 1 : 0, irq_or_err_pending, irq_enabled); + //logerror("m_dma_irq %d because irq_or_err_pending:%d and irq_enabled:%d\n", m_dma_irq ? 1 : 0, irq_or_err_pending, irq_enabled); m_maincpu->set_input_line(SPARC_IRQ3, m_dma_irq ? ASSERT_LINE : CLEAR_LINE); } } void sun4_state::dma_transfer_write() { - logerror("DMAing from device to RAM\n"); + //logerror("DMAing from device to RAM\n"); address_space &space = m_maincpu->space(AS_PROGRAM); @@ -1772,7 +1776,7 @@ void sun4_state::dma_transfer_write() { int bit_index = (3 - pack_cnt) * 8; uint8_t dma_value = m_scsi->dma_r(); - logerror("Read from device: %02x, pack count %d\n", dma_value, pack_cnt); + //logerror("Read from device: %02x, pack count %d\n", dma_value, pack_cnt); m_dma_pack_register |= dma_value << bit_index; if (m_dma[DMA_CTRL] & DMA_EN_CNT) @@ -1781,7 +1785,7 @@ void sun4_state::dma_transfer_write() pack_cnt++; if (pack_cnt == 4) { - logerror("Writing pack register %08x to %08x\n", m_dma_pack_register, m_dma[DMA_ADDR]); + //logerror("Writing pack register %08x to %08x\n", m_dma_pack_register, m_dma[DMA_ADDR]); if (m_arch == ARCH_SUN4C) { write_insn_data_4c(11, space, m_dma[DMA_ADDR] >> 2, m_dma_pack_register, ~0); @@ -1803,7 +1807,7 @@ void sun4_state::dma_transfer_write() void sun4_state::dma_transfer_read() { - logerror("DMAing from RAM to device\n"); + //logerror("DMAing from RAM to device\n"); address_space &space = m_maincpu->space(AS_PROGRAM); @@ -1822,12 +1826,12 @@ void sun4_state::dma_transfer_read() current_word = read_insn_data(11, space, m_dma[DMA_ADDR] >> 2, ~0); } word_cached = true; - logerror("Current word: %08x\n", current_word); + //logerror("Current word: %08x\n", current_word); } int bit_index = (3 - (m_dma[DMA_ADDR] & 3)) * 8; uint8_t dma_value(current_word >> bit_index); - logerror("Write to device: %02x\n", dma_value); + //logerror("Write to device: %02x\n", dma_value); m_scsi->dma_w(dma_value); if ((m_dma[DMA_ADDR] & 3) == 3) @@ -1875,19 +1879,19 @@ WRITE32_MEMBER( sun4_state::dma_w ) case DMA_CTRL: { // clear write-only bits - logerror("dma_w: ctrl: %08x\n", data); + //logerror("dma_w: ctrl: %08x\n", data); mem_mask &= (DMA_READ_WRITE); COMBINE_DATA(&m_dma[DMA_CTRL]); if (data & DMA_RESET) { - logerror("dma_w: reset\n"); + //logerror("dma_w: reset\n"); m_dma[DMA_CTRL] &= ~(DMA_ERR_PEND | DMA_PACK_CNT | DMA_INT_EN | DMA_FLUSH | DMA_DRAIN | DMA_WRITE | DMA_EN_DMA | DMA_REQ_PEND | DMA_EN_CNT | DMA_TC); } else if (data & DMA_FLUSH) { - logerror("dma_w: flush\n"); + //logerror("dma_w: flush\n"); m_dma[DMA_CTRL] &= ~(DMA_PACK_CNT | DMA_ERR_PEND | DMA_TC); dma_check_interrupts(); @@ -1899,8 +1903,8 @@ WRITE32_MEMBER( sun4_state::dma_w ) for (uint8_t i = 0; i < pack_cnt; i++) { const uint32_t bit_index = (3 - i) * 8; - const uint32_t value = m_dma_pack_register & (0xff << bit_index); - logerror("dma_w: draining %02x to RAM address %08x & %08x\n", value >> bit_index, m_dma[DMA_ADDR], 0xff << (24 - bit_index)); + //const uint32_t value = m_dma_pack_register & (0xff << bit_index); + //logerror("dma_w: draining %02x to RAM address %08x & %08x\n", value >> bit_index, m_dma[DMA_ADDR], 0xff << (24 - bit_index)); write_insn_data_4c(11, space, m_dma[DMA_ADDR] >> 2, m_dma_pack_register, 0xff << bit_index); m_dma[DMA_ADDR]++; } @@ -1915,12 +1919,12 @@ WRITE32_MEMBER( sun4_state::dma_w ) } case DMA_ADDR: - logerror("dma_w: addr: %08x\n", data); + //logerror("dma_w: addr: %08x\n", data); m_dma[offset] = data; break; case DMA_BYTE_COUNT: - logerror("dma_w: byte_count: %08x\n", data); + //logerror("dma_w: byte_count: %08x\n", data); m_dma[offset] = data; break; @@ -1935,22 +1939,22 @@ WRITE_LINE_MEMBER( sun4_state::scsi_irq ) m_scsi_irq = state; if (m_scsi_irq != old_irq) { - logerror("scsi_irq %d, checking interrupts\n", state); + //logerror("scsi_irq %d, checking interrupts\n", state); dma_check_interrupts(); } } WRITE_LINE_MEMBER( sun4_state::scsi_drq ) { - logerror("scsi_drq %d\n", state); + //logerror("scsi_drq %d\n", state); m_dma[DMA_CTRL] &= ~DMA_REQ_PEND; if (state) { - logerror("scsi_drq, DMA pending\n"); + //logerror("scsi_drq, DMA pending\n"); m_dma[DMA_CTRL] |= DMA_REQ_PEND; if (m_dma[DMA_CTRL] & DMA_EN_DMA/* && m_dma[DMA_BYTE_COUNT]*/) { - logerror("DMA enabled, starting dma\n"); + //logerror("DMA enabled, starting dma\n"); dma_transfer(); } } @@ -1984,6 +1988,26 @@ READ32_MEMBER( sun4_state::ss1_sl3_id ) return 0xfe010101; } +// indicate no card exists +READ32_MEMBER( sun4_state::ss1_sl1_id ) +{ + m_maincpu->set_mae(); + m_buserr[0] |= 0x20; // timeout + m_buserr[0] &= ~0x8000; // read + m_buserr[1] = 0xffa00000; + return 0; +} + +// indicate no card exists +READ32_MEMBER( sun4_state::ss1_sl2_id ) +{ + m_maincpu->set_mae(); + m_buserr[0] |= 0x20; // timeout + m_buserr[0] &= ~0x8000; // read + m_buserr[1] = 0xffc00000; + return 0; +} + FLOPPY_FORMATS_MEMBER( sun4_state::floppy_formats ) FLOPPY_PC_FORMAT FLOPPY_FORMATS_END -- cgit v1.2.3