From 8a4f8159028170063348f8daa87f762cc7710aa3 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Thu, 7 Nov 2019 21:00:10 +0200 Subject: coolridr.cpp: get rid of redundant hacks (nw) --- src/mame/drivers/coolridr.cpp | 63 +------------------------------------------ 1 file changed, 1 insertion(+), 62 deletions(-) diff --git a/src/mame/drivers/coolridr.cpp b/src/mame/drivers/coolridr.cpp index 3c9566c3900..393f9964a95 100644 --- a/src/mame/drivers/coolridr.cpp +++ b/src/mame/drivers/coolridr.cpp @@ -389,8 +389,6 @@ public: DECLARE_WRITE32_MEMBER(fb_data_w); DECLARE_WRITE32_MEMBER(dma_w); - DECLARE_READ32_MEMBER(coolridr_hack2_r); - DECLARE_READ32_MEMBER(aquastge_hack_r); template DECLARE_READ16_MEMBER(soundram_r); template DECLARE_WRITE16_MEMBER(soundram_w); DECLARE_WRITE8_MEMBER(lamps_w); @@ -3380,80 +3378,21 @@ ROM_START( aquastge ) ROM_END -/* -TODO: both irq routines writes 1 to 0x60d8894, sets up the Watchdog timer then expect that this buffer goes low IN the irq routines. - The Watchdog Timer is setted up with these params: - 0xee for wtcnt - 0x39 for wtcsr (enable irq (bit 5), enable timer (bit 4), clock select divider / 64 (bits 2-0)) - vector is 0x7f (so VBR+0x1fc) - level is 0xf -... and indeed the Watchdog irq routine effectively clears this RAM buffer. What the manual doesn't say is that the Watchdog timer irq - presumably is treated as an NMI by the SH-2 CPU and not really a "normal" irq exception. - For the record, here's the ITI code snippet: - 06002DE4: 2F36 MOV.L R3,@-SP - 06002DE6: E300 MOV #$00,R3 - 06002DE8: 2F26 MOV.L R2,@-SP - 06002DEA: D20B MOV.L @($2C,PC),R2 - 06002DEC: 2230 MOV.B R3,@R2 ;writes 0 to the RAM buffer 0x60d8896 - 06002DEE: 9305 MOV.W @($000A,PC),R3 - 06002DF0: 9205 MOV.W @($000A,PC),R2 - 06002DF2: 2231 MOV.W R3,@R2 ;writes 0x19, disables the watchdog timer - 06002DF4: 62F6 MOV.L @SP+,R2 - 06002DF6: 63F6 MOV.L @SP+,R3 - 06002DF8: 002B RTE - 06002DFA: 0009 NOP - -*/ -READ32_MEMBER(coolridr_state::coolridr_hack2_r) -{ - offs_t pc = m_maincpu->pc(); - - if(pc == 0x6002cba || pc == 0x6002d42) - return 0; - - // with the non-recompiler pc returns +2 - if(pc == 0x06002cbc || pc == 0x06002d44) - return 0; - - return m_workram_h[0xd8894/4]; -} - - -READ32_MEMBER(coolridr_state::aquastge_hack_r) -{ - offs_t pc = m_maincpu->pc(); - - if ((pc == 0x6009e76) || (pc == 0x6009e78)) - return 0; - else - { -// printf("pc %08x\n", pc); - } - - return m_workram_h[0xc3fd8/4]; -} - - void coolridr_state::init_coolridr() { - m_maincpu->space(AS_PROGRAM).install_read_handler(0x60d8894, 0x060d8897, read32_delegate(*this, FUNC(coolridr_state::coolridr_hack2_r))); - m_maincpu->sh2drc_set_options(SH2DRC_FASTEST_OPTIONS); m_subcpu->sh2drc_set_options(SH2DRC_FASTEST_OPTIONS); m_colbase = 0x7b20; // work around the hack when mapping the workram directly - m_maincpu->sh2drc_add_fastram(0x06000000, 0x060d7fff, 0, &m_workram_h[0]); - m_maincpu->sh2drc_add_fastram(0x060d9000, 0x060fffff, 0, &m_workram_h[0xd9000/4]); + m_maincpu->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]); m_maincpu->sh2drc_add_fastram(0x00000000, 0x001fffff, 1, &m_rom[0]); m_maincpu->sh2drc_add_fastram(0x20000000, 0x201fffff, 1, &m_rom[0]); } void coolridr_state::init_aquastge() { - m_maincpu->space(AS_PROGRAM).install_read_handler(0x60c3fd8, 0x60c3fdb, read32_delegate(*this, FUNC(coolridr_state::aquastge_hack_r))); - m_maincpu->sh2drc_set_options(SH2DRC_FASTEST_OPTIONS); m_subcpu->sh2drc_set_options(SH2DRC_FASTEST_OPTIONS); -- cgit v1.2.3