From acf77a437453e6fd8a0dce5ef83301724e59fcba Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 11 Jun 2020 15:38:15 +0200 Subject: namco54: longer irq to fix bosco shot sound regression (nw) --- src/devices/cpu/mb88xx/mb88xx.cpp | 4 ++-- src/mame/audio/namco52.cpp | 12 ++---------- src/mame/audio/namco54.cpp | 9 ++------- src/mame/drivers/galaga.cpp | 6 ++---- src/mame/drivers/polepos.cpp | 1 - src/mame/machine/namco06.cpp | 2 +- src/mame/machine/namco06.h | 1 - 7 files changed, 9 insertions(+), 26 deletions(-) diff --git a/src/devices/cpu/mb88xx/mb88xx.cpp b/src/devices/cpu/mb88xx/mb88xx.cpp index 56f990cd599..fe07ba80d2c 100644 --- a/src/devices/cpu/mb88xx/mb88xx.cpp +++ b/src/devices/cpu/mb88xx/mb88xx.cpp @@ -369,12 +369,12 @@ int mb88_cpu_device::pla( int inA, int inB ) void mb88_cpu_device::execute_set_input(int inputnum, int state) { /* on rising edge trigger interrupt */ - if ( (m_pio & 0x04) && !m_nf && state == ASSERT_LINE ) + if ( (m_pio & 0x04) && !m_nf && state != CLEAR_LINE ) { m_pending_interrupt |= INT_CAUSE_EXTERNAL; } - m_nf = state == ASSERT_LINE; + m_nf = state != CLEAR_LINE; } void mb88_cpu_device::update_pio_enable( uint8_t newpio ) diff --git a/src/mame/audio/namco52.cpp b/src/mame/audio/namco52.cpp index 504a093afa7..0b960a69604 100644 --- a/src/mame/audio/namco52.cpp +++ b/src/mame/audio/namco52.cpp @@ -114,17 +114,9 @@ void namco_52xx_device::write(uint8_t data) { machine().scheduler().synchronize(timer_expired_delegate(FUNC(namco_52xx_device::latch_callback),this), data); + // TODO: should use chip_select line for this m_cpu->set_input_line(0, ASSERT_LINE); - - // The execution time of one instruction is ~4us, so we must make sure to - // give the cpu time to poll the /IRQ input before we clear it. - // The input clock to the 06XX interface chip is 64H, that is - // 18432000/6/64 = 48kHz, so it makes sense for the irq line to be - // asserted for one clock cycle ~= 21us. - - /* the 52xx uses TSTI to check for an interrupt; it also may be handling - a timer interrupt, so we need to ensure the IRQ line is held long enough */ - machine().scheduler().timer_set(attotime::from_usec(5*21), timer_expired_delegate(FUNC(namco_52xx_device::irq_clear),this), 0); + machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(namco_52xx_device::irq_clear),this), 0); } diff --git a/src/mame/audio/namco54.cpp b/src/mame/audio/namco54.cpp index 9741953a847..d81b48acd21 100644 --- a/src/mame/audio/namco54.cpp +++ b/src/mame/audio/namco54.cpp @@ -99,14 +99,9 @@ void namco_54xx_device::write(uint8_t data) { machine().scheduler().synchronize(timer_expired_delegate(FUNC(namco_54xx_device::latch_callback),this), data); + // TODO: should use chip_select line for this m_cpu->set_input_line(0, ASSERT_LINE); - - // The execution time of one instruction is ~4us, so we must make sure to - // give the cpu time to poll the /IRQ input before we clear it. - // The input clock to the 06XX interface chip is 64H, that is - // 18432000/6/64 = 48kHz, so it makes sense for the irq line to be - // asserted for one clock cycle ~= 21us. - machine().scheduler().timer_set(attotime::from_usec(21), timer_expired_delegate(FUNC(namco_54xx_device::irq_clear),this), 0); + machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(namco_54xx_device::irq_clear),this), 0); } diff --git a/src/mame/drivers/galaga.cpp b/src/mame/drivers/galaga.cpp index 6a9ffbf2850..ac803164eb9 100644 --- a/src/mame/drivers/galaga.cpp +++ b/src/mame/drivers/galaga.cpp @@ -1753,8 +1753,7 @@ void galaga_state::galagab(machine_config &config) config.device_remove("06xx"); config.device_remove("54xx"); ls259_device* misclatch = reinterpret_cast(config.device("misclatch")); - // galaga has the custom chips on this line, so just set the resets this - // board has + // galaga has the custom chips on this line, so just set the resets this board has misclatch->q_out_cb<3>().set_inputline("sub", INPUT_LINE_RESET).invert(); misclatch->q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert(); misclatch->q_out_cb<3>().append_inputline("sub3", INPUT_LINE_RESET).invert(); @@ -1866,8 +1865,7 @@ void battles_state::battles(machine_config &config) config.device_remove("54xx"); config.device_remove("06xx"); ls259_device* misclatch = reinterpret_cast(config.device("misclatch")); - // xevious has the custom chips on this line, so just set the resets - // this board has + // xevious has the custom chips on this line, so just set the resets this board has misclatch->q_out_cb<3>().set_inputline("sub", INPUT_LINE_RESET).invert(); misclatch->q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert(); diff --git a/src/mame/drivers/polepos.cpp b/src/mame/drivers/polepos.cpp index 82b92b18175..ad7c1eef25e 100644 --- a/src/mame/drivers/polepos.cpp +++ b/src/mame/drivers/polepos.cpp @@ -860,7 +860,6 @@ void polepos_state::polepos(machine_config &config) m_subcpu2->set_addrmap(AS_PROGRAM, &polepos_state::z8002_map_2); namco_51xx_device &n51xx(NAMCO_51XX(config, "51xx", MASTER_CLOCK/8/2)); /* 1.536 MHz */ - //n51xx.set_screen_tag(m_screen); n51xx.input_callback<0>().set_ioport("DSWB").mask(0x0f); n51xx.input_callback<1>().set_ioport("DSWB").rshift(4); n51xx.input_callback<2>().set_ioport("IN0").mask(0x0f); diff --git a/src/mame/machine/namco06.cpp b/src/mame/machine/namco06.cpp index 057220e137e..37ec9688327 100644 --- a/src/mame/machine/namco06.cpp +++ b/src/mame/machine/namco06.cpp @@ -184,7 +184,7 @@ void namco_06xx_device::ctrl_w(uint8_t data) m_control = data; // The upper 3 control bits are the clock divider. - if ((m_control & 0xE0) == 0) + if ((m_control & 0xe0) == 0) { m_nmi_timer->adjust(attotime::never); set_nmi(CLEAR_LINE); diff --git a/src/mame/machine/namco06.h b/src/mame/machine/namco06.h index 5015083d849..fad249135a6 100644 --- a/src/mame/machine/namco06.h +++ b/src/mame/machine/namco06.h @@ -42,7 +42,6 @@ private: bool m_rw_stretch; bool m_rw_change; - required_device m_nmicpu; devcb_write_line::array<4> m_chipsel; -- cgit v1.2.3