From 7d2066f7ced917d98baa742ae4350e637ceecab6 Mon Sep 17 00:00:00 2001 From: Lord-Nightmare Date: Mon, 28 Aug 2017 19:29:41 -0400 Subject: buggychl: remove nmi trampolines; add details and mirrors to memory map based on schematics; add note about the maybe unused scoreboard hookup, similar to Grand Champion. [Lord Nightmare] --- src/mame/drivers/buggychl.cpp | 118 ++++++++++++++++++++++++++++++------------ src/mame/includes/buggychl.h | 2 - 2 files changed, 84 insertions(+), 36 deletions(-) diff --git a/src/mame/drivers/buggychl.cpp b/src/mame/drivers/buggychl.cpp index 574b5e6054e..e56a176e94d 100644 --- a/src/mame/drivers/buggychl.cpp +++ b/src/mame/drivers/buggychl.cpp @@ -104,16 +104,6 @@ WRITE8_MEMBER(buggychl_state::bankswitch_w) membank("bank1")->set_entry(data & 0x07); // shall we check if data&7 < # banks? } -WRITE8_MEMBER(buggychl_state::nmi_disable_w) -{ - m_soundnmi->in_w<1>(0); -} - -WRITE8_MEMBER(buggychl_state::nmi_enable_w) -{ - m_soundnmi->in_w<1>(1); -} - WRITE8_MEMBER(buggychl_state::sound_enable_w) { machine().sound().system_enable(data & 1); @@ -130,7 +120,8 @@ READ8_MEMBER(buggychl_state::mcu_status_r) // the schematics show that the two sound semaphore latch bits are actually flipped backwards when read by the sound cpu // vs when read by the main cpu. -// Given the other schematic errors, is this even correct? +// Given the other schematic errors, and the fact that the sound board schematic is for the wrong pcb, is this even correct? +// It isn't even obvious if the maincpu or sound cpu read the semaphores at all, ever. // a cpu write to soundlatch sets ic12.2 so /Q is low, so cpu bit 1 and sound bit 0 read as clear // a sound write to soundlatch2 clears ic12.1 so /Q is high, so cpu bit 0 and sound bit 1 read as set // a cpu read of soundlatch2 sets ic12.1 so /Q is low, so cpu bit 0 and sound bit 1 read as clear @@ -146,7 +137,59 @@ READ8_MEMBER(buggychl_state::sound_status_sound_r) return (m_soundlatch2->pending_r() ? 2 : 0) | (m_soundlatch->pending_r() ? 0 : 1); } - +/* Main cpu address map ( * = used within this section; x = don't care ) + | | | +15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 + * * R 74LS139 @ ic53 + 0 0 * * * * * * * * * * * * * * R ROM (ic23) + 0 1 * * * * * * * * * * * * * * R ROM (ic22) + 1 * * * RW 74LS138 @ ic66 + 1 0 0 0 0 * * * * * * * * * * * RW SRAM (ic36) + 1 0 0 0 1 * * * * * * * * * * * RW SRAM (ic35) + 1 0 0 1 * * * * * * * * * * * * RW /STYLRQ + (TODO: finish above, its quite complicated) + 1 0 1 * * * * * * * * * * * * * R /EXROMRD and /CDRRQW, banked ROM reads (generates a waitstate) + 1 1 0 0 ? ? ? ? ? ? ? ? ? ? ? ? ? (unknown, cut off on schematic) + 1 1 0 1 0 0 0 0 ? ? ? ? ? ? ? ? W HORIZON + 1 1 0 1 0 0 0 1 x x x x x x x x W ANY OUT (lamp d7, lockout d6, unused d5, ojmode d4, skyoff d3, sn31/4off d2, hinv d1, vinv d0) + 1 1 0 1 0 0 1 0 x x x x x x x x W BANKSWITCH (banking, rom selected on d2, d1, upper/lower half of rom on d0) + 1 1 0 1 0 0 1 1 x x x x x * * * W 74LS138 @ ic39 + 1 1 0 1 0 0 1 1 x x x x x 0 0 0 W /TRESET (watchdog reset) + 1 1 0 1 0 0 1 1 x x x x x 0 0 1 W FLPD1,E1,F1,D2,E2,F2 on d0-d5 respectively + 1 1 0 1 0 0 1 1 x x x x x 0 1 0 W /SRESET (value of d0 latched; this is the mcu reset and resets the mcu semaphores as well) + 1 1 0 1 0 0 1 1 x x x x x 0 1 1 W STYLBANK (d4 controls latch at v-ic25.1) + 1 1 0 1 0 0 1 1 x x x x x 1 0 0 W SCCON1 + 1 1 0 1 0 0 1 1 x x x x x 1 0 1 W SCCON2 + 1 1 0 1 0 0 1 1 x x x x x 1 1 0 W SCCON3 + 1 1 0 1 0 0 1 1 x x x x x 1 1 1 W SCCON4 + (the four ports above are probably for connecting to a bezel score display, almost identical to that of Grand Champion; see https://ia800501.us.archive.org/16/items/ArcadeGameManualGrandchampion/grandchampion.pdf pdf pages 54 and 55) + 1 1 0 1 0 1 0 0 x x x x x x * * RW SEQRQ 74ls155 @ ic42 + 1 1 0 1 0 1 0 0 x x x x x x 0 0 W Write to MCU in latch and set ic43.1 semaphore + 1 1 0 1 0 1 0 0 x x x x x x 0 0 R Read from MCU out latch and clear ic43.2 semaphore + 1 1 0 1 0 1 0 0 x x x x x x 0 1 R Read semaphores : /ic43.0 in d0 and ic43.1 in d1 + 1 1 0 1 0 1 0 0 x x x x x x 1 x OPEN BUS + 1 1 0 1 0 1 0 1 * * * * * * * * RW OBJRQ (read/write obj SRAM vb-ic34) + 1 1 0 1 0 1 1 0 x x x * * W 74LS139 @ ic52 + 1 1 0 1 0 1 1 0 x x x 0 0 x * * R INPUTA + (16 inputs read here in the 4 bytes) + 1 1 0 1 0 1 1 0 x x x 0 1 x * * R INPUTB + (16 inputs read here in the 4 bytes) + 1 1 0 1 0 1 1 0 x x x 1 0 x * * * SOUNDCS 74ls155 @ s-ic40 + 1 1 0 1 0 1 1 0 x x x 1 0 x 0 0 R Read from Sound out latch, set s-ic12.1 + 1 1 0 1 0 1 1 0 x x x 1 0 x 0 1 R Read sound semaphores: /s-ic12.1 in d0 and /s-ic12.2 in d1 + 1 1 0 1 0 1 1 0 x x x 1 0 x 1 x R OPEN BUS + 1 1 0 1 0 1 1 0 x x x 1 0 x 0 0 W Write to Sound in latch, set s-ic12.2 + 1 1 0 1 0 1 1 0 x x x 1 0 x 0 1 W OPEN BUS + 1 1 0 1 0 1 1 0 x x x 1 0 x 1 0 W OPEN BUS + 1 1 0 1 0 1 1 0 x x x 1 0 x 1 1 W SNDRESET (value of d0 latched; if high, this sets s-ic12.1, clears s-ic12.2, clears soundnmi enable, clears sound control latch, resets sound z80(s), zeroes all dac input latches, resets ay-3-8910 chips, and resets the waitstate request) + 1 1 0 1 0 1 1 0 x x x 1 1 x x x W ACCELCL + 1 1 0 1 0 1 1 1 x x * * * * * * RW /VCRRQ + (TODO: palette sram) + 1 1 0 1 1 0 ? ? ? ? ? ? ? ? ? ? ? /SCROLRQ + 1 1 0 1 1 1 ? ? ? ? ? ? ? ? ? ? ? /S_POSI + 1 1 1 0 ? ? ? ? ? ? ? ? ? ? ? ? ? (unknown, cut off on schematic) + 1 1 1 1 ? ? ? ? ? ? ? ? ? ? ? ? ? (unknown, cut off on schematic) +*/ static ADDRESS_MAP_START( buggychl_map, AS_PROGRAM, 8, buggychl_state ) AM_RANGE(0x0000, 0x3fff) AM_ROM /* A22-04 (23) */ AM_RANGE(0x4000, 0x7fff) AM_ROM /* A22-05 (22) */ @@ -155,25 +198,28 @@ static ADDRESS_MAP_START( buggychl_map, AS_PROGRAM, 8, buggychl_state ) AM_RANGE(0x9000, 0x9fff) AM_WRITE(buggychl_sprite_lookup_w) AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank1") AM_WRITE(buggychl_chargen_w) AM_SHARE("charram") AM_RANGE(0xc800, 0xcfff) AM_RAM AM_SHARE("videoram") - AM_RANGE(0xd100, 0xd100) AM_WRITE(buggychl_ctrl_w) - AM_RANGE(0xd200, 0xd200) AM_WRITE(bankswitch_w) - AM_RANGE(0xd300, 0xd300) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w) - AM_RANGE(0xd303, 0xd303) AM_WRITE(buggychl_sprite_lookup_bank_w) - AM_RANGE(0xd400, 0xd400) AM_DEVREADWRITE("bmcu", taito68705_mcu_device, data_r, data_w) - AM_RANGE(0xd401, 0xd401) AM_READ(mcu_status_r) + AM_RANGE(0xd100, 0xd100) AM_MIRROR(0x00ff) AM_WRITE(buggychl_ctrl_w) + AM_RANGE(0xd200, 0xd200) AM_MIRROR(0x00ff) AM_WRITE(bankswitch_w) + AM_RANGE(0xd300, 0xd300) AM_MIRROR(0x00f8) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w) + // d301 = flp stuff, unused? + // d302 = mcu reset latched d0 + AM_RANGE(0xd303, 0xd303) AM_MIRROR(0x00f8) AM_WRITE(buggychl_sprite_lookup_bank_w) + // d304-d307 is SCCON, which seems to be for a bezel mounted 7seg score/time display like Grand Champion has + AM_RANGE(0xd400, 0xd400) AM_MIRROR(0x00fc) AM_DEVREADWRITE("bmcu", taito68705_mcu_device, data_r, data_w) + AM_RANGE(0xd401, 0xd401) AM_MIRROR(0x00fc) AM_READ(mcu_status_r) AM_RANGE(0xd500, 0xd57f) AM_WRITEONLY AM_SHARE("spriteram") - AM_RANGE(0xd600, 0xd600) AM_READ_PORT("DSW1") - AM_RANGE(0xd601, 0xd601) AM_READ_PORT("DSW2") - AM_RANGE(0xd602, 0xd602) AM_READ_PORT("DSW3") - AM_RANGE(0xd603, 0xd603) AM_READ_PORT("IN0") /* player inputs */ - AM_RANGE(0xd608, 0xd608) AM_READ_PORT("WHEEL") - AM_RANGE(0xd609, 0xd609) AM_READ_PORT("IN1") /* coin + accelerator */ -// AM_RANGE(0xd60a, 0xd60a) // other inputs, not used? -// AM_RANGE(0xd60b, 0xd60b) // other inputs, not used? - AM_RANGE(0xd610, 0xd610) AM_DEVREAD("soundlatch2", generic_latch_8_device, read) AM_DEVWRITE("soundlatch", generic_latch_8_device, write) - AM_RANGE(0xd611, 0xd611) AM_READ(sound_status_main_r) -// AM_RANGE(0xd613, 0xd613) AM_WRITE(sound_reset_w) - AM_RANGE(0xd618, 0xd618) AM_WRITENOP /* accelerator clear */ + AM_RANGE(0xd600, 0xd600) AM_MIRROR(0x00e4) AM_READ_PORT("DSW1") + AM_RANGE(0xd601, 0xd601) AM_MIRROR(0x00e4) AM_READ_PORT("DSW2") + AM_RANGE(0xd602, 0xd602) AM_MIRROR(0x00e4) AM_READ_PORT("DSW3") + AM_RANGE(0xd603, 0xd603) AM_MIRROR(0x00e4) AM_READ_PORT("IN0") /* player inputs */ + AM_RANGE(0xd608, 0xd608) AM_MIRROR(0x00e4) AM_READ_PORT("WHEEL") + AM_RANGE(0xd609, 0xd609) AM_MIRROR(0x00e4) AM_READ_PORT("IN1") /* coin + accelerator */ +// AM_RANGE(0xd60a, 0xd60a) AM_MIRROR(0x00e4) // other inputs, not used? +// AM_RANGE(0xd60b, 0xd60b) AM_MIRROR(0x00e4) // other inputs, not used? + AM_RANGE(0xd610, 0xd610) AM_MIRROR(0x00e4) AM_DEVREAD("soundlatch2", generic_latch_8_device, read) AM_DEVWRITE("soundlatch", generic_latch_8_device, write) + AM_RANGE(0xd611, 0xd611) AM_MIRROR(0x00e4) AM_READ(sound_status_main_r) +// AM_RANGE(0xd613, 0xd613) AM_MIRROR(0x00e4) AM_WRITE(sound_reset_w) + AM_RANGE(0xd618, 0xd618) AM_MIRROR(0x00e7) AM_WRITENOP /* accelerator clear; TODO: should we emulate the proper quadrature counter here? */ AM_RANGE(0xd700, 0xd7ff) AM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") AM_RANGE(0xd840, 0xd85f) AM_WRITEONLY AM_SHARE("scrollv") AM_RANGE(0xdb00, 0xdbff) AM_WRITEONLY AM_SHARE("scrollh") @@ -181,6 +227,10 @@ static ADDRESS_MAP_START( buggychl_map, AS_PROGRAM, 8, buggychl_state ) AM_RANGE(0xdc06, 0xdc06) AM_WRITE(buggychl_bg_scrollx_w) ADDRESS_MAP_END +/* The schematics for buggy challenge has the wrong sound board schematic attached to it. + (The schematic is for an unknown taito game, possibly never released.) + The final buggy challenge sound board is more similar to Fairyland Story sound + hardware, except it has two YM2149 chips instead of one, and much less ROM space. */ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, buggychl_state ) AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x4000, 0x47ff) AM_RAM @@ -188,11 +238,11 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, buggychl_state ) AM_RANGE(0x4802, 0x4803) AM_DEVWRITE("ay2", ay8910_device, address_data_w) AM_RANGE(0x4810, 0x481d) AM_DEVWRITE("msm", msm5232_device, write) AM_RANGE(0x4820, 0x4820) AM_RAM /* VOL/BAL for the 7630 on the MSM5232 output */ - AM_RANGE(0x4830, 0x4830) AM_RAM /* TRBL/BASS for the 7630 on the MSM5232 output */ + AM_RANGE(0x4830, 0x4830) AM_RAM /* TRBL/BASS for the 7630 on the MSM5232 output */ AM_RANGE(0x5000, 0x5000) AM_DEVREAD("soundlatch", generic_latch_8_device, read) AM_DEVWRITE("soundlatch2", generic_latch_8_device, write) - AM_RANGE(0x5001, 0x5001) AM_READ(sound_status_sound_r) AM_WRITE(nmi_enable_w) - AM_RANGE(0x5002, 0x5002) AM_WRITE(nmi_disable_w) - AM_RANGE(0x5003, 0x5003) AM_WRITE(sound_enable_w) // this actually controls the irq generation for the sound cpu as well as a few other things + AM_RANGE(0x5001, 0x5001) AM_READ(sound_status_sound_r) AM_DEVWRITE("soundnmi", input_merger_device, in_set<1>) + AM_RANGE(0x5002, 0x5002) AM_DEVWRITE("soundnmi", input_merger_device, in_clear<1>) + AM_RANGE(0x5003, 0x5003) AM_WRITE(sound_enable_w) // unclear what this actually controls AM_RANGE(0xe000, 0xefff) AM_ROM /* space for diagnostics ROM */ ADDRESS_MAP_END diff --git a/src/mame/includes/buggychl.h b/src/mame/includes/buggychl.h index 57e53ba0a69..2b517543e80 100644 --- a/src/mame/includes/buggychl.h +++ b/src/mame/includes/buggychl.h @@ -62,8 +62,6 @@ public: required_device m_soundlatch2; DECLARE_WRITE8_MEMBER(bankswitch_w); - DECLARE_WRITE8_MEMBER(nmi_disable_w); - DECLARE_WRITE8_MEMBER(nmi_enable_w); DECLARE_WRITE8_MEMBER(sound_enable_w); DECLARE_READ8_MEMBER(mcu_status_r); DECLARE_READ8_MEMBER(sound_status_main_r); -- cgit v1.2.3