From 7bf6964388f48f096c8fc1105b4d5ff7081a1344 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Sun, 5 Feb 2023 18:15:25 +0000 Subject: -cpu/arcompact: Rewrote core. (#10808) * Split into files by opcode encode type/group. * Refactored out macros. * Added additional opcodes. * Added interrupt logic. * Added stub handlers for used but unknown opcodes. -leapfrog/leapster.cpp updates: * Put some data uploaded by the leapster BIOS somewhere for debugging purposes. * Removed a read handler that was only there because of previous bad handling. * Noted some used Leapster side addresses. --- scripts/src/cpu.lua | 36 +- src/devices/cpu/arcompact/arcompact.cpp | 2881 ++++++- src/devices/cpu/arcompact/arcompact.h | 1434 ++-- src/devices/cpu/arcompact/arcompact_execute.cpp | 8210 +------------------- .../cpu/arcompact/arcompact_execute_ops_00to01.cpp | 200 + .../cpu/arcompact/arcompact_execute_ops_02to03.cpp | 123 + .../cpu/arcompact/arcompact_execute_ops_04.cpp | 888 +++ .../arcompact_execute_ops_04_2f_3f_zop.cpp | 63 + .../arcompact/arcompact_execute_ops_04_2f_sop.cpp | 336 + .../cpu/arcompact/arcompact_execute_ops_04_3x.cpp | 41 + .../cpu/arcompact/arcompact_execute_ops_04_aux.cpp | 153 + .../arcompact/arcompact_execute_ops_04_jumps.cpp | 149 + .../arcompact/arcompact_execute_ops_04_loop.cpp | 53 + .../cpu/arcompact/arcompact_execute_ops_05.cpp | 351 + .../arcompact/arcompact_execute_ops_05_2f_sop.cpp | 177 + .../cpu/arcompact/arcompact_execute_ops_06to0b.cpp | 41 + .../arcompact/arcompact_execute_ops_0c_16bit.cpp | 61 + .../arcompact/arcompact_execute_ops_0d_16bit.cpp | 66 + .../arcompact/arcompact_execute_ops_0e_16bit.cpp | 66 + .../arcompact_execute_ops_0f_00_07_16bit.cpp | 78 + .../arcompact_execute_ops_0f_00_16bit.cpp | 73 + .../arcompact/arcompact_execute_ops_0f_16bit.cpp | 370 + .../arcompact_execute_ops_12to16_16bit.cpp | 104 + .../arcompact/arcompact_execute_ops_17_16bit.cpp | 114 + .../arcompact/arcompact_execute_ops_18_16bit.cpp | 154 + .../arcompact/arcompact_execute_ops_19_16bit.cpp | 53 + .../arcompact_execute_ops_1ato1c_16bit.cpp | 60 + .../arcompact_execute_ops_1dto1f_16bit.cpp | 161 + src/devices/cpu/arcompact/arcompact_helper.ipp | 362 + src/devices/cpu/arcompact/arcompactdasm.cpp | 2619 ++++++- src/devices/cpu/arcompact/arcompactdasm.h | 1071 +-- .../cpu/arcompact/arcompactdasm_dispatch.cpp | 987 --- src/devices/cpu/arcompact/arcompactdasm_ops.cpp | 4585 +---------- .../cpu/arcompact/arcompactdasm_ops_00to01.cpp | 227 + .../cpu/arcompact/arcompactdasm_ops_02to03.cpp | 111 + src/devices/cpu/arcompact/arcompactdasm_ops_04.cpp | 470 ++ .../arcompact/arcompactdasm_ops_04_2f_3f_zop.cpp | 42 + .../cpu/arcompact/arcompactdasm_ops_04_2f_sop.cpp | 135 + .../cpu/arcompact/arcompactdasm_ops_04_3x.cpp | 102 + src/devices/cpu/arcompact/arcompactdasm_ops_05.cpp | 74 + .../cpu/arcompact/arcompactdasm_ops_05_2f_sop.cpp | 105 + .../cpu/arcompact/arcompactdasm_ops_06to0b.cpp | 46 + .../cpu/arcompact/arcompactdasm_ops_16bit.cpp | 722 ++ src/mame/leapfrog/leapster.cpp | 272 +- 44 files changed, 13211 insertions(+), 15215 deletions(-) create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_00to01.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_02to03.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_04.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_3f_zop.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_sop.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_04_3x.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_04_aux.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_04_jumps.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_04_loop.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_05.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_05_2f_sop.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_06to0b.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_0c_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_0d_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_0e_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_07_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_0f_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_12to16_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_17_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_18_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_19_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_1ato1c_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_execute_ops_1dto1f_16bit.cpp create mode 100644 src/devices/cpu/arcompact/arcompact_helper.ipp delete mode 100644 src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_00to01.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_02to03.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_04.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_3f_zop.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_sop.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_04_3x.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_05.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_05_2f_sop.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_06to0b.cpp create mode 100644 src/devices/cpu/arcompact/arcompactdasm_ops_16bit.cpp diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 50b1b5ee0f2..996fdbc52d8 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -123,14 +123,48 @@ if CPUS["ARCOMPACT"] then MAME_DIR .. "src/devices/cpu/arcompact/arcompact.cpp", MAME_DIR .. "src/devices/cpu/arcompact/arcompact.h", MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_00to01.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_02to03.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_04.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_04_jumps.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_04_loop.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_04_aux.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_sop.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_3f_zop.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_04_3x.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_05.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_05_2f_sop.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_06to0b.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_0c_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_0d_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_0e_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_0f_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_07_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_12to16_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_17_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_18_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_19_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_1ato1c_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute_ops_1dto1f_16bit.cpp", + MAME_DIR .. "src/devices/cpu/arcompact/arcompact_helper.ipp", } end if opt_tool(CPUS, "ARCOMPACT") then table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm.h") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm.cpp") - table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_00to01.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_02to03.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_04.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_sop.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_3f_zop.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_04_3x.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_05.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_05_2f_sop.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_06to0b.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops_16bit.cpp") end -------------------------------------------------- diff --git a/src/devices/cpu/arcompact/arcompact.cpp b/src/devices/cpu/arcompact/arcompact.cpp index f1055895d87..54c19c4d173 100644 --- a/src/devices/cpu/arcompact/arcompact.cpp +++ b/src/devices/cpu/arcompact/arcompact.cpp @@ -1,10 +1,9 @@ // license:BSD-3-Clause // copyright-holders:David Haywood /*********************************\ - ARCompact Core - The following procesors use the ARCompact instruction set + The following processors use the ARCompact instruction set - ARCtangent-A5 - ARC 600 @@ -13,7 +12,8 @@ (this is a skeleton core) ARCompact is a 32-bit CPU that freely mixes 32-bit and 16-bit instructions - various user customizations could be made as with the ARC A4 based processors + + Various user customizations could be made as with the ARC A4 based processors these include custom instructions and registers. \*********************************/ @@ -25,40 +25,208 @@ DEFINE_DEVICE_TYPE(ARCA5, arcompact_device, "arc_a5", "Argonaut ARCtangent A5") +uint32_t arcompact_device::arcompact_auxreg002_LPSTART_r() { return m_LP_START & 0xfffffffe; } +void arcompact_device::arcompact_auxreg002_LPSTART_w(uint32_t data) { m_LP_START = data & 0xfffffffe; } +uint32_t arcompact_device::arcompact_auxreg003_LPEND_r() { return m_LP_END & 0xfffffffe; } +void arcompact_device::arcompact_auxreg003_LPEND_w(uint32_t data) { m_LP_END = data & 0xfffffffe; } + +uint32_t arcompact_device::arcompact_auxreg00a_STATUS32_r() { return m_status32; } + +uint32_t arcompact_device::arcompact_auxreg00b_STATUS32_L1_r() { return m_status32_l1; } +uint32_t arcompact_device::arcompact_auxreg00c_STATUS32_L2_r() { return m_status32_l2; } +void arcompact_device::arcompact_auxreg00b_STATUS32_L1_w(uint32_t data) { m_status32_l1 = data; } +void arcompact_device::arcompact_auxreg00c_STATUS32_L2_w(uint32_t data) { m_status32_l2 = data; } + +void arcompact_device::arcompact_auxreg012_MULHI_w(uint32_t data) +{ + // The regular multiply result registers (r56 - MLO, r57 - MMID and r58 - MHI) are read-only + // this optional extension allows the program to directly set the value of MHI + // so that it's state can be restored + // + // (although the Leapster BIOS tries to write MMID directly when doing such a restoration + // despite otherwise going through the recommended procedure of multiplying the lower result + // by 1 to restore MLO and writing to this AUX address to restore MHI) + m_regs[REG_MHI] = data; +} + +uint32_t arcompact_device::arcompact_auxreg043_AUX_IRQ_LV12_r() +{ + logerror("%s: arcompact_auxreg043_AUX_IRQ_LV12_r\n", machine().describe_context()); + return m_AUX_IRQ_LV12; +} + +void arcompact_device::arcompact_auxreg043_AUX_IRQ_LV12_w(uint32_t data) +{ + logerror("%s: arcompact_auxreg043_AUX_IRQ_LV12_w %08x\n", machine().describe_context(), data); + if (data & 0x00000001) m_AUX_IRQ_LV12 &= ~0x00000001; + if (data & 0x00000002) m_AUX_IRQ_LV12 &= ~0x00000002; +} + + +uint32_t arcompact_device::arcompact_auxreg025_INTVECTORBASE_r() { return m_INTVECTORBASE & 0xfffffc00; } + +void arcompact_device::arcompact_auxreg025_INTVECTORBASE_w(uint32_t data) +{ + logerror("%s: m_INTVECTORBASE write %08x\n", machine().describe_context(), data); + m_INTVECTORBASE = data & 0xfffffc00; +} + +uint32_t arcompact_device::arcompact_auxreg012_TIMER0_r(offs_t offset) +{ + switch (offset) + { + case 0x00: + logerror("%s: TIMER0 COUNT read\n", machine().describe_context()); + return m_timer[0][0]; + case 0x01: + logerror("%s: TIMER0 CONTROL read\n", machine().describe_context()); + return m_timer[0][1]; + case 0x02: + logerror("%s: TIMER0 LIMIT read\n", machine().describe_context()); + return m_timer[0][2]; + } + return 0x00; +} + +uint32_t arcompact_device::arcompact_auxreg100_TIMER1_r(offs_t offset) +{ + switch (offset) + { + case 0x00: + logerror("%s: TIMER1 COUNT read\n", machine().describe_context()); + return m_timer[1][0]; + case 0x01: + logerror("%s: TIMER1 CONTROL read\n", machine().describe_context()); + return m_timer[1][1]; + case 0x02: + logerror("%s: TIMER1 LIMIT read\n", machine().describe_context()); + return m_timer[1][2]; + } + return 0x00; +} -uint32_t arcompact_device::arcompact_auxreg002_LPSTART_r() { return m_LP_START&0xfffffffe; } -void arcompact_device::arcompact_auxreg002_LPSTART_w(uint32_t data) { m_LP_START = data&0xfffffffe; } -uint32_t arcompact_device::arcompact_auxreg003_LPEND_r() { return m_LP_END&0xfffffffe; } -void arcompact_device::arcompact_auxreg003_LPEND_w(uint32_t data) { m_LP_END = data&0xfffffffe; } +void arcompact_device::arcompact_auxreg012_TIMER0_w(offs_t offset, uint32_t data) +{ + switch (offset) + { + case 0x00: + m_timer[0][0] = data; + logerror("%s: TIMER0 COUNT write %08x\n", machine().describe_context(), data); + break; + case 0x01: + m_timer[0][1] = data; + logerror("%s: TIMER0 CONTROL write %08x\n", machine().describe_context(), data); + break; + case 0x02: + m_timer[0][2] = data; + logerror("%s: TIMER0 LIMIT write %08x\n", machine().describe_context(), data); + break; + } +} -uint32_t arcompact_device::arcompact_auxreg00a_STATUS32_r() { return 0xffffdead; /*m_status32;*/ } +void arcompact_device::arcompact_auxreg100_TIMER1_w(offs_t offset, uint32_t data) +{ + switch (offset) + { + case 0x00: + m_timer[1][0] = data; + logerror("%s: TIMER1 COUNT write %08x\n", machine().describe_context(), data); + break; + case 0x01: + m_timer[1][1] = data; + logerror("%s: TIMER1 CONTROL write %08x\n", machine().describe_context(), data); + break; + case 0x02: + m_timer[1][2] = data; + logerror("%s: TIMER1 LIMIT write %08x\n", machine().describe_context(), data); + break; + } +} -uint32_t arcompact_device::arcompact_auxreg025_INTVECTORBASE_r() { return m_INTVECTORBASE&0xfffffc00; } -void arcompact_device::arcompact_auxreg025_INTVECTORBASE_w(uint32_t data) { m_INTVECTORBASE = data&0xfffffc00; } +uint32_t arcompact_device::arcompact_auxreg200_AUX_IRQ_LVL_r() +{ + logerror("%s: arcompact_auxreg200_AUX_IRQ_LVL_r\n", machine().describe_context()); + return 0; +} +void arcompact_device::arcompact_auxreg200_AUX_IRQ_LVL_w(uint32_t data) +{ + logerror("%s: arcompact_auxreg200_AUX_IRQ_LVL_w %08x\n", machine().describe_context(), data); + m_AUX_IRQ_LEV = data; +} -void arcompact_device::arcompact_auxreg_map(address_map &map) +void arcompact_device::arcompact_auxreg_map(address_map& map) { + //map(0x000000000, 0x000000000) // STATUS register in ARCtangent-A4 format (legacy) + //map(0x000000001, 0x000000001) // SEMAPHORE (for multi-cpu comms) map(0x000000002, 0x000000002).rw(FUNC(arcompact_device::arcompact_auxreg002_LPSTART_r), FUNC(arcompact_device::arcompact_auxreg002_LPSTART_w)); map(0x000000003, 0x000000003).rw(FUNC(arcompact_device::arcompact_auxreg003_LPEND_r), FUNC(arcompact_device::arcompact_auxreg003_LPEND_w)); - map(0x000000009, 0x000000009).r(FUNC(arcompact_device::arcompact_auxreg00a_STATUS32_r)); // r/o + //map(0x000000004, 0x000000004) // IDENTITY (processor ID register) + //map(0x000000005, 0x000000005) // DEBUG (various flags, including SLEEP) + //map(0x000000006, 0x000000006) // PC (alt way of reading current PC) + map(0x00000000a, 0x00000000a).r(FUNC(arcompact_device::arcompact_auxreg00a_STATUS32_r)); // r/o + map(0x00000000b, 0x00000000b).rw(FUNC(arcompact_device::arcompact_auxreg00b_STATUS32_L1_r), FUNC(arcompact_device::arcompact_auxreg00b_STATUS32_L1_w)); + map(0x00000000c, 0x00000000c).rw(FUNC(arcompact_device::arcompact_auxreg00c_STATUS32_L2_r), FUNC(arcompact_device::arcompact_auxreg00c_STATUS32_L2_w)); + + map(0x000000012, 0x000000012).w(FUNC(arcompact_device::arcompact_auxreg012_MULHI_w)); + + map(0x000000021, 0x000000023).rw(FUNC(arcompact_device::arcompact_auxreg012_TIMER0_r), FUNC(arcompact_device::arcompact_auxreg012_TIMER0_w)); + map(0x000000025, 0x000000025).rw(FUNC(arcompact_device::arcompact_auxreg025_INTVECTORBASE_r), FUNC(arcompact_device::arcompact_auxreg025_INTVECTORBASE_w)); -} -#define AUX_SPACE_ADDRESS_WIDTH 32 // IO space is 32 bits of dwords + //map(0x000000041, 0x000000041) // AUX_MACMODE (used by optional maths extensions) + + map(0x000000043, 0x000000043).rw(FUNC(arcompact_device::arcompact_auxreg043_AUX_IRQ_LV12_r), FUNC(arcompact_device::arcompact_auxreg043_AUX_IRQ_LV12_w)); -arcompact_device::arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + // these registers can be used to check which optional capabilities any given CPU was built with + //map(0x000000060, 0x000000060) // BCR_VER - Build Configuration Registers Version + //map(0x000000063, 0x000000063) // BTA_LINK_BUILD - Build configuration for BTA Registers + //map(0x000000065, 0x000000065) // EA_BUILD - Build configuration for Extended Arithmetic + //map(0x000000068, 0x000000068) // VECBASE_AC_BUILD - Build configuration for Interrupts + //map(0x00000006e, 0x00000006e) // RF_BUILD - Build configuration for Core Registers + //map(0x000000075, 0x000000075) // TIMER_BUILD - Build configuration for Processor Timers + //map(0x00000007b, 0x00000007b) // MULTIPLY_BUILD - Build configuration for Multiply + //map(0x00000007c, 0x00000007c) // SWAP_BUILD - Build configuration for Swap + //map(0x00000007d, 0x00000007d) // NORM_BUILD - Build configuration for Normalize + //map(0x00000007e, 0x00000007e) // MINMAX_BUILD - Build configuration for Min/Max + //map(0x00000007f, 0x00000007f) // BARREL_BUILD - Build configuration for Barrel Shift + + map(0x000000100, 0x000000102).rw(FUNC(arcompact_device::arcompact_auxreg100_TIMER1_r), FUNC(arcompact_device::arcompact_auxreg100_TIMER1_w)); + + map(0x000000200, 0x000000200).rw(FUNC(arcompact_device::arcompact_auxreg200_AUX_IRQ_LVL_r), FUNC(arcompact_device::arcompact_auxreg200_AUX_IRQ_LVL_w)); + //map(0x000000201, 0x000000201) // AUX_IRQ_HINT + + // below are ARC700 registers + //map(0x000000400, 0x000000400) // ERET + //map(0x000000401, 0x000000401) // ERBTA + //map(0x000000402, 0x000000402) // ERSTATUS + //map(0x000000403, 0x000000403) // ECR + //map(0x000000404, 0x000000404) // EFA + //map(0x00000040a, 0x00000040a) // ICAUSE1 + //map(0x00000040b, 0x00000040b) // ICAUSE2 + //map(0x00000040c, 0x00000040c) // AUX_IENABLE + //map(0x00000040d, 0x00000040d) // AUX_ITRIGGER + //map(0x000000410, 0x000000410) // XPU + //map(0x000000412, 0x000000412) // BTA + //map(0x000000413, 0x000000413) // BTA_L1 + //map(0x000000414, 0x000000414) // BTA_L2 + //map(0x000000415, 0x000000415) // AUX_IRQ_PULSE_CANCEL + //map(0x000000416, 0x000000416) // AUX_IRQ_PENDING +} + +arcompact_device::arcompact_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock) : cpu_device(mconfig, ARCA5, tag, owner, clock) - , m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0) // some docs describe these as 'middle endian'?! - , m_io_config( "io", ENDIANNESS_LITTLE, 32, AUX_SPACE_ADDRESS_WIDTH, -2, address_map_constructor(FUNC(arcompact_device::arcompact_auxreg_map), this)) + , m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0) // some docs describe these as 'middle endian' + , m_io_config("io", ENDIANNESS_LITTLE, 32, 32, -2, address_map_constructor(FUNC(arcompact_device::arcompact_auxreg_map), this)) + , m_default_vector_base(0) { } device_memory_interface::space_config_vector arcompact_device::memory_space_config() const { - return space_config_vector { + return space_config_vector{ std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_IO, &m_io_config) }; @@ -93,21 +261,40 @@ void arcompact_device::device_start() m_program = &space(AS_PROGRAM); m_io = &space(AS_IO); - state_add( ARCOMPACT_PC, "PC", m_debugger_temp).callimport().callexport().formatstr("%08X"); + state_add(ARCOMPACT_PC, "PC", m_debugger_temp).callimport().callexport().formatstr("%08X"); - state_add( ARCOMPACT_STATUS32, "STATUS32", m_debugger_temp).callimport().callexport().formatstr("%08X"); - state_add( ARCOMPACT_LP_START, "LP_START", m_debugger_temp).callimport().callexport().formatstr("%08X"); - state_add( ARCOMPACT_LP_END, "LP_END", m_debugger_temp).callimport().callexport().formatstr("%08X"); + state_add(ARCOMPACT_STATUS32, "STATUS32", m_debugger_temp).callimport().callexport().formatstr("%08X"); + state_add(ARCOMPACT_LP_START, "LP_START", m_debugger_temp).callimport().callexport().formatstr("%08X"); + state_add(ARCOMPACT_LP_END, "LP_END", m_debugger_temp).callimport().callexport().formatstr("%08X"); state_add(STATE_GENPCBASE, "CURPC", m_debugger_temp).callimport().callexport().noshow(); for (int i = 0x100; i < 0x140; i++) { - state_add(i, arcompact_disassembler::regnames[i-0x100], m_debugger_temp).callimport().callexport().formatstr("%08X"); + state_add(i, arcompact_disassembler::regnames[i - 0x100], m_debugger_temp).callimport().callexport().formatstr("%08X"); } + m_irq_pending = false; set_icountptr(m_icount); + + save_item(NAME(m_pc)); + save_item(NAME(m_regs)); + save_item(NAME(m_delayactive)); + save_item(NAME(m_delaylinks)); + save_item(NAME(m_delayjump)); + save_item(NAME(m_allow_loop_check)); + save_item(NAME(m_irq_pending)); + save_item(NAME(m_status32)); + save_item(NAME(m_status32_l1)); + save_item(NAME(m_status32_l2)); + save_item(NAME(m_debug)); + save_item(NAME(m_timer)); + save_item(NAME(m_LP_START)); + save_item(NAME(m_LP_END)); + save_item(NAME(m_INTVECTORBASE)); + save_item(NAME(m_AUX_IRQ_LV12)); + save_item(NAME(m_AUX_IRQ_LEV)); } @@ -116,34 +303,33 @@ void arcompact_device::device_start() // to a known location where it can be read //------------------------------------------------- -void arcompact_device::state_export(const device_state_entry &entry) +void arcompact_device::state_export(const device_state_entry& entry) { int index = entry.index(); switch (index) { - case ARCOMPACT_PC: - case STATE_GENPCBASE: - m_debugger_temp = m_pc; - break; - - case ARCOMPACT_STATUS32: - m_debugger_temp = m_status32; - break; - case ARCOMPACT_LP_START: - m_debugger_temp = m_LP_START; - break; - case ARCOMPACT_LP_END: - m_debugger_temp = m_LP_END; - break; + case ARCOMPACT_PC: + case STATE_GENPCBASE: + m_debugger_temp = m_pc; + break; - default: - if ((index >= 0x100) && (index < 0x140)) - { - m_debugger_temp = m_regs[index - 0x100]; - } - break; + case ARCOMPACT_STATUS32: + m_debugger_temp = m_status32; + break; + case ARCOMPACT_LP_START: + m_debugger_temp = m_LP_START; + break; + case ARCOMPACT_LP_END: + m_debugger_temp = m_LP_END; + break; + default: + if ((index >= 0x100) && (index < 0x140)) + { + m_debugger_temp = m_regs[index - 0x100]; + } + break; } } @@ -153,57 +339,2610 @@ void arcompact_device::state_export(const device_state_entry &entry) // after it has been set //------------------------------------------------- -void arcompact_device::state_import(const device_state_entry &entry) +void arcompact_device::state_import(const device_state_entry& entry) { int index = entry.index(); switch (index) { - case ARCOMPACT_PC: - case STATE_GENPCBASE: - m_pc = (m_debugger_temp & 0xfffffffe); - break; - - case ARCOMPACT_STATUS32: - m_status32 = m_debugger_temp; - break; - case ARCOMPACT_LP_START: - m_LP_START = m_debugger_temp; - break; - case ARCOMPACT_LP_END: - m_LP_END = m_debugger_temp; - break; - - default: - if ((index >= 0x100) && (index < 0x140)) - { - m_regs[index - 0x100] = m_debugger_temp; - } - break; + case ARCOMPACT_PC: + case STATE_GENPCBASE: + m_pc = (m_debugger_temp & 0xfffffffe); + break; + + case ARCOMPACT_STATUS32: + m_status32 = m_debugger_temp; + break; + case ARCOMPACT_LP_START: + m_LP_START = m_debugger_temp; + break; + case ARCOMPACT_LP_END: + m_LP_END = m_debugger_temp; + break; + + default: + if ((index >= 0x100) && (index < 0x140)) + { + m_regs[index - 0x100] = m_debugger_temp; + } + break; } } void arcompact_device::device_reset() { - m_pc = 0x00000000; + m_pc = m_INTVECTORBASE = m_default_vector_base; - m_delayactive = 0; + m_delayactive = false; m_delayjump = 0x00000000; + m_irq_pending = false; - for (auto & elem : m_regs) + for (auto& elem : m_regs) elem = 0; m_status32 = 0; + m_status32_l1 = 0; + m_status32_l2 = 0; + m_debug = 0; + m_LP_START = 0; m_LP_END = 0; - m_INTVECTORBASE = 0; + m_AUX_IRQ_LV12 = 0; + m_AUX_IRQ_LEV = 0x000000c0; // only 2 interrupts are set to 'medium' priority (level 2) by default. + m_allow_loop_check = true; + + for (int t = 0; t < 2; t++) + for (int r = 0; r < 3; r++) + m_timer[t][r] = 0x00; } /*****************************************************************************/ - void arcompact_device::execute_set_input(int irqline, int state) { + if (state == ASSERT_LINE) + m_irq_pending = true; + else + m_irq_pending = false; +} + +/*****************************************************************************/ + +uint32_t arcompact_device::get_instruction(uint32_t op) +{ + uint8_t instruction = ((op & 0xf800) >> 11); + + if (instruction < 0x0c) + { + op <<= 16; + op |= READ16((m_pc + 2)); + + switch (instruction & 0x3f) // 32-bit instructions (with optional extra dword for immediate data) + { + default: return -1; + case 0x00: // Bcc + { + uint8_t subinstr = (op & 0x00010000) >> 16; + + switch (subinstr & 0x01) + { + default: return -1; + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// B<.d> s21 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_B_cc_D_s21(op); // Branch Conditionally + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// B<.d> s25 0000 0sss ssss sss1 SSSS SSSS SSNR tttt +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_B_D_s25(op); // Branch Unconditionally Far + } + } + } + case 0x01: // BLcc/BRcc + { + uint8_t subinstr = (op & 0x00010000) >> 16; + switch (subinstr & 0x01) + { + default: return -1; + case 0x00: // Branch & Link + { + uint8_t subinstr2 = (op & 0x00020000) >> 17; + switch (subinstr2) + { + default: return -1; + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BL<.cc><.d> s21 0000 1sss ssss ss00 SSSS SSSS SSNQ QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BL_cc_d_s21(op); // Branch and Link Conditionally + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BL<.d> s25 0000 1sss ssss ss10 SSSS SSSS SSNR tttt +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BL_d_s25(op); // Branch and Link Unconditional Far + } + } + } + case 0x01: // Branch on Compare + { + uint8_t subinstr2 = (op & 0x00000010) >> 4; + + switch (subinstr2) + { + default: return -1; + case 0x00: // Branch on Compare Register-Register + { + uint8_t subinstr3 = op & 0x0000000f; + switch (subinstr3) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BREQ<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0000 +// BREQ b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0000 (+ Limm) +// BREQ limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 0); // BREQ (reg-reg) + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRNE<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0001 +// BRNE b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0001 (+ Limm) +// BRNE limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 1); // BRNE (reg-reg) + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLT<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0010 +// BRLT b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0010 (+ Limm) +// BRLT limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 2); // BRLT (reg-reg) + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRGE<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0011 +// BRGE b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0011 (+ Limm) +// BRGE limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 3); // BRGE (reg-reg) + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLO<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0100 +// BRLO b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0100 (+ Limm) +// BRLO limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 4); // BRLO (reg-reg) + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRHS b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0101 (+ Limm) +// BRHS limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0101 (+ Limm) +// BRHS<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0101 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 5); // BRHS (reg-reg) + } + case 0x0e: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT0<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 1110 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 6); // BBIT0 (reg-reg) + } + case 0x0f: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT1<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_reg(op, 7); // BBIT1 (reg-reg) + } + default: + { + // 0x06 - 0x0d + return arcompact_handle_reserved(instruction, subinstr, subinstr2, subinstr3, op); // illegal + } + } + } + case 0x01: // Branch on Compare/Bit Test Register-Immediate + { + uint8_t subinstr3 = op & 0x0000000f; + switch (subinstr3) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BREQ<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0000 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 0); // BREQ (reg-imm) + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRNE<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0001 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 1); // BRNE (reg-imm) + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLT<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0010 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 2); // BRLT (reg-imm) + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRGE<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0011 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 3); // BRGE (reg-imm) + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLO<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0100 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 4); // BRLO (reg-imm) + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRHS<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0101 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 5); // BRHS (reg-imm) + } + case 0x0e: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT0<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB uuuu uuN1 1110 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 6); // BBIT0 (reg-imm) + } + case 0x0f: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT1<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB uuuu uuN1 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRxx_reg_imm(op, 7); // BBIT1 (reg-imm) + } + default: + { + // 0x06 - 0x0d + return arcompact_handle_reserved(instruction, subinstr, subinstr2, subinstr3, op); // illegal + } + } + } + } + } + } + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I +// LD<.x><.aa><.di> a,[b,s9] 0001 0bbb ssss ssss SBBB DaaZ ZXAA AAAA +// LD<.x><.di> a,[limm] 0001 0110 0000 0000 0111 DRRZ ZXAA AAAA (+ Limm) +// LD<.x><.aa><.di> 0,[b,s9] 0001 0bbb ssss ssss SBBB DaaZ ZX11 1110 +// LD<.x><.di> 0,[limm] 0001 0110 0000 0000 0111 DRRZ ZX11 1110 (+ Limm) +// +// PREFETCH<.aa> [b,s9] 0001 0bbb ssss ssss SBBB 0aa0 0011 1110 +// PREFETCH [limm] 0001 0110 0000 0000 0111 0RR0 0011 1110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_LD_r_o(op); // LD r+o + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I +// ST<.aa><.di> c,[b,s9] 0001 1bbb ssss ssss SBBB CCCC CCDa aZZR +// ST<.di> c,[limm] 0001 1110 0000 0000 0111 CCCC CCDR RZZR (+ Limm) +// ST<.aa><.di> limm,[b,s9] 0001 1bbb ssss ssss SBBB 1111 10Da aZZR (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_ST_r_o(op); // ST r+o + } + case 0x04: // op a,b,c (basecase) + { + uint8_t subinstr = (op & 0x003f0000) >> 16; + + switch (subinstr & 0x3f) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADD<.f> a,b,c 0010 0bbb 0000 0000 FBBB CCCC CCAA AAAA +// ADD<.f> a,b,u6 0010 0bbb 0100 0000 FBBB uuuu uuAA AAAA +// ADD<.f> b,b,s12 0010 0bbb 1000 0000 FBBB ssss ssSS SSSS +// ADD<.cc><.f> b,b,c 0010 0bbb 1100 0000 FBBB CCCC CC0Q QQQQ +// ADD<.cc><.f> b,b,u6 0010 0bbb 1100 0000 FBBB uuuu uu1Q QQQQ +// ADD<.f> a,limm,c 0010 0110 0000 0000 F111 CCCC CCAA AAAA (+ Limm) +// ADD<.f> a,b,limm 0010 0bbb 0000 0000 FBBB 1111 10AA AAAA (+ Limm) +// ADD<.cc><.f> b,b,limm 0010 0bbb 1100 0000 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD<.f> 0,b,c 0010 0bbb 0000 0000 FBBB CCCC CC11 1110 +// ADD<.f> 0,b,u6 0010 0bbb 0100 0000 FBBB uuuu uu11 1110 +// ADD<.f> 0,b,limm 0010 0bbb 0000 0000 FBBB 1111 1011 1110 (+ Limm) +// ADD<.cc><.f> 0,limm,c 0010 0110 1100 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ADD_do_op); // ADD + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADC<.f> a,b,c 0010 0bbb 0000 0001 FBBB CCCC CCAA AAAA +// ADC<.f> a,b,u6 0010 0bbb 0100 0001 FBBB uuuu uuAA AAAA +// ADC<.f> b,b,s12 0010 0bbb 1000 0001 FBBB ssss ssSS SSSS +// ADC<.cc><.f> b,b,c 0010 0bbb 1100 0001 FBBB CCCC CC0Q QQQQ +// ADC<.cc><.f> b,b,u6 0010 0bbb 1100 0001 FBBB uuuu uu1Q QQQQ +// ADC<.f> a,limm,c 0010 0110 0000 0001 F111 CCCC CCAA AAAA (+ Limm) +// ADC<.f> a,b,limm 0010 0bbb 0000 0001 FBBB 1111 10AA AAAA (+ Limm) +// ADC<.cc><.f> b,b,limm 0010 0bbb 1100 0001 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADC<.f> 0,b,c 0010 0bbb 0000 0001 FBBB CCCC CC11 1110 +// ADC<.f> 0,b,u6 0010 0bbb 0100 0001 FBBB uuuu uu11 1110 +// ADC<.f> 0,b,limm 0010 0bbb 0000 0001 FBBB 1111 1011 1110 (+ Limm) +// ADC<.cc><.f> 0,limm,c 0010 0110 1100 0001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ADC_do_op); // ADC + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SUB<.f> a,b,c 0010 0bbb 0000 0010 FBBB CCCC CCAA AAAA +// SUB<.f> a,b,u6 0010 0bbb 0100 0010 FBBB uuuu uuAA AAAA +// SUB<.f> b,b,s12 0010 0bbb 1000 0010 FBBB ssss ssSS SSSS +// SUB<.cc><.f> b,b, c 0010 0bbb 1100 0010 FBBB CCCC CC0Q QQQQ +// SUB<.cc><.f> b,b,u6 0010 0bbb 1100 0010 FBBB uuuu uu1Q QQQQ +// SUB<.f> a,limm,c 0010 0110 0000 0010 F111 CCCC CCAA AAAA (+ Limm) +// SUB<.f> a,b,limm 0010 0bbb 0000 0010 FBBB 1111 10AA AAAA (+ Limm) +// SUB<.cc><.f> b,b,limm 0010 0bbb 1100 0010 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB <.f> 0,b,c 0010 0bbb 0000 0010 FBBB CCCC CC11 1110 +// SUB <.f> 0,b,u6 0010 0bbb 0100 0010 FBBB uuuu uu11 1110 +// SUB <.f> 0,b,limm 0010 0bbb 0000 0010 FBBB 1111 1011 1110 (+ Limm) +// SUB <.cc><.f> 0,limm,c 0010 0110 1100 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_SUB_do_op); // SUB + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SBC<.f> a,b,c 0010 0bbb 0000 0011 FBBB CCCC CCAA AAAA +// SBC<.f> a,b,u6 0010 0bbb 0100 0011 FBBB uuuu uuAA AAAA +// SBC<.f> b,b,s12 0010 0bbb 1000 0011 FBBB ssss ssSS SSSS +// SBC<.cc><.f> b,b,c 0010 0bbb 1100 0011 FBBB CCCC CC0Q QQQQ +// SBC<.cc><.f> b,b,u6 0010 0bbb 1100 0011 FBBB uuuu uu1Q QQQQ +// SBC<.f> a,limm,c 0010 0110 0000 0011 F111 CCCC CCAA AAAA (+ Limm) +// SBC<.f> a,b,limm 0010 0bbb 0000 0011 FBBB 1111 10AA AAAA (+ Limm) +// SBC<.cc><.f> b,b,limm 0010 0bbb 1100 0011 FBBB 1111 100Q QQQQ (+ Limm) +// +// SBC<.f> 0,b,c 0010 0bbb 0000 0011 FBBB CCCC CC11 1110 +// SBC<.f> 0,b,u6 0010 0bbb 0100 0011 FBBB uuuu uu11 1110 +// SBC<.f> 0,b,limm 0010 0bbb 0000 0011 FBBB 1111 1011 1110 (+ Limm) +// SBC<.cc><.f> 0,limm,c 0010 0110 1100 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_SBC_do_op); // SBC + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// AND<.f> a,b,c 0010 0bbb 0000 0100 FBBB CCCC CCAA AAAA +// AND<.f> a,b,u6 0010 0bbb 0100 0100 FBBB uuuu uuAA AAAA +// AND<.f> b,b,s12 0010 0bbb 1000 0100 FBBB ssss ssSS SSSS +// AND<.cc><.f> b,b,c 0010 0bbb 1100 0100 FBBB CCCC CC0Q QQQQ +// AND<.cc><.f> b,b,u6 0010 0bbb 1100 0100 FBBB uuuu uu1Q QQQQ +// AND<.f> a,limm,c 0010 0110 0000 0100 F111 CCCC CCAA AAAA (+ Limm) +// AND<.f> a,b,limm 0010 0bbb 0000 0100 FBBB 1111 10AA AAAA (+ Limm) +// AND<.cc><.f> b,b,limm 0010 0bbb 1100 0100 FBBB 1111 100Q QQQQ (+ Limm) +// +// AND<.f> 0,b,c 0010 0bbb 0000 0100 FBBB CCCC CC11 1110 +// AND<.f> 0,b,u6 0010 0bbb 0100 0100 FBBB uuuu uu11 1110 +// AND<.f> 0,b,limm 0010 0bbb 0000 0100 FBBB 1111 1011 1110 (+ Limm) +// AND<.cc><.f> 0,limm,c 0010 0110 1100 0100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_AND_do_op); // AND + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// OR<.f> a,b,c 0010 0bbb 0000 0101 FBBB CCCC CCAA AAAA +// OR<.f> a,b,u6 0010 0bbb 0100 0101 FBBB uuuu uuAA AAAA +// OR<.f> b,b,s12 0010 0bbb 1000 0101 FBBB ssss ssSS SSSS +// OR<.cc><.f> b,b,c 0010 0bbb 1100 0101 FBBB CCCC CC0Q QQQQ +// OR<.cc><.f> b,b,u6 0010 0bbb 1100 0101 FBBB uuuu uu1Q QQQQ +// OR<.f> a,limm,c 0010 0110 0000 0101 F111 CCCC CCAA AAAA (+ Limm) +// OR<.f> a,b,limm 0010 0bbb 0000 0101 FBBB 1111 10AA AAAA (+ Limm) +// OR<.cc><.f> b,b,limm 0010 0bbb 1100 0101 FBBB 1111 100Q QQQQ (+ Limm) +// +// OR<.f> 0,b,c 0010 0bbb 0000 0101 FBBB CCCC CC11 1110 +// OR<.f> 0,b,u6 0010 0bbb 0100 0101 FBBB uuuu uu11 1110 +// OR<.f> 0,b,limm 0010 0bbb 0000 0101 FBBB 1111 1011 1110 (+ Limm) +// OR<.cc><.f> 0,limm,c 0010 0110 1100 010 1 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_OR_do_op); // OR + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// BIC<.f> a,b,c 0010 0bbb 0000 0110 FBBB CCCC CCAA AAAA +// BIC<.f> a,b,u6 0010 0bbb 0100 0110 FBBB uuuu uuAA AAAA +// BIC<.f> b,b,s12 0010 0bbb 1000 0110 FBBB ssss ssSS SSSS +// BIC<.cc><.f> b,b,c 0010 0bbb 1100 0110 FBBB CCCC CC0Q QQQQ +// BIC<.cc><.f> b,b,u6 0010 0bbb 1100 0110 FBBB uuuu uu1Q QQQQ +// BIC<.f> a,limm,c 0010 0110 0000 0110 F111 CCCC CCAA AAAA (+ Limm) +// BIC<.f> a,b,limm 0010 0bbb 0000 0110 FBBB 1111 10AA AAAA (+ Limm) +// BIC<.cc><.f> b,b,limm 0010 0bbb 1100 0110 FBBB 1111 100Q QQQQ (+ Limm) +// +// BIC<.f> 0,b,c 0010 0bbb 0000 0110 FBBB CCCC CC11 1110 +// BIC<.f> 0,b,u6 0010 0bbb 0100 0110 FBBB uuuu uu11 1110 +// BIC<.f> 0,b,limm 0010 0bbb 0000 0110 FBBB 1111 1011 1110 (+ Limm) +// BIC<.cc><.f> 0,limm,c 0010 0110 1100 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_BIC_do_op); // BIC + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// XOR<.f> a,b,c 0010 0bbb 0000 0111 FBBB CCCC CCAA AAAA +// XOR<.f> a,b,u6 0010 0bbb 0100 0111 FBBB uuuu uuAA AAAA +// XOR<.f> b,b,s12 0010 0bbb 1000 0111 FBBB ssss ssSS SSSS +// XOR<.cc><.f> b,b,c 0010 0bbb 1100 0111 FBBB CCCC CC0Q QQQQ +// XOR<.cc><.f> b,b,u6 0010 0bbb 1100 0111 FBBB uuuu uu1Q QQQQ +// XOR<.f> a,limm,c 0010 0110 0000 0111 F111 CCCC CCAA AAAA (+ Limm) +// XOR<.f> a,b,limm 0010 0bbb 0000 0111 FBBB 1111 10AA AAAA (+ Limm) +// XOR<.cc><.f> b,b,limm 0010 0bbb 1100 0111 FBBB 1111 100Q QQQQ (+ Limm) +// +// XOR<.f> 0,b,c 0010 0bbb 0000 0111 FBBB CCCC CC11 1110 +// XOR<.f> 0,b,u6 0010 0bbb 0100 0111 FBBB uuuu uu11 1110 +// XOR<.f> 0,b,limm 0010 0bbb 0000 0111 FBBB 1111 1011 1110 (+ Limm) +// XOR<.cc><.f> 0,limm,c 0010 0110 1100 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_XOR_do_op); // XOR + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MAX<.f> a,b,c 0010 0bbb 0000 1000 FBBB CCCC CCAA AAAA +// MAX<.f> a,b,u6 0010 0bbb 0100 1000 FBBB uuuu uuAA AAAA +// MAX<.f> b,b,s12 0010 0bbb 1000 1000 FBBB ssss ssSS SSSS +// MAX<.cc><.f> b,b,c 0010 0bbb 1100 1000 FBBB CCCC CC0Q QQQQ +// MAX<.cc><.f> b,b,u6 0010 0bbb 1100 1000 FBBB uuuu uu1Q QQQQ +// MAX<.f> a,limm,c 0010 0110 0000 1000 F111 CCCC CCAA AAAA (+ Limm) +// MAX<.f> a,b,limm 0010 0bbb 0000 1000 FBBB 1111 10AA AAAA (+ Limm) +// MAX<.cc><.f> b,b,limm 0010 0bbb 1100 1000 FBBB 1111 100Q QQQQ (+ Limm) +// +// MAX<.f> 0,b,c 0010 0bbb 0000 1000 FBBB CCCC CC11 1110 +// MAX<.f> 0,b,u6 0010 0bbb 0100 1000 FBBB uuuu uu11 1110 +// MAX<.f> 0,b,limm 0010 0bbb 0000 1000 FBBB 1111 1011 1110 (+ Limm) +// MAX<.cc><.f> 0,limm,c 0010 0110 1100 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_MAX_do_op); // MAX + } + case 0x09: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MIN<.f> a,b,c 0010 0bbb 0000 1001 FBBB CCCC CCAA AAAA +// MIN<.f> a,b,u6 0010 0bbb 0100 1001 FBBB uuuu uuAA AAAA +// MIN<.f> b,b,s12 0010 0bbb 1000 1001 FBBB ssss ssSS SSSS +// MIN<.cc><.f> b,b,c 0010 0bbb 1100 1001 FBBB CCCC CC0Q QQQQ +// MIN<.cc><.f> b,b,u6 0010 0bbb 1100 1001 FBBB uuuu uu1Q QQQQ +// MIN<.f> a,limm,c 0010 0110 0000 1001 F111 CCCC CCAA AAAA (+ Limm) +// MIN<.f> a,b,limm 0010 0bbb 0000 1001 FBBB 1111 10AA AAAA (+ Limm) +// MIN<.cc><.f> b,b,limm 0010 0bbb 1100 1001 FBBB 1111 100Q QQQQ (+ Limm) +// +// MIN<.f> 0,b,c 0010 0bbb 0000 1001 FBBB CCCC CC11 1110 +// MIN<.f> 0,b,u6 0010 0bbb 0100 1001 FBBB uuuu uu11 1110 +// MIN<.f> 0,b,limm 0010 0bbb 0000 1001 FBBB 1111 1011 1110 (+ Limm) +// MIN<.cc><.f> 0,limm,c 0010 0110 1100 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_MIN_do_op); // MIN + } + case 0x0a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MOV<.f> b,s12 0010 0bbb 1000 1010 FBBB ssss ssSS SSSS +// MOV<.cc><.f> b,c 0010 0bbb 1100 1010 FBBB CCCC CC0Q QQQQ +// MOV<.cc><.f> b,u6 0010 0bbb 1100 1010 FBBB uuuu uu1Q QQQQ +// MOV<.cc><.f> b,limm 0010 0bbb 1100 1010 FBBB 1111 100Q QQQQ (+ Limm) +// +// MOV<.f> 0,s12 0010 0110 1000 1010 F111 ssss ssSS SSSS +// MOV<.cc><.f> 0,c 0010 0110 1100 1010 F111 CCCC CC0Q QQQQ +// MOV<.cc><.f> 0,u6 0010 0110 1100 1010 F111 uuuu uu1Q QQQQ +// MOV<.cc><.f> 0,limm 0010 0110 1100 1010 F111 1111 100Q QQQQ (+ Limm) +// +// NOP 0010 0110 0100 1010 0111 0000 0000 0000 (NOP is a custom encoded MOV?) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_MOV(op); // MOV + } + case 0x0b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// TST b,s12 0010 0bbb 1000 1011 1BBB ssss ssSS SSSS +// TST<.cc> b,c 0010 0bbb 1100 1011 1BBB CCCC CC0Q QQQQ +// TST<.cc> b,u6 0010 0bbb 1100 1011 1BBB uuuu uu1Q QQQQ +// TST<.cc> b,limm 0010 0bbb 1100 1011 1BBB 1111 100Q QQQQ (+ Limm) +// TST<.cc> limm,c 0010 0110 1100 1011 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_nowriteback_forced_flag(op, handleop32_TST_do_op); // TST + } + case 0x0c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// CMP b,s12 0010 0bbb 1000 1100 1BBB ssss ssSS SSSS +// CMP<.cc> b,c 0010 0bbb 1100 1100 1BBB CCCC CC0Q QQQQ +// CMP<.cc> b,u6 0010 0bbb 1100 1100 1BBB uuuu uu1Q QQQQ +// CMP<.cc> b,limm 0010 0bbb 1100 1100 1BBB 1111 100Q QQQQ (+ Limm) +// CMP<.cc> limm,c 0010 0110 1100 1100 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_nowriteback_forced_flag(op, handleop32_CMP_do_op); // CMP + } + case 0x0d: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RCMP b,s12 0010 0bbb 1000 1101 1BBB ssss ssSS SSSS +// RCMP<.cc> b,c 0010 0bbb 1100 1101 1BBB CCCC CC0Q QQQQ +// RCMP<.cc> b,u6 0010 0bbb 1100 1101 1BBB uuuu uu1Q QQQQ +// RCMP<.cc> b,limm 0010 0bbb 1100 1101 1BBB 1111 100Q QQQQ (+ Limm) +// RCMP<.cc> limm,c 0010 0110 1100 1101 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_nowriteback_forced_flag(op, handleop32_RCMP_do_op); // RCMP + } + case 0x0e: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RSUB<.f> a,b,c 0010 0bbb 0000 1110 FBBB CCCC CCAA AAAA +// RSUB<.f> a,b,u6 0010 0bbb 0100 1110 FBBB uuuu uuAA AAAA +// NEG<.f> a,b 0010 0bbb 0100 1110 FBBB 0000 00AA AAAA (NEG is an alias) +// +// RSUB<.f> b,b,s12 0010 0bbb 1000 1110 FBBB ssss ssSS SSSS +// RSUB<.cc><.f> b,b,c 0010 0bbb 1100 1110 FBBB CCCC CC0Q QQQQ +// RSUB<.cc><.f> b,b,u6 0010 0bbb 1100 1110 FBBB uuuu uu1Q QQQQ +// NEG<.cc><.f> b,b 0010 0bbb 1100 1110 FBBB 0000 001Q QQQQ (NEG is an alias) +// +// RSUB<.f> a,limm,c 0010 0110 0000 1110 F111 CCCC CCAA AAAA (+ Limm) +// RSUB<.f> a,b,limm 0010 0bbb 0000 1110 FBBB 1111 10AA AAAA (+ Limm) +// RSUB<.cc><.f> b,b,limm 0010 0bbb 1100 1110 FBBB 1111 100Q QQQQ (+ Limm) +// +// RSUB<.f> 0,b,c 0010 0bbb 0000 1110 FBBB CCCC CC11 1110 +// RSUB<.f> 0,b,u6 0010 0bbb 0100 1110 FBBB uuuu uu11 1110 +// RSUB<.f> 0,b,limm 0010 0bbb 0000 1110 FBBB 1111 1011 1110 (+ Limm) +// RSUB<.cc><.f> 0,limm,c 0010 0110 1100 1110 F111 CCCC CC0Q QQQQ (+ Limm) +// +// IIII I SS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_RSUB_do_op); // RSUB + } + case 0x0f: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BSET<.f> a,b,c 0010 0bbb 0000 1111 FBBB CCCC CCAA AAAA +// BSET<.f> a,b,u6 0010 0bbb 0100 1111 FBBB uuuu uuAA AAAA +// BSET<.cc><.f> b,b,c 0010 0bbb 1100 1111 FBBB CCCC CC0Q QQQQ +// BSET<.cc><.f> b,b,u6 0010 0bbb 1100 1111 FBBB uuuu uu1Q QQQQ +// BSET<.f> a,limm,c 0010 0110 0000 1111 F111 CCCC CCAA AAAA (+ Limm) +// +// BSET<.f> 0,b,c 0010 0bbb 0000 1111 FBBB CCCC CC11 1110 +// BSET<.f> 0,b,u6 0010 0bbb 0100 1111 FBBB uuuu uu11 1110 +// BSET<.cc><.f> 0,limm,c 0010 0110 1100 1111 F110 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_BSET_do_op); // BSET + } + case 0x10: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BCLR<.f> a,b,c 0010 0bbb 0001 0000 FBBB CCCC CCAA AAAA +// BCLR<.f> a,b,u6 0010 0bbb 0101 0000 FBBB uuuu uuAA AAAA +// BCLR<.cc><.f> b,b,c 0010 0bbb 1101 0000 FBBB CCCC CC0Q QQQQ +// BCLR<.cc><.f> b,b,u6 0010 0bbb 1101 0000 FBBB uuuu uu1Q QQQQ +// BCLR<.f> a,limm,c 0010 0110 0001 0000 F111 CCCC CCAA AAAA (+ Limm) +// +// BCLR<.f> 0,b,c 0010 0bbb 0001 0000 FBBB CCCC CC11 1110 +// BCLR<.f> 0,b,u6 0010 0bbb 0101 0000 FBBB uuuu uu11 1110 +// BCLR<.cc><.f> 0,limm,c 0010 0110 1101 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_BCLR_do_op); // BCLR + } + case 0x11: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BTST<.cc> b,c 0010 0bbb 1101 0001 1BBB CCCC CC0Q QQQQ +// BTST<.cc> b,u6 0010 0bbb 1101 0001 1BBB uuuu uu1Q QQQQ +// BTST<.cc> limm,c 0010 0110 1101 0001 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_nowriteback_forced_flag(op, handleop32_BTST_do_op); // BTST + } + case 0x12: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BXOR<.f> a,b,c 0010 0bbb 0001 0010 FBBB CCCC CCAA AAAA +// BXOR<.f> a,b,u6 0010 0bbb 0101 0010 FBBB uuuu uuAA AAAA +// BXOR<.cc><.f> b,b,c 0010 0bbb 1101 0010 FBBB CCCC CC0Q QQQQ +// BXOR<.cc><.f> b,b,u6 0010 0bbb 1101 0010 FBBB uuuu uu1Q QQQQ +// BXOR<.f> a,limm,c 0010 0110 0001 0010 F111 CCCC CCAA AAAA (+ Limm) +// +// BXOR<.f> 0,b,c 0010 0bbb 0001 0010 FBBB CCCC CC11 1110 +// BXOR<.f> 0,b,u6 0010 0bbb 0101 0010 FBBB uuuu uu11 1110 +// BXOR<.cc><.f> 0,limm,c 0010 0110 1101 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_BXOR_do_op); // BXOR + } + case 0x13: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BMSK<.f> a,b,c 0010 0bbb 0001 0011 FBBB CCCC CCAA AAAA +// BMSK<.f> a,b,u6 0010 0bbb 0101 0011 FBBB uuuu uuAA AAAA +// BMSK<.cc><.f> b,b,c 0010 0bbb 1101 0011 FBBB CCCC CC0Q QQQQ +// BMSK<.cc><.f> b,b,u6 0010 0bbb 1101 0011 FBBB uuuu uu1Q QQQQ +// BMSK<.f> a,limm,c 0010 0110 0001 0011 F111 CCCC CCAA AAAA (+ Limm) +// +// BMSK<.f> 0,b,c 0010 0bbb 0001 0011 FBBB CCCC CC11 1110 +// BMSK<.f> 0,b,u6 0010 0bbb 0101 0011 FBBB uuuu uu11 1110 +// BMSK<.cc><.f> 0,limm,c 0010 0110 1101 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_BMSK_do_op); // BMSK + } + case 0x14: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD1<.f> a,b,c 0010 0bbb 0001 0100 FBBB CCCC CCAA AAAA +// ADD1<.f> a,b,u6 0010 0bbb 0101 0100 FBBB uuuu uuAA AAAA +// ADD1<.f> b,b,s12 0010 0bbb 1001 0100 FBBB ssss ssSS SSSS +// ADD1<.cc><.f> b,b,c 0010 0bbb 1101 0100 FBBB CCCC CC0Q QQQQ +// ADD1<.cc><.f> b,b,u6 0010 0bbb 1101 0100 FBBB uuuu uu1Q QQQQ +// ADD1<.f> a,limm,c 0010 0110 0001 0100 F111 CCCC CCAA AAAA (+ Limm) +// ADD1<.f> a,b,limm 0010 0bbb 0001 0100 FBBB 1111 10AA AAAA (+ Limm) +// ADD1<.cc><.f> b,b,limm 0010 0bbb 1101 0100 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD1<.f> 0,b,c 0010 0bbb 0001 0100 FBBB CCCC CC11 1110 +// ADD1<.f> 0,b,u6 0010 0bbb 0101 0100 FBBB uuuu uu11 1110 +// ADD1<.f> 0,b,limm 0010 0bbb 0001 0100 FBBB 1111 1011 1110 (+ Limm) +// ADD1<.cc><.f> 0,limm,c 0010 0110 1101 0100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ADD1_do_op); // ADD1 + } + case 0x15: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD2<.f> a,b,c 0010 0bbb 0001 0101 FBBB CCCC CCAA AAAA +// ADD2<.f> a,b,u6 0010 0bbb 0101 0101 FBBB uuuu uuAA AAAA +// ADD2<.f> b,b,s12 0010 0bbb 1001 0101 FBBB ssss ssSS SSSS +// ADD2<.cc><.f> b,b,c 0010 0bbb 1101 0101 FBBB CCCC CC0Q QQQQ +// ADD2<.cc><.f> b,b,u6 0010 0bbb 1101 0101 FBBB uuuu uu1Q QQQQ +// ADD2<.f> a,limm,c 0010 0110 0001 0101 F111 CCCC CCAA AAAA (+ Limm) +// ADD2<.f> a,b,limm 0010 0bbb 0001 0101 FBBB 1111 10AA AAAA (+ Limm) +// ADD2<.cc><.f> b,b,limm 0010 0bbb 1101 0101 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD2<.f> 0,b,c 0010 0bbb 0001 0101 FBBB CCCC CC11 1110 +// ADD2<.f> 0,b,u6 0010 0bbb 0101 0101 FBBB uuuu uu11 1110 +// ADD2<.f> 0,b,limm 0010 0bbb 0001 0101 FBBB 1111 1011 1110 (+ Limm) +// ADD2<.cc><.f> 0,limm,c 0010 0110 1101 0101 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ADD2_do_op); // ADD2 + } + case 0x16: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD3<.f> a,b,c 0010 0bbb 0001 0110 FBBB CCCC CCAA AAAA +// ADD3<.f> a,b,u6 0010 0bbb 0101 0110 FBBB uuuu uuAA AAAA +// ADD3<.f> b,b,s12 0010 0bbb 1001 0110 FBBB ssss ssSS SSSS +// ADD3<.cc><.f> b,b,c 0010 0bbb 1101 0110 FBBB CCCC CC0Q QQQQ +// ADD3<.cc><.f> b,b,u6 0010 0bbb 1101 0110 FBBB uuuu uu1Q QQQQ +// ADD3<.f> a,limm,c 0010 0110 0001 0110 F111 CCCC CCAA AAAA (+ Limm) +// ADD3<.f> a,b,limm 0010 0bbb 0001 0110 FBBB 1111 10AA AAAA (+ Limm) +// ADD3<.cc><.f> b,b,limm 0010 0bbb 1101 0110 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD3<.f> 0,b,c 0010 0bbb 0001 0110 FBBB CCCC CC11 1110 +// ADD3<.f> 0,b,u6 0010 0bbb 0101 0110 FBBB uuuu uu11 1110 +// ADD3<.f> 0,b,limm 0010 0bbb 0001 0110 FBBB 1111 1011 1110 (+ Limm) +// ADD3<.cc><.f> 0,limm,c 0010 0110 1101 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ADD3_do_op); // ADD3 + } + case 0x17: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB1<.f> a,b,c 0010 0bbb 0001 0111 FBBB CCCC CCAA AAAA +// SUB1<.f> a,b,u6 0010 0bbb 0101 0111 FBBB uuuu uuAA AAAA +// SUB1<.f> b,b,s12 0010 0bbb 1001 0111 FBBB ssss ssSS SSSS +// SUB1<.cc><.f> b,b,c 0010 0bbb 1101 0111 FBBB CCCC CC0Q QQQQ +// SUB1<.cc><.f> b,b,u6 0010 0bbb 1101 0111 FBBB uuuu uu1Q QQQQ +// SUB1<.f> a,limm,c 0010 0110 0001 0111 F111 CCCC CCAA AAAA (+ Limm) +// SUB1<.f> a,b,limm 0010 0bbb 0001 0111 FBBB 1111 10AA AAAA (+ Limm) +// SUB1<.cc><.f> b,b,limm 0010 0bbb 1101 0111 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB1<.f> 0,b,c 0010 0bbb 0001 0111 FBBB CCCC CC11 1110 +// SUB1<.f> 0,b,u6 0010 0bbb 0101 0111 FBBB uuuu uu11 1110 +// SUB1<.f> 0,b,limm 0010 0bbb 0001 0111 FBBB 1111 1011 1110 (+ Limm) +// SUB1<.cc><.f> 0,limm,c 0010 0110 1101 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_SUB1_do_op); // SUB1 + } + case 0x18: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB2<.f> a,b,c 0010 0bbb 0001 1000 FBBB CCCC CCAA AAAA +// SUB2<.f> a,b,u6 0010 0bbb 0101 1000 FBBB uuuu uuAA AAAA +// SUB2<.f> b,b,s12 0010 0bbb 1001 1000 FBBB ssss ssSS SSSS +// SUB2<.cc><.f> b,b,c 0010 0bbb 1101 1000 FBBB CCCC CC0Q QQQQ +// SUB2<.cc><.f> b,b,u6 0010 0bbb 1101 1000 FBBB uuuu uu1Q QQQQ +// SUB2<.f> a,limm,c 0010 0110 0001 1000 F111 CCCC CCAA AAAA (+ Limm) +// SUB2<.f> a,b,limm 0010 0bbb 0001 1000 FBBB 1111 10AA AAAA (+ Limm) +// SUB2<.cc><.f> b,b,limm 0010 0bbb 1101 1000 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB2<.f> 0,b,c 0010 0bbb 0001 1000 FBBB CCCC CC11 1110 +// SUB2<.f> 0,b,u6 0010 0bbb 0101 1000 FBBB uuuu uu11 1110 +// SUB2<.f> 0,b,limm 0010 0bbb 0001 1000 FBBB 1111 1011 1110 (+ Limm) +// SUB2<.cc><.f> 0,limm,c 0010 0110 1101 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_SUB2_do_op); // SUB2 + } + case 0x19: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB3<.f> a,b,c 0010 0bbb 0001 1001 FBBB CCCC CCAA AAAA +// SUB3<.f> a,b,u6 0010 0bbb 0101 1001 FBBB uuuu uuAA AAAA +// SUB3<.f> b,b,s12 0010 0bbb 1001 1001 FBBB ssss ssSS SSSS +// SUB3<.cc><.f> b,b,c 0010 0bbb 1101 1001 FBBB CCCC CC0Q QQQQ +// SUB3<.cc><.f> b,b,u6 0010 0bbb 1101 1001 FBBB uuuu uu1Q QQQQ +// SUB3<.f> a,limm,c 0010 0110 0001 1001 F111 CCCC CCAA AAAA (+ Limm) +// SUB3<.f> a,b,limm 0010 0bbb 0001 1001 FBBB 1111 10AA AAAA (+ Limm) +// SUB3<.cc><.f> b,b,limm 0010 0bbb 1101 1001 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB3<.f> 0,b,c 0010 0bbb 0001 1001 FBBB CCCC CC11 1110 +// SUB3<.f> 0,b,u6 0010 0bbb 0101 1001 FBBB uuuu uu11 1110 +// SUB3<.f> 0,limm,c 0010 0110 0001 1001 F111 CCCC CC11 1110 (+ Limm) +// SUB3<.cc><.f> 0,limm,c 0010 0110 1101 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_SUB3_do_op); // SUB3 + } + case 0x1a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MPY<.f> a,b,c 0010 0bbb 0001 1010 FBBB CCCC CCAA AAAA +// MPY<.f> a,b,u6 0010 0bbb 0101 1010 FBBB uuuu uuAA AAAA +// MPY<.f> b,b,s12 0010 0bbb 1001 1010 FBBB ssss ssSS SSSS +// MPY<.cc><.f> b,b,c 0010 0bbb 1101 1010 FBBB CCCC CC0Q QQQQ +// MPY<.cc><.f> b,b,u6 0010 0bbb 1101 1010 FBBB uuuu uu1Q QQQQ +// MPY<.f> a,limm,c 0010 0110 0001 1010 F111 CCCC CCAA AAAA (+ Limm) +// MPY<.f> a,b,limm 0010 0bbb 0001 1010 FBBB 1111 10AA AAAA (+ Limm) +// MPY<.cc><.f> b,b,limm 0010 0bbb 1101 1010 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPY<.f> 0,b,c 0010 0bbb 0001 1010 FBBB CCCC CC11 1110 +// MPY<.f> 0,b,u6 0010 0bbb 0101 1010 FBBB uuuu uu11 1110 +// MPY<.cc><.f> 0,limm,c 0010 0110 1101 1010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_MPY_do_op); // MPY * + } + case 0x1b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MPYH<.f> a,b,c 0010 0bbb 0001 1011 FBBB CCCC CCAA AAAA +// MPYH<.f> a,b,u6 0010 0bbb 0101 1011 FBBB uuuu uuAA AAAA +// MPYH<.f> b,b,s12 0010 0bbb 1001 1011 FBBB ssss ssSS SSSS +// MPYH<.cc><.f> b,b,c 0010 0bbb 1101 1011 FBBB CCCC CC0Q QQQQ +// MPYH<.cc><.f> b,b,u6 0010 0bbb 1101 1011 FBBB uuuu uu1Q QQQQ +// MPYH<.f> a,limm,c 0010 0110 0001 1011 F111 CCCC CCAA AAAA (+ Limm) +// MPYH<.f> a,b,limm 0010 0bbb 0001 1010 FBBB 1111 10AA AAAA (+ Limm) +// MPYH<.cc><.f> b,b,limm 0010 0bbb 1101 1011 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYH<.f> 0,b,c 0010 0bbb 0001 1011 FBBB CCCC CC11 1110 +// MPYH<.f> 0,b,u6 0010 0bbb 0101 1011 FBBB uuuu uu11 1110 +// MPYH<.cc><.f> 0,limm,c 0010 0110 1101 1011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_MPYH_do_op); // MPYH * + } + case 0x1c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MPYHU<.f> a,b,c 0010 0bbb 0001 1100 FBBB CCCC CCAA AAAA +// MPYHU<.f> a,b,u6 0010 0bbb 0101 1100 FBBB uuuu uuAA AAAA +// MPYHU<.f> b,b,s12 0010 0bbb 1001 1100 FBBB ssss ssSS SSSS +// MPYHU<.cc><.f> b,b,c 0010 0bbb 1101 1100 FBBB CCCC CC0Q QQQQ +// MPYHU<.cc><.f> b,b,u6 0010 0bbb 1101 1100 FBBB uuuu uu1Q QQQQ +// MPYHU<.f> a,limm,c 0010 0110 0001 1100 F111 CCCC CCAA AAAA (+ Limm) +// MPYHU<.f> a,b,limm 0010 0bbb 0001 1100 FBBB 1111 10AA AAAA (+ Limm) +// MPYHU<.cc><.f> b,b,limm 0010 0bbb 1101 1100 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYHU<.f> 0,b,c 0010 0bbb 0001 1100 FBBB CCCC CC11 1110 +// MPYHU<.f> 0,b,u6 0010 0bbb 0101 1100 FBBB uuuu uu11 1110 +// MPYHU<.cc><.f> 0,limm,c 0010 0110 1101 1100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_MPYHU_do_op); // MPYHU * + } + case 0x1d: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// MPYU<.f> a,b,c 0010 0bbb 0001 1101 FBBB CCCC CCAA AAAA +// MPYU<.f> a,b,u6 0010 0bbb 0101 1101 FBBB uuuu uuAA AAAA +// MPYU<.f> b,b,s12 0010 0bbb 1001 1101 FBBB ssss ssSS SSSS +// MPYU<.cc><.f> b,b,c 0010 0bbb 1101 1101 FBBB CCCC CC0Q QQQQ +// MPYU<.cc><.f> b,b,u6 0010 0bbb 1101 1101 FBBB uuuu uu1Q QQQQ +// MPYU<.f> a,limm,c 0010 0110 0001 1101 F111 CCCC CCAA AAAA (+ Limm) +// MPYU<.f> a,b,limm 0010 0bbb 0001 1101 FBBB 1111 10AA AAAA (+ Limm) +// MPYU<.cc><.f> b,b,limm 0010 0bbb 1101 1101 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYU<.f> 0,b,c 0010 0bbb 0001 1101 FBBB CCCC CC11 1110 +// MPYU<.f> 0,b,u6 0010 0bbb 0101 1101 FBBB uuuu uu11 1110 +// MPYU<.cc><.f> 0,limm,c 0010 0110 1101 1101 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_MPYU_do_op); // MPYU * + } + case 0x20: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ +// Jcc limm 0010 0RRR 1110 0000 0RRR 1111 100Q QQQQ (+ Limm) +// Jcc u6 0010 0RRR 1110 0000 0RRR uuuu uu1Q QQQQ +// Jcc.F [ilink1] 0010 0RRR 1110 0000 1RRR 0111 010Q QQQQ +// Jcc.F [ilink2] 0010 0RRR 1110 0000 1RRR 0111 100Q QQQQ +// IIII I SS SSSS +// J [c] 0010 0RRR 0010 0000 0RRR CCCC CCRR RRRR +// J.F [ilink1] 0010 0RRR 0010 0000 1RRR 0111 01RR RRRR +// J.F [ilink2] 0010 0RRR 0010 0000 1RRR 0111 10RR RRRR +// J limm 0010 0RRR 0010 0000 0RRR 1111 10RR RRRR (+ Limm) +// J u6 0010 0RRR 0110 0000 0RRR uuuu uuRR RRRR +// J s12 0010 0RRR 1010 0000 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_J(op, false, false); // Jcc + } + case 0x21: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// Jcc.D u6 0010 0RRR 1110 0001 0RRR uuuu uu1Q QQQQ +// Jcc.D [c] 0010 0RRR 1110 0001 0RRR CCCC CC0Q QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// J.D [c] 0010 0RRR 0010 0001 0RRR CCCC CCRR RRRR +// J.D u6 0010 0RRR 0110 0001 0RRR uuuu uuRR RRRR +// J.D s12 0010 0RRR 1010 0001 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + + return handleop32_J(op, true, false); // Jcc.D + } + case 0x22: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// JLcc [c] 0010 0RRR 1110 0010 0RRR CCCC CC0Q QQQQ +// JLcc limm 0010 0RRR 1110 0010 0RRR 1111 100Q QQQQ (+ Limm) +// JLcc u6 0010 0RRR 1110 0010 0RRR uuuu uu1Q QQQQ +// JL [c] 0010 0RRR 0010 0010 0RRR CCCC CCRR RRRR +// JL limm 0010 0RRR 0010 0010 0RRR 1111 10RR RRRR (+ Limm) +// JL u6 0010 0RRR 0110 0010 0RRR uuuu uuRR RRRR +// JL s12 0010 0RRR 1010 0010 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_J(op, false, true); // JLcc + } + case 0x23: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// JLcc.D u6 0010 0RRR 1110 0011 0RRR uuuu uu1Q QQQQ +// JLcc.D [c] 0010 0RRR 1110 0011 0RRR CCCC CC0Q QQQQ +// JL.D [c] 0010 0RRR 0010 0011 0RRR CCCC CCRR RRRR +// JL.D u6 0010 0RRR 0110 0011 0RRR uuuu uuRR RRRR +// JL.D s12 0010 0RRR 1010 0011 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_J(op, true, true); // JLcc.D + } + case 0x28: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LP u7 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ +// LP s13 0010 0RRR 1010 1000 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_LP(op); // LPcc + } + case 0x29: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// FLAG<.cc> c 0010 0rrr 1110 1001 0RRR CCCC CC0Q QQQQ +// FLAG<.cc> u6 0010 0rrr 1110 1001 0RRR uuuu uu1Q QQQQ +// FLAG<.cc> limm 0010 0rrr 1110 1001 0RRR 1111 100Q QQQQ (+ Limm) +// FLAG s12 0010 0rrr 1010 1001 0RRR ssss ssSS SSSS +// FLAG c (unknown format) 0010 0000 0010 1001 0000 0000 0100 0000 (Leapster BIOS encodes like this? unless it's customized and isn't FLAG?) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_FLAG(op); // FLAG + } + case 0x2a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LR b,[c] 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR +// LR b,[limm] 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR (+ Limm) +// LR b,[u6] 0010 0bbb 0110 1010 0BBB uuuu uu00 0000 +// LR b,[s12] 0010 0bbb 1010 1010 0BBB ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_LR(op); // LR + } + case 0x2b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SR b,[c] 0010 0bbb 0010 1011 0BBB CCCC CCRR RRRR +// SR b,[limm] 0010 0bbb 0010 1011 0BBB 1111 10RR RRRR (+ Limm) +// SR b,[u6] 0010 0bbb 0110 1011 0BBB uuuu uu00 0000 +// SR b,[s12] 0010 0bbb 1010 1011 0BBB ssss ssSS SSSS +// SR limm,[c] 0010 0110 0010 1011 0111 CCCC CCRR RRRR (+ Limm) +// SR limm,[u6] 0010 0110 0110 1011 0111 uuuu uu00 0000 +// SR limm,[s12] 0010 0110 1010 1011 0111 ssss ssSS SSSS (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_SR(op); // SR + } + case 0x2f: // Sub Opcode + { + uint8_t subinstr2 = op & 0x0000003f; + switch (subinstr2 & 0x3f) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ASL<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0000 +// ASL<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0000 +// ASL<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0000 (+ Limm) +// +// ASL<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0000 +// ASL<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0000 +// ASL<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_ASL_single_do_op); // ASL + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ASR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0001 +// ASR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0001 +// ASR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0001 (+ Limm) +// +// ASR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0001 +// ASR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0001 +// ASR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_ASR_single_do_op); // ASR + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// LSR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0010 +// LSR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0010 +// LSR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0010 (+ Limm) +// +// LSR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0010 +// LSR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0010 +// LSR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_LSR_single_do_op); // LSR + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ROR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0011 +// ROR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0011 +// ROR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0011 (+ Limm) +// +// ROR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0011 +// ROR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0011 +// ROR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_ROR_do_op); // ROR + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// RRC<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0100 +// RRC<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0100 +// RRC<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0100 (+ Limm) +// +// RRC<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0100 +// RRC<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0100 +// RRC<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_RRC_do_op); // RRC + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// SEXB<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0101 +// SEXB<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0101 +// SEXB<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0101 (+ Limm) +// +// SEXB<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0101 +// SEXB<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0101 +// SEXB<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0101 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_SEXB_do_op); // SEXB + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// SEXW<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0110 +// SEXW<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0110 +// SEXW<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0110 (+ Limm) +// +// SEXW<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0110 +// SEXW<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0110 +// SEXW<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_SEXW_do_op); // SEXW + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// EXTB<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0111 +// EXTB<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0111 +// EXTB<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0111 (+ Limm) +// +// EXTB<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0111 +// EXTB<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0111 +// EXTB<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0111 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_EXTB_do_op); // EXTB + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// EXTW<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1000 +// EXTW<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1000 +// EXTW<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1000 (+ Limm) +// +// EXTW<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1000 +// EXTW<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1000 +// EXTW<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_EXTW_do_op); // EXTW + } + case 0x09: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ABS<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1001 +// ABS<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1001 +// ABS<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1001 (+ Limm) +// +// ABS<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1001 +// ABS<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1001 +// ABS<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_ABS_do_op); // ABS + } + case 0x0a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// NOT<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1010 +// NOT<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1010 +// NOT<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1010 (+ Limm) +// +// NOT<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1010 +// NOT<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1010 +// NOT<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1010 (+ Limm) +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_NOT_do_op); // NOT + } + case 0x0b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// RLC<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1011 +// RLC<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1011 +// RLC<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1011 (+ Limm) +// +// RLC<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1011 +// RLC<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1011 +// RLC<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_RLC_do_op); // RLC + } + case 0x0c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// EX<.di> b,[c] 0010 0bbb 0010 1111 DBBB CCCC CC00 1100 +// EX<.di> b,[u6] 0010 0bbb 0110 1111 DBBB uuuu uu00 1100 +// EX<.di> b,[limm] 0010 0bbb 0010 1111 DBBB 1111 1000 1100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_EX(op); // EX + } + case 0x3f: // ZOPs (Zero Operand Opcodes) + { + uint8_t subinstr3 = (op & 0x07000000) >> 24; + subinstr3 |= ((op & 0x00007000) >> 12) << 3; + + switch (subinstr3 & 0x3f) + { + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SLEEP 0010 0001 0110 1111 0000 uuuu uu11 1111 +// SLEEP c 0010 0001 0010 1111 0000 CCCC CC11 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_SLEEP(op); // SLEEP + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SWI/TRAP0 0010 0010 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_SWI(op); // SWI / TRAP0 + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SYNC 0010 0011 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_SYNC(op); // SYNC + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// RTIE 0010 0100 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_RTIE(op); // RTIE + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// BRK 0010 0101 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_BRK(op); // BRK + } + + default: + { + // 0x00, 0x06-0x3f + return arcompact_handle_illegal(instruction, subinstr, subinstr2, subinstr3, op); // illegal + } + } + } + default: + { + // 0x0d - 0x3e + return arcompact_handle_illegal(instruction, subinstr, subinstr2, op); // illegal + } + } + } + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LD<.x><.aa><.di> a,[b,c] 0010 0bbb aa11 0ZZX DBBB CCCC CCAA AAAA +// LD<.x><.aa><.di> 0,[b,c] 0010 0bbb aa11 0ZZX DBBB CCCC CC11 1110 +// PREFETCH<.aa> [b,c] 0010 0bbb aa11 0000 0BBB CCCC CC11 1110 (prefetch is an alias) +// +// LD<.x><.aa><.di> a,[b,limm] 0010 0bbb aa11 0ZZX DBBB 1111 10AA AAAA (+ Limm) +// LD<.x><.aa><.di> 0,[b,limm] 0010 0bbb aa11 0ZZX DBBB 1111 1011 1110 (+ Limm) +// PREFETCH<.aa> [b,limm] 0010 0bbb aa11 0000 0BBB 1111 1011 1110 (+ Limm) (prefetch is an alias) +// +// LD<.x><.di> a,[limm,c] 0010 0110 RR11 0ZZX D111 CCCC CCAA AAAA (+ Limm) +// LD<.x><.di> 0,[limm,c] 0010 0110 RR11 0ZZX D111 CCCC CC11 1110 (+ Limm) +// PREFETCH [limm,c] 0010 0110 RR11 0000 0111 CCCC CC11 1110 (+ Limm) (prefetch is an alias) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: + { + return handleop32_LDrr(op, (op >> 17) & 3, (op >> 16) & 1); // LD r-r + } + default: + { + return arcompact_handle_illegal(instruction, subinstr, op); // illegal + } + } + } + case 0x05: // op a,b,c (05 ARC ext) + { + uint8_t subinstr = (op & 0x003f0000) >> 16; + + switch (subinstr) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ASL<.f> a,b,c 0010 1bbb 0000 0000 FBBB CCCC CCAA AAAA +// ASL<.f> a,b,u6 0010 1bbb 0100 0000 FBBB uuuu uuAA AAAA +// ASL<.f> b,b,s12 0010 1bbb 1000 0000 FBBB ssss ssSS SSSS +// ASL<.cc><.f> b,b,c 0010 1bbb 1100 0000 FBBB CCCC CC0Q QQQQ +// ASL<.cc><.f> b,b,u6 0010 1bbb 1100 0000 FBBB uuuu uu1Q QQQQ +// ASL<.f> a,limm,c 0010 1110 0000 0000 F111 CCCC CCAA AAAA (+ Limm) +// ASL<.f> a,b,limm 0010 1bbb 0000 0000 FBBB 1111 10AA AAAA (+ Limm) +// ASL<.cc><.f> b,b,limm 0010 1bbb 1100 0000 FBBB 1111 100Q QQQQ (+ Limm) +// +// ASL<.f> 0,b,c 0010 1bbb 0000 0000 FBBB CCCC CC11 1110 +// ASL<.f> 0,b,u6 0010 1bbb 0100 0000 FBBB uuuu uu11 1110 +// ASL<.cc><.f> 0,limm,c 0010 1110 1100 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ASL_multiple_do_op); // ASL + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// LSR<.f> a,b,c 0010 1bbb 0000 0001 FBBB CCCC CCAA AAAA +// LSR<.f> a,b,u6 0010 1bbb 0100 0001 FBBB uuuu uuAA AAAA +// LSR<.f> b,b,s12 0010 1bbb 1000 0001 FBBB ssss ssSS SSSS +// LSR<.cc><.f> b,b,c 0010 1bbb 1100 0001 FBBB CCCC CC0Q QQQQ +// LSR<.cc><.f> b,b,u6 0010 1bbb 1100 0001 FBBB uuuu uu1Q QQQQ +// LSR<.f> a,limm,c 0010 1110 0000 0001 F111 CCCC CCAA AAAA (+ Limm) +// LSR<.f> a,b,limm 0010 1bbb 0000 0001 FBBB 1111 10AA AAAA (+ Limm) +// LSR<.cc><.f> b,b,limm 0010 1bbb 1100 0001 FBBB 1111 100Q QQQQ (+ Limm) +// +// LSR<.f> 0,b,c 0010 1bbb 0000 0001 FBBB CCCC CC11 1110 +// LSR<.f> 0,b,u6 0010 1bbb 0100 0001 FBBB uuuu uu11 1110 +// LSR<.cc><.f> 0,limm,c 0010 1110 1100 0001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_LSR_multiple_do_op); // LSR + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ASR<.f> a,b,c 0010 1bbb 0000 0010 FBBB CCCC CCAA AAAA +// ASR<.f> a,b,u6 0010 1bbb 0100 0010 FBBB uuuu uuAA AAAA +// ASR<.f> b,b,s12 0010 1bbb 1000 0010 FBBB ssss ssSS SSSS +// ASR<.cc><.f> b,b,c 0010 1bbb 1100 0010 FBBB CCCC CC0Q QQQQ +// ASR<.cc><.f> b,b,u6 0010 1bbb 1100 0010 FBBB uuuu uu1Q QQQQ +// ASR<.f> a,limm,c 0010 1110 0000 0010 F111 CCCC CCAA AAAA (+ Limm) +// ASR<.f> a,b,limm 0010 1bbb 0000 0010 FBBB 1111 10AA AAAA (+ Limm) +// ASR<.cc><.f> b,b,limm 0010 1bbb 1100 0010 FBBB 1111 100Q QQQQ (+ Limm) +// +// ASR<.f> 0,b,c 0010 1bbb 0000 0010 FBBB CCCC CC11 1110 +// ASR<.f> 0,b,u6 0010 1bbb 0100 0010 FBBB uuuu uu11 1110 +// ASR<.cc><.f> 0,limm,c 0010 1110 1100 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ASR_multiple_do_op); // ASR + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ROR<.f> a,b,c 0010 1bbb 0000 0011 FBBB CCCC CCAA AAAA +// ROR<.f> a,b,u6 0010 1bbb 0100 0011 FBBB uuuu uuAA AAAA +// ROR<.f> b,b,s12 0010 1bbb 1000 0011 FBBB ssss ssSS SSSS +// ROR<.cc><.f> b,b,c 0010 1bbb 1100 0011 FBBB CCCC CC0Q QQQQ +// ROR<.cc><.f> b,b,u6 0010 1bbb 1100 0011 FBBB uuuu uu1Q QQQQ +// ROR<.f> a,limm,c 0010 1110 0000 0011 F111 CCCC CCAA AAAA (+ Limm) +// ROR<.f> a,b,limm 0010 1bbb 0000 0011 FBBB 1111 10AA AAAA (+ Limm) +// ROR<.cc><.f> b,b,limm 0010 1bbb 1100 0011 FBBB 1111 100Q QQQQ (+ Limm) +// +// ROR<.f> 0,b,c 0010 1bbb 0000 0011 FBBB CCCC CC11 1110 +// ROR<.f> 0,b,u6 0010 1bbb 0100 0011 FBBB uuuu uu11 1110 +// ROR<.cc><.f> 0,limm,c 0010 1110 1100 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ROR_multiple_do_op); // ROR + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// MUL64 <0,>b,c 0010 1bbb 0000 0100 0BBB CCCC CC11 1110 +// MUL64 <0,>b,u6 0010 1bbb 0100 0100 0BBB uuuu uu11 1110 +// MUL64 <0,>b,s12 0010 1bbb 1000 0100 0BBB ssss ssSS SSSS +// MUL64 <0,>limm,c 0010 1110 0000 0100 0111 CCCC CC11 1110 (+ Limm) +// +// MUL64<.cc> <0,>b,c 0010 1bbb 1100 0100 0BBB CCCC CC0Q QQQQ +// MUL64<.cc> <0,>b,u6 0010 1bbb 1100 0100 0BBB uuuu uu1Q QQQQ +// MUL64<.cc> <0,>limm,c 0010 1110 1100 0100 0111 CCCC CC0Q QQQQ (+ Limm) +// MUL64<.cc> <0,>b,limm 0010 1bbb 1100 0100 0BBB 1111 100Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_MULx64(op, handleop32_MUL64_do_op); // MUL64 + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// MULU64 <0,>b,c 0010 1bbb 0000 0101 0BBB CCCC CC11 1110 +// MULU64 <0,>b,u6 0010 1bbb 0100 0101 0BBB uuuu uu11 1110 +// MULU64 <0,>b,s12 0010 1bbb 1000 0101 0BBB ssss ssSS SSSS +// MULU64 <0,>limm,c 0010 1110 0000 0101 0111 CCCC CC11 1110 (+ Limm) +// +// MULU64<.cc> <0,>b,c 0010 1bbb 1100 0101 0BBB CCCC CC0Q QQQQ +// MULU64<.cc> <0,>b,u6 0010 1bbb 1100 0101 0BBB uuuu uu1Q QQQQ +// MULU64<.cc> <0,>limm,c 0010 1110 1100 0101 0111 CCCC CC0Q QQQQ (+ Limm) +// MULU64<.cc> <0,>b,limm 0010 1bbb 1100 0101 0BBB 1111 100Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_MULx64(op, handleop32_MULU64_do_op); // MULU64 + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Extended Arithmetic (optional on ARCtangent-A5, ARC600, built in on ARC700) +// ADDS - Add and Saturate +// +// ADDS<.f> a,b,c 0010 1bbb 0000 0110 FBBB CCCC CCAA AAAA +// ADDS<.f> a,b,u6 0010 1bbb 0100 0110 FBBB uuuu uuAA AAAA +// ADDS<.f> b,b,s12 0010 1bbb 1000 0110 FBBB ssss ssSS SSSS +// ADDS<.cc><.f> b,b,c 0010 1bbb 1100 0110 FBBB CCCC CC0Q QQQQ +// ADDS<.cc><.f> b,b,u6 0010 1bbb 1100 0110 FBBB uuuu uu1Q QQQQ +// ADDS<.f> a,limm,c 0010 1110 0000 0110 F111 CCCC CCAA AAAA (+ Limm) +// ADDS<.f> a,b,limm 0010 1bbb 0000 0110 FBBB 1111 10AA AAAA (+ Limm) +// ADDS<.cc><.f> b,b,limm 0010 1bbb 1100 0110 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ADDS<.f> 0,b,c 0010 1bbb 0000 0110 FBBB CCCC CC11 1110 +// ADDS<.f> 0,b,u6 0010 1bbb 0100 0110 FBBB uuuu uu11 1110 +// ADDS<.f> 0,b,limm 0010 1bbb 0000 0110 FBBB 1111 1011 1110 (+ Limm) +// ADDS<.cc><.f> 0,limm,c 0010 1110 1100 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ADDS_do_op); // ADDS + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Extended Arithmetic (optional on ARCtangent-A5, ARC600, built in on ARC700) +// SUBS - Subtract and Saturate +// +// SUBS<.f> a,b,c 0010 1bbb 0000 0111 FBBB CCCC CCAA AAAA +// SUBS<.f> a,b,u6 0010 1bbb 0100 0111 FBBB uuuu uuAA AAAA +// SUBS<.f> b,b,s12 0010 1bbb 1000 0111 FBBB ssss ssSS SSSS +// SUBS<.cc><.f> b,b,c 0010 1bbb 1100 0111 FBBB CCCC CC0Q QQQQ +// SUBS<.cc><.f> b,b,u6 0010 1bbb 1100 0111 FBBB uuuu uu1Q QQQQ +// SUBS<.f> a,limm,c 0010 1110 0000 0111 F111 CCCC CCAA AAAA (+ Limm) +// SUBS<.f> a,b,limm 0010 1bbb 0000 0111 FBBB 1111 10AA AAAA (+ Limm) +// SUBS<.cc><.f> b,b,limm 0010 1bbb 1100 0111 FBBB 1111 10QQ QQQQ (+ Limm) +// +// SUBS<.f> 0,b,c 0010 1bbb 0000 0111 FBBB CCCC CC11 1110 +// SUBS<.f> 0,b,u6 0010 1bbb 0100 0111 FBBB uuuu uu11 1110 +// SUBS<.f> 0,b,limm 0010 1bbb 0000 0111 FBBB 1111 1011 1110 (+ Limm) +// SUBS<.cc><.f> 0,limm,c 0010 1110 1100 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_SUBS_do_op); // SUBS + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Extended Arithmetic (optional on ARCtangent-A5, ARC600, built in on ARC700) +// DIVAW - Division Assist +// +// DIVAW a,b,c 0010 1bbb 0000 1000 0BBB CCCC CCAA AAAA +// DIVAW a,b,u6 0010 1bbb 0100 1000 0BBB uuuu uuAA AAAA +// DIVAW b,b,s12 0010 1bbb 1000 1000 0BBB ssss ssSS SSSS +// DIVAW<.cc> b,b,c 0010 1bbb 1100 1000 0BBB CCCC CC0Q QQQQ +// DIVAW<.cc> b,b,u6 0010 1bbb 1100 1000 0BBB uuuu uu1Q QQQQ +// DIVAW a,limm,c 0010 1110 0000 1000 0111 CCCC CCAA AAAA (+ Limm) +// DIVAW a,b,limm 0010 1bbb 0000 1000 0BBB 1111 10AA AAAA (+ Limm) +// DIVAW<.cc> b,b,limm 0010 1bbb 1100 1000 0BBB 1111 10QQ QQQQ (+ Limm) +// +// DIVAW 0,b,c 0010 1bbb 0000 1000 0BBB CCCC CC11 1110 +// DIVAW 0,b,u6 0010 1bbb 0100 1000 0BBB uuuu uu11 1110 +// DIVAW<.cc> 0,limm,c 0010 1110 1100 1000 0111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_DIVAW_do_op); // DIVAW + } + case 0x0a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Extended Arithmetic (optional ARCtangent-A5, ARC600, built in on ARC700) +// ASLS - Arithmetic Shift Left and Saturate (with negative shift value support) +// +// IIII I SS SSSS +// ASLS<.f> a,b,c 0010 1bbb 0000 1010 FBBB CCCC CCAA AAAA +// ASLS<.f> a,b,u6 0010 1bbb 0100 1010 FBBB uuuu uuAA AAAA +// ASLS<.f> b,b,s12 0010 1bbb 1000 1010 FBBB ssss ssSS SSSS +// ASLS<.cc><.f> b,b,c 0010 1bbb 1100 1010 FBBB CCCC CC0Q QQQQ +// ASLS<.cc><.f> b,b,u6 0010 1bbb 1100 1010 FBBB uuuu uu1Q QQQQ +// ASLS<.f> a,limm,c 0010 1110 0000 1010 F111 CCCC CCAA AAAA (+ Limm) +// ASLS<.f> a,b,limm 0010 1bbb 0000 1010 FBBB 1111 10AA AAAA (+ Limm) +// ASLS<.cc><.f> b,b,limm 0010 1bbb 1100 1010 FBBB 1111 10QQ QQQQ (+ Limm) +// ASLS<.f> 0,b,c 0010 1bbb 0000 1010 FBBB CCCC CC11 1110 +// ASLS<.f> 0,b,u6 0010 1bbb 0100 1010 FBBB uuuu uu11 1110 +// ASLS<.cc><.f> 0,limm,c 0010 1110 1100 1010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ASLS_do_op); // ASLS + } + case 0x0b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Extended Arithmetic (optional ARCtangent-A5, ARC600, built in on ARC700) +// ASRS - Arithmetic Shift Right and Saturate (with negative shift value support) +// +// ASRS<.f> a,b,c 0010 1bbb 0000 1011 FBBB CCCC CCAA AAAA +// ASRS<.f> a,b,u6 0010 1bbb 0100 1011 FBBB uuuu uuAA AAAA +// ASRS<.f> b,b,s12 0010 1bbb 1000 1011 FBBB ssss ssSS SSSS +// ASRS<.cc><.f> b,b,c 0010 1bbb 1100 1011 FBBB CCCC CC0Q QQQQ +// ASRS<.cc><.f> b,b,u6 0010 1bbb 1100 1011 FBBB uuuu uu1Q QQQQ +// ASRS<.f> a,limm,c 0010 1110 0000 1011 F111 CCCC CCAA AAAA (+ Limm) +// ASRS<.f> a,b,limm 0010 1bbb 0000 1011 FBBB 1111 10AA AAAA (+ Limm) +// ASRS<.cc><.f> b,b,limm 0010 1bbb 1100 1011 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ASRS<.f> 0,b,c 0010 1bbb 0000 1011 FBBB CCCC CC11 1110 +// ASRS<.f> 0,b,u6 0010 1bbb 0100 1011 FBBB uuuu uu11 1110 +// ASRS<.cc><.f> 0,limm,c 0010 1110 1100 1011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ASRS_do_op); // ASRS + } + case 0x0c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unknown Extension Op +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_UNKNOWN_05_0c_do_op); + } + case 0x10: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unknown Extension Op +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_UNKNOWN_05_10_do_op); + } + case 0x14: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unknown Extension Op +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_UNKNOWN_05_14_do_op); + } + case 0x28: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Extended Arithmetic (optional ARCtangent-A5, ARC600, built in on ARC700) +// ADDSDW - Dual 16-bit Add and Saturate +// +// ADDSDW<.f> a,b,c 0010 1bbb 0010 1000 FBBB CCCC CCAA AAAA +// ADDSDW<.f> a,b,u6 0010 1bbb 0110 1000 FBBB uuuu uuAA AAAA +// ADDSDW<.f> b,b,s12 0010 1bbb 1010 1000 FBBB ssss ssSS SSSS +// ADDSDW<.cc><.f> b,b,c 0010 1bbb 1110 1000 FBBB CCCC CC0Q QQQQ +// ADDSDW<.cc><.f> b,b,u6 0010 1bbb 1110 1000 FBBB uuuu uu1Q QQQQ +// ADDSDW<.f> a,limm,c 0010 1110 0010 1000 F111 CCCC CCAA AAAA (+ Limm) +// ADDSDW<.f> a,b,limm 0010 1bbb 0010 1000 FBBB 1111 10AA AAAA (+ Limm) +// ADDSDW<.cc><.f> b,b,limm 0010 1bbb 1110 1000 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ADDSDW<.f> 0,b,c 0010 1bbb 0010 1000 FBBB CCCC CC11 1110 +// ADDSDW<.f> 0,b,u6 0010 1bbb 0110 1000 FBBB uuuu uu11 1110 +// ADDSDW<.cc><.f> 0,limm,c 0010 1110 1110 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_ADDSDW_do_op); // ADDSDW + } + case 0x29: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Extended Arithmetic (optional ARCtangent-A5, ARC600, built in on ARC700) +// SUBSDW - Dual 16-bit Subtract and Saturate +// +// SUBSDW<.f> a,b,c 0010 1bbb 0010 1001 FBBB CCCC CCAA AAAA +// SUBSDW<.f> a,b,u6 0010 1bbb 0110 1001 FBBB uuuu uuAA AAAA +// SUBSDW<.f> b,b,s12 0010 1bbb 1010 1001 FBBB ssss ssSS SSSS +// SUBSDW<.cc><.f> b,b,c 0010 1bbb 1110 1001 FBBB CCCC CC0Q QQQQ +// SUBSDW<.cc><.f> b,b,u6 0010 1bbb 1110 1001 FBBB uuuu uu1Q QQQQ +// SUBSDW<.f> a,limm,c 0010 1110 0010 1001 F111 CCCC CCAA AAAA (+ Limm) +// SUBSDW<.f> a,b,limm 0010 1bbb 0010 1001 FBBB 1111 10AA AAAA (+ Limm) +// SUBSDW<.cc><.f> b,b,limm 0010 1bbb 1110 1001 FBBB 1111 10QQ QQQQ (+ Limm) +// +// SUBSDW<.f> 0,b,c 0010 1bbb 0010 1001 FBBB CCCC CC11 1110 +// SUBSDW<.f> 0,b,u6 0010 1bbb 0110 1001 FBBB uuuu uu11 1110 +// SUBSDW<.cc><.f> 0,limm,c 0010 1110 1110 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general(op, handleop32_SUBSDW_do_op); // SUBSDW + } + case 0x2f: // SOPs + { + uint8_t subinstr2 = op & 0x0000003f; + switch (subinstr2) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SWAP<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0000 +// SWAP<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0000 +// SWAP<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0000 (+ Limm) +// +// SWAP<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0000 +// SWAP<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0000 +// SWAP<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_SWAP_do_op); // SWAP + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NORM<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0001 +// NORM<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0001 +// NORM<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0001 (+ Limm) +// +// NORM<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0001 +// NORM<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0001 +// NORM<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_NORM_do_op); // NORM + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SAT16<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0010 +// SAT16<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0010 +// SAT16<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0010 (+ Limm) +// +// SAT16<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0010 +// SAT16<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0010 +// SAT16<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_SAT16_do_op); // SAT16 + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RND16<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0011 +// RND16<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0011 +// RND16<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0011 (+ Limm) +// +// RND16<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0011 +// RND16<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0011 +// RND16<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_RND16_do_op); // RND16 + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ABSSW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0100 +// ABSSW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0100 +// ABSSW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0100 (+ Limm) +// +// ABSSW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0100 +// ABSSW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0100 +// ABSSW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_ABSSW_do_op); // ABSSW + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ABSS<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0101 +// ABSS<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0101 +// ABSS<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0101 (+ Limm) +// +// ABSS<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0101 +// ABSS<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0101 +// ABSS<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0101 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_ABSS_do_op); // ABSS + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NEGSW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0110 +// NEGSW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0110 +// NEGSW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0110 (+ Limm) +// +// NEGSW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0110 +// NEGSW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0110 +// NEGSW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_NEGSW_do_op); // NEGSW + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NEGS<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0111 +// NEGS<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0111 +// NEGS<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0111 (+ Limm) +// +// NEGS<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0111 +// NEGS<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0111 +// NEGS<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0111 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_NEGS_do_op); // NEGS + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NORMW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 1000 +// NORMW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 1000 +// NORMW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 1000 (+ Limm) +// +// NORMW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 1000 +// NORMW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 1000 +// NORMW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 1000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + return handleop32_general_SOP_group(op, handleop32_NORMW_do_op); // NORMW + } + case 0x3f: // ZOPs (Zero Operand Opcodes) + { + uint8_t subinstr3 = (op & 0x07000000) >> 24; + subinstr3 |= ((op & 0x00007000) >> 12) << 3; + + switch (subinstr3) + { + default: + { + return arcompact_handle_illegal(instruction, subinstr, subinstr2, subinstr3, op); // illegal + } + } + } + default: + { + return arcompact_handle_illegal(instruction, subinstr, subinstr2, op); // illegal + } + } + } + default: + { + return arcompact_handle_illegal(instruction, subinstr, op); // illegal + } + + } + } + case 0x06: return handleop32_ARC_EXT06(op); // op a,b,c (06 ARC ext) + case 0x07: return handleop32_USER_EXT07(op); // op a,b,c (07 User ext) + case 0x08: return handleop32_USER_EXT08(op); // op a,b,c (08 User ext) + case 0x09: return handleop32_MARKET_EXT09(op); // op a,b,c (09 Market ext) + case 0x0a: return handleop32_MARKET_EXT0a(op); // op a,b,c (0a Market ext) + case 0x0b: return handleop32_MARKET_EXT0b(op); // op a,b,c (0b Market ext) + } + } + else + { + switch (instruction) // 16-bit instructions + { + default: return -1; + case 0x0c: // Load/Add reg-reg + { + uint8_t subinstr = (op & 0x0018) >> 3; + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I S S +// LD_S a,[b,c] 0110 0bbb ccc0 0aaa +// ####################################################################################################################### + return handleop_LD_S_a_b_c(op); // LD_S a,[b,c] + } + case 0x01: + { +// ####################################################################################################################### +// IIII I S S +// LDB_S a,[b,c] 0110 0bbb ccc0 1aaa +// ####################################################################################################################### + return handleop_LDB_S_a_b_c(op); // LDB_S a,[b,c] + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S S +// LDW_S a,[b,c] 0110 0bbb ccc1 0aaa +// ####################################################################################################################### + return handleop_LDW_S_a_b_c(op); // LDW_S a,[b,c] + } + case 0x03: + { +// ####################################################################################################################### +// IIII I S S +// ADD_S a,b,c 0110 0bbb ccc1 1aaa +// ####################################################################################################################### + return handleop_ADD_S_a_b_c(op); // ADD_S a,b,c + } + } + } + case 0x0d: // Add/Sub/Shft imm + { + uint8_t subinstr = (op & 0x0018) >> 3; + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// ADD_S c,b,u3 0110 1bbb ccc0 0uuu +// ####################################################################################################################### + return handleop_ADD_S_c_b_u3(op); // ADD_S c,b,u3 + } + case 0x01: + { +// ####################################################################################################################### +// SUB_S c,b,u3 0110 1bbb ccc0 1uuu +// ####################################################################################################################### + return handleop_SUB_S_c_b_u3(op); // SUB_S c,b,u3 + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S S +// ASL_S c,b,u3 0110 1bbb ccc1 0uuu +// ####################################################################################################################### + return handleop_ASL_S_c_b_u3(op); // ASL_S c,b,u3 + } + case 0x03: + { +// ####################################################################################################################### +// IIII I S S +// ASR_S c,b,u3 0110 1bbb ccc1 1uuu +// ####################################################################################################################### + return handleop_ASR_S_c_b_u3(op); // ASR_S c,b,u3 + } + } + } + case 0x0e: // Mov/Cmp/Add + { + uint8_t subinstr = (op & 0x0018) >> 3; + + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I S S +// ADD_S b,b,h 0111 0bbb hhh0 0HHH +// ADD_S b,b,limm 0111 0bbb 1100 0111 (+ Limm) +// ####################################################################################################################### + return handleop_ADD_S_b_b_h_or_limm(op); // ADD_S b,b,h or ADD_S b,b,limm + } + case 0x01: + { +// ####################################################################################################################### +// IIII I S S +// MOV_S b,h 0111 0bbb hhh0 1HHH +// MOV_S b,limm 0111 0bbb 1100 1111 (+ Limm) +// ####################################################################################################################### + return handleop_MOV_S_b_h_or_limm(op); // MOV_S b,h or MOV_S b,limm + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S S +// CMP_S b,h 0111 0bbb hhh1 0HHH +// CMP_S b,limm 0111 0bbb 1101 0111 (+ Limm) +// ####################################################################################################################### + return handleop_CMP_S_b_h_or_limm(op); // CMP_S b,h or CMP_S b,limm + } + case 0x03: + { +// ####################################################################################################################### +// IIII I S S +// MOV_S h,b 0111 0bbb hhh1 1HHH +// ####################################################################################################################### + return handleop_MOV_S_h_b(op); // MOV_S h,b + } + } + } + case 0x0f: // op_S b,b,c (single 16-bit ops) + { + uint8_t subinstr = op & 0x01f; + + switch (subinstr) + { + case 0x00: // SOPs + { + uint8_t subinstr2 = (op & 0x00e0) >> 5; + + switch (subinstr2) + { + case 0x00: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// J_S [b] 0111 1bbb 0000 0000 +// ####################################################################################################################### + return handleop_J_S_b(op); // J_S [b] + } + case 0x01: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// J_S.D [b] 0111 1bbb 0010 0000 +// ####################################################################################################################### + return handleop_J_S_D_b(op); // J_S.D [b] + } + case 0x02: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// JL_S [b] 0111 1bbb 0100 0000 +// ####################################################################################################################### + return handleop_JL_S_b(op); // JL_S [b] + } + case 0x03: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// JL_S.D [b] 0111 1bbb 0110 0000 +// ####################################################################################################################### + return handleop_JL_S_D_b(op); // JL_S.D [b] + } + case 0x06: + { +// ####################################################################################################################### +// SUB_S.NE b,b,b 0111 1bbb 1100 0000 +// IIII I sssS SSSS +// ####################################################################################################################### + return handleop_SUB_S_NE_b_b_b(op); // SUB_S.NE b,b,b + } + case 0x07: // ZOPs + { + uint8_t subinstr3 = (op & 0x0700) >> 8; + + switch (subinstr3) + { + case 0x00: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// NOP_S 0111 1000 1110 0000 +// ####################################################################################################################### + return handleop_NOP_S(op); // NOP_S + } + case 0x01: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// UNIMP_S 0111 1001 1110 0000 +// ####################################################################################################################### + return handleop_UNIMP_S(op); // UNIMP_S + } + case 0x04: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// JEQ_S [blink] 0111 1100 1110 0000 +// ####################################################################################################################### + return handleop_JEQ_S_blink(op); // JEQ_S [BLINK] + } + case 0x05: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// JNE_S [blink] 0111 1101 1110 0000 +// ####################################################################################################################### + return handleop_JNE_S_blink(op); // JNE_S [BLINK] + } + case 0x06: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// J_S [blink] 0111 1110 1110 0000 +// ####################################################################################################################### + return handleop_J_S_blink(op); // J_S [BLINK] + } + case 0x07: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// J_S.D [blink] 0111 1111 1110 0000 +// ####################################################################################################################### + return handleop_J_S_D_blink(op); // J_S.D [BLINK] + } + + default: // 0x02, 0x03 + { + return arcompact_handle_illegal(instruction,subinstr, subinstr2, subinstr3, op); + } + } + } + default: // 0x04, 0x05 + { + return arcompact_handle_illegal(instruction,subinstr, subinstr2, op); + } + } + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S SSSS +// SUB_S b,b,c 0111 1bbb ccc0 0010 +// ####################################################################################################################### + return handleop_SUB_S_b_b_c(op); // SUB_S b,b,c + } + case 0x04: + { +// ####################################################################################################################### +// IIII I S SSSS +// AND_S b,b,c 0111 1bbb ccc0 0100 +// ####################################################################################################################### + return handleop_AND_S_b_b_c(op); // AND_S b,b,c + } + case 0x05: + { +// ####################################################################################################################### +// IIII I S SSSS +// OR_S b,b,c 0111 1bbb ccc0 0101 +// ####################################################################################################################### + return handleop_OR_S_b_b_c(op); // OR_S b,b,c + } + case 0x06: + { +// ####################################################################################################################### +// IIII I S SSSS +// BIC_S b,b,c 0111 1bbb ccc0 0110 +// ####################################################################################################################### + return handleop_BIC_S_b_b_c(op); // BIC_S b,b,c + } + case 0x07: + { +// ####################################################################################################################### +// IIII I S SSSS +// XOR_S b,b,c 0111 1bbb ccc0 0111 +// ####################################################################################################################### + return handleop_XOR_S_b_b_c(op); // XOR_S b,b,c + } + case 0x0b: + { +// ####################################################################################################################### +// IIII I S SSSS +// TST_S b,c 0111 1bbb ccc0 1011 +// ####################################################################################################################### + return handleop_TST_S_b_c(op); // TST_S b,c + } + case 0x0c: + { +// ####################################################################################################################### +// IIII I S SSSS +// MUL64_S <0,>b,c 0111 1bbb ccc0 1100 +// ####################################################################################################################### + return handleop_MUL64_S_0_b_c(op); // MUL64_S <0,>b,c + } + case 0x0d: + { + +// ####################################################################################################################### +// IIII I S SSSS +// SEXB_S b,c 0111 1bbb ccc0 1101 +// ####################################################################################################################### + return handleop_SEXB_S_b_c(op); // SEXB_S b,c + } + case 0x0e: + { +// ####################################################################################################################### +// IIII I S SSSS +// SEXW_S b,c 0111 1bbb ccc0 1110 +// ####################################################################################################################### + return handleop_SEXW_S_b_c(op); // SEXW_S b,c + } + case 0x0f: + { +// ####################################################################################################################### +// IIII I S SSSS +// EXTB_S b,c 0111 1bbb ccc0 1111 +// ####################################################################################################################### + return handleop_EXTB_S_b_c(op); // EXTB_S b,c + } + case 0x10: + { +// ####################################################################################################################### +// IIII I S SSSS +// EXTW_S b,c 0111 1bbb ccc1 0000 +// ####################################################################################################################### + return handleop_EXTW_S_b_c(op); // EXTW_S b,c + } + case 0x11: + { +// ####################################################################################################################### +// IIII I S SSSS +// ABS_S b,c 0111 1bbb ccc1 0001 +// ####################################################################################################################### + return handleop_ABS_S_b_c(op); // ABS_S b,c + } + case 0x12: + { +// ####################################################################################################################### +// IIII I S SSSS +// NOT_S b,c 0111 1bbb ccc1 0010 +// ####################################################################################################################### + return handleop_NOT_S_b_c(op); // NOT_S b,c + } + case 0x13: + { +// ####################################################################################################################### +// IIII I S SSSS +// NEG_S b,c 0111 1bbb ccc1 0011 +// ####################################################################################################################### + return handleop_NEG_S_b_c(op); // NEG_S b,c + } + case 0x14: + { +// ####################################################################################################################### +// IIII I S SSSS +// ADD1_S b,b,c 0111 1bbb ccc1 0100 +// ####################################################################################################################### + return handleop_ADD1_S_b_b_c(op); // ADD1_S b,b,c + } + case 0x15: + { +// ####################################################################################################################### +// IIII I S SSSS +// ADD2_S b,b,c 0111 1bbb ccc1 0101 +// ####################################################################################################################### + return handleop_ADD2_S_b_b_c(op); // ADD2_S b,b,c + } + case 0x16: + { +// ####################################################################################################################### +// IIII I S SSSS +// ADD3_S b,b,c 0111 1bbb ccc1 0110 +// ####################################################################################################################### + return handleop_ADD3_S_b_b_c(op); // ADD3_S b,b,c + } + case 0x18: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASL_S b,b,c 0111 1bbb ccc1 1000 +// ####################################################################################################################### + return handleop_ASL_S_b_b_c_multiple(op); // ASL_S b,b,c (multiple) + } + case 0x19: + { +// ####################################################################################################################### +// IIII I S SSSS +// LSR_S b,b,c 0111 1bbb ccc1 1001 +// ####################################################################################################################### + return handleop_LSR_S_b_b_c_multiple(op); // LSR_S b,b,c (multiple) + } + case 0x1a: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASR_S b,b,c 0111 1bbb ccc1 1010 +// ####################################################################################################################### + return handleop_ASR_S_b_b_c_multiple(op); // ASR_S b,b,c (multiple) + } + case 0x1b: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASL_S b,c 0111 1bbb ccc1 1011 +// ####################################################################################################################### + return handleop_ASL_S_b_c_single(op); // ASL_S b,c (single) + } + case 0x1c: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASR_S b,c 0111 1bbb ccc1 1100 +// ####################################################################################################################### + return handleop_ASR_S_b_c_single(op); // ASR_S b,c (single) + } + case 0x1d: + { +// ####################################################################################################################### +// IIII I S SSSS +// LSR_S b,c 0111 1bbb ccc1 1101 +// ####################################################################################################################### + return handleop_LSR_S_b_c_single(op); // LSR_S b,c (single) + } + case 0x1e: + { +// ####################################################################################################################### +// IIII I S SSSS +// TRAP_S u6 0111 1uuu uuu1 1110 +// ####################################################################################################################### + return handleop_TRAP_S_u6(op); // TRAP_S u6 (not a5?) + } + case 0x1f: + { + uint8_t subinstr2 = (op & 0x07e0) >> 5; + if (subinstr2 == 0x3f) + { +// ####################################################################################################################### +// IIII Isss sssS SSSS +// BRK_S 0111 1111 1111 1111 +// ####################################################################################################################### + return handleop_BRK_S(op); // BRK_S ( 0x7fff only? ) + } + else + { + return arcompact_handle_illegal(instruction,subinstr,subinstr2, op); + } + } + default: // 0x01, 0x03, 0x08, 0x09, 0x0a, 0x17 + { + return arcompact_handle_illegal(instruction, subinstr, op); + } + } + } + case 0x10: + { +// ####################################################################################################################### +// IIII I +// LD_S c,[b,u7] 1000 0bbb cccu uuuu +// ####################################################################################################################### + return handleop_LD_S_c_b_u7(op); // LD_S c,[b,u7] + } + case 0x11: + { +// ####################################################################################################################### +// IIII I +// LDB_S c,[b,u5] 1000 1bbb cccu uuuu +// ####################################################################################################################### + return handleop_LDB_S_c_b_u5(op); // LDB_S c,[b,u5] + } + case 0x12: + { +// ####################################################################################################################### +// IIII I +// LDW_S c,[b,u6] 1001 0bbb cccu uuuu +// ####################################################################################################################### + return handleop_LDW_S_c_b_u6(op); // LDW_S c,[b,u6] + } + case 0x13: + { +// ####################################################################################################################### +// IIII I +// LDW_S.X c,[b,u6] 1001 1bbb cccu uuuu +// ####################################################################################################################### + return handleop_LDW_S_X_c_b_u6(op); // LDW_S.X c,[b,u6] + } + case 0x14: + { +// ####################################################################################################################### +// IIII I +// ST_S c,[b,u7] 1010 0bbb cccu uuuu +// ####################################################################################################################### + return handleop_ST_S_c_b_u7(op); // ST_S c,[b,u7] + } + case 0x15: + { +// ####################################################################################################################### +// IIII I +// STB_S c,[b,u5] 1010 1bbb cccu uuuu +// ####################################################################################################################### + return handleop_STB_S_c_b_u5(op); // STB_S + } + case 0x16: + { +// ####################################################################################################################### +// IIII I +// STW_S c,[b,u6] 1011 0bbb cccu uuuu +// ####################################################################################################################### + return handleop_STW_S_c_b_u6(op); // STW_S + } + case 0x17: // Shift/Sub/Bit + { + uint8_t subinstr = (op & 0x00e0) >> 5; + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I SSS +// ASL_S b,b,u5 1011 1bbb 000u uuuu +// ####################################################################################################################### + return handleop_ASL_S_b_b_u5(op); // ASL_S b,b,u5 + } + case 0x01: + { +// ####################################################################################################################### +// IIII I SSS +// LSR_S b,b,u5 1011 1bbb 001u uuuu +// ####################################################################################################################### + return handleop_LSR_S_b_b_u5(op); // LSR_S b,b,u5 + } + case 0x02: + { +// ####################################################################################################################### +// IIII I SSS +// ASR_S b,b,u5 1011 1bbb 010u uuuu +// ####################################################################################################################### + return handleop_ASR_S_b_b_u5(op); // ASR_S b,b,u5 + } + case 0x03: + { +// ####################################################################################################################### +// IIII I SSS +// SUB_S b,b,u5 1011 1bbb 011u uuuu +// ####################################################################################################################### + return handleop_SUB_S_b_b_u5(op); // SUB_S b,b,u5 + } + case 0x04: + { +// ####################################################################################################################### +// IIII I SSS +// BSET_S b,b,u5 1011 1bbb 100u uuuu +// ####################################################################################################################### + return handleop_BSET_S_b_b_u5(op); // BSET_S b,b,u5 + } + case 0x05: + { +// ####################################################################################################################### +// IIII I SSS +// BCLR_S b,b,u5 1011 1bbb 101u uuuu +// ####################################################################################################################### + return handleop_BCLR_S_b_b_u5(op); // BCLR_S b,b,u5 + } + case 0x06: + { +// ####################################################################################################################### +// IIII I SSS +// BMSK_S b,b,u5 1011 1bbb 110u uuuu +// ####################################################################################################################### + return handleop_BMSK_S_b_b_u5(op); // BMSK_S b,b,u5 + } + case 0x07: + { +// ####################################################################################################################### +// IIII I SSS +// BTST_S b,u5 1011 1bbb 111u uuuu +// ####################################################################################################################### + return handleop_BTST_S_b_u5(op); // BTST_S b,u5 + } + } + } + case 0x18: // Stack Instr + { + uint8_t subinstr = (op & 0x00e0) >> 5; + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I SSS +// LD_S b,[sp,u7] 1100 0bbb 000u uuuu +// ####################################################################################################################### + return handleop_LD_S_b_sp_u7(op); // LD_S b,[sp,u7] + } + case 0x01: + { +// ####################################################################################################################### +// IIII I SSS +// LDB_S b,[sp,u7] 1100 0bbb 001u uuuu +// ####################################################################################################################### + return handleop_LDB_S_b_sp_u7(op); // LDB_S b,[sp,u7] + } + case 0x02: + { +// ####################################################################################################################### +// IIII I SSS +// ST_S b,[sp,u7] 1100 0bbb 010u uuuu +// ####################################################################################################################### + return handleop_ST_S_b_sp_u7(op); // ST_S b,[sp,u7] + } + case 0x03: + { +// ####################################################################################################################### +// IIII I SSS +// STB_S b,[sp,u7] 1100 0bbb 011u uuuu +// ####################################################################################################################### + return handleop_STB_S_b_sp_u7(op); // STB_S b,[sp,u7] + } + case 0x04: + { +// ####################################################################################################################### +// IIII I SSS +// ADD_S b,sp,u7 1100 0bbb 100u uuuu +// ####################################################################################################################### + return handleop_ADD_S_b_sp_u7(op); // ADD_S b,sp,u7 + } + + case 0x05: // subtable 18_05 + { + uint8_t subinstr2 = (op & 0x0700) >> 8; + switch (subinstr2) + { + case 0x00: + { +// ####################################################################################################################### +// IIII Isss SSS +// ADD_S sp,sp,u7 1100 0000 101u uuuu +// ####################################################################################################################### + return handleop_ADD_S_sp_sp_u7(op); // ADD_S sp,sp,u7 + } + case 0x01: + { +// ####################################################################################################################### +// IIII Isss SSS +// SUB_S sp,sp,u7 1100 0001 101u uuuu +// ####################################################################################################################### + return handleop_SUB_S_sp_sp_u7(op); // SUB_S sp,sp,u7 + } + default: return arcompact_handle_illegal(instruction,subinstr,subinstr2, op); + } + } + case 0x06: // subtable 18_06 + { + uint8_t subinstr2 = op & 0x001f; + switch (subinstr2) + { + case 0x01: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// POP_S b 1100 0bbb 1100 0001 +// ####################################################################################################################### + return handleop_POP_S_b(op); // POP_S b + } + case 0x11: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// POP_S blink 1100 0RRR 1101 0001 +// ####################################################################################################################### + return handleop_POP_S_blink(op); // POP_S blink + } + default: return arcompact_handle_illegal(instruction,subinstr,subinstr2, op); + } + } + case 0x07: // subtable 18_07 + { + uint8_t subinstr2 = op & 0x001f; + + switch (subinstr2) + { + case 0x01: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// PUSH_S b 1100 0bbb 1110 0001 +// ####################################################################################################################### + return handleop_PUSH_S_b(op); // PUSH_S b + } + case 0x11: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// PUSH_S blink 1100 0RRR 1111 0001 +// ####################################################################################################################### + return handleop_PUSH_S_blink(op); // PUSH_S blink + } + default: return arcompact_handle_illegal(instruction,subinstr,subinstr2, op); + } + } + } + } + case 0x19: // GP Instr + { + uint8_t subinstr = (op & 0x0600) >> 9; + + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII ISS +// LD_S r0,[gp,s11] 1100 100s ssss ssss +// ####################################################################################################################### + return handleop_LD_S_r0_gp_s11(op); // LD_S r0,[gp,s11] + } + case 0x01: + { +// ####################################################################################################################### +// IIII ISS +// LDB_S r0,[gp,s9] 1100 101s ssss ssss +// ####################################################################################################################### + return handleop_LDB_S_r0_gp_s9(op); // LDB_S r0,[gp,s9] + } + case 0x02: + { +// ####################################################################################################################### +// IIII ISS +// LDW_S r0,[gp,s10] 1100 110s ssss ssss +// ####################################################################################################################### + return handleop_LDW_S_r0_gp_s10(op); // LDW_S r0,[gp,s10] + } + case 0x03: + { +// ####################################################################################################################### +// IIII ISS +// ADD_S r0,gp,s11 1100 111s ssss ssss +// ####################################################################################################################### + return handleop_ADD_S_r0_gp_s11(op); // ADD_S r0,gp,s11 + } + } + } + case 0x1a: + { +// ####################################################################################################################### +// IIII I +// LD_S b,[pcl,u10] 1101 0bbb uuuu uuuu +// ####################################################################################################################### + return handleop_LD_S_b_pcl_u10(op); // LD_S b,[pcl,u10] + } + + case 0x1b: + { +// ####################################################################################################################### +// IIII I +// MOV_S b,u8 1101 1bbb uuuu uuuu +// ####################################################################################################################### + return handleop_MOV_S_b_u8(op); // MOV_S b, u8 + } + + case 0x1c: // ADD_S/CMP_S + { + uint8_t subinstr = (op & 0x0080) >> 7; + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I s +// ADD_S b,b,u7 1110 0bbb 0uuu uuuu +// ####################################################################################################################### + return handleop_ADD_S_b_b_u7(op); // ADD_S b, b, u7 + } + case 0x01: + { +// ####################################################################################################################### +// IIII I s +// CMP_S b,u7 1110 0bbb 1uuu uuuu +// ####################################################################################################################### + return handleop_CMP_S_b_u7(op); // CMP_S b, u7 + } + } + } + case 0x1d: // BRcc_S + { + uint8_t subinstr = (op & 0x0080) >> 7; + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I s +// BREQ_S b,0,s8 1110 1bbb 0sss ssss +// ####################################################################################################################### + return handleop_BREQ_S_b_0_s8(op); // BREQ_S b,0,s8 + } + case 0x01: + { +// ####################################################################################################################### +// IIII I s +// BRNE_S b,0,s8 1110 1bbb 1sss ssss +// ####################################################################################################################### + return handleop_BRNE_S_b_0_s8(op); // BRNE_S b,0,s8 + } + } + } + case 0x1e: // Bcc_S + { + uint8_t subinstr = (op & 0x0600) >> 9; + switch (subinstr) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII ISS +// B_S s10 1111 000s ssss ssss +// ####################################################################################################################### + return handleop_B_S_s10(op); // B_S s10 + } + case 0x01: + { +// ####################################################################################################################### +// IIII ISS +// BEQ_S s10 1111 001s ssss ssss +// ####################################################################################################################### + return handleop_BEQ_S_s10(op); // BEQ_S s10 + } + case 0x02: + { +// ####################################################################################################################### +// IIII ISS +// BNE_S s10 1111 010s ssss ssss +// ####################################################################################################################### + return handleop_BNE_S_s10(op); // BNE_S s10 + } + case 0x03: // Bcc_S + { + uint8_t subinstr2 = (op & 0x01c0) >> 6; + switch (subinstr2) + { + default: return -1; + case 0x00: + { +// ####################################################################################################################### +// IIII ISSs ss +// BGT_S s7 1111 0110 00ss ssss +// ####################################################################################################################### + return handleop_BGT_S_s7(op); // BGT_S s7 + } + case 0x01: + { +// ####################################################################################################################### +// IIII ISSs ss +// BGE_S s7 1111 0110 01ss ssss +// ####################################################################################################################### + return handleop_BGE_S_s7(op); // BGE_S s7 + } + case 0x02: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLT_S s7 1111 0110 10ss ssss +// ####################################################################################################################### + return handleop_BLT_S_s7(op); // BLT_S s7 + } + case 0x03: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLE_S s7 1111 0110 11ss ssss +// ####################################################################################################################### + return handleop_BLE_S_s7(op); // BLE_S s7 + } + case 0x04: + { +// ####################################################################################################################### +// IIII ISSs ss +// BHI_S s7 1111 0111 00ss ssss +// ####################################################################################################################### + return handleop_BHI_S_s7(op); // BHI_S s7 + } + case 0x05: + { +// ####################################################################################################################### +// IIII ISSs ss +// BHS_S s7 1111 0111 01ss ssss +// ####################################################################################################################### + return handleop_BHS_S_s7(op); // BHS_S s7 + } + case 0x06: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLO_S s7 1111 0111 10ss ssss +// ####################################################################################################################### + return handleop_BLO_S_s7(op); // BLO_S s7 + } + + case 0x07: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLS_S s7 1111 0111 11ss ssss +// ####################################################################################################################### + return handleop_BLS_S_s7(op); // BLS_S s7 + } + } + } + } + } + case 0x1f: + { +// ####################################################################################################################### +// IIII I +// BL_S s13 1111 1sss ssss ssss +// ####################################################################################################################### + return handleop_BL_S_s13(op); // BL_S s13 + } + } + } + return 0; } diff --git a/src/devices/cpu/arcompact/arcompact.h b/src/devices/cpu/arcompact/arcompact.h index d87499bc969..85e1378a122 100644 --- a/src/devices/cpu/arcompact/arcompact.h +++ b/src/devices/cpu/arcompact/arcompact.h @@ -1,9 +1,7 @@ // license:BSD-3-Clause // copyright-holders:David Haywood /*********************************\ - ARCompact Core - \*********************************/ #ifndef MAME_CPU_ARCOMPACT_ARCOMPACT_H @@ -11,78 +9,14 @@ #pragma once -enum -{ - ARCOMPACT_PC = STATE_GENPC, - ARCOMPACT_STATUS32 = 0x10, - ARCOMPACT_LP_START, - ARCOMPACT_LP_END - -}; - -#define ARCOMPACT_RETTYPE uint32_t -#define OPS_32 uint32_t op -#define OPS_16 uint16_t op -#define PARAMS op -#define LIMM_REG 62 -#define ARCOMPACT_OPERATION ((op & 0xf800) >> 11) - - -#define ARCOMPACT_HANDLER04_P11_TYPE(name) \ -ARCOMPACT_RETTYPE arcompact_handle##name##_p11(OPS_32) \ -{ \ - int M = (op & 0x00000020) >> 5; \ - \ - switch (M) \ - { \ - case 0x00: return arcompact_handle##name##_p11_m0(PARAMS); \ - case 0x01: return arcompact_handle##name##_p11_m1(PARAMS); \ - } \ - \ - return 0; \ -} -#define ARCOMPACT_HANDLER04_TYPE(name) \ -ARCOMPACT_RETTYPE arcompact_handle##name(OPS_32) \ -{ \ - int p = (op & 0x00c00000) >> 22; \ - \ - switch (p) \ - { \ - case 0x00: return arcompact_handle##name##_p00(PARAMS); \ - case 0x01: return arcompact_handle##name##_p01(PARAMS); \ - case 0x02: return arcompact_handle##name##_p10(PARAMS); \ - case 0x03: return arcompact_handle##name##_p11(PARAMS); \ - } \ - \ - return 0; \ -} - -#define ARCOMPACT_HANDLER04_TYPE_PM(name) \ - ARCOMPACT_RETTYPE arcompact_handle##name##_p00(OPS_32); \ - ARCOMPACT_RETTYPE arcompact_handle##name##_p01(OPS_32); \ - ARCOMPACT_RETTYPE arcompact_handle##name##_p10(OPS_32); \ - ARCOMPACT_RETTYPE arcompact_handle##name##_p11_m0(OPS_32); \ - ARCOMPACT_RETTYPE arcompact_handle##name##_p11_m1(OPS_32); \ - ARCOMPACT_HANDLER04_P11_TYPE(name); \ - ARCOMPACT_HANDLER04_TYPE(name); - class arcompact_device : public cpu_device { public: // construction/destruction arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - uint32_t arcompact_auxreg002_LPSTART_r(); - void arcompact_auxreg002_LPSTART_w(uint32_t data); - uint32_t arcompact_auxreg003_LPEND_r(); - void arcompact_auxreg003_LPEND_w(uint32_t data); - - uint32_t arcompact_auxreg00a_STATUS32_r(); - uint32_t arcompact_auxreg025_INTVECTORBASE_r(); - void arcompact_auxreg025_INTVECTORBASE_w(uint32_t data); + void set_default_vector_base(uint32_t address) { m_default_vector_base = address & 0xfffffc00; } - - void arcompact_auxreg_map(address_map &map); protected: // device-level overrides virtual void device_start() override; @@ -105,726 +39,555 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr create_disassembler() override; +private: + void arcompact_auxreg_map(address_map &map); + + + uint32_t arcompact_auxreg002_LPSTART_r(); + void arcompact_auxreg002_LPSTART_w(uint32_t data); + uint32_t arcompact_auxreg003_LPEND_r(); + void arcompact_auxreg003_LPEND_w(uint32_t data); + + uint32_t arcompact_auxreg00a_STATUS32_r(); + + uint32_t arcompact_auxreg00b_STATUS32_L1_r(); + uint32_t arcompact_auxreg00c_STATUS32_L2_r(); + void arcompact_auxreg00b_STATUS32_L1_w(uint32_t data); + void arcompact_auxreg00c_STATUS32_L2_w(uint32_t data); + + void arcompact_auxreg012_MULHI_w(uint32_t data); + + uint32_t arcompact_auxreg012_TIMER0_r(offs_t offset); + uint32_t arcompact_auxreg100_TIMER1_r(offs_t offset); + void arcompact_auxreg012_TIMER0_w(offs_t offset, uint32_t data); + void arcompact_auxreg100_TIMER1_w(offs_t offset, uint32_t data); + + uint32_t arcompact_auxreg025_INTVECTORBASE_r(); + void arcompact_auxreg025_INTVECTORBASE_w(uint32_t data); + + uint32_t arcompact_auxreg043_AUX_IRQ_LV12_r(); + void arcompact_auxreg043_AUX_IRQ_LV12_w(uint32_t data); + + uint32_t arcompact_auxreg200_AUX_IRQ_LVL_r(); + void arcompact_auxreg200_AUX_IRQ_LVL_w(uint32_t data); + + + const static int REG_BLINK = 0x1f; // r31 + const static int REG_GP = 0x1a; // r26 + const static int REG_FP = 0x1b; // r27 + const static int REG_SP = 0x1c; // r28 + const static int REG_ILINK1 = 0x1d; // r29 + const static int REG_ILINK2 = 0x1e; // r30 + const static int REG_MLO = 0x39; // r57 - multiply low 32-bits (of 64-bit result) + const static int REG_MMID = 0x3a; // r58 - multiply mid 32-bits (of 64-bit result - overlaps) + const static int REG_MHI = 0x3b; // r59 - multiply high 32-bits (of 64-bit result) + const static int REG_LP_COUNT = 0x3c; // r60 + const static int REG_LIMM = 0x3e; // r62 - used to indicate long immedaite + const static int REG_PCL = 0x3f; // r63 + + const static uint32_t E1_FLAG = 0x00000002; + const static uint32_t E2_FLAG = 0x00000004; + + const static uint32_t V_OVERFLOW_FLAG = 0x00000100; + const static uint32_t C_CARRY_FLAG = 0x00000200; + const static uint32_t N_NEGATIVE_FLAG = 0x00000400; + const static uint32_t Z_ZERO_FLAG = 0x00000800; + + enum + { + ARCOMPACT_PC = STATE_GENPC, + ARCOMPACT_STATUS32 = 0x10, + ARCOMPACT_LP_START, + ARCOMPACT_LP_END + }; + + void get_limm_32bit_opcode() + { + m_regs[REG_LIMM] = (READ16((m_pc + 4)) << 16); + m_regs[REG_LIMM] |= READ16((m_pc + 6)); + } + + void get_limm_16bit_opcode() + { + m_regs[REG_LIMM] = (READ16((m_pc + 2)) << 16); + m_regs[REG_LIMM] |= READ16((m_pc + 4)); + } + + // registers used in 16-bit opcodes have a limited range + // and can only address registers r0-r3 and r12-r15 + static uint8_t common16_get_and_expand_breg(uint16_t op) + { + uint8_t reg = ((op & 0x0700) >> 8); + if (reg>3) reg += 8; + return reg; + } + + static uint8_t common16_get_and_expand_creg(uint16_t op) + { + uint8_t reg = ((op & 0x00e0) >> 5); + if (reg>3) reg += 8; + return reg; + } + + static uint8_t common16_get_and_expand_areg(uint16_t op) + { + uint8_t reg = op & 0x0007; + if (reg>3) reg += 8; + return reg; + } + + static uint8_t common16_get_u3(uint16_t op) + { + return op & 0x0007; + } + + static uint8_t common16_get_u5(uint16_t op) + { + return op & 0x001f; + } + + static uint8_t common16_get_u8(uint16_t op) + { + return op & 0x00ff; + } + + static uint8_t common16_get_u7(uint16_t op) + { + return op & 0x007f; + } + + static uint32_t common16_get_s9(uint16_t op) + { + uint32_t s = util::sext(op, 9); + return s; + } + + static uint8_t common32_get_breg(uint32_t op) + { + int b_temp = (op & 0x07000000) >> 24; + int B_temp = (op & 0x00007000) >> 12; + return b_temp | (B_temp << 3); + } + + static bool common32_get_F(uint32_t op) + { + return (op & 0x00008000) ? true : false; + } + + static uint8_t common32_get_creg(uint32_t op) + { + return (op & 0x00000fc0) >> 6; + } + + static uint8_t common32_get_areg(uint32_t op) + { + return op & 0x0000003f; + } + + static uint8_t common32_get_p(uint32_t op) + { + return (op & 0x00c00000) >> 22; + } + + static uint8_t common32_get_areg_reserved(uint32_t op) + { + return op & 0x0000003f; + } + + static uint32_t common32_get_s12(uint32_t op) + { + int S_temp = op & 0x0000003f; + int s_temp = (op & 0x00000fc0) >> 6; + uint32_t S = s_temp | (S_temp<<6); + S = util::sext(S, 12); + return S; + } + + static uint32_t common32_get_u6(uint32_t op) + { + return (op & 0x00000fc0) >> 6; + } + + int check_limm16(uint8_t hreg) + { + if (hreg == REG_LIMM) + { + get_limm_16bit_opcode(); + return 6; + } + return 2; + } + + int check_limm(uint8_t reg) + { + if (reg == REG_LIMM) + { + get_limm_32bit_opcode(); + return 8; + } + return 4; + } + + int check_limm(uint8_t breg, uint8_t creg) + { + if ((breg == REG_LIMM) || (creg == REG_LIMM)) + { + get_limm_32bit_opcode(); + return 8; + } + return 4; + } + + static uint8_t group_0e_get_h(uint16_t op) + { + uint8_t h = ((op & 0x0007) << 3); + h |= ((op & 0x00e0) >> 5); + return h; + } + + static uint8_t common32_get_condition(uint32_t op) + { + return op & 0x0000001f; + } + + void status32_set_e1() { m_status32 |= E1_FLAG; } + void status32_clear_e1() { m_status32 &= ~E1_FLAG; } + bool status32_check_e1() { return (m_status32 & E1_FLAG ? true : false); } + + void status32_set_e2() { m_status32 |= E2_FLAG; } + void status32_clear_e2() { m_status32 &= ~E2_FLAG; } + bool status32_check_e2() { return (m_status32 & E2_FLAG ? true : false); } + + // V = overflow (set if signed operation would overflow) + void status32_set_v() { m_status32 |= V_OVERFLOW_FLAG; } + void status32_clear_v() { m_status32 &= ~V_OVERFLOW_FLAG; } + bool status32_check_v() { return (m_status32 & V_OVERFLOW_FLAG ? true : false); } + + // C = carry (unsigned op, carry set is same condition as LO Lower Than, carry clear is same condition as HS Higher Same) + void status32_set_c() { m_status32 |= C_CARRY_FLAG; } + void status32_clear_c() { m_status32 &= ~C_CARRY_FLAG; } + bool status32_check_c() { return (m_status32 & C_CARRY_FLAG ? true : false); } + + // N = negative (set if most significant bit of result is set) + void status32_set_n() { m_status32 |= N_NEGATIVE_FLAG; } + void status32_clear_n() { m_status32 &= ~N_NEGATIVE_FLAG; } + bool status32_check_n() { return (m_status32 & N_NEGATIVE_FLAG ? true : false); } + + // Z = zero (set if result is zero, ie both values the same for CMP) + void status32_set_z() { m_status32 |= Z_ZERO_FLAG; } + void status32_clear_z() { m_status32 &= ~Z_ZERO_FLAG; } + bool status32_check_z() { return (m_status32 & Z_ZERO_FLAG ? true : false); } + + // debug is the name of the register, this is not a debug function + void debugreg_set_ZZ() { m_debug |= (1<<23); } + void debugreg_clear_ZZ() { m_debug &= ~(1<<23); } + bool debugreg_check_ZZ() { return (m_debug & (1<<23)) ? true : false; } + + // 0x00 - AL / RA - Always + static bool condition_AL() { return (true); } + // 0x01 - EQ / Z - Zero + bool condition_EQ() { return (status32_check_z()); } + // 0x02 - NE / NZ - Non-Zero + bool condition_NE() { return (!status32_check_z()); } + // 0x03 - PL / P - Positive + bool condition_PL() { return (!status32_check_n()); } + // 0x04 - MI / N - Negative + bool condition_MI() { return (status32_check_n()); } + // 0x05 - CS / C / LO - Carry Set + bool condition_CS() { return (status32_check_c()); } + // 0x06 - CC / NC / HS - Carry Clear + bool condition_HS() { return (!status32_check_c()); } + // 0x07 - VS / V - Overflow set + bool condition_VS() { return (status32_check_v()); } + // 0x08 - VC / NV - Overflow clear + bool condition_VC() { return (!status32_check_v()); } + // 0x09 GT - Greater than (signed) + bool condition_GT() { return ((status32_check_n() && status32_check_v() && !status32_check_z()) || (!status32_check_n() && !status32_check_v() && !status32_check_z())); } + // 0x0a - GE - Greater than or equal to (signed) + bool condition_GE() { return ((status32_check_n() && status32_check_v()) || (!status32_check_n() && !status32_check_v())); } + // 0x0b - LT - Less than (signed) + bool condition_LT() { return ((status32_check_n() && !status32_check_v()) || (!status32_check_n() && status32_check_v())); }; + // 0x0c - LE - Less than or equal (signed) + bool condition_LE() { return ((status32_check_z()) || (status32_check_n() && !status32_check_v()) || (!status32_check_n() && status32_check_v())) ; } + // 0x0d - HI - Higher than (unsigned) + bool condition_HI() { return ((!status32_check_c()) && (!status32_check_z())); } + // 0x0e - LS - Lower than or same (unsigned) + bool condition_LS() { return (status32_check_c() || status32_check_z()); } + // 0x0f - PNZ - Positive Non Zero + bool condition_PNZ() { return ((!status32_check_n()) && (!status32_check_z())); } + + void check_interrupts(); + /************************************************************************************************************************************ + * * + * 32-bit opcode handlers * + * * + ************************************************************************************************************************************/ - // Dispatch - ARCOMPACT_RETTYPE arcompact_handle00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle05_2f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle0c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle19(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03(OPS_16); - - // Handler - - ARCOMPACT_RETTYPE arcompact_handle00_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle00_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_00_00dasm(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_00_01dasm(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_03(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_05(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_0e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_03(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_05(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_0e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle03(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_01(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_03(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_04(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_05(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_06(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_09(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_0d(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_0e(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_10(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_11(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_12(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_14(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_16(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_17(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_18(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_19(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_1a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_1b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_1c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_1d(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_20(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_21(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_22(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_23(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_28(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_29(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_2a(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_2b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_01(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_2f_02(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_2f_03(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_05(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_06(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_2f_07(OPS_32); -// ARCOMPACT_RETTYPE arcompact_handle04_2f_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_03(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_05(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_30(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_31(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_32(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_33(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_34(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_35(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_36(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_37(OPS_32); - //ARCOMPACT_RETTYPE arcompact_handle05_00(OPS_32); - //ARCOMPACT_RETTYPE arcompact_handle05_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_03(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_05(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_06(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_28(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_29(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle06(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle0b(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle0c_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0c_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0c_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0c_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0d_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0d_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0d_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0d_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0e_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0e_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0e_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0e_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_0b(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_0c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_0d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_0e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_0f(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_10(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_11(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_12(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_13(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_14(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_15(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_16(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_18(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_19(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_1a(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_1b(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_1c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_1d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_1e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_1f(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle10(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle11(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle12(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle13(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle14(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle15(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle16(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle17_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_11(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_11(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle19_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle19_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle19_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle19_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1a(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1b(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1c_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1c_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1d_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1d_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1e_03_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle1f(OPS_16); + // arcompact_execute_ops_00to01.cpp + uint32_t handleop32_B_cc_D_s21(uint32_t op); + uint32_t handleop32_B_D_s25(uint32_t op); + uint32_t handleop32_BL_cc_d_s21(uint32_t op); + uint32_t handleop32_BL_d_s25(uint32_t op); + uint32_t get_01_01_01_address_offset(uint32_t op); + uint32_t BRxx_takejump(uint32_t address, uint8_t n, int size, bool link); + static bool BRxx_condition(uint8_t condition, uint32_t b, uint32_t c); + uint32_t handleop32_BRxx_reg_reg(uint32_t op, uint8_t condition); + uint32_t handleop32_BRxx_reg_imm(uint32_t op, uint8_t condition); + + // arcompact_execute_ops_02to03.cpp + uint32_t handleop32_LD_r_o(uint32_t op); + uint32_t handleop32_ST_r_o(uint32_t op); + + // arcompact_execute_ops_04.cpp + static uint32_t handleop32_ADD_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ADC_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_SUB_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_AND_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_OR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_BIC_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_XOR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + + void handleop32_MOV_do_op(uint32_t breg, uint32_t src2, bool set_flags); + uint32_t handleop32_MOV(uint32_t op); + + static uint32_t handleop32_RSUB_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_BSET_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_BCLR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_BMSK_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ADD1_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ADD2_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ADD3_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_SUB1_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_SUB2_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_SUB3_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_SBC_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_MAX_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_MIN_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_BXOR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_MPY_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_MPYH_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_MPYHU_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_MPYU_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + + static void handleop32_TST_do_op(arcompact_device &o, uint32_t src1, uint32_t src2); + static void handleop32_CMP_do_op(arcompact_device &o, uint32_t src1, uint32_t src2); + static void handleop32_RCMP_do_op(arcompact_device &o, uint32_t src1, uint32_t src2); + static void handleop32_BTST_do_op(arcompact_device &o, uint32_t src1, uint32_t src2); + + void handleop32_FLAG_do_op(uint32_t source); + uint32_t handleop32_FLAG(uint32_t op); + + // arcompact_execute_ops_04_jumps.cpp + inline uint32_t handle_jump_to_addr(bool delay, bool link, uint32_t address, uint32_t next_addr); + inline uint32_t handle_jump_to_register(bool delay, bool link, uint32_t reg, uint32_t next_addr, int flag); + inline uint32_t handleop32_Jcc_f_a_b_c_helper(uint32_t op, bool delay, bool link); + inline uint32_t handleop32_Jcc_cc_f_b_b_c_helper(uint32_t op, bool delay, bool link); + uint32_t handleop32_J(uint32_t op, bool delay, bool link); + + // arcompact_execute_ops_04_aux.cpp + uint32_t handleop32_LR(uint32_t op); + uint32_t handleop32_SR(uint32_t op); + + // arcompact_execute_ops_04_loop.cpp + uint32_t handleop32_LP(uint32_t op); + + // arcompact_execute_ops_04_2f_sop.cpp + static uint32_t handleop32_ASR_single_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_ASL_single_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_LSR_single_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_ROR_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_EXTB_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_EXTW_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_RLC_do_op(arcompact_device &o, uint32_t src, bool set_flags); + + static uint32_t handleop32_RRC_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_SEXB_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_SEXW_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_ABS_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_NOT_do_op(arcompact_device &o, uint32_t src, bool set_flags); + uint32_t handleop32_EX(uint32_t op); + + // arcompact_execute_ops_04_2f_3f_zop.cpp + uint32_t handleop32_SLEEP(uint32_t op); + uint32_t handleop32_SWI(uint32_t op); + uint32_t handleop32_SYNC(uint32_t op); + uint32_t handleop32_RTIE(uint32_t op); + uint32_t handleop32_BRK(uint32_t op); + + // arcompact_execute_ops_04_3x.cpp + uint32_t handleop32_LDrr(uint32_t op, int dsize, int extend); + + // arcompact_execute_ops_05.cpp + static uint32_t handleop32_ASL_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_LSR_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ASR_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ROR_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static void handleop32_MUL64_do_op(arcompact_device &o, uint32_t src1, uint32_t src2); + static void handleop32_MULU64_do_op(arcompact_device &o, uint32_t src1, uint32_t src2); + static uint32_t handleop32_ADDS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_SUBS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_DIVAW_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ASLS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ASRS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_ADDSDW_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_SUBSDW_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_UNKNOWN_05_0c_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_UNKNOWN_05_10_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + static uint32_t handleop32_UNKNOWN_05_14_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags); + + // arcompact_execute_ops_05_2f_sop.cpp + static uint32_t handleop32_NORM_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_SWAP_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_SAT16_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_RND16_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_ABSSW_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_ABSS_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_NEGSW_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_NEGS_do_op(arcompact_device &o, uint32_t src, bool set_flags); + static uint32_t handleop32_NORMW_do_op(arcompact_device &o, uint32_t src, bool set_flags); + + // arcompact_execute_ops_06to0b.cpp + uint32_t handleop32_ARC_EXT06(uint32_t op); + uint32_t handleop32_USER_EXT07(uint32_t op); + uint32_t handleop32_USER_EXT08(uint32_t op); + uint32_t handleop32_MARKET_EXT09(uint32_t op); + uint32_t handleop32_MARKET_EXT0a(uint32_t op); + uint32_t handleop32_MARKET_EXT0b(uint32_t op); /************************************************************************************************************************************ * * - * illegal opcode handlers (disassembly) * + * 16-bit opcode handlers * * * ************************************************************************************************************************************/ - ARCOMPACT_RETTYPE arcompact_handle01_01_00_06(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_00_0d(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle01_01_01_06(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle01_01_01_0d(OPS_32); - - - ARCOMPACT_RETTYPE arcompact_handle04_1e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_1f(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle04_24(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_25(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_26(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_27(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle04_2c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2e(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle04_2f_0d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_0e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_10(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_11(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_12(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_13(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_14(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_15(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_16(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_17(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_18(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_19(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_1a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_1b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_1c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_1d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_1e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_1f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_20(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_21(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_22(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_23(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_24(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_25(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_26(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_27(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_28(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_29(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_2a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_2b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_2c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_2d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_2e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_2f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_30(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_31(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_32(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_33(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_34(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_35(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_36(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_37(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_38(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_39(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3e(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_06(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_0d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_0e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_10(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_11(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_12(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_13(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_14(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_15(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_16(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_17(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_18(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_19(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_1a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_1b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_1c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_1d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_1e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_1f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_20(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_21(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_22(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_23(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_24(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_25(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_26(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_27(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_28(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_29(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_2a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_2b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_2c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_2d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_2e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_2f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_30(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_31(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_32(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_33(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_34(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_35(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_36(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_37(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_38(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_39(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_3a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_3b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_3c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_3d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_3e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2f_3f_3f(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle05_2f_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_03(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_05(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_06(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_0d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_0e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_10(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_11(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_12(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_13(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_14(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_15(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_16(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_17(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_18(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_19(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_1a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_1b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_1c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_1d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_1e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_1f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_20(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_21(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_22(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_23(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_24(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_25(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_26(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_27(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_28(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_29(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_2a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_2b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_2c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_2d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_2e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_2f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_30(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_31(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_32(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_33(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_34(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_35(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_36(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_37(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_38(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_39(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3e(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_00(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_01(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_02(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_03(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_04(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_05(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_06(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_07(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_08(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_0a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_0b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_0d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_0e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_10(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_11(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_12(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_13(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_14(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_15(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_16(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_17(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_18(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_19(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_1a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_1b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_1c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_1d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_1e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_1f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_20(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_21(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_22(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_23(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_24(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_25(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_26(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_27(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_28(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_29(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_2a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_2b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_2c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_2d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_2e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_2f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_30(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_31(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_32(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_33(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_34(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_35(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_36(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_37(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_38(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_39(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_3a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_3b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_3c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_3d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_3e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2f_3f_3f(OPS_32); - - - ARCOMPACT_RETTYPE arcompact_handle04_38(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_39(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_3a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_3b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_3c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_3d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_3e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_3f(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle05_09(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_0c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_0d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_0e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_0f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_10(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_11(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_12(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_13(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_14(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_15(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_16(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_17(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_18(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_19(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_1a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_1b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_1c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_1d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_1e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_1f(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_20(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_21(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_22(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_23(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_24(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_25(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_26(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_27(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle05_2a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_2e(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle05_30(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_31(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_32(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_33(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_34(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_35(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_36(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_37(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_38(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_39(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_3a(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_3b(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_3c(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_3d(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_3e(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle05_3f(OPS_32); - - ARCOMPACT_RETTYPE arcompact_handle0f_00_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_00_07_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_01(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_08(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_09(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_0a(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle0f_17(OPS_16); - - ARCOMPACT_RETTYPE arcompact_handle18_05_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_05_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_08(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_09(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_0a(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_0b(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_0c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_0d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_0e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_0f(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_10(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_12(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_13(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_14(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_15(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_16(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_17(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_18(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_19(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_1a(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_1b(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_1c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_1d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_1e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_06_1f(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_00(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_02(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_03(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_04(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_05(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_06(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_07(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_08(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_09(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_0a(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_0b(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_0c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_0d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_0e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_0f(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_10(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_12(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_13(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_14(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_15(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_16(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_17(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_18(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_19(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_1a(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_1b(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_1c(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_1d(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_1e(OPS_16); - ARCOMPACT_RETTYPE arcompact_handle18_07_1f(OPS_16); - - ARCOMPACT_RETTYPE arcompact_01_01_00_helper(OPS_32, const char* optext); - ARCOMPACT_RETTYPE arcompact_01_01_01_helper(OPS_32, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle04_helper(OPS_32, const char* optext, int ignore_dst, int b_reserved); - ARCOMPACT_RETTYPE arcompact_handle04_2f_helper(OPS_32, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle04_3x_helper(OPS_32, int dsize, int extend); - ARCOMPACT_RETTYPE arcompact_handle05_2f_0x_helper(OPS_32, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle0c_helper(OPS_16, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle0d_helper(OPS_16, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle0e_0x_helper(OPS_16, const char* optext, int revop); - ARCOMPACT_RETTYPE arcompact_handle0f_00_0x_helper(OPS_16, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle0f_0x_helper(OPS_16, const char* optext, int nodst); - ARCOMPACT_RETTYPE arcompact_handle_ld_helper(OPS_16, const char* optext, int shift, int swap); - ARCOMPACT_RETTYPE arcompact_handle_l7_0x_helper(OPS_16, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle18_0x_helper(OPS_16, const char* optext, int st); - ARCOMPACT_RETTYPE arcompact_handle19_0x_helper(OPS_16, const char* optext, int shift, int format); - ARCOMPACT_RETTYPE arcompact_handle1e_0x_helper(OPS_16, const char* optext); - ARCOMPACT_RETTYPE arcompact_handle1e_03_0x_helper(OPS_16, const char* optext); - - - uint32_t handle_jump_to_addr(int delay, int link, uint32_t address, uint32_t next_addr); - uint32_t handle_jump_to_register(int delay, int link, uint32_t reg, uint32_t next_addr, int flag); - - ARCOMPACT_RETTYPE get_insruction(OPS_32); - - ARCOMPACT_HANDLER04_TYPE_PM(04_00) - ARCOMPACT_HANDLER04_TYPE_PM(04_02) - ARCOMPACT_HANDLER04_TYPE_PM(04_04) - ARCOMPACT_HANDLER04_TYPE_PM(04_05) - ARCOMPACT_HANDLER04_TYPE_PM(04_06) - ARCOMPACT_HANDLER04_TYPE_PM(04_07) - ARCOMPACT_HANDLER04_TYPE_PM(04_0a) - ARCOMPACT_HANDLER04_TYPE_PM(04_0e) - ARCOMPACT_HANDLER04_TYPE_PM(04_0f) - ARCOMPACT_HANDLER04_TYPE_PM(04_13) - ARCOMPACT_HANDLER04_TYPE_PM(04_14) - ARCOMPACT_HANDLER04_TYPE_PM(04_15) - ARCOMPACT_HANDLER04_TYPE_PM(04_16) - ARCOMPACT_HANDLER04_TYPE_PM(04_17) - ARCOMPACT_HANDLER04_TYPE_PM(04_18) - ARCOMPACT_HANDLER04_TYPE_PM(04_19) - ARCOMPACT_HANDLER04_TYPE_PM(04_20) - ARCOMPACT_HANDLER04_TYPE_PM(04_21) - ARCOMPACT_HANDLER04_TYPE_PM(04_2a) - ARCOMPACT_HANDLER04_TYPE_PM(04_2b) - - ARCOMPACT_HANDLER04_TYPE_PM(04_2f_02) - ARCOMPACT_HANDLER04_TYPE_PM(04_2f_03) - ARCOMPACT_HANDLER04_TYPE_PM(04_2f_07) - ARCOMPACT_HANDLER04_TYPE_PM(04_2f_08) - - ARCOMPACT_HANDLER04_TYPE_PM(05_00) - ARCOMPACT_HANDLER04_TYPE_PM(05_01) + uint32_t handleop_LD_S_a_b_c(uint16_t op); + uint32_t handleop_LDB_S_a_b_c(uint16_t op); + uint32_t handleop_LDW_S_a_b_c(uint16_t op); + uint32_t handleop_ADD_S_a_b_c(uint16_t op); + uint32_t handleop_ADD_S_c_b_u3(uint16_t op); + uint32_t handleop_SUB_S_c_b_u3(uint16_t op); + uint32_t handleop_ASL_S_c_b_u3(uint16_t op); + uint32_t handleop_ASR_S_c_b_u3(uint16_t op); + uint32_t handleop_ADD_S_b_b_h_or_limm(uint16_t op); + uint32_t handleop_MOV_S_b_h_or_limm(uint16_t op); + uint32_t handleop_CMP_S_b_h_or_limm(uint16_t op); + uint32_t handleop_MOV_S_h_b(uint16_t op); + uint32_t handleop_J_S_b(uint16_t op); + uint32_t handleop_J_S_D_b(uint16_t op); + uint32_t handleop_JL_S_b(uint16_t op); + uint32_t handleop_JL_S_D_b(uint16_t op); + uint32_t handleop_SUB_S_NE_b_b_b(uint16_t op); + uint32_t handleop_NOP_S(uint16_t op); + uint32_t handleop_UNIMP_S(uint16_t op); + uint32_t handleop_JEQ_S_blink(uint16_t op); + uint32_t handleop_JNE_S_blink(uint16_t op); + uint32_t handleop_J_S_blink(uint16_t op); + uint32_t handleop_J_S_D_blink(uint16_t op); + uint32_t handleop_SUB_S_b_b_c(uint16_t op); + uint32_t handleop_AND_S_b_b_c(uint16_t op); + uint32_t handleop_OR_S_b_b_c(uint16_t op); + uint32_t handleop_BIC_S_b_b_c(uint16_t op); + uint32_t handleop_XOR_S_b_b_c(uint16_t op); + uint32_t handleop_TST_S_b_c(uint16_t op); + uint32_t handleop_MUL64_S_0_b_c(uint16_t op); + uint32_t handleop_SEXB_S_b_c(uint16_t op); + uint32_t handleop_SEXW_S_b_c(uint16_t op); + uint32_t handleop_EXTB_S_b_c(uint16_t op); + uint32_t handleop_EXTW_S_b_c(uint16_t op); + uint32_t handleop_ABS_S_b_c(uint16_t op); + uint32_t handleop_NOT_S_b_c(uint16_t op); + uint32_t handleop_NEG_S_b_c(uint16_t op); + uint32_t handleop_ADD1_S_b_b_c(uint16_t op); + uint32_t handleop_ADD2_S_b_b_c(uint16_t op); + uint32_t handleop_ADD3_S_b_b_c(uint16_t op); + uint32_t handleop_ASL_S_b_b_c_multiple(uint16_t op); + uint32_t handleop_LSR_S_b_b_c_multiple(uint16_t op); + uint32_t handleop_ASR_S_b_b_c_multiple(uint16_t op); + uint32_t handleop_ASL_S_b_c_single(uint16_t op); + uint32_t handleop_ASR_S_b_c_single(uint16_t op); + uint32_t handleop_LSR_S_b_c_single(uint16_t op); + uint32_t handleop_TRAP_S_u6(uint16_t op); + uint32_t handleop_BRK_S(uint16_t op); + uint32_t handleop_LD_S_c_b_u7(uint16_t op); + uint32_t handleop_LDB_S_c_b_u5(uint16_t op); + uint32_t handleop_LDW_S_c_b_u6(uint16_t op); + uint32_t handleop_LDW_S_X_c_b_u6(uint16_t op); + uint32_t handleop_ST_S_c_b_u7(uint16_t op); + uint32_t handleop_STB_S_c_b_u5(uint16_t op); + uint32_t handleop_STW_S_c_b_u6(uint16_t op); + uint32_t handleop_ASL_S_b_b_u5(uint16_t op); + uint32_t handleop_LSR_S_b_b_u5(uint16_t op); + uint32_t handleop_ASR_S_b_b_u5(uint16_t op); + uint32_t handleop_SUB_S_b_b_u5(uint16_t op); + uint32_t handleop_BSET_S_b_b_u5(uint16_t op); + uint32_t handleop_BCLR_S_b_b_u5(uint16_t op); + uint32_t handleop_BMSK_S_b_b_u5(uint16_t op); + uint32_t handleop_BTST_S_b_u5(uint16_t op); + uint32_t handleop_LD_S_b_sp_u7(uint16_t op); + uint32_t handleop_LDB_S_b_sp_u7(uint16_t op); + uint32_t handleop_ST_S_b_sp_u7(uint16_t op); + uint32_t handleop_STB_S_b_sp_u7(uint16_t op); + uint32_t handleop_ADD_S_b_sp_u7(uint16_t op); + uint32_t handleop_ADD_S_sp_sp_u7(uint16_t op); + uint32_t handleop_SUB_S_sp_sp_u7(uint16_t op); + uint32_t handleop_POP_S_b(uint16_t op); + uint32_t handleop_POP_S_blink(uint16_t op); + uint32_t handleop_PUSH_S_b(uint16_t op); + uint32_t handleop_PUSH_S_blink(uint16_t op); + uint32_t handleop_LD_S_r0_gp_s11(uint16_t op); + uint32_t handleop_LDB_S_r0_gp_s9(uint16_t op); + uint32_t handleop_LDW_S_r0_gp_s10(uint16_t op); + uint32_t handleop_ADD_S_r0_gp_s11(uint16_t op); + uint32_t handleop_LD_S_b_pcl_u10(uint16_t op); + uint32_t handleop_MOV_S_b_u8(uint16_t op); + uint32_t handleop_ADD_S_b_b_u7(uint16_t op); + uint32_t handleop_CMP_S_b_u7(uint16_t op); + uint32_t branch_common(uint16_t op, bool cond, unsigned width); + uint32_t handleop_BREQ_S_b_0_s8(uint16_t op); + uint32_t handleop_BRNE_S_b_0_s8(uint16_t op); + uint32_t handleop_B_S_s10(uint16_t op); + uint32_t handleop_BEQ_S_s10(uint16_t op); + uint32_t handleop_BNE_S_s10(uint16_t op); + uint32_t handleop_BGT_S_s7(uint16_t op); + uint32_t handleop_BGE_S_s7(uint16_t op); + uint32_t handleop_BLT_S_s7(uint16_t op); + uint32_t handleop_BLE_S_s7(uint16_t op); + uint32_t handleop_BHI_S_s7(uint16_t op); + uint32_t handleop_BHS_S_s7(uint16_t op); + uint32_t handleop_BLO_S_s7(uint16_t op); + uint32_t handleop_BLS_S_s7(uint16_t op); + uint32_t handleop_BL_S_s13(uint16_t op); + /************************************************************************************************************************************ + * * + * illegal opcode handlers * + * * + ************************************************************************************************************************************/ + + uint32_t arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint16_t op); + uint32_t arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint16_t op); + uint32_t arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint16_t op); + + uint32_t arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint32_t op); + uint32_t arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint32_t op); + uint32_t arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op); + + uint32_t arcompact_handle_reserved(uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op); + + /************************************************************************************************************************************ + * * + * helpers * + * * + ************************************************************************************************************************************/ + + uint32_t get_instruction(uint32_t op); -private: const address_space_config m_program_config; const address_space_config m_io_config; - uint32_t m_pc; - address_space *m_program; - address_space *m_io; + address_space *m_io; int m_icount; @@ -832,68 +595,103 @@ private: void unimplemented_opcode(uint16_t op); - inline uint32_t READ32(uint32_t address) { return m_program->read_dword(address << 2); } - inline void WRITE32(uint32_t address, uint32_t data) { m_program->write_dword(address << 2, data); } - inline uint16_t READ16(uint32_t address) { return m_program->read_word(address << 1); } - inline void WRITE16(uint32_t address, uint16_t data){ m_program->write_word(address << 1, data); } - inline uint8_t READ8(uint32_t address) { return m_program->read_byte(address << 0); } - inline void WRITE8(uint32_t address, uint8_t data){ m_program->write_byte(address << 0, data); } + void set_pc(uint32_t pc) + { + m_pc = pc; // can be 16-bit aligned + m_regs[REG_PCL] = m_pc & 0xfffffffc; // always 32-bit aligned + } + + inline uint32_t READ32(uint32_t address) + { + if (address & 0x3) + fatalerror("%08x: attempted unaligned READ32 on address %08x", m_pc, address); + + return m_program->read_dword(address); + } + + inline void WRITE32(uint32_t address, uint32_t data) + { + if (address & 0x3) + fatalerror("%08x: attempted unaligned WRITE32 on address %08x", m_pc, address); + + m_program->write_dword(address, data); + } + inline uint16_t READ16(uint32_t address) + { + if (address & 0x1) + fatalerror("%08x: attempted unaligned READ16 on address %08x", m_pc, address); + + return m_program->read_word(address); + } + inline void WRITE16(uint32_t address, uint16_t data) + { + if (address & 0x1) + fatalerror("%08x: attempted unaligned WRITE16 on address %08x", m_pc, address); + + m_program->write_word(address, data); + } + inline uint8_t READ8(uint32_t address) + { + return m_program->read_byte(address); + } + inline void WRITE8(uint32_t address, uint8_t data) + { + m_program->write_byte(address, data); + } inline uint64_t READAUX(uint64_t address) { return m_io->read_dword(address); } inline void WRITEAUX(uint64_t address, uint32_t data) { m_io->write_dword(address, data); } - - int check_condition(uint8_t condition); - + // arcompact_helper.ipp + inline bool check_condition(uint8_t condition); + inline void do_flags_overflow(uint32_t result, uint32_t b, uint32_t c); + inline void do_flags_add(uint32_t result, uint32_t b, uint32_t c); + inline void do_flags_sub(uint32_t result, uint32_t b, uint32_t c); + inline void do_flags_nz(uint32_t result); + using ophandler32 = uint32_t (*)(arcompact_device &obj, uint32_t src1, uint32_t src2, bool set_flags); + using ophandler32_ff = void (*)(arcompact_device &obj, uint32_t src1, uint32_t src2); + using ophandler32_mul = void (*)(arcompact_device &obj, uint32_t src1, uint32_t src2); + using ophandler32_sop = uint32_t (*)(arcompact_device &obj, uint32_t src1, bool set_flags); + inline uint32_t handleop32_general(uint32_t op, ophandler32 ophandler); + inline uint32_t handleop32_general_MULx64(uint32_t op, ophandler32_mul ophandler); + inline uint32_t handleop32_general_nowriteback_forced_flag(uint32_t op, ophandler32_ff ophandler); + inline uint32_t handleop32_general_SOP_group(uint32_t op, ophandler32_sop ophandler); + inline void arcompact_handle_ld_helper(uint32_t op, uint8_t areg, uint8_t breg, uint32_t s, uint8_t X, uint8_t Z, uint8_t a); + + // config + uint32_t m_default_vector_base; + + // internal state + uint32_t m_pc; uint32_t m_regs[0x40]; - int m_delayactive; - int m_delaylinks; + bool m_delayactive; + bool m_delaylinks; uint32_t m_delayjump; + bool m_allow_loop_check; + bool m_irq_pending; // f e d c| b a 9 8| 7 6 5 4| 3 2 1 0 // - - - L| Z N C V| U DE AE A2|A1 E2 E1 H uint32_t m_status32; + uint32_t m_status32_l1; + uint32_t m_status32_l2; + +// 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 +// LD | SH | BH | UB | xx | xx | xx | xx | ZZ | RA | xx | xx | xx | xx | xx | xx | xx | xx | xx | xx | IS | xx | xx | xx | xx | xx | xx | xx | xx | xx | FH | SS + uint32_t m_debug; + + uint32_t m_timer[2][3]; uint32_t m_LP_START; uint32_t m_LP_END; uint32_t m_INTVECTORBASE; - + uint32_t m_AUX_IRQ_LV12; + uint32_t m_AUX_IRQ_LEV; }; -#define V_OVERFLOW_FLAG (0x00000100) -#define C_CARRY_FLAG (0x00000200) -#define N_NEGATIVE_FLAG (0x00000400) -#define Z_ZERO_FLAG (0x00000800) - -// V = overflow (set if signed operation would overflow) -#define STATUS32_SET_V (m_status32 |= V_OVERFLOW_FLAG) -#define STATUS32_CLEAR_V (m_status32 &= ~V_OVERFLOW_FLAG) -#define STATUS32_CHECK_V (m_status32 & V_OVERFLOW_FLAG) - -// C = carry (unsigned op, carry set is same condition as LO Lower Than, carry clear is same condition as HS Higher Same) -#define STATUS32_SET_C (m_status32 |= C_CARRY_FLAG) -#define STATUS32_CLEAR_C (m_status32 &= ~C_CARRY_FLAG) -#define STATUS32_CHECK_C (m_status32 & C_CARRY_FLAG) - -// N = negative (set if most significant bit of result is set) -#define STATUS32_SET_N (m_status32 |= N_NEGATIVE_FLAG) -#define STATUS32_CLEAR_N (m_status32 &= ~N_NEGATIVE_FLAG) -#define STATUS32_CHECK_N (m_status32 & N_NEGATIVE_FLAG) - -// Z = zero (set if result is zero, ie both values the same for CMP) -#define STATUS32_SET_Z (m_status32 |= Z_ZERO_FLAG) -#define STATUS32_CLEAR_Z (m_status32 &= ~Z_ZERO_FLAG) -#define STATUS32_CHECK_Z (m_status32 & Z_ZERO_FLAG) - -// Condition 0x0c (LE) -#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V) -#define CONDITION_EQ (STATUS32_CHECK_Z) -#define CONDITION_CS (STATUS32_CHECK_C) -#define CONDITION_LT ((STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) -#define CONDITION_MI (STATUS32_CHECK_N) - - DECLARE_DEVICE_TYPE(ARCA5, arcompact_device) +#include "arcompact_helper.ipp" + #endif // MAME_CPU_ARCOMPACT_ARCOMPACT_H diff --git a/src/devices/cpu/arcompact/arcompact_execute.cpp b/src/devices/cpu/arcompact/arcompact_execute.cpp index 31fa7feba90..26d73da312c 100644 --- a/src/devices/cpu/arcompact/arcompact_execute.cpp +++ b/src/devices/cpu/arcompact/arcompact_execute.cpp @@ -5,8130 +5,168 @@ #include "arcompact.h" #include "arcompactdasm.h" -#define REG_BLINK (0x1f) // r31 -#define REG_SP (0x1c) // r28 -#define REG_ILINK1 (0x1d) // r29 -#define REG_ILINK2 (0x1e) // r30 -#define REG_LP_COUNT (0x3c) // r60 +/* -#define ARCOMPACT_LOGGING 1 +NOTES: -#define arcompact_fatal if (ARCOMPACT_LOGGING) fatalerror -#define arcompact_log if (ARCOMPACT_LOGGING) fatalerror +LIMM use +-------- +If "destination register = LIMM" then there is no result stored, only flag updates, however there's no way to read LIMM anyway +as specifying LIMM as a source register just causes the CPU to read the long immediate data instead. For emulation purposes we +therefore just store the result as normal, to the reigster that can't be read. +Likewise, when LIMM is used as a source register, we load the LIMM register with the long immediate when the opcode is decoded +so don't require special logic further in the opcode handler. -void arcompact_device::execute_run() -{ - //uint32_t lres; - //lres = 0; - - while (m_icount > 0) - { - debugger_instruction_hook(m_pc); - -// printf("new pc %04x\n", m_pc); - - if (m_delayactive) - { - uint16_t op = READ16((m_pc + 0) >> 1); - m_pc = get_insruction(op); - if (m_delaylinks) m_regs[REG_BLINK] = m_pc; - - m_pc = m_delayjump; - m_delayactive = 0; m_delaylinks = 0; - } - else - { - uint16_t op = READ16((m_pc + 0) >> 1); - m_pc = get_insruction(op); - } - - // hardware loops - if (m_pc == m_LP_END) - { - if (m_regs[REG_LP_COUNT] != 1) - { - m_pc = m_LP_START; - } - m_regs[REG_LP_COUNT]--; - - } - - m_icount--; - } - -} - - -#define GET_01_01_01_BRANCH_ADDR \ - int32_t address = (op & 0x00fe0000) >> 17; \ - address |= ((op & 0x00008000) >> 15) << 7; \ - if (address & 0x80) address = -0x80 + (address & 0x7f); - -#define GROUP_0e_GET_h \ - h = ((op & 0x0007) << 3); \ - h |= ((op & 0x00e0) >> 5); -#define COMMON32_GET_breg \ - int b_temp = (op & 0x07000000) >> 24; \ - int B_temp = (op & 0x00007000) >> 12; \ - int breg = b_temp | (B_temp << 3); -#define COMMON32_GET_creg \ - int creg = (op & 0x00000fc0) >> 6; -#define COMMON32_GET_u6 \ - int u = (op & 0x00000fc0) >> 6; -#define COMMON32_GET_areg \ - int areg = (op & 0x0000003f) >> 0; -#define COMMON32_GET_areg_reserved \ - int ares = (op & 0x0000003f) >> 0; -#define COMMON32_GET_F \ - int F = (op & 0x00008000) >> 15; -#define COMMON32_GET_p \ - int p = (op & 0x00c00000) >> 22; - -#define COMMON32_GET_s12 \ - int S_temp = (op & 0x0000003f) >> 0; \ - int s_temp = (op & 0x00000fc0) >> 6; \ - int32_t S = s_temp | (S_temp<<6); \ - if (S & 0x800) S = -0x800 + (S&0x7ff); /* sign extend */ -#define COMMON32_GET_CONDITION \ - uint8_t condition = op & 0x0000001f; - - -#define COMMON16_GET_breg \ - breg = ((op & 0x0700) >>8); -#define COMMON16_GET_creg \ - creg = ((op & 0x00e0) >>5); -#define COMMON16_GET_areg \ - areg = ((op & 0x0007) >>0); -#define COMMON16_GET_u3 \ - u = ((op & 0x0007) >>0); -#define COMMON16_GET_u5 \ - u = ((op & 0x001f) >>0); -#define COMMON16_GET_u8 \ - u = ((op & 0x00ff) >>0); -#define COMMON16_GET_u7 \ - u = ((op & 0x007f) >>0); -#define COMMON16_GET_s9 \ - s = ((op & 0x01ff) >>0); -// registers used in 16-bit opcodes hae a limited range -// and can only address registers r0-r3 and r12-r15 - -#define REG_16BIT_RANGE(_reg_) \ - if (_reg_>3) _reg_+= 8; - -#define GET_LIMM_32 \ - limm = (READ16((m_pc + 4) >> 1) << 16); \ - limm |= READ16((m_pc + 6) >> 1); -#define GET_LIMM_16 \ - limm = (READ16((m_pc + 2) >> 1) << 16); \ - limm |= READ16((m_pc + 4) >> 1); - -#define PC_ALIGNED32 \ - (m_pc&0xfffffffc) - -int arcompact_device::check_condition(uint8_t condition) -{ - switch (condition & 0x1f) - { - case 0x00: return 1; // AL - case 0x01: return CONDITION_EQ; - case 0x02: return !CONDITION_EQ; // NE - case 0x03: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x04: return CONDITION_MI; // MI (N) - case 0x05: return CONDITION_CS; // CS (Carry Set / Lower than) - case 0x06: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x07: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x08: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x09: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x0a: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x0b: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x0c: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x0d: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x0e: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x0f: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x10: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x11: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x12: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x13: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x14: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x15: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x16: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x17: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x18: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x19: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x1a: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x1b: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x1c: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x1d: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x1e: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - case 0x1f: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1; - } - - return -1; - -} - - -ARCOMPACT_RETTYPE arcompact_device::get_insruction(OPS_32) -{ - uint8_t instruction = ARCOMPACT_OPERATION; - - if (instruction < 0x0c) - { - op <<= 16; - op |= READ16((m_pc + 2) >> 1); - - switch (instruction) // 32-bit instructions (with optional extra dword for immediate data) - { - case 0x00: return arcompact_handle00(PARAMS); // Bcc - case 0x01: return arcompact_handle01(PARAMS); // BLcc/BRcc - case 0x02: return arcompact_handle02(PARAMS); // LD r+o - case 0x03: return arcompact_handle03(PARAMS); // ST r+o - case 0x04: return arcompact_handle04(PARAMS); // op a,b,c (basecase) - case 0x05: return arcompact_handle05(PARAMS); // op a,b,c (05 ARC ext) - case 0x06: return arcompact_handle06(PARAMS); // op a,b,c (06 ARC ext) - case 0x07: return arcompact_handle07(PARAMS); // op a,b,c (07 User ext) - case 0x08: return arcompact_handle08(PARAMS); // op a,b,c (08 User ext) - case 0x09: return arcompact_handle09(PARAMS); // op a,b,c (09 Market ext) - case 0x0a: return arcompact_handle0a(PARAMS); // op a,b,c (0a Market ext) - case 0x0b: return arcompact_handle0b(PARAMS); // op a,b,c (0b Market ext) - } - } - else - { - switch (instruction) // 16-bit instructions - { - case 0x0c: return arcompact_handle0c(PARAMS); // Load/Add reg-reg - case 0x0d: return arcompact_handle0d(PARAMS); // Add/Sub/Shft imm - case 0x0e: return arcompact_handle0e(PARAMS); // Mov/Cmp/Add - case 0x0f: return arcompact_handle0f(PARAMS); // op_S b,b,c (single 16-bit ops) - case 0x10: return arcompact_handle10(PARAMS); // LD_S - case 0x11: return arcompact_handle11(PARAMS); // LDB_S - case 0x12: return arcompact_handle12(PARAMS); // LDW_S - case 0x13: return arcompact_handle13(PARAMS); // LSW_S.X - case 0x14: return arcompact_handle14(PARAMS); // ST_S - case 0x15: return arcompact_handle15(PARAMS); // STB_S - case 0x16: return arcompact_handle16(PARAMS); // STW_S - case 0x17: return arcompact_handle17(PARAMS); // Shift/Sub/Bit - case 0x18: return arcompact_handle18(PARAMS); // Stack Instr - case 0x19: return arcompact_handle19(PARAMS); // GP Instr - case 0x1a: return arcompact_handle1a(PARAMS); // PCL Instr - case 0x1b: return arcompact_handle1b(PARAMS); // MOV_S - case 0x1c: return arcompact_handle1c(PARAMS); // ADD_S/CMP_S - case 0x1d: return arcompact_handle1d(PARAMS); // BRcc_S - case 0x1e: return arcompact_handle1e(PARAMS); // Bcc_S - case 0x1f: return arcompact_handle1f(PARAMS); // BL_S - } - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00(OPS_32) -{ - uint8_t subinstr = (op & 0x00010000) >> 16; - - switch (subinstr) - { - case 0x00: return arcompact_handle00_00(PARAMS); // Branch Conditionally - case 0x01: return arcompact_handle00_01(PARAMS); // Branch Unconditionally Far - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01(OPS_32) -{ - uint8_t subinstr = (op & 0x00010000) >> 16; - - switch (subinstr) - { - case 0x00: return arcompact_handle01_00(PARAMS); // Branh & Link - case 0x01: return arcompact_handle01_01(PARAMS); // Branch on Compare - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_00(OPS_32) -{ - uint8_t subinstr2 = (op & 0x00020000) >> 17; - - switch (subinstr2) - { - case 0x00: return arcompact_handle01_00_00dasm(PARAMS); // Branch and Link Conditionally - case 0x01: return arcompact_handle01_00_01dasm(PARAMS); // Branch and Link Unconditional Far - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01(OPS_32) -{ - uint8_t subinstr2 = (op & 0x00000010) >> 4; - - switch (subinstr2) - { - case 0x00: return arcompact_handle01_01_00(PARAMS); // Branch on Compare Register-Register - case 0x01: return arcompact_handle01_01_01(PARAMS); // Branch on Compare/Bit Test Register-Immediate - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00(OPS_32) -{ - uint8_t subinstr3 = (op & 0x0000000f) >> 0; - - switch (subinstr3) - { - case 0x00: return arcompact_handle01_01_00_00(PARAMS); // BREQ (reg-reg) - case 0x01: return arcompact_handle01_01_00_01(PARAMS); // BRNE (reg-reg) - case 0x02: return arcompact_handle01_01_00_02(PARAMS); // BRLT (reg-reg) - case 0x03: return arcompact_handle01_01_00_03(PARAMS); // BRGE (reg-reg) - case 0x04: return arcompact_handle01_01_00_04(PARAMS); // BRLO (reg-reg) - case 0x05: return arcompact_handle01_01_00_05(PARAMS); // BRHS (reg-reg) - case 0x06: return arcompact_handle01_01_00_06(PARAMS); // reserved - case 0x07: return arcompact_handle01_01_00_07(PARAMS); // reserved - case 0x08: return arcompact_handle01_01_00_08(PARAMS); // reserved - case 0x09: return arcompact_handle01_01_00_09(PARAMS); // reserved - case 0x0a: return arcompact_handle01_01_00_0a(PARAMS); // reserved - case 0x0b: return arcompact_handle01_01_00_0b(PARAMS); // reserved - case 0x0c: return arcompact_handle01_01_00_0c(PARAMS); // reserved - case 0x0d: return arcompact_handle01_01_00_0d(PARAMS); // reserved - case 0x0e: return arcompact_handle01_01_00_0e(PARAMS); // BBIT0 (reg-reg) - case 0x0f: return arcompact_handle01_01_00_0f(PARAMS); // BBIT1 (reg-reg) - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01(OPS_32) // Branch on Compare/Bit Test Register-Immediate -{ - uint8_t subinstr3 = (op & 0x0000000f) >> 0; - - switch (subinstr3) - { - case 0x00: return arcompact_handle01_01_01_00(PARAMS); // BREQ (reg-imm) - case 0x01: return arcompact_handle01_01_01_01(PARAMS); // BRNE (reg-imm) - case 0x02: return arcompact_handle01_01_01_02(PARAMS); // BRLT (reg-imm) - case 0x03: return arcompact_handle01_01_01_03(PARAMS); // BRGE (reg-imm) - case 0x04: return arcompact_handle01_01_01_04(PARAMS); // BRLO (reg-imm) - case 0x05: return arcompact_handle01_01_01_05(PARAMS); // BRHS (reg-imm) - case 0x06: return arcompact_handle01_01_01_06(PARAMS); // reserved - case 0x07: return arcompact_handle01_01_01_07(PARAMS); // reserved - case 0x08: return arcompact_handle01_01_01_08(PARAMS); // reserved - case 0x09: return arcompact_handle01_01_01_09(PARAMS); // reserved - case 0x0a: return arcompact_handle01_01_01_0a(PARAMS); // reserved - case 0x0b: return arcompact_handle01_01_01_0b(PARAMS); // reserved - case 0x0c: return arcompact_handle01_01_01_0c(PARAMS); // reserved - case 0x0d: return arcompact_handle01_01_01_0d(PARAMS); // reserved - case 0x0e: return arcompact_handle01_01_01_0e(PARAMS); // BBIT0 (reg-imm) - case 0x0f: return arcompact_handle01_01_01_0f(PARAMS); // BBIT1 (reg-imm) - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04(OPS_32) -{ - uint8_t subinstr = (op & 0x003f0000) >> 16; - - switch (subinstr) - { - case 0x00: return arcompact_handle04_00(PARAMS); // ADD - case 0x01: return arcompact_handle04_01(PARAMS); // ADC - case 0x02: return arcompact_handle04_02(PARAMS); // SUB - case 0x03: return arcompact_handle04_03(PARAMS); // SBC - case 0x04: return arcompact_handle04_04(PARAMS); // AND - case 0x05: return arcompact_handle04_05(PARAMS); // OR - case 0x06: return arcompact_handle04_06(PARAMS); // BIC - case 0x07: return arcompact_handle04_07(PARAMS); // XOR - case 0x08: return arcompact_handle04_08(PARAMS); // MAX - case 0x09: return arcompact_handle04_09(PARAMS); // MIN - case 0x0a: return arcompact_handle04_0a(PARAMS); // MOV - case 0x0b: return arcompact_handle04_0b(PARAMS); // TST - case 0x0c: return arcompact_handle04_0c(PARAMS); // CMP - case 0x0d: return arcompact_handle04_0d(PARAMS); // RCMP - case 0x0e: return arcompact_handle04_0e(PARAMS); // RSUB - case 0x0f: return arcompact_handle04_0f(PARAMS); // BSET - case 0x10: return arcompact_handle04_10(PARAMS); // BCLR - case 0x11: return arcompact_handle04_11(PARAMS); // BTST - case 0x12: return arcompact_handle04_12(PARAMS); // BXOR - case 0x13: return arcompact_handle04_13(PARAMS); // BMSK - case 0x14: return arcompact_handle04_14(PARAMS); // ADD1 - case 0x15: return arcompact_handle04_15(PARAMS); // ADD2 - case 0x16: return arcompact_handle04_16(PARAMS); // ADD3 - case 0x17: return arcompact_handle04_17(PARAMS); // SUB1 - case 0x18: return arcompact_handle04_18(PARAMS); // SUB2 - case 0x19: return arcompact_handle04_19(PARAMS); // SUB3 - case 0x1a: return arcompact_handle04_1a(PARAMS); // MPY * - case 0x1b: return arcompact_handle04_1b(PARAMS); // MPYH * - case 0x1c: return arcompact_handle04_1c(PARAMS); // MPYHU * - case 0x1d: return arcompact_handle04_1d(PARAMS); // MPYU * - case 0x1e: return arcompact_handle04_1e(PARAMS); // illegal - case 0x1f: return arcompact_handle04_1f(PARAMS); // illegal - case 0x20: return arcompact_handle04_20(PARAMS); // Jcc - case 0x21: return arcompact_handle04_21(PARAMS); // Jcc.D - case 0x22: return arcompact_handle04_22(PARAMS); // JLcc - case 0x23: return arcompact_handle04_23(PARAMS); // JLcc.D - case 0x24: return arcompact_handle04_24(PARAMS); // illegal - case 0x25: return arcompact_handle04_25(PARAMS); // illegal - case 0x26: return arcompact_handle04_26(PARAMS); // illegal - case 0x27: return arcompact_handle04_27(PARAMS); // illegal - case 0x28: return arcompact_handle04_28(PARAMS); // LPcc - case 0x29: return arcompact_handle04_29(PARAMS); // FLAG - case 0x2a: return arcompact_handle04_2a(PARAMS); // LR - case 0x2b: return arcompact_handle04_2b(PARAMS); // SR - case 0x2c: return arcompact_handle04_2c(PARAMS); // illegal - case 0x2d: return arcompact_handle04_2d(PARAMS); // illegal - case 0x2e: return arcompact_handle04_2e(PARAMS); // illegal - case 0x2f: return arcompact_handle04_2f(PARAMS); // Sub Opcode - case 0x30: return arcompact_handle04_30(PARAMS); // LD r-r - case 0x31: return arcompact_handle04_31(PARAMS); // LD r-r - case 0x32: return arcompact_handle04_32(PARAMS); // LD r-r - case 0x33: return arcompact_handle04_33(PARAMS); // LD r-r - case 0x34: return arcompact_handle04_34(PARAMS); // LD r-r - case 0x35: return arcompact_handle04_35(PARAMS); // LD r-r - case 0x36: return arcompact_handle04_36(PARAMS); // LD r-r - case 0x37: return arcompact_handle04_37(PARAMS); // LD r-r - case 0x38: return arcompact_handle04_38(PARAMS); // illegal - case 0x39: return arcompact_handle04_39(PARAMS); // illegal - case 0x3a: return arcompact_handle04_3a(PARAMS); // illegal - case 0x3b: return arcompact_handle04_3b(PARAMS); // illegal - case 0x3c: return arcompact_handle04_3c(PARAMS); // illegal - case 0x3d: return arcompact_handle04_3d(PARAMS); // illegal - case 0x3e: return arcompact_handle04_3e(PARAMS); // illegal - case 0x3f: return arcompact_handle04_3f(PARAMS); // illegal - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f(OPS_32) -{ - uint8_t subinstr2 = (op & 0x0000003f) >> 0; - - switch (subinstr2) - { - case 0x00: return arcompact_handle04_2f_00(PARAMS); // ASL - case 0x01: return arcompact_handle04_2f_01(PARAMS); // ASR - case 0x02: return arcompact_handle04_2f_02(PARAMS); // LSR - case 0x03: return arcompact_handle04_2f_03(PARAMS); // ROR - case 0x04: return arcompact_handle04_2f_04(PARAMS); // RCC - case 0x05: return arcompact_handle04_2f_05(PARAMS); // SEXB - case 0x06: return arcompact_handle04_2f_06(PARAMS); // SEXW - case 0x07: return arcompact_handle04_2f_07(PARAMS); // EXTB - case 0x08: return arcompact_handle04_2f_08(PARAMS); // EXTW - case 0x09: return arcompact_handle04_2f_09(PARAMS); // ABS - case 0x0a: return arcompact_handle04_2f_0a(PARAMS); // NOT - case 0x0b: return arcompact_handle04_2f_0b(PARAMS); // RLC - case 0x0c: return arcompact_handle04_2f_0c(PARAMS); // EX - case 0x0d: return arcompact_handle04_2f_0d(PARAMS); // illegal - case 0x0e: return arcompact_handle04_2f_0e(PARAMS); // illegal - case 0x0f: return arcompact_handle04_2f_0f(PARAMS); // illegal - case 0x10: return arcompact_handle04_2f_10(PARAMS); // illegal - case 0x11: return arcompact_handle04_2f_11(PARAMS); // illegal - case 0x12: return arcompact_handle04_2f_12(PARAMS); // illegal - case 0x13: return arcompact_handle04_2f_13(PARAMS); // illegal - case 0x14: return arcompact_handle04_2f_14(PARAMS); // illegal - case 0x15: return arcompact_handle04_2f_15(PARAMS); // illegal - case 0x16: return arcompact_handle04_2f_16(PARAMS); // illegal - case 0x17: return arcompact_handle04_2f_17(PARAMS); // illegal - case 0x18: return arcompact_handle04_2f_18(PARAMS); // illegal - case 0x19: return arcompact_handle04_2f_19(PARAMS); // illegal - case 0x1a: return arcompact_handle04_2f_1a(PARAMS); // illegal - case 0x1b: return arcompact_handle04_2f_1b(PARAMS); // illegal - case 0x1c: return arcompact_handle04_2f_1c(PARAMS); // illegal - case 0x1d: return arcompact_handle04_2f_1d(PARAMS); // illegal - case 0x1e: return arcompact_handle04_2f_1e(PARAMS); // illegal - case 0x1f: return arcompact_handle04_2f_1f(PARAMS); // illegal - case 0x20: return arcompact_handle04_2f_20(PARAMS); // illegal - case 0x21: return arcompact_handle04_2f_21(PARAMS); // illegal - case 0x22: return arcompact_handle04_2f_22(PARAMS); // illegal - case 0x23: return arcompact_handle04_2f_23(PARAMS); // illegal - case 0x24: return arcompact_handle04_2f_24(PARAMS); // illegal - case 0x25: return arcompact_handle04_2f_25(PARAMS); // illegal - case 0x26: return arcompact_handle04_2f_26(PARAMS); // illegal - case 0x27: return arcompact_handle04_2f_27(PARAMS); // illegal - case 0x28: return arcompact_handle04_2f_28(PARAMS); // illegal - case 0x29: return arcompact_handle04_2f_29(PARAMS); // illegal - case 0x2a: return arcompact_handle04_2f_2a(PARAMS); // illegal - case 0x2b: return arcompact_handle04_2f_2b(PARAMS); // illegal - case 0x2c: return arcompact_handle04_2f_2c(PARAMS); // illegal - case 0x2d: return arcompact_handle04_2f_2d(PARAMS); // illegal - case 0x2e: return arcompact_handle04_2f_2e(PARAMS); // illegal - case 0x2f: return arcompact_handle04_2f_2f(PARAMS); // illegal - case 0x30: return arcompact_handle04_2f_30(PARAMS); // illegal - case 0x31: return arcompact_handle04_2f_31(PARAMS); // illegal - case 0x32: return arcompact_handle04_2f_32(PARAMS); // illegal - case 0x33: return arcompact_handle04_2f_33(PARAMS); // illegal - case 0x34: return arcompact_handle04_2f_34(PARAMS); // illegal - case 0x35: return arcompact_handle04_2f_35(PARAMS); // illegal - case 0x36: return arcompact_handle04_2f_36(PARAMS); // illegal - case 0x37: return arcompact_handle04_2f_37(PARAMS); // illegal - case 0x38: return arcompact_handle04_2f_38(PARAMS); // illegal - case 0x39: return arcompact_handle04_2f_39(PARAMS); // illegal - case 0x3a: return arcompact_handle04_2f_3a(PARAMS); // illegal - case 0x3b: return arcompact_handle04_2f_3b(PARAMS); // illegal - case 0x3c: return arcompact_handle04_2f_3c(PARAMS); // illegal - case 0x3d: return arcompact_handle04_2f_3d(PARAMS); // illegal - case 0x3e: return arcompact_handle04_2f_3e(PARAMS); // illegal - case 0x3f: return arcompact_handle04_2f_3f(PARAMS); // ZOPs (Zero Operand Opcodes) - } - - return 0; -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f(OPS_32) -{ - uint8_t subinstr2 = (op & 0x0000003f) >> 0; - - switch (subinstr2) - { - case 0x00: return arcompact_handle05_2f_00(PARAMS); // SWAP - case 0x01: return arcompact_handle05_2f_01(PARAMS); // NORM - case 0x02: return arcompact_handle05_2f_02(PARAMS); // SAT16 - case 0x03: return arcompact_handle05_2f_03(PARAMS); // RND16 - case 0x04: return arcompact_handle05_2f_04(PARAMS); // ABSSW - case 0x05: return arcompact_handle05_2f_05(PARAMS); // ABSS - case 0x06: return arcompact_handle05_2f_06(PARAMS); // NEGSW - case 0x07: return arcompact_handle05_2f_07(PARAMS); // NEGS - case 0x08: return arcompact_handle05_2f_08(PARAMS); // NORMW - case 0x09: return arcompact_handle05_2f_09(PARAMS); // illegal - case 0x0a: return arcompact_handle05_2f_0a(PARAMS); // illegal - case 0x0b: return arcompact_handle05_2f_0b(PARAMS); // illegal - case 0x0c: return arcompact_handle05_2f_0c(PARAMS); // illegal - case 0x0d: return arcompact_handle05_2f_0d(PARAMS); // illegal - case 0x0e: return arcompact_handle05_2f_0e(PARAMS); // illegal - case 0x0f: return arcompact_handle05_2f_0f(PARAMS); // illegal - case 0x10: return arcompact_handle05_2f_10(PARAMS); // illegal - case 0x11: return arcompact_handle05_2f_11(PARAMS); // illegal - case 0x12: return arcompact_handle05_2f_12(PARAMS); // illegal - case 0x13: return arcompact_handle05_2f_13(PARAMS); // illegal - case 0x14: return arcompact_handle05_2f_14(PARAMS); // illegal - case 0x15: return arcompact_handle05_2f_15(PARAMS); // illegal - case 0x16: return arcompact_handle05_2f_16(PARAMS); // illegal - case 0x17: return arcompact_handle05_2f_17(PARAMS); // illegal - case 0x18: return arcompact_handle05_2f_18(PARAMS); // illegal - case 0x19: return arcompact_handle05_2f_19(PARAMS); // illegal - case 0x1a: return arcompact_handle05_2f_1a(PARAMS); // illegal - case 0x1b: return arcompact_handle05_2f_1b(PARAMS); // illegal - case 0x1c: return arcompact_handle05_2f_1c(PARAMS); // illegal - case 0x1d: return arcompact_handle05_2f_1d(PARAMS); // illegal - case 0x1e: return arcompact_handle05_2f_1e(PARAMS); // illegal - case 0x1f: return arcompact_handle05_2f_1f(PARAMS); // illegal - case 0x20: return arcompact_handle05_2f_20(PARAMS); // illegal - case 0x21: return arcompact_handle05_2f_21(PARAMS); // illegal - case 0x22: return arcompact_handle05_2f_22(PARAMS); // illegal - case 0x23: return arcompact_handle05_2f_23(PARAMS); // illegal - case 0x24: return arcompact_handle05_2f_24(PARAMS); // illegal - case 0x25: return arcompact_handle05_2f_25(PARAMS); // illegal - case 0x26: return arcompact_handle05_2f_26(PARAMS); // illegal - case 0x27: return arcompact_handle05_2f_27(PARAMS); // illegal - case 0x28: return arcompact_handle05_2f_28(PARAMS); // illegal - case 0x29: return arcompact_handle05_2f_29(PARAMS); // illegal - case 0x2a: return arcompact_handle05_2f_2a(PARAMS); // illegal - case 0x2b: return arcompact_handle05_2f_2b(PARAMS); // illegal - case 0x2c: return arcompact_handle05_2f_2c(PARAMS); // illegal - case 0x2d: return arcompact_handle05_2f_2d(PARAMS); // illegal - case 0x2e: return arcompact_handle05_2f_2e(PARAMS); // illegal - case 0x2f: return arcompact_handle05_2f_2f(PARAMS); // illegal - case 0x30: return arcompact_handle05_2f_30(PARAMS); // illegal - case 0x31: return arcompact_handle05_2f_31(PARAMS); // illegal - case 0x32: return arcompact_handle05_2f_32(PARAMS); // illegal - case 0x33: return arcompact_handle05_2f_33(PARAMS); // illegal - case 0x34: return arcompact_handle05_2f_34(PARAMS); // illegal - case 0x35: return arcompact_handle05_2f_35(PARAMS); // illegal - case 0x36: return arcompact_handle05_2f_36(PARAMS); // illegal - case 0x37: return arcompact_handle05_2f_37(PARAMS); // illegal - case 0x38: return arcompact_handle05_2f_38(PARAMS); // illegal - case 0x39: return arcompact_handle05_2f_39(PARAMS); // illegal - case 0x3a: return arcompact_handle05_2f_3a(PARAMS); // illegal - case 0x3b: return arcompact_handle05_2f_3b(PARAMS); // illegal - case 0x3c: return arcompact_handle05_2f_3c(PARAMS); // illegal - case 0x3d: return arcompact_handle05_2f_3d(PARAMS); // illegal - case 0x3e: return arcompact_handle05_2f_3e(PARAMS); // illegal - case 0x3f: return arcompact_handle05_2f_3f(PARAMS); // ZOPs (Zero Operand Opcodes) - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f(OPS_32) -{ - uint8_t subinstr3 = (op & 0x07000000) >> 24; - subinstr3 |= ((op & 0x00007000) >> 12) << 3; - - switch (subinstr3) - { - case 0x00: return arcompact_handle04_2f_3f_00(PARAMS); // illegal - case 0x01: return arcompact_handle04_2f_3f_01(PARAMS); // SLEEP - case 0x02: return arcompact_handle04_2f_3f_02(PARAMS); // SWI / TRAP9 - case 0x03: return arcompact_handle04_2f_3f_03(PARAMS); // SYNC - case 0x04: return arcompact_handle04_2f_3f_04(PARAMS); // RTIE - case 0x05: return arcompact_handle04_2f_3f_05(PARAMS); // BRK - case 0x06: return arcompact_handle04_2f_3f_06(PARAMS); // illegal - case 0x07: return arcompact_handle04_2f_3f_07(PARAMS); // illegal - case 0x08: return arcompact_handle04_2f_3f_08(PARAMS); // illegal - case 0x09: return arcompact_handle04_2f_3f_09(PARAMS); // illegal - case 0x0a: return arcompact_handle04_2f_3f_0a(PARAMS); // illegal - case 0x0b: return arcompact_handle04_2f_3f_0b(PARAMS); // illegal - case 0x0c: return arcompact_handle04_2f_3f_0c(PARAMS); // illegal - case 0x0d: return arcompact_handle04_2f_3f_0d(PARAMS); // illegal - case 0x0e: return arcompact_handle04_2f_3f_0e(PARAMS); // illegal - case 0x0f: return arcompact_handle04_2f_3f_0f(PARAMS); // illegal - case 0x10: return arcompact_handle04_2f_3f_10(PARAMS); // illegal - case 0x11: return arcompact_handle04_2f_3f_11(PARAMS); // illegal - case 0x12: return arcompact_handle04_2f_3f_12(PARAMS); // illegal - case 0x13: return arcompact_handle04_2f_3f_13(PARAMS); // illegal - case 0x14: return arcompact_handle04_2f_3f_14(PARAMS); // illegal - case 0x15: return arcompact_handle04_2f_3f_15(PARAMS); // illegal - case 0x16: return arcompact_handle04_2f_3f_16(PARAMS); // illegal - case 0x17: return arcompact_handle04_2f_3f_17(PARAMS); // illegal - case 0x18: return arcompact_handle04_2f_3f_18(PARAMS); // illegal - case 0x19: return arcompact_handle04_2f_3f_19(PARAMS); // illegal - case 0x1a: return arcompact_handle04_2f_3f_1a(PARAMS); // illegal - case 0x1b: return arcompact_handle04_2f_3f_1b(PARAMS); // illegal - case 0x1c: return arcompact_handle04_2f_3f_1c(PARAMS); // illegal - case 0x1d: return arcompact_handle04_2f_3f_1d(PARAMS); // illegal - case 0x1e: return arcompact_handle04_2f_3f_1e(PARAMS); // illegal - case 0x1f: return arcompact_handle04_2f_3f_1f(PARAMS); // illegal - case 0x20: return arcompact_handle04_2f_3f_20(PARAMS); // illegal - case 0x21: return arcompact_handle04_2f_3f_21(PARAMS); // illegal - case 0x22: return arcompact_handle04_2f_3f_22(PARAMS); // illegal - case 0x23: return arcompact_handle04_2f_3f_23(PARAMS); // illegal - case 0x24: return arcompact_handle04_2f_3f_24(PARAMS); // illegal - case 0x25: return arcompact_handle04_2f_3f_25(PARAMS); // illegal - case 0x26: return arcompact_handle04_2f_3f_26(PARAMS); // illegal - case 0x27: return arcompact_handle04_2f_3f_27(PARAMS); // illegal - case 0x28: return arcompact_handle04_2f_3f_28(PARAMS); // illegal - case 0x29: return arcompact_handle04_2f_3f_29(PARAMS); // illegal - case 0x2a: return arcompact_handle04_2f_3f_2a(PARAMS); // illegal - case 0x2b: return arcompact_handle04_2f_3f_2b(PARAMS); // illegal - case 0x2c: return arcompact_handle04_2f_3f_2c(PARAMS); // illegal - case 0x2d: return arcompact_handle04_2f_3f_2d(PARAMS); // illegal - case 0x2e: return arcompact_handle04_2f_3f_2e(PARAMS); // illegal - case 0x2f: return arcompact_handle04_2f_3f_2f(PARAMS); // illegal - case 0x30: return arcompact_handle04_2f_3f_30(PARAMS); // illegal - case 0x31: return arcompact_handle04_2f_3f_31(PARAMS); // illegal - case 0x32: return arcompact_handle04_2f_3f_32(PARAMS); // illegal - case 0x33: return arcompact_handle04_2f_3f_33(PARAMS); // illegal - case 0x34: return arcompact_handle04_2f_3f_34(PARAMS); // illegal - case 0x35: return arcompact_handle04_2f_3f_35(PARAMS); // illegal - case 0x36: return arcompact_handle04_2f_3f_36(PARAMS); // illegal - case 0x37: return arcompact_handle04_2f_3f_37(PARAMS); // illegal - case 0x38: return arcompact_handle04_2f_3f_38(PARAMS); // illegal - case 0x39: return arcompact_handle04_2f_3f_39(PARAMS); // illegal - case 0x3a: return arcompact_handle04_2f_3f_3a(PARAMS); // illegal - case 0x3b: return arcompact_handle04_2f_3f_3b(PARAMS); // illegal - case 0x3c: return arcompact_handle04_2f_3f_3c(PARAMS); // illegal - case 0x3d: return arcompact_handle04_2f_3f_3d(PARAMS); // illegal - case 0x3e: return arcompact_handle04_2f_3f_3e(PARAMS); // illegal - case 0x3f: return arcompact_handle04_2f_3f_3f(PARAMS); // illegal - } - - return 0; -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f(OPS_32) // useless ZOP group, no actual opcodes -{ - uint8_t subinstr3 = (op & 0x07000000) >> 24; - subinstr3 |= ((op & 0x00007000) >> 12) << 3; - - switch (subinstr3) - { - case 0x00: return arcompact_handle05_2f_3f_00(PARAMS); // illegal - case 0x01: return arcompact_handle05_2f_3f_01(PARAMS); // illegal - case 0x02: return arcompact_handle05_2f_3f_02(PARAMS); // illegal - case 0x03: return arcompact_handle05_2f_3f_03(PARAMS); // illegal - case 0x04: return arcompact_handle05_2f_3f_04(PARAMS); // illegal - case 0x05: return arcompact_handle05_2f_3f_05(PARAMS); // illegal - case 0x06: return arcompact_handle05_2f_3f_06(PARAMS); // illegal - case 0x07: return arcompact_handle05_2f_3f_07(PARAMS); // illegal - case 0x08: return arcompact_handle05_2f_3f_08(PARAMS); // illegal - case 0x09: return arcompact_handle05_2f_3f_09(PARAMS); // illegal - case 0x0a: return arcompact_handle05_2f_3f_0a(PARAMS); // illegal - case 0x0b: return arcompact_handle05_2f_3f_0b(PARAMS); // illegal - case 0x0c: return arcompact_handle05_2f_3f_0c(PARAMS); // illegal - case 0x0d: return arcompact_handle05_2f_3f_0d(PARAMS); // illegal - case 0x0e: return arcompact_handle05_2f_3f_0e(PARAMS); // illegal - case 0x0f: return arcompact_handle05_2f_3f_0f(PARAMS); // illegal - case 0x10: return arcompact_handle05_2f_3f_10(PARAMS); // illegal - case 0x11: return arcompact_handle05_2f_3f_11(PARAMS); // illegal - case 0x12: return arcompact_handle05_2f_3f_12(PARAMS); // illegal - case 0x13: return arcompact_handle05_2f_3f_13(PARAMS); // illegal - case 0x14: return arcompact_handle05_2f_3f_14(PARAMS); // illegal - case 0x15: return arcompact_handle05_2f_3f_15(PARAMS); // illegal - case 0x16: return arcompact_handle05_2f_3f_16(PARAMS); // illegal - case 0x17: return arcompact_handle05_2f_3f_17(PARAMS); // illegal - case 0x18: return arcompact_handle05_2f_3f_18(PARAMS); // illegal - case 0x19: return arcompact_handle05_2f_3f_19(PARAMS); // illegal - case 0x1a: return arcompact_handle05_2f_3f_1a(PARAMS); // illegal - case 0x1b: return arcompact_handle05_2f_3f_1b(PARAMS); // illegal - case 0x1c: return arcompact_handle05_2f_3f_1c(PARAMS); // illegal - case 0x1d: return arcompact_handle05_2f_3f_1d(PARAMS); // illegal - case 0x1e: return arcompact_handle05_2f_3f_1e(PARAMS); // illegal - case 0x1f: return arcompact_handle05_2f_3f_1f(PARAMS); // illegal - case 0x20: return arcompact_handle05_2f_3f_20(PARAMS); // illegal - case 0x21: return arcompact_handle05_2f_3f_21(PARAMS); // illegal - case 0x22: return arcompact_handle05_2f_3f_22(PARAMS); // illegal - case 0x23: return arcompact_handle05_2f_3f_23(PARAMS); // illegal - case 0x24: return arcompact_handle05_2f_3f_24(PARAMS); // illegal - case 0x25: return arcompact_handle05_2f_3f_25(PARAMS); // illegal - case 0x26: return arcompact_handle05_2f_3f_26(PARAMS); // illegal - case 0x27: return arcompact_handle05_2f_3f_27(PARAMS); // illegal - case 0x28: return arcompact_handle05_2f_3f_28(PARAMS); // illegal - case 0x29: return arcompact_handle05_2f_3f_29(PARAMS); // illegal - case 0x2a: return arcompact_handle05_2f_3f_2a(PARAMS); // illegal - case 0x2b: return arcompact_handle05_2f_3f_2b(PARAMS); // illegal - case 0x2c: return arcompact_handle05_2f_3f_2c(PARAMS); // illegal - case 0x2d: return arcompact_handle05_2f_3f_2d(PARAMS); // illegal - case 0x2e: return arcompact_handle05_2f_3f_2e(PARAMS); // illegal - case 0x2f: return arcompact_handle05_2f_3f_2f(PARAMS); // illegal - case 0x30: return arcompact_handle05_2f_3f_30(PARAMS); // illegal - case 0x31: return arcompact_handle05_2f_3f_31(PARAMS); // illegal - case 0x32: return arcompact_handle05_2f_3f_32(PARAMS); // illegal - case 0x33: return arcompact_handle05_2f_3f_33(PARAMS); // illegal - case 0x34: return arcompact_handle05_2f_3f_34(PARAMS); // illegal - case 0x35: return arcompact_handle05_2f_3f_35(PARAMS); // illegal - case 0x36: return arcompact_handle05_2f_3f_36(PARAMS); // illegal - case 0x37: return arcompact_handle05_2f_3f_37(PARAMS); // illegal - case 0x38: return arcompact_handle05_2f_3f_38(PARAMS); // illegal - case 0x39: return arcompact_handle05_2f_3f_39(PARAMS); // illegal - case 0x3a: return arcompact_handle05_2f_3f_3a(PARAMS); // illegal - case 0x3b: return arcompact_handle05_2f_3f_3b(PARAMS); // illegal - case 0x3c: return arcompact_handle05_2f_3f_3c(PARAMS); // illegal - case 0x3d: return arcompact_handle05_2f_3f_3d(PARAMS); // illegal - case 0x3e: return arcompact_handle05_2f_3f_3e(PARAMS); // illegal - case 0x3f: return arcompact_handle05_2f_3f_3f(PARAMS); // illegal - } - - return 0; -} - - -// this is an Extension ALU group, maybe optional on some CPUs? -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05(OPS_32) -{ - uint8_t subinstr = (op & 0x003f0000) >> 16; - - switch (subinstr) - { - case 0x00: return arcompact_handle05_00(PARAMS); // ASL - case 0x01: return arcompact_handle05_01(PARAMS); // LSR - case 0x02: return arcompact_handle05_02(PARAMS); // ASR - case 0x03: return arcompact_handle05_03(PARAMS); // ROR - case 0x04: return arcompact_handle05_04(PARAMS); // MUL64 - case 0x05: return arcompact_handle05_05(PARAMS); // MULU64 - case 0x06: return arcompact_handle05_06(PARAMS); // ADDS - case 0x07: return arcompact_handle05_07(PARAMS); // SUBS - case 0x08: return arcompact_handle05_08(PARAMS); // DIVAW - case 0x09: return arcompact_handle05_09(PARAMS); // illegal - case 0x0a: return arcompact_handle05_0a(PARAMS); // ASLS - case 0x0b: return arcompact_handle05_0b(PARAMS); // ASRS - case 0x0c: return arcompact_handle05_0c(PARAMS); // illegal - case 0x0d: return arcompact_handle05_0d(PARAMS); // illegal - case 0x0e: return arcompact_handle05_0e(PARAMS); // illegal - case 0x0f: return arcompact_handle05_0f(PARAMS); // illegal - case 0x10: return arcompact_handle05_10(PARAMS); // illegal - case 0x11: return arcompact_handle05_11(PARAMS); // illegal - case 0x12: return arcompact_handle05_12(PARAMS); // illegal - case 0x13: return arcompact_handle05_13(PARAMS); // illegal - case 0x14: return arcompact_handle05_14(PARAMS); // illegal - case 0x15: return arcompact_handle05_15(PARAMS); // illegal - case 0x16: return arcompact_handle05_16(PARAMS); // illegal - case 0x17: return arcompact_handle05_17(PARAMS); // illegal - case 0x18: return arcompact_handle05_18(PARAMS); // illegal - case 0x19: return arcompact_handle05_19(PARAMS); // illegal - case 0x1a: return arcompact_handle05_1a(PARAMS); // illegal - case 0x1b: return arcompact_handle05_1b(PARAMS); // illegal - case 0x1c: return arcompact_handle05_1c(PARAMS); // illegal - case 0x1d: return arcompact_handle05_1d(PARAMS); // illegal - case 0x1e: return arcompact_handle05_1e(PARAMS); // illegal - case 0x1f: return arcompact_handle05_1f(PARAMS); // illegal - case 0x20: return arcompact_handle05_20(PARAMS); // illegal - case 0x21: return arcompact_handle05_21(PARAMS); // illegal - case 0x22: return arcompact_handle05_22(PARAMS); // illegal - case 0x23: return arcompact_handle05_23(PARAMS); // illegal - case 0x24: return arcompact_handle05_24(PARAMS); // illegal - case 0x25: return arcompact_handle05_25(PARAMS); // illegal - case 0x26: return arcompact_handle05_26(PARAMS); // illegal - case 0x27: return arcompact_handle05_27(PARAMS); // illegal - case 0x28: return arcompact_handle05_28(PARAMS); // ADDSDW - case 0x29: return arcompact_handle05_29(PARAMS); // SUBSDW - case 0x2a: return arcompact_handle05_2a(PARAMS); // illegal - case 0x2b: return arcompact_handle05_2b(PARAMS); // illegal - case 0x2c: return arcompact_handle05_2c(PARAMS); // illegal - case 0x2d: return arcompact_handle05_2d(PARAMS); // illegal - case 0x2e: return arcompact_handle05_2e(PARAMS); // illegal - case 0x2f: return arcompact_handle05_2f(PARAMS); // SOPs - case 0x30: return arcompact_handle05_30(PARAMS); // illegal - case 0x31: return arcompact_handle05_31(PARAMS); // illegal - case 0x32: return arcompact_handle05_32(PARAMS); // illegal - case 0x33: return arcompact_handle05_33(PARAMS); // illegal - case 0x34: return arcompact_handle05_34(PARAMS); // illegal - case 0x35: return arcompact_handle05_35(PARAMS); // illegal - case 0x36: return arcompact_handle05_36(PARAMS); // illegal - case 0x37: return arcompact_handle05_37(PARAMS); // illegal - case 0x38: return arcompact_handle05_38(PARAMS); // illegal - case 0x39: return arcompact_handle05_39(PARAMS); // illegal - case 0x3a: return arcompact_handle05_3a(PARAMS); // illegal - case 0x3b: return arcompact_handle05_3b(PARAMS); // illegal - case 0x3c: return arcompact_handle05_3c(PARAMS); // illegal - case 0x3d: return arcompact_handle05_3d(PARAMS); // illegal - case 0x3e: return arcompact_handle05_3e(PARAMS); // illegal - case 0x3f: return arcompact_handle05_3f(PARAMS); // illegal - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c(OPS_16) -{ - uint8_t subinstr = (op & 0x0018) >> 3; - - switch (subinstr) - { - case 0x00: return arcompact_handle0c_00(PARAMS); // LD_S - case 0x01: return arcompact_handle0c_01(PARAMS); // LDB_S - case 0x02: return arcompact_handle0c_02(PARAMS); // LDW_S - case 0x03: return arcompact_handle0c_03(PARAMS); // ADD_S - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d(OPS_16) -{ - uint8_t subinstr = (op & 0x0018) >> 3; - - switch (subinstr) - { - case 0x00: return arcompact_handle0d_00(PARAMS); // ADD_S - case 0x01: return arcompact_handle0d_01(PARAMS); // SUB_S - case 0x02: return arcompact_handle0d_02(PARAMS); // ASL_S - case 0x03: return arcompact_handle0d_03(PARAMS); // ASR_S - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e(OPS_16) -{ - uint8_t subinstr = (op & 0x0018) >> 3; - - switch (subinstr) - { - case 0x00: return arcompact_handle0e_00(PARAMS); // ADD_S - case 0x01: return arcompact_handle0e_01(PARAMS); // MOV_S - case 0x02: return arcompact_handle0e_02(PARAMS); // CMP_S - case 0x03: return arcompact_handle0e_03(PARAMS); // MOV_S - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f(OPS_16) -{ - uint8_t subinstr = (op & 0x01f) >> 0; - - switch (subinstr) - { - case 0x00: return arcompact_handle0f_00(PARAMS); // SOPs - case 0x01: return arcompact_handle0f_01(PARAMS); // 0x01 - case 0x02: return arcompact_handle0f_02(PARAMS); // SUB_S - case 0x03: return arcompact_handle0f_03(PARAMS); // 0x03 - case 0x04: return arcompact_handle0f_04(PARAMS); // AND_S - case 0x05: return arcompact_handle0f_05(PARAMS); // OR_S - case 0x06: return arcompact_handle0f_06(PARAMS); // BIC_S - case 0x07: return arcompact_handle0f_07(PARAMS); // XOR_S - case 0x08: return arcompact_handle0f_08(PARAMS); // 0x08 - case 0x09: return arcompact_handle0f_09(PARAMS); // 0x09 - case 0x0a: return arcompact_handle0f_0a(PARAMS); // 0x0a - case 0x0b: return arcompact_handle0f_0b(PARAMS); // TST_S - case 0x0c: return arcompact_handle0f_0c(PARAMS); // MUL64_S - case 0x0d: return arcompact_handle0f_0d(PARAMS); // SEXB_S - case 0x0e: return arcompact_handle0f_0e(PARAMS); // SEXW_S - case 0x0f: return arcompact_handle0f_0f(PARAMS); // EXTB_S - case 0x10: return arcompact_handle0f_10(PARAMS); // EXTW_S - case 0x11: return arcompact_handle0f_11(PARAMS); // ABS_S - case 0x12: return arcompact_handle0f_12(PARAMS); // NOT_S - case 0x13: return arcompact_handle0f_13(PARAMS); // NEG_S - case 0x14: return arcompact_handle0f_14(PARAMS); // ADD1_S - case 0x15: return arcompact_handle0f_15(PARAMS); // ADD2_S - case 0x16: return arcompact_handle0f_16(PARAMS); // ADD3_S - case 0x17: return arcompact_handle0f_17(PARAMS); // 0x17 - case 0x18: return arcompact_handle0f_18(PARAMS); // ASL_S (multiple) - case 0x19: return arcompact_handle0f_19(PARAMS); // LSR_S (multiple) - case 0x1a: return arcompact_handle0f_1a(PARAMS); // ASR_S (multiple) - case 0x1b: return arcompact_handle0f_1b(PARAMS); // ASL_S (single) - case 0x1c: return arcompact_handle0f_1c(PARAMS); // LSR_S (single) - case 0x1d: return arcompact_handle0f_1d(PARAMS); // ASR_S (single) - case 0x1e: return arcompact_handle0f_1e(PARAMS); // TRAP (not a5?) - case 0x1f: return arcompact_handle0f_1f(PARAMS); // BRK_S ( 0x7fff only? ) - - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00(OPS_16) -{ - uint8_t subinstr = (op & 0x00e0) >> 5; - - switch (subinstr) - { - case 0x00: return arcompact_handle0f_00_00(PARAMS); // J_S - case 0x01: return arcompact_handle0f_00_01(PARAMS); // J_S.D - case 0x02: return arcompact_handle0f_00_02(PARAMS); // JL_S - case 0x03: return arcompact_handle0f_00_03(PARAMS); // JL_S.D - case 0x04: return arcompact_handle0f_00_04(PARAMS); // 0x04 - case 0x05: return arcompact_handle0f_00_05(PARAMS); // 0x05 - case 0x06: return arcompact_handle0f_00_06(PARAMS); // SUB_S.NE - case 0x07: return arcompact_handle0f_00_07(PARAMS); // ZOPs - - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07(OPS_16) -{ - uint8_t subinstr3 = (op & 0x0700) >> 8; - - switch (subinstr3) - { - case 0x00: return arcompact_handle0f_00_07_00(PARAMS); // NOP_S - case 0x01: return arcompact_handle0f_00_07_01(PARAMS); // UNIMP_S - case 0x02: return arcompact_handle0f_00_07_02(PARAMS); // 0x02 - case 0x03: return arcompact_handle0f_00_07_03(PARAMS); // 0x03 - case 0x04: return arcompact_handle0f_00_07_04(PARAMS); // JEQ_S [BLINK] - case 0x05: return arcompact_handle0f_00_07_05(PARAMS); // JNE_S [BLINK] - case 0x06: return arcompact_handle0f_00_07_06(PARAMS); // J_S [BLINK] - case 0x07: return arcompact_handle0f_00_07_07(PARAMS); // J_S.D [BLINK] - - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17(OPS_16) -{ - uint8_t subinstr = (op & 0x00e0) >> 5; - - switch (subinstr) - { - case 0x00: return arcompact_handle17_00(PARAMS); // ASL_S - case 0x01: return arcompact_handle17_01(PARAMS); // LSR_S - case 0x02: return arcompact_handle17_02(PARAMS); // ASR_S - case 0x03: return arcompact_handle17_03(PARAMS); // SUB_S - case 0x04: return arcompact_handle17_04(PARAMS); // BSET_S - case 0x05: return arcompact_handle17_05(PARAMS); // BCLR_S - case 0x06: return arcompact_handle17_06(PARAMS); // BMSK_S - case 0x07: return arcompact_handle17_07(PARAMS); // BTST_S - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18(OPS_16) -{ - uint8_t subinstr = (op & 0x00e0) >> 5; - - switch (subinstr) - { - case 0x00: return arcompact_handle18_00(PARAMS); // LD_S (SP) - case 0x01: return arcompact_handle18_01(PARAMS); // LDB_S (SP) - case 0x02: return arcompact_handle18_02(PARAMS); // ST_S (SP) - case 0x03: return arcompact_handle18_03(PARAMS); // STB_S (SP) - case 0x04: return arcompact_handle18_04(PARAMS); // ADD_S (SP) - case 0x05: return arcompact_handle18_05(PARAMS); // subtable 18_05 - case 0x06: return arcompact_handle18_06(PARAMS); // subtable 18_06 - case 0x07: return arcompact_handle18_07(PARAMS); // subtable 18_07 - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05(OPS_16) -{ - uint8_t subinstr2 = (op & 0x0700) >> 8; - - switch (subinstr2) - { - case 0x00: return arcompact_handle18_05_00(PARAMS); // ADD_S (SP) - case 0x01: return arcompact_handle18_05_01(PARAMS); // SUB_S (SP) - case 0x02: return arcompact_handle18_05_02(PARAMS); // - case 0x03: return arcompact_handle18_05_03(PARAMS); // - case 0x04: return arcompact_handle18_05_04(PARAMS); // - case 0x05: return arcompact_handle18_05_05(PARAMS); // - case 0x06: return arcompact_handle18_05_06(PARAMS); // - case 0x07: return arcompact_handle18_05_07(PARAMS); // - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06(OPS_16) -{ - uint8_t subinstr2 = (op & 0x001f) >> 0; - - switch (subinstr2) - { - case 0x00: return arcompact_handle18_06_00(PARAMS); // - case 0x01: return arcompact_handle18_06_01(PARAMS); // POP_S b - case 0x02: return arcompact_handle18_06_02(PARAMS); // - case 0x03: return arcompact_handle18_06_03(PARAMS); // - case 0x04: return arcompact_handle18_06_04(PARAMS); // - case 0x05: return arcompact_handle18_06_05(PARAMS); // - case 0x06: return arcompact_handle18_06_06(PARAMS); // - case 0x07: return arcompact_handle18_06_07(PARAMS); // - case 0x08: return arcompact_handle18_06_08(PARAMS); // - case 0x09: return arcompact_handle18_06_09(PARAMS); // - case 0x0a: return arcompact_handle18_06_0a(PARAMS); // - case 0x0b: return arcompact_handle18_06_0b(PARAMS); // - case 0x0c: return arcompact_handle18_06_0c(PARAMS); // - case 0x0d: return arcompact_handle18_06_0d(PARAMS); // - case 0x0e: return arcompact_handle18_06_0e(PARAMS); // - case 0x0f: return arcompact_handle18_06_0f(PARAMS); // - case 0x10: return arcompact_handle18_06_10(PARAMS); // - case 0x11: return arcompact_handle18_06_11(PARAMS); // POP_S blink - case 0x12: return arcompact_handle18_06_12(PARAMS); // - case 0x13: return arcompact_handle18_06_13(PARAMS); // - case 0x14: return arcompact_handle18_06_14(PARAMS); // - case 0x15: return arcompact_handle18_06_15(PARAMS); // - case 0x16: return arcompact_handle18_06_16(PARAMS); // - case 0x17: return arcompact_handle18_06_17(PARAMS); // - case 0x18: return arcompact_handle18_06_18(PARAMS); // - case 0x19: return arcompact_handle18_06_19(PARAMS); // - case 0x1a: return arcompact_handle18_06_1a(PARAMS); // - case 0x1b: return arcompact_handle18_06_1b(PARAMS); // - case 0x1c: return arcompact_handle18_06_1c(PARAMS); // - case 0x1d: return arcompact_handle18_06_1d(PARAMS); // - case 0x1e: return arcompact_handle18_06_1e(PARAMS); // - case 0x1f: return arcompact_handle18_06_1f(PARAMS); // - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07(OPS_16) -{ - uint8_t subinstr2 = (op & 0x001f) >> 0; - - switch (subinstr2) - { - case 0x00: return arcompact_handle18_07_00(PARAMS); // - case 0x01: return arcompact_handle18_07_01(PARAMS); // PUSH_S b - case 0x02: return arcompact_handle18_07_02(PARAMS); // - case 0x03: return arcompact_handle18_07_03(PARAMS); // - case 0x04: return arcompact_handle18_07_04(PARAMS); // - case 0x05: return arcompact_handle18_07_05(PARAMS); // - case 0x06: return arcompact_handle18_07_06(PARAMS); // - case 0x07: return arcompact_handle18_07_07(PARAMS); // - case 0x08: return arcompact_handle18_07_08(PARAMS); // - case 0x09: return arcompact_handle18_07_09(PARAMS); // - case 0x0a: return arcompact_handle18_07_0a(PARAMS); // - case 0x0b: return arcompact_handle18_07_0b(PARAMS); // - case 0x0c: return arcompact_handle18_07_0c(PARAMS); // - case 0x0d: return arcompact_handle18_07_0d(PARAMS); // - case 0x0e: return arcompact_handle18_07_0e(PARAMS); // - case 0x0f: return arcompact_handle18_07_0f(PARAMS); // - case 0x10: return arcompact_handle18_07_10(PARAMS); // - case 0x11: return arcompact_handle18_07_11(PARAMS); // PUSH_S blink - case 0x12: return arcompact_handle18_07_12(PARAMS); // - case 0x13: return arcompact_handle18_07_13(PARAMS); // - case 0x14: return arcompact_handle18_07_14(PARAMS); // - case 0x15: return arcompact_handle18_07_15(PARAMS); // - case 0x16: return arcompact_handle18_07_16(PARAMS); // - case 0x17: return arcompact_handle18_07_17(PARAMS); // - case 0x18: return arcompact_handle18_07_18(PARAMS); // - case 0x19: return arcompact_handle18_07_19(PARAMS); // - case 0x1a: return arcompact_handle18_07_1a(PARAMS); // - case 0x1b: return arcompact_handle18_07_1b(PARAMS); // - case 0x1c: return arcompact_handle18_07_1c(PARAMS); // - case 0x1d: return arcompact_handle18_07_1d(PARAMS); // - case 0x1e: return arcompact_handle18_07_1e(PARAMS); // - case 0x1f: return arcompact_handle18_07_1f(PARAMS); // - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19(OPS_16) -{ - uint8_t subinstr = (op & 0x0600) >> 9; - - switch (subinstr) - { - case 0x00: return arcompact_handle19_00(PARAMS); // LD_S (GP) - case 0x01: return arcompact_handle19_01(PARAMS); // LDB_S (GP) - case 0x02: return arcompact_handle19_02(PARAMS); // LDW_S (GP) - case 0x03: return arcompact_handle19_03(PARAMS); // ADD_S (GP) - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c(OPS_16) -{ - uint8_t subinstr = (op & 0x0080) >> 7; - - switch (subinstr) - { - case 0x00: return arcompact_handle1c_00(PARAMS); // ADD_S - case 0x01: return arcompact_handle1c_01(PARAMS); // CMP_S - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d(OPS_16) -{ - uint8_t subinstr = (op & 0x0080) >> 7; - - switch (subinstr) - { - case 0x00: return arcompact_handle1d_00(PARAMS); // BREQ_S - case 0x01: return arcompact_handle1d_01(PARAMS); // BRNE_S - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e(OPS_16) -{ - uint8_t subinstr = (op & 0x0600) >> 9; - - switch (subinstr) - { - case 0x00: return arcompact_handle1e_00(PARAMS); // B_S - case 0x01: return arcompact_handle1e_01(PARAMS); // BEQ_S - case 0x02: return arcompact_handle1e_02(PARAMS); // BNE_S - case 0x03: return arcompact_handle1e_03(PARAMS); // Bcc_S - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03(OPS_16) -{ - uint8_t subinstr2 = (op & 0x01c0) >> 6; - - switch (subinstr2) - { - case 0x00: return arcompact_handle1e_03_00(PARAMS); // BGT_S - case 0x01: return arcompact_handle1e_03_01(PARAMS); // BGE_S - case 0x02: return arcompact_handle1e_03_02(PARAMS); // BLT_S - case 0x03: return arcompact_handle1e_03_03(PARAMS); // BLE_S - case 0x04: return arcompact_handle1e_03_04(PARAMS); // BHI_S - case 0x05: return arcompact_handle1e_03_05(PARAMS); // BHS_S - case 0x06: return arcompact_handle1e_03_06(PARAMS); // BLO_S - case 0x07: return arcompact_handle1e_03_07(PARAMS); // BLS_S - } - - return 0; -} - -// handlers - -uint32_t arcompact_device::handle_jump_to_addr(int delay, int link, uint32_t address, uint32_t next_addr) -{ - if (delay) - { - m_delayactive = 1; - m_delayjump = address; - if (link) m_delaylinks = 1; - else m_delaylinks = 0; - return next_addr; - } - else - { - if (link) m_regs[REG_BLINK] = next_addr; - return address; - } - -} - -uint32_t arcompact_device::handle_jump_to_register(int delay, int link, uint32_t reg, uint32_t next_addr, int flag) -{ - if (reg == LIMM_REG) - arcompact_fatal("handle_jump_to_register called with LIMM register, call handle_jump_to_addr instead"); - - if ((reg == REG_ILINK1) || (reg == REG_ILINK2)) - { - if (flag) - { - arcompact_fatal("jump to ILINK1/ILINK2 not supported"); - return next_addr; - } - else - { - arcompact_fatal("illegal jump to ILINK1/ILINK2 not supported"); // FLAG bit must be set - return next_addr; - } - } - else - { - if (flag) - { - arcompact_fatal("illegal jump (flag bit set)"); // FLAG bit must NOT be set - return next_addr; - } - else - { - //arcompact_fatal("jump not supported"); - uint32_t target = m_regs[reg]; - return handle_jump_to_addr(delay, link, target, next_addr); - } - } - - return 0; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_00(OPS_32) -{ - int size = 4; - - COMMON32_GET_CONDITION - - if (!check_condition(condition)) - return m_pc + (size>>0); - - // Branch Conditionally - // 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ - int32_t address = (op & 0x07fe0000) >> 17; - address |= ((op & 0x0000ffc0) >> 6) << 10; - if (address & 0x80000) address = -0x80000 + (address & 0x7ffff); - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; - - uint32_t realaddress = PC_ALIGNED32 + (address * 2); - - if (n) - { - m_delayactive = 1; - m_delayjump = realaddress; - m_delaylinks = 0; // don't link - } - else - { - // m_regs[REG_BLINK] = m_pc + (size >> 0); // don't link - return realaddress; - } - - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_01(OPS_32) -{ - int size = 4; - // Branch Unconditionally Far - int32_t address = (op & 0x07fe0000) >> 17; - address |= ((op & 0x0000ffc0) >> 6) << 10; - address |= ((op & 0x0000000f) >> 0) << 20; - if (address & 0x800000) address = -0x800000 + (address & 0x7fffff); - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; -// int res = (op & 0x00000010) >> 4; op &= ~0x00000010; // should be set to 0 - - uint32_t realaddress = PC_ALIGNED32 + (address * 2); - - if (n) - { - m_delayactive = 1; - m_delayjump = realaddress; - m_delaylinks = 0; // don't link - } - else - { - // m_regs[REG_BLINK] = m_pc + (size >> 0); // don't link - return realaddress; - } - - - return m_pc + (size>>0); - -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_00_00dasm(OPS_32) -{ - int size = 4; - - // Branch and Link Conditionally - arcompact_log("unimplemented BLcc %08x", op); - return m_pc + (size>>0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_00_01dasm(OPS_32) -{ - int size = 4; - // Branch and Link Unconditionally Far - // 00001 sssssssss 10 SSSSSSSSSS N R TTTT - int32_t address = (op & 0x07fc0000) >> 17; - address |= ((op & 0x0000ffc0) >> 6) << 10; - address |= ((op & 0x0000000f) >> 0) << 20; - if (address & 0x800000) address = -0x800000 + (address&0x7fffff); - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; -// int res = (op & 0x00000010) >> 4; op &= ~0x00000010; - - uint32_t realaddress = PC_ALIGNED32 + (address * 2); - - if (n) - { - m_delayactive = 1; - m_delayjump = realaddress; - m_delaylinks = 1; - } - else - { - m_regs[REG_BLINK] = m_pc + (size >> 0); - return realaddress; - } - - - return m_pc + (size>>0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char* optext) -{ - int size; - - // Branch on Compare / Bit Test - Register-Register - - COMMON32_GET_creg - COMMON32_GET_breg; - //int n = (op & 0x00000020) >> 5; - - - if ((breg != LIMM_REG) && (creg != LIMM_REG)) - { - } - else - { - //uint32_t limm; - //GET_LIMM_32; - size = 8; - } - - arcompact_log("unimplemented %s %08x (reg-reg)", optext, op); - return m_pc + (size>>0); -} - - -// register - register cases - -#define BR_REGREG_SETUP \ - /* Branch on Compare / Bit Test - Register-Register */ \ - int size = 4; \ - GET_01_01_01_BRANCH_ADDR; \ - COMMON32_GET_creg; \ - COMMON32_GET_breg; \ - int n = (op & 0x00000020) >> 5; \ - uint32_t b,c; \ - if ((breg != LIMM_REG) && (creg != LIMM_REG)) \ - { \ - b = m_regs[breg]; \ - c = m_regs[creg]; \ - } \ - else \ - { \ - uint32_t limm; \ - GET_LIMM_32; \ - size = 8; \ - \ - if (breg == LIMM_REG) \ - b = limm; \ - else \ - b = m_regs[breg]; \ - \ - if (creg == LIMM_REG) \ - c = limm; \ - else \ - c = m_regs[creg]; \ - } -#define BR_TAKEJUMP \ - /* take jump */ \ - uint32_t realaddress = PC_ALIGNED32 + (address * 2); \ - \ - if (n) \ - { \ - m_delayactive = 1; \ - m_delayjump = realaddress; \ - m_delaylinks = 0; \ - } \ - else \ - { \ - return realaddress; \ - } - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_00(OPS_32) // register - register BREQ -{ - BR_REGREG_SETUP - - // BREQ - if (b == c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_01(OPS_32) // register - register BRNE -{ - BR_REGREG_SETUP - - // BRNE - if (b != c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_02(OPS_32) // regiter - register BRLT -{ - BR_REGREG_SETUP - - // BRLT (signed operation) - if ((int32_t)b < (int32_t)c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); - -} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_03(OPS_32) // register - register BRGE -{ - BR_REGREG_SETUP - - // BRGE (signed operation) - if ((int32_t)b >= (int32_t)c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_04(OPS_32) // register - register BRLO -{ - BR_REGREG_SETUP - - // BRLO (unsigned operation) - if (b < c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_05(OPS_32) // register - register BRHS -{ - BR_REGREG_SETUP - - // BRHS (unsigned operation) - if (b >= c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_0e(OPS_32) { return arcompact_01_01_00_helper( PARAMS, "BBIT0");} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_0f(OPS_32) { return arcompact_01_01_00_helper( PARAMS, "BBIT1");} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_01_helper(OPS_32, const char* optext) -{ - int size = 4; - arcompact_log("unimplemented %s %08x (reg-imm)", optext, op); - return m_pc + (size>>0); -} - -#define BR_REGIMM_SETUP \ - int size = 4; \ - GET_01_01_01_BRANCH_ADDR \ - COMMON32_GET_u6; \ - COMMON32_GET_breg; \ - int n = (op & 0x00000020) >> 5; \ - uint32_t b,c; \ - c = u; \ - /* comparing a LIMM to an immediate is pointless, is it a valid encoding? */ \ - if ((breg != LIMM_REG)) \ - { \ - b = m_regs[breg]; \ - } \ - else \ - { \ - uint32_t limm; \ - GET_LIMM_32; \ - size = 8; \ - b = limm; \ - } - -// register -immediate cases -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_00(OPS_32) // BREQ reg-imm -{ - BR_REGIMM_SETUP - - // BREQ - if (b == c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_01(OPS_32) // BRNE reg-imm -{ - BR_REGIMM_SETUP - - // BRNE - if (b != c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_02(OPS_32) // BRLT reg-imm -{ - BR_REGIMM_SETUP - - // BRLT (signed operation) - if ((int32_t)b < (int32_t)c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); - -} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_03(OPS_32) -{ - BR_REGIMM_SETUP - - // BRGE (signed operation) - if ((int32_t)b >= (int32_t)c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_04(OPS_32) // register - immediate BRLO -{ - BR_REGIMM_SETUP - - // BRLO (unsigned operation) - if (b < c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); - -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_05(OPS_32) // register - immediate BRHS -{ - BR_REGIMM_SETUP - - // BRHS (unsigned operation) - if (b >= c) - { - BR_TAKEJUMP - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_0e(OPS_32) { return arcompact_01_01_01_helper(PARAMS, "BBIT0"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_0f(OPS_32) { return arcompact_01_01_01_helper(PARAMS, "BBIT1"); } - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle02(OPS_32) -{ - int size = 4; - uint32_t limm; - - int S = (op & 0x00008000) >> 15;// op &= ~0x00008000; - int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000; - if (S) s = -0x100 + s; - - COMMON32_GET_breg; - COMMON32_GET_areg - - int X = (op & 0x00000040) >> 6; //op &= ~0x00000040; - int Z = (op & 0x00000180) >> 7; //op &= ~0x00000180; - int a = (op & 0x00000600) >> 9; //op &= ~0x00000600; -// int D = (op & 0x00000800) >> 11;// op &= ~0x00000800; // we don't use the data cache currently - - uint32_t address = m_regs[breg]; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - - address = limm; - } - - // address manipulation - if ((a == 0) || (a == 1)) - { - address = address + s; - } - else if (a == 2) - { - //address = address; - } - else if (a == 3) - { - if (Z == 0) - { - address = address + (s << 2); - } - else if (Z == 2) - { - address = address + (s << 1); - } - else // Z == 1 and Z == 3 are invalid here - { - arcompact_fatal("zz_ illegal LD %08x (data size %d mode %d)", op, Z, a); - } - } - - uint32_t readdata = 0; - - // read data - if (Z == 0) - { - readdata = READ32(address >> 2); - - if (X) // sign extend is not supported for long reads - arcompact_fatal("illegal LD %08x (data size %d mode %d with X)", op, Z, a); - - } - else if (Z == 1) - { - readdata = READ8(address >> 0); - - if (X) // todo - arcompact_fatal("illegal LD %08x (data size %d mode %d with X)", op, Z, a); - - } - else if (Z == 2) - { - readdata = READ16(address >> 1); - - if (X) // todo - arcompact_fatal("illegal LD %08x (data size %d mode %d with X)", op, Z, a); - - } - else if (Z == 3) - { // Z == 3 is always illegal - arcompact_fatal("xx_ illegal LD %08x (data size %d mode %d)", op, Z, a); - } - - m_regs[areg] = readdata; - - // writeback / increment - if ((a == 1) || (a == 2)) - { - if (breg==LIMM_REG) - arcompact_fatal("yy_ illegal LD %08x (data size %d mode %d)", op, Z, a); // using the LIMM as the base register and an increment mode is illegal - - m_regs[breg] = m_regs[breg] + s; - } - - return m_pc + (size>>0); - -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle03(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - int S = (op & 0x00008000) >> 15; - int s = (op & 0x00ff0000) >> 16; - if (S) s = -0x100 + s; - - COMMON32_GET_breg; - COMMON32_GET_creg; - -// int R = (op & 0x00000001) >> 0; // bit 0 is reserved - int Z = (op & 0x00000006) >> 1; - int a = (op & 0x00000018) >> 3; -// int D = (op & 0x00000020) >> 5; // we don't use the data cache currently - - - uint32_t address = m_regs[breg]; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - - address = limm; - } - - uint32_t writedata = m_regs[creg]; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - - writedata = limm; - } - - // are LIMM addresses with 's' offset non-0 ('a' mode 0 / 3) legal? - // not mentioned in docs.. - - // address manipulation - if ((a == 0) || (a == 1)) - { - address = address + s; - } - else if (a == 2) - { - //address = address; - } - else if (a == 3) - { - if (Z == 0) - address = address + (s << 2); - else if (Z==2) - address = address + (s << 1); - else // Z == 1 and Z == 3 are invalid here - arcompact_fatal("illegal ST %08x (data size %d mode %d)", op, Z, a); - } - - // write data - if (Z == 0) - { - WRITE32(address >> 2, writedata); - } - else if (Z == 1) - { - WRITE8(address >> 0, writedata); - } - else if (Z == 2) - { - WRITE16(address >> 1, writedata); - } - else if (Z == 3) - { // Z == 3 is always illegal - arcompact_fatal("illegal ST %08x (data size %d mode %d)", op, Z, a); - } - - // writeback / increment - if ((a == 1) || (a == 2)) - { - if (breg==LIMM_REG) - arcompact_fatal("illegal ST %08x (data size %d mode %d)", op, Z, a); // using the LIMM as the base register and an increment mode is illegal - - m_regs[breg] = m_regs[breg] + s; - } - - return m_pc + (size>>0); - -} - - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_helper(OPS_32, const char* optext, int ignore_dst, int b_reserved) -{ - int size; - //uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_p; - COMMON32_GET_breg; - - if (!b_reserved) - { - if (breg == LIMM_REG) - { - //GET_LIMM_32; - size = 8; - got_limm = 1; - } - else - { - } - } - else - { - } - - - if (p == 0) - { - COMMON32_GET_creg - - if (creg == LIMM_REG) - { - if (!got_limm) - { - //GET_LIMM_32; - size = 8; - } - } - else - { - } - } - else if (p == 1) - { - } - else if (p == 2) - { - } - else if (p == 3) - { - int M = (op & 0x00000020) >> 5; - - if (M == 0) - { - COMMON32_GET_creg - - if (creg == LIMM_REG) - { - if (!got_limm) - { - //GET_LIMM_32; - size = 8; - } - } - else - { - } - - } - else if (M == 1) - { - } - - } - - arcompact_log("unimplemented %s %08x (04 type helper)", optext, op); - - return m_pc + (size>>0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_00_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + c; - m_regs[areg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if ((b & 0x80000000) == (c & 0x80000000)) - { - if ((result & 0x80000000) != (b & 0x80000000)) - { - STATUS32_SET_V; - } - else - { - STATUS32_CLEAR_V; - } - } - if (b < c) - { - STATUS32_SET_C; - } - else - { - STATUS32_CLEAR_C; - } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_00_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + c; - m_regs[areg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if ((b & 0x80000000) == (c & 0x80000000)) - { - if ((result & 0x80000000) != (b & 0x80000000)) - { - STATUS32_SET_V; - } - else - { - STATUS32_CLEAR_V; - } - } - if (b < c) - { - STATUS32_SET_C; - } - else - { - STATUS32_CLEAR_C; - } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_00_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + c; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if ((b & 0x80000000) == (c & 0x80000000)) - { - if ((result & 0x80000000) != (b & 0x80000000)) - { - STATUS32_SET_V; - } - else - { - STATUS32_CLEAR_V; - } - } - if (b < c) - { - STATUS32_SET_C; - } - else - { - STATUS32_CLEAR_C; - } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_00_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_00_p11_m0 (ADD)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_00_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b + c; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if ((b & 0x80000000) == (c & 0x80000000)) - { - if ((result & 0x80000000) != (b & 0x80000000)) - { - STATUS32_SET_V; - } - else - { - STATUS32_CLEAR_V; - } - } - if (b < c) - { - STATUS32_SET_C; - } - else - { - STATUS32_CLEAR_C; - } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_02_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - c; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_02 (SUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_02_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - c; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_02 (SUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_02_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - c; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_02 (SUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_02_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_02_p11_m0 (SUB)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_02_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b - c; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_02 (SUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_04_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & c; - if (areg != LIMM_REG) { m_regs[areg] = result; } - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_04_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & c; - if (areg != LIMM_REG) { m_regs[areg] = result; } - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_04_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & c; - if (breg != LIMM_REG) { m_regs[breg] = result; } - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_04_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_04_p11_m0 (AND)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_04_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b & c; - if (breg != LIMM_REG) { m_regs[breg] = result; } - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_05_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b | c; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_05 (OR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_05_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b | c; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_05 (OR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_05_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b | c; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_05 (OR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_05_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_05_p11_m0 (OR)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_05_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b | c; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_05 (OR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_06_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & (~c); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_06 (BIC) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_06_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & (~c); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_06 (BIC) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_06_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & (~c); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_06 (BIC) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_06_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_06_p11_m0 (BIC)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_06_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b & (~c); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_06 (BIC) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_07_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b ^ c; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_07 (XOR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_07_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b ^ c; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_07 (XOR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_07_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b ^ c; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_07 (XOR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_07_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_07_p11_m0 (XOR)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_07_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b ^ c; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_07 (XOR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0a_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - //COMMON32_GET_areg; // areg is reserved / not used - - uint32_t c; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0a_p01(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg is reserved / not used - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0a_p10(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0a_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_0a_p11_m0 (MOV)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0a_p11_m1(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = c; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0e_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c - b; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0e (RSUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0e_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c - b; - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0e (RSUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0e_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c - b; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0e (RSUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0e_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_0e_p11_m0 (RSUB)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0e_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = c - b; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0e (RSUB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0f_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b | (1 << (c & 0x1f)); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0f (BSET) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0f_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b | (1 << (c & 0x1f)); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0f (BSET) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0f_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b | (1 << (c & 0x1f)); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0f (BSET) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0f_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_0f_p11_m0 (BSET)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0f_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b | (1 << (c & 0x1f)); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_0f (BSET) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_13_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & ((1<<(c+1))-1); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_13 (BMSK) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_13_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & ((1<<(c+1))-1); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_13 (BMSK) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_13_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b & ((1<<(c+1))-1); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_13 (BMSK) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_13_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_13_p11_m0 (BMSK)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_13_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b & ((1<<(c+1))-1); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_13 (BMSK) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_14_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 1); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_14 (ADD1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_14_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 1); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_14 (ADD1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_14_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 1); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_14 (ADD1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_14_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_14_p11_m0 (ADD1)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_14_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b + (c << 1); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_14 (ADD1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_15_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 2); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_15 (ADD2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_15_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 2); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_15 (ADD2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_15_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 2); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_15 (ADD2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_15_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_15_p11_m0 (ADD2)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_15_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b + (c << 2); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_15 (ADD2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_16_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 3); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_16 (ADD3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_16_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 3); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_16 (ADD3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_16_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b + (c << 3); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_16 (ADD3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_16_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_16_p11_m0 (ADD3)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_16_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b + (c << 3); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_16 (ADD3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_17_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 1); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_17 (SUB1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_17_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 1); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_17 (SUB1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_17_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 1); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_17 (SUB1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_17_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_17_p11_m0 (SUB1)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_17_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b - (c << 1); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_17 (SUB1) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_18_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 2); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_18 (SUB2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_18_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 2); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_18 (SUB2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_18_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 2); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_18 (SUB2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_18_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_18_p11_m0 (SUB2)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_18_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b - (c << 2); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_18 (SUB2) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_19_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 3); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_19 (SUB3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_19_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 3); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_19 (SUB3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_19_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b - (c << 3); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_19 (SUB3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_19_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_19_p11_m0 (SUB3)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_19_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b - (c << 3); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_19 (SUB3) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - //COMMON32_GET_areg; // areg is reserved / not used - - uint32_t c; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - m_regs[breg] = READAUX(c); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a_p01(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg is reserved / not used - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - m_regs[breg] = READAUX(c); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a_p10(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - m_regs[breg] = READAUX(c); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_2a_p11_m0 (LR)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a_p11_m1(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - m_regs[breg] = READAUX(c); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2b_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - //COMMON32_GET_areg; // areg is reserved / not used - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - WRITEAUX(c,b); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2b_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg is reserved / not used - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - WRITEAUX(c,b); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2b_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - WRITEAUX(c,b); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2b_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle04_2b_p11_m0 (SR)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2b_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - WRITEAUX(c,b); - - - if (F) - { - // no flag changes - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_00_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b << (c&0x1f); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_00 (ASL) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_00_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b << (c&0x1f); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_00 (ASL) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_00_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b << (c&0x1f); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_00 (ASL) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_00_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle05_00_p11_m0 (ASL)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_00_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b << (c&0x1f); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_00 (ASL) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_01_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; - got_limm = 1; - b = limm; - } - else - { - b = m_regs[breg]; - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b >> (c&0x1f); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_01 (LSR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_01_p01(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - COMMON32_GET_areg; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b >> (c&0x1f); - m_regs[areg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_01 (LSR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_01_p10(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_s12; - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = (uint32_t)S; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = b >> (c&0x1f); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_01 (LSR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_01_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("arcompact_handle05_01_p11_m0 (LSR)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_01_p11_m1(OPS_32) -{ - int size = 4; - uint32_t limm = 0; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as condition code select - - uint32_t c; - uint32_t b; - - /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */ - if (breg == LIMM_REG) - { - GET_LIMM_32; - size = 8; -/* got_limm = 1; */ - b = limm; - } - else - { - b = m_regs[breg]; - } - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - COMMON32_GET_CONDITION; - if (!check_condition(condition)) - return m_pc + (size>>0); - - uint32_t result = b >> (c&0x1f); - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle05_01 (LSR) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_02_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c >> 1; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if (c == 0x00000001) { STATUS32_SET_C; } - else { STATUS32_CLEAR_C; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_02_p01(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c >> 1; - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if (c == 0x00000001) { STATUS32_SET_C; } - else { STATUS32_CLEAR_C; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_02_p10(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_02_p10 (ares bits already used as opcode select, can't be used as s12) (LSR1)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_02_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_02_p11_m0 (ares bits already used as opcode select, can't be used as Q condition) (LSR1)\n"); - return m_pc + (size >> 0); -} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_02_p11_m1(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_02_p11_m1 (ares bits already used as opcode select, can't be used as Q condition) (LSR1)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_03_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - int shift = 1; uint32_t mask = (1 << (shift)) - 1; mask <<= (32-shift); uint32_t result = ((c >> shift) & ~mask) | ((c << (32-shift)) & mask); - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if (c == 0x00000001) { STATUS32_SET_C; } - else { STATUS32_CLEAR_C; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_03_p01(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - int shift = 1; uint32_t mask = (1 << (shift)) - 1; mask <<= (32-shift); uint32_t result = ((c >> shift) & ~mask) | ((c << (32-shift)) & mask); - m_regs[breg] = result; - - if (F) - { - if (result & 0x80000000) { STATUS32_SET_N; } - else { STATUS32_CLEAR_N; } - if (result == 0x00000000) { STATUS32_SET_Z; } - else { STATUS32_CLEAR_Z; } - if (c == 0x00000001) { STATUS32_SET_C; } - else { STATUS32_CLEAR_C; } - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_03_p10(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_03_p10 (ares bits already used as opcode select, can't be used as s12) (ROR)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_03_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_03_p11_m0 (ares bits already used as opcode select, can't be used as Q condition) (ROR)\n"); - return m_pc + (size >> 0); -} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_03_p11_m1(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_03_p11_m1 (ares bits already used as opcode select, can't be used as Q condition) (ROR)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_07_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c & 0x000000ff; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_2f_07 (EXTB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_07_p01(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c & 0x000000ff; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_2f_07 (EXTB) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_07_p10(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_07_p10 (ares bits already used as opcode select, can't be used as s12) (EXTB)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_07_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_07_p11_m0 (ares bits already used as opcode select, can't be used as Q condition) (EXTB)\n"); - return m_pc + (size >> 0); -} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_07_p11_m1(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_07_p11_m1 (ares bits already used as opcode select, can't be used as Q condition) (EXTB)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - c = limm; - } - else - { - c = m_regs[creg]; - } - /* todo: is the limm, limm syntax valid? (it's pointless.) */ - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c & 0x0000ffff; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_2f_08 (EXTW) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p01(OPS_32) -{ - int size = 4; -/* int got_limm = 0; */ - - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6; - //COMMON32_GET_areg; // areg bits already used as opcode select - - uint32_t c; - - c = u; - - /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ - uint32_t result = c & 0x0000ffff; - m_regs[breg] = result; - - if (F) - { - arcompact_fatal("arcompact_handle04_2f_08 (EXTW) (F set)\n"); // not yet supported - } - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p10(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_08_p10 (ares bits already used as opcode select, can't be used as s12) (EXTW)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p11_m0(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_08_p11_m0 (ares bits already used as opcode select, can't be used as Q condition) (EXTW)\n"); - return m_pc + (size >> 0); -} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p11_m1(OPS_32) -{ - int size = 4; - arcompact_fatal("illegal arcompact_handle04_2f_08_p11_m1 (ares bits already used as opcode select, can't be used as Q condition) (EXTW)\n"); - return m_pc + (size >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d_00(OPS_16) -{ - int u, breg, creg; - - COMMON16_GET_u3; - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] + u; - m_regs[creg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d_01(OPS_16) -{ - int u, breg, creg; - - COMMON16_GET_u3; - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] - u; - m_regs[creg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d_02(OPS_16) -{ - int u, breg, creg; - - COMMON16_GET_u3; - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] << u; - m_regs[creg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_02(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] - m_regs[creg]; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_04(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] & m_regs[creg]; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_05(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] | m_regs[creg]; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_07(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] ^ m_regs[creg]; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0f(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[creg] & 0x000000ff; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_10(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[creg] & 0x0000ffff; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_13(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = 0 - m_regs[creg]; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_14(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] + (m_regs[creg] <<1); - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_15(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] + (m_regs[creg] <<2); - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_16(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] + (m_regs[creg] <<3); - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_19(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[breg] >> (m_regs[creg]&0x1f); - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1b(OPS_16) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - uint32_t result = m_regs[creg] << 1; - m_regs[breg] = result; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_00(OPS_16) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - m_regs[breg] = m_regs[breg] << (u&0x1f); - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_01(OPS_16) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - m_regs[breg] = m_regs[breg] >> (u&0x1f); - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_02(OPS_16) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - int32_t temp = (int32_t)m_regs[breg]; m_regs[breg] = temp >> (u&0x1f); // treat it as a signed value, so sign extension occurs during shift - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_03(OPS_16) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - m_regs[breg] = m_regs[breg] - u; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_04(OPS_16) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - m_regs[breg] = m_regs[breg] | (1 << (u & 0x1f)); - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_06(OPS_16) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - m_regs[breg] = m_regs[breg] | ((1 << (u + 1)) - 1); - - return m_pc + (2 >> 0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_01(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x01], /*"ADC"*/ 0,0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_03(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x03], /*"SBC"*/ 0,0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_08(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x08], /*"MAX"*/ 0,0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_09(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x09], /*"MIN"*/ 0,0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0b(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x0b], /*"TST"*/ 1,0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0c(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x0c], /*"CMP"*/ 1,0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0d(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x0d], /*"RCMP"*/ 1,0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_10(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x10], /*"BCLR"*/ 0,0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_11(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x11], /*"BTST"*/ 0,0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_12(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x12], /*"BXOR"*/ 0,0); -} - - - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1a(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1a], /*"MPY"*/ 0,0); -} // * - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1b(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1b], /*"MPYH"*/ 0,0); -} // * - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1c(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1c], /*"MPYHU"*/ 0,0); -} // * - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1d(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1d], /*"MPYU"*/ 0,0); -} // * - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p00(OPS_32) -{ - int size; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_creg - COMMON32_GET_F - - if (creg == LIMM_REG) - { - // opcode iiii i--- ppII IIII F--- CCCC CC-- ---- - // J limm 0010 0RRR 0010 0000 0RRR 1111 10RR RRRR [LIMM] (creg = LIMM) - - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - - return limm; - } - else - { - // opcode iiii i--- ppII IIII F--- CCCC CC-- ---- - // J [c] 0010 0RRR 0010 0000 0RRR CCCC CCRR RRRR - // J.F [ilink1] 0010 0RRR 0010 0000 1RRR 0111 01RR RRRR (creg = ILINK1, FLAG must be set) - // J.F [ilink2] 0010 0RRR 0010 0000 1RRR 0111 10RR RRRR (creg = ILINE2, FLAG must be set) - - if (F) - { - if ((creg == REG_ILINK1) || (creg == REG_ILINK2)) - { - arcompact_log("1 unimplemented J.F %08x", op); - } - else - { - // should not use .F unless jumping to ILINK1/2 - arcompact_fatal ("illegal 1 unimplemented J.F (F should not be set) %08x", op); - } - - } - else - { - if ((creg == REG_ILINK1) || (creg == REG_ILINK2)) - { - // should only jumping to ILINK1/2 if .F is set - arcompact_fatal("illegal 1 unimplemented J (F not set) %08x", op); - } - else - { - return m_regs[creg]; - } - } - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p01(OPS_32) -{ - // opcode iiii i--- ppII IIII F--- uuuu uu-- ---- - // J u6 0010 0RRR 0110 0000 0RRR uuuu uuRR RRRR - int size = 4; - arcompact_log("2 unimplemented J %08x", op); - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p10(OPS_32) -{ - // opcode iiii i--- ppII IIII F--- ssss ssSS SSSS - // J s12 0010 0RRR 1010 0000 0RRR ssss ssSS SSSS - int size = 4; - arcompact_log("3 unimplemented J %08x", op); - return m_pc + (size>>0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) // Jcc (no link, no delay) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_creg - COMMON32_GET_CONDITION; - COMMON32_GET_F - - uint32_t c; - - if (creg == LIMM_REG) - { - // opcode iiii i--- ppII IIII F--- cccc ccmq qqqq - // Jcc limm 0010 0RRR 1110 0000 0RRR 1111 100Q QQQQ [LIUMM] - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - - c = limm; - - } - else - { - // opcode iiii i--- ppII IIII F--- cccc ccmq qqqq - // Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ - // no conditional links to ILINK1, ILINK2? - - c = m_regs[creg]; - } - - if (!check_condition(condition)) - return m_pc + (size>>0); - - if (!F) - { - // if F isn't set then the destination can't be ILINK1 or ILINK2 - - if ((creg == REG_ILINK1) || (creg == REG_ILINK2)) - { - arcompact_fatal ("fatal arcompact_handle04_20_p11_m0 J %08x (F not set but ILINK1 or ILINK2 used as dst)", op); - } - else - { - uint32_t realaddress = c; - return realaddress; - } - } - - if (F) - { - // if F is set then the destination MUST be ILINK1 or ILINK2 - - if ((creg == REG_ILINK1) || (creg == REG_ILINK2)) - { - arcompact_log("unimplemented arcompact_handle04_20_p11_m0 J %08x (F set)", op); - } - else - { - arcompact_fatal ("fatal arcompact_handle04_20_p11_m0 J %08x (F set but not ILINK1 or ILINK2 used as dst)", op); - - } - } - - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m1(OPS_32) -{ - // opcode iiii i--- ppII IIII F--- uuuu uumq qqqq - // Jcc u6 0010 0RRR 1110 0000 0RRR uuuu uu1Q QQQQ - int size = 4; - arcompact_log("unimplemented arcompact_handle04_20_p11_m1 J %08x (u6)", op); - return m_pc + (size>>0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p00(OPS_32) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_creg - COMMON32_GET_F - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - - handle_jump_to_addr(1,0,limm, m_pc + (size>>0)); - } - else - { - return handle_jump_to_register(1,0,creg, m_pc + (size>>0), F); // delay, no link - } - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p01(OPS_32) -{ - int size = 4; - arcompact_log("unimplemented J.D (u6 type) %08x", op); - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p10(OPS_32) -{ - int size = 4; - arcompact_log("unimplemented J.D (s12 type) %08x", op); - return m_pc + (size>>0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p11_m0(OPS_32) // Jcc.D (no link, delay) -{ - int size = 4; - [[maybe_unused]] uint32_t limm; - int got_limm = 0; - - COMMON32_GET_creg - COMMON32_GET_CONDITION; - COMMON32_GET_F - - //uint32_t c = 0; - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM_32; - size = 8; - } - - // c = limm; - - } - else - { - // opcode iiii i--- ppII IIII F--- cccc ccmq qqqq - // Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ - // no conditional links to ILINK1, ILINK2? - - // c = m_regs[creg]; - } - - if (!check_condition(condition)) - return m_pc + (size>>0); - - if (!F) - { - // if F isn't set then the destination can't be ILINK1 or ILINK2 - - if ((creg == REG_ILINK1) || (creg == REG_ILINK2)) - { - arcompact_log("unimplemented Jcc.D (p11_m0 type, illegal) %08x", op); - } - else - { - arcompact_log("unimplemented Jcc.D (p11_m0 type, unimplemented) %08x", op); - } - } - - if (F) - { - // if F is set then the destination MUST be ILINK1 or ILINK2 - - if ((creg == REG_ILINK1) || (creg == REG_ILINK2)) - { - arcompact_log("unimplemented Jcc.D.F (p11_m0 type, unimplemented) %08x", op); - } - else - { - arcompact_log("unimplemented Jcc.D.F (p11_m0 type, illegal) %08x", op); - } - } - - - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p11_m1(OPS_32) -{ - int size = 4; - arcompact_log("unimplemented arcompact_handle04_21_p11_m1 J.D %08x (u6)", op); - return m_pc + (size>>0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_22(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x22], /*"JL"*/ 1,1); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_23(OPS_32) -{ - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x23], /*"JL.D"*/ 1,1); -} - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop setup) -{ - int size = 4; -// COMMON32_GET_breg; // breg is reserved - COMMON32_GET_p; - - if (p == 0x00) - { - arcompact_fatal("> 0); - m_LP_END = PC_ALIGNED32 + (u * 2); - return m_pc + (size>>0); - } - - } - - return m_pc + (size>>0); - -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_29(OPS_32) -{ - // leapster bios uses formats for FLAG that are not defined, bug I guess work anyway (P modes 0 / 1) - return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x29], /*"FLAG"*/ 1,1); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_helper(OPS_32, const char* optext) -{ - int size; - - COMMON32_GET_p; - //COMMON32_GET_breg; - - if (p == 0) - { - COMMON32_GET_creg - - if (creg == LIMM_REG) - { - //uint32_t limm; - //GET_LIMM_32; - size = 8; - } - else - { - } - } - else if (p == 1) - { - } - else if (p == 2) - { - } - else if (p == 3) - { - } - - arcompact_log("unimplemented %s %08x (type 04_2f)", optext, op); - return m_pc + (size>>0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_00(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "ASL"); } // ASL -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_01(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "ASR"); } // ASR - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_04(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "RCC"); } // RCC -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_05(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "SEXB"); } // SEXB -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_06(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "SEXW"); } // SEXW - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_09(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "ABS"); } // ABS -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0a(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "NOT"); } // NOT -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0b(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "RCL"); } // RLC -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0c(OPS_32) { return arcompact_handle04_2f_helper(PARAMS, "EX"); } // EX - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_01(OPS_32) { arcompact_log("SLEEP (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_02(OPS_32) { arcompact_log("SWI / TRAP0 (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_03(OPS_32) { arcompact_log("SYNC (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_04(OPS_32) { arcompact_log("RTIE (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_05(OPS_32) { arcompact_log("BRK (%08x)", op); return m_pc + (4 >> 0);} - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3x_helper(OPS_32, int dsize, int extend) -{ - int size; - //uint32_t limm=0; - int got_limm = 0; - - - COMMON32_GET_breg; - COMMON32_GET_creg - - - - if (breg == LIMM_REG) - { - //GET_LIMM_32; - size = 8; - got_limm = 1; - - } - else - { - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - //GET_LIMM_32; - size = 8; - } - - } - else - { - } - - arcompact_log("unimplemented LD %08x (type 04_3x)", op); - return m_pc + (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_30(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,0,0); } -// ZZ value of 0x0 with X of 1 is illegal -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_31(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,0,1); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_32(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,1,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_33(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,1,1); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_34(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,2,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_35(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,2,1); } -// ZZ value of 0x3 is illegal -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_36(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,3,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_37(OPS_32) { return arcompact_handle04_3x_helper(PARAMS,3,1); } - - - - - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_02(OPS_32) { return arcompact_handle04_helper(PARAMS, "ASR", 0,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_03(OPS_32) { return arcompact_handle04_helper(PARAMS, "ROR", 0,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_04(OPS_32) { return arcompact_handle04_helper(PARAMS, "MUL64", 2,0); } // special -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_05(OPS_32) { return arcompact_handle04_helper(PARAMS, "MULU64", 2,0);} // special -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_06(OPS_32) { return arcompact_handle04_helper(PARAMS, "ADDS", 0,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_07(OPS_32) { return arcompact_handle04_helper(PARAMS, "SUBS", 0,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_08(OPS_32) { return arcompact_handle04_helper(PARAMS, "DIVAW", 0,0); } - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_0a(OPS_32) { return arcompact_handle04_helper(PARAMS, "ASLS", 0,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_0b(OPS_32) { return arcompact_handle04_helper(PARAMS, "ASRS", 0,0); } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_28(OPS_32) { return arcompact_handle04_helper(PARAMS, "ADDSDW", 0,0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_29(OPS_32) { return arcompact_handle04_helper(PARAMS, "SUBSDW", 0,0); } - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0x_helper(OPS_32, const char* optext) -{ - int size; - - COMMON32_GET_p; - //COMMON32_GET_breg; - - if (p == 0) - { - COMMON32_GET_creg - - if (creg == LIMM_REG) - { - //uint32_t limm; - //GET_LIMM_32; - size = 8; - - } - else - { - } - } - else if (p == 1) - { - } - else if (p == 2) - { - } - else if (p == 3) - { - } - - arcompact_log("unimplemented %s %08x", optext, op); - return m_pc + (size>>0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_00(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "SWAP"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_01(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "NORM"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_02(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "SAT16"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_03(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "RND16"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_04(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "ABSSW"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_05(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "ABSS"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_06(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "NEGSW"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_07(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "NEGS"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_08(OPS_32) { return arcompact_handle05_2f_0x_helper(PARAMS, "NORMW"); } - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle06(OPS_32) -{ - arcompact_log("op a,b,c (06 ARC ext) (%08x)", op ); - return m_pc + (4 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle07(OPS_32) -{ - arcompact_log("op a,b,c (07 User ext) (%08x)", op ); - return m_pc + (4 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle08(OPS_32) -{ - arcompact_log("op a,b,c (08 User ext) (%08x)", op ); - return m_pc + (4 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle09(OPS_32) -{ - arcompact_log("op a,b,c (09 Market ext) (%08x)", op ); - return m_pc + (4 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0a(OPS_32) -{ - arcompact_log("op a,b,c (0a Market ext) (%08x)", op ); - return m_pc + (4 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0b(OPS_32) -{ - arcompact_log("op a,b,c (0b Market ext) (%08x)", op ); - return m_pc + (4 >> 0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c_helper(OPS_16, const char* optext) -{ - arcompact_log("unimplemented %s %04x (0x0c group)", optext, op); - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c_00(OPS_16) -{ - return arcompact_handle0c_helper(PARAMS, "LD_S"); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c_01(OPS_16) -{ - return arcompact_handle0c_helper(PARAMS, "LDB_S"); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c_02(OPS_16) -{ - return arcompact_handle0c_helper(PARAMS, "LDW_S"); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c_03(OPS_16) // ADD_S a <- b + c -{ - int areg, breg, creg; - - COMMON16_GET_areg; - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(areg); - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - m_regs[areg] = m_regs[breg] + m_regs[creg]; - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d_helper(OPS_16, const char* optext) -{ - arcompact_log("unimplemented %s %04x (0x0d group)", optext, op); - return m_pc + (2 >> 0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d_03(OPS_16) -{ - return arcompact_handle0d_helper(PARAMS, "ASR_S"); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_0x_helper(OPS_16, const char* optext, int revop) -{ - int h;// , breg; - int size; - - GROUP_0e_GET_h; - - if (h == LIMM_REG) - { - //uint32_t limm; - //GET_LIMM; - size = 6; - } - else - { - } - - arcompact_log("unimplemented %s %04x (0x0e_0x group)", optext, op); - - return m_pc+ (size>>0); - -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_00(OPS_16) // ADD_s b, b, h -{ - int h,breg; - int size = 2; - - GROUP_0e_GET_h; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - if (h == LIMM_REG) - { - uint32_t limm; - GET_LIMM_16; - size = 6; - - m_regs[breg] = m_regs[breg] + limm; - - } - else - { - m_regs[breg] = m_regs[breg] + m_regs[h]; - } - - return m_pc+ (size>>0); -} - -// 16-bit MOV with extended register range -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_01(OPS_16) // MOV_S b <- h -{ - int h,breg; - int size = 2; - - GROUP_0e_GET_h; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - if (h == LIMM_REG) - { - // opcode iiii ibbb hhhI Ihhh - // MOV_S b, limm 0111 0bbb 1100 1111 [LIMM] (h == LIMM) - - uint32_t limm; - GET_LIMM_16; - size = 6; - - m_regs[breg] = limm; - - } - else - { - // opcode iiii ibbb hhhI Ihhh - // MOV_S b,h 0111 0bbb hhh0 1HHH - m_regs[breg] = m_regs[h]; - } - - return m_pc+ (size>>0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_02(OPS_16) -{ - return arcompact_handle0e_0x_helper(PARAMS, "CMP_S", 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_03(OPS_16) // MOV_S h <- b -{ - int h,breg; - int size = 2; - - GROUP_0e_GET_h; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - if (h == LIMM_REG) // no result.. - { - } - - m_regs[h] = m_regs[breg]; - - return m_pc+ (size>>0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_0x_helper(OPS_16, const char* optext) -{ - arcompact_log("unimplemented %s %04x", optext, op); - return m_pc + (2 >> 0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_00(OPS_16) { return arcompact_handle0f_00_0x_helper(PARAMS, "J_S"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_01(OPS_16) { return arcompact_handle0f_00_0x_helper(PARAMS, "J_S.D"); } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_02(OPS_16) // JL_S -{ - int breg; - - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - m_regs[REG_BLINK] = m_pc + (2 >> 0); - - return m_regs[breg]; -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_03(OPS_16) // JL_S.D -{ - int breg; - - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - m_delayactive = 1; - m_delayjump = m_regs[breg]; - m_delaylinks = 1; - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_06(OPS_16) { return arcompact_handle0f_00_0x_helper(PARAMS, "SUB_S.NE"); } - - - - -// Zero parameters (ZOP) -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_00(OPS_16) { /*arcompact_log("NOP_S");*/ return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_01(OPS_16) { arcompact_log("UNIMP_S"); return m_pc + (2 >> 0);} // Unimplemented Instruction, same as illegal, but recommended to fill blank space -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_04(OPS_16) { arcompact_log("JEQ_S [blink]"); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_05(OPS_16) { arcompact_log("JNE_S [blink]"); return m_pc + (2 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_06(OPS_16) // J_S [blink] -{ - return m_regs[REG_BLINK]; -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_07(OPS_16) // J_S.D [blink] -{ - m_delayactive = 1; - m_delayjump = m_regs[REG_BLINK]; - m_delaylinks = 0; - - return m_pc + (2 >> 0); -} - - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0x_helper(OPS_16, const char* optext, int nodst) -{ - arcompact_log("unimplemented %s %04x (0xf_0x group)", optext, op); - return m_pc + (2 >> 0); -} - - - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_06(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "BIC_S",0); } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0b(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "TST_S",1); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0c(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "MUL64_S",2); } // actual destination is special multiply registers -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0d(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "SEXB_S",0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0e(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "SEXW_S",0); } - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_11(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "ABS_S",0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_12(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "NOT_S",0); } - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_18(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "ASL_S",0); } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1a(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "ASR_S",0); } - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1c(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "ASR1_S",0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1d(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "LSR1_S",0); } - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1e(OPS_16) // special -{ - arcompact_log("unimplemented TRAP_S %04x", op); - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1f(OPS_16) // special -{ - arcompact_log("unimplemented BRK_S %04x", op); - return m_pc + (2 >> 0); -} +It is possible this is how the CPU works internally. +*/ -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle_ld_helper(OPS_16, const char* optext, int shift, int swap) -{ - arcompact_log("unimplemented %s %04x (ld/st group %d %d)", optext, op, shift, swap); - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle10(OPS_16) -{ // LD_S c, [b, u7] - int breg, creg, u; - - COMMON16_GET_breg; - COMMON16_GET_creg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - u <<= 2; // check - m_regs[creg] = READ32((m_regs[breg] + u) >> 2); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle11(OPS_16) -{ - // LDB_S c, [b, u5] - int breg, creg, u; - - COMMON16_GET_breg; - COMMON16_GET_creg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - -// u <<= 0; // check - m_regs[creg] = READ8((m_regs[breg] + u) >> 0); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle12(OPS_16) -{ - // LDB_W c, [b, u6] - int breg, creg, u; - - COMMON16_GET_breg; - COMMON16_GET_creg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - u <<= 1; - m_regs[creg] = READ16((m_regs[breg] + u) >> 1); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle13(OPS_16) -{ - return arcompact_handle_ld_helper(PARAMS, "LDW_S.X", 1, 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle14(OPS_16) // ST_S c, [b, u7] -{ - int breg, creg, u; - - COMMON16_GET_breg; - COMMON16_GET_creg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - u <<= 2; - - WRITE32((m_regs[breg] + u) >> 2, m_regs[creg]); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle15(OPS_16) // STB_S c. [b, u6] -{ - int breg, creg, u; - - COMMON16_GET_breg; - COMMON16_GET_creg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - -// u <<= 0; - - WRITE8((m_regs[breg] + u) >> 0, m_regs[creg]); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle16(OPS_16) // STW_S c. [b, u6] -{ - int breg, creg, u; - - COMMON16_GET_breg; - COMMON16_GET_creg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - u <<= 1; - - WRITE16((m_regs[breg] + u) >> 1, m_regs[creg]); - - return m_pc + (2 >> 0); - -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle_l7_0x_helper(OPS_16, const char* optext) -{ - arcompact_log("unimplemented %s %04x (l7_0x group)", optext, op); - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_05(OPS_16) -{ - return arcompact_handle_l7_0x_helper(PARAMS, "BCLR_S"); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_07(OPS_16) -{ - return arcompact_handle_l7_0x_helper(PARAMS, "BTST_S"); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_0x_helper(OPS_16, const char* optext, int st) -{ - arcompact_log("unimplemented %s %04x (0x18_0x group)", optext, op); - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_00(OPS_16) // LD_S b, [SP, u7] -{ - int breg; - uint32_t u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - uint32_t address = m_regs[REG_SP] + (u << 2); - - m_regs[breg] = READ32(address >> 2); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_01(OPS_16) -{ - return arcompact_handle18_0x_helper(PARAMS, "LDB_S (SP)", 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_02(OPS_16) // ST_S b, [SP, u7] -{ - int breg; - uint32_t u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - uint32_t address = m_regs[REG_SP] + (u << 2); - - WRITE32(address >> 2, m_regs[breg]); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_03(OPS_16) -{ - return arcompact_handle18_0x_helper(PARAMS, "STB_S (SP)", 1); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_04(OPS_16) // ADD_S b, SP, u7 -{ - int breg; - uint32_t u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - m_regs[breg] = m_regs[REG_SP] + (u << 2); - - return m_pc + (2 >> 0); -} - -// op bits remaining for 0x18_05_xx subgroups 0x001f -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_00(OPS_16) -{ - int u; - COMMON16_GET_u5; - - m_regs[REG_SP] = m_regs[REG_SP] + (u << 2); - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_01(OPS_16) -{ - int u; - COMMON16_GET_u5; - - m_regs[REG_SP] = m_regs[REG_SP] - (u << 2); - - return m_pc + (2 >> 0); -} - -// op bits remaining for 0x18_06_xx subgroups 0x0700 -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_01(OPS_16) // POP_S b -{ - int breg; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - m_regs[breg] = READ32(m_regs[REG_SP] >> 2); - m_regs[REG_SP] += 4; - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_11(OPS_16) // POP_S blink -{ - // breg bits are reserved - m_regs[REG_BLINK] = READ32(m_regs[REG_SP] >> 2 ); - m_regs[REG_SP] += 4; - - return m_pc + (2 >> 0); -} - -// op bits remaining for 0x18_07_xx subgroups 0x0700 -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_01(OPS_16) // PUSH_S b -{ - int breg; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - m_regs[REG_SP] -= 4; - - WRITE32(m_regs[REG_SP] >> 2, m_regs[breg]); - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_11(OPS_16) // PUSH_S [blink] -{ - // breg bits are reserved - - m_regs[REG_SP] -= 4; - - WRITE32(m_regs[REG_SP] >> 2, m_regs[REG_BLINK]); - - return m_pc + (2 >> 0); -} - +/* -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19_0x_helper(OPS_16, const char* optext, int shift, int format) -{ - arcompact_log("unimplemented %s %04x (0x19_0x group)", optext, op); - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19_00(OPS_16) { return arcompact_handle19_0x_helper(PARAMS, "LD_S", 2, 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19_01(OPS_16) { return arcompact_handle19_0x_helper(PARAMS, "LDB_S", 0, 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19_02(OPS_16) { return arcompact_handle19_0x_helper(PARAMS, "LDW_S", 1, 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19_03(OPS_16) { return arcompact_handle19_0x_helper(PARAMS, "ADD_S", 2, 1); } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1a(OPS_16) -{ - arcompact_log("unimplemented MOV_S x, [PCL, x] %04x", op); - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1b(OPS_16) // MOV_S b, u8 -{ - int breg; - uint32_t u; - COMMON16_GET_breg; - COMMON16_GET_u8; - REG_16BIT_RANGE(breg); +Vector | Offset | Default Source | Link Reg | Default Pri | Relative Priority +-------------------------------------------------------------------------------------------------------- + 0 | 0x00 | Reset (Special) | (none) | high (always) | H1 + 1 | 0x08 | Memory Error (Special) | ILINK2 (always) | high (always) | H2 + 2 | 0x10 | Instruction Error (Special) | ILINK2 (always) | high (always) | H3 +-------------------------------------------------------------------------------------------------------- + 3 | 0x18 | Timer 0 IRQ | ILINK1 | lv. 1 (low) | L27 + 4 | 0x20 | XY Memory IRQ | ILINK1 | lv. 1 (low) | L26 + 5 | 0x28 | UART IRQ | ILINK1 | lv. 1 (low) | L25 + 6 | 0x30 | EMAC IRQ | ILINK2 | lv. 2 (med) | M2 + 7 | 0x38 | Timer 1 IRQ | ILINK2 | lv. 2 (med) | M1 +-------------------------------------------------------------------------------------------------------- + 8 | 0x40 | IRQ8 | ILINK1 | lv. 1 (low) | L24 + 9 | 0x48 | IRQ9 | ILINK1 | lv. 1 (low) | L23 +.... + 14 | 0x70 | IRQ14 | ILINK1 | lv. 1 (low) | L18 + 15 | 0x78 | IRQ15 | ILINK1 | lv. 1 (low) | L17 +-------------------------------------------------------------------------------------------------------- + 16 | 0x80 | IRQ16 (extended) | ILINK1 | lv. 1 (low) | L16 + 17 | 0x87 | IRQ17 (extended) | ILINK1 | lv. 1 (low) | L15 +.... + 16 | 0xf0 | IRQ30 (extended) | ILINK1 | lv. 1 (low) | L2 + 17 | 0xf8 | IRQ31 (extended) | ILINK1 | lv. 1 (low) | L1 +-------------------------------------------------------------------------------------------------------- - m_regs[breg] = u; +*/ - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c_00(OPS_16) // ADD_S b, b, u7 -{ - int breg; - uint32_t u; - COMMON16_GET_breg; - COMMON16_GET_u7; - REG_16BIT_RANGE(breg); - - m_regs[breg] = m_regs[breg] + u; - - return m_pc + (2 >> 0); -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c_01(OPS_16) // CMP b, u7 +// currently causes the Leapster to put an unhandled interrupt exception string in RAM +// at 0x03000800 +void arcompact_device::check_interrupts() { - int breg; - uint32_t u; - COMMON16_GET_breg; - COMMON16_GET_u7; - REG_16BIT_RANGE(breg); - - // flag setting ALWAYS occurs on CMP operations, even 16-bit ones even without a .F opcode type + int vector = 8; - // TODO: verify this flag setting logic - - // unsigned checks - if (m_regs[breg] == u) - { - STATUS32_SET_Z; - } - else - { - STATUS32_CLEAR_Z; - } - - if (m_regs[breg] < u) - { - STATUS32_SET_C; - } - else + if (vector < 3) { - STATUS32_CLEAR_C; + fatalerror("check_interrupts called for vector < 3 (these are special exceptions)"); } - // signed checks - int32_t temp = (int32_t)m_regs[breg] - (int32_t)u; - if (temp < 0) + if (m_irq_pending) { - STATUS32_SET_N; - } - else - { - STATUS32_CLEAR_N; - } - - // if signs of source values don't match, and sign of result doesn't match the first source value, then we've overflowed? - if ((m_regs[breg] & 0x80000000) != (u & 0x80000000)) - { - if ((m_regs[breg] & 0x80000000) != (temp & 0x80000000)) - { - STATUS32_SET_V; - } - else + if (m_status32 & 0x00000002) // & 0x04 = level2, & 0x02 = level1 { - STATUS32_CLEAR_V; - } - } - - // only sets flags, no result written - - return m_pc + (2 >> 0); -} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d_00(OPS_16) // BREQ_S b,0,s8 -{ - int breg; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - if (!m_regs[breg]) - { - int s = (op & 0x007f) >> 0; op &= ~0x007f; - if (s & 0x40) s = -0x40 + (s & 0x3f); - uint32_t realaddress = PC_ALIGNED32 + (s * 2); - //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link - return realaddress; - } - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d_01(OPS_16) // BRNE_S b,0,s8 -{ - int breg; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); + int level = ((m_AUX_IRQ_LEV >> vector) & 1) + 1; - if (m_regs[breg]) - { - int s = (op & 0x007f) >> 0; op &= ~0x007f; - if (s & 0x40) s = -0x40 + (s & 0x3f); - uint32_t realaddress = PC_ALIGNED32 + (s * 2); - //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link - return realaddress; - } - - return m_pc + (2 >> 0); -} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_0x_helper(OPS_16, const char* optext) -{ - arcompact_log("unimplemented %s %04x (1e_0x type)", optext, op); - return m_pc + (2 >> 0); -} + logerror("HACK/TEST IRQ\n"); + if (level == 1) + { + m_regs[REG_ILINK1] = m_pc; + m_status32_l1 = m_status32; + m_AUX_IRQ_LV12 |= 0x00000001; + } + else if (level == 2) + { + m_regs[REG_ILINK2] = m_pc; + m_status32_l2 = m_status32; + m_AUX_IRQ_LV12 |= 0x00000002; + } + else + { + fatalerror("illegal IRQ level\n"); + } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_00(OPS_16) // B_S s10 (branch always) -{ - int s = (op & 0x01ff) >> 0; op &= ~0x01ff; - if (s & 0x100) s = -0x100 + (s & 0xff); - uint32_t realaddress = PC_ALIGNED32 + (s * 2); - //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link - return realaddress; -} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_01(OPS_16) // BEQ_S s10 (branch is zero bit is set) -{ - if (STATUS32_CHECK_Z) - { - int s = (op & 0x01ff) >> 0; op &= ~0x01ff; - if (s & 0x100) s = -0x100 + (s & 0xff); - uint32_t realaddress = PC_ALIGNED32 + (s * 2); - //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link - return realaddress; + set_pc(m_INTVECTORBASE + vector * 8); + m_irq_pending = 0; + debugreg_clear_ZZ(); + standard_irq_callback_member(*this, 0); + } } - - return m_pc + (2 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_02(OPS_16) // BNE_S s10 (branch if zero bit isn't set) +void arcompact_device::execute_run() { - if (!STATUS32_CHECK_Z) + while (m_icount > 0) { - int s = (op & 0x01ff) >> 0; op &= ~0x01ff; - if (s & 0x100) s = -0x100 + (s & 0xff); - uint32_t realaddress = PC_ALIGNED32 + (s * 2); - //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link - return realaddress; - } + debugger_instruction_hook(m_pc); - return m_pc + (2 >> 0); -} + if (!m_delayactive) + { + check_interrupts(); + } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_0x_helper(OPS_16, const char* optext) -{ - arcompact_log("unimplemented %s %04x", optext, op); - return m_pc + (2 >> 0); -} + // make sure CPU isn't in 'SLEEP' mode + if (!debugreg_check_ZZ()) + { + if (m_delayactive) + { + uint16_t op = READ16((m_pc + 0)); + set_pc(get_instruction(op)); + if (m_delaylinks) m_regs[REG_BLINK] = m_pc; -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_00(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BGT_S"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_01(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BGE_S"); } + set_pc(m_delayjump); -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_02(OPS_16) // BLT_S -{ - if (CONDITION_LT) - { - int s = (op & 0x003f) >> 0; op &= ~0x003f; - if (s & 0x020) s = -0x20 + (s & 0x1f); - uint32_t realaddress = PC_ALIGNED32 + (s * 2); - //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link - return realaddress; - } + m_delayactive = false; + m_delaylinks = false; + } + else + { + uint16_t op = READ16((m_pc + 0)); + set_pc(get_instruction(op)); + } - return m_pc + (2 >> 0); -} + // hardware loops -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_03(OPS_16) // BLE_S -{ - if (CONDITION_LE) - { - int s = (op & 0x003f) >> 0; op &= ~0x003f; - if (s & 0x020) s = -0x20 + (s & 0x1f); - uint32_t realaddress = PC_ALIGNED32 + (s * 2); - //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link - return realaddress; + // NOTE: if LPcc condition code fails, the m_PC returned will be m_LP_END + // which will then cause this check to happen and potentially jump back to + // the start of the loop if LP_COUNT is anything other than 1, this should + // not happen. It could be our PC handling needs to be better? Either way + // guard against it! + if (m_allow_loop_check) + { + if (m_pc == m_LP_END) + { + // NOTE: this behavior should differ between ARC models + if ((m_regs[REG_LP_COUNT] != 1)) + { + set_pc(m_LP_START); + } + m_regs[REG_LP_COUNT]--; + } + } + else + { + m_allow_loop_check = true; + } + } + m_icount--; } - - return m_pc + (2 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_04(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BHI_S"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_05(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BHS_S"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_06(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BLO_S"); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_07(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BLS_S"); } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1f(OPS_16) // BL_S s13 -{ - int s = (op & 0x07ff) >> 0; op &= ~0x07ff; - if (s & 0x400) s = -0x400 + (s & 0x3ff); - - uint32_t realaddress = PC_ALIGNED32 + (s * 4); - - m_regs[REG_BLINK] = m_pc + (2 >> 0); - return realaddress; -} /************************************************************************************************************************************ * * -* illegal opcode handlers (disassembly) * +* illegal opcode handlers * * * ************************************************************************************************************************************/ -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_06(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_07(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_08(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_09(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_0a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_0b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_0c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_0d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_06(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_07(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_08(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_09(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_0a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_0b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_0c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_0d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0); } - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_24(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_25(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_26(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_27(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_10(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_11(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_12(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_13(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_14(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_15(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_16(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_17(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_18(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_19(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_1a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_1b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_1c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_1d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_1e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_1f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_20(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_21(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_22(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_23(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_24(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_25(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_26(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_27(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_28(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_29(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_2a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_2b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_2c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_2d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_2e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_2f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_30(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_31(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_32(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_33(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_34(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_35(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_36(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_37(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_38(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_39(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_09(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_10(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_11(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_12(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_13(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_14(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_15(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_16(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_17(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_18(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_19(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_1a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_1b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_1c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_1d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_1e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_1f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_20(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_21(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_22(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_23(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_24(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_25(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_26(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_27(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_28(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_29(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_2a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_2b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_2c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_2d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_2e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_2f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_30(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_31(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_32(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_33(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_34(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_35(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_36(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_37(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_38(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_39(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_00(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_06(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_07(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_08(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_09(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_0a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_0b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_0c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_0d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_0e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_0f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_10(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_11(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_12(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_13(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_14(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_15(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_16(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_17(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_18(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_19(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_1a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_1b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_1c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_1d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_1e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_1f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_20(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_21(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_22(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_23(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_24(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_25(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_26(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_27(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_28(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_29(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_2a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_2b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_2c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_2d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_2e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_2f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_30(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_31(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_32(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_33(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_34(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_35(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_36(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_37(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_38(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_39(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_3a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_3b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_3c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_3d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_3e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_3f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_00(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_01(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_02(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_03(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_04(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_05(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_06(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_07(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_08(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_09(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_0a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_0b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_0c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_0d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_0e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_0f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_10(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_11(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_12(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_13(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_14(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_15(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_16(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_17(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_18(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_19(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_1a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_1b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_1c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_1d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_1e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_1f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_20(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_21(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_22(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_23(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_24(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_25(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_26(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_27(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_28(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_29(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_2a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_2b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_2c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_2d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_2e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_2f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_30(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_31(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_32(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_33(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_34(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_35(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_36(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_37(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_38(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_39(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_3a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_3b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_3c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_3d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_3e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f_3f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - - - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_38(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_39(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_09(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_0c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_0d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_0e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_0f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_10(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_11(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_12(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_13(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_14(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_15(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_16(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_17(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_18(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_19(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_1a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_1b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_1c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_1d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_1e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_1f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_20(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_21(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_22(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_23(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_24(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_25(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_26(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_27(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_30(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_31(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_32(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_33(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_34(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_35(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_36(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_37(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_38(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_39(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_3a(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_3b(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_3c(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_3d(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_3e(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_3f(OPS_32) { arcompact_fatal(" (%08x)", op); return m_pc + (4 >> 0);} - -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_04(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_05(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_02(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_03(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_01(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_03(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_08(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_09(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0a(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_17(OPS_16) { arcompact_fatal(" (%08x)", op); return m_pc + (2 >> 0);} +uint32_t arcompact_device::arcompact_handle_reserved(uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op) { logerror(" (%08x)\n", param1, param2, param3, param4, op); fatalerror(""); return m_pc + 4; } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_02(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_03(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_04(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_05(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_06(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_07(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_00(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_02(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_03(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_04(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_05(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_06(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_07(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_08(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_09(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_0a(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_0b(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_0c(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_0d(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_0e(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_0f(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_10(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_12(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_13(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_14(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_15(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_16(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_17(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_18(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_19(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_1a(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_1b(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_1c(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_1d(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_1e(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_1f(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_00(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_02(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_03(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_04(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_05(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_06(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_07(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_08(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_09(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_0a(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_0b(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_0c(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_0d(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_0e(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_0f(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_10(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_12(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_13(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_14(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_15(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_16(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_17(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_18(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_19(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1a(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1b(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1c(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1d(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1e(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1f(OPS_16) { arcompact_fatal(" (%04x)", op); return m_pc + (2 >> 0);} +uint32_t arcompact_device::arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint16_t op) { logerror(" (%04x)\n", param1, param2, op); fatalerror(""); return m_pc + 2; } +uint32_t arcompact_device::arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint16_t op) { logerror(" (%04x)\n", param1, param2, param3, op); fatalerror(""); return m_pc + 2; } +uint32_t arcompact_device::arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint16_t op) { logerror(" (%04x)\n", param1, param2, param3, param4, op); fatalerror(""); return m_pc + 2; } +uint32_t arcompact_device::arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint32_t op) { logerror(" (%08x)\n", param1, param2, op); fatalerror(""); return m_pc + 4; } +uint32_t arcompact_device::arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint32_t op) { logerror(" (%08x)\n", param1, param2, param3, op); fatalerror(""); return m_pc + 4; } +uint32_t arcompact_device::arcompact_handle_illegal(uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op) { logerror(" (%08x)\n", param1, param2, param3, param4, op); fatalerror(""); return m_pc + 4; } diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_00to01.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_00to01.cpp new file mode 100644 index 00000000000..0732bda7fa7 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_00to01.cpp @@ -0,0 +1,200 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// helpers for below this group of opcodes + +inline uint32_t arcompact_device::get_01_01_01_address_offset(uint32_t op) +{ + uint32_t address = (op & 0x00fe0000) >> 17; + address |= ((op & 0x00008000) >> 15) << 7; + address = util::sext(address, 8); + return address; +} + +inline uint32_t arcompact_device::BRxx_takejump(uint32_t address, uint8_t n, int size, bool link) +{ + uint32_t realaddress = (m_pc & 0xfffffffc) + (address * 2); + if (n) + { + m_delayactive = true; + m_delayjump = realaddress; + m_delaylinks = link; + return m_pc + size; // jump is delayed, so return next instruction + } + else + { + if (link) + m_regs[REG_BLINK] = m_pc + size; + return realaddress; + } +} + +inline bool arcompact_device::BRxx_condition(uint8_t condition, uint32_t b, uint32_t c) +{ + switch (condition) + { + case 0x00: return (b == c) ? true : false; // BREQ + case 0x01: return (b != c) ? true : false; // BRNE + case 0x02: return ((int32_t)b < (int32_t)c) ? true : false; // BRLT + case 0x03: return ((int32_t)b >= (int32_t)c) ? true : false; // BRGE + case 0x04: return (b < c) ? true : false; // BRLO + case 0x05: return (b >= c) ? true : false; // BRHS + case 0x06: return (!(b & (1 << (c & 0x1f)))) ? true : false; // BBIT0 + case 0x07: return (b & (1 << (c & 0x1f))) ? true : false; // BBIT1 + } + return false; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BREQ<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0000 +// BREQ b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0000 (+ Limm) +// BREQ limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRNE<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0001 +// BRNE b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0001 (+ Limm) +// BRNE limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLT<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0010 +// BRLT b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0010 (+ Limm) +// BRLT limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRGE<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0011 +// BRGE b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0011 (+ Limm) +// BRGE limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLO<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0100 +// BRLO b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0100 (+ Limm) +// BRLO limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRHS b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0101 (+ Limm) +// BRHS limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0101 (+ Limm) +// BRHS<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0101 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT0<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 1110 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT1<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +// Branch on Compare / Bit Test - Register-Register +uint32_t arcompact_device::handleop32_BRxx_reg_reg(uint32_t op, uint8_t condition) +{ + uint8_t creg = common32_get_creg(op); + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg, creg); + uint32_t b = m_regs[breg]; + uint32_t c = m_regs[creg]; + if (BRxx_condition(condition, b, c)) + { + uint32_t address = get_01_01_01_address_offset(op); + return BRxx_takejump(address, (op & 0x00000020) >> 5, size, false); + } + return m_pc + size; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BREQ<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0000 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRNE<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0001 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLT<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0010 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRGE<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0011 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLO<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0100 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRHS<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0101 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT0<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB uuuu uuN1 1110 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT1<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB uuuu uuN1 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +// Branch on Compare / Bit Test - Register-Immediate +uint32_t arcompact_device::handleop32_BRxx_reg_imm(uint32_t op, uint8_t condition) +{ + uint32_t u = common32_get_u6(op); + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + uint32_t b = m_regs[breg]; + if (BRxx_condition(condition, b, u)) + { + uint32_t address = get_01_01_01_address_offset(op); + return BRxx_takejump(address, (op & 0x00000020) >> 5, size, false); + } + return m_pc + size; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Branch Conditionally +// B<.d> s21 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_B_cc_D_s21(uint32_t op) +{ + if (!check_condition(common32_get_condition(op))) + return m_pc + 4; + uint32_t address = (op & 0x07fe0000) >> 17; + address |= ((op & 0x0000ffc0) >> 6) << 10; + address = util::sext(address, 20); + return BRxx_takejump(address, (op & 0x00000020) >> 5, 4, false); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Branch Unconditionally Far +// B<.d> s25 0000 0sss ssss sss1 SSSS SSSS SSNR tttt +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_B_D_s25(uint32_t op) +{ + uint32_t address = (op & 0x07fe0000) >> 17; + address |= ((op & 0x0000ffc0) >> 6) << 10; + address |= (op & 0x0000000f) << 20; + address = util::sext(address, 24); + return BRxx_takejump(address, (op & 0x00000020) >> 5, 4, false); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Branch and Link Conditionally +// BL<.cc><.d> s21 0000 1sss ssss ss00 SSSS SSSS SSNQ QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BL_cc_d_s21(uint32_t op) +{ + if (!check_condition(common32_get_condition(op))) + return m_pc + 4; + uint32_t address = (op & 0x07fc0000) >> 17; // bit 0 is always 0 + address |= ((op & 0x0000ffc0) >> 6) << 10; + address = util::sext(address, 20); + return BRxx_takejump(address, (op & 0x00000020) >> 5, 4, true); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Branch and Link Unconditionally Far +// BL<.d> s25 0000 1sss ssss ss10 SSSS SSSS SSNR tttt +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BL_d_s25(uint32_t op) +{ + uint32_t address = (op & 0x07fc0000) >> 17; // bit 0 is always 0 + address |= ((op & 0x0000ffc0) >> 6) << 10; + address |= (op & 0x0000000f) << 20; + address = util::sext(address, 24); + return BRxx_takejump(address, (op & 0x00000020) >> 5, 4, true); +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_02to03.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_02to03.cpp new file mode 100644 index 00000000000..5b0d8b7a219 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_02to03.cpp @@ -0,0 +1,123 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I +// LD<.x><.aa><.di> a,[b,s9] 0001 0bbb ssss ssss SBBB DaaZ ZXAA AAAA +// LD<.x><.di> a,[limm] 0001 0110 0000 0000 0111 DRRZ ZXAA AAAA (+ Limm) +// LD<.x><.aa><.di> 0,[b,s9] 0001 0bbb ssss ssss SBBB DaaZ ZX11 1110 +// LD<.x><.di> 0,[limm] 0001 0110 0000 0000 0111 DRRZ ZX11 1110 (+ Limm) +// +// PREFETCH<.aa> [b,s9] 0001 0bbb ssss ssss SBBB 0aa0 0011 1110 +// PREFETCH [limm] 0001 0110 0000 0000 0111 0RR0 0011 1110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_LD_r_o(uint32_t op) +{ + uint32_t s = (op & 0x00ff0000) >> 16; + s |= (op & 0x00008000) >> 7; + s = util::sext(s, 9); + + uint8_t breg = common32_get_breg(op); + uint8_t areg = common32_get_areg(op); + + int X = (op & 0x00000040) >> 6; //op &= ~0x00000040; + int Z = (op & 0x00000180) >> 7; //op &= ~0x00000180; + int a = (op & 0x00000600) >> 9; //op &= ~0x00000600; +// int D = (op & 0x00000800) >> 11;// op &= ~0x00000800; // we don't use the data cache currently + + int size = check_limm(breg); + + arcompact_handle_ld_helper(op, areg, breg, s, X, Z, a); + + return m_pc + size; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I +// ST<.aa><.di> c,[b,s9] 0001 1bbb ssss ssss SBBB CCCC CCDa aZZR +// ST<.di> c,[limm] 0001 1110 0000 0000 0111 CCCC CCDR RZZR (+ Limm) +// ST<.aa><.di> limm,[b,s9] 0001 1bbb ssss ssss SBBB 1111 10Da aZZR (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +// can be used as a PUSH when breg is stack register (28), s is -4 (0x1fc) Z is 0, D is 0, and a is 1 +uint32_t arcompact_device::handleop32_ST_r_o(uint32_t op) +{ + uint32_t s = (op & 0x00ff0000) >> 16; + s |= (op & 0x00008000) >> 7; + s = util::sext(s, 9); + + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + + // int R = (op & 0x00000001) >> 0; // bit 0 is reserved + int Z = (op & 0x00000006) >> 1; + int a = (op & 0x00000018) >> 3; + // int D = (op & 0x00000020) >> 5; // we don't use the data cache currently + + int size = check_limm(breg, creg); + + // writeback / increment + if (a == 1) + { + if (breg == REG_LIMM) + fatalerror("illegal ST %08x (data size %d mode %d)", op, Z, a); // using the LIMM as the base register and an increment mode is illegal + + m_regs[breg] = m_regs[breg] + s; + } + + uint32_t address = m_regs[breg]; + uint32_t writedata = m_regs[creg]; + + // are LIMM addresses with 's' offset non-0 ('a' mode 0 / 3) legal? + // not mentioned in docs.. + + + // address manipulation + if (a == 0) + { + address = address + s; + } + else if (a == 3) + { + if (Z == 0) + address = address + (s << 2); + else if (Z == 2) + address = address + (s << 1); + else // Z == 1 and Z == 3 are invalid here + fatalerror("illegal ST %08x (data size %d mode %d)", op, Z, a); + } + + // write data + if (Z == 0) + { + WRITE32(address, writedata); + } + else if (Z == 1) + { + WRITE8(address, writedata); + } + else if (Z == 2) + { + WRITE16(address, writedata); + } + else if (Z == 3) + { // Z == 3 is always illegal + fatalerror("illegal ST %08x (data size %d mode %d)", op, Z, a); + } + + // writeback / increment + if (a == 2) + { + if (breg == REG_LIMM) + fatalerror("illegal ST %08x (data size %d mode %d)", op, Z, a); // using the LIMM as the base register and an increment mode is illegal + + m_regs[breg] = m_regs[breg] + s; + } + + return m_pc + size; + +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_04.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_04.cpp new file mode 100644 index 00000000000..017a5911841 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_04.cpp @@ -0,0 +1,888 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADD<.f> a,b,c 0010 0bbb 0000 0000 FBBB CCCC CCAA AAAA +// ADD<.f> a,limm,c 0010 0110 0000 0000 F111 CCCC CCAA AAAA (+ Limm) +// ADD<.f> a,b,limm 0010 0bbb 0000 0000 FBBB 1111 10AA AAAA (+ Limm) +// ADD<.f> 0,b,c 0010 0bbb 0000 0000 FBBB CCCC CC11 1110 +// ADD<.f> 0,b,limm 0010 0bbb 0000 0000 FBBB 1111 1011 1110 (+ Limm) +// +// ADD<.f> a,b,u6 0010 0bbb 0100 0000 FBBB uuuu uuAA AAAA +// ADD<.f> 0,b,u6 0010 0bbb 0100 0000 FBBB uuuu uu11 1110 +// +// ADD<.f> b,b,s12 0010 0bbb 1000 0000 FBBB ssss ssSS SSSS +// +// ADD<.cc><.f> b,b,c 0010 0bbb 1100 0000 FBBB CCCC CC0Q QQQQ +// ADD<.cc><.f> b,b,limm 0010 0bbb 1100 0000 FBBB 1111 100Q QQQQ (+ Limm) +// ADD<.cc><.f> 0,limm,c 0010 0110 1100 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +// ADD<.cc><.f> b,b,u6 0010 0bbb 1100 0000 FBBB uuuu uu1Q QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ADD_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 + src2; + if (set_flags) + o.do_flags_add(result, src1, src2); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADC<.f> a,b,c 0010 0bbb 0000 0001 FBBB CCCC CCAA AAAA +// ADC<.f> 0,b,c 0010 0bbb 0000 0001 FBBB CCCC CC11 1110 +// ADC<.f> a,limm,c 0010 0110 0000 0001 F111 CCCC CCAA AAAA (+ Limm) +// ADC<.f> a,b,limm 0010 0bbb 0000 0001 FBBB 1111 10AA AAAA (+ Limm) +// ADC<.f> 0,b,limm 0010 0bbb 0000 0001 FBBB 1111 1011 1110 (+ Limm) + +// ADC<.f> a,b,u6 0010 0bbb 0100 0001 FBBB uuuu uuAA AAAA +// ADC<.f> 0,b,u6 0010 0bbb 0100 0001 FBBB uuuu uu11 1110 + +// ADC<.f> b,b,s12 0010 0bbb 1000 0001 FBBB ssss ssSS SSSS +// +// ADC<.cc><.f> b,b,c 0010 0bbb 1100 0001 FBBB CCCC CC0Q QQQQ +// ADC<.cc><.f> b,b,limm 0010 0bbb 1100 0001 FBBB 1111 100Q QQQQ (+ Limm) +// ADC<.cc><.f> 0,limm,c 0010 0110 1100 0001 F111 CCCC CC0Q QQQQ (+ Limm) +// +// ADC<.cc><.f> b,b,u6 0010 0bbb 1100 0001 FBBB uuuu uu1Q QQQQ +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ADC_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint8_t c = o.status32_check_c() ? 1 : 0; + uint32_t result = src1 + (src2 + c); + if (set_flags) // TODO: verify + o.do_flags_add(result, src1, (src2 + c)); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SUB<.f> a,b,c 0010 0bbb 0000 0010 FBBB CCCC CCAA AAAA +// SUB<.f> a,b,u6 0010 0bbb 0100 0010 FBBB uuuu uuAA AAAA +// SUB<.f> b,b,s12 0010 0bbb 1000 0010 FBBB ssss ssSS SSSS +// SUB<.cc><.f> b,b, c 0010 0bbb 1100 0010 FBBB CCCC CC0Q QQQQ +// SUB<.cc><.f> b,b,u6 0010 0bbb 1100 0010 FBBB uuuu uu1Q QQQQ +// SUB<.f> a,limm,c 0010 0110 0000 0010 F111 CCCC CCAA AAAA (+ Limm) +// SUB<.f> a,b,limm 0010 0bbb 0000 0010 FBBB 1111 10AA AAAA (+ Limm) +// SUB<.cc><.f> b,b,limm 0010 0bbb 1100 0010 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB <.f> 0,b,c 0010 0bbb 0000 0010 FBBB CCCC CC11 1110 +// SUB <.f> 0,b,u6 0010 0bbb 0100 0010 FBBB uuuu uu11 1110 +// SUB <.f> 0,b,limm 0010 0bbb 0000 0010 FBBB 1111 1011 1110 (+ Limm) +// SUB <.cc><.f> 0,limm,c 0010 0110 1100 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SUB_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 - src2; + if (set_flags) + o.do_flags_sub(result, src1, src2); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SBC<.f> a,b,c 0010 0bbb 0000 0011 FBBB CCCC CCAA AAAA +// SBC<.f> a,b,u6 0010 0bbb 0100 0011 FBBB uuuu uuAA AAAA +// SBC<.f> b,b,s12 0010 0bbb 1000 0011 FBBB ssss ssSS SSSS +// SBC<.cc><.f> b,b,c 0010 0bbb 1100 0011 FBBB CCCC CC0Q QQQQ +// SBC<.cc><.f> b,b,u6 0010 0bbb 1100 0011 FBBB uuuu uu1Q QQQQ +// SBC<.f> a,limm,c 0010 0110 0000 0011 F111 CCCC CCAA AAAA (+ Limm) +// SBC<.f> a,b,limm 0010 0bbb 0000 0011 FBBB 1111 10AA AAAA (+ Limm) +// SBC<.cc><.f> b,b,limm 0010 0bbb 1100 0011 FBBB 1111 100Q QQQQ (+ Limm) +// +// SBC<.f> 0,b,c 0010 0bbb 0000 0011 FBBB CCCC CC11 1110 +// SBC<.f> 0,b,u6 0010 0bbb 0100 0011 FBBB uuuu uu11 1110 +// SBC<.f> 0,b,limm 0010 0bbb 0000 0011 FBBB 1111 1011 1110 (+ Limm) +// SBC<.cc><.f> 0,limm,c 0010 0110 1100 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SBC_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint8_t c = o.status32_check_c() ? 1 : 0; + uint32_t result = src1 - (src2 + c); + if (set_flags) // TODO: verify + o.do_flags_sub(result, src1, (src2 + c)); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// AND<.f> a,b,c 0010 0bbb 0000 0100 FBBB CCCC CCAA AAAA +// AND<.f> a,b,u6 0010 0bbb 0100 0100 FBBB uuuu uuAA AAAA +// AND<.f> b,b,s12 0010 0bbb 1000 0100 FBBB ssss ssSS SSSS +// AND<.cc><.f> b,b,c 0010 0bbb 1100 0100 FBBB CCCC CC0Q QQQQ +// AND<.cc><.f> b,b,u6 0010 0bbb 1100 0100 FBBB uuuu uu1Q QQQQ +// AND<.f> a,limm,c 0010 0110 0000 0100 F111 CCCC CCAA AAAA (+ Limm) +// AND<.f> a,b,limm 0010 0bbb 0000 0100 FBBB 1111 10AA AAAA (+ Limm) +// AND<.cc><.f> b,b,limm 0010 0bbb 1100 0100 FBBB 1111 100Q QQQQ (+ Limm) +// +// AND<.f> 0,b,c 0010 0bbb 0000 0100 FBBB CCCC CC11 1110 +// AND<.f> 0,b,u6 0010 0bbb 0100 0100 FBBB uuuu uu11 1110 +// AND<.f> 0,b,limm 0010 0bbb 0000 0100 FBBB 1111 1011 1110 (+ Limm) +// AND<.cc><.f> 0,limm,c 0010 0110 1100 0100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_AND_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 & src2; + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// OR<.f> a,b,c 0010 0bbb 0000 0101 FBBB CCCC CCAA AAAA +// OR<.f> a,b,u6 0010 0bbb 0100 0101 FBBB uuuu uuAA AAAA +// OR<.f> b,b,s12 0010 0bbb 1000 0101 FBBB ssss ssSS SSSS +// OR<.cc><.f> b,b,c 0010 0bbb 1100 0101 FBBB CCCC CC0Q QQQQ +// OR<.cc><.f> b,b,u6 0010 0bbb 1100 0101 FBBB uuuu uu1Q QQQQ +// OR<.f> a,limm,c 0010 0110 0000 0101 F111 CCCC CCAA AAAA (+ Limm) +// OR<.f> a,b,limm 0010 0bbb 0000 0101 FBBB 1111 10AA AAAA (+ Limm) +// OR<.cc><.f> b,b,limm 0010 0bbb 1100 0101 FBBB 1111 100Q QQQQ (+ Limm) +// +// OR<.f> 0,b,c 0010 0bbb 0000 0101 FBBB CCCC CC11 1110 +// OR<.f> 0,b,u6 0010 0bbb 0100 0101 FBBB uuuu uu11 1110 +// OR<.f> 0,b,limm 0010 0bbb 0000 0101 FBBB 1111 1011 1110 (+ Limm) +// OR<.cc><.f> 0,limm,c 0010 0110 1100 010 1 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_OR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 | src2; + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Bitwise AND Operation with Inverted Source +// IIII I SS SSSS +// BIC<.f> a,b,c 0010 0bbb 0000 0110 FBBB CCCC CCAA AAAA +// BIC<.f> a,b,u6 0010 0bbb 0100 0110 FBBB uuuu uuAA AAAA +// BIC<.f> b,b,s12 0010 0bbb 1000 0110 FBBB ssss ssSS SSSS +// BIC<.cc><.f> b,b,c 0010 0bbb 1100 0110 FBBB CCCC CC0Q QQQQ +// BIC<.cc><.f> b,b,u6 0010 0bbb 1100 0110 FBBB uuuu uu1Q QQQQ +// BIC<.f> a,limm,c 0010 0110 0000 0110 F111 CCCC CCAA AAAA (+ Limm) +// BIC<.f> a,b,limm 0010 0bbb 0000 0110 FBBB 1111 10AA AAAA (+ Limm) +// BIC<.cc><.f> b,b,limm 0010 0bbb 1100 0110 FBBB 1111 100Q QQQQ (+ Limm) +// +// BIC<.f> 0,b,c 0010 0bbb 0000 0110 FBBB CCCC CC11 1110 +// BIC<.f> 0,b,u6 0010 0bbb 0100 0110 FBBB uuuu uu11 1110 +// BIC<.f> 0,b,limm 0010 0bbb 0000 0110 FBBB 1111 1011 1110 (+ Limm) +// BIC<.cc><.f> 0,limm,c 0010 0110 1100 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BIC_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 & (~src2); + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// XOR<.f> a,b,c 0010 0bbb 0000 0111 FBBB CCCC CCAA AAAA +// XOR<.f> a,b,u6 0010 0bbb 0100 0111 FBBB uuuu uuAA AAAA +// XOR<.f> b,b,s12 0010 0bbb 1000 0111 FBBB ssss ssSS SSSS +// XOR<.cc><.f> b,b,c 0010 0bbb 1100 0111 FBBB CCCC CC0Q QQQQ +// XOR<.cc><.f> b,b,u6 0010 0bbb 1100 0111 FBBB uuuu uu1Q QQQQ +// XOR<.f> a,limm,c 0010 0110 0000 0111 F111 CCCC CCAA AAAA (+ Limm) +// XOR<.f> a,b,limm 0010 0bbb 0000 0111 FBBB 1111 10AA AAAA (+ Limm) +// XOR<.cc><.f> b,b,limm 0010 0bbb 1100 0111 FBBB 1111 100Q QQQQ (+ Limm) +// +// XOR<.f> 0,b,c 0010 0bbb 0000 0111 FBBB CCCC CC11 1110 +// XOR<.f> 0,b,u6 0010 0bbb 0100 0111 FBBB uuuu uu11 1110 +// XOR<.f> 0,b,limm 0010 0bbb 0000 0111 FBBB 1111 1011 1110 (+ Limm) +// XOR<.cc><.f> 0,limm,c 0010 0110 1100 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_XOR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 ^ src2; + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MAX<.f> a,b,c 0010 0bbb 0000 1000 FBBB CCCC CCAA AAAA +// MAX<.f> a,b,u6 0010 0bbb 0100 1000 FBBB uuuu uuAA AAAA +// MAX<.f> b,b,s12 0010 0bbb 1000 1000 FBBB ssss ssSS SSSS +// MAX<.cc><.f> b,b,c 0010 0bbb 1100 1000 FBBB CCCC CC0Q QQQQ +// MAX<.cc><.f> b,b,u6 0010 0bbb 1100 1000 FBBB uuuu uu1Q QQQQ +// MAX<.f> a,limm,c 0010 0110 0000 1000 F111 CCCC CCAA AAAA (+ Limm) +// MAX<.f> a,b,limm 0010 0bbb 0000 1000 FBBB 1111 10AA AAAA (+ Limm) +// MAX<.cc><.f> b,b,limm 0010 0bbb 1100 1000 FBBB 1111 100Q QQQQ (+ Limm) +// +// MAX<.f> 0,b,c 0010 0bbb 0000 1000 FBBB CCCC CC11 1110 +// MAX<.f> 0,b,u6 0010 0bbb 0100 1000 FBBB uuuu uu11 1110 +// MAX<.f> 0,b,limm 0010 0bbb 0000 1000 FBBB 1111 1011 1110 (+ Limm) +// MAX<.cc><.f> 0,limm,c 0010 0110 1100 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_MAX_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t alu = src1 - src2; + uint32_t result; + + if ((int32_t)src2 >= (int32_t)src1) + result = src2; + else + result = src1; + + if (set_flags) // TODO: verify + { + o.do_flags_nz(alu); + o.do_flags_overflow(alu, src1, src2); + if ((int32_t)src2 >= (int32_t)src1) + o.status32_set_c(); + else + o.status32_clear_c(); + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MIN<.f> a,b,c 0010 0bbb 0000 1001 FBBB CCCC CCAA AAAA +// MIN<.f> a,b,u6 0010 0bbb 0100 1001 FBBB uuuu uuAA AAAA +// MIN<.f> b,b,s12 0010 0bbb 1000 1001 FBBB ssss ssSS SSSS +// MIN<.cc><.f> b,b,c 0010 0bbb 1100 1001 FBBB CCCC CC0Q QQQQ +// MIN<.cc><.f> b,b,u6 0010 0bbb 1100 1001 FBBB uuuu uu1Q QQQQ +// MIN<.f> a,limm,c 0010 0110 0000 1001 F111 CCCC CCAA AAAA (+ Limm) +// MIN<.f> a,b,limm 0010 0bbb 0000 1001 FBBB 1111 10AA AAAA (+ Limm) +// MIN<.cc><.f> b,b,limm 0010 0bbb 1100 1001 FBBB 1111 100Q QQQQ (+ Limm) +// +// MIN<.f> 0,b,c 0010 0bbb 0000 1001 FBBB CCCC CC11 1110 +// MIN<.f> 0,b,u6 0010 0bbb 0100 1001 FBBB uuuu uu11 1110 +// MIN<.f> 0,b,limm 0010 0bbb 0000 1001 FBBB 1111 1011 1110 (+ Limm) +// MIN<.cc><.f> 0,limm,c 0010 0110 1100 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_MIN_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t alu = src1 - src2; + uint32_t result; + + if ((int32_t)src2 <= (int32_t)src1) + result = src2; + else + result = src1; + + if (set_flags) // TODO: verify + { + o.do_flags_nz(alu); + o.do_flags_overflow(alu, src1, src2); + if ((int32_t)src2 <= (int32_t)src1) + o.status32_set_c(); + else + o.status32_clear_c(); + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unusual format, a is not used, dest is always b +// +// IIII I SS SSSS +// MOV<.f> b,s12 0010 0bbb 1000 1010 FBBB ssss ssSS SSSS +// MOV<.f> 0,s12 0010 0110 1000 1010 F111 ssss ssSS SSSS (is b is 'Limm' there's no destination) + +// MOV<.cc><.f> b,c 0010 0bbb 1100 1010 FBBB CCCC CC0Q QQQQ +// MOV<.cc><.f> b,u6 0010 0bbb 1100 1010 FBBB uuuu uu1Q QQQQ +// MOV<.cc><.f> b,limm 0010 0bbb 1100 1010 FBBB 1111 100Q QQQQ (+ Limm) +// +// MOV<.cc><.f> 0,c 0010 0110 1100 1010 F111 CCCC CC0Q QQQQ +// MOV<.cc><.f> 0,u6 0010 0110 1100 1010 F111 uuuu uu1Q QQQQ +// MOV<.cc><.f> 0,limm 0010 0110 1100 1010 F111 1111 100Q QQQQ (+ Limm) +// +// NOP 0010 0110 0100 1010 0111 0000 0000 0000 (NOP is a custom encoded MOV where b is 'LIMM' and u6 is 0) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_MOV_do_op(uint32_t breg, uint32_t src2, bool set_flags) +{ + m_regs[breg] = src2; + if (set_flags) + do_flags_nz(m_regs[breg]); +} + +uint32_t arcompact_device::handleop32_MOV(uint32_t op) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(creg); + handleop32_MOV_do_op(breg, m_regs[creg], common32_get_F(op)); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + handleop32_MOV_do_op(breg, common32_get_u6(op), common32_get_F(op)); + return m_pc + 4; + } + case 0x02: + { + uint8_t breg = common32_get_breg(op); + handleop32_MOV_do_op(breg, common32_get_s12(op), common32_get_F(op)); + return m_pc + 4; + } + case 0x03: + { + switch ((op & 0x00000020) >> 5) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(creg); + if (check_condition(common32_get_condition(op))) + handleop32_MOV_do_op(breg, m_regs[creg], common32_get_F(op)); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + if (check_condition(common32_get_condition(op))) + handleop32_MOV_do_op(breg, common32_get_u6(op), common32_get_F(op)); + return m_pc + 4; + } + } + return 0; + } + } + return 0; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// TST b,s12 0010 0bbb 1000 1011 1BBB ssss ssSS SSSS +// TST<.cc> b,c 0010 0bbb 1100 1011 1BBB CCCC CC0Q QQQQ +// TST<.cc> b,u6 0010 0bbb 1100 1011 1BBB uuuu uu1Q QQQQ +// TST<.cc> b,limm 0010 0bbb 1100 1011 1BBB 1111 100Q QQQQ (+ Limm) +// TST<.cc> limm,c 0010 0110 1100 1011 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_TST_do_op(arcompact_device &o, uint32_t src1, uint32_t src2) +{ + uint32_t result = src1 & src2; + o.do_flags_nz(result); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// CMP b,s12 0010 0bbb 1000 1100 1BBB ssss ssSS SSSS +// CMP<.cc> b,c 0010 0bbb 1100 1100 1BBB CCCC CC0Q QQQQ +// CMP<.cc> b,u6 0010 0bbb 1100 1100 1BBB uuuu uu1Q QQQQ +// CMP<.cc> b,limm 0010 0bbb 1100 1100 1BBB 1111 100Q QQQQ (+ Limm) +// CMP<.cc> limm,c 0010 0110 1100 1100 1111 CCCC CC0Q QQQQ (+ Limm) +// +// Note F is always encoded as 1, a is ignored (encodings with a would be redundant) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_CMP_do_op(arcompact_device &o, uint32_t src1, uint32_t src2) +{ + uint32_t result = src1 - src2; + o.do_flags_sub(result, src1, src2); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RCMP b,s12 0010 0bbb 1000 1101 1BBB ssss ssSS SSSS +// RCMP<.cc> b,c 0010 0bbb 1100 1101 1BBB CCCC CC0Q QQQQ +// RCMP<.cc> b,u6 0010 0bbb 1100 1101 1BBB uuuu uu1Q QQQQ +// RCMP<.cc> b,limm 0010 0bbb 1100 1101 1BBB 1111 100Q QQQQ (+ Limm) +// RCMP<.cc> limm,c 0010 0110 1100 1101 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_RCMP_do_op(arcompact_device &o, uint32_t src1, uint32_t src2) +{ + uint32_t result = src2 - src1; + o.do_flags_sub(result, src2, src1); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RSUB<.f> a,b,c 0010 0bbb 0000 1110 FBBB CCCC CCAA AAAA +// RSUB<.f> a,b,u6 0010 0bbb 0100 1110 FBBB uuuu uuAA AAAA +// NEG<.f> a,b 0010 0bbb 0100 1110 FBBB 0000 00AA AAAA (NEG is an alias) +// +// RSUB<.f> b,b,s12 0010 0bbb 1000 1110 FBBB ssss ssSS SSSS +// RSUB<.cc><.f> b,b,c 0010 0bbb 1100 1110 FBBB CCCC CC0Q QQQQ +// RSUB<.cc><.f> b,b,u6 0010 0bbb 1100 1110 FBBB uuuu uu1Q QQQQ +// NEG<.cc><.f> b,b 0010 0bbb 1100 1110 FBBB 0000 001Q QQQQ (NEG is an alias) +// +// RSUB<.f> a,limm,c 0010 0110 0000 1110 F111 CCCC CCAA AAAA (+ Limm) +// RSUB<.f> a,b,limm 0010 0bbb 0000 1110 FBBB 1111 10AA AAAA (+ Limm) +// RSUB<.cc><.f> b,b,limm 0010 0bbb 1100 1110 FBBB 1111 100Q QQQQ (+ Limm) +// +// RSUB<.f> 0,b,c 0010 0bbb 0000 1110 FBBB CCCC CC11 1110 +// RSUB<.f> 0,b,u6 0010 0bbb 0100 1110 FBBB uuuu uu11 1110 +// RSUB<.f> 0,b,limm 0010 0bbb 0000 1110 FBBB 1111 1011 1110 (+ Limm) +// RSUB<.cc><.f> 0,limm,c 0010 0110 1100 1110 F111 CCCC CC0Q QQQQ (+ Limm) +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_RSUB_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src2 - src1; + if (set_flags) + o.do_flags_sub(result, src2, src1); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BSET<.f> a,b,c 0010 0bbb 0000 1111 FBBB CCCC CCAA AAAA +// BSET<.f> a,b,u6 0010 0bbb 0100 1111 FBBB uuuu uuAA AAAA +// BSET<.cc><.f> b,b,c 0010 0bbb 1100 1111 FBBB CCCC CC0Q QQQQ +// BSET<.cc><.f> b,b,u6 0010 0bbb 1100 1111 FBBB uuuu uu1Q QQQQ +// BSET<.f> a,limm,c 0010 0110 0000 1111 F111 CCCC CCAA AAAA (+ Limm) +// +// BSET<.f> 0,b,c 0010 0bbb 0000 1111 FBBB CCCC CC11 1110 +// BSET<.f> 0,b,u6 0010 0bbb 0100 1111 FBBB uuuu uu11 1110 +// BSET<.cc><.f> 0,limm,c 0010 0110 1100 1111 F110 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BSET_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 | (1 << (src2 & 0x1f)); + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BCLR<.f> a,b,c 0010 0bbb 0001 0000 FBBB CCCC CCAA AAAA +// BCLR<.f> a,b,u6 0010 0bbb 0101 0000 FBBB uuuu uuAA AAAA +// BCLR<.cc><.f> b,b,c 0010 0bbb 1101 0000 FBBB CCCC CC0Q QQQQ +// BCLR<.cc><.f> b,b,u6 0010 0bbb 1101 0000 FBBB uuuu uu1Q QQQQ +// BCLR<.f> a,limm,c 0010 0110 0001 0000 F111 CCCC CCAA AAAA (+ Limm) +// +// BCLR<.f> 0,b,c 0010 0bbb 0001 0000 FBBB CCCC CC11 1110 +// BCLR<.f> 0,b,u6 0010 0bbb 0101 0000 FBBB uuuu uu11 1110 +// BCLR<.cc><.f> 0,limm,c 0010 0110 1101 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BCLR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 & ~(1 << (src2 & 0x1f)); + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BTST<.cc> b,c 0010 0bbb 1101 0001 1BBB CCCC CC0Q QQQQ +// BTST<.cc> b,u6 0010 0bbb 1101 0001 1BBB uuuu uu1Q QQQQ +// BTST<.cc> limm,c 0010 0110 1101 0001 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_BTST_do_op(arcompact_device &o, uint32_t src1, uint32_t src2) +{ + uint32_t result = src1 & (1 << (src2 & 0x1f)); + o.do_flags_nz(result); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BXOR<.f> a,b,c 0010 0bbb 0001 0010 FBBB CCCC CCAA AAAA +// BXOR<.f> a,b,u6 0010 0bbb 0101 0010 FBBB uuuu uuAA AAAA +// BXOR<.cc><.f> b,b,c 0010 0bbb 1101 0010 FBBB CCCC CC0Q QQQQ +// BXOR<.cc><.f> b,b,u6 0010 0bbb 1101 0010 FBBB uuuu uu1Q QQQQ +// BXOR<.f> a,limm,c 0010 0110 0001 0010 F111 CCCC CCAA AAAA (+ Limm) +// +// BXOR<.f> 0,b,c 0010 0bbb 0001 0010 FBBB CCCC CC11 1110 +// BXOR<.f> 0,b,u6 0010 0bbb 0101 0010 FBBB uuuu uu11 1110 +// BXOR<.cc><.f> 0,limm,c 0010 0110 1101 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BXOR_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 ^ (1 << (src2 & 0x1f)); + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BMSK<.f> a,b,c 0010 0bbb 0001 0011 FBBB CCCC CCAA AAAA +// BMSK<.f> a,b,u6 0010 0bbb 0101 0011 FBBB uuuu uuAA AAAA +// BMSK<.cc><.f> b,b,c 0010 0bbb 1101 0011 FBBB CCCC CC0Q QQQQ +// BMSK<.cc><.f> b,b,u6 0010 0bbb 1101 0011 FBBB uuuu uu1Q QQQQ +// BMSK<.f> a,limm,c 0010 0110 0001 0011 F111 CCCC CCAA AAAA (+ Limm) +// +// BMSK<.f> 0,b,c 0010 0bbb 0001 0011 FBBB CCCC CC11 1110 +// BMSK<.f> 0,b,u6 0010 0bbb 0101 0011 FBBB uuuu uu11 1110 +// BMSK<.cc><.f> 0,limm,c 0010 0110 1101 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BMSK_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 & ((1 << (src2 + 1)) - 1); + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD1<.f> a,b,c 0010 0bbb 0001 0100 FBBB CCCC CCAA AAAA +// ADD1<.f> a,b,u6 0010 0bbb 0101 0100 FBBB uuuu uuAA AAAA +// ADD1<.f> b,b,s12 0010 0bbb 1001 0100 FBBB ssss ssSS SSSS +// ADD1<.cc><.f> b,b,c 0010 0bbb 1101 0100 FBBB CCCC CC0Q QQQQ +// ADD1<.cc><.f> b,b,u6 0010 0bbb 1101 0100 FBBB uuuu uu1Q QQQQ +// ADD1<.f> a,limm,c 0010 0110 0001 0100 F111 CCCC CCAA AAAA (+ Limm) +// ADD1<.f> a,b,limm 0010 0bbb 0001 0100 FBBB 1111 10AA AAAA (+ Limm) +// ADD1<.cc><.f> b,b,limm 0010 0bbb 1101 0100 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD1<.f> 0,b,c 0010 0bbb 0001 0100 FBBB CCCC CC11 1110 +// ADD1<.f> 0,b,u6 0010 0bbb 0101 0100 FBBB uuuu uu11 1110 +// ADD1<.f> 0,b,limm 0010 0bbb 0001 0100 FBBB 1111 1011 1110 (+ Limm) +// ADD1<.cc><.f> 0,limm,c 0010 0110 1101 0100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ADD1_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 + (src2 << 1); + if (set_flags) + o.do_flags_add(result, src1, src2 << 1); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD2<.f> a,b,c 0010 0bbb 0001 0101 FBBB CCCC CCAA AAAA +// ADD2<.f> a,b,u6 0010 0bbb 0101 0101 FBBB uuuu uuAA AAAA +// ADD2<.f> b,b,s12 0010 0bbb 1001 0101 FBBB ssss ssSS SSSS +// ADD2<.cc><.f> b,b,c 0010 0bbb 1101 0101 FBBB CCCC CC0Q QQQQ +// ADD2<.cc><.f> b,b,u6 0010 0bbb 1101 0101 FBBB uuuu uu1Q QQQQ +// ADD2<.f> a,limm,c 0010 0110 0001 0101 F111 CCCC CCAA AAAA (+ Limm) +// ADD2<.f> a,b,limm 0010 0bbb 0001 0101 FBBB 1111 10AA AAAA (+ Limm) +// ADD2<.cc><.f> b,b,limm 0010 0bbb 1101 0101 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD2<.f> 0,b,c 0010 0bbb 0001 0101 FBBB CCCC CC11 1110 +// ADD2<.f> 0,b,u6 0010 0bbb 0101 0101 FBBB uuuu uu11 1110 +// ADD2<.f> 0,b,limm 0010 0bbb 0001 0101 FBBB 1111 1011 1110 (+ Limm) +// ADD2<.cc><.f> 0,limm,c 0010 0110 1101 0101 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ADD2_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 + (src2 << 2); + if (set_flags) + o.do_flags_add(result, src1, src2 << 2); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD3<.f> a,b,c 0010 0bbb 0001 0110 FBBB CCCC CCAA AAAA +// ADD3<.f> a,b,u6 0010 0bbb 0101 0110 FBBB uuuu uuAA AAAA +// ADD3<.f> b,b,s12 0010 0bbb 1001 0110 FBBB ssss ssSS SSSS +// ADD3<.cc><.f> b,b,c 0010 0bbb 1101 0110 FBBB CCCC CC0Q QQQQ +// ADD3<.cc><.f> b,b,u6 0010 0bbb 1101 0110 FBBB uuuu uu1Q QQQQ +// ADD3<.f> a,limm,c 0010 0110 0001 0110 F111 CCCC CCAA AAAA (+ Limm) +// ADD3<.f> a,b,limm 0010 0bbb 0001 0110 FBBB 1111 10AA AAAA (+ Limm) +// ADD3<.cc><.f> b,b,limm 0010 0bbb 1101 0110 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD3<.f> 0,b,c 0010 0bbb 0001 0110 FBBB CCCC CC11 1110 +// ADD3<.f> 0,b,u6 0010 0bbb 0101 0110 FBBB uuuu uu11 1110 +// ADD3<.f> 0,b,limm 0010 0bbb 0001 0110 FBBB 1111 1011 1110 (+ Limm) +// ADD3<.cc><.f> 0,limm,c 0010 0110 1101 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ADD3_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 + (src2 << 3); + if (set_flags) + o.do_flags_add(result, src1, src2 << 3); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB1<.f> a,b,c 0010 0bbb 0001 0111 FBBB CCCC CCAA AAAA +// SUB1<.f> a,b,u6 0010 0bbb 0101 0111 FBBB uuuu uuAA AAAA +// SUB1<.f> b,b,s12 0010 0bbb 1001 0111 FBBB ssss ssSS SSSS +// SUB1<.cc><.f> b,b,c 0010 0bbb 1101 0111 FBBB CCCC CC0Q QQQQ +// SUB1<.cc><.f> b,b,u6 0010 0bbb 1101 0111 FBBB uuuu uu1Q QQQQ +// SUB1<.f> a,limm,c 0010 0110 0001 0111 F111 CCCC CCAA AAAA (+ Limm) +// SUB1<.f> a,b,limm 0010 0bbb 0001 0111 FBBB 1111 10AA AAAA (+ Limm) +// SUB1<.cc><.f> b,b,limm 0010 0bbb 1101 0111 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB1<.f> 0,b,c 0010 0bbb 0001 0111 FBBB CCCC CC11 1110 +// SUB1<.f> 0,b,u6 0010 0bbb 0101 0111 FBBB uuuu uu11 1110 +// SUB1<.f> 0,b,limm 0010 0bbb 0001 0111 FBBB 1111 1011 1110 (+ Limm) +// SUB1<.cc><.f> 0,limm,c 0010 0110 1101 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SUB1_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 - (src2 << 1); + if (set_flags) + o.do_flags_sub(result, src1, (src2 << 1)); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB2<.f> a,b,c 0010 0bbb 0001 1000 FBBB CCCC CCAA AAAA +// SUB2<.f> a,b,u6 0010 0bbb 0101 1000 FBBB uuuu uuAA AAAA +// SUB2<.f> b,b,s12 0010 0bbb 1001 1000 FBBB ssss ssSS SSSS +// SUB2<.cc><.f> b,b,c 0010 0bbb 1101 1000 FBBB CCCC CC0Q QQQQ +// SUB2<.cc><.f> b,b,u6 0010 0bbb 1101 1000 FBBB uuuu uu1Q QQQQ +// SUB2<.f> a,limm,c 0010 0110 0001 1000 F111 CCCC CCAA AAAA (+ Limm) +// SUB2<.f> a,b,limm 0010 0bbb 0001 1000 FBBB 1111 10AA AAAA (+ Limm) +// SUB2<.cc><.f> b,b,limm 0010 0bbb 1101 1000 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB2<.f> 0,b,c 0010 0bbb 0001 1000 FBBB CCCC CC11 1110 +// SUB2<.f> 0,b,u6 0010 0bbb 0101 1000 FBBB uuuu uu11 1110 +// SUB2<.f> 0,b,limm 0010 0bbb 0001 1000 FBBB 1111 1011 1110 (+ Limm) +// SUB2<.cc><.f> 0,limm,c 0010 0110 1101 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SUB2_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 - (src2 << 2); + if (set_flags) + o.do_flags_sub(result, src1, (src2 << 2)); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB3<.f> a,b,c 0010 0bbb 0001 1001 FBBB CCCC CCAA AAAA +// SUB3<.f> a,b,u6 0010 0bbb 0101 1001 FBBB uuuu uuAA AAAA +// SUB3<.f> b,b,s12 0010 0bbb 1001 1001 FBBB ssss ssSS SSSS +// SUB3<.cc><.f> b,b,c 0010 0bbb 1101 1001 FBBB CCCC CC0Q QQQQ +// SUB3<.cc><.f> b,b,u6 0010 0bbb 1101 1001 FBBB uuuu uu1Q QQQQ +// SUB3<.f> a,limm,c 0010 0110 0001 1001 F111 CCCC CCAA AAAA (+ Limm) +// SUB3<.f> a,b,limm 0010 0bbb 0001 1001 FBBB 1111 10AA AAAA (+ Limm) +// SUB3<.cc><.f> b,b,limm 0010 0bbb 1101 1001 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB3<.f> 0,b,c 0010 0bbb 0001 1001 FBBB CCCC CC11 1110 +// SUB3<.f> 0,b,u6 0010 0bbb 0101 1001 FBBB uuuu uu11 1110 +// SUB3<.f> 0,limm,c 0010 0110 0001 1001 F111 CCCC CC11 1110 (+ Limm) +// SUB3<.cc><.f> 0,limm,c 0010 0110 1101 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SUB3_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 - (src2 << 3); + if (set_flags) + o.do_flags_sub(result, src1, (src2 << 3)); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Optional on ARC700 only, not available on ARCtangent-A5 or ARC600 +// +// IIII I SS SSSS +// MPY<.f> a,b,c 0010 0bbb 0001 1010 FBBB CCCC CCAA AAAA +// MPY<.f> a,b,u6 0010 0bbb 0101 1010 FBBB uuuu uuAA AAAA +// MPY<.f> b,b,s12 0010 0bbb 1001 1010 FBBB ssss ssSS SSSS +// MPY<.cc><.f> b,b,c 0010 0bbb 1101 1010 FBBB CCCC CC0Q QQQQ +// MPY<.cc><.f> b,b,u6 0010 0bbb 1101 1010 FBBB uuuu uu1Q QQQQ +// MPY<.f> a,limm,c 0010 0110 0001 1010 F111 CCCC CCAA AAAA (+ Limm) +// MPY<.f> a,b,limm 0010 0bbb 0001 1010 FBBB 1111 10AA AAAA (+ Limm) +// MPY<.cc><.f> b,b,limm 0010 0bbb 1101 1010 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPY<.f> 0,b,c 0010 0bbb 0001 1010 FBBB CCCC CC11 1110 +// MPY<.f> 0,b,u6 0010 0bbb 0101 1010 FBBB uuuu uu11 1110 +// MPY<.cc><.f> 0,limm,c 0010 0110 1101 1010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_MPY_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = 0; + fatalerror("MPY not supported"); + if (set_flags) + fatalerror("MPY flags not supported"); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Optional on ARC700 only, not available on ARCtangent-A5 or ARC600 +// +// IIII I SS SSSS +// MPYH<.f> a,b,c 0010 0bbb 0001 1011 FBBB CCCC CCAA AAAA +// MPYH<.f> a,b,u6 0010 0bbb 0101 1011 FBBB uuuu uuAA AAAA +// MPYH<.f> b,b,s12 0010 0bbb 1001 1011 FBBB ssss ssSS SSSS +// MPYH<.cc><.f> b,b,c 0010 0bbb 1101 1011 FBBB CCCC CC0Q QQQQ +// MPYH<.cc><.f> b,b,u6 0010 0bbb 1101 1011 FBBB uuuu uu1Q QQQQ +// MPYH<.f> a,limm,c 0010 0110 0001 1011 F111 CCCC CCAA AAAA (+ Limm) +// MPYH<.f> a,b,limm 0010 0bbb 0001 1010 FBBB 1111 10AA AAAA (+ Limm) +// MPYH<.cc><.f> b,b,limm 0010 0bbb 1101 1011 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYH<.f> 0,b,c 0010 0bbb 0001 1011 FBBB CCCC CC11 1110 +// MPYH<.f> 0,b,u6 0010 0bbb 0101 1011 FBBB uuuu uu11 1110 +// MPYH<.cc><.f> 0,limm,c 0010 0110 1101 1011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_MPYH_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = 0; + fatalerror("MPYH not supported"); + if (set_flags) + fatalerror("MPYH flags not supported"); + return result; +} +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Optional on ARC700 only, not available on ARCtangent-A5 or ARC600 +// +// IIII I SS SSSS +// MPYHU<.f> a,b,c 0010 0bbb 0001 1100 FBBB CCCC CCAA AAAA +// MPYHU<.f> a,b,u6 0010 0bbb 0101 1100 FBBB uuuu uuAA AAAA +// MPYHU<.f> b,b,s12 0010 0bbb 1001 1100 FBBB ssss ssSS SSSS +// MPYHU<.cc><.f> b,b,c 0010 0bbb 1101 1100 FBBB CCCC CC0Q QQQQ +// MPYHU<.cc><.f> b,b,u6 0010 0bbb 1101 1100 FBBB uuuu uu1Q QQQQ +// MPYHU<.f> a,limm,c 0010 0110 0001 1100 F111 CCCC CCAA AAAA (+ Limm) +// MPYHU<.f> a,b,limm 0010 0bbb 0001 1100 FBBB 1111 10AA AAAA (+ Limm) +// MPYHU<.cc><.f> b,b,limm 0010 0bbb 1101 1100 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYHU<.f> 0,b,c 0010 0bbb 0001 1100 FBBB CCCC CC11 1110 +// MPYHU<.f> 0,b,u6 0010 0bbb 0101 1100 FBBB uuuu uu11 1110 +// MPYHU<.cc><.f> 0,limm,c 0010 0110 1101 1100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_MPYHU_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = 0; + fatalerror("MPYHU not supported"); + if (set_flags) + fatalerror("MPYHU flags not supported"); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Optional on ARC700 only, not available on ARCtangent-A5 or ARC600 +// +// MPYU<.f> a,b,c 0010 0bbb 0001 1101 FBBB CCCC CCAA AAAA +// MPYU<.f> a,b,u6 0010 0bbb 0101 1101 FBBB uuuu uuAA AAAA +// MPYU<.f> b,b,s12 0010 0bbb 1001 1101 FBBB ssss ssSS SSSS +// MPYU<.cc><.f> b,b,c 0010 0bbb 1101 1101 FBBB CCCC CC0Q QQQQ +// MPYU<.cc><.f> b,b,u6 0010 0bbb 1101 1101 FBBB uuuu uu1Q QQQQ +// MPYU<.f> a,limm,c 0010 0110 0001 1101 F111 CCCC CCAA AAAA (+ Limm) +// MPYU<.f> a,b,limm 0010 0bbb 0001 1101 FBBB 1111 10AA AAAA (+ Limm) +// MPYU<.cc><.f> b,b,limm 0010 0bbb 1101 1101 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYU<.f> 0,b,c 0010 0bbb 0001 1101 FBBB CCCC CC11 1110 +// MPYU<.f> 0,b,u6 0010 0bbb 0101 1101 FBBB uuuu uu11 1110 +// MPYU<.cc><.f> 0,limm,c 0010 0110 1101 1101 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_MPYU_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = 0; + fatalerror("MPYU not supported"); + if (set_flags) + fatalerror("MPYU flags not supported"); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Neither a nor b are used, would putting limm in them cause the limm to be read? +// +// IIII I SS SSSS +// PP +// General Operations Reg-Reg 0010 0bbb 00ii iiii FBBB CCCC CCAA AAAA +// FLAG c 0010 0000 0010 1001 0000 0000 0100 0000 (Leapster BIOS uses this redundant encoding where A is unused?) +// +// PP +// Gen Op Reg+6-bit unsigned Imm 0010 0bbb 01ii iiii FBBB UUUU UUAA AAAA +// no listed FLAG encodings +// +// PP +// Gen Op Reg+12-bit signed Imm 0010 0bbb 10ii iiii FBBB ssss ssSS SSSS +// FLAG s12 0010 0rrr 1010 1001 0RRR ssss ssSS SSSS +// +// PP M +// Gen Op Conditional Register 0010 0bbb 11ii iiii FBBB CCCC CC0Q QQQQ +// FLAG<.cc> c 0010 0rrr 1110 1001 0RRR CCCC CC0Q QQQQ +// FLAG<.cc> limm 0010 0rrr 1110 1001 0RRR 1111 100Q QQQQ (+ Limm) +// +// PP M +// Gen Op ConReg 6-bit unsign Imm 0010 0bbb 11ii iiii FBBB UUUU UU1Q QQQQ +// FLAG<.cc> u6 0010 0rrr 1110 1001 0RRR uuuu uu1Q QQQQ +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_FLAG_do_op(uint32_t source) +{ + if (!(source & 0x0001)) // H means ignore all others (and halts CPU?) + { + // privileged mode only + if (source & 0x0002) { status32_set_e1(); } + else { status32_clear_e1(); } + if (source & 0x0004) { status32_set_e2(); } + else { status32_clear_e2(); } + //(source & 0x0008) + //(source & 0x0010) + //(source & 0x0020) + //(source & 0x0040) + //(source & 0x0080) + if (source & 0x0100) { status32_set_v(); } + else { status32_clear_v(); } + if (source & 0x0200) { status32_set_c(); } + else { status32_clear_c(); } + if (source & 0x0400) { status32_set_n(); } + else { status32_clear_n(); } + if (source & 0x0800) { status32_set_z(); } + else { status32_clear_z(); } + } + else + { + fatalerror("FLAG operation with H set (halt CPU?)"); + } +} + +uint32_t arcompact_device::handleop32_FLAG(uint32_t op) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + uint8_t creg = common32_get_creg(op); + int size = check_limm(creg); + handleop32_FLAG_do_op(m_regs[creg]); + return m_pc + size; + } + case 0x01: + { + handleop32_FLAG_do_op(common32_get_u6(op)); + return m_pc + 4; + } + case 0x02: + { + handleop32_FLAG_do_op(common32_get_s12(op)); + return m_pc + 4; + } + case 0x03: + { + switch ((op & 0x00000020) >> 5) + { + case 0x00: + { + uint8_t creg = common32_get_creg(op); + int size = check_limm(creg); + if (check_condition(common32_get_condition(op))) + handleop32_FLAG_do_op(m_regs[creg]); + return m_pc + size; + } + case 0x01: + { + if (check_condition(common32_get_condition(op))) + handleop32_FLAG_do_op(common32_get_u6(op)); + return m_pc + 4; + } + } + return 0; + } + } + return 0; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_3f_zop.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_3f_zop.cpp new file mode 100644 index 00000000000..a590ac7738a --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_3f_zop.cpp @@ -0,0 +1,63 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SLEEP 0010 0001 0110 1111 0000 uuuu uu11 1111 +// SLEEP c 0010 0001 0010 1111 0000 CCCC CC11 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SLEEP(uint32_t op) +{ + // TODO: this is over simplified + debugreg_set_ZZ(); + //fatalerror("SLEEP (%08x)", op); + return m_pc + 4; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SWI/TRAP0 0010 0010 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SWI(uint32_t op) +{ + fatalerror("SWI / TRAP0 (%08x)", op); + return m_pc + 4; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SYNC 0010 0011 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SYNC(uint32_t op) +{ + fatalerror("SYNC (%08x)", op); + return m_pc + 4; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// RTIE 0010 0100 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_RTIE(uint32_t op) +{ + fatalerror("RTIE (%08x)", op); + return m_pc + 4; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// BRK 0010 0101 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_BRK(uint32_t op) +{ + fatalerror("BRK (%08x)", op); + return m_pc + 4; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_sop.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_sop.cpp new file mode 100644 index 00000000000..d95bafadac1 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_04_2f_sop.cpp @@ -0,0 +1,336 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ASL<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0000 +// ASL<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0000 +// ASL<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0000 (+ Limm) +// +// ASL<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0000 +// ASL<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0000 +// ASL<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ASL_single_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src + src; + if (set_flags) + { + o.do_flags_nz(result); + if ((src & 0x80000000) != (result & 0x80000000)) { o.status32_set_v(); } + else { o.status32_clear_v(); } + if (src & 0x80000000) { o.status32_set_c(); } + else { o.status32_clear_c(); } + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ASR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0001 +// ASR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0001 +// ASR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0001 (+ Limm) +// +// ASR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0001 +// ASR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0001 +// ASR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ASR_single_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src >> 1; + if (src & 0x80000000) + result |= 0x80000000; + + if (set_flags) + { + o.do_flags_nz(result); + if (src & 0x00000001) { o.status32_set_c(); } + else { o.status32_clear_c(); } + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// LSR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0010 +// LSR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0010 +// LSR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0010 (+ Limm) +// +// LSR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0010 +// LSR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0010 +// LSR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_LSR_single_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src >> 1; + if (set_flags) + { + o.do_flags_nz(result); + if (src & 0x00000001) { o.status32_set_c(); } + else { o.status32_clear_c(); } + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ROR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0011 +// ROR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0011 +// ROR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0011 (+ Limm) +// +// ROR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0011 +// ROR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0011 +// ROR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ROR_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src >> 1; + if (src & 1) + result |= 0x80000000; + + if (set_flags) + { + o.do_flags_nz(result); + if (src & 0x00000001) { o.status32_set_c(); } + else { o.status32_clear_c(); } + } + + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// RRC<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0100 +// RRC<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0100 +// RRC<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0100 (+ Limm) +// +// RRC<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0100 +// RRC<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0100 +// RRC<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_RRC_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src >> 1; + if (o.status32_check_c()) + result |= 0x80000000; + + if (set_flags) + { + o.do_flags_nz(result); + if (src & 0x00000001) + o.status32_set_c(); + else + o.status32_clear_c(); + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// SEXB<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0101 +// SEXB<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0101 +// SEXB<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0101 (+ Limm) +// +// SEXB<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0101 +// SEXB<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0101 +// SEXB<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0101 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SEXB_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + uint32_t result = util::sext(src, 8); + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// SEXW<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0110 +// SEXW<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0110 +// SEXW<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0110 (+ Limm) +// +// SEXW<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0110 +// SEXW<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0110 +// SEXW<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SEXW_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + uint32_t result = util::sext(src, 16); + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// EXTB<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0111 +// EXTB<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0111 +// EXTB<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0111 (+ Limm) +// +// EXTB<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0111 +// EXTB<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0111 +// EXTB<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0111 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_EXTB_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src & 0xff; + if (set_flags) + { + o.do_flags_nz(result); + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Zero Extend Word +// IIII I SS SSSS ss ssss +// EXTW<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1000 +// EXTW<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1000 +// EXTW<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1000 (+ Limm) +// +// EXTW<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1000 +// EXTW<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1000 +// EXTW<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_EXTW_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src & 0xffff; + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ABS<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1001 +// ABS<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1001 +// ABS<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1001 (+ Limm) +// +// ABS<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1001 +// ABS<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1001 +// ABS<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ABS_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result; + if (src & 0x80000000) + result = 0x80000000 - (src & 0x7fffffff); + else + result = src; + + if (set_flags) + { + if (result == 0x00000000) { o.status32_set_z(); } + else { o.status32_clear_z(); } + if (src == 0x80000000) { o.status32_set_n(); } + else { o.status32_clear_n(); } + if (src & 0x80000000) { o.status32_set_c(); } + else { o.status32_clear_c(); } + if (src == 0x80000000) { o.status32_set_v(); } + else { o.status32_clear_v(); } + } + + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// NOT<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1010 +// NOT<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1010 +// NOT<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1010 (+ Limm) +// +// NOT<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1010 +// NOT<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1010 +// NOT<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1010 (+ Limm) +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_NOT_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src ^ 0xffffffff; + if (set_flags) + o.do_flags_nz(result); + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Rotate Left Through Carry +// IIII I SS SSSS ss ssss +// RLC<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1011 +// RLC<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1011 +// RLC<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1011 (+ Limm) +// +// RLC<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1011 +// RLC<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1011 +// RLC<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_RLC_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = src << 1; + if (o.status32_check_c()) + result |= 1; + + if (set_flags) + { + o.do_flags_nz(result); + if (src & 0x80000000) + o.status32_set_c(); + else + o.status32_clear_c(); + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Atomic Exchange +// IIII I SS SSSS ss ssss +// EX<.di> b,[c] 0010 0bbb 0010 1111 DBBB CCCC CC00 1100 +// EX<.di> b,[u6] 0010 0bbb 0110 1111 DBBB uuuu uu00 1100 +// EX<.di> b,[limm] 0010 0bbb 0010 1111 DBBB 1111 1000 1100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_EX(uint32_t op) +{ + int size = 4; + + int p = common32_get_p(op); + uint8_t breg = common32_get_breg(op); + uint32_t b = m_regs[breg]; + + if (p == 0) + { + uint8_t creg = common32_get_creg(op); + size = check_limm(creg); + uint32_t temp = READ32(m_regs[creg]); + WRITE32(m_regs[creg], b); + m_regs[breg] = temp; + } + else if (p == 1) + { + uint8_t u = common32_get_u6(op); + uint32_t temp = READ32(u); + WRITE32(u, b); + m_regs[breg] = temp; + } + else + { + fatalerror("EX used with p == 2 or p == 3"); + } + + return m_pc + size; +} + diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_04_3x.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_04_3x.cpp new file mode 100644 index 00000000000..fa28bf94ff7 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_04_3x.cpp @@ -0,0 +1,41 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LD<.x><.aa><.di> a,[b,c] 0010 0bbb aa11 0ZZX DBBB CCCC CCAA AAAA +// LD<.x><.aa><.di> 0,[b,c] 0010 0bbb aa11 0ZZX DBBB CCCC CC11 1110 +// PREFETCH<.aa> [b,c] 0010 0bbb aa11 0000 0BBB CCCC CC11 1110 (prefetch is an alias) +// +// LD<.x><.aa><.di> a,[b,limm] 0010 0bbb aa11 0ZZX DBBB 1111 10AA AAAA (+ Limm) +// LD<.x><.aa><.di> 0,[b,limm] 0010 0bbb aa11 0ZZX DBBB 1111 1011 1110 (+ Limm) +// PREFETCH<.aa> [b,limm] 0010 0bbb aa11 0000 0BBB 1111 1011 1110 (+ Limm) (prefetch is an alias) +// +// LD<.x><.di> a,[limm,c] 0010 0110 RR11 0ZZX D111 CCCC CCAA AAAA (+ Limm) +// LD<.x><.di> 0,[limm,c] 0010 0110 RR11 0ZZX D111 CCCC CC11 1110 (+ Limm) +// PREFETCH [limm,c] 0010 0110 RR11 0000 0111 CCCC CC11 1110 (+ Limm) (prefetch is an alias) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_LDrr(uint32_t op, int dsize, int extend) +{ + // ZZ value of 0x0 with X of 1 is illegal + // ZZ value of 0x3 is illegal + + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + uint8_t areg = common32_get_areg(op); + + uint8_t X = extend; + uint32_t s = m_regs[creg]; + int a = (op & 0x00c00000) >> 22; + //int D = (op & 0x00008000) >> 15; // D isn't handled + uint8_t Z = dsize; + + arcompact_handle_ld_helper(op, areg, breg, s, X, Z, a); + + return m_pc + size; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_04_aux.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_04_aux.cpp new file mode 100644 index 00000000000..f13956db514 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_04_aux.cpp @@ -0,0 +1,153 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LR b,[c] 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR +// LR b,[limm] 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR (+ Limm) +// LR b,[u6] 0010 0bbb 0110 1010 0BBB uuuu uu00 0000 +// LR b,[s12] 0010 0bbb 1010 1010 0BBB ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_LR(uint32_t op) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + int size = 4; + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + if (creg == REG_LIMM) + { + get_limm_32bit_opcode(); + size = 8; + } + uint32_t c = m_regs[creg]; + m_regs[breg] = READAUX(c); + return m_pc + size; + } + case 0x01: + { + int size = 4; + uint8_t breg = common32_get_breg(op); + uint32_t u = common32_get_u6(op); + uint32_t c = u; + m_regs[breg] = READAUX(c); + return m_pc + size; + } + case 0x02: + { + int size = 4; + uint8_t breg = common32_get_breg(op); + uint32_t S = common32_get_s12(op); + uint32_t c = (uint32_t)S; + m_regs[breg] = READAUX(c); + return m_pc + size; + } + case 0x03: + { + switch ((op & 0x00000020) >> 5) + { + case 0x00: + { + int size = 4; + fatalerror("handleop32_LR_cc_f_b_b_c (LR)\n"); + return m_pc + size; + } + case 0x01: + { + int size = 4; + uint8_t breg = common32_get_breg(op); + uint32_t u = common32_get_u6(op); + uint32_t c = u; + uint8_t condition = common32_get_condition(op); + if (!check_condition(condition)) + return m_pc + size; + m_regs[breg] = READAUX(c); + return m_pc + size; + } + } + return 0; + } + } + return 0; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SR b,[c] 0010 0bbb 0010 1011 0BBB CCCC CCRR RRRR +// SR b,[limm] 0010 0bbb 0010 1011 0BBB 1111 10RR RRRR (+ Limm) +// SR b,[u6] 0010 0bbb 0110 1011 0BBB uuuu uu00 0000 +// SR b,[s12] 0010 0bbb 1010 1011 0BBB ssss ssSS SSSS +// SR limm,[c] 0010 0110 0010 1011 0111 CCCC CCRR RRRR (+ Limm) +// SR limm,[u6] 0010 0110 0110 1011 0111 uuuu uu00 0000 +// SR limm,[s12] 0010 0110 1010 1011 0111 ssss ssSS SSSS (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SR(uint32_t op) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + uint32_t b = m_regs[breg]; + uint32_t c = m_regs[creg]; + WRITEAUX(c, b); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + uint32_t u = common32_get_u6(op); + int size = check_limm(breg); + uint32_t b = m_regs[breg]; + uint32_t c = u; + WRITEAUX(c, b); + return m_pc + size; + } + case 0x02: + { + uint8_t breg = common32_get_breg(op); + uint32_t S = common32_get_s12(op); + int size = check_limm(breg); + uint32_t b = m_regs[breg]; + uint32_t c = (uint32_t)S; + WRITEAUX(c, b); + return m_pc + size; + } + case 0x03: + { + switch ((op & 0x00000020) >> 5) + { + case 0x00: + { + int size = 4; + fatalerror("handleop32_SR_cc_f_b_b_c (SR)\n"); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + uint32_t u = common32_get_u6(op); + int size = check_limm(breg); + uint32_t b = m_regs[breg]; + uint32_t c = u; + uint8_t condition = common32_get_condition(op); + if (!check_condition(condition)) + return m_pc + size; + WRITEAUX(c, b); + return m_pc + size; + } + } + return 0; + } + } + return 0; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_04_jumps.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_04_jumps.cpp new file mode 100644 index 00000000000..49cb37969ca --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_04_jumps.cpp @@ -0,0 +1,149 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +uint32_t arcompact_device::handle_jump_to_addr(bool delay, bool link, uint32_t address, uint32_t next_addr) +{ + if (delay) + { + m_delayactive = true; + m_delayjump = address; + if (link) + m_delaylinks = true; + else m_delaylinks = false; + return next_addr; + } + else + { + if (link) + m_regs[REG_BLINK] = next_addr; + return address; + } +} + +uint32_t arcompact_device::handle_jump_to_register(bool delay, bool link, uint32_t reg, uint32_t next_addr, int flag) +{ + if ((reg == REG_ILINK1) || (reg == REG_ILINK2)) + { + if (flag) + { + if (reg == REG_ILINK1) m_status32 = m_status32_l1; + if (reg == REG_ILINK2) m_status32 = m_status32_l2; + uint32_t target = m_regs[reg]; + return handle_jump_to_addr(delay, link, target, next_addr); + } + else + { + fatalerror("illegal jump to ILINK1/ILINK2 not supported"); // FLAG bit must be set + return next_addr; + } + } + else + { + if (flag) + { + fatalerror("illegal jump (flag bit set)"); // FLAG bit must NOT be set + return next_addr; + } + else + { + uint32_t target = m_regs[reg]; + return handle_jump_to_addr(delay, link, target, next_addr); + } + } + return 0; +} + +uint32_t arcompact_device::handleop32_Jcc_f_a_b_c_helper(uint32_t op, bool delay, bool link) +{ + uint8_t creg = common32_get_creg(op); + int size = check_limm(creg); + return handle_jump_to_register(delay, link, creg, m_pc + size, common32_get_F(op)); +} + +uint32_t arcompact_device::handleop32_Jcc_cc_f_b_b_c_helper(uint32_t op, bool delay, bool link) +{ + uint8_t creg = common32_get_creg(op); + int size = check_limm(creg); + if (!check_condition(common32_get_condition(op))) + return m_pc + size; + return handle_jump_to_register(delay, link, creg, m_pc + size, common32_get_F(op)); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ +// Jcc limm 0010 0RRR 1110 0000 0RRR 1111 100Q QQQQ (+ Limm) +// Jcc u6 0010 0RRR 1110 0000 0RRR uuuu uu1Q QQQQ +// Jcc.F [ilink1] 0010 0RRR 1110 0000 1RRR 0111 010Q QQQQ +// Jcc.F [ilink2] 0010 0RRR 1110 0000 1RRR 0111 100Q QQQQ +// IIII I SS SSSS +// J [c] 0010 0RRR 0010 0000 0RRR CCCC CCRR RRRR +// J.F [ilink1] 0010 0RRR 0010 0000 1RRR 0111 01RR RRRR +// J.F [ilink2] 0010 0RRR 0010 0000 1RRR 0111 10RR RRRR +// J limm 0010 0RRR 0010 0000 0RRR 1111 10RR RRRR (+ Limm) +// J u6 0010 0RRR 0110 0000 0RRR uuuu uuRR RRRR +// J s12 0010 0RRR 1010 0000 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// Jcc.D u6 0010 0RRR 1110 0001 0RRR uuuu uu1Q QQQQ +// Jcc.D [c] 0010 0RRR 1110 0001 0RRR CCCC CC0Q QQQQ +// +// J.D [c] 0010 0RRR 0010 0001 0RRR CCCC CCRR RRRR +// J.D u6 0010 0RRR 0110 0001 0RRR uuuu uuRR RRRR +// J.D s12 0010 0RRR 1010 0001 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// JLcc [c] 0010 0RRR 1110 0010 0RRR CCCC CC0Q QQQQ +// JLcc limm 0010 0RRR 1110 0010 0RRR 1111 100Q QQQQ (+ Limm) +// JLcc u6 0010 0RRR 1110 0010 0RRR uuuu uu1Q QQQQ +// JL [c] 0010 0RRR 0010 0010 0RRR CCCC CCRR RRRR +// JL limm 0010 0RRR 0010 0010 0RRR 1111 10RR RRRR (+ Limm) +// JL u6 0010 0RRR 0110 0010 0RRR uuuu uuRR RRRR +// JL s12 0010 0RRR 1010 0010 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// JLcc.D u6 0010 0RRR 1110 0011 0RRR uuuu uu1Q QQQQ +// JLcc.D [c] 0010 0RRR 1110 0011 0RRR CCCC CC0Q QQQQ +// JL.D [c] 0010 0RRR 0010 0011 0RRR CCCC CCRR RRRR +// JL.D u6 0010 0RRR 0110 0011 0RRR uuuu uuRR RRRR +// JL.D s12 0010 0RRR 1010 0011 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_J(uint32_t op, bool delay, bool link) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: return handleop32_Jcc_f_a_b_c_helper(op, delay, link); + case 0x01: + { + int size = 4; + fatalerror("unimplemented Jump (delay %d link %d) (u6 type) %08x", delay ? 1:0, link? 1:0, op); + return m_pc + size; + } + case 0x02: + { + int size = 4; + fatalerror("unimplemented Jump (delay %d link %d) (u12 type) %08x", delay ? 1:0, link? 1:0, op); + return m_pc + size; + } + case 0x03: + switch ((op & 0x00000020) >> 5) + { + case 0x00: return handleop32_Jcc_cc_f_b_b_c_helper(op, delay, link); + case 0x01: + { + int size = 4; + fatalerror("unimplemented Jump (delay %d link %d) (CC, u6 type) %08x", delay ? 1:0, link? 1:0, op); + return m_pc + size; + } + } + return 0; + } + return 0; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_04_loop.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_04_loop.cpp new file mode 100644 index 00000000000..a507c327b50 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_04_loop.cpp @@ -0,0 +1,53 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LP u7 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ +// LP s13 0010 0RRR 1010 1000 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_LP(uint32_t op) // LPcc (loop setup) +{ + int size = 4; + int p = common32_get_p(op); + if (p == 0x00) + { + fatalerror(" a,b,c 0010 1bbb 0000 0000 FBBB CCCC CCAA AAAA +// ASL<.f> a,b,u6 0010 1bbb 0100 0000 FBBB uuuu uuAA AAAA +// ASL<.f> b,b,s12 0010 1bbb 1000 0000 FBBB ssss ssSS SSSS +// ASL<.cc><.f> b,b,c 0010 1bbb 1100 0000 FBBB CCCC CC0Q QQQQ +// ASL<.cc><.f> b,b,u6 0010 1bbb 1100 0000 FBBB uuuu uu1Q QQQQ +// ASL<.f> a,limm,c 0010 1110 0000 0000 F111 CCCC CCAA AAAA (+ Limm) +// ASL<.f> a,b,limm 0010 1bbb 0000 0000 FBBB 1111 10AA AAAA (+ Limm) +// ASL<.cc><.f> b,b,limm 0010 1bbb 1100 0000 FBBB 1111 100Q QQQQ (+ Limm) +// +// ASL<.f> 0,b,c 0010 1bbb 0000 0000 FBBB CCCC CC11 1110 +// ASL<.f> 0,b,u6 0010 1bbb 0100 0000 FBBB uuuu uu11 1110 +// ASL<.cc><.f> 0,limm,c 0010 1110 1100 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ASL_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 << (src2 & 0x1f); + if (set_flags) + { + o.do_flags_nz(result); + if (src2 != 0) + { + if (src1 & (1 << (32 - src2))) + o.status32_set_c(); + else + o.status32_clear_c(); + } + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// LSR<.f> a,b,c 0010 1bbb 0000 0001 FBBB CCCC CCAA AAAA +// LSR<.f> a,b,u6 0010 1bbb 0100 0001 FBBB uuuu uuAA AAAA +// LSR<.f> b,b,s12 0010 1bbb 1000 0001 FBBB ssss ssSS SSSS +// LSR<.cc><.f> b,b,c 0010 1bbb 1100 0001 FBBB CCCC CC0Q QQQQ +// LSR<.cc><.f> b,b,u6 0010 1bbb 1100 0001 FBBB uuuu uu1Q QQQQ +// LSR<.f> a,limm,c 0010 1110 0000 0001 F111 CCCC CCAA AAAA (+ Limm) +// LSR<.f> a,b,limm 0010 1bbb 0000 0001 FBBB 1111 10AA AAAA (+ Limm) +// LSR<.cc><.f> b,b,limm 0010 1bbb 1100 0001 FBBB 1111 100Q QQQQ (+ Limm) +// +// LSR<.f> 0,b,c 0010 1bbb 0000 0001 FBBB CCCC CC11 1110 +// LSR<.f> 0,b,u6 0010 1bbb 0100 0001 FBBB uuuu uu11 1110 +// LSR<.cc><.f> 0,limm,c 0010 1110 1100 0001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_LSR_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 >> (src2 & 0x1f); + if (set_flags) + { + o.do_flags_nz(result); + if (src2 != 0) + { + if (src1 & (1 << (src2 - 1))) + o.status32_set_c(); + else + o.status32_clear_c(); + } + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ASR<.f> a,b,c 0010 1bbb 0000 0010 FBBB CCCC CCAA AAAA +// ASR<.f> a,b,u6 0010 1bbb 0100 0010 FBBB uuuu uuAA AAAA +// ASR<.f> b,b,s12 0010 1bbb 1000 0010 FBBB ssss ssSS SSSS +// ASR<.cc><.f> b,b,c 0010 1bbb 1100 0010 FBBB CCCC CC0Q QQQQ +// ASR<.cc><.f> b,b,u6 0010 1bbb 1100 0010 FBBB uuuu uu1Q QQQQ +// ASR<.f> a,limm,c 0010 1110 0000 0010 F111 CCCC CCAA AAAA (+ Limm) +// ASR<.f> a,b,limm 0010 1bbb 0000 0010 FBBB 1111 10AA AAAA (+ Limm) +// ASR<.cc><.f> b,b,limm 0010 1bbb 1100 0010 FBBB 1111 100Q QQQQ (+ Limm) +// +// ASR<.f> 0,b,c 0010 1bbb 0000 0010 FBBB CCCC CC11 1110 +// ASR<.f> 0,b,u6 0010 1bbb 0100 0010 FBBB uuuu uu11 1110 +// ASR<.cc><.f> 0,limm,c 0010 1110 1100 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ASR_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 >> (src2 & 0x1f); + + if (src1 & 0x80000000) + result |= 0xffffffff << (31 - (src2 & 0x1f)); + + if (set_flags) + { + o.do_flags_nz(result); + if (src2 != 0) + { + if (src1 & (1 << (src2 - 1))) + o.status32_set_c(); + else + o.status32_clear_c(); + } + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ROR<.f> a,b,c 0010 1bbb 0000 0011 FBBB CCCC CCAA AAAA +// ROR<.f> a,b,u6 0010 1bbb 0100 0011 FBBB uuuu uuAA AAAA +// ROR<.f> b,b,s12 0010 1bbb 1000 0011 FBBB ssss ssSS SSSS +// ROR<.cc><.f> b,b,c 0010 1bbb 1100 0011 FBBB CCCC CC0Q QQQQ +// ROR<.cc><.f> b,b,u6 0010 1bbb 1100 0011 FBBB uuuu uu1Q QQQQ +// ROR<.f> a,limm,c 0010 1110 0000 0011 F111 CCCC CCAA AAAA (+ Limm) +// ROR<.f> a,b,limm 0010 1bbb 0000 0011 FBBB 1111 10AA AAAA (+ Limm) +// ROR<.cc><.f> b,b,limm 0010 1bbb 1100 0011 FBBB 1111 100Q QQQQ (+ Limm) +// +// ROR<.f> 0,b,c 0010 1bbb 0000 0011 FBBB CCCC CC11 1110 +// ROR<.f> 0,b,u6 0010 1bbb 0100 0011 FBBB uuuu uu11 1110 +// ROR<.cc><.f> 0,limm,c 0010 1110 1100 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ROR_multiple_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + uint32_t result = src1 >> (src2 & 0x1f); + result |= src1 << (31 - (src2 & 0x1f)); + + if (set_flags) + { + o.do_flags_nz(result); + if (src2 != 0) + { + if (src1 & (1 << (src2 - 1))) + o.status32_set_c(); + else + o.status32_clear_c(); + } + } + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Optional for ARCtangent-A5/ARC600, not available as an option on ARC700 +// +// 32 x 32 Signed Multiply +// MUL64 <0,>b,c 0010 1bbb 0000 0100 0BBB CCCC CC11 1110 +// MUL64 <0,>b,u6 0010 1bbb 0100 0100 0BBB uuuu uu11 1110 +// MUL64 <0,>b,s12 0010 1bbb 1000 0100 0BBB ssss ssSS SSSS +// MUL64 <0,>limm,c 0010 1110 0000 0100 0111 CCCC CC11 1110 (+ Limm) +// +// MUL64<.cc> <0,>b,c 0010 1bbb 1100 0100 0BBB CCCC CC0Q QQQQ +// MUL64<.cc> <0,>b,u6 0010 1bbb 1100 0100 0BBB uuuu uu1Q QQQQ +// MUL64<.cc> <0,>limm,c 0010 1110 1100 0100 0111 CCCC CC0Q QQQQ (+ Limm) +// MUL64<.cc> <0,>b,limm 0010 1bbb 1100 0100 0BBB 1111 100Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_MUL64_do_op(arcompact_device &o, uint32_t src1, uint32_t src2) +{ + uint64_t result = (int32_t)src1 * (int32_t)src2; + o.m_regs[REG_MLO] = result & 0xffffffff; + o.m_regs[REG_MMID] = (result >> 16) & 0xffffffff; + o.m_regs[REG_MHI] = (result >> 32) & 0xffffffff; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Optional for ARCtangent-A5/ARC600, not available as an option on ARC700 +// +// 32 x 32 Unsigned Multiply +// special handling, destination register is always the multiply result register, a is ignored +// MULU64 <0,>b,c 0010 1bbb 0000 0101 0BBB CCCC CC11 1110 +// MULU64 <0,>b,u6 0010 1bbb 0100 0101 0BBB uuuu uu11 1110 +// MULU64 <0,>b,s12 0010 1bbb 1000 0101 0BBB ssss ssSS SSSS +// MULU64 <0,>limm,c 0010 1110 0000 0101 0111 CCCC CC11 1110 (+ Limm) +// +// MULU64<.cc> <0,>b,c 0010 1bbb 1100 0101 0BBB CCCC CC0Q QQQQ +// MULU64<.cc> <0,>b,u6 0010 1bbb 1100 0101 0BBB uuuu uu1Q QQQQ +// MULU64<.cc> <0,>limm,c 0010 1110 1100 0101 0111 CCCC CC0Q QQQQ (+ Limm) +// MULU64<.cc> <0,>b,limm 0010 1bbb 1100 0101 0BBB 1111 100Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +void arcompact_device::handleop32_MULU64_do_op(arcompact_device &o, uint32_t src1, uint32_t src2) +{ + uint64_t result = src1 * src2; + o.m_regs[REG_MLO] = result & 0xffffffff; + o.m_regs[REG_MMID] = (result >> 16) & 0xffffffff; + o.m_regs[REG_MHI] = (result >> 32) & 0xffffffff; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADDS<.f> a,b,c 0010 1bbb 0000 0110 FBBB CCCC CCAA AAAA +// ADDS<.f> a,b,u6 0010 1bbb 0100 0110 FBBB uuuu uuAA AAAA +// ADDS<.f> b,b,s12 0010 1bbb 1000 0110 FBBB ssss ssSS SSSS +// ADDS<.cc><.f> b,b,c 0010 1bbb 1100 0110 FBBB CCCC CC0Q QQQQ +// ADDS<.cc><.f> b,b,u6 0010 1bbb 1100 0110 FBBB uuuu uu1Q QQQQ +// ADDS<.f> a,limm,c 0010 1110 0000 0110 F111 CCCC CCAA AAAA (+ Limm) +// ADDS<.f> a,b,limm 0010 1bbb 0000 0110 FBBB 1111 10AA AAAA (+ Limm) +// ADDS<.cc><.f> b,b,limm 0010 1bbb 1100 0110 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ADDS<.f> 0,b,c 0010 1bbb 0000 0110 FBBB CCCC CC11 1110 +// ADDS<.f> 0,b,u6 0010 1bbb 0100 0110 FBBB uuuu uu11 1110 +// ADDS<.f> 0,b,limm 0010 1bbb 0000 0110 FBBB 1111 1011 1110 (+ Limm) +// ADDS<.cc><.f> 0,limm,c 0010 1110 1100 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ADDS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("ADDS unhandled"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SUBS<.f> a,b,c 0010 1bbb 0000 0111 FBBB CCCC CCAA AAAA +// SUBS<.f> a,b,u6 0010 1bbb 0100 0111 FBBB uuuu uuAA AAAA +// SUBS<.f> b,b,s12 0010 1bbb 1000 0111 FBBB ssss ssSS SSSS +// SUBS<.cc><.f> b,b,c 0010 1bbb 1100 0111 FBBB CCCC CC0Q QQQQ +// SUBS<.cc><.f> b,b,u6 0010 1bbb 1100 0111 FBBB uuuu uu1Q QQQQ +// SUBS<.f> a,limm,c 0010 1110 0000 0111 F111 CCCC CCAA AAAA (+ Limm) +// SUBS<.f> a,b,limm 0010 1bbb 0000 0111 FBBB 1111 10AA AAAA (+ Limm) +// SUBS<.cc><.f> b,b,limm 0010 1bbb 1100 0111 FBBB 1111 10QQ QQQQ (+ Limm) +// +// SUBS<.f> 0,b,c 0010 1bbb 0000 0111 FBBB CCCC CC11 1110 +// SUBS<.f> 0,b,u6 0010 1bbb 0100 0111 FBBB uuuu uu11 1110 +// SUBS<.f> 0,b,limm 0010 1bbb 0000 0111 FBBB 1111 1011 1110 (+ Limm) +// SUBS<.cc><.f> 0,limm,c 0010 1110 1100 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SUBS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("SUBS unhandled"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// DIVAW a,b,c 0010 1bbb 0000 1000 0BBB CCCC CCAA AAAA +// DIVAW a,b,u6 0010 1bbb 0100 1000 0BBB uuuu uuAA AAAA +// DIVAW b,b,s12 0010 1bbb 1000 1000 0BBB ssss ssSS SSSS +// DIVAW<.cc> b,b,c 0010 1bbb 1100 1000 0BBB CCCC CC0Q QQQQ +// DIVAW<.cc> b,b,u6 0010 1bbb 1100 1000 0BBB uuuu uu1Q QQQQ +// DIVAW a,limm,c 0010 1110 0000 1000 0111 CCCC CCAA AAAA (+ Limm) +// DIVAW a,b,limm 0010 1bbb 0000 1000 0BBB 1111 10AA AAAA (+ Limm) +// DIVAW<.cc> b,b,limm 0010 1bbb 1100 1000 0BBB 1111 10QQ QQQQ (+ Limm) +// +// DIVAW 0,b,c 0010 1bbb 0000 1000 0BBB CCCC CC11 1110 +// DIVAW 0,b,u6 0010 1bbb 0100 1000 0BBB uuuu uu11 1110 +// DIVAW<.cc> 0,limm,c 0010 1110 1100 1000 0111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_DIVAW_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("DIVAW unhandled"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ASLS<.f> a,b,c 0010 1bbb 0000 1010 FBBB CCCC CCAA AAAA +// ASLS<.f> a,b,u6 0010 1bbb 0100 1010 FBBB uuuu uuAA AAAA +// ASLS<.f> b,b,s12 0010 1bbb 1000 1010 FBBB ssss ssSS SSSS +// ASLS<.cc><.f> b,b,c 0010 1bbb 1100 1010 FBBB CCCC CC0Q QQQQ +// ASLS<.cc><.f> b,b,u6 0010 1bbb 1100 1010 FBBB uuuu uu1Q QQQQ +// ASLS<.f> a,limm,c 0010 1110 0000 1010 F111 CCCC CCAA AAAA (+ Limm) +// ASLS<.f> a,b,limm 0010 1bbb 0000 1010 FBBB 1111 10AA AAAA (+ Limm) +// ASLS<.cc><.f> b,b,limm 0010 1bbb 1100 1010 FBBB 1111 10QQ QQQQ (+ Limm) +// ASLS<.f> 0,b,c 0010 1bbb 0000 1010 FBBB CCCC CC11 1110 +// ASLS<.f> 0,b,u6 0010 1bbb 0100 1010 FBBB uuuu uu11 1110 +// ASLS<.cc><.f> 0,limm,c 0010 1110 1100 1010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ASLS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("ASLS unhandled"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ASRS<.f> a,b,c 0010 1bbb 0000 1011 FBBB CCCC CCAA AAAA +// ASRS<.f> a,b,u6 0010 1bbb 0100 1011 FBBB uuuu uuAA AAAA +// ASRS<.f> b,b,s12 0010 1bbb 1000 1011 FBBB ssss ssSS SSSS +// ASRS<.cc><.f> b,b,c 0010 1bbb 1100 1011 FBBB CCCC CC0Q QQQQ +// ASRS<.cc><.f> b,b,u6 0010 1bbb 1100 1011 FBBB uuuu uu1Q QQQQ +// ASRS<.f> a,limm,c 0010 1110 0000 1011 F111 CCCC CCAA AAAA (+ Limm) +// ASRS<.f> a,b,limm 0010 1bbb 0000 1011 FBBB 1111 10AA AAAA (+ Limm) +// ASRS<.cc><.f> b,b,limm 0010 1bbb 1100 1011 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ASRS<.f> 0,b,c 0010 1bbb 0000 1011 FBBB CCCC CC11 1110 +// ASRS<.f> 0,b,u6 0010 1bbb 0100 1011 FBBB uuuu uu11 1110 +// ASRS<.cc><.f> 0,limm,c 0010 1110 1100 1011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ASRS_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("ASRS unhandled"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADDSDW<.f> a,b,c 0010 1bbb 0010 1000 FBBB CCCC CCAA AAAA +// ADDSDW<.f> a,b,u6 0010 1bbb 0110 1000 FBBB uuuu uuAA AAAA +// ADDSDW<.f> b,b,s12 0010 1bbb 1010 1000 FBBB ssss ssSS SSSS +// ADDSDW<.cc><.f> b,b,c 0010 1bbb 1110 1000 FBBB CCCC CC0Q QQQQ +// ADDSDW<.cc><.f> b,b,u6 0010 1bbb 1110 1000 FBBB uuuu uu1Q QQQQ +// ADDSDW<.f> a,limm,c 0010 1110 0010 1000 F111 CCCC CCAA AAAA (+ Limm) +// ADDSDW<.f> a,b,limm 0010 1bbb 0010 1000 FBBB 1111 10AA AAAA (+ Limm) +// ADDSDW<.cc><.f> b,b,limm 0010 1bbb 1110 1000 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ADDSDW<.f> 0,b,c 0010 1bbb 0010 1000 FBBB CCCC CC11 1110 +// ADDSDW<.f> 0,b,u6 0010 1bbb 0110 1000 FBBB uuuu uu11 1110 +// ADDSDW<.cc><.f> 0,limm,c 0010 1110 1110 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ADDSDW_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("ADDSDW unhandled"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SUBSDW<.f> a,b,c 0010 1bbb 0010 1001 FBBB CCCC CCAA AAAA +// SUBSDW<.f> a,b,u6 0010 1bbb 0110 1001 FBBB uuuu uuAA AAAA +// SUBSDW<.f> b,b,s12 0010 1bbb 1010 1001 FBBB ssss ssSS SSSS +// SUBSDW<.cc><.f> b,b,c 0010 1bbb 1110 1001 FBBB CCCC CC0Q QQQQ +// SUBSDW<.cc><.f> b,b,u6 0010 1bbb 1110 1001 FBBB uuuu uu1Q QQQQ +// SUBSDW<.f> a,limm,c 0010 1110 0010 1001 F111 CCCC CCAA AAAA (+ Limm) +// SUBSDW<.f> a,b,limm 0010 1bbb 0010 1001 FBBB 1111 10AA AAAA (+ Limm) +// SUBSDW<.cc><.f> b,b,limm 0010 1bbb 1110 1001 FBBB 1111 10QQ QQQQ (+ Limm) +// +// SUBSDW<.f> 0,b,c 0010 1bbb 0010 1001 FBBB CCCC CC11 1110 +// SUBSDW<.f> 0,b,u6 0010 1bbb 0110 1001 FBBB uuuu uu11 1110 +// SUBSDW<.cc><.f> 0,limm,c 0010 1110 1110 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SUBSDW_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("SUBSDW unhandled"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unknown Extension Ops +// +// the Leapster BIOS makes use of these in one small area of the code +// probably dual-16bit ops, but also making use of a bunch of AUX ports for data? +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_UNKNOWN_05_0c_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("UNKNOWN_05_0c unhandled"); +} + +uint32_t arcompact_device::handleop32_UNKNOWN_05_10_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("UNKNOWN_05_10 unhandled"); +} + +uint32_t arcompact_device::handleop32_UNKNOWN_05_14_do_op(arcompact_device &o, uint32_t src1, uint32_t src2, bool set_flags) +{ + fatalerror("UNKNOWN_05_14 unhandled"); +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_05_2f_sop.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_05_2f_sop.cpp new file mode 100644 index 00000000000..a5c1bf8db89 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_05_2f_sop.cpp @@ -0,0 +1,177 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SWAP - Swap words (optional extension on ARCtangent-A5 / ARC600, built in on ARC700) +// +// SWAP<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0000 +// SWAP<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0000 +// SWAP<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0000 (+ Limm) +// +// SWAP<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0000 +// SWAP<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0000 +// SWAP<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SWAP_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result = (((src & 0xffff0000) >> 16) | ((src & 0x0000ffff) << 16)); + + if (set_flags) + o.do_flags_nz(result); + + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NORM<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0001 +// NORM<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0001 +// NORM<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0001 (+ Limm) +// +// NORM<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0001 +// NORM<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0001 +// NORM<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_NORM_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result; + + if ((src == 0xffffffff) || (src == 0x00000000)) + result = 0x1f; + else if (src & 0x80000000) + result = count_leading_ones_32(src); + else + result = count_leading_zeros_32(src); + + if (set_flags) + o.do_flags_nz(src); + + return result; +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SAT16<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0010 +// SAT16<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0010 +// SAT16<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0010 (+ Limm) +// +// SAT16<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0010 +// SAT16<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0010 +// SAT16<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_SAT16_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + fatalerror("Unhandled SAT16"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RND16<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0011 +// RND16<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0011 +// RND16<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0011 (+ Limm) +// +// RND16<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0011 +// RND16<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0011 +// RND16<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_RND16_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + fatalerror("Unhandled RND16"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ABSSW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0100 +// ABSSW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0100 +// ABSSW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0100 (+ Limm) +// +// ABSSW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0100 +// ABSSW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0100 +// ABSSW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ABSSW_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + fatalerror("Unhandled ABSSW"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ABSS<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0101 +// ABSS<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0101 +// ABSS<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0101 (+ Limm) +// +// ABSS<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0101 +// ABSS<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0101 +// ABSS<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0101 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_ABSS_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + fatalerror("Unhandled ABSS"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NEGSW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0110 +// NEGSW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0110 +// NEGSW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0110 (+ Limm) +// +// NEGSW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0110 +// NEGSW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0110 +// NEGSW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_NEGSW_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + fatalerror("Unhandled NEGSW"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NEGS<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0111 +// NEGS<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0111 +// NEGS<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0111 (+ Limm) +// +// NEGS<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0111 +// NEGS<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0111 +// NEGS<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0111 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_NEGS_do_op(arcompact_device& o, uint32_t src, bool set_flags) +{ + fatalerror("Unhandled NEGS"); +} + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NORMW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 1000 +// NORMW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 1000 +// NORMW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 1000 (+ Limm) +// +// NORMW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 1000 +// NORMW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 1000 +// NORMW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 1000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +uint32_t arcompact_device::handleop32_NORMW_do_op(arcompact_device &o, uint32_t src, bool set_flags) +{ + uint32_t result; + + uint32_t source = src; + if (source & 0x00008000) + source |= 0xffff0000; + else + source &= 0x0000ffff; + + if ((source == 0x0000ffff) || (source == 0x00000000)) + result = 0x0f; + else if (source & 0x00008000) + result = count_leading_ones_32(source) - 0x10; + else + result = count_leading_zeros_32(source) - 0x10; + + if (set_flags) + fatalerror("handleop32_NORMW (F set)\n"); // not yet supported + + return result; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_06to0b.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_06to0b.cpp new file mode 100644 index 00000000000..a13ae223e4e --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_06to0b.cpp @@ -0,0 +1,41 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +uint32_t arcompact_device::handleop32_ARC_EXT06(uint32_t op) +{ + fatalerror("op a,b,c (06 ARC ext) (%08x)", op); + return m_pc + 4; +} + +uint32_t arcompact_device::handleop32_USER_EXT07(uint32_t op) +{ + fatalerror("op a,b,c (07 User ext) (%08x)", op); + return m_pc + 4; +} + +uint32_t arcompact_device::handleop32_USER_EXT08(uint32_t op) +{ + fatalerror("op a,b,c (08 User ext) (%08x)", op); + return m_pc + 4; +} + +uint32_t arcompact_device::handleop32_MARKET_EXT09(uint32_t op) +{ + fatalerror("op a,b,c (09 Market ext) (%08x)", op); + return m_pc + 4; +} + +uint32_t arcompact_device::handleop32_MARKET_EXT0a(uint32_t op) +{ + fatalerror("op a,b,c (0a Market ext) (%08x)", op); + return m_pc + 4; +} + +uint32_t arcompact_device::handleop32_MARKET_EXT0b(uint32_t op) +{ + fatalerror("op a,b,c (0b Market ext) (%08x)", op); + return m_pc + 4; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_0c_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_0c_16bit.cpp new file mode 100644 index 00000000000..eef4d5c9e1d --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_0c_16bit.cpp @@ -0,0 +1,61 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I S S +// LD_S a,[b,c] 0110 0bbb ccc0 0aaa +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LD_S_a_b_c(uint16_t op) +{ + uint8_t areg = common16_get_and_expand_areg(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + m_regs[areg] = READ32(m_regs[breg] + m_regs[creg]); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S S +// LDB_S a,[b,c] 0110 0bbb ccc0 1aaa +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDB_S_a_b_c(uint16_t op) +{ + uint8_t areg = common16_get_and_expand_areg(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + m_regs[areg] = READ8(m_regs[breg] + m_regs[creg]); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S S +// LDW_S a,[b,c] 0110 0bbb ccc1 0aaa +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDW_S_a_b_c(uint16_t op) +{ + uint8_t areg = common16_get_and_expand_areg(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + m_regs[areg] = READ16(m_regs[breg] + m_regs[creg]); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S S +// ADD_S a,b,c 0110 0bbb ccc1 1aaa +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD_S_a_b_c(uint16_t op) // ADD_S a <- b + c +{ + uint8_t areg = common16_get_and_expand_areg(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + m_regs[areg] = m_regs[breg] + m_regs[creg]; + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_0d_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_0d_16bit.cpp new file mode 100644 index 00000000000..6d74b73565c --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_0d_16bit.cpp @@ -0,0 +1,66 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// ADD_S c,b,u3 0110 1bbb ccc0 0uuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD_S_c_b_u3(uint16_t op) +{ + uint32_t u = common16_get_u3(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] + u; + m_regs[creg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// SUB_S c,b,u3 0110 1bbb ccc0 1uuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_SUB_S_c_b_u3(uint16_t op) +{ + uint32_t u = common16_get_u3(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] - u; + m_regs[creg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S S +// ASL_S c,b,u3 0110 1bbb ccc1 0uuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASL_S_c_b_u3(uint16_t op) +{ + uint32_t u = common16_get_u3(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] << u; + m_regs[creg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S S +// ASR_S c,b,u3 0110 1bbb ccc1 1uuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASR_S_c_b_u3(uint16_t op) +{ + uint32_t u = common16_get_u3(op); + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t source = m_regs[breg]; + uint32_t result = source >> u; + if (source & 0x80000000) + result |= 0xffffffff << (31 - u); + m_regs[creg] = result; + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_0e_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_0e_16bit.cpp new file mode 100644 index 00000000000..d281b4d5cd6 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_0e_16bit.cpp @@ -0,0 +1,66 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I S S +// ADD_S b,b,h 0111 0bbb hhh0 0HHH +// ADD_S b,b,limm 0111 0bbb 1100 0111 (+ Limm) +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD_S_b_b_h_or_limm(uint16_t op) // ADD_s b, b, h +{ + uint8_t h = group_0e_get_h(op); + uint8_t breg = common16_get_and_expand_breg(op); + int size = check_limm16(h); + m_regs[breg] = m_regs[breg] + m_regs[h]; + return m_pc + size; +} + +// ####################################################################################################################### +// IIII I S S +// MOV_S b,h 0111 0bbb hhh0 1HHH +// MOV_S b,limm 0111 0bbb 1100 1111 (+ Limm) +// ####################################################################################################################### + +// 16-bit MOV with extended register range +uint32_t arcompact_device::handleop_MOV_S_b_h_or_limm(uint16_t op) // MOV_S b <- h +{ + uint8_t h = group_0e_get_h(op); + uint8_t breg = common16_get_and_expand_breg(op); + int size = check_limm16(h); + m_regs[breg] = m_regs[h]; + return m_pc + size; +} + +// ####################################################################################################################### +// IIII I S S +// CMP_S b,h 0111 0bbb hhh1 0HHH +// CMP_S b,limm 0111 0bbb 1101 0111 (+ Limm) +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_CMP_S_b_h_or_limm(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t h = group_0e_get_h(op); + int size = check_limm16(h); + // flag setting ALWAYS occurs on CMP operations, even 16-bit ones even without a .F opcode type + uint32_t result = m_regs[breg] - m_regs[h]; + do_flags_sub(result, m_regs[breg], m_regs[h]); + return m_pc + size; +} + +// ####################################################################################################################### +// IIII I S S +// MOV_S h,b 0111 0bbb hhh1 1HHH +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_MOV_S_h_b(uint16_t op) // MOV_S h <- b +{ + uint8_t h = group_0e_get_h(op); + uint8_t breg = common16_get_and_expand_breg(op); + m_regs[h] = m_regs[breg]; + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_07_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_07_16bit.cpp new file mode 100644 index 00000000000..942eb6d126c --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_07_16bit.cpp @@ -0,0 +1,78 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// NOP_S 0111 1000 1110 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_NOP_S(uint16_t op) +{ + return m_pc + 2; +} + +// ####################################################################################################################### +// Unimplemented Instruction, same as illegal, but recommended to fill blank space +// IIII I$$$ sssS SSSS +// UNIMP_S 0111 1001 1110 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_UNIMP_S(uint16_t op) +{ + fatalerror("UNIMP_S"); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// JEQ_S [blink] 0111 1100 1110 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_JEQ_S_blink(uint16_t op) +{ + if (status32_check_z()) + { + return m_regs[REG_BLINK]; + } + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// JNE_S [blink] 0111 1101 1110 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_JNE_S_blink(uint16_t op) +{ + if (!status32_check_z()) + { + return m_regs[REG_BLINK]; + } + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// J_S [blink] 0111 1110 1110 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_J_S_blink(uint16_t op) // J_S [blink] +{ + return m_regs[REG_BLINK]; +} + +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// J_S.D [blink] 0111 1111 1110 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_J_S_D_blink(uint16_t op) // J_S.D [blink] +{ + m_delayactive = true; + m_delayjump = m_regs[REG_BLINK]; + m_delaylinks = false; + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_16bit.cpp new file mode 100644 index 00000000000..aea8df03be9 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_0f_00_16bit.cpp @@ -0,0 +1,73 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I sssS SSSS +// J_S [b] 0111 1bbb 0000 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_J_S_b(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + return m_regs[breg]; +} + +// ####################################################################################################################### +// IIII I sssS SSSS +// J_S.D [b] 0111 1bbb 0010 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_J_S_D_b(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + m_delayactive = true; + m_delayjump = m_regs[breg]; + m_delaylinks = false; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I sssS SSSS +// JL_S [b] 0111 1bbb 0100 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_JL_S_b(uint16_t op) // JL_S +{ + uint8_t breg = common16_get_and_expand_breg(op); + m_regs[REG_BLINK] = m_pc + 2; + return m_regs[breg]; +} + +// ####################################################################################################################### +// IIII I sssS SSSS +// JL_S.D [b] 0111 1bbb 0110 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_JL_S_D_b(uint16_t op) // JL_S.D +{ + uint8_t breg = common16_get_and_expand_breg(op); + m_delayactive = true; + m_delayjump = m_regs[breg]; + m_delaylinks = true; + return m_pc + 2; +} + +// ####################################################################################################################### +// SUB_S.NE b,b,b 0111 1bbb 1100 0000 +// IIII I sssS SSSS +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_SUB_S_NE_b_b_b(uint16_t op) +{ + // opcode clears a register if 'z' is 0 + if (condition_NE()) + { + uint8_t breg = common16_get_and_expand_breg(op); + //m_regs[breg] = m_regs[breg] - m_regs[breg]; + m_regs[breg] = 0; + } + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_0f_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_0f_16bit.cpp new file mode 100644 index 00000000000..58a8acf6840 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_0f_16bit.cpp @@ -0,0 +1,370 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I S SSSS +// SUB_S b,b,c 0111 1bbb ccc0 0010 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_SUB_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] - m_regs[creg]; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// AND_S b,b,c 0111 1bbb ccc0 0100 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_AND_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] & m_regs[creg]; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// OR_S b,b,c 0111 1bbb ccc0 0101 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_OR_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] | m_regs[creg]; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// BIC_S b,b,c 0111 1bbb ccc0 0110 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BIC_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] & ~m_regs[creg]; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// XOR_S b,b,c 0111 1bbb ccc0 0111 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_XOR_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] ^ m_regs[creg]; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// TST_S b,c 0111 1bbb ccc0 1011 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_TST_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] & m_regs[creg]; + // unlike most 16-bit opcodes, TST_S sets flags + if (!result) { status32_set_z(); } + else { status32_clear_z(); } + if (result & 0x8000000) { status32_set_n(); } + else { status32_clear_n(); } + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// MUL64_S <0,>b,c 0111 1bbb ccc0 1100 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_MUL64_S_0_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint64_t result = (int32_t)m_regs[breg] * (int32_t)m_regs[creg]; + m_regs[REG_MLO] = result & 0xffffffff; + m_regs[REG_MMID] = (result >> 16) & 0xffffffff; + m_regs[REG_MHI] = (result >> 32) & 0xffffffff; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// SEXB_S b,c 0111 1bbb ccc0 1101 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_SEXB_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t source = m_regs[creg]; + uint32_t result = util::sext(source, 8); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// SEXW_S b,c 0111 1bbb ccc0 1110 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_SEXW_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t source = m_regs[creg]; + uint32_t result = util::sext(source, 16); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// EXTB_S b,c 0111 1bbb ccc0 1111 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_EXTB_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[creg] & 0x000000ff; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// EXTW_S b,c 0111 1bbb ccc1 0000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_EXTW_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[creg] & 0x0000ffff; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ABS_S b,c 0111 1bbb ccc1 0001 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ABS_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t source = m_regs[creg]; + uint32_t result; + if (source & 0x80000000) + result = 0x80000000 - (source & 0x7fffffff); + else + result = source; + + m_regs[breg] = result; + return m_pc + 2; + +} + +// ####################################################################################################################### +// IIII I S SSSS +// NOT_S b,c 0111 1bbb ccc1 0010 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_NOT_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + m_regs[breg] = m_regs[creg] ^ 0xffffffff; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// NEG_S b,c 0111 1bbb ccc1 0011 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_NEG_S_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = 0 - m_regs[creg]; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ADD1_S b,b,c 0111 1bbb ccc1 0100 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD1_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] + (m_regs[creg] << 1); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ADD2_S b,b,c 0111 1bbb ccc1 0101 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD2_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] + (m_regs[creg] << 2); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ADD3_S b,b,c 0111 1bbb ccc1 0110 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD3_S_b_b_c(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] + (m_regs[creg] << 3); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ASL_S b,b,c 0111 1bbb ccc1 1000 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASL_S_b_b_c_multiple(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] << (m_regs[creg] & 0x1f); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// LSR_S b,b,c 0111 1bbb ccc1 1001 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LSR_S_b_b_c_multiple(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[breg] >> (m_regs[creg] & 0x1f); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ASR_S b,b,c 0111 1bbb ccc1 1010 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASR_S_b_b_c_multiple(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t source = m_regs[breg]; + uint32_t source2 = m_regs[creg]; + uint32_t result = source >> (source2 & 0x1f); + if (source & 0x80000000) + result |= 0xffffffff << (31 - (source2 & 0x1f)); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ASL_S b,c 0111 1bbb ccc1 1011 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASL_S_b_c_single(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[creg] << 1; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// ASR_S b,c 0111 1bbb ccc1 1100 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASR_S_b_c_single(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t source = m_regs[creg]; + uint32_t result = source >> 1; + if (source & 0x80000000) + result |= 0x80000000; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// LSR_S b,c 0111 1bbb ccc1 1101 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LSR_S_b_c_single(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t result = m_regs[creg] >> 1; + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I S SSSS +// TRAP_S u6 0111 1uuu uuu1 1110 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_TRAP_S_u6(uint16_t op) // special +{ + fatalerror("unimplemented TRAP_S %04x", op); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII Isss sssS SSSS +// BRK_S 0111 1111 1111 1111 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BRK_S(uint16_t op) // special +{ + fatalerror("unimplemented BRK_S %04x", op); + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_12to16_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_12to16_16bit.cpp new file mode 100644 index 00000000000..a1034622d83 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_12to16_16bit.cpp @@ -0,0 +1,104 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I +// LD_S c,[b,u7] 1000 0bbb cccu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LD_S_c_b_u7(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t u = common16_get_u5(op) << 2; + m_regs[creg] = READ32((m_regs[breg] + u)); + return m_pc + 2; +} +// ####################################################################################################################### +// IIII I +// LDB_S c,[b,u5] 1000 1bbb cccu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDB_S_c_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t u = common16_get_u5(op); + m_regs[creg] = READ8((m_regs[breg] + u)); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I +// LDW_S c,[b,u6] 1001 0bbb cccu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDW_S_c_b_u6(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t u = common16_get_u5(op) << 1; + m_regs[creg] = READ16((m_regs[breg] + u)); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I +// LDW_S.X c,[b,u6] 1001 1bbb cccu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDW_S_X_c_b_u6(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t u = common16_get_u5(op) << 1; + m_regs[creg] = READ16((m_regs[breg] + u)); + m_regs[creg] = util::sext(m_regs[creg] & 0xffff, 16); + + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I +// ST_S c,[b,u7] 1010 0bbb cccu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ST_S_c_b_u7(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t u = common16_get_u5(op) << 2; + WRITE32((m_regs[breg] + u), m_regs[creg]); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I +// STB_S c,[b,u5] 1010 1bbb cccu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_STB_S_c_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t u = common16_get_u5(op); + WRITE8((m_regs[breg] + u), m_regs[creg]); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I +// STW_S c,[b,u6] 1011 0bbb cccu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_STW_S_c_b_u6(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint8_t creg = common16_get_and_expand_creg(op); + uint32_t u = common16_get_u5(op) << 1; + WRITE16((m_regs[breg] + u), m_regs[creg]); + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_17_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_17_16bit.cpp new file mode 100644 index 00000000000..3146bc78426 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_17_16bit.cpp @@ -0,0 +1,114 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I SSS +// ASL_S b,b,u5 1011 1bbb 000u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASL_S_b_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + m_regs[breg] = m_regs[breg] << (u & 0x1f); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// LSR_S b,b,u5 1011 1bbb 001u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LSR_S_b_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + m_regs[breg] = m_regs[breg] >> (u & 0x1f); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// ASR_S b,b,u5 1011 1bbb 010u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ASR_S_b_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + uint32_t source = m_regs[breg]; + uint32_t result = m_regs[breg] >> (u & 0x1f); + if (source & 0x80000000) + result |= 0xffffffff << (31 - (u & 0x1f)); + m_regs[breg] = result; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// SUB_S b,b,u5 1011 1bbb 011u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_SUB_S_b_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + m_regs[breg] = m_regs[breg] - u; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// BSET_S b,b,u5 1011 1bbb 100u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BSET_S_b_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + m_regs[breg] = m_regs[breg] | (1 << (u & 0x1f)); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// BCLR_S b,b,u5 1011 1bbb 101u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BCLR_S_b_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + m_regs[breg] = m_regs[breg] & ~(1 << u); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// BMSK_S b,b,u5 1011 1bbb 110u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BMSK_S_b_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + m_regs[breg] = m_regs[breg] & ((1 << (u + 1)) - 1); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// BTST_S b,u5 1011 1bbb 111u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BTST_S_b_u5(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + uint32_t result = m_regs[breg] & (1 << u); + do_flags_nz(result); + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_18_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_18_16bit.cpp new file mode 100644 index 00000000000..b4ef609f44c --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_18_16bit.cpp @@ -0,0 +1,154 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII I SSS +// LD_S b,[sp,u7] 1100 0bbb 000u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LD_S_b_sp_u7(uint16_t op) // LD_S b, [SP, u7] +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + uint32_t address = m_regs[REG_SP] + (u << 2); + m_regs[breg] = READ32(address); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// LDB_S b,[sp,u7] 1100 0bbb 001u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDB_S_b_sp_u7(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + uint32_t address = m_regs[REG_SP] + (u << 2); + m_regs[breg] = READ8(address); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// ST_S b,[sp,u7] 1100 0bbb 010u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ST_S_b_sp_u7(uint16_t op) // ST_S b, [SP, u7] +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + uint32_t address = m_regs[REG_SP] + (u << 2); + WRITE32(address, m_regs[breg]); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// STB_S b,[sp,u7] 1100 0bbb 011u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_STB_S_b_sp_u7(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + uint32_t address = m_regs[REG_SP] + (u << 2); // still dword aligned u7 despite being a byte write + WRITE8(address, m_regs[breg] & 0xff); // only write a byte, despite register being 32-bit? + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSS +// ADD_S b,sp,u7 1100 0bbb 100u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD_S_b_sp_u7(uint16_t op) // ADD_S b, SP, u7 +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u5(op); + m_regs[breg] = m_regs[REG_SP] + (u << 2); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII Isss SSS +// ADD_S sp,sp,u7 1100 0000 101u uuuu +// ####################################################################################################################### + +// op bits remaining for 0x18_05_xx subgroups 0x001f +uint32_t arcompact_device::handleop_ADD_S_sp_sp_u7(uint16_t op) +{ + uint32_t u = common16_get_u5(op); + m_regs[REG_SP] = m_regs[REG_SP] + (u << 2); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII Isss SSS +// SUB_S sp,sp,u7 1100 0001 101u uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_SUB_S_sp_sp_u7(uint16_t op) +{ + uint32_t u = common16_get_u5(op); + m_regs[REG_SP] = m_regs[REG_SP] - (u << 2); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSSs ssss +// POP_S b 1100 0bbb 1100 0001 +// ####################################################################################################################### + +// op bits remaining for 0x18_06_xx subgroups 0x0700 +uint32_t arcompact_device::handleop_POP_S_b(uint16_t op) // POP_S b +{ + uint8_t breg = common16_get_and_expand_breg(op); + m_regs[breg] = READ32(m_regs[REG_SP]); + m_regs[REG_SP] += 4; + return m_pc + 2; +} + + +// ####################################################################################################################### +// IIII I SSSs ssss +// POP_S blink 1100 0RRR 1101 0001 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_POP_S_blink(uint16_t op) // POP_S blink +{ + // breg bits are reserved + m_regs[REG_BLINK] = READ32(m_regs[REG_SP]); + m_regs[REG_SP] += 4; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSSs ssss +// PUSH_S b 1100 0bbb 1110 0001 +// ####################################################################################################################### + +// op bits remaining for 0x18_07_xx subgroups 0x0700 +uint32_t arcompact_device::handleop_PUSH_S_b(uint16_t op) // PUSH_S b +{ + uint8_t breg = common16_get_and_expand_breg(op); + m_regs[REG_SP] -= 4; + WRITE32(m_regs[REG_SP], m_regs[breg]); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I SSSs ssss +// PUSH_S blink 1100 0RRR 1111 0001 +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_PUSH_S_blink(uint16_t op) // PUSH_S [blink] +{ + // breg bits are reserved + m_regs[REG_SP] -= 4; + WRITE32(m_regs[REG_SP], m_regs[REG_BLINK]); + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_19_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_19_16bit.cpp new file mode 100644 index 00000000000..8a03a30e78f --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_19_16bit.cpp @@ -0,0 +1,53 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +// ####################################################################################################################### +// IIII ISS +// LD_S r0,[gp,s11] 1100 100s ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LD_S_r0_gp_s11(uint16_t op) +{ + uint32_t s = common16_get_s9(op); + m_regs[0] = READ32(m_regs[REG_GP] + (s << 2)); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII ISS +// LDB_S r0,[gp,s9] 1100 101s ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDB_S_r0_gp_s9(uint16_t op) +{ + uint32_t s = common16_get_s9(op); + m_regs[0] = READ8(m_regs[REG_GP] + s); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII ISS +// LDW_S r0,[gp,s10] 1100 110s ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LDW_S_r0_gp_s10(uint16_t op) +{ + uint32_t s = common16_get_s9(op); + m_regs[0] = READ16(m_regs[REG_GP] + (s << 1)); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII ISS +// ADD_S r0,gp,s11 1100 111s ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD_S_r0_gp_s11(uint16_t op) +{ + uint32_t s = common16_get_s9(op); + m_regs[0] = m_regs[REG_GP] + (s << 2); + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_1ato1c_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_1ato1c_16bit.cpp new file mode 100644 index 00000000000..90fed9733cc --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_1ato1c_16bit.cpp @@ -0,0 +1,60 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" +#include "arcompactdasm.h" + +// ####################################################################################################################### +// IIII I +// LD_S b,[pcl,u10] 1101 0bbb uuuu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_LD_S_b_pcl_u10(uint16_t op) +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u8(op); + m_regs[breg] = READ32(m_regs[REG_PCL] + (u << 2)); + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I +// MOV_S b,u8 1101 1bbb uuuu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_MOV_S_b_u8(uint16_t op) // MOV_S b, u8 +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u8(op); + m_regs[breg] = u; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I s +// ADD_S b,b,u7 1110 0bbb 0uuu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_ADD_S_b_b_u7(uint16_t op) // ADD_S b, b, u7 +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u7(op); + m_regs[breg] = m_regs[breg] + u; + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I s +// CMP_S b,u7 1110 0bbb 1uuu uuuu +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_CMP_S_b_u7(uint16_t op) // CMP b, u7 +{ + uint8_t breg = common16_get_and_expand_breg(op); + uint32_t u = common16_get_u7(op); + // flag setting ALWAYS occurs on CMP operations, even 16-bit ones even without a .F opcode type + uint32_t result = m_regs[breg] - u; + do_flags_sub(result, m_regs[breg], u); + return m_pc + 2; +} diff --git a/src/devices/cpu/arcompact/arcompact_execute_ops_1dto1f_16bit.cpp b/src/devices/cpu/arcompact/arcompact_execute_ops_1dto1f_16bit.cpp new file mode 100644 index 00000000000..9f157ff7d37 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_execute_ops_1dto1f_16bit.cpp @@ -0,0 +1,161 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "arcompact.h" + +inline uint32_t arcompact_device::branch_common(uint16_t op, bool cond, unsigned width) +{ + if (cond) + { + int s = util::sext(op, width); + uint32_t realaddress = (m_pc & 0xfffffffc) + (s * 2); + return realaddress; + } + return m_pc + 2; +} + +// ####################################################################################################################### +// IIII I s +// BREQ_S b,0,s8 1110 1bbb 0sss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BREQ_S_b_0_s8(uint16_t op) // BREQ_S b,0,s8 +{ + uint8_t breg = common16_get_and_expand_breg(op); + return branch_common(op, !m_regs[breg], 7); +} + +// ####################################################################################################################### +// IIII I s +// BRNE_S b,0,s8 1110 1bbb 1sss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BRNE_S_b_0_s8(uint16_t op) // BRNE_S b,0,s8 +{ + uint8_t breg = common16_get_and_expand_breg(op); + return branch_common(op, m_regs[breg], 7); +} + +// ####################################################################################################################### +// IIII ISS +// B_S s10 1111 000s ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_B_S_s10(uint16_t op) // B_S s10 (branch always) +{ + return branch_common(op, true, 9); +} + +// ####################################################################################################################### +// IIII ISS +// BEQ_S s10 1111 001s ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BEQ_S_s10(uint16_t op) // BEQ_S s10 (branch is zero bit is set) +{ + return branch_common(op ,status32_check_z(), 9); +} + +// ####################################################################################################################### +// IIII ISS +// BNE_S s10 1111 010s ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BNE_S_s10(uint16_t op) // BNE_S s10 (branch if zero bit isn't set) +{ + return branch_common(op ,!status32_check_z(), 9); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BGT_S s7 1111 0110 00ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BGT_S_s7(uint16_t op) +{ + return branch_common(op, condition_GT(), 6); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BGE_S s7 1111 0110 01ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BGE_S_s7(uint16_t op) +{ + return branch_common(op, condition_GE(), 6); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BLT_S s7 1111 0110 10ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BLT_S_s7(uint16_t op) // BLT_S +{ + return branch_common(op, condition_LT(), 6); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BLE_S s7 1111 0110 11ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BLE_S_s7(uint16_t op) // BLE_S +{ + return branch_common(op, condition_LE(), 6); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BHI_S s7 1111 0111 00ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BHI_S_s7(uint16_t op) +{ + return branch_common(op, condition_HI(), 6); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BHS_S s7 1111 0111 01ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BHS_S_s7(uint16_t op) +{ + return branch_common(op, condition_HS(), 6); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BLO_S s7 1111 0111 10ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BLO_S_s7(uint16_t op) +{ + return branch_common(op, condition_CS(), 6); +} + +// ####################################################################################################################### +// IIII ISSs ss +// BLS_S s7 1111 0111 11ss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BLS_S_s7(uint16_t op) +{ + return branch_common(op, condition_LS(), 6); +} + +// ####################################################################################################################### +// IIII I +// BL_S s13 1111 1sss ssss ssss +// ####################################################################################################################### + +uint32_t arcompact_device::handleop_BL_S_s13(uint16_t op) // BL_S s13 +{ + int s = util::sext(op, 11); + uint32_t realaddress = (m_pc & 0xfffffffc) + (s * 4); + m_regs[REG_BLINK] = m_pc + 2; + return realaddress; +} diff --git a/src/devices/cpu/arcompact/arcompact_helper.ipp b/src/devices/cpu/arcompact/arcompact_helper.ipp new file mode 100644 index 00000000000..c84332095ff --- /dev/null +++ b/src/devices/cpu/arcompact/arcompact_helper.ipp @@ -0,0 +1,362 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +inline bool arcompact_device::check_condition(uint8_t condition) +{ + switch (condition & 0x1f) + { + case 0x00: return condition_AL(); + case 0x01: return condition_EQ(); + case 0x02: return condition_NE(); + case 0x03: return condition_PL(); + case 0x04: return condition_MI(); + case 0x05: return condition_CS(); + case 0x06: return condition_HS(); + case 0x07: return condition_VS(); + case 0x08: return condition_VC(); + case 0x09: return condition_GT(); + case 0x0a: return condition_GE(); + case 0x0b: return condition_LT(); + case 0x0c: return condition_LE(); + case 0x0d: return condition_HI(); + case 0x0e: return condition_LS(); + case 0x0f: return condition_PNZ(); + + default: fatalerror("unhandled condition check %02x", condition & 0x1f); return false; + } + return false; +} + + +inline void arcompact_device::do_flags_overflow(uint32_t result, uint32_t b, uint32_t c) +{ + if ((b & 0x80000000) == (c & 0x80000000)) + { + if ((result & 0x80000000) != (b & 0x80000000)) + { + status32_set_v(); + } + else + { + status32_clear_v(); + } + } +} + +inline void arcompact_device::do_flags_add(uint32_t result, uint32_t b, uint32_t c) +{ + do_flags_nz(result); + do_flags_overflow(result, b, c); + + if (result < b) + { + status32_set_c(); + } + else + { + status32_clear_c(); + } +} + +inline void arcompact_device::do_flags_sub(uint32_t result, uint32_t b, uint32_t c) +{ + do_flags_nz(result); + do_flags_overflow(result, b, c); + + if (result > b) + { + status32_set_c(); + } + else + { + status32_clear_c(); + } +} + +inline void arcompact_device::do_flags_nz(uint32_t result) +{ + if (result & 0x80000000) { status32_set_n(); } + else { status32_clear_n(); } + if (result == 0x00000000) { status32_set_z(); } + else { status32_clear_z(); } +} + +inline void arcompact_device::arcompact_handle_ld_helper(uint32_t op, uint8_t areg, uint8_t breg, uint32_t s, uint8_t X, uint8_t Z, uint8_t a) +{ + // writeback / increment + if (a == 1) + { + if (breg == REG_LIMM) + fatalerror("illegal LD helper %08x (data size %d mode %d)", op, Z, a); // using the LIMM as the base register and an increment mode is illegal + + m_regs[breg] = m_regs[breg] + s; + } + + uint32_t address = m_regs[breg]; + + // address manipulation + if (a == 0) + { + address = address + s; + } + else if (a == 3) + { + if (Z == 0) + { + address = address + (s << 2); + } + else if (Z == 2) + { + address = address + (s << 1); + } + else // Z == 1 and Z == 3 are invalid here + { + fatalerror("illegal LD helper %08x (data size %d mode %d)", op, Z, a); + } + } + + uint32_t readdata = 0; + + // read data + if (Z == 0) + { + readdata = READ32(address); + m_regs[areg] = readdata; + if (X) // sign extend is not supported for long reads + fatalerror("illegal LD helper %08x (data size %d mode %d with X)", op, Z, a); + } + else if (Z == 1) + { + readdata = READ8(address); + + if (X) + { + readdata = util::sext(readdata, 8); + m_regs[areg] = readdata; + } + else + { + m_regs[areg] = readdata; + } + } + else if (Z == 2) + { + readdata = READ16(address); + + if (X) + { + readdata = util::sext(readdata, 16); + m_regs[areg] = readdata; + } + else + { + m_regs[areg] = readdata; + } + } + else if (Z == 3) + { // Z == 3 is always illegal + fatalerror("illegal LD helper %08x (data size %d mode %d)", op, Z, a); + } + + // writeback / increment + if (a == 2) + { + if (breg == REG_LIMM) + fatalerror("illegal LD helper %08x (data size %d mode %d)", op, Z, a); // using the LIMM as the base register and an increment mode is illegal + + m_regs[breg] = m_regs[breg] + s; + } +} + +inline uint32_t arcompact_device::handleop32_general(uint32_t op, ophandler32 ophandler) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + m_regs[common32_get_areg(op)] = ophandler(*this, m_regs[breg], m_regs[creg], common32_get_F(op)); + return m_pc + size; + } + + case 0x01: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + m_regs[common32_get_areg(op)] = ophandler(*this, m_regs[breg], common32_get_u6(op), common32_get_F(op)); + return m_pc + size; + } + case 0x02: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + m_regs[breg] = ophandler(*this, m_regs[breg], common32_get_s12(op), common32_get_F(op)); + return m_pc + size; + } + case 0x03: + { + switch ((op & 0x00000020) >> 5) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + if (check_condition(common32_get_condition(op))) + m_regs[breg] = ophandler(*this, m_regs[breg], m_regs[creg], common32_get_F(op)); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + if (check_condition(common32_get_condition(op))) + m_regs[breg] = ophandler(*this, m_regs[breg], common32_get_u6(op), common32_get_F(op)); + return m_pc + size; + } + } + } + } + return 0; +} + +inline uint32_t arcompact_device::handleop32_general_MULx64(uint32_t op, ophandler32_mul ophandler) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + ophandler(*this, m_regs[breg], m_regs[creg]); + return m_pc + size; + } + + case 0x01: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + ophandler(*this, m_regs[breg], common32_get_u6(op)); + return m_pc + size; + } + case 0x02: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + ophandler(*this, m_regs[breg], common32_get_s12(op)); + return m_pc + size; + } + case 0x03: + { + switch ((op & 0x00000020) >> 5) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + if (!check_condition(common32_get_condition(op))) + return m_pc + size; + ophandler(*this, m_regs[breg], m_regs[creg]); + return m_pc + size; + } + + case 0x01: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + if (!check_condition(common32_get_condition(op))) + return m_pc + size; + ophandler(*this, m_regs[breg], common32_get_u6(op)); + return m_pc + size; + } + } + } + } + + return 0; +} + +inline uint32_t arcompact_device::handleop32_general_nowriteback_forced_flag(uint32_t op, ophandler32_ff ophandler) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + ophandler(*this, m_regs[breg], m_regs[creg]); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + ophandler(*this, m_regs[breg], common32_get_u6(op)); + return m_pc + size; + } + case 0x02: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + ophandler(*this, m_regs[breg], common32_get_s12(op)); + return m_pc + size; + } + case 0x03: + { + switch ((op & 0x00000020) >> 5) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + if (check_condition(common32_get_condition(op))) + ophandler(*this, m_regs[breg], m_regs[creg]); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + if (check_condition(common32_get_condition(op))) + ophandler(*this, m_regs[breg], common32_get_u6(op)); + return m_pc + size; + } + } + } + } + + return 0; +} + +inline uint32_t arcompact_device::handleop32_general_SOP_group(uint32_t op, ophandler32_sop ophandler) +{ + switch ((op & 0x00c00000) >> 22) + { + case 0x00: + { + uint8_t breg = common32_get_breg(op); + uint8_t creg = common32_get_creg(op); + int size = check_limm(breg, creg); + m_regs[breg] = ophandler(*this, m_regs[creg], common32_get_F(op)); + return m_pc + size; + } + case 0x01: + { + uint8_t breg = common32_get_breg(op); + int size = check_limm(breg); + m_regs[breg] = ophandler(*this, common32_get_u6(op), common32_get_F(op)); + return m_pc + size; + } + case 0x02: + case 0x03: + fatalerror("SOP Group: illegal mode 02/03 specifying use of bits already assigned to opcode select: opcode %04x\n", op); + return 0; + } + return 0; +} diff --git a/src/devices/cpu/arcompact/arcompactdasm.cpp b/src/devices/cpu/arcompact/arcompactdasm.cpp index 7283cfd06b6..05e3fe41b6a 100644 --- a/src/devices/cpu/arcompact/arcompactdasm.cpp +++ b/src/devices/cpu/arcompact/arcompactdasm.cpp @@ -1,7 +1,6 @@ // license:BSD-3-Clause // copyright-holders:David Haywood /*********************************\ - ARCompact disassembler \*********************************/ @@ -14,7 +13,6 @@ u32 arcompact_disassembler::opcode_alignment() const return 2; } - // condition codes (basic ones are the same as arc const char *const arcompact_disassembler::conditions[0x20] = { @@ -486,7 +484,7 @@ const char *const arcompact_disassembler::opcodes_04[0x40] = /* 10 */ "BCLR", /* 11 */ "BTST", /* 12 */ "BXOR", - /* 13 */ "BSMK", + /* 13 */ "BMSK", /* 14 */ "ADD1", /* 15 */ "ADD2", /* 16 */ "ADD3", @@ -535,13 +533,17 @@ const char *const arcompact_disassembler::opcodes_04[0x40] = /* 3f */ "0x3f", }; + + +/*****************************************************************************/ + offs_t arcompact_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { int size; uint32_t op = opcodes.r16(pc); - uint8_t instruction = ((op & 0xf800) >> 11); + uint8_t instruction = ((op & 0xf800) >> 11); if (instruction < 0x0c) { @@ -549,54 +551,2589 @@ offs_t arcompact_disassembler::disassemble(std::ostream &stream, offs_t pc, cons op <<= 16; op |= opcodes.r16(pc+2); - op &= ~0xf8000000; - - switch (instruction) // 32-bit instructions (with optional extra dword for immediate data) + switch (instruction & 0x3f) // 32-bit instructions (with optional extra dword for immediate data) { - case 0x00: size = handle00_dasm(stream, pc, op, opcodes); break; // Bcc - case 0x01: size = handle01_dasm(stream, pc, op, opcodes); break; // BLcc/BRcc - case 0x02: size = handle02_dasm(stream, pc, op, opcodes); break; // LD r+o - case 0x03: size = handle03_dasm(stream, pc, op, opcodes); break; // ST r+o - case 0x04: size = handle04_dasm(stream, pc, op, opcodes); break; // op a,b,c (basecase) - case 0x05: size = handle05_dasm(stream, pc, op, opcodes); break; // op a,b,c (05 ARC ext) - case 0x06: size = handle06_dasm(stream, pc, op, opcodes); break; // op a,b,c (06 ARC ext) - case 0x07: size = handle07_dasm(stream, pc, op, opcodes); break; // op a,b,c (07 User ext) - case 0x08: size = handle08_dasm(stream, pc, op, opcodes); break; // op a,b,c (08 User ext) - case 0x09: size = handle09_dasm(stream, pc, op, opcodes); break; // op a,b,c (09 Market ext) - case 0x0a: size = handle0a_dasm(stream, pc, op, opcodes); break; // op a,b,c (0a Market ext) - case 0x0b: size = handle0b_dasm(stream, pc, op, opcodes); break; // op a,b,c (0b Market ext) + default: break; // size = -1; + case 0x00: // Bcc + { + uint8_t subinstr = (op & 0x00010000) >> 16; + + switch (subinstr & 0x01) + { + default: break; // size = -1; + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// B<.d> s21 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_B_cc_D_s21(stream, pc, op, opcodes); break; // Branch Conditionally + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// B<.d> s25 0000 0sss ssss sss1 SSSS SSSS SSNR tttt +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_B_D_s25(stream, pc, op, opcodes); break; // Branch Unconditionally Far + } + } + break; + } + case 0x01: // BLcc/BRcc + { + uint8_t subinstr = (op & 0x00010000) >> 16; + switch (subinstr & 0x01) + { + default: break; // size = -1; + case 0x00: // Branch & Link + { + uint8_t subinstr2 = (op & 0x00020000) >> 17; + switch (subinstr2) + { + default: break; // size = -1; + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BL<.cc><.d> s21 0000 1sss ssss ss00 SSSS SSSS SSNQ QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BL_cc_d_s21(stream, pc, op, opcodes); break; // Branch and Link Conditionally + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BL<.d> s25 0000 1sss ssss ss10 SSSS SSSS SSNR tttt +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BL_d_s25(stream, pc, op, opcodes); break; // Branch and Link Unconditional Far + } + } + break; + } + case 0x01: // Branch on Compare + { + uint8_t subinstr2 = (op & 0x00000010) >> 4; + + switch (subinstr2) + { + default: break; // size = -1; + case 0x00: // Branch on Compare Register-Register + { + uint8_t subinstr3 = op & 0x0000000f; + switch (subinstr3) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BREQ<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0000 +// BREQ b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0000 (+ Limm) +// BREQ limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BREQ_reg_reg(stream, pc, op, opcodes); break; // BREQ (reg-reg) + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRNE<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0001 +// BRNE b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0001 (+ Limm) +// BRNE limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRNE_reg_reg(stream, pc, op, opcodes); break; // BRNE (reg-reg) + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLT<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0010 +// BRLT b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0010 (+ Limm) +// BRLT limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRLT_reg_reg(stream, pc, op, opcodes); break; // BRLT (reg-reg) + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRGE<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0011 +// BRGE b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0011 (+ Limm) +// BRGE limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRGE_reg_reg(stream, pc, op, opcodes); break; // BRGE (reg-reg) + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLO<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0100 +// BRLO b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0100 (+ Limm) +// BRLO limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRLO_reg_reg(stream, pc, op, opcodes); break; // BRLO (reg-reg) + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRHS b,limm,s9 0000 1bbb ssss sss1 SBBB 1111 1000 0101 (+ Limm) +// BRHS limm,c,s9 0000 1110 ssss sss1 S111 CCCC CC00 0101 (+ Limm) +// BRHS<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 0101 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRHS_reg_reg(stream, pc, op, opcodes); break; // BRHS (reg-reg) + } + case 0x0e: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT0<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 1110 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BBIT0_reg_reg(stream, pc, op, opcodes); break; // BBIT0 (reg-reg) + } + case 0x0f: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT1<.d> b,c,s9 0000 1bbb ssss sss1 SBBB CCCC CCN0 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BBIT1_reg_reg(stream, pc, op, opcodes); break; // BBIT1 (reg-reg) + } + default: + { + // 0x06 - 0x0d + size = handle_dasm_reserved(stream, pc, instruction, subinstr, subinstr2, subinstr3, op, opcodes); break; // reserved + } + } + break; + } + case 0x01: // Branch on Compare/Bit Test Register-Immediate + { + uint8_t subinstr3 = op & 0x0000000f; + switch (subinstr3) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BREQ<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0000 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BREQ_reg_imm(stream, pc, op, opcodes); break; // BREQ (reg-imm) + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRNE<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0001 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRNE_reg_imm(stream, pc, op, opcodes); break; // BRNE (reg-imm) + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLT<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0010 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRLT_reg_imm(stream, pc, op, opcodes); break; // BRLT (reg-imm) + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRGE<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0011 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRGE_reg_imm(stream, pc, op, opcodes); break; // BRGE (reg-imm) + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRLO<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0100 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRLO_reg_imm(stream, pc, op, opcodes); break; // BRLO (reg-imm) + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BRHS<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB UUUU UUN1 0101 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRHS_reg_imm(stream, pc, op, opcodes); break; // BRHS (reg-imm) + } + case 0x0e: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT0<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB uuuu uuN1 1110 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BBIT0_reg_imm(stream, pc, op, opcodes); break; // BBIT0 (reg-imm) + } + case 0x0f: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BBIT1<.d> b,u6,s9 0000 1bbb ssss sss1 SBBB uuuu uuN1 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BBIT1_reg_imm(stream, pc, op, opcodes); break; // BBIT1 (reg-imm) + } + default: + { + // 0x06 - 0x0d + size = handle_dasm_reserved(stream, pc, instruction, subinstr, subinstr2, subinstr3, op, opcodes); break; // reserved + } + } + } + } + } + } + break; + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I +// LD<.x><.aa><.di> a,[b,s9] 0001 0bbb ssss ssss SBBB DaaZ ZXAA AAAA +// LD<.x><.aa><.di> 0,[b,s9] 0001 0bbb ssss ssss SBBB DaaZ ZX11 1110 +// PREFETCH<.aa> [b,s9] 0001 0bbb ssss ssss SBBB 0aa0 0011 1110 +// +// LD<.x><.di> a,[limm] 0001 0110 0000 0000 0111 DRRZ ZXAA AAAA (+ Limm) +// LD<.x><.di> 0,[limm] 0001 0110 0000 0000 0111 DRRZ ZX11 1110 (+ Limm) +// PREFETCH [limm] 0001 0110 0000 0000 0111 0RR0 0011 1110 (+ Limm) +// +// can be used as a POP alias for higher registers +// 40020310: 1404 3410 +// LD.AB r16 <- [r28_SP, 004] 0001 0100 0000 0100 0011 0100 0001 0000 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_LD_r_o(stream, pc, op, opcodes); break; // LD r+o + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I +// ST<.aa><.di> c,[b,s9] 0001 1bbb ssss ssss SBBB CCCC CCDa aZZR +// ST<.di> c,[limm] 0001 1110 0000 0000 0111 CCCC CCDR RZZR (+ Limm) +// ST<.aa><.di> limm,[b,s9] 0001 1bbb ssss ssss SBBB 1111 10Da aZZR (+ Limm) +// +// can be used as a PUSH alias for higher registers +// 400202A6: 1CFC B408 +// ST.AW [r28_SP, 1fc] <- r16 0001 1100 1111 1100 1011 0100 0000 1000 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ST_r_o(stream, pc, op, opcodes); break; // ST r+o + } + case 0x04: // op a,b,c (basecase) + { + uint8_t subinstr = (op & 0x003f0000) >> 16; + + switch (subinstr & 0x3f) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// PP +// General Operations Reg-Reg 0010 0bbb 00ii iiii FBBB CCCC CCAA AAAA +// ADD<.f> a,b,c 0010 0bbb 0000 0000 FBBB CCCC CCAA AAAA +// ADD<.f> a,limm,c 0010 0110 0000 0000 F111 CCCC CCAA AAAA (+ Limm) +// ADD<.f> a,b,limm 0010 0bbb 0000 0000 FBBB 1111 10AA AAAA (+ Limm) +// ADD<.f> 0,b,c 0010 0bbb 0000 0000 FBBB CCCC CC11 1110 +// ADD<.f> 0,b,limm 0010 0bbb 0000 0000 FBBB 1111 1011 1110 (+ Limm) +// +// PP +// Gen Op Reg+6-bit unsigned Imm 0010 0bbb 01ii iiii FBBB UUUU UUAA AAAA +// ADD<.f> a,b,u6 0010 0bbb 0100 0000 FBBB uuuu uuAA AAAA +// ADD<.f> 0,b,u6 0010 0bbb 0100 0000 FBBB uuuu uu11 1110 +// +// PP +// Gen Op Reg+12-bit signed Imm 0010 0bbb 10ii iiii FBBB ssss ssSS SSSS +// ADD<.f> b,b,s12 0010 0bbb 1000 0000 FBBB ssss ssSS SSSS +// +// PP M +// Gen Op Conditional Register 0010 0bbb 11ii iiii FBBB CCCC CC0Q QQQQ +// ADD<.cc><.f> b,b,c 0010 0bbb 1100 0000 FBBB CCCC CC0Q QQQQ +// ADD<.cc><.f> b,b,limm 0010 0bbb 1100 0000 FBBB 1111 100Q QQQQ (+ Limm) +// ADD<.cc><.f> 0,limm,c 0010 0110 1100 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +// PP M +// Gen Op ConReg 6-bit unsign Imm 0010 0bbb 11ii iiii FBBB UUUU UU1Q QQQQ +// ADD<.cc><.f> b,b,u6 0010 0bbb 1100 0000 FBBB uuuu uu1Q QQQQ +// +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ADD(stream, pc, op, opcodes); break; // ADD + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADC<.f> a,b,c 0010 0bbb 0000 0001 FBBB CCCC CCAA AAAA +// ADC<.f> a,b,u6 0010 0bbb 0100 0001 FBBB uuuu uuAA AAAA +// ADC<.f> b,b,s12 0010 0bbb 1000 0001 FBBB ssss ssSS SSSS +// ADC<.cc><.f> b,b,c 0010 0bbb 1100 0001 FBBB CCCC CC0Q QQQQ +// ADC<.cc><.f> b,b,u6 0010 0bbb 1100 0001 FBBB uuuu uu1Q QQQQ +// ADC<.f> a,limm,c 0010 0110 0000 0001 F111 CCCC CCAA AAAA (+ Limm) +// ADC<.f> a,b,limm 0010 0bbb 0000 0001 FBBB 1111 10AA AAAA (+ Limm) +// ADC<.cc><.f> b,b,limm 0010 0bbb 1100 0001 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADC<.f> 0,b,c 0010 0bbb 0000 0001 FBBB CCCC CC11 1110 +// ADC<.f> 0,b,u6 0010 0bbb 0100 0001 FBBB uuuu uu11 1110 +// ADC<.f> 0,b,limm 0010 0bbb 0000 0001 FBBB 1111 1011 1110 (+ Limm) +// ADC<.cc><.f> 0,limm,c 0010 0110 1100 0001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ADC(stream, pc, op, opcodes); break; // ADC + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SUB<.f> a,b,c 0010 0bbb 0000 0010 FBBB CCCC CCAA AAAA +// SUB<.f> a,b,u6 0010 0bbb 0100 0010 FBBB uuuu uuAA AAAA +// SUB<.f> b,b,s12 0010 0bbb 1000 0010 FBBB ssss ssSS SSSS +// SUB<.cc><.f> b,b, c 0010 0bbb 1100 0010 FBBB CCCC CC0Q QQQQ +// SUB<.cc><.f> b,b,u6 0010 0bbb 1100 0010 FBBB uuuu uu1Q QQQQ +// SUB<.f> a,limm,c 0010 0110 0000 0010 F111 CCCC CCAA AAAA (+ Limm) +// SUB<.f> a,b,limm 0010 0bbb 0000 0010 FBBB 1111 10AA AAAA (+ Limm) +// SUB<.cc><.f> b,b,limm 0010 0bbb 1100 0010 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB <.f> 0,b,c 0010 0bbb 0000 0010 FBBB CCCC CC11 1110 +// SUB <.f> 0,b,u6 0010 0bbb 0100 0010 FBBB uuuu uu11 1110 +// SUB <.f> 0,b,limm 0010 0bbb 0000 0010 FBBB 1111 1011 1110 (+ Limm) +// SUB <.cc><.f> 0,limm,c 0010 0110 1100 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SUB(stream, pc, op, opcodes); break; // SUB + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SBC<.f> a,b,c 0010 0bbb 0000 0011 FBBB CCCC CCAA AAAA +// SBC<.f> a,b,u6 0010 0bbb 0100 0011 FBBB uuuu uuAA AAAA +// SBC<.f> b,b,s12 0010 0bbb 1000 0011 FBBB ssss ssSS SSSS +// SBC<.cc><.f> b,b,c 0010 0bbb 1100 0011 FBBB CCCC CC0Q QQQQ +// SBC<.cc><.f> b,b,u6 0010 0bbb 1100 0011 FBBB uuuu uu1Q QQQQ +// SBC<.f> a,limm,c 0010 0110 0000 0011 F111 CCCC CCAA AAAA (+ Limm) +// SBC<.f> a,b,limm 0010 0bbb 0000 0011 FBBB 1111 10AA AAAA (+ Limm) +// SBC<.cc><.f> b,b,limm 0010 0bbb 1100 0011 FBBB 1111 100Q QQQQ (+ Limm) +// +// SBC<.f> 0,b,c 0010 0bbb 0000 0011 FBBB CCCC CC11 1110 +// SBC<.f> 0,b,u6 0010 0bbb 0100 0011 FBBB uuuu uu11 1110 +// SBC<.f> 0,b,limm 0010 0bbb 0000 0011 FBBB 1111 1011 1110 (+ Limm) +// SBC<.cc><.f> 0,limm,c 0010 0110 1100 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SBC(stream, pc, op, opcodes); break; // SBC + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// AND<.f> a,b,c 0010 0bbb 0000 0100 FBBB CCCC CCAA AAAA +// AND<.f> a,b,u6 0010 0bbb 0100 0100 FBBB uuuu uuAA AAAA +// AND<.f> b,b,s12 0010 0bbb 1000 0100 FBBB ssss ssSS SSSS +// AND<.cc><.f> b,b,c 0010 0bbb 1100 0100 FBBB CCCC CC0Q QQQQ +// AND<.cc><.f> b,b,u6 0010 0bbb 1100 0100 FBBB uuuu uu1Q QQQQ +// AND<.f> a,limm,c 0010 0110 0000 0100 F111 CCCC CCAA AAAA (+ Limm) +// AND<.f> a,b,limm 0010 0bbb 0000 0100 FBBB 1111 10AA AAAA (+ Limm) +// AND<.cc><.f> b,b,limm 0010 0bbb 1100 0100 FBBB 1111 100Q QQQQ (+ Limm) +// +// AND<.f> 0,b,c 0010 0bbb 0000 0100 FBBB CCCC CC11 1110 +// AND<.f> 0,b,u6 0010 0bbb 0100 0100 FBBB uuuu uu11 1110 +// AND<.f> 0,b,limm 0010 0bbb 0000 0100 FBBB 1111 1011 1110 (+ Limm) +// AND<.cc><.f> 0,limm,c 0010 0110 1100 0100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_AND(stream, pc, op, opcodes); break; // AND + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// OR<.f> a,b,c 0010 0bbb 0000 0101 FBBB CCCC CCAA AAAA +// OR<.f> a,b,u6 0010 0bbb 0100 0101 FBBB uuuu uuAA AAAA +// OR<.f> b,b,s12 0010 0bbb 1000 0101 FBBB ssss ssSS SSSS +// OR<.cc><.f> b,b,c 0010 0bbb 1100 0101 FBBB CCCC CC0Q QQQQ +// OR<.cc><.f> b,b,u6 0010 0bbb 1100 0101 FBBB uuuu uu1Q QQQQ +// OR<.f> a,limm,c 0010 0110 0000 0101 F111 CCCC CCAA AAAA (+ Limm) +// OR<.f> a,b,limm 0010 0bbb 0000 0101 FBBB 1111 10AA AAAA (+ Limm) +// OR<.cc><.f> b,b,limm 0010 0bbb 1100 0101 FBBB 1111 100Q QQQQ (+ Limm) +// +// OR<.f> 0,b,c 0010 0bbb 0000 0101 FBBB CCCC CC11 1110 +// OR<.f> 0,b,u6 0010 0bbb 0100 0101 FBBB uuuu uu11 1110 +// OR<.f> 0,b,limm 0010 0bbb 0000 0101 FBBB 1111 1011 1110 (+ Limm) +// OR<.cc><.f> 0,limm,c 0010 0110 1100 010 1 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_OR(stream, pc, op, opcodes); break; // OR + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// BIC<.f> a,b,c 0010 0bbb 0000 0110 FBBB CCCC CCAA AAAA +// BIC<.f> a,b,u6 0010 0bbb 0100 0110 FBBB uuuu uuAA AAAA +// BIC<.f> b,b,s12 0010 0bbb 1000 0110 FBBB ssss ssSS SSSS +// BIC<.cc><.f> b,b,c 0010 0bbb 1100 0110 FBBB CCCC CC0Q QQQQ +// BIC<.cc><.f> b,b,u6 0010 0bbb 1100 0110 FBBB uuuu uu1Q QQQQ +// BIC<.f> a,limm,c 0010 0110 0000 0110 F111 CCCC CCAA AAAA (+ Limm) +// BIC<.f> a,b,limm 0010 0bbb 0000 0110 FBBB 1111 10AA AAAA (+ Limm) +// BIC<.cc><.f> b,b,limm 0010 0bbb 1100 0110 FBBB 1111 100Q QQQQ (+ Limm) +// +// BIC<.f> 0,b,c 0010 0bbb 0000 0110 FBBB CCCC CC11 1110 +// BIC<.f> 0,b,u6 0010 0bbb 0100 0110 FBBB uuuu uu11 1110 +// BIC<.f> 0,b,limm 0010 0bbb 0000 0110 FBBB 1111 1011 1110 (+ Limm) +// BIC<.cc><.f> 0,limm,c 0010 0110 1100 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BIC(stream, pc, op, opcodes); break; // BIC + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// XOR<.f> a,b,c 0010 0bbb 0000 0111 FBBB CCCC CCAA AAAA +// XOR<.f> a,b,u6 0010 0bbb 0100 0111 FBBB uuuu uuAA AAAA +// XOR<.f> b,b,s12 0010 0bbb 1000 0111 FBBB ssss ssSS SSSS +// XOR<.cc><.f> b,b,c 0010 0bbb 1100 0111 FBBB CCCC CC0Q QQQQ +// XOR<.cc><.f> b,b,u6 0010 0bbb 1100 0111 FBBB uuuu uu1Q QQQQ +// XOR<.f> a,limm,c 0010 0110 0000 0111 F111 CCCC CCAA AAAA (+ Limm) +// XOR<.f> a,b,limm 0010 0bbb 0000 0111 FBBB 1111 10AA AAAA (+ Limm) +// XOR<.cc><.f> b,b,limm 0010 0bbb 1100 0111 FBBB 1111 100Q QQQQ (+ Limm) +// +// XOR<.f> 0,b,c 0010 0bbb 0000 0111 FBBB CCCC CC11 1110 +// XOR<.f> 0,b,u6 0010 0bbb 0100 0111 FBBB uuuu uu11 1110 +// XOR<.f> 0,b,limm 0010 0bbb 0000 0111 FBBB 1111 1011 1110 (+ Limm) +// XOR<.cc><.f> 0,limm,c 0010 0110 1100 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_XOR(stream, pc, op, opcodes); break; // XOR + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MAX<.f> a,b,c 0010 0bbb 0000 1000 FBBB CCCC CCAA AAAA +// MAX<.f> a,b,u6 0010 0bbb 0100 1000 FBBB uuuu uuAA AAAA +// MAX<.f> b,b,s12 0010 0bbb 1000 1000 FBBB ssss ssSS SSSS +// MAX<.cc><.f> b,b,c 0010 0bbb 1100 1000 FBBB CCCC CC0Q QQQQ +// MAX<.cc><.f> b,b,u6 0010 0bbb 1100 1000 FBBB uuuu uu1Q QQQQ +// MAX<.f> a,limm,c 0010 0110 0000 1000 F111 CCCC CCAA AAAA (+ Limm) +// MAX<.f> a,b,limm 0010 0bbb 0000 1000 FBBB 1111 10AA AAAA (+ Limm) +// MAX<.cc><.f> b,b,limm 0010 0bbb 1100 1000 FBBB 1111 100Q QQQQ (+ Limm) +// +// MAX<.f> 0,b,c 0010 0bbb 0000 1000 FBBB CCCC CC11 1110 +// MAX<.f> 0,b,u6 0010 0bbb 0100 1000 FBBB uuuu uu11 1110 +// MAX<.f> 0,b,limm 0010 0bbb 0000 1000 FBBB 1111 1011 1110 (+ Limm) +// MAX<.cc><.f> 0,limm,c 0010 0110 1100 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MAX(stream, pc, op, opcodes); break; // MAX + } + case 0x09: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MIN<.f> a,b,c 0010 0bbb 0000 1001 FBBB CCCC CCAA AAAA +// MIN<.f> a,b,u6 0010 0bbb 0100 1001 FBBB uuuu uuAA AAAA +// MIN<.f> b,b,s12 0010 0bbb 1000 1001 FBBB ssss ssSS SSSS +// MIN<.cc><.f> b,b,c 0010 0bbb 1100 1001 FBBB CCCC CC0Q QQQQ +// MIN<.cc><.f> b,b,u6 0010 0bbb 1100 1001 FBBB uuuu uu1Q QQQQ +// MIN<.f> a,limm,c 0010 0110 0000 1001 F111 CCCC CCAA AAAA (+ Limm) +// MIN<.f> a,b,limm 0010 0bbb 0000 1001 FBBB 1111 10AA AAAA (+ Limm) +// MIN<.cc><.f> b,b,limm 0010 0bbb 1100 1001 FBBB 1111 100Q QQQQ (+ Limm) +// +// MIN<.f> 0,b,c 0010 0bbb 0000 1001 FBBB CCCC CC11 1110 +// MIN<.f> 0,b,u6 0010 0bbb 0100 1001 FBBB uuuu uu11 1110 +// MIN<.f> 0,b,limm 0010 0bbb 0000 1001 FBBB 1111 1011 1110 (+ Limm) +// MIN<.cc><.f> 0,limm,c 0010 0110 1100 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MIN(stream, pc, op, opcodes); break; // MIN + } + case 0x0a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MOV<.f> b,s12 0010 0bbb 1000 1010 FBBB ssss ssSS SSSS +// MOV<.f> 0,s12 0010 0110 1000 1010 F111 ssss ssSS SSSS (is b is 'Limm' there's no destination) + +// MOV<.cc><.f> b,c 0010 0bbb 1100 1010 FBBB CCCC CC0Q QQQQ +// MOV<.cc><.f> b,u6 0010 0bbb 1100 1010 FBBB uuuu uu1Q QQQQ +// MOV<.cc><.f> b,limm 0010 0bbb 1100 1010 FBBB 1111 100Q QQQQ (+ Limm) +// +// MOV<.cc><.f> 0,c 0010 0110 1100 1010 F111 CCCC CC0Q QQQQ +// MOV<.cc><.f> 0,u6 0010 0110 1100 1010 F111 uuuu uu1Q QQQQ +// MOV<.cc><.f> 0,limm 0010 0110 1100 1010 F111 1111 100Q QQQQ (+ Limm) +// +// NOP 0010 0110 0100 1010 0111 0000 0000 0000 (NOP is a custom encoded MOV where b is 'LIMM') +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MOV(stream, pc, op, opcodes); break; // MOV + } + case 0x0b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// TST b,s12 0010 0bbb 1000 1011 1BBB ssss ssSS SSSS +// TST<.cc> b,c 0010 0bbb 1100 1011 1BBB CCCC CC0Q QQQQ +// TST<.cc> b,u6 0010 0bbb 1100 1011 1BBB uuuu uu1Q QQQQ +// TST<.cc> b,limm 0010 0bbb 1100 1011 1BBB 1111 100Q QQQQ (+ Limm) +// TST<.cc> limm,c 0010 0110 1100 1011 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_TST(stream, pc, op, opcodes); break; // TST + } + case 0x0c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// CMP b,s12 0010 0bbb 1000 1100 1BBB ssss ssSS SSSS +// CMP<.cc> b,c 0010 0bbb 1100 1100 1BBB CCCC CC0Q QQQQ +// CMP<.cc> b,u6 0010 0bbb 1100 1100 1BBB uuuu uu1Q QQQQ +// CMP<.cc> b,limm 0010 0bbb 1100 1100 1BBB 1111 100Q QQQQ (+ Limm) +// CMP<.cc> limm,c 0010 0110 1100 1100 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_CMP(stream, pc, op, opcodes); break; // CMP + } + case 0x0d: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RCMP b,s12 0010 0bbb 1000 1101 1BBB ssss ssSS SSSS +// RCMP<.cc> b,c 0010 0bbb 1100 1101 1BBB CCCC CC0Q QQQQ +// RCMP<.cc> b,u6 0010 0bbb 1100 1101 1BBB uuuu uu1Q QQQQ +// RCMP<.cc> b,limm 0010 0bbb 1100 1101 1BBB 1111 100Q QQQQ (+ Limm) +// RCMP<.cc> limm,c 0010 0110 1100 1101 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_RCMP(stream, pc, op, opcodes); break; // RCMP + } + case 0x0e: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RSUB<.f> a,b,c 0010 0bbb 0000 1110 FBBB CCCC CCAA AAAA +// RSUB<.f> a,b,u6 0010 0bbb 0100 1110 FBBB uuuu uuAA AAAA +// NEG<.f> a,b 0010 0bbb 0100 1110 FBBB 0000 00AA AAAA (NEG is an alias) +// +// RSUB<.f> b,b,s12 0010 0bbb 1000 1110 FBBB ssss ssSS SSSS +// RSUB<.cc><.f> b,b,c 0010 0bbb 1100 1110 FBBB CCCC CC0Q QQQQ +// RSUB<.cc><.f> b,b,u6 0010 0bbb 1100 1110 FBBB uuuu uu1Q QQQQ +// NEG<.cc><.f> b,b 0010 0bbb 1100 1110 FBBB 0000 001Q QQQQ (NEG is an alias) +// +// RSUB<.f> a,limm,c 0010 0110 0000 1110 F111 CCCC CCAA AAAA (+ Limm) +// RSUB<.f> a,b,limm 0010 0bbb 0000 1110 FBBB 1111 10AA AAAA (+ Limm) +// RSUB<.cc><.f> b,b,limm 0010 0bbb 1100 1110 FBBB 1111 100Q QQQQ (+ Limm) +// +// RSUB<.f> 0,b,c 0010 0bbb 0000 1110 FBBB CCCC CC11 1110 +// RSUB<.f> 0,b,u6 0010 0bbb 0100 1110 FBBB uuuu uu11 1110 +// RSUB<.f> 0,b,limm 0010 0bbb 0000 1110 FBBB 1111 1011 1110 (+ Limm) +// RSUB<.cc><.f> 0,limm,c 0010 0110 1100 1110 F111 CCCC CC0Q QQQQ (+ Limm) +// +// IIII I SS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_RSUB(stream, pc, op, opcodes); break; // RSUB + } + case 0x0f: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BSET<.f> a,b,c 0010 0bbb 0000 1111 FBBB CCCC CCAA AAAA +// BSET<.f> a,b,u6 0010 0bbb 0100 1111 FBBB uuuu uuAA AAAA +// BSET<.cc><.f> b,b,c 0010 0bbb 1100 1111 FBBB CCCC CC0Q QQQQ +// BSET<.cc><.f> b,b,u6 0010 0bbb 1100 1111 FBBB uuuu uu1Q QQQQ +// BSET<.f> a,limm,c 0010 0110 0000 1111 F111 CCCC CCAA AAAA (+ Limm) +// +// BSET<.f> 0,b,c 0010 0bbb 0000 1111 FBBB CCCC CC11 1110 +// BSET<.f> 0,b,u6 0010 0bbb 0100 1111 FBBB uuuu uu11 1110 +// BSET<.cc><.f> 0,limm,c 0010 0110 1100 1111 F110 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BSET(stream, pc, op, opcodes); break; // BSET + } + case 0x10: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BCLR<.f> a,b,c 0010 0bbb 0001 0000 FBBB CCCC CCAA AAAA +// BCLR<.f> a,b,u6 0010 0bbb 0101 0000 FBBB uuuu uuAA AAAA +// BCLR<.cc><.f> b,b,c 0010 0bbb 1101 0000 FBBB CCCC CC0Q QQQQ +// BCLR<.cc><.f> b,b,u6 0010 0bbb 1101 0000 FBBB uuuu uu1Q QQQQ +// BCLR<.f> a,limm,c 0010 0110 0001 0000 F111 CCCC CCAA AAAA (+ Limm) +// +// BCLR<.f> 0,b,c 0010 0bbb 0001 0000 FBBB CCCC CC11 1110 +// BCLR<.f> 0,b,u6 0010 0bbb 0101 0000 FBBB uuuu uu11 1110 +// BCLR<.cc><.f> 0,limm,c 0010 0110 1101 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BCLR(stream, pc, op, opcodes); break; // BCLR + } + case 0x11: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BTST<.cc> b,c 0010 0bbb 1101 0001 1BBB CCCC CC0Q QQQQ +// BTST<.cc> b,u6 0010 0bbb 1101 0001 1BBB uuuu uu1Q QQQQ +// BTST<.cc> limm,c 0010 0110 1101 0001 1111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BTST(stream, pc, op, opcodes); break; // BTST + } + case 0x12: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BXOR<.f> a,b,c 0010 0bbb 0001 0010 FBBB CCCC CCAA AAAA +// BXOR<.f> a,b,u6 0010 0bbb 0101 0010 FBBB uuuu uuAA AAAA +// BXOR<.cc><.f> b,b,c 0010 0bbb 1101 0010 FBBB CCCC CC0Q QQQQ +// BXOR<.cc><.f> b,b,u6 0010 0bbb 1101 0010 FBBB uuuu uu1Q QQQQ +// BXOR<.f> a,limm,c 0010 0110 0001 0010 F111 CCCC CCAA AAAA (+ Limm) +// +// BXOR<.f> 0,b,c 0010 0bbb 0001 0010 FBBB CCCC CC11 1110 +// BXOR<.f> 0,b,u6 0010 0bbb 0101 0010 FBBB uuuu uu11 1110 +// BXOR<.cc><.f> 0,limm,c 0010 0110 1101 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BXOR(stream, pc, op, opcodes); break; // BXOR + } + case 0x13: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// BMSK<.f> a,b,c 0010 0bbb 0001 0011 FBBB CCCC CCAA AAAA +// BMSK<.f> a,b,u6 0010 0bbb 0101 0011 FBBB uuuu uuAA AAAA +// BMSK<.cc><.f> b,b,c 0010 0bbb 1101 0011 FBBB CCCC CC0Q QQQQ +// BMSK<.cc><.f> b,b,u6 0010 0bbb 1101 0011 FBBB uuuu uu1Q QQQQ +// BMSK<.f> a,limm,c 0010 0110 0001 0011 F111 CCCC CCAA AAAA (+ Limm) +// +// BMSK<.f> 0,b,c 0010 0bbb 0001 0011 FBBB CCCC CC11 1110 +// BMSK<.f> 0,b,u6 0010 0bbb 0101 0011 FBBB uuuu uu11 1110 +// BMSK<.cc><.f> 0,limm,c 0010 0110 1101 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BMSK(stream, pc, op, opcodes); break; // BMSK + } + case 0x14: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD1<.f> a,b,c 0010 0bbb 0001 0100 FBBB CCCC CCAA AAAA +// ADD1<.f> a,b,u6 0010 0bbb 0101 0100 FBBB uuuu uuAA AAAA +// ADD1<.f> b,b,s12 0010 0bbb 1001 0100 FBBB ssss ssSS SSSS +// ADD1<.cc><.f> b,b,c 0010 0bbb 1101 0100 FBBB CCCC CC0Q QQQQ +// ADD1<.cc><.f> b,b,u6 0010 0bbb 1101 0100 FBBB uuuu uu1Q QQQQ +// ADD1<.f> a,limm,c 0010 0110 0001 0100 F111 CCCC CCAA AAAA (+ Limm) +// ADD1<.f> a,b,limm 0010 0bbb 0001 0100 FBBB 1111 10AA AAAA (+ Limm) +// ADD1<.cc><.f> b,b,limm 0010 0bbb 1101 0100 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD1<.f> 0,b,c 0010 0bbb 0001 0100 FBBB CCCC CC11 1110 +// ADD1<.f> 0,b,u6 0010 0bbb 0101 0100 FBBB uuuu uu11 1110 +// ADD1<.f> 0,b,limm 0010 0bbb 0001 0100 FBBB 1111 1011 1110 (+ Limm) +// ADD1<.cc><.f> 0,limm,c 0010 0110 1101 0100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ADD1(stream, pc, op, opcodes); break; // ADD1 + } + case 0x15: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD2<.f> a,b,c 0010 0bbb 0001 0101 FBBB CCCC CCAA AAAA +// ADD2<.f> a,b,u6 0010 0bbb 0101 0101 FBBB uuuu uuAA AAAA +// ADD2<.f> b,b,s12 0010 0bbb 1001 0101 FBBB ssss ssSS SSSS +// ADD2<.cc><.f> b,b,c 0010 0bbb 1101 0101 FBBB CCCC CC0Q QQQQ +// ADD2<.cc><.f> b,b,u6 0010 0bbb 1101 0101 FBBB uuuu uu1Q QQQQ +// ADD2<.f> a,limm,c 0010 0110 0001 0101 F111 CCCC CCAA AAAA (+ Limm) +// ADD2<.f> a,b,limm 0010 0bbb 0001 0101 FBBB 1111 10AA AAAA (+ Limm) +// ADD2<.cc><.f> b,b,limm 0010 0bbb 1101 0101 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD2<.f> 0,b,c 0010 0bbb 0001 0101 FBBB CCCC CC11 1110 +// ADD2<.f> 0,b,u6 0010 0bbb 0101 0101 FBBB uuuu uu11 1110 +// ADD2<.f> 0,b,limm 0010 0bbb 0001 0101 FBBB 1111 1011 1110 (+ Limm) +// ADD2<.cc><.f> 0,limm,c 0010 0110 1101 0101 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ADD2(stream, pc, op, opcodes); break; // ADD2 + } + case 0x16: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ADD3<.f> a,b,c 0010 0bbb 0001 0110 FBBB CCCC CCAA AAAA +// ADD3<.f> a,b,u6 0010 0bbb 0101 0110 FBBB uuuu uuAA AAAA +// ADD3<.f> b,b,s12 0010 0bbb 1001 0110 FBBB ssss ssSS SSSS +// ADD3<.cc><.f> b,b,c 0010 0bbb 1101 0110 FBBB CCCC CC0Q QQQQ +// ADD3<.cc><.f> b,b,u6 0010 0bbb 1101 0110 FBBB uuuu uu1Q QQQQ +// ADD3<.f> a,limm,c 0010 0110 0001 0110 F111 CCCC CCAA AAAA (+ Limm) +// ADD3<.f> a,b,limm 0010 0bbb 0001 0110 FBBB 1111 10AA AAAA (+ Limm) +// ADD3<.cc><.f> b,b,limm 0010 0bbb 1101 0110 FBBB 1111 100Q QQQQ (+ Limm) +// +// ADD3<.f> 0,b,c 0010 0bbb 0001 0110 FBBB CCCC CC11 1110 +// ADD3<.f> 0,b,u6 0010 0bbb 0101 0110 FBBB uuuu uu11 1110 +// ADD3<.f> 0,b,limm 0010 0bbb 0001 0110 FBBB 1111 1011 1110 (+ Limm) +// ADD3<.cc><.f> 0,limm,c 0010 0110 1101 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ADD3(stream, pc, op, opcodes); break; // ADD3 + } + case 0x17: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB1<.f> a,b,c 0010 0bbb 0001 0111 FBBB CCCC CCAA AAAA +// SUB1<.f> a,b,u6 0010 0bbb 0101 0111 FBBB uuuu uuAA AAAA +// SUB1<.f> b,b,s12 0010 0bbb 1001 0111 FBBB ssss ssSS SSSS +// SUB1<.cc><.f> b,b,c 0010 0bbb 1101 0111 FBBB CCCC CC0Q QQQQ +// SUB1<.cc><.f> b,b,u6 0010 0bbb 1101 0111 FBBB uuuu uu1Q QQQQ +// SUB1<.f> a,limm,c 0010 0110 0001 0111 F111 CCCC CCAA AAAA (+ Limm) +// SUB1<.f> a,b,limm 0010 0bbb 0001 0111 FBBB 1111 10AA AAAA (+ Limm) +// SUB1<.cc><.f> b,b,limm 0010 0bbb 1101 0111 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB1<.f> 0,b,c 0010 0bbb 0001 0111 FBBB CCCC CC11 1110 +// SUB1<.f> 0,b,u6 0010 0bbb 0101 0111 FBBB uuuu uu11 1110 +// SUB1<.f> 0,b,limm 0010 0bbb 0001 0111 FBBB 1111 1011 1110 (+ Limm) +// SUB1<.cc><.f> 0,limm,c 0010 0110 1101 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SUB1(stream, pc, op, opcodes); break; // SUB1 + } + case 0x18: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB2<.f> a,b,c 0010 0bbb 0001 1000 FBBB CCCC CCAA AAAA +// SUB2<.f> a,b,u6 0010 0bbb 0101 1000 FBBB uuuu uuAA AAAA +// SUB2<.f> b,b,s12 0010 0bbb 1001 1000 FBBB ssss ssSS SSSS +// SUB2<.cc><.f> b,b,c 0010 0bbb 1101 1000 FBBB CCCC CC0Q QQQQ +// SUB2<.cc><.f> b,b,u6 0010 0bbb 1101 1000 FBBB uuuu uu1Q QQQQ +// SUB2<.f> a,limm,c 0010 0110 0001 1000 F111 CCCC CCAA AAAA (+ Limm) +// SUB2<.f> a,b,limm 0010 0bbb 0001 1000 FBBB 1111 10AA AAAA (+ Limm) +// SUB2<.cc><.f> b,b,limm 0010 0bbb 1101 1000 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB2<.f> 0,b,c 0010 0bbb 0001 1000 FBBB CCCC CC11 1110 +// SUB2<.f> 0,b,u6 0010 0bbb 0101 1000 FBBB uuuu uu11 1110 +// SUB2<.f> 0,b,limm 0010 0bbb 0001 1000 FBBB 1111 1011 1110 (+ Limm) +// SUB2<.cc><.f> 0,limm,c 0010 0110 1101 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SUB2(stream, pc, op, opcodes); break; // SUB2 + } + case 0x19: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SUB3<.f> a,b,c 0010 0bbb 0001 1001 FBBB CCCC CCAA AAAA +// SUB3<.f> a,b,u6 0010 0bbb 0101 1001 FBBB uuuu uuAA AAAA +// SUB3<.f> b,b,s12 0010 0bbb 1001 1001 FBBB ssss ssSS SSSS +// SUB3<.cc><.f> b,b,c 0010 0bbb 1101 1001 FBBB CCCC CC0Q QQQQ +// SUB3<.cc><.f> b,b,u6 0010 0bbb 1101 1001 FBBB uuuu uu1Q QQQQ +// SUB3<.f> a,limm,c 0010 0110 0001 1001 F111 CCCC CCAA AAAA (+ Limm) +// SUB3<.f> a,b,limm 0010 0bbb 0001 1001 FBBB 1111 10AA AAAA (+ Limm) +// SUB3<.cc><.f> b,b,limm 0010 0bbb 1101 1001 FBBB 1111 100Q QQQQ (+ Limm) +// +// SUB3<.f> 0,b,c 0010 0bbb 0001 1001 FBBB CCCC CC11 1110 +// SUB3<.f> 0,b,u6 0010 0bbb 0101 1001 FBBB uuuu uu11 1110 +// SUB3<.f> 0,limm,c 0010 0110 0001 1001 F111 CCCC CC11 1110 (+ Limm) +// SUB3<.cc><.f> 0,limm,c 0010 0110 1101 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SUB3(stream, pc, op, opcodes); break; // SUB3 + } + case 0x1a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MPY<.f> a,b,c 0010 0bbb 0001 1010 FBBB CCCC CCAA AAAA +// MPY<.f> a,b,u6 0010 0bbb 0101 1010 FBBB uuuu uuAA AAAA +// MPY<.f> b,b,s12 0010 0bbb 1001 1010 FBBB ssss ssSS SSSS +// MPY<.cc><.f> b,b,c 0010 0bbb 1101 1010 FBBB CCCC CC0Q QQQQ +// MPY<.cc><.f> b,b,u6 0010 0bbb 1101 1010 FBBB uuuu uu1Q QQQQ +// MPY<.f> a,limm,c 0010 0110 0001 1010 F111 CCCC CCAA AAAA (+ Limm) +// MPY<.f> a,b,limm 0010 0bbb 0001 1010 FBBB 1111 10AA AAAA (+ Limm) +// MPY<.cc><.f> b,b,limm 0010 0bbb 1101 1010 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPY<.f> 0,b,c 0010 0bbb 0001 1010 FBBB CCCC CC11 1110 +// MPY<.f> 0,b,u6 0010 0bbb 0101 1010 FBBB uuuu uu11 1110 +// MPY<.cc><.f> 0,limm,c 0010 0110 1101 1010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MPY(stream, pc, op, opcodes); break; // MPY * + } + case 0x1b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MPYH<.f> a,b,c 0010 0bbb 0001 1011 FBBB CCCC CCAA AAAA +// MPYH<.f> a,b,u6 0010 0bbb 0101 1011 FBBB uuuu uuAA AAAA +// MPYH<.f> b,b,s12 0010 0bbb 1001 1011 FBBB ssss ssSS SSSS +// MPYH<.cc><.f> b,b,c 0010 0bbb 1101 1011 FBBB CCCC CC0Q QQQQ +// MPYH<.cc><.f> b,b,u6 0010 0bbb 1101 1011 FBBB uuuu uu1Q QQQQ +// MPYH<.f> a,limm,c 0010 0110 0001 1011 F111 CCCC CCAA AAAA (+ Limm) +// MPYH<.f> a,b,limm 0010 0bbb 0001 1010 FBBB 1111 10AA AAAA (+ Limm) +// MPYH<.cc><.f> b,b,limm 0010 0bbb 1101 1011 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYH<.f> 0,b,c 0010 0bbb 0001 1011 FBBB CCCC CC11 1110 +// MPYH<.f> 0,b,u6 0010 0bbb 0101 1011 FBBB uuuu uu11 1110 +// MPYH<.cc><.f> 0,limm,c 0010 0110 1101 1011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MPYH(stream, pc, op, opcodes); break; // MPYH * + } + case 0x1c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// MPYHU<.f> a,b,c 0010 0bbb 0001 1100 FBBB CCCC CCAA AAAA +// MPYHU<.f> a,b,u6 0010 0bbb 0101 1100 FBBB uuuu uuAA AAAA +// MPYHU<.f> b,b,s12 0010 0bbb 1001 1100 FBBB ssss ssSS SSSS +// MPYHU<.cc><.f> b,b,c 0010 0bbb 1101 1100 FBBB CCCC CC0Q QQQQ +// MPYHU<.cc><.f> b,b,u6 0010 0bbb 1101 1100 FBBB uuuu uu1Q QQQQ +// MPYHU<.f> a,limm,c 0010 0110 0001 1100 F111 CCCC CCAA AAAA (+ Limm) +// MPYHU<.f> a,b,limm 0010 0bbb 0001 1100 FBBB 1111 10AA AAAA (+ Limm) +// MPYHU<.cc><.f> b,b,limm 0010 0bbb 1101 1100 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYHU<.f> 0,b,c 0010 0bbb 0001 1100 FBBB CCCC CC11 1110 +// MPYHU<.f> 0,b,u6 0010 0bbb 0101 1100 FBBB uuuu uu11 1110 +// MPYHU<.cc><.f> 0,limm,c 0010 0110 1101 1100 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MPYHU(stream, pc, op, opcodes); break; // MPYHU * + } + case 0x1d: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// MPYU<.f> a,b,c 0010 0bbb 0001 1101 FBBB CCCC CCAA AAAA +// MPYU<.f> a,b,u6 0010 0bbb 0101 1101 FBBB uuuu uuAA AAAA +// MPYU<.f> b,b,s12 0010 0bbb 1001 1101 FBBB ssss ssSS SSSS +// MPYU<.cc><.f> b,b,c 0010 0bbb 1101 1101 FBBB CCCC CC0Q QQQQ +// MPYU<.cc><.f> b,b,u6 0010 0bbb 1101 1101 FBBB uuuu uu1Q QQQQ +// MPYU<.f> a,limm,c 0010 0110 0001 1101 F111 CCCC CCAA AAAA (+ Limm) +// MPYU<.f> a,b,limm 0010 0bbb 0001 1101 FBBB 1111 10AA AAAA (+ Limm) +// MPYU<.cc><.f> b,b,limm 0010 0bbb 1101 1101 FBBB 1111 100Q QQQQ (+ Limm) +// +// MPYU<.f> 0,b,c 0010 0bbb 0001 1101 FBBB CCCC CC11 1110 +// MPYU<.f> 0,b,u6 0010 0bbb 0101 1101 FBBB uuuu uu11 1110 +// MPYU<.cc><.f> 0,limm,c 0010 0110 1101 1101 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MPYU(stream, pc, op, opcodes); break; // MPYU * + } + case 0x20: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ +// Jcc limm 0010 0RRR 1110 0000 0RRR 1111 100Q QQQQ (+ Limm) +// Jcc u6 0010 0RRR 1110 0000 0RRR uuuu uu1Q QQQQ +// Jcc.F [ilink1] 0010 0RRR 1110 0000 1RRR 0111 010Q QQQQ +// Jcc.F [ilink2] 0010 0RRR 1110 0000 1RRR 0111 100Q QQQQ +// IIII I SS SSSS +// J [c] 0010 0RRR 0010 0000 0RRR CCCC CCRR RRRR +// J.F [ilink1] 0010 0RRR 0010 0000 1RRR 0111 01RR RRRR +// J.F [ilink2] 0010 0RRR 0010 0000 1RRR 0111 10RR RRRR +// J limm 0010 0RRR 0010 0000 0RRR 1111 10RR RRRR (+ Limm) +// J u6 0010 0RRR 0110 0000 0RRR uuuu uuRR RRRR +// J s12 0010 0RRR 1010 0000 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_Jcc(stream, pc, op, opcodes); break; // Jcc + } + case 0x21: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// Jcc.D u6 0010 0RRR 1110 0001 0RRR uuuu uu1Q QQQQ +// Jcc.D [c] 0010 0RRR 1110 0001 0RRR CCCC CC0Q QQQQ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// J.D [c] 0010 0RRR 0010 0001 0RRR CCCC CCRR RRRR +// J.D u6 0010 0RRR 0110 0001 0RRR uuuu uuRR RRRR +// J.D s12 0010 0RRR 1010 0001 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + + size = handle_dasm32_Jcc_D(stream, pc, op, opcodes); break; // Jcc.D + } + case 0x22: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// JLcc [c] 0010 0RRR 1110 0010 0RRR CCCC CC0Q QQQQ +// JLcc limm 0010 0RRR 1110 0010 0RRR 1111 100Q QQQQ (+ Limm) +// JLcc u6 0010 0RRR 1110 0010 0RRR uuuu uu1Q QQQQ +// JL [c] 0010 0RRR 0010 0010 0RRR CCCC CCRR RRRR +// JL limm 0010 0RRR 0010 0010 0RRR 1111 10RR RRRR (+ Limm) +// JL u6 0010 0RRR 0110 0010 0RRR uuuu uuRR RRRR +// JL s12 0010 0RRR 1010 0010 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_JLcc(stream, pc, op, opcodes); break; // JLcc + } + case 0x23: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// JLcc.D u6 0010 0RRR 1110 0011 0RRR uuuu uu1Q QQQQ +// JLcc.D [c] 0010 0RRR 1110 0011 0RRR CCCC CC0Q QQQQ +// JL.D [c] 0010 0RRR 0010 0011 0RRR CCCC CCRR RRRR +// JL.D u6 0010 0RRR 0110 0011 0RRR uuuu uuRR RRRR +// JL.D s12 0010 0RRR 1010 0011 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_JLcc_D(stream, pc, op, opcodes); break; // JLcc.D + } + case 0x28: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LP u7 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ +// LP s13 0010 0RRR 1010 1000 0RRR ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_LP(stream, pc, op, opcodes); break; // LPcc + } + case 0x29: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// PP +// General Operations Reg-Reg 0010 0bbb 00ii iiii FBBB CCCC CCAA AAAA +// FLAG c 0010 0000 0010 1001 0000 0000 0100 0000 (Leapster BIOS uses this redundant encoding where A is unused?) +// +// PP +// Gen Op Reg+6-bit unsigned Imm 0010 0bbb 01ii iiii FBBB UUUU UUAA AAAA +// no listed FLAG encodings +// +// PP +// Gen Op Reg+12-bit signed Imm 0010 0bbb 10ii iiii FBBB ssss ssSS SSSS +// FLAG s12 0010 0rrr 1010 1001 0RRR ssss ssSS SSSS +// +// PP M +// Gen Op Conditional Register 0010 0bbb 11ii iiii FBBB CCCC CC0Q QQQQ +// FLAG<.cc> c 0010 0rrr 1110 1001 0RRR CCCC CC0Q QQQQ +// FLAG<.cc> limm 0010 0rrr 1110 1001 0RRR 1111 100Q QQQQ (+ Limm) +// +// PP M +// Gen Op ConReg 6-bit unsign Imm 0010 0bbb 11ii iiii FBBB UUUU UU1Q QQQQ +// FLAG<.cc> u6 0010 0rrr 1110 1001 0RRR uuuu uu1Q QQQQ +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_FLAG(stream, pc, op, opcodes); break; // FLAG + } + case 0x2a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LR b,[c] 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR +// LR b,[limm] 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR (+ Limm) +// LR b,[u6] 0010 0bbb 0110 1010 0BBB uuuu uu00 0000 +// LR b,[s12] 0010 0bbb 1010 1010 0BBB ssss ssSS SSSS +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_LR(stream, pc, op, opcodes); break; // LR + } + case 0x2b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// SR b,[c] 0010 0bbb 0010 1011 0BBB CCCC CCRR RRRR +// SR b,[limm] 0010 0bbb 0010 1011 0BBB 1111 10RR RRRR (+ Limm) +// SR b,[u6] 0010 0bbb 0110 1011 0BBB uuuu uu00 0000 +// SR b,[s12] 0010 0bbb 1010 1011 0BBB ssss ssSS SSSS +// SR limm,[c] 0010 0110 0010 1011 0111 CCCC CCRR RRRR (+ Limm) +// SR limm,[u6] 0010 0110 0110 1011 0111 uuuu uu00 0000 +// SR limm,[s12] 0010 0110 1010 1011 0111 ssss ssSS SSSS (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SR(stream, pc, op, opcodes); break; // SR + } + case 0x2f: // Sub Opcode + { + uint8_t subinstr2 = op & 0x0000003f; + switch (subinstr2 & 0x3f) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ASL<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0000 +// ASL<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0000 +// ASL<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0000 (+ Limm) +// +// ASL<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0000 +// ASL<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0000 +// ASL<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ASL_single(stream, pc, op, opcodes); break; // ASL + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ASR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0001 +// ASR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0001 +// ASR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0001 (+ Limm) +// +// ASR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0001 +// ASR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0001 +// ASR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ASR_single(stream, pc, op, opcodes); break; // ASR + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// LSR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0010 +// LSR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0010 +// LSR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0010 (+ Limm) +// +// LSR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0010 +// LSR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0010 +// LSR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_LSR_single(stream, pc, op, opcodes); break; // LSR + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ROR<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0011 +// ROR<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0011 +// ROR<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0011 (+ Limm) +// +// ROR<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0011 +// ROR<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0011 +// ROR<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ROR_single(stream, pc, op, opcodes); break; // ROR + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// RRC<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0100 +// RRC<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0100 +// RRC<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0100 (+ Limm) +// +// RRC<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0100 +// RRC<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0100 +// RRC<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_RRC(stream, pc, op, opcodes); break; // RCC + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// SEXB<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0101 +// SEXB<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0101 +// SEXB<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0101 (+ Limm) +// +// SEXB<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0101 +// SEXB<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0101 +// SEXB<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0101 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SEXB(stream, pc, op, opcodes); break; // SEXB + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// SEXW<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0110 +// SEXW<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0110 +// SEXW<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0110 (+ Limm) +// +// SEXW<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0110 +// SEXW<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0110 +// SEXW<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SEXW(stream, pc, op, opcodes); break; // SEXW + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// EXTB<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 0111 +// EXTB<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 0111 +// EXTB<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 0111 (+ Limm) +// +// EXTB<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 0111 +// EXTB<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 0111 +// EXTB<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 0111 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_EXTB(stream, pc, op, opcodes); break; // EXTB + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// EXTW<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1000 +// EXTW<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1000 +// EXTW<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1000 (+ Limm) +// +// EXTW<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1000 +// EXTW<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1000 +// EXTW<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_EXTW(stream, pc, op, opcodes); break; // EXTW + } + case 0x09: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// ABS<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1001 +// ABS<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1001 +// ABS<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1001 (+ Limm) +// +// ABS<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1001 +// ABS<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1001 +// ABS<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ABS(stream, pc, op, opcodes); break; // ABS + } + case 0x0a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// NOT<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1010 +// NOT<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1010 +// NOT<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1010 (+ Limm) +// +// NOT<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1010 +// NOT<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1010 +// NOT<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1010 (+ Limm) +// +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_NOT(stream, pc, op, opcodes); break; // NOT + } + case 0x0b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// RLC<.f> b,c 0010 0bbb 0010 1111 FBBB CCCC CC00 1011 +// RLC<.f> b,u6 0010 0bbb 0110 1111 FBBB uuuu uu00 1011 +// RLC<.f> b,limm 0010 0bbb 0010 1111 FBBB 1111 1000 1011 (+ Limm) +// +// RLC<.f> 0,c 0010 0110 0010 1111 F111 CCCC CC00 1011 +// RLC<.f> 0,u6 0010 0110 0110 1111 F111 uuuu uu00 1011 +// RLC<.f> 0,limm 0010 0110 0010 1111 F111 1111 1000 1011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_RLC(stream, pc, op, opcodes); break; // RLC + } + case 0x0c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS ss ssss +// EX<.di> b,[c] 0010 0bbb 0010 1111 DBBB CCCC CC00 1100 +// EX<.di> b,[u6] 0010 0bbb 0110 1111 DBBB uuuu uu00 1100 +// EX<.di> b,[limm] 0010 0bbb 0010 1111 DBBB 1111 1000 1100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_EX(stream, pc, op, opcodes); break; // EX + } + case 0x3f: // ZOPs (Zero Operand Opcodes) + { + uint8_t subinstr3 = (op & 0x07000000) >> 24; + subinstr3 |= ((op & 0x00007000) >> 12) << 3; + + switch (subinstr3 & 0x3f) + { + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SLEEP 0010 0001 0110 1111 0000 uuuu uu11 1111 +// SLEEP c 0010 0001 0010 1111 0000 CCCC CC11 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SLEEP(stream, pc, op, opcodes); break; // SLEEP + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SWI/TRAP0 0010 0010 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SWI(stream, pc, op, opcodes); break; // SWI / TRAP9 + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// SYNC 0010 0011 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SYNC(stream, pc, op, opcodes); break; // SYNC + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// RTIE 0010 0100 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_RTIE(stream, pc, op, opcodes); break; // RTIE + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I$$$ SS SSSS $$$ ss ssss +// BRK 0010 0101 0110 1111 0000 0000 0011 1111 +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_BRK(stream, pc, op, opcodes); break; // BRK + } + + default: + { + // 0x00, 0x06-0x3f + size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, subinstr3, op, opcodes); break; // illegal + } + } + break; + } + default: + { + // 0x0d - 0x3e + size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, op, opcodes); break; // illegal + } + } + break; + } + +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// LD<.x><.aa><.di> a,[b,c] 0010 0bbb aa11 0ZZX DBBB CCCC CCAA AAAA +// LD<.x><.aa><.di> 0,[b,c] 0010 0bbb aa11 0ZZX DBBB CCCC CC11 1110 +// PREFETCH<.aa> [b,c] 0010 0bbb aa11 0000 0BBB CCCC CC11 1110 (ZZXD is 0) (prefetch is an alias) +// +// LD<.x><.aa><.di> a,[b,limm] 0010 0bbb aa11 0ZZX DBBB 1111 10AA AAAA (+ Limm) (C is 62) +// LD<.x><.aa><.di> 0,[b,limm] 0010 0bbb aa11 0ZZX DBBB 1111 1011 1110 (+ Limm) (C is 62) +// PREFETCH<.aa> [b,limm] 0010 0bbb aa11 0000 0BBB 1111 1011 1110 (+ Limm) (C is 62) (ZZXD is 0) (prefetch is an alias) +// +// if b is 62 (Limm) then aa becomes RR (reserved) +// LD<.x><.di> a,[limm,c] 0010 0110 RR11 0ZZX D111 CCCC CCAA AAAA (+ Limm) (b is 62) +// LD<.x><.di> 0,[limm,c] 0010 0110 RR11 0ZZX D111 CCCC CC11 1110 (+ Limm) (b is 62) +// PREFETCH [limm,c] 0010 0110 RR11 0000 0111 CCCC CC11 1110 (+ Limm) (b is 62) (ZZXD is 0) (prefetch is an alias) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 0x30: size = handle_dasm32_LD_0(stream, pc, op, opcodes); break; // LD r-r + case 0x31: size = handle_dasm32_LD_1(stream, pc, op, opcodes); break; // LD r-r + case 0x32: size = handle_dasm32_LD_2(stream, pc, op, opcodes); break; // LD r-r + case 0x33: size = handle_dasm32_LD_3(stream, pc, op, opcodes); break; // LD r-r + case 0x34: size = handle_dasm32_LD_4(stream, pc, op, opcodes); break; // LD r-r + case 0x35: size = handle_dasm32_LD_5(stream, pc, op, opcodes); break; // LD r-r + case 0x36: size = handle_dasm32_LD_6(stream, pc, op, opcodes); break; // LD r-r + case 0x37: size = handle_dasm32_LD_7(stream, pc, op, opcodes); break; // LD r-r + default: + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, op, opcodes); break; // illegal + } + } + break; + } + case 0x05: // op a,b,c (05 ARC ext) + { + uint8_t subinstr = (op & 0x003f0000) >> 16; + + switch (subinstr) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ASL<.f> a,b,c 0010 1bbb 0000 0000 FBBB CCCC CCAA AAAA +// ASL<.f> a,b,u6 0010 1bbb 0100 0000 FBBB uuuu uuAA AAAA +// ASL<.f> b,b,s12 0010 1bbb 1000 0000 FBBB ssss ssSS SSSS +// ASL<.cc><.f> b,b,c 0010 1bbb 1100 0000 FBBB CCCC CC0Q QQQQ +// ASL<.cc><.f> b,b,u6 0010 1bbb 1100 0000 FBBB uuuu uu1Q QQQQ +// ASL<.f> a,limm,c 0010 1110 0000 0000 F111 CCCC CCAA AAAA (+ Limm) +// ASL<.f> a,b,limm 0010 1bbb 0000 0000 FBBB 1111 10AA AAAA (+ Limm) +// ASL<.cc><.f> b,b,limm 0010 1bbb 1100 0000 FBBB 1111 100Q QQQQ (+ Limm) +// +// ASL<.f> 0,b,c 0010 1bbb 0000 0000 FBBB CCCC CC11 1110 +// ASL<.f> 0,b,u6 0010 1bbb 0100 0000 FBBB uuuu uu11 1110 +// ASL<.cc><.f> 0,limm,c 0010 1110 1100 0000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ASL_multiple(stream, pc, op, opcodes); break; // ASL + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// LSR<.f> a,b,c 0010 1bbb 0000 0001 FBBB CCCC CCAA AAAA +// LSR<.f> a,b,u6 0010 1bbb 0100 0001 FBBB uuuu uuAA AAAA +// LSR<.f> b,b,s12 0010 1bbb 1000 0001 FBBB ssss ssSS SSSS +// LSR<.cc><.f> b,b,c 0010 1bbb 1100 0001 FBBB CCCC CC0Q QQQQ +// LSR<.cc><.f> b,b,u6 0010 1bbb 1100 0001 FBBB uuuu uu1Q QQQQ +// LSR<.f> a,limm,c 0010 1110 0000 0001 F111 CCCC CCAA AAAA (+ Limm) +// LSR<.f> a,b,limm 0010 1bbb 0000 0001 FBBB 1111 10AA AAAA (+ Limm) +// LSR<.cc><.f> b,b,limm 0010 1bbb 1100 0001 FBBB 1111 100Q QQQQ (+ Limm) +// +// LSR<.f> 0,b,c 0010 1bbb 0000 0001 FBBB CCCC CC11 1110 +// LSR<.f> 0,b,u6 0010 1bbb 0100 0001 FBBB uuuu uu11 1110 +// LSR<.cc><.f> 0,limm,c 0010 1110 1100 0001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_LSR_multiple(stream, pc, op, opcodes); break; // LSR + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ASR<.f> a,b,c 0010 1bbb 0000 0010 FBBB CCCC CCAA AAAA +// ASR<.f> a,b,u6 0010 1bbb 0100 0010 FBBB uuuu uuAA AAAA +// ASR<.f> b,b,s12 0010 1bbb 1000 0010 FBBB ssss ssSS SSSS +// ASR<.cc><.f> b,b,c 0010 1bbb 1100 0010 FBBB CCCC CC0Q QQQQ +// ASR<.cc><.f> b,b,u6 0010 1bbb 1100 0010 FBBB uuuu uu1Q QQQQ +// ASR<.f> a,limm,c 0010 1110 0000 0010 F111 CCCC CCAA AAAA (+ Limm) +// ASR<.f> a,b,limm 0010 1bbb 0000 0010 FBBB 1111 10AA AAAA (+ Limm) +// ASR<.cc><.f> b,b,limm 0010 1bbb 1100 0010 FBBB 1111 100Q QQQQ (+ Limm) +// +// ASR<.f> 0,b,c 0010 1bbb 0000 0010 FBBB CCCC CC11 1110 +// ASR<.f> 0,b,u6 0010 1bbb 0100 0010 FBBB uuuu uu11 1110 +// ASR<.cc><.f> 0,limm,c 0010 1110 1100 0010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ASR_multiple(stream, pc, op, opcodes); break; // ASR + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ROR<.f> a,b,c 0010 1bbb 0000 0011 FBBB CCCC CCAA AAAA +// ROR<.f> a,b,u6 0010 1bbb 0100 0011 FBBB uuuu uuAA AAAA +// ROR<.f> b,b,s12 0010 1bbb 1000 0011 FBBB ssss ssSS SSSS +// ROR<.cc><.f> b,b,c 0010 1bbb 1100 0011 FBBB CCCC CC0Q QQQQ +// ROR<.cc><.f> b,b,u6 0010 1bbb 1100 0011 FBBB uuuu uu1Q QQQQ +// ROR<.f> a,limm,c 0010 1110 0000 0011 F111 CCCC CCAA AAAA (+ Limm) +// ROR<.f> a,b,limm 0010 1bbb 0000 0011 FBBB 1111 10AA AAAA (+ Limm) +// ROR<.cc><.f> b,b,limm 0010 1bbb 1100 0011 FBBB 1111 100Q QQQQ (+ Limm) +// +// ROR<.f> 0,b,c 0010 1bbb 0000 0011 FBBB CCCC CC11 1110 +// ROR<.f> 0,b,u6 0010 1bbb 0100 0011 FBBB uuuu uu11 1110 +// ROR<.cc><.f> 0,limm,c 0010 1110 1100 0011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ROR_multiple(stream, pc, op, opcodes); break; // ROR + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// MUL64 <0,>b,c 0010 1bbb 0000 0100 0BBB CCCC CC11 1110 +// MUL64 <0,>b,u6 0010 1bbb 0100 0100 0BBB uuuu uu11 1110 +// MUL64 <0,>b,s12 0010 1bbb 1000 0100 0BBB ssss ssSS SSSS +// MUL64 <0,>limm,c 0010 1110 0000 0100 0111 CCCC CC11 1110 (+ Limm) +// +// MUL64<.cc> <0,>b,c 0010 1bbb 1100 0100 0BBB CCCC CC0Q QQQQ +// MUL64<.cc> <0,>b,u6 0010 1bbb 1100 0100 0BBB uuuu uu1Q QQQQ +// MUL64<.cc> <0,>limm,c 0010 1110 1100 0100 0111 CCCC CC0Q QQQQ (+ Limm) +// MUL64<.cc> <0,>b,limm 0010 1bbb 1100 0100 0BBB 1111 100Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MUL64(stream, pc, op, opcodes); break; // MUL64 + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// MULU64 <0,>b,c 0010 1bbb 0000 0101 0BBB CCCC CC11 1110 +// MULU64 <0,>b,u6 0010 1bbb 0100 0101 0BBB uuuu uu11 1110 +// MULU64 <0,>b,s12 0010 1bbb 1000 0101 0BBB ssss ssSS SSSS +// MULU64 <0,>limm,c 0010 1110 0000 0101 0111 CCCC CC11 1110 (+ Limm) +// +// MULU64<.cc> <0,>b,c 0010 1bbb 1100 0101 0BBB CCCC CC0Q QQQQ +// MULU64<.cc> <0,>b,u6 0010 1bbb 1100 0101 0BBB uuuu uu1Q QQQQ +// MULU64<.cc> <0,>limm,c 0010 1110 1100 0101 0111 CCCC CC0Q QQQQ (+ Limm) +// MULU64<.cc> <0,>b,limm 0010 1bbb 1100 0101 0BBB 1111 100Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_MULU64(stream, pc, op, opcodes); break; // MULU64 + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADDS<.f> a,b,c 0010 1bbb 0000 0110 FBBB CCCC CCAA AAAA +// ADDS<.f> a,b,u6 0010 1bbb 0100 0110 FBBB uuuu uuAA AAAA +// ADDS<.f> b,b,s12 0010 1bbb 1000 0110 FBBB ssss ssSS SSSS +// ADDS<.cc><.f> b,b,c 0010 1bbb 1100 0110 FBBB CCCC CC0Q QQQQ +// ADDS<.cc><.f> b,b,u6 0010 1bbb 1100 0110 FBBB uuuu uu1Q QQQQ +// ADDS<.f> a,limm,c 0010 1110 0000 0110 F111 CCCC CCAA AAAA (+ Limm) +// ADDS<.f> a,b,limm 0010 1bbb 0000 0110 FBBB 1111 10AA AAAA (+ Limm) +// ADDS<.cc><.f> b,b,limm 0010 1bbb 1100 0110 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ADDS<.f> 0,b,c 0010 1bbb 0000 0110 FBBB CCCC CC11 1110 +// ADDS<.f> 0,b,u6 0010 1bbb 0100 0110 FBBB uuuu uu11 1110 +// ADDS<.f> 0,b,limm 0010 1bbb 0000 0110 FBBB 1111 1011 1110 (+ Limm) +// ADDS<.cc><.f> 0,limm,c 0010 1110 1100 0110 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ADDS(stream, pc, op, opcodes); break; // ADDS + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SUBS<.f> a,b,c 0010 1bbb 0000 0111 FBBB CCCC CCAA AAAA +// SUBS<.f> a,b,u6 0010 1bbb 0100 0111 FBBB uuuu uuAA AAAA +// SUBS<.f> b,b,s12 0010 1bbb 1000 0111 FBBB ssss ssSS SSSS +// SUBS<.cc><.f> b,b,c 0010 1bbb 1100 0111 FBBB CCCC CC0Q QQQQ +// SUBS<.cc><.f> b,b,u6 0010 1bbb 1100 0111 FBBB uuuu uu1Q QQQQ +// SUBS<.f> a,limm,c 0010 1110 0000 0111 F111 CCCC CCAA AAAA (+ Limm) +// SUBS<.f> a,b,limm 0010 1bbb 0000 0111 FBBB 1111 10AA AAAA (+ Limm) +// SUBS<.cc><.f> b,b,limm 0010 1bbb 1100 0111 FBBB 1111 10QQ QQQQ (+ Limm) +// +// SUBS<.f> 0,b,c 0010 1bbb 0000 0111 FBBB CCCC CC11 1110 +// SUBS<.f> 0,b,u6 0010 1bbb 0100 0111 FBBB uuuu uu11 1110 +// SUBS<.f> 0,b,limm 0010 1bbb 0000 0111 FBBB 1111 1011 1110 (+ Limm) +// SUBS<.cc><.f> 0,limm,c 0010 1110 1100 0111 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SUBS(stream, pc, op, opcodes); break; // SUBS + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// DIVAW a,b,c 0010 1bbb 0000 1000 0BBB CCCC CCAA AAAA +// DIVAW a,b,u6 0010 1bbb 0100 1000 0BBB uuuu uuAA AAAA +// DIVAW b,b,s12 0010 1bbb 1000 1000 0BBB ssss ssSS SSSS +// DIVAW<.cc> b,b,c 0010 1bbb 1100 1000 0BBB CCCC CC0Q QQQQ +// DIVAW<.cc> b,b,u6 0010 1bbb 1100 1000 0BBB uuuu uu1Q QQQQ +// DIVAW a,limm,c 0010 1110 0000 1000 0111 CCCC CCAA AAAA (+ Limm) +// DIVAW a,b,limm 0010 1bbb 0000 1000 0BBB 1111 10AA AAAA (+ Limm) +// DIVAW<.cc> b,b,limm 0010 1bbb 1100 1000 0BBB 1111 10QQ QQQQ (+ Limm) +// +// DIVAW 0,b,c 0010 1bbb 0000 1000 0BBB CCCC CC11 1110 +// DIVAW 0,b,u6 0010 1bbb 0100 1000 0BBB uuuu uu11 1110 +// DIVAW<.cc> 0,limm,c 0010 1110 1100 1000 0111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_DIVAW(stream, pc, op, opcodes); break; // DIVAW + } + case 0x0a: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// IIII I SS SSSS +// ASLS<.f> a,b,c 0010 1bbb 0000 1010 FBBB CCCC CCAA AAAA +// ASLS<.f> a,b,u6 0010 1bbb 0100 1010 FBBB uuuu uuAA AAAA +// ASLS<.f> b,b,s12 0010 1bbb 1000 1010 FBBB ssss ssSS SSSS +// ASLS<.cc><.f> b,b,c 0010 1bbb 1100 1010 FBBB CCCC CC0Q QQQQ +// ASLS<.cc><.f> b,b,u6 0010 1bbb 1100 1010 FBBB uuuu uu1Q QQQQ +// ASLS<.f> a,limm,c 0010 1110 0000 1010 F111 CCCC CCAA AAAA (+ Limm) +// ASLS<.f> a,b,limm 0010 1bbb 0000 1010 FBBB 1111 10AA AAAA (+ Limm) +// ASLS<.cc><.f> b,b,limm 0010 1bbb 1100 1010 FBBB 1111 10QQ QQQQ (+ Limm) +// ASLS<.f> 0,b,c 0010 1bbb 0000 1010 FBBB CCCC CC11 1110 +// ASLS<.f> 0,b,u6 0010 1bbb 0100 1010 FBBB uuuu uu11 1110 +// ASLS<.cc><.f> 0,limm,c 0010 1110 1100 1010 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ASLS(stream, pc, op, opcodes); break; // ASLS + } + case 0x0b: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ASRS<.f> a,b,c 0010 1bbb 0000 1011 FBBB CCCC CCAA AAAA +// ASRS<.f> a,b,u6 0010 1bbb 0100 1011 FBBB uuuu uuAA AAAA +// ASRS<.f> b,b,s12 0010 1bbb 1000 1011 FBBB ssss ssSS SSSS +// ASRS<.cc><.f> b,b,c 0010 1bbb 1100 1011 FBBB CCCC CC0Q QQQQ +// ASRS<.cc><.f> b,b,u6 0010 1bbb 1100 1011 FBBB uuuu uu1Q QQQQ +// ASRS<.f> a,limm,c 0010 1110 0000 1011 F111 CCCC CCAA AAAA (+ Limm) +// ASRS<.f> a,b,limm 0010 1bbb 0000 1011 FBBB 1111 10AA AAAA (+ Limm) +// ASRS<.cc><.f> b,b,limm 0010 1bbb 1100 1011 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ASRS<.f> 0,b,c 0010 1bbb 0000 1011 FBBB CCCC CC11 1110 +// ASRS<.f> 0,b,u6 0010 1bbb 0100 1011 FBBB uuuu uu11 1110 +// ASRS<.cc><.f> 0,limm,c 0010 1110 1100 1011 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ASRS(stream, pc, op, opcodes); break; // ASRS + } + case 0x0c: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unknown Extension Op +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + + // Leapster BIOS uses this in loop at 400384a0 + size = handle04_helper_dasm(stream, pc, op, opcodes, "UNKNOWN 0x05-0x0c op", 0,0); + break; + } +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unknown Extension Op +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 0x10: + { + // Leapster BIOS uses this in loop at 400384a0 + size = handle04_helper_dasm(stream, pc, op, opcodes, "UNKNOWN 0x05-0x10 op", 0,0); + break; + } +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// Unknown Extension Op +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 0x14: + { + // Leapster BIOS uses this in loop at 400384a0 + size = handle04_helper_dasm(stream, pc, op, opcodes, "UNKNOWN 0x05-0x14 op", 0,0); + break; + } + case 0x28: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ADDSDW<.f> a,b,c 0010 1bbb 0010 1000 FBBB CCCC CCAA AAAA +// ADDSDW<.f> a,b,u6 0010 1bbb 0110 1000 FBBB uuuu uuAA AAAA +// ADDSDW<.f> b,b,s12 0010 1bbb 1010 1000 FBBB ssss ssSS SSSS +// ADDSDW<.cc><.f> b,b,c 0010 1bbb 1110 1000 FBBB CCCC CC0Q QQQQ +// ADDSDW<.cc><.f> b,b,u6 0010 1bbb 1110 1000 FBBB uuuu uu1Q QQQQ +// ADDSDW<.f> a,limm,c 0010 1110 0010 1000 F111 CCCC CCAA AAAA (+ Limm) +// ADDSDW<.f> a,b,limm 0010 1bbb 0010 1000 FBBB 1111 10AA AAAA (+ Limm) +// ADDSDW<.cc><.f> b,b,limm 0010 1bbb 1110 1000 FBBB 1111 10QQ QQQQ (+ Limm) +// +// ADDSDW<.f> 0,b,c 0010 1bbb 0010 1000 FBBB CCCC CC11 1110 +// ADDSDW<.f> 0,b,u6 0010 1bbb 0110 1000 FBBB uuuu uu11 1110 +// ADDSDW<.cc><.f> 0,limm,c 0010 1110 1110 1000 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ADDSDW(stream, pc, op, opcodes); break; // ADDSDW + } + case 0x29: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SUBSDW<.f> a,b,c 0010 1bbb 0010 1001 FBBB CCCC CCAA AAAA +// SUBSDW<.f> a,b,u6 0010 1bbb 0110 1001 FBBB uuuu uuAA AAAA +// SUBSDW<.f> b,b,s12 0010 1bbb 1010 1001 FBBB ssss ssSS SSSS +// SUBSDW<.cc><.f> b,b,c 0010 1bbb 1110 1001 FBBB CCCC CC0Q QQQQ +// SUBSDW<.cc><.f> b,b,u6 0010 1bbb 1110 1001 FBBB uuuu uu1Q QQQQ +// SUBSDW<.f> a,limm,c 0010 1110 0010 1001 F111 CCCC CCAA AAAA (+ Limm) +// SUBSDW<.f> a,b,limm 0010 1bbb 0010 1001 FBBB 1111 10AA AAAA (+ Limm) +// SUBSDW<.cc><.f> b,b,limm 0010 1bbb 1110 1001 FBBB 1111 10QQ QQQQ (+ Limm) +// +// SUBSDW<.f> 0,b,c 0010 1bbb 0010 1001 FBBB CCCC CC11 1110 +// SUBSDW<.f> 0,b,u6 0010 1bbb 0110 1001 FBBB uuuu uu11 1110 +// SUBSDW<.cc><.f> 0,limm,c 0010 1110 1110 1001 F111 CCCC CC0Q QQQQ (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SUBSDW(stream, pc, op, opcodes); break; // SUBSDW + } + case 0x2f: // SOPs + { + uint8_t subinstr2 = op & 0x0000003f; + switch (subinstr2) + { + case 0x00: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SWAP<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0000 +// SWAP<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0000 +// SWAP<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0000 (+ Limm) +// +// SWAP<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0000 +// SWAP<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0000 +// SWAP<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SWAP(stream, pc, op, opcodes); break; // SWAP + } + case 0x01: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NORM<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0001 +// NORM<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0001 +// NORM<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0001 (+ Limm) +// +// NORM<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0001 +// NORM<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0001 +// NORM<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0001 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_NORM(stream, pc, op, opcodes); break; // NORM + } + case 0x02: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// SAT16<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0010 +// SAT16<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0010 +// SAT16<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0010 (+ Limm) +// +// SAT16<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0010 +// SAT16<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0010 +// SAT16<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0010 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_SAT16(stream, pc, op, opcodes); break; // SAT16 + } + case 0x03: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// RND16<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0011 +// RND16<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0011 +// RND16<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0011 (+ Limm) +// +// RND16<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0011 +// RND16<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0011 +// RND16<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0011 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_RND16(stream, pc, op, opcodes); break; // RND16 + } + case 0x04: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ABSSW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0100 +// ABSSW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0100 +// ABSSW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0100 (+ Limm) +// +// ABSSW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0100 +// ABSSW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0100 +// ABSSW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0100 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ABSSW(stream, pc, op, opcodes); break; // ABSSW + } + case 0x05: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// ABSS<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0101 +// ABSS<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0101 +// ABSS<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0101 (+ Limm) +// +// ABSS<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0101 +// ABSS<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0101 +// ABSS<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0101 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_ABSS(stream, pc, op, opcodes); break; // ABSS + } + case 0x06: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NEGSW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0110 +// NEGSW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0110 +// NEGSW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0110 (+ Limm) +// +// NEGSW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0110 +// NEGSW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0110 +// NEGSW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0110 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_NEGSW(stream, pc, op, opcodes); break; // NEGSW + } + case 0x07: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NEGS<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 0111 +// NEGS<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 0111 +// NEGS<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 0111 (+ Limm) +// +// NEGS<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 0111 +// NEGS<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 0111 +// NEGS<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 0111 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_NEGS(stream, pc, op, opcodes); break; // NEGS + } + case 0x08: + { +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +// NORMW<.f> b,c 0010 1bbb 0010 1111 FBBB CCCC CC00 1000 +// NORMW<.f> b,u6 0010 1bbb 0110 1111 FBBB uuuu uu00 1000 +// NORMW<.f> b,limm 0010 1bbb 0010 1111 FBBB 1111 1000 1000 (+ Limm) +// +// NORMW<.f> 0,c 0010 1110 0010 1111 F111 CCCC CC00 1000 +// NORMW<.f> 0,u6 0010 1110 0110 1111 F111 uuuu uu00 1000 +// NORMW<.f> 0,limm 0010 1110 0010 1111 F111 1111 1000 1000 (+ Limm) +// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + size = handle_dasm32_NORMW(stream, pc, op, opcodes); break; // NORMW + } + case 0x3f: // ZOPs (Zero Operand Opcodes) + { + uint8_t subinstr3 = (op & 0x07000000) >> 24; + subinstr3 |= ((op & 0x00007000) >> 12) << 3; + + switch (subinstr3) + { + default: + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, subinstr3, op, opcodes); break; // illegal + } + } + break; + } + default: + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, op, opcodes); break; // illegal + } + } + break; + } + default: + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, op, opcodes); break; // illegal + } + + } + break; + } + case 0x06: size = handle_dasm32_ARC_EXT06(stream, pc, op, opcodes); break; // op a,b,c (06 ARC ext) + case 0x07: size = handle_dasm32_USER_EXT07(stream, pc, op, opcodes); break; // op a,b,c (07 User ext) + case 0x08: size = handle_dasm32_USER_EXT08(stream, pc, op, opcodes); break; // op a,b,c (08 User ext) + case 0x09: size = handle_dasm32_MARKET_EXT09(stream, pc, op, opcodes); break; // op a,b,c (09 Market ext) + case 0x0a: size = handle_dasm32_MARKET_EXT0a(stream, pc, op, opcodes); break; // op a,b,c (0a Market ext) + case 0x0b: size = handle_dasm32_MARKET_EXT0b(stream, pc, op, opcodes); break; // op a,b,c (0b Market ext) } } else { size = 2; - op &= ~0xf800; - switch (instruction) // 16-bit instructions { - case 0x0c: size = handle0c_dasm(stream, pc, op, opcodes); break; // Load/Add reg-reg - case 0x0d: size = handle0d_dasm(stream, pc, op, opcodes); break; // Add/Sub/Shft imm - case 0x0e: size = handle0e_dasm(stream, pc, op, opcodes); break; // Mov/Cmp/Add - case 0x0f: size = handle0f_dasm(stream, pc, op, opcodes); break; // op_S b,b,c (single 16-bit ops) - case 0x10: size = handle10_dasm(stream, pc, op, opcodes); break; // LD_S - case 0x11: size = handle11_dasm(stream, pc, op, opcodes); break; // LDB_S - case 0x12: size = handle12_dasm(stream, pc, op, opcodes); break; // LDW_S - case 0x13: size = handle13_dasm(stream, pc, op, opcodes); break; // LSW_S.X - case 0x14: size = handle14_dasm(stream, pc, op, opcodes); break; // ST_S - case 0x15: size = handle15_dasm(stream, pc, op, opcodes); break; // STB_S - case 0x16: size = handle16_dasm(stream, pc, op, opcodes); break; // STW_S - case 0x17: size = handle17_dasm(stream, pc, op, opcodes); break; // Shift/Sub/Bit - case 0x18: size = handle18_dasm(stream, pc, op, opcodes); break; // Stack Instr - case 0x19: size = handle19_dasm(stream, pc, op, opcodes); break; // GP Instr - case 0x1a: size = handle1a_dasm(stream, pc, op, opcodes); break; // PCL Instr - case 0x1b: size = handle1b_dasm(stream, pc, op, opcodes); break; // MOV_S - case 0x1c: size = handle1c_dasm(stream, pc, op, opcodes); break; // ADD_S/CMP_S - case 0x1d: size = handle1d_dasm(stream, pc, op, opcodes); break; // BRcc_S - case 0x1e: size = handle1e_dasm(stream, pc, op, opcodes); break; // Bcc_S - case 0x1f: size = handle1f_dasm(stream, pc, op, opcodes); break; // BL_S + default: break; // size = -1; + case 0x0c: // Load/Add reg-reg + { + uint8_t subinstr = (op & 0x0018) >> 3; + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I S S +// LD_S a,[b,c] 0110 0bbb ccc0 0aaa +// ####################################################################################################################### + size = handle_dasm_LD_S_a_b_c(stream, pc, op, opcodes); break; // LD_S a,[b,c] + } + case 0x01: + { +// ####################################################################################################################### +// IIII I S S +// LDB_S a,[b,c] 0110 0bbb ccc0 1aaa +// ####################################################################################################################### + size = handle_dasm_LDB_S_a_b_c(stream, pc, op, opcodes); break; // LDB_S a,[b,c] + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S S +// LDW_S a,[b,c] 0110 0bbb ccc1 0aaa +// ####################################################################################################################### + size = handle_dasm_LDW_S_a_b_c(stream, pc, op, opcodes); break; // LDW_S a,[b,c] + } + case 0x03: + { +// ####################################################################################################################### +// IIII I S S +// ADD_S a,b,c 0110 0bbb ccc1 1aaa +// ####################################################################################################################### + size = handle_dasm_ADD_S_a_b_c(stream, pc, op, opcodes); break; // ADD_S a,b,c + } + } + break; + } + case 0x0d: // Add/Sub/Shft imm + { + uint8_t subinstr = (op & 0x0018) >> 3; + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// ADD_S c,b,u3 0110 1bbb ccc0 0uuu +// ####################################################################################################################### + size = handle_dasm_ADD_S_c_b_u3(stream, pc, op, opcodes); break; // ADD_S c,b,u3 + } + case 0x01: + { +// ####################################################################################################################### +// SUB_S c,b,u3 0110 1bbb ccc0 1uuu +// ####################################################################################################################### + size = handle_dasm_SUB_S_c_b_u3(stream, pc, op, opcodes); break; // SUB_S c,b,u3 + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S S +// ASL_S c,b,u3 0110 1bbb ccc1 0uuu +// ####################################################################################################################### + size = handle_dasm_ASL_S_c_b_u3(stream, pc, op, opcodes); break; // ASL_S c,b,u3 + } + case 0x03: + { +// ####################################################################################################################### +// IIII I S S +// ASR_S c,b,u3 0110 1bbb ccc1 1uuu +// ####################################################################################################################### + size = handle_dasm_ASR_S_c_b_u3(stream, pc, op, opcodes); break; // ASR_S c,b,u3 + } + } + break; + } + case 0x0e: // Mov/Cmp/Add + { + uint8_t subinstr = (op & 0x0018) >> 3; + + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I S S +// ADD_S b,b,h 0111 0bbb hhh0 0HHH +// ADD_S b,b,limm 0111 0bbb 1100 0111 (+ Limm) +// ####################################################################################################################### + size = handle_dasm_ADD_S_b_b_h_or_limm(stream, pc, op, opcodes); break; // ADD_S b,b,h or ADD_S b,b,limm + } + case 0x01: + { +// ####################################################################################################################### +// IIII I S S +// MOV_S b,h 0111 0bbb hhh0 1HHH +// MOV_S b,limm 0111 0bbb 1100 1111 (+ Limm) +// ####################################################################################################################### + size = handle_dasm_MOV_S_b_h_or_limm(stream, pc, op, opcodes); break; // MOV_S b,h or MOV_S b,limm + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S S +// CMP_S b,h 0111 0bbb hhh1 0HHH +// CMP_S b,limm 0111 0bbb 1101 0111 (+ Limm) +// ####################################################################################################################### + size = handle_dasm_CMP_S_b_h_or_limm(stream, pc, op, opcodes); break; // CMP_S b,h or CMP_S b,limm + } + case 0x03: + { +// ####################################################################################################################### +// IIII I S S +// MOV_S h,b 0111 0bbb hhh1 1HHH +// ####################################################################################################################### + size = handle_dasm_MOV_S_h_b(stream, pc, op, opcodes); break; // MOV_S h,b + } + } + break; + } + case 0x0f: // op_S b,b,c (single 16-bit ops) + { + uint8_t subinstr = op & 0x01f; + + switch (subinstr) + { + case 0x00: // SOPs + { + uint8_t subinstr2 = (op & 0x00e0) >> 5; + + switch (subinstr2) + { + case 0x00: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// J_S [b] 0111 1bbb 0000 0000 +// ####################################################################################################################### + size = handle_dasm_J_S_b(stream, pc, op, opcodes); break; // J_S [b] + } + case 0x01: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// J_S.D [b] 0111 1bbb 0010 0000 +// ####################################################################################################################### + size = handle_dasm_J_S_D_b(stream, pc, op, opcodes); break; // J_S.D [b] + } + case 0x02: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// JL_S [b] 0111 1bbb 0100 0000 +// ####################################################################################################################### + size = handle_dasm_JL_S_b(stream, pc, op, opcodes); break; // JL_S [b] + } + case 0x03: + { +// ####################################################################################################################### +// IIII I sssS SSSS +// JL_S.D [b] 0111 1bbb 0110 0000 +// ####################################################################################################################### + size = handle_dasm_JL_S_D_b(stream, pc, op, opcodes); break; // JL_S.D [b] + } + case 0x06: + { +// ####################################################################################################################### +// SUB_S.NE b,b,b 0111 1bbb 1100 0000 +// IIII I sssS SSSS +// ####################################################################################################################### + size = handle_dasm_SUB_S_NE_b_b_b(stream, pc, op, opcodes); break; // SUB_S.NE b,b,b + } + case 0x07: // ZOPs + { + uint8_t subinstr3 = (op & 0x0700) >> 8; + + switch (subinstr3) + { + case 0x00: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// NOP_S 0111 1000 1110 0000 +// ####################################################################################################################### + size = handle_dasm_NOP_S(stream, pc, op, opcodes); break; // NOP_S + } + case 0x01: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// UNIMP_S 0111 1001 1110 0000 +// ####################################################################################################################### + size = handle_dasm_UNIMP_S(stream, pc, op, opcodes); break; // UNIMP_S + } + case 0x04: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// JEQ_S [blink] 0111 1100 1110 0000 +// ####################################################################################################################### + size = handle_dasm_JEQ_S_blink(stream, pc, op, opcodes); break; // JEQ_S [BLINK] + } + case 0x05: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// JNE_S [blink] 0111 1101 1110 0000 +// ####################################################################################################################### + size = handle_dasm_JNE_S_blink(stream, pc, op, opcodes); break; // JNE_S [BLINK] + } + case 0x06: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// J_S [blink] 0111 1110 1110 0000 +// ####################################################################################################################### + size = handle_dasm_J_S_blink(stream, pc, op, opcodes); break; // J_S [BLINK] + } + case 0x07: + { +// ####################################################################################################################### +// IIII I$$$ sssS SSSS +// J_S.D [blink] 0111 1111 1110 0000 +// ####################################################################################################################### + size = handle_dasm_J_S_D_blink(stream, pc, op, opcodes); break; // J_S.D [BLINK] + } + + default: // 0x02, 0x03 + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, subinstr3, op, opcodes); break; + } + } + break; + } + default: // 0x04, 0x05 + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, op, opcodes); break; + } + } + break; + } + case 0x02: + { +// ####################################################################################################################### +// IIII I S SSSS +// SUB_S b,b,c 0111 1bbb ccc0 0010 +// ####################################################################################################################### + size = handle_dasm_SUB_S_b_b_c(stream, pc, op, opcodes); break; // SUB_S b,b,c + } + case 0x04: + { +// ####################################################################################################################### +// IIII I S SSSS +// AND_S b,b,c 0111 1bbb ccc0 0100 +// ####################################################################################################################### + size = handle_dasm_AND_S_b_b_c(stream, pc, op, opcodes); break; // AND_S b,b,c + } + case 0x05: + { +// ####################################################################################################################### +// IIII I S SSSS +// OR_S b,b,c 0111 1bbb ccc0 0101 +// ####################################################################################################################### + size = handle_dasm_OR_S_b_b_c(stream, pc, op, opcodes); break; // OR_S b,b,c + } + case 0x06: + { +// ####################################################################################################################### +// IIII I S SSSS +// BIC_S b,b,c 0111 1bbb ccc0 0110 +// ####################################################################################################################### + size = handle_dasm_BIC_S_b_b_c(stream, pc, op, opcodes); break; // BIC_S b,b,c + } + case 0x07: + { +// ####################################################################################################################### +// IIII I S SSSS +// XOR_S b,b,c 0111 1bbb ccc0 0111 +// ####################################################################################################################### + size = handle_dasm_XOR_S_b_b_c(stream, pc, op, opcodes); break; // XOR_S b,b,c + } + case 0x0b: + { +// ####################################################################################################################### +// IIII I S SSSS +// TST_S b,c 0111 1bbb ccc0 1011 +// ####################################################################################################################### + size = handle_dasm_TST_S_b_c(stream, pc, op, opcodes); break; // TST_S b,c + } + case 0x0c: + { +// ####################################################################################################################### +// IIII I S SSSS +// MUL64_S <0,>b,c 0111 1bbb ccc0 1100 +// ####################################################################################################################### + size = handle_dasm_MUL64_S_0_b_c(stream, pc, op, opcodes); break; // MUL64_S <0,>b,c + } + case 0x0d: + { + +// ####################################################################################################################### +// IIII I S SSSS +// SEXB_S b,c 0111 1bbb ccc0 1101 +// ####################################################################################################################### + size = handle_dasm_SEXB_S_b_c(stream, pc, op, opcodes); break; // SEXB_S b,c + } + case 0x0e: + { +// ####################################################################################################################### +// IIII I S SSSS +// SEXW_S b,c 0111 1bbb ccc0 1110 +// ####################################################################################################################### + size = handle_dasm_SEXW_S_b_c(stream, pc, op, opcodes); break; // SEXW_S b,c + } + case 0x0f: + { +// ####################################################################################################################### +// IIII I S SSSS +// EXTB_S b,c 0111 1bbb ccc0 1111 +// ####################################################################################################################### + size = handle_dasm_EXTB_S_b_c(stream, pc, op, opcodes); break; // EXTB_S b,c + } + case 0x10: + { +// ####################################################################################################################### +// IIII I S SSSS +// EXTW_S b,c 0111 1bbb ccc1 0000 +// ####################################################################################################################### + size = handle_dasm_EXTW_S_b_c(stream, pc, op, opcodes); break; // EXTW_S b,c + } + case 0x11: + { +// ####################################################################################################################### +// IIII I S SSSS +// ABS_S b,c 0111 1bbb ccc1 0001 +// ####################################################################################################################### + size = handle_dasm_ABS_S_b_c(stream, pc, op, opcodes); break; // ABS_S b,c + } + case 0x12: + { +// ####################################################################################################################### +// IIII I S SSSS +// NOT_S b,c 0111 1bbb ccc1 0010 +// ####################################################################################################################### + size = handle_dasm_NOT_S_b_c(stream, pc, op, opcodes); break; // NOT_S b,c + } + case 0x13: + { +// ####################################################################################################################### +// IIII I S SSSS +// NEG_S b,c 0111 1bbb ccc1 0011 +// ####################################################################################################################### + size = handle_dasm_NEG_S_b_c(stream, pc, op, opcodes); break; // NEG_S b,c + } + case 0x14: + { +// ####################################################################################################################### +// IIII I S SSSS +// ADD1_S b,b,c 0111 1bbb ccc1 0100 +// ####################################################################################################################### + size = handle_dasm_ADD1_S_b_b_c(stream, pc, op, opcodes); break; // ADD1_S b,b,c + } + case 0x15: + { +// ####################################################################################################################### +// IIII I S SSSS +// ADD2_S b,b,c 0111 1bbb ccc1 0101 +// ####################################################################################################################### + size = handle_dasm_ADD2_S_b_b_c(stream, pc, op, opcodes); break; // ADD2_S b,b,c + } + case 0x16: + { +// ####################################################################################################################### +// IIII I S SSSS +// ADD3_S b,b,c 0111 1bbb ccc1 0110 +// ####################################################################################################################### + size = handle_dasm_ADD3_S_b_b_c(stream, pc, op, opcodes); break; // ADD3_S b,b,c + } + case 0x18: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASL_S b,b,c 0111 1bbb ccc1 1000 +// ####################################################################################################################### + size = handle_dasm_ASL_S_b_b_c_multiple(stream, pc, op, opcodes); break; // ASL_S b,b,c (multiple) + } + case 0x19: + { +// ####################################################################################################################### +// IIII I S SSSS +// LSR_S b,b,c 0111 1bbb ccc1 1001 +// ####################################################################################################################### + size = handle_dasm_LSR_S_b_b_c_multiple(stream, pc, op, opcodes); break; // LSR_S b,b,c (multiple) + } + case 0x1a: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASR_S b,b,c 0111 1bbb ccc1 1010 +// ####################################################################################################################### + size = handle_dasm_ASR_S_b_b_c_multiple(stream, pc, op, opcodes); break; // ASR_S b,b,c (multiple) + } + case 0x1b: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASL_S b,c 0111 1bbb ccc1 1011 +// ####################################################################################################################### + size = handle_dasm_ASL_S_b_c_single(stream, pc, op, opcodes); break; // ASL_S b,c (single) + } + case 0x1c: + { +// ####################################################################################################################### +// IIII I S SSSS +// ASR_S b,c 0111 1bbb ccc1 1100 +// ####################################################################################################################### + size = handle_dasm_ASR_S_b_c_single(stream, pc, op, opcodes); break; // ASR_S b,c (single) + } + case 0x1d: + { +// ####################################################################################################################### +// IIII I S SSSS +// LSR_S b,c 0111 1bbb ccc1 1101 +// ####################################################################################################################### + size = handle_dasm_LSR_S_b_c_single(stream, pc, op, opcodes); break; // LSR_S b,c (single) + } + case 0x1e: + { +// ####################################################################################################################### +// IIII I S SSSS +// TRAP_S u6 0111 1uuu uuu1 1110 +// ####################################################################################################################### + size = handle_dasm_TRAP_S_u6(stream, pc, op, opcodes); break; // TRAP_S u6 (not a5?) + } + case 0x1f: + { + uint8_t subinstr2 = (op & 0x07e0) >> 5; + if (subinstr2 == 0x3f) + { +// ####################################################################################################################### +// IIII Isss sssS SSSS +// BRK_S 0111 1111 1111 1111 +// ####################################################################################################################### + size = handle_dasm_BRK_S(stream, pc, op, opcodes); break; // BRK_S ( 0x7fff only? ) // BRK_S ( 0x7fff only? ) + } + else + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, op, opcodes); break; + } + } + default: // 0x01, 0x03, 0x08, 0x09, 0x0a, 0x17 + { + size = handle_dasm_illegal(stream, pc, instruction, subinstr, op, opcodes); break; + } + } + break; + } + case 0x10: + { +// ####################################################################################################################### +// IIII I +// LD_S c,[b,u7] 1000 0bbb cccu uuuu +// ####################################################################################################################### + size = handle_dasm_LD_S_c_b_u7(stream, pc, op, opcodes); break; // LD_S c,[b,u7] + } + case 0x11: + { +// ####################################################################################################################### +// IIII I +// LDB_S c,[b,u5] 1000 1bbb cccu uuuu +// ####################################################################################################################### + size = handle_dasm_LDB_S_c_b_u5(stream, pc, op, opcodes); break; // LDB_S c,[b,u5] + } + case 0x12: + { +// ####################################################################################################################### +// IIII I +// LDW_S c,[b,u6] 1001 0bbb cccu uuuu +// ####################################################################################################################### + size = handle_dasm_LDW_S_c_b_u6(stream, pc, op, opcodes); break; // LDW_S c,[b,u6] + } + case 0x13: + { +// ####################################################################################################################### +// IIII I +// LDW_S.X c,[b,u6] 1001 1bbb cccu uuuu +// ####################################################################################################################### + size = handle_dasm_LDW_S_X_c_b_u6(stream, pc, op, opcodes); break; // LDW_S.X c,[b,u6] + } + case 0x14: + { +// ####################################################################################################################### +// IIII I +// ST_S c,[b,u7] 1010 0bbb cccu uuuu +// ####################################################################################################################### + size = handle_dasm_ST_S_c_b_u7(stream, pc, op, opcodes); break; // ST_S c,[b,u7] + } + case 0x15: + { +// ####################################################################################################################### +// IIII I +// STB_S c,[b,u5] 1010 1bbb cccu uuuu +// ####################################################################################################################### + size = handle_dasm_STB_S_c_b_u5(stream, pc, op, opcodes); break; // STB_S + } + case 0x16: + { +// ####################################################################################################################### +// IIII I +// STW_S c,[b,u6] 1011 0bbb cccu uuuu +// ####################################################################################################################### + size = handle_dasm_STW_S_c_b_u6(stream, pc, op, opcodes); break; // STW_S + } + case 0x17: // Shift/Sub/Bit + { + uint8_t subinstr = (op & 0x00e0) >> 5; + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I SSS +// ASL_S b,b,u5 1011 1bbb 000u uuuu +// ####################################################################################################################### + size = handle_dasm_ASL_S_b_b_u5(stream, pc, op, opcodes); break; // ASL_S b,b,u5 + } + case 0x01: + { +// ####################################################################################################################### +// IIII I SSS +// LSR_S b,b,u5 1011 1bbb 001u uuuu +// ####################################################################################################################### + size = handle_dasm_LSR_S_b_b_u5(stream, pc, op, opcodes); break; // LSR_S b,b,u5 + } + case 0x02: + { +// ####################################################################################################################### +// IIII I SSS +// ASR_S b,b,u5 1011 1bbb 010u uuuu +// ####################################################################################################################### + size = handle_dasm_ASR_S_b_b_u5(stream, pc, op, opcodes); break; // ASR_S b,b,u5 + } + case 0x03: + { +// ####################################################################################################################### +// IIII I SSS +// SUB_S b,b,u5 1011 1bbb 011u uuuu +// ####################################################################################################################### + size = handle_dasm_SUB_S_b_b_u5(stream, pc, op, opcodes); break; // SUB_S b,b,u5 + } + case 0x04: + { +// ####################################################################################################################### +// IIII I SSS +// BSET_S b,b,u5 1011 1bbb 100u uuuu +// ####################################################################################################################### + size = handle_dasm_BSET_S_b_b_u5(stream, pc, op, opcodes); break; // BSET_S b,b,u5 + } + case 0x05: + { +// ####################################################################################################################### +// IIII I SSS +// BCLR_S b,b,u5 1011 1bbb 101u uuuu +// ####################################################################################################################### + size = handle_dasm_BCLR_S_b_b_u5(stream, pc, op, opcodes); break; // BCLR_S b,b,u5 + } + case 0x06: + { +// ####################################################################################################################### +// IIII I SSS +// BMSK_S b,b,u5 1011 1bbb 110u uuuu +// ####################################################################################################################### + size = handle_dasm_BMSK_S_b_b_u5(stream, pc, op, opcodes); break; // BMSK_S b,b,u5 + } + case 0x07: + { +// ####################################################################################################################### +// IIII I SSS +// BTST_S b,u5 1011 1bbb 111u uuuu +// ####################################################################################################################### + size = handle_dasm_BTST_S_b_u5(stream, pc, op, opcodes); break; // BTST_S b,u5 + } + } + break; + } + case 0x18: // Stack Instr + { + uint8_t subinstr = (op & 0x00e0) >> 5; + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I SSS +// LD_S b,[sp,u7] 1100 0bbb 000u uuuu +// ####################################################################################################################### + size = handle_dasm_LD_S_b_sp_u7(stream, pc, op, opcodes); break; // LD_S b,[sp,u7] + } + case 0x01: + { +// ####################################################################################################################### +// IIII I SSS +// LDB_S b,[sp,u7] 1100 0bbb 001u uuuu +// ####################################################################################################################### + size = handle_dasm_LDB_S_b_sp_u7(stream, pc, op, opcodes); break; // LDB_S b,[sp,u7] + } + case 0x02: + { +// ####################################################################################################################### +// IIII I SSS +// ST_S b,[sp,u7] 1100 0bbb 010u uuuu +// ####################################################################################################################### + size = handle_dasm_ST_S_b_sp_u7(stream, pc, op, opcodes); break; // ST_S b,[sp,u7] + } + case 0x03: + { +// ####################################################################################################################### +// IIII I SSS +// STB_S b,[sp,u7] 1100 0bbb 011u uuuu +// ####################################################################################################################### + size = handle_dasm_STB_S_b_sp_u7(stream, pc, op, opcodes); break; // STB_S b,[sp,u7] + } + case 0x04: + { +// ####################################################################################################################### +// IIII I SSS +// ADD_S b,sp,u7 1100 0bbb 100u uuuu +// ####################################################################################################################### + size = handle_dasm_ADD_S_b_sp_u7(stream, pc, op, opcodes); break; // ADD_S b,sp,u7 + } + + case 0x05: // subtable 18_05 + { + uint8_t subinstr2 = (op & 0x0700) >> 8; + switch (subinstr2) + { + case 0x00: + { +// ####################################################################################################################### +// IIII Isss SSS +// ADD_S sp,sp,u7 1100 0000 101u uuuu +// ####################################################################################################################### + size = handle_dasm_ADD_S_sp_sp_u7(stream, pc, op, opcodes); break; // ADD_S sp,sp,u7 + } + case 0x01: + { +// ####################################################################################################################### +// IIII Isss SSS +// SUB_S sp,sp,u7 1100 0001 101u uuuu +// ####################################################################################################################### + size = handle_dasm_SUB_S_sp_sp_u7(stream, pc, op, opcodes); break; // SUB_S sp,sp,u7 + } + default: size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, op, opcodes); break; + } + break; + } + case 0x06: // subtable 18_06 + { + uint8_t subinstr2 = op & 0x001f; + switch (subinstr2) + { + case 0x01: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// POP_S b 1100 0bbb 1100 0001 +// ####################################################################################################################### + size = handle_dasm_POP_S_b(stream, pc, op, opcodes); break; // POP_S b + } + case 0x11: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// POP_S blink 1100 0RRR 1101 0001 +// ####################################################################################################################### + size = handle_dasm_POP_S_blink(stream, pc, op, opcodes); break; // POP_S blink + } + default: size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, op, opcodes); break; + } + break; + } + case 0x07: // subtable 18_07 + { + uint8_t subinstr2 = op & 0x001f; + + switch (subinstr2) + { + case 0x01: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// PUSH_S b 1100 0bbb 1110 0001 +// ####################################################################################################################### + size = handle_dasm_PUSH_S_b(stream, pc, op, opcodes); break; // PUSH_S b + } + case 0x11: + { +// ####################################################################################################################### +// IIII I SSSs ssss +// PUSH_S blink 1100 0RRR 1111 0001 +// ####################################################################################################################### + size = handle_dasm_PUSH_S_blink(stream, pc, op, opcodes); break; // PUSH_S blink + } + default: size = handle_dasm_illegal(stream, pc, instruction, subinstr, subinstr2, op, opcodes); break; + } + } + } + break; + } + case 0x19: // GP Instr + { + uint8_t subinstr = (op & 0x0600) >> 9; + + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII ISS +// LD_S r0,[gp,s11] 1100 100s ssss ssss +// ####################################################################################################################### + size = handle_dasm_LD_S_r0_gp_s11(stream, pc, op, opcodes); break; // LD_S r0,[gp,s11] + } + case 0x01: + { +// ####################################################################################################################### +// IIII ISS +// LDB_S r0,[gp,s9] 1100 101s ssss ssss +// ####################################################################################################################### + size = handle_dasm_LDB_S_r0_gp_s9(stream, pc, op, opcodes); break; // LDB_S r0,[gp,s9] + } + case 0x02: + { +// ####################################################################################################################### +// IIII ISS +// LDW_S r0,[gp,s10] 1100 110s ssss ssss +// ####################################################################################################################### + size = handle_dasm_LDW_S_r0_gp_s10(stream, pc, op, opcodes); break; // LDW_S r0,[gp,s10] + } + case 0x03: + { +// ####################################################################################################################### +// IIII ISS +// ADD_S r0,gp,s11 1100 111s ssss ssss +// ####################################################################################################################### + size = handle_dasm_ADD_S_r0_gp_s11(stream, pc, op, opcodes); break; // ADD_S r0,gp,s11 + } + } + break; + } + case 0x1a: + { +// ####################################################################################################################### +// IIII I +// LD_S b,[pcl,u10] 1101 0bbb uuuu uuuu +// ####################################################################################################################### + size = handle_dasm_LD_S_b_pcl_u10(stream, pc, op, opcodes); break; // LD_S b,[pcl,u10] + } + + case 0x1b: + { +// ####################################################################################################################### +// IIII I +// MOV_S b,u8 1101 1bbb uuuu uuuu +// ####################################################################################################################### + size = handle_dasm_MOV_S_b_u8(stream, pc, op, opcodes); break; // MOV_S b, u8 + } + + case 0x1c: // ADD_S/CMP_S + { + uint8_t subinstr = (op & 0x0080) >> 7; + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I s +// ADD_S b,b,u7 1110 0bbb 0uuu uuuu +// ####################################################################################################################### + size = handle_dasm_ADD_S_b_b_u7(stream, pc, op, opcodes); break; // ADD_S b, b, u7 + } + case 0x01: + { +// ####################################################################################################################### +// IIII I s +// CMP_S b,u7 1110 0bbb 1uuu uuuu +// ####################################################################################################################### + size = handle_dasm_CMP_S_b_u7(stream, pc, op, opcodes); break; // CMP_S b, u7 + } + } + break; + } + case 0x1d: // BRcc_S + { + uint8_t subinstr = (op & 0x0080) >> 7; + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII I s +// BREQ_S b,0,s8 1110 1bbb 0sss ssss +// ####################################################################################################################### + size = handle_dasm_BREQ_S_b_0_s8(stream, pc, op, opcodes); break; // BREQ_S b,0,s8 + } + case 0x01: + { +// ####################################################################################################################### +// IIII I s +// BRNE_S b,0,s8 1110 1bbb 1sss ssss +// ####################################################################################################################### + size = handle_dasm_BRNE_S_b_0_s8(stream, pc, op, opcodes); break; // BRNE_S b,0,s8 + } + } + break; + } + case 0x1e: // Bcc_S + { + uint8_t subinstr = (op & 0x0600) >> 9; + switch (subinstr) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII ISS +// B_S s10 1111 000s ssss ssss +// ####################################################################################################################### + size = handle_dasm_B_S_s10(stream, pc, op, opcodes); break; // B_S s10 + } + case 0x01: + { +// ####################################################################################################################### +// IIII ISS +// BEQ_S s10 1111 001s ssss ssss +// ####################################################################################################################### + size = handle_dasm_BEQ_S_s10(stream, pc, op, opcodes); break; // BEQ_S s10 + } + case 0x02: + { +// ####################################################################################################################### +// IIII ISS +// BNE_S s10 1111 010s ssss ssss +// ####################################################################################################################### + size = handle_dasm_BNE_S_s10(stream, pc, op, opcodes); break; // BNE_S s10 + } + case 0x03: // Bcc_S + { + uint8_t subinstr2 = (op & 0x01c0) >> 6; + switch (subinstr2) + { + default: break; // size = -1; + case 0x00: + { +// ####################################################################################################################### +// IIII ISSs ss +// BGT_S s7 1111 0110 00ss ssss +// ####################################################################################################################### + size = handle_dasm_BGT_S_s7(stream, pc, op, opcodes); break; // BGT_S s7 + } + case 0x01: + { +// ####################################################################################################################### +// IIII ISSs ss +// BGE_S s7 1111 0110 01ss ssss +// ####################################################################################################################### + size = handle_dasm_BGE_S_s7(stream, pc, op, opcodes); break; // BGE_S s7 + } + case 0x02: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLT_S s7 1111 0110 10ss ssss +// ####################################################################################################################### + size = handle_dasm_BLT_S_s7(stream, pc, op, opcodes); break; // BLT_S s7 + } + case 0x03: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLE_S s7 1111 0110 11ss ssss +// ####################################################################################################################### + size = handle_dasm_BLE_S_s7(stream, pc, op, opcodes); break; // BLE_S s7 + } + case 0x04: + { +// ####################################################################################################################### +// IIII ISSs ss +// BHI_S s7 1111 0111 00ss ssss +// ####################################################################################################################### + size = handle_dasm_BHI_S_s7(stream, pc, op, opcodes); break; // BHI_S s7 + } + case 0x05: + { +// ####################################################################################################################### +// IIII ISSs ss +// BHS_S s7 1111 0111 01ss ssss +// ####################################################################################################################### + size = handle_dasm_BHS_S_s7(stream, pc, op, opcodes); break; // BHS_S s7 + } + case 0x06: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLO_S s7 1111 0111 10ss ssss +// ####################################################################################################################### + size = handle_dasm_BLO_S_s7(stream, pc, op, opcodes); break; // BLO_S s7 + } + + case 0x07: + { +// ####################################################################################################################### +// IIII ISSs ss +// BLS_S s7 1111 0111 11ss ssss +// ####################################################################################################################### + size = handle_dasm_BLS_S_s7(stream, pc, op, opcodes); break; // BLS_S s7 + } + } + } + } + break; + } + case 0x1f: + { +// ####################################################################################################################### +// IIII I +// BL_S s13 1111 1sss ssss ssss +// ####################################################################################################################### + size = handle_dasm_BL_S_s13(stream, pc, op, opcodes); break; // BL_S s13 + } } } return size | SUPPORTED; } + diff --git a/src/devices/cpu/arcompact/arcompactdasm.h b/src/devices/cpu/arcompact/arcompactdasm.h index 7594c673a0d..d8e41560a00 100644 --- a/src/devices/cpu/arcompact/arcompactdasm.h +++ b/src/devices/cpu/arcompact/arcompactdasm.h @@ -1,7 +1,6 @@ // license:BSD-3-Clause // copyright-holders:David Haywood /*********************************\ - ARCompact disassembler \*********************************/ @@ -33,235 +32,393 @@ public: static const char *const opcodes_04[0x40]; private: - int handle01_01_00_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); - int handle01_01_01_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); - - int handle04_p00_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved); - int handle04_p01_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved); - int handle04_p10_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); - int handle04_p11_m0_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); - int handle04_p11_m1_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); - int handle04_p11_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); - int handle04_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved); - int handle04_2f_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); - int handle04_3x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, int dsize, int extend); - int handle05_2f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); - int handle0c_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int format); - int handle0d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); - int handle0e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int revop); - int handle0f_00_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); - int handle0f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int nodst); - int handle_ld_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int swap); - int handle_l7_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); - int handle18_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int st, int format); - int handle19_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int format); - int handle1d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); - int handle1e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); - int handle1e_03_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); - - int handle00_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle00_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_00_00dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_00_01dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle0c_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0c_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0c_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0c_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0d_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0d_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0d_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0d_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0e_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0e_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0e_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0e_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle19_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle19_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle19_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle19_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1c_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1c_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1d_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1d_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + + static const int DASM_REG_LIMM = 62; + + // registers used in 16-bit opcodes have a limited range + // and can only address registers r0-r3 and r12-r15 + static constexpr uint8_t expand_reg(uint8_t reg) + { + if (reg>3) + return reg + 8; + return reg; + } + + static uint32_t dasm_get_limm_32bit_opcode(uint32_t pc, const data_buffer &opcodes) + { + return (opcodes.r16(pc + 4) << 16) | opcodes.r16(pc + 6); + } + + static uint32_t dasm_get_limm_16bit_opcode(uint32_t pc, const data_buffer &opcodes) + { + return (opcodes.r16(pc + 2) << 16) | opcodes.r16(pc + 4); + } + + static uint8_t dasm_group_0e_get_h(uint16_t &op) + { + uint8_t h = ((op & 0x0007) << 3); + h |= ((op & 0x00e0) >> 5); + return h; + } + + static uint8_t dasm_common32_get_condition(uint32_t& op) + { + uint8_t condition = op & 0x0000001f; + return condition; + } + + static uint8_t dasm_common32_get_breg(uint32_t &op) + { + int b_temp = (op & 0x07000000) >> 24; + int B_temp = (op & 0x00007000) >> 12; + int breg = b_temp | (B_temp << 3); + return breg; + } + + static uint8_t dasm_common32_get_creg(uint32_t& op) + { + int creg = (op & 0x00000fc0) >> 6; + return creg; + } + + static uint8_t dasm_common32_get_areg(uint32_t& op) + { + int areg = op & 0x0000003f; + return areg; + } + + static uint8_t dasm_common32_get_areg_reserved(uint32_t &op) + { + int ares = op & 0x0000003f; + return ares; + } + + static uint32_t dasm_common32_get_u6(uint32_t &op) + { + int u = (op & 0x00000fc0) >> 6; + return u; + } + + static bool dasm_common32_get_F(uint32_t &op) + { + bool F = (op & 0x00008000) ? true : false; + return F; + } + + static uint8_t dasm_common32_get_p(uint32_t &op) + { + int p = (op & 0x00c00000) >> 22; + return p; + } + + static uint32_t dasm_common32_get_s12(uint32_t& op) + { + int S_temp = op & 0x0000003f; + int s_temp = (op & 0x00000fc0) >> 6; + int S = s_temp | (S_temp << 6); + S = util::sext(S, 12); + return S; + } + + static uint8_t dasm_common16_get_breg(uint16_t &op) + { + uint8_t breg = ((op & 0x0700) >> 8); + return breg; + } + + static uint8_t dasm_common16_get_creg(uint16_t& op) + { + uint8_t creg = ((op & 0x00e0) >> 5); + return creg; + } + + static uint8_t dasm_common16_get_areg(uint16_t& op) + { + uint8_t areg = op & 0x0007; + return areg; + } + + static uint32_t dasm_common16_get_u3(uint16_t& op) + { + uint32_t u = op & 0x0007; + return u; + } + + static uint32_t dasm_common16_get_u5(uint16_t& op) + { + uint32_t u = op & 0x001f; + return u; + } + + static uint32_t dasm_common16_get_u8(uint16_t& op) + { + uint32_t u = op & 0x00ff; + return u; + } + + static uint32_t dasm_common16_get_u7(uint16_t& op) + { + uint32_t u = op & 0x007f; + return u; + } + + static uint32_t dasm_common16_get_s9(uint16_t& op) + { + uint32_t s = op & 0x01ff; + s = util::sext(s, 9); + return s; + } + + static void output_aux_regname(std::ostream& stream, uint32_t auxreg); + + static int handle04_MOV_f_a_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle04_MOV_f_a_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle04_MOV_f_b_b_s12_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle04_MOV_cc_f_b_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle04_MOV_cc_f_b_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle04_MOV_p11_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle04_MOV_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + + static int handle01_01_00_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); + static int handle01_01_01_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); + static int handle04_f_a_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved); + static int handle04_f_a_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved); + static int handle04_f_b_b_s12_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); + static int handle04_cc_f_b_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); + static int handle04_cc_f_b_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); + static int handle04_p11_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved); + static int handle04_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved); + static int handle04_2f_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); + static int handle04_3x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, int dsize, int extend); + static int handle05_2f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext); + static int handle0c_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int format); + static int handle0d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); + static int handle0e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int revop); + static int handle0f_00_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); + static int handle0f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int nodst); + static int handle_ld_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int swap); + static int handle_l7_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); + static int handle18_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int st, int format); + static int handle19_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int format); + static int handle1d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); + static int handle1e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); + static int handle1e_03_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext); + + static uint32_t get_01_01_01_address_offset(uint32_t op); + static int handle_dasm32_B_cc_D_s21(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_B_D_s25(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BL_cc_d_s21(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BL_d_s25(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BREQ_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRNE_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRLT_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRGE_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRLO_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRHS_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BBIT0_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BBIT1_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BREQ_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRNE_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRLT_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRGE_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRLO_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRHS_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BBIT0_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BBIT1_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_r_o(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ST_r_o(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + + // ALU Operations, 0x04, [0x00-0x1F] + static int handle_dasm32_ADD(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ADC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SUB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SBC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_AND(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_OR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BIC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_XOR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MAX(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MIN(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MOV(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_TST(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_CMP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_RCMP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_RSUB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BSET(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BCLR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BTST(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BXOR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BMSK(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ADD1(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ADD2(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ADD3(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SUB1(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SUB2(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SUB3(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MPY(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MPYH(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MPYHU(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MPYU(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + // + static int handle_dasm32_Jcc(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_Jcc_D(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_JLcc(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_JLcc_D(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_FLAG(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ASL_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ASR_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LSR_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ROR_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_RRC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SEXB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SEXW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_EXTB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_EXTW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ABS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_NOT(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_RLC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_EX(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SLEEP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SWI(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SYNC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_RTIE(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_BRK(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_0(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_1(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_2(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_3(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_4(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_5(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_6(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LD_7(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ASL_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_LSR_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ASR_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ROR_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MUL64(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MULU64(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ADDS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SUBS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_DIVAW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ASLS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ASRS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ADDSDW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SUBSDW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SWAP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_NORM(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_SAT16(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_RND16(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ABSSW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ABSS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_NEGSW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_NEGS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_NORMW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_ARC_EXT06(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_USER_EXT07(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_USER_EXT08(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MARKET_EXT09(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MARKET_EXT0a(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + static int handle_dasm32_MARKET_EXT0b(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); + + static int handle_dasm_LD_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDB_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDW_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_SUB_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASL_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASR_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD_S_b_b_h_or_limm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_MOV_S_b_h_or_limm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_CMP_S_b_h_or_limm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_MOV_S_h_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_J_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_J_S_D_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_JL_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_JL_S_D_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_SUB_S_NE_b_b_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_NOP_S(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_UNIMP_S(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_JEQ_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_JNE_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_J_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_J_S_D_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_SUB_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_AND_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_OR_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BIC_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_XOR_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_TST_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_MUL64_S_0_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_SEXB_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_SEXW_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_EXTB_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_EXTW_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ABS_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_NOT_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_NEG_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD1_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD2_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD3_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASL_S_b_b_c_multiple(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LSR_S_b_b_c_multiple(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASR_S_b_b_c_multiple(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASL_S_b_c_single(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASR_S_b_c_single(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LSR_S_b_c_single(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_TRAP_S_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BRK_S(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LD_S_c_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDB_S_c_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDW_S_c_b_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDW_S_X_c_b_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ST_S_c_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_STB_S_c_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_STW_S_c_b_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASL_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LSR_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ASR_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_SUB_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BSET_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BCLR_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BMSK_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BTST_S_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LD_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDB_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ST_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_STB_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD_S_sp_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_SUB_S_sp_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_POP_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_POP_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_PUSH_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_PUSH_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LD_S_r0_gp_s11(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDB_S_r0_gp_s9(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LDW_S_r0_gp_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD_S_r0_gp_s11(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_LD_S_b_pcl_u10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_MOV_S_b_u8(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_ADD_S_b_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_CMP_S_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BREQ_S_b_0_s8(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BRNE_S_b_0_s8(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_B_S_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BEQ_S_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BNE_S_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BGT_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BGE_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BLT_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BLE_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BHI_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BHS_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BLO_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BLS_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_BL_S_s13(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); /************************************************************************************************************************************ * * @@ -269,453 +426,15 @@ private: * * ************************************************************************************************************************************/ - int handle01_01_00_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle01_01_01_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - - int handle04_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle04_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle04_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle04_2f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle04_2f_3f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle05_2f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle05_2f_3f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - - int handle04_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle05_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle05_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle05_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle0f_00_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - - int handle18_05_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - - - - - int handle00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle01_01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle04_2f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - int handle05_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - int handle05_2f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes); - - - int handle0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle0f_00_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle18_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); - int handle1e_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_illegal(std::ostream &stream, offs_t pc, uint8_t param1, uint8_t param2, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_illegal(std::ostream &stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint16_t op, const data_buffer &opcodes); + static int handle_dasm_illegal(std::ostream &stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint16_t op, const data_buffer &opcodes); + + static int handle_dasm_illegal(std::ostream &stream, offs_t pc, uint8_t param1, uint8_t param2, uint32_t op, const data_buffer &opcodes); + static int handle_dasm_illegal(std::ostream &stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint32_t op, const data_buffer &opcodes); + static int handle_dasm_illegal(std::ostream &stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op, const data_buffer &opcodes); + static int handle_dasm_reserved(std::ostream &stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op, const data_buffer &opcodes); }; #endif diff --git a/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp b/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp deleted file mode 100644 index f9b296baf34..00000000000 --- a/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp +++ /dev/null @@ -1,987 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:David Haywood -/*********************************\ - - ARCompact disassembler - -\*********************************/ - -#include "emu.h" -#include "arcompactdasm.h" - -int arcompact_disassembler::handle00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr = (op & 0x00010000) >> 16; - op &= ~0x00010000; - - switch (subinstr) - { - case 0x00:size = handle00_00_dasm(stream, pc, op, opcodes); break; // Branch Conditionally - case 0x01:size = handle00_01_dasm(stream, pc, op, opcodes); break; // Branch Unconditionally Far - } - - return size; -} - -int arcompact_disassembler::handle01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr = (op & 0x00010000) >> 16; - op &= ~0x00010000; - - switch (subinstr) - { - case 0x00:size = handle01_00_dasm(stream, pc, op, opcodes); break; // Branh & Link - case 0x01:size = handle01_01_dasm(stream, pc, op, opcodes); break; // Branch on Compare - } - - return size; -} - -int arcompact_disassembler::handle01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr2 = (op & 0x00020000) >> 17; - op &= ~0x00020000; - - switch (subinstr2) - { - case 0x00:size = handle01_00_00dasm(stream, pc, op, opcodes); break; // Branch and Link Conditionally - case 0x01:size = handle01_00_01dasm(stream, pc, op, opcodes); break; // Branch and Link Unconditional Far - } - - return size; -} - -int arcompact_disassembler::handle01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - - uint8_t subinstr2 = (op & 0x00000010) >> 4; - op &= ~0x00000010; - - switch (subinstr2) - { - case 0x00:size = handle01_01_00_dasm(stream, pc, op, opcodes); break; // Branch on Compare Register-Register - case 0x01:size = handle01_01_01_dasm(stream, pc, op, opcodes); break; // Branch on Compare/Bit Test Register-Immediate - } - - return size; -} - -int arcompact_disassembler::handle01_01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr3 = (op & 0x0000000f) >> 0; - op &= ~0x0000000f; - - switch (subinstr3) - { - case 0x00:size = handle01_01_00_00_dasm(stream, pc, op, opcodes); break; // BREQ (reg-reg) - case 0x01:size = handle01_01_00_01_dasm(stream, pc, op, opcodes); break; // BRNE (reg-reg) - case 0x02:size = handle01_01_00_02_dasm(stream, pc, op, opcodes); break; // BRLT (reg-reg) - case 0x03:size = handle01_01_00_03_dasm(stream, pc, op, opcodes); break; // BRGE (reg-reg) - case 0x04:size = handle01_01_00_04_dasm(stream, pc, op, opcodes); break; // BRLO (reg-reg) - case 0x05:size = handle01_01_00_05_dasm(stream, pc, op, opcodes); break; // BRHS (reg-reg) - case 0x06:size = handle01_01_00_06_dasm(stream, pc, op, opcodes); break; // reserved - case 0x07:size = handle01_01_00_07_dasm(stream, pc, op, opcodes); break; // reserved - case 0x08:size = handle01_01_00_08_dasm(stream, pc, op, opcodes); break; // reserved - case 0x09:size = handle01_01_00_09_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0a:size = handle01_01_00_0a_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0b:size = handle01_01_00_0b_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0c:size = handle01_01_00_0c_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0d:size = handle01_01_00_0d_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0e:size = handle01_01_00_0e_dasm(stream, pc, op, opcodes); break; // BBIT0 (reg-reg) - case 0x0f:size = handle01_01_00_0f_dasm(stream, pc, op, opcodes); break; // BBIT1 (reg-reg) - } - - return size; -} - -int arcompact_disassembler::handle01_01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) // Branch on Compare/Bit Test Register-Immediate -{ - int size = 4; - uint8_t subinstr3 = (op & 0x0000000f) >> 0; - op &= ~0x0000000f; - - switch (subinstr3) - { - case 0x00:size = handle01_01_01_00_dasm(stream, pc, op, opcodes); break; // BREQ (reg-imm) - case 0x01:size = handle01_01_01_01_dasm(stream, pc, op, opcodes); break; // BRNE (reg-imm) - case 0x02:size = handle01_01_01_02_dasm(stream, pc, op, opcodes); break; // BRLT (reg-imm) - case 0x03:size = handle01_01_01_03_dasm(stream, pc, op, opcodes); break; // BRGE (reg-imm) - case 0x04:size = handle01_01_01_04_dasm(stream, pc, op, opcodes); break; // BRLO (reg-imm) - case 0x05:size = handle01_01_01_05_dasm(stream, pc, op, opcodes); break; // BRHS (reg-imm) - case 0x06:size = handle01_01_01_06_dasm(stream, pc, op, opcodes); break; // reserved - case 0x07:size = handle01_01_01_07_dasm(stream, pc, op, opcodes); break; // reserved - case 0x08:size = handle01_01_01_08_dasm(stream, pc, op, opcodes); break; // reserved - case 0x09:size = handle01_01_01_09_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0a:size = handle01_01_01_0a_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0b:size = handle01_01_01_0b_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0c:size = handle01_01_01_0c_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0d:size = handle01_01_01_0d_dasm(stream, pc, op, opcodes); break; // reserved - case 0x0e:size = handle01_01_01_0e_dasm(stream, pc, op, opcodes); break; // BBIT0 (reg-imm) - case 0x0f:size = handle01_01_01_0f_dasm(stream, pc, op, opcodes); break; // BBIT1 (reg-imm) - } - - return size; -} - -int arcompact_disassembler::handle04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - // General Operations - - // bitpos - // 11111 111 11 111111 0 000 000000 0 00000 - // fedcb a98 76 543210 f edc ba9876 5 43210 - // - // 00100 bbb 00 iiiiii F BBB CCCCCC A AAAAA General Operations *UN*Conditional Register to Register - // 00100 bbb 01 iiiiii F BBB UUUUUU A AAAAA General Operations *UN*Conditional Register (Unsigned 6-bit IMM) - // 00100 bbb 10 iiiiii F BBB ssssss S SSSSS General Operations *UN*Conditional Register (Signed 12-bit IMM) - - // 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register - // 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM) - uint8_t subinstr = (op & 0x003f0000) >> 16; - op &= ~0x003f0000; - - switch (subinstr) - { - case 0x00:size = handle04_00_dasm(stream, pc, op, opcodes); break; // ADD - case 0x01:size = handle04_01_dasm(stream, pc, op, opcodes); break; // ADC - case 0x02:size = handle04_02_dasm(stream, pc, op, opcodes); break; // SUB - case 0x03:size = handle04_03_dasm(stream, pc, op, opcodes); break; // SBC - case 0x04:size = handle04_04_dasm(stream, pc, op, opcodes); break; // AND - case 0x05:size = handle04_05_dasm(stream, pc, op, opcodes); break; // OR - case 0x06:size = handle04_06_dasm(stream, pc, op, opcodes); break; // BIC - case 0x07:size = handle04_07_dasm(stream, pc, op, opcodes); break; // XOR - case 0x08:size = handle04_08_dasm(stream, pc, op, opcodes); break; // MAX - case 0x09:size = handle04_09_dasm(stream, pc, op, opcodes); break; // MIN - case 0x0a:size = handle04_0a_dasm(stream, pc, op, opcodes); break; // MOV - case 0x0b:size = handle04_0b_dasm(stream, pc, op, opcodes); break; // TST - case 0x0c:size = handle04_0c_dasm(stream, pc, op, opcodes); break; // CMP - case 0x0d:size = handle04_0d_dasm(stream, pc, op, opcodes); break; // RCMP - case 0x0e:size = handle04_0e_dasm(stream, pc, op, opcodes); break; // RSUB - case 0x0f:size = handle04_0f_dasm(stream, pc, op, opcodes); break; // BSET - case 0x10:size = handle04_10_dasm(stream, pc, op, opcodes); break; // BCLR - case 0x11:size = handle04_11_dasm(stream, pc, op, opcodes); break; // BTST - case 0x12:size = handle04_12_dasm(stream, pc, op, opcodes); break; // BXOR - case 0x13:size = handle04_13_dasm(stream, pc, op, opcodes); break; // BMSK - case 0x14:size = handle04_14_dasm(stream, pc, op, opcodes); break; // ADD1 - case 0x15:size = handle04_15_dasm(stream, pc, op, opcodes); break; // ADD2 - case 0x16:size = handle04_16_dasm(stream, pc, op, opcodes); break; // ADD3 - case 0x17:size = handle04_17_dasm(stream, pc, op, opcodes); break; // SUB1 - case 0x18:size = handle04_18_dasm(stream, pc, op, opcodes); break; // SUB2 - case 0x19:size = handle04_19_dasm(stream, pc, op, opcodes); break; // SUB3 - case 0x1a:size = handle04_1a_dasm(stream, pc, op, opcodes); break; // MPY * - case 0x1b:size = handle04_1b_dasm(stream, pc, op, opcodes); break; // MPYH * - case 0x1c:size = handle04_1c_dasm(stream, pc, op, opcodes); break; // MPYHU * - case 0x1d:size = handle04_1d_dasm(stream, pc, op, opcodes); break; // MPYU * - case 0x1e:size = handle04_1e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1f:size = handle04_1f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x20:size = handle04_20_dasm(stream, pc, op, opcodes); break; // Jcc - case 0x21:size = handle04_21_dasm(stream, pc, op, opcodes); break; // Jcc.D - case 0x22:size = handle04_22_dasm(stream, pc, op, opcodes); break; // JLcc - case 0x23:size = handle04_23_dasm(stream, pc, op, opcodes); break; // JLcc.D - case 0x24:size = handle04_24_dasm(stream, pc, op, opcodes); break; // illegal - case 0x25:size = handle04_25_dasm(stream, pc, op, opcodes); break; // illegal - case 0x26:size = handle04_26_dasm(stream, pc, op, opcodes); break; // illegal - case 0x27:size = handle04_27_dasm(stream, pc, op, opcodes); break; // illegal - case 0x28:size = handle04_28_dasm(stream, pc, op, opcodes); break; // LPcc - case 0x29:size = handle04_29_dasm(stream, pc, op, opcodes); break; // FLAG - case 0x2a:size = handle04_2a_dasm(stream, pc, op, opcodes); break; // LR - case 0x2b:size = handle04_2b_dasm(stream, pc, op, opcodes); break; // SR - case 0x2c:size = handle04_2c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2d:size = handle04_2d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2e:size = handle04_2e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2f:size = handle04_2f_dasm(stream, pc, op, opcodes); break; // Sub Opcode - case 0x30:size = handle04_30_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x31:size = handle04_31_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x32:size = handle04_32_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x33:size = handle04_33_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x34:size = handle04_34_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x35:size = handle04_35_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x36:size = handle04_36_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x37:size = handle04_37_dasm(stream, pc, op, opcodes); break; // LD r-r - case 0x38:size = handle04_38_dasm(stream, pc, op, opcodes); break; // illegal - case 0x39:size = handle04_39_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3a:size = handle04_3a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3b:size = handle04_3b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3c:size = handle04_3c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3d:size = handle04_3d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3e:size = handle04_3e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3f:size = handle04_3f_dasm(stream, pc, op, opcodes); break; // illegal - } - - return size; -} - -int arcompact_disassembler::handle04_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr2 = (op & 0x0000003f) >> 0; - op &= ~0x0000003f; - - switch (subinstr2) - { - case 0x00:size = handle04_2f_00_dasm(stream, pc, op, opcodes); break; // ASL - case 0x01:size = handle04_2f_01_dasm(stream, pc, op, opcodes); break; // ASR - case 0x02:size = handle04_2f_02_dasm(stream, pc, op, opcodes); break; // LSR - case 0x03:size = handle04_2f_03_dasm(stream, pc, op, opcodes); break; // ROR - case 0x04:size = handle04_2f_04_dasm(stream, pc, op, opcodes); break; // RCC - case 0x05:size = handle04_2f_05_dasm(stream, pc, op, opcodes); break; // SEXB - case 0x06:size = handle04_2f_06_dasm(stream, pc, op, opcodes); break; // SEXW - case 0x07:size = handle04_2f_07_dasm(stream, pc, op, opcodes); break; // EXTB - case 0x08:size = handle04_2f_08_dasm(stream, pc, op, opcodes); break; // EXTW - case 0x09:size = handle04_2f_09_dasm(stream, pc, op, opcodes); break; // ABS - case 0x0a:size = handle04_2f_0a_dasm(stream, pc, op, opcodes); break; // NOT - case 0x0b:size = handle04_2f_0b_dasm(stream, pc, op, opcodes); break; // RLC - case 0x0c:size = handle04_2f_0c_dasm(stream, pc, op, opcodes); break; // EX - case 0x0d:size = handle04_2f_0d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0e:size = handle04_2f_0e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0f:size = handle04_2f_0f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x10:size = handle04_2f_10_dasm(stream, pc, op, opcodes); break; // illegal - case 0x11:size = handle04_2f_11_dasm(stream, pc, op, opcodes); break; // illegal - case 0x12:size = handle04_2f_12_dasm(stream, pc, op, opcodes); break; // illegal - case 0x13:size = handle04_2f_13_dasm(stream, pc, op, opcodes); break; // illegal - case 0x14:size = handle04_2f_14_dasm(stream, pc, op, opcodes); break; // illegal - case 0x15:size = handle04_2f_15_dasm(stream, pc, op, opcodes); break; // illegal - case 0x16:size = handle04_2f_16_dasm(stream, pc, op, opcodes); break; // illegal - case 0x17:size = handle04_2f_17_dasm(stream, pc, op, opcodes); break; // illegal - case 0x18:size = handle04_2f_18_dasm(stream, pc, op, opcodes); break; // illegal - case 0x19:size = handle04_2f_19_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1a:size = handle04_2f_1a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1b:size = handle04_2f_1b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1c:size = handle04_2f_1c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1d:size = handle04_2f_1d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1e:size = handle04_2f_1e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1f:size = handle04_2f_1f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x20:size = handle04_2f_20_dasm(stream, pc, op, opcodes); break; // illegal - case 0x21:size = handle04_2f_21_dasm(stream, pc, op, opcodes); break; // illegal - case 0x22:size = handle04_2f_22_dasm(stream, pc, op, opcodes); break; // illegal - case 0x23:size = handle04_2f_23_dasm(stream, pc, op, opcodes); break; // illegal - case 0x24:size = handle04_2f_24_dasm(stream, pc, op, opcodes); break; // illegal - case 0x25:size = handle04_2f_25_dasm(stream, pc, op, opcodes); break; // illegal - case 0x26:size = handle04_2f_26_dasm(stream, pc, op, opcodes); break; // illegal - case 0x27:size = handle04_2f_27_dasm(stream, pc, op, opcodes); break; // illegal - case 0x28:size = handle04_2f_28_dasm(stream, pc, op, opcodes); break; // illegal - case 0x29:size = handle04_2f_29_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2a:size = handle04_2f_2a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2b:size = handle04_2f_2b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2c:size = handle04_2f_2c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2d:size = handle04_2f_2d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2e:size = handle04_2f_2e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2f:size = handle04_2f_2f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x30:size = handle04_2f_30_dasm(stream, pc, op, opcodes); break; // illegal - case 0x31:size = handle04_2f_31_dasm(stream, pc, op, opcodes); break; // illegal - case 0x32:size = handle04_2f_32_dasm(stream, pc, op, opcodes); break; // illegal - case 0x33:size = handle04_2f_33_dasm(stream, pc, op, opcodes); break; // illegal - case 0x34:size = handle04_2f_34_dasm(stream, pc, op, opcodes); break; // illegal - case 0x35:size = handle04_2f_35_dasm(stream, pc, op, opcodes); break; // illegal - case 0x36:size = handle04_2f_36_dasm(stream, pc, op, opcodes); break; // illegal - case 0x37:size = handle04_2f_37_dasm(stream, pc, op, opcodes); break; // illegal - case 0x38:size = handle04_2f_38_dasm(stream, pc, op, opcodes); break; // illegal - case 0x39:size = handle04_2f_39_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3a:size = handle04_2f_3a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3b:size = handle04_2f_3b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3c:size = handle04_2f_3c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3d:size = handle04_2f_3d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3e:size = handle04_2f_3e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3f:size = handle04_2f_3f_dasm(stream, pc, op, opcodes); break; // ZOPs (Zero Operand Opcodes) - } - - return size; -} - - -int arcompact_disassembler::handle05_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr2 = (op & 0x0000003f) >> 0; - op &= ~0x0000003f; - - switch (subinstr2) - { - case 0x00:size = handle05_2f_00_dasm(stream, pc, op, opcodes); break; // SWAP - case 0x01:size = handle05_2f_01_dasm(stream, pc, op, opcodes); break; // NORM - case 0x02:size = handle05_2f_02_dasm(stream, pc, op, opcodes); break; // SAT16 - case 0x03:size = handle05_2f_03_dasm(stream, pc, op, opcodes); break; // RND16 - case 0x04:size = handle05_2f_04_dasm(stream, pc, op, opcodes); break; // ABSSW - case 0x05:size = handle05_2f_05_dasm(stream, pc, op, opcodes); break; // ABSS - case 0x06:size = handle05_2f_06_dasm(stream, pc, op, opcodes); break; // NEGSW - case 0x07:size = handle05_2f_07_dasm(stream, pc, op, opcodes); break; // NEGS - case 0x08:size = handle05_2f_08_dasm(stream, pc, op, opcodes); break; // NORMW - case 0x09:size = handle05_2f_09_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0a:size = handle05_2f_0a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0b:size = handle05_2f_0b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0c:size = handle05_2f_0c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0d:size = handle05_2f_0d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0e:size = handle05_2f_0e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0f:size = handle05_2f_0f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x10:size = handle05_2f_10_dasm(stream, pc, op, opcodes); break; // illegal - case 0x11:size = handle05_2f_11_dasm(stream, pc, op, opcodes); break; // illegal - case 0x12:size = handle05_2f_12_dasm(stream, pc, op, opcodes); break; // illegal - case 0x13:size = handle05_2f_13_dasm(stream, pc, op, opcodes); break; // illegal - case 0x14:size = handle05_2f_14_dasm(stream, pc, op, opcodes); break; // illegal - case 0x15:size = handle05_2f_15_dasm(stream, pc, op, opcodes); break; // illegal - case 0x16:size = handle05_2f_16_dasm(stream, pc, op, opcodes); break; // illegal - case 0x17:size = handle05_2f_17_dasm(stream, pc, op, opcodes); break; // illegal - case 0x18:size = handle05_2f_18_dasm(stream, pc, op, opcodes); break; // illegal - case 0x19:size = handle05_2f_19_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1a:size = handle05_2f_1a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1b:size = handle05_2f_1b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1c:size = handle05_2f_1c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1d:size = handle05_2f_1d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1e:size = handle05_2f_1e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1f:size = handle05_2f_1f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x20:size = handle05_2f_20_dasm(stream, pc, op, opcodes); break; // illegal - case 0x21:size = handle05_2f_21_dasm(stream, pc, op, opcodes); break; // illegal - case 0x22:size = handle05_2f_22_dasm(stream, pc, op, opcodes); break; // illegal - case 0x23:size = handle05_2f_23_dasm(stream, pc, op, opcodes); break; // illegal - case 0x24:size = handle05_2f_24_dasm(stream, pc, op, opcodes); break; // illegal - case 0x25:size = handle05_2f_25_dasm(stream, pc, op, opcodes); break; // illegal - case 0x26:size = handle05_2f_26_dasm(stream, pc, op, opcodes); break; // illegal - case 0x27:size = handle05_2f_27_dasm(stream, pc, op, opcodes); break; // illegal - case 0x28:size = handle05_2f_28_dasm(stream, pc, op, opcodes); break; // illegal - case 0x29:size = handle05_2f_29_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2a:size = handle05_2f_2a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2b:size = handle05_2f_2b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2c:size = handle05_2f_2c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2d:size = handle05_2f_2d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2e:size = handle05_2f_2e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2f:size = handle05_2f_2f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x30:size = handle05_2f_30_dasm(stream, pc, op, opcodes); break; // illegal - case 0x31:size = handle05_2f_31_dasm(stream, pc, op, opcodes); break; // illegal - case 0x32:size = handle05_2f_32_dasm(stream, pc, op, opcodes); break; // illegal - case 0x33:size = handle05_2f_33_dasm(stream, pc, op, opcodes); break; // illegal - case 0x34:size = handle05_2f_34_dasm(stream, pc, op, opcodes); break; // illegal - case 0x35:size = handle05_2f_35_dasm(stream, pc, op, opcodes); break; // illegal - case 0x36:size = handle05_2f_36_dasm(stream, pc, op, opcodes); break; // illegal - case 0x37:size = handle05_2f_37_dasm(stream, pc, op, opcodes); break; // illegal - case 0x38:size = handle05_2f_38_dasm(stream, pc, op, opcodes); break; // illegal - case 0x39:size = handle05_2f_39_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3a:size = handle05_2f_3a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3b:size = handle05_2f_3b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3c:size = handle05_2f_3c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3d:size = handle05_2f_3d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3e:size = handle05_2f_3e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3f:size = handle05_2f_3f_dasm(stream, pc, op, opcodes); break; // ZOPs (Zero Operand Opcodes) - } - - return size; -} - -int arcompact_disassembler::handle04_2f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr3 = (op & 0x07000000) >> 24; - subinstr3 |= ((op & 0x00007000) >> 12) << 3; - - op &= ~0x07007000; - - switch (subinstr3) - { - case 0x00:size = handle04_2f_3f_00_dasm(stream, pc, op, opcodes); break; // illegal - case 0x01:size = handle04_2f_3f_01_dasm(stream, pc, op, opcodes); break; // SLEEP - case 0x02:size = handle04_2f_3f_02_dasm(stream, pc, op, opcodes); break; // SWI / TRAP9 - case 0x03:size = handle04_2f_3f_03_dasm(stream, pc, op, opcodes); break; // SYNC - case 0x04:size = handle04_2f_3f_04_dasm(stream, pc, op, opcodes); break; // RTIE - case 0x05:size = handle04_2f_3f_05_dasm(stream, pc, op, opcodes); break; // BRK - case 0x06:size = handle04_2f_3f_06_dasm(stream, pc, op, opcodes); break; // illegal - case 0x07:size = handle04_2f_3f_07_dasm(stream, pc, op, opcodes); break; // illegal - case 0x08:size = handle04_2f_3f_08_dasm(stream, pc, op, opcodes); break; // illegal - case 0x09:size = handle04_2f_3f_09_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0a:size = handle04_2f_3f_0a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0b:size = handle04_2f_3f_0b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0c:size = handle04_2f_3f_0c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0d:size = handle04_2f_3f_0d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0e:size = handle04_2f_3f_0e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0f:size = handle04_2f_3f_0f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x10:size = handle04_2f_3f_10_dasm(stream, pc, op, opcodes); break; // illegal - case 0x11:size = handle04_2f_3f_11_dasm(stream, pc, op, opcodes); break; // illegal - case 0x12:size = handle04_2f_3f_12_dasm(stream, pc, op, opcodes); break; // illegal - case 0x13:size = handle04_2f_3f_13_dasm(stream, pc, op, opcodes); break; // illegal - case 0x14:size = handle04_2f_3f_14_dasm(stream, pc, op, opcodes); break; // illegal - case 0x15:size = handle04_2f_3f_15_dasm(stream, pc, op, opcodes); break; // illegal - case 0x16:size = handle04_2f_3f_16_dasm(stream, pc, op, opcodes); break; // illegal - case 0x17:size = handle04_2f_3f_17_dasm(stream, pc, op, opcodes); break; // illegal - case 0x18:size = handle04_2f_3f_18_dasm(stream, pc, op, opcodes); break; // illegal - case 0x19:size = handle04_2f_3f_19_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1a:size = handle04_2f_3f_1a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1b:size = handle04_2f_3f_1b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1c:size = handle04_2f_3f_1c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1d:size = handle04_2f_3f_1d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1e:size = handle04_2f_3f_1e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1f:size = handle04_2f_3f_1f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x20:size = handle04_2f_3f_20_dasm(stream, pc, op, opcodes); break; // illegal - case 0x21:size = handle04_2f_3f_21_dasm(stream, pc, op, opcodes); break; // illegal - case 0x22:size = handle04_2f_3f_22_dasm(stream, pc, op, opcodes); break; // illegal - case 0x23:size = handle04_2f_3f_23_dasm(stream, pc, op, opcodes); break; // illegal - case 0x24:size = handle04_2f_3f_24_dasm(stream, pc, op, opcodes); break; // illegal - case 0x25:size = handle04_2f_3f_25_dasm(stream, pc, op, opcodes); break; // illegal - case 0x26:size = handle04_2f_3f_26_dasm(stream, pc, op, opcodes); break; // illegal - case 0x27:size = handle04_2f_3f_27_dasm(stream, pc, op, opcodes); break; // illegal - case 0x28:size = handle04_2f_3f_28_dasm(stream, pc, op, opcodes); break; // illegal - case 0x29:size = handle04_2f_3f_29_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2a:size = handle04_2f_3f_2a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2b:size = handle04_2f_3f_2b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2c:size = handle04_2f_3f_2c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2d:size = handle04_2f_3f_2d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2e:size = handle04_2f_3f_2e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2f:size = handle04_2f_3f_2f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x30:size = handle04_2f_3f_30_dasm(stream, pc, op, opcodes); break; // illegal - case 0x31:size = handle04_2f_3f_31_dasm(stream, pc, op, opcodes); break; // illegal - case 0x32:size = handle04_2f_3f_32_dasm(stream, pc, op, opcodes); break; // illegal - case 0x33:size = handle04_2f_3f_33_dasm(stream, pc, op, opcodes); break; // illegal - case 0x34:size = handle04_2f_3f_34_dasm(stream, pc, op, opcodes); break; // illegal - case 0x35:size = handle04_2f_3f_35_dasm(stream, pc, op, opcodes); break; // illegal - case 0x36:size = handle04_2f_3f_36_dasm(stream, pc, op, opcodes); break; // illegal - case 0x37:size = handle04_2f_3f_37_dasm(stream, pc, op, opcodes); break; // illegal - case 0x38:size = handle04_2f_3f_38_dasm(stream, pc, op, opcodes); break; // illegal - case 0x39:size = handle04_2f_3f_39_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3a:size = handle04_2f_3f_3a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3b:size = handle04_2f_3f_3b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3c:size = handle04_2f_3f_3c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3d:size = handle04_2f_3f_3d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3e:size = handle04_2f_3f_3e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3f:size = handle04_2f_3f_3f_dasm(stream, pc, op, opcodes); break; // illegal - } - - return size; -} - - -int arcompact_disassembler::handle05_2f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) // useless ZOP group, no actual opcodes -{ - int size = 4; - uint8_t subinstr3 = (op & 0x07000000) >> 24; - subinstr3 |= ((op & 0x00007000) >> 12) << 3; - - op &= ~0x07007000; - - switch (subinstr3) - { - case 0x00:size = handle05_2f_3f_00_dasm(stream, pc, op, opcodes); break; // illegal - case 0x01:size = handle05_2f_3f_01_dasm(stream, pc, op, opcodes); break; // illegal - case 0x02:size = handle05_2f_3f_02_dasm(stream, pc, op, opcodes); break; // illegal - case 0x03:size = handle05_2f_3f_03_dasm(stream, pc, op, opcodes); break; // illegal - case 0x04:size = handle05_2f_3f_04_dasm(stream, pc, op, opcodes); break; // illegal - case 0x05:size = handle05_2f_3f_05_dasm(stream, pc, op, opcodes); break; // illegal - case 0x06:size = handle05_2f_3f_06_dasm(stream, pc, op, opcodes); break; // illegal - case 0x07:size = handle05_2f_3f_07_dasm(stream, pc, op, opcodes); break; // illegal - case 0x08:size = handle05_2f_3f_08_dasm(stream, pc, op, opcodes); break; // illegal - case 0x09:size = handle05_2f_3f_09_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0a:size = handle05_2f_3f_0a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0b:size = handle05_2f_3f_0b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0c:size = handle05_2f_3f_0c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0d:size = handle05_2f_3f_0d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0e:size = handle05_2f_3f_0e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0f:size = handle05_2f_3f_0f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x10:size = handle05_2f_3f_10_dasm(stream, pc, op, opcodes); break; // illegal - case 0x11:size = handle05_2f_3f_11_dasm(stream, pc, op, opcodes); break; // illegal - case 0x12:size = handle05_2f_3f_12_dasm(stream, pc, op, opcodes); break; // illegal - case 0x13:size = handle05_2f_3f_13_dasm(stream, pc, op, opcodes); break; // illegal - case 0x14:size = handle05_2f_3f_14_dasm(stream, pc, op, opcodes); break; // illegal - case 0x15:size = handle05_2f_3f_15_dasm(stream, pc, op, opcodes); break; // illegal - case 0x16:size = handle05_2f_3f_16_dasm(stream, pc, op, opcodes); break; // illegal - case 0x17:size = handle05_2f_3f_17_dasm(stream, pc, op, opcodes); break; // illegal - case 0x18:size = handle05_2f_3f_18_dasm(stream, pc, op, opcodes); break; // illegal - case 0x19:size = handle05_2f_3f_19_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1a:size = handle05_2f_3f_1a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1b:size = handle05_2f_3f_1b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1c:size = handle05_2f_3f_1c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1d:size = handle05_2f_3f_1d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1e:size = handle05_2f_3f_1e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1f:size = handle05_2f_3f_1f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x20:size = handle05_2f_3f_20_dasm(stream, pc, op, opcodes); break; // illegal - case 0x21:size = handle05_2f_3f_21_dasm(stream, pc, op, opcodes); break; // illegal - case 0x22:size = handle05_2f_3f_22_dasm(stream, pc, op, opcodes); break; // illegal - case 0x23:size = handle05_2f_3f_23_dasm(stream, pc, op, opcodes); break; // illegal - case 0x24:size = handle05_2f_3f_24_dasm(stream, pc, op, opcodes); break; // illegal - case 0x25:size = handle05_2f_3f_25_dasm(stream, pc, op, opcodes); break; // illegal - case 0x26:size = handle05_2f_3f_26_dasm(stream, pc, op, opcodes); break; // illegal - case 0x27:size = handle05_2f_3f_27_dasm(stream, pc, op, opcodes); break; // illegal - case 0x28:size = handle05_2f_3f_28_dasm(stream, pc, op, opcodes); break; // illegal - case 0x29:size = handle05_2f_3f_29_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2a:size = handle05_2f_3f_2a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2b:size = handle05_2f_3f_2b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2c:size = handle05_2f_3f_2c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2d:size = handle05_2f_3f_2d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2e:size = handle05_2f_3f_2e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2f:size = handle05_2f_3f_2f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x30:size = handle05_2f_3f_30_dasm(stream, pc, op, opcodes); break; // illegal - case 0x31:size = handle05_2f_3f_31_dasm(stream, pc, op, opcodes); break; // illegal - case 0x32:size = handle05_2f_3f_32_dasm(stream, pc, op, opcodes); break; // illegal - case 0x33:size = handle05_2f_3f_33_dasm(stream, pc, op, opcodes); break; // illegal - case 0x34:size = handle05_2f_3f_34_dasm(stream, pc, op, opcodes); break; // illegal - case 0x35:size = handle05_2f_3f_35_dasm(stream, pc, op, opcodes); break; // illegal - case 0x36:size = handle05_2f_3f_36_dasm(stream, pc, op, opcodes); break; // illegal - case 0x37:size = handle05_2f_3f_37_dasm(stream, pc, op, opcodes); break; // illegal - case 0x38:size = handle05_2f_3f_38_dasm(stream, pc, op, opcodes); break; // illegal - case 0x39:size = handle05_2f_3f_39_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3a:size = handle05_2f_3f_3a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3b:size = handle05_2f_3f_3b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3c:size = handle05_2f_3f_3c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3d:size = handle05_2f_3f_3d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3e:size = handle05_2f_3f_3e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3f:size = handle05_2f_3f_3f_dasm(stream, pc, op, opcodes); break; // illegal - } - - return size; -} - - -// this is an Extension ALU group, maybe optional on some CPUs? -int arcompact_disassembler::handle05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint8_t subinstr = (op & 0x003f0000) >> 16; - op &= ~0x003f0000; - - switch (subinstr) - { - case 0x00:size = handle05_00_dasm(stream, pc, op, opcodes); break; // ASL - case 0x01:size = handle05_01_dasm(stream, pc, op, opcodes); break; // LSR - case 0x02:size = handle05_02_dasm(stream, pc, op, opcodes); break; // ASR - case 0x03:size = handle05_03_dasm(stream, pc, op, opcodes); break; // ROR - case 0x04:size = handle05_04_dasm(stream, pc, op, opcodes); break; // MUL64 - case 0x05:size = handle05_05_dasm(stream, pc, op, opcodes); break; // MULU64 - case 0x06:size = handle05_06_dasm(stream, pc, op, opcodes); break; // ADDS - case 0x07:size = handle05_07_dasm(stream, pc, op, opcodes); break; // SUBS - case 0x08:size = handle05_08_dasm(stream, pc, op, opcodes); break; // DIVAW - case 0x09:size = handle05_09_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0a:size = handle05_0a_dasm(stream, pc, op, opcodes); break; // ASLS - case 0x0b:size = handle05_0b_dasm(stream, pc, op, opcodes); break; // ASRS - case 0x0c:size = handle05_0c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0d:size = handle05_0d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0e:size = handle05_0e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x0f:size = handle05_0f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x10:size = handle05_10_dasm(stream, pc, op, opcodes); break; // illegal - case 0x11:size = handle05_11_dasm(stream, pc, op, opcodes); break; // illegal - case 0x12:size = handle05_12_dasm(stream, pc, op, opcodes); break; // illegal - case 0x13:size = handle05_13_dasm(stream, pc, op, opcodes); break; // illegal - case 0x14:size = handle05_14_dasm(stream, pc, op, opcodes); break; // illegal - case 0x15:size = handle05_15_dasm(stream, pc, op, opcodes); break; // illegal - case 0x16:size = handle05_16_dasm(stream, pc, op, opcodes); break; // illegal - case 0x17:size = handle05_17_dasm(stream, pc, op, opcodes); break; // illegal - case 0x18:size = handle05_18_dasm(stream, pc, op, opcodes); break; // illegal - case 0x19:size = handle05_19_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1a:size = handle05_1a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1b:size = handle05_1b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1c:size = handle05_1c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1d:size = handle05_1d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1e:size = handle05_1e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x1f:size = handle05_1f_dasm(stream, pc, op, opcodes); break; // illegal - case 0x20:size = handle05_20_dasm(stream, pc, op, opcodes); break; // illegal - case 0x21:size = handle05_21_dasm(stream, pc, op, opcodes); break; // illegal - case 0x22:size = handle05_22_dasm(stream, pc, op, opcodes); break; // illegal - case 0x23:size = handle05_23_dasm(stream, pc, op, opcodes); break; // illegal - case 0x24:size = handle05_24_dasm(stream, pc, op, opcodes); break; // illegal - case 0x25:size = handle05_25_dasm(stream, pc, op, opcodes); break; // illegal - case 0x26:size = handle05_26_dasm(stream, pc, op, opcodes); break; // illegal - case 0x27:size = handle05_27_dasm(stream, pc, op, opcodes); break; // illegal - case 0x28:size = handle05_28_dasm(stream, pc, op, opcodes); break; // ADDSDW - case 0x29:size = handle05_29_dasm(stream, pc, op, opcodes); break; // SUBSDW - case 0x2a:size = handle05_2a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2b:size = handle05_2b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2c:size = handle05_2c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2d:size = handle05_2d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2e:size = handle05_2e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x2f:size = handle05_2f_dasm(stream, pc, op, opcodes); break; // SOPs - case 0x30:size = handle05_30_dasm(stream, pc, op, opcodes); break; // illegal - case 0x31:size = handle05_31_dasm(stream, pc, op, opcodes); break; // illegal - case 0x32:size = handle05_32_dasm(stream, pc, op, opcodes); break; // illegal - case 0x33:size = handle05_33_dasm(stream, pc, op, opcodes); break; // illegal - case 0x34:size = handle05_34_dasm(stream, pc, op, opcodes); break; // illegal - case 0x35:size = handle05_35_dasm(stream, pc, op, opcodes); break; // illegal - case 0x36:size = handle05_36_dasm(stream, pc, op, opcodes); break; // illegal - case 0x37:size = handle05_37_dasm(stream, pc, op, opcodes); break; // illegal - case 0x38:size = handle05_38_dasm(stream, pc, op, opcodes); break; // illegal - case 0x39:size = handle05_39_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3a:size = handle05_3a_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3b:size = handle05_3b_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3c:size = handle05_3c_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3d:size = handle05_3d_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3e:size = handle05_3e_dasm(stream, pc, op, opcodes); break; // illegal - case 0x3f:size = handle05_3f_dasm(stream, pc, op, opcodes); break; // illegal - } - - return size; -} - -int arcompact_disassembler::handle0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x0018) >> 3; - op &= ~0x0018; - - switch (subinstr) - { - case 0x00:size = handle0c_00_dasm(stream, pc, op, opcodes); break; // LD_S - case 0x01:size = handle0c_01_dasm(stream, pc, op, opcodes); break; // LDB_S - case 0x02:size = handle0c_02_dasm(stream, pc, op, opcodes); break; // LDW_S - case 0x03:size = handle0c_03_dasm(stream, pc, op, opcodes); break; // ADD_S - } - return size; -} - -int arcompact_disassembler::handle0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x0018) >> 3; - op &= ~0x0018; - - switch (subinstr) - { - case 0x00:size = handle0d_00_dasm(stream, pc, op, opcodes); break; // ADD_S - case 0x01:size = handle0d_01_dasm(stream, pc, op, opcodes); break; // SUB_S - case 0x02:size = handle0d_02_dasm(stream, pc, op, opcodes); break; // ASL_S - case 0x03:size = handle0d_03_dasm(stream, pc, op, opcodes); break; // ASR_S - } - return size; -} - -int arcompact_disassembler::handle0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x0018) >> 3; - op &= ~0x0018; - - switch (subinstr) - { - case 0x00:size = handle0e_00_dasm(stream, pc, op, opcodes); break; // ADD_S - case 0x01:size = handle0e_01_dasm(stream, pc, op, opcodes); break; // MOV_S - case 0x02:size = handle0e_02_dasm(stream, pc, op, opcodes); break; // CMP_S - case 0x03:size = handle0e_03_dasm(stream, pc, op, opcodes); break; // MOV_S - } - return size; -} - -int arcompact_disassembler::handle0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - // General Register Instructions (16-bit) - // 0111 1bbb ccci iiii - uint8_t subinstr = (op & 0x01f) >> 0; - op &= ~0x001f; - - switch (subinstr) - { - case 0x00:size = handle0f_00_dasm(stream, pc, op, opcodes); break; // SOPs - case 0x01:size = handle0f_01_dasm(stream, pc, op, opcodes); break; // 0x01 - case 0x02:size = handle0f_02_dasm(stream, pc, op, opcodes); break; // SUB_S - case 0x03:size = handle0f_03_dasm(stream, pc, op, opcodes); break; // 0x03 - case 0x04:size = handle0f_04_dasm(stream, pc, op, opcodes); break; // AND_S - case 0x05:size = handle0f_05_dasm(stream, pc, op, opcodes); break; // OR_S - case 0x06:size = handle0f_06_dasm(stream, pc, op, opcodes); break; // BIC_S - case 0x07:size = handle0f_07_dasm(stream, pc, op, opcodes); break; // XOR_S - case 0x08:size = handle0f_08_dasm(stream, pc, op, opcodes); break; // 0x08 - case 0x09:size = handle0f_09_dasm(stream, pc, op, opcodes); break; // 0x09 - case 0x0a:size = handle0f_0a_dasm(stream, pc, op, opcodes); break; // 0x0a - case 0x0b:size = handle0f_0b_dasm(stream, pc, op, opcodes); break; // TST_S - case 0x0c:size = handle0f_0c_dasm(stream, pc, op, opcodes); break; // MUL64_S - case 0x0d:size = handle0f_0d_dasm(stream, pc, op, opcodes); break; // SEXB_S - case 0x0e:size = handle0f_0e_dasm(stream, pc, op, opcodes); break; // SEXW_S - case 0x0f:size = handle0f_0f_dasm(stream, pc, op, opcodes); break; // EXTB_S - case 0x10:size = handle0f_10_dasm(stream, pc, op, opcodes); break; // EXTW_S - case 0x11:size = handle0f_11_dasm(stream, pc, op, opcodes); break; // ABS_S - case 0x12:size = handle0f_12_dasm(stream, pc, op, opcodes); break; // NOT_S - case 0x13:size = handle0f_13_dasm(stream, pc, op, opcodes); break; // NEG_S - case 0x14:size = handle0f_14_dasm(stream, pc, op, opcodes); break; // ADD1_S - case 0x15:size = handle0f_15_dasm(stream, pc, op, opcodes); break; // ADD2_S - case 0x16:size = handle0f_16_dasm(stream, pc, op, opcodes); break; // ADD3_S - case 0x17:size = handle0f_17_dasm(stream, pc, op, opcodes); break; // 0x17 - case 0x18:size = handle0f_18_dasm(stream, pc, op, opcodes); break; // ASL_S (multiple) - case 0x19:size = handle0f_19_dasm(stream, pc, op, opcodes); break; // LSR_S (multiple) - case 0x1a:size = handle0f_1a_dasm(stream, pc, op, opcodes); break; // ASR_S (multiple) - case 0x1b:size = handle0f_1b_dasm(stream, pc, op, opcodes); break; // ASL_S (single) - case 0x1c:size = handle0f_1c_dasm(stream, pc, op, opcodes); break; // LSR_S (single) - case 0x1d:size = handle0f_1d_dasm(stream, pc, op, opcodes); break; // ASR_S (single) - case 0x1e:size = handle0f_1e_dasm(stream, pc, op, opcodes); break; // TRAP (not a5?) - case 0x1f:size = handle0f_1f_dasm(stream, pc, op, opcodes); break; // BRK_S ( 0x7fff only? ) - - } - return size; -} - -int arcompact_disassembler::handle0f_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x00e0) >> 5; - op &= ~0x00e0; - - switch (subinstr) - { - case 0x00:size = handle0f_00_00_dasm(stream, pc, op, opcodes); break; // J_S - case 0x01:size = handle0f_00_01_dasm(stream, pc, op, opcodes); break; // J_S.D - case 0x02:size = handle0f_00_02_dasm(stream, pc, op, opcodes); break; // JL_S - case 0x03:size = handle0f_00_03_dasm(stream, pc, op, opcodes); break; // JL_S.D - case 0x04:size = handle0f_00_04_dasm(stream, pc, op, opcodes); break; // 0x04 - case 0x05:size = handle0f_00_05_dasm(stream, pc, op, opcodes); break; // 0x05 - case 0x06:size = handle0f_00_06_dasm(stream, pc, op, opcodes); break; // SUB_S.NE - case 0x07:size = handle0f_00_07_dasm(stream, pc, op, opcodes); break; // ZOPs - - } - - return size; -} - -int arcompact_disassembler::handle0f_00_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - // General Operations w/o Register - // 01111 iii 111 00000 - uint8_t subinstr3 = (op & 0x0700) >> 8; - op &= ~0x0700; - - switch (subinstr3) - { - case 0x00:size = handle0f_00_07_00_dasm(stream, pc, op, opcodes); break; // NOP_S - case 0x01:size = handle0f_00_07_01_dasm(stream, pc, op, opcodes); break; // UNIMP_S - case 0x02:size = handle0f_00_07_02_dasm(stream, pc, op, opcodes); break; // 0x02 - case 0x03:size = handle0f_00_07_03_dasm(stream, pc, op, opcodes); break; // 0x03 - case 0x04:size = handle0f_00_07_04_dasm(stream, pc, op, opcodes); break; // JEQ_S [BLINK] - case 0x05:size = handle0f_00_07_05_dasm(stream, pc, op, opcodes); break; // JNE_S [BLINK] - case 0x06:size = handle0f_00_07_06_dasm(stream, pc, op, opcodes); break; // J_S [BLINK] - case 0x07:size = handle0f_00_07_07_dasm(stream, pc, op, opcodes); break; // J_S.D [BLINK] - - } - return size; -} - -int arcompact_disassembler::handle17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x00e0) >> 5; - op &= ~0x00e0; - - switch (subinstr) - { - case 0x00:size = handle17_00_dasm(stream, pc, op, opcodes); break; // ASL_S - case 0x01:size = handle17_01_dasm(stream, pc, op, opcodes); break; // LSR_S - case 0x02:size = handle17_02_dasm(stream, pc, op, opcodes); break; // ASR_S - case 0x03:size = handle17_03_dasm(stream, pc, op, opcodes); break; // SUB_S - case 0x04:size = handle17_04_dasm(stream, pc, op, opcodes); break; // BSET_S - case 0x05:size = handle17_05_dasm(stream, pc, op, opcodes); break; // BCLR_S - case 0x06:size = handle17_06_dasm(stream, pc, op, opcodes); break; // BMSK_S - case 0x07:size = handle17_07_dasm(stream, pc, op, opcodes); break; // BTST_S - } - - return size; -} - -int arcompact_disassembler::handle18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - // Stack Pointer Based Instructions (16-bit) - // 11000 bbb iii uuuuu - uint8_t subinstr = (op & 0x00e0) >> 5; - op &= ~0x00e0; - - switch (subinstr) - { - case 0x00:size = handle18_00_dasm(stream, pc, op, opcodes); break; // LD_S (SP) - case 0x01:size = handle18_01_dasm(stream, pc, op, opcodes); break; // LDB_S (SP) - case 0x02:size = handle18_02_dasm(stream, pc, op, opcodes); break; // ST_S (SP) - case 0x03:size = handle18_03_dasm(stream, pc, op, opcodes); break; // STB_S (SP) - case 0x04:size = handle18_04_dasm(stream, pc, op, opcodes); break; // ADD_S (SP) - case 0x05:size = handle18_05_dasm(stream, pc, op, opcodes); break; // subtable 18_05 - case 0x06:size = handle18_06_dasm(stream, pc, op, opcodes); break; // subtable 18_06 - case 0x07:size = handle18_07_dasm(stream, pc, op, opcodes); break; // subtable 18_07 - } - - return size; -} - -int arcompact_disassembler::handle18_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr2 = (op & 0x0700) >> 8; - op &= ~0x0700; - - switch (subinstr2) - { - case 0x00:size = handle18_05_00_dasm(stream, pc, op, opcodes); break; // ADD_S (SP) - case 0x01:size = handle18_05_01_dasm(stream, pc, op, opcodes); break; // SUB_S (SP) - case 0x02:size = handle18_05_02_dasm(stream, pc, op, opcodes); break; // - case 0x03:size = handle18_05_03_dasm(stream, pc, op, opcodes); break; // - case 0x04:size = handle18_05_04_dasm(stream, pc, op, opcodes); break; // - case 0x05:size = handle18_05_05_dasm(stream, pc, op, opcodes); break; // - case 0x06:size = handle18_05_06_dasm(stream, pc, op, opcodes); break; // - case 0x07:size = handle18_05_07_dasm(stream, pc, op, opcodes); break; // - } - - return size; -} - -int arcompact_disassembler::handle18_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr2 = (op & 0x001f) >> 0; - op &= ~0x001f; - - switch (subinstr2) - { - case 0x00:size = handle18_06_00_dasm(stream, pc, op, opcodes); break; // - case 0x01:size = handle18_06_01_dasm(stream, pc, op, opcodes); break; // POP_S b - case 0x02:size = handle18_06_02_dasm(stream, pc, op, opcodes); break; // - case 0x03:size = handle18_06_03_dasm(stream, pc, op, opcodes); break; // - case 0x04:size = handle18_06_04_dasm(stream, pc, op, opcodes); break; // - case 0x05:size = handle18_06_05_dasm(stream, pc, op, opcodes); break; // - case 0x06:size = handle18_06_06_dasm(stream, pc, op, opcodes); break; // - case 0x07:size = handle18_06_07_dasm(stream, pc, op, opcodes); break; // - case 0x08:size = handle18_06_08_dasm(stream, pc, op, opcodes); break; // - case 0x09:size = handle18_06_09_dasm(stream, pc, op, opcodes); break; // - case 0x0a:size = handle18_06_0a_dasm(stream, pc, op, opcodes); break; // - case 0x0b:size = handle18_06_0b_dasm(stream, pc, op, opcodes); break; // - case 0x0c:size = handle18_06_0c_dasm(stream, pc, op, opcodes); break; // - case 0x0d:size = handle18_06_0d_dasm(stream, pc, op, opcodes); break; // - case 0x0e:size = handle18_06_0e_dasm(stream, pc, op, opcodes); break; // - case 0x0f:size = handle18_06_0f_dasm(stream, pc, op, opcodes); break; // - case 0x10:size = handle18_06_10_dasm(stream, pc, op, opcodes); break; // - case 0x11:size = handle18_06_11_dasm(stream, pc, op, opcodes); break; // POP_S blink - case 0x12:size = handle18_06_12_dasm(stream, pc, op, opcodes); break; // - case 0x13:size = handle18_06_13_dasm(stream, pc, op, opcodes); break; // - case 0x14:size = handle18_06_14_dasm(stream, pc, op, opcodes); break; // - case 0x15:size = handle18_06_15_dasm(stream, pc, op, opcodes); break; // - case 0x16:size = handle18_06_16_dasm(stream, pc, op, opcodes); break; // - case 0x17:size = handle18_06_17_dasm(stream, pc, op, opcodes); break; // - case 0x18:size = handle18_06_18_dasm(stream, pc, op, opcodes); break; // - case 0x19:size = handle18_06_19_dasm(stream, pc, op, opcodes); break; // - case 0x1a:size = handle18_06_1a_dasm(stream, pc, op, opcodes); break; // - case 0x1b:size = handle18_06_1b_dasm(stream, pc, op, opcodes); break; // - case 0x1c:size = handle18_06_1c_dasm(stream, pc, op, opcodes); break; // - case 0x1d:size = handle18_06_1d_dasm(stream, pc, op, opcodes); break; // - case 0x1e:size = handle18_06_1e_dasm(stream, pc, op, opcodes); break; // - case 0x1f:size = handle18_06_1f_dasm(stream, pc, op, opcodes); break; // - } - - return size; -} - -int arcompact_disassembler::handle18_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr2 = (op & 0x001f) >> 0; - op &= ~0x001f; - - switch (subinstr2) - { - case 0x00:size = handle18_07_00_dasm(stream, pc, op, opcodes); break; // - case 0x01:size = handle18_07_01_dasm(stream, pc, op, opcodes); break; // PUSH_S b - case 0x02:size = handle18_07_02_dasm(stream, pc, op, opcodes); break; // - case 0x03:size = handle18_07_03_dasm(stream, pc, op, opcodes); break; // - case 0x04:size = handle18_07_04_dasm(stream, pc, op, opcodes); break; // - case 0x05:size = handle18_07_05_dasm(stream, pc, op, opcodes); break; // - case 0x06:size = handle18_07_06_dasm(stream, pc, op, opcodes); break; // - case 0x07:size = handle18_07_07_dasm(stream, pc, op, opcodes); break; // - case 0x08:size = handle18_07_08_dasm(stream, pc, op, opcodes); break; // - case 0x09:size = handle18_07_09_dasm(stream, pc, op, opcodes); break; // - case 0x0a:size = handle18_07_0a_dasm(stream, pc, op, opcodes); break; // - case 0x0b:size = handle18_07_0b_dasm(stream, pc, op, opcodes); break; // - case 0x0c:size = handle18_07_0c_dasm(stream, pc, op, opcodes); break; // - case 0x0d:size = handle18_07_0d_dasm(stream, pc, op, opcodes); break; // - case 0x0e:size = handle18_07_0e_dasm(stream, pc, op, opcodes); break; // - case 0x0f:size = handle18_07_0f_dasm(stream, pc, op, opcodes); break; // - case 0x10:size = handle18_07_10_dasm(stream, pc, op, opcodes); break; // - case 0x11:size = handle18_07_11_dasm(stream, pc, op, opcodes); break; // PUSH_S blink - case 0x12:size = handle18_07_12_dasm(stream, pc, op, opcodes); break; // - case 0x13:size = handle18_07_13_dasm(stream, pc, op, opcodes); break; // - case 0x14:size = handle18_07_14_dasm(stream, pc, op, opcodes); break; // - case 0x15:size = handle18_07_15_dasm(stream, pc, op, opcodes); break; // - case 0x16:size = handle18_07_16_dasm(stream, pc, op, opcodes); break; // - case 0x17:size = handle18_07_17_dasm(stream, pc, op, opcodes); break; // - case 0x18:size = handle18_07_18_dasm(stream, pc, op, opcodes); break; // - case 0x19:size = handle18_07_19_dasm(stream, pc, op, opcodes); break; // - case 0x1a:size = handle18_07_1a_dasm(stream, pc, op, opcodes); break; // - case 0x1b:size = handle18_07_1b_dasm(stream, pc, op, opcodes); break; // - case 0x1c:size = handle18_07_1c_dasm(stream, pc, op, opcodes); break; // - case 0x1d:size = handle18_07_1d_dasm(stream, pc, op, opcodes); break; // - case 0x1e:size = handle18_07_1e_dasm(stream, pc, op, opcodes); break; // - case 0x1f:size = handle18_07_1f_dasm(stream, pc, op, opcodes); break; // - } - - return size; -} - -int arcompact_disassembler::handle19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x0600) >> 9; - op &= ~0x0600; - - switch (subinstr) - { - case 0x00:size = handle19_00_dasm(stream, pc, op, opcodes); break; // LD_S (GP) - case 0x01:size = handle19_01_dasm(stream, pc, op, opcodes); break; // LDB_S (GP) - case 0x02:size = handle19_02_dasm(stream, pc, op, opcodes); break; // LDW_S (GP) - case 0x03:size = handle19_03_dasm(stream, pc, op, opcodes); break; // ADD_S (GP) - } - return size; -} - -int arcompact_disassembler::handle1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x0080) >> 7; - op &= ~0x0080; - - switch (subinstr) - { - case 0x00:size = handle1c_00_dasm(stream, pc, op, opcodes); break; // ADD_S - case 0x01:size = handle1c_01_dasm(stream, pc, op, opcodes); break; // CMP_S - } - return size; -} - -int arcompact_disassembler::handle1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x0080) >> 7; - op &= ~0x0080; - - switch (subinstr) - { - case 0x00:size = handle1d_00_dasm(stream, pc, op, opcodes); break; // BREQ_S - case 0x01:size = handle1d_01_dasm(stream, pc, op, opcodes); break; // BRNE_S - } - return size; -} - -int arcompact_disassembler::handle1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr = (op & 0x0600) >> 9; - op &= ~0x0600; - - switch (subinstr) - { - case 0x00:size = handle1e_00_dasm(stream, pc, op, opcodes); break; // B_S - case 0x01:size = handle1e_01_dasm(stream, pc, op, opcodes); break; // BEQ_S - case 0x02:size = handle1e_02_dasm(stream, pc, op, opcodes); break; // BNE_S - case 0x03:size = handle1e_03_dasm(stream, pc, op, opcodes); break; // Bcc_S - } - return size; -} - -int arcompact_disassembler::handle1e_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int size = 2; - uint8_t subinstr2 = (op & 0x01c0) >> 6; - op &= ~0x01c0; - - switch (subinstr2) - { - case 0x00:size = handle1e_03_00_dasm(stream, pc, op, opcodes); break; // BGT_S - case 0x01:size = handle1e_03_01_dasm(stream, pc, op, opcodes); break; // BGE_S - case 0x02:size = handle1e_03_02_dasm(stream, pc, op, opcodes); break; // BLT_S - case 0x03:size = handle1e_03_03_dasm(stream, pc, op, opcodes); break; // BLE_S - case 0x04:size = handle1e_03_04_dasm(stream, pc, op, opcodes); break; // BHI_S - case 0x05:size = handle1e_03_05_dasm(stream, pc, op, opcodes); break; // BHS_S - case 0x06:size = handle1e_03_06_dasm(stream, pc, op, opcodes); break; // BLO_S - case 0x07:size = handle1e_03_07_dasm(stream, pc, op, opcodes); break; // BLS_S - } - return size; - -} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops.cpp index 7fb9bc412e7..4097d798901 100644 --- a/src/devices/cpu/arcompact/arcompactdasm_ops.cpp +++ b/src/devices/cpu/arcompact/arcompactdasm_ops.cpp @@ -1,7 +1,6 @@ // license:BSD-3-Clause // copyright-holders:David Haywood /*********************************\ - ARCompact disassembler \*********************************/ @@ -10,80 +9,6 @@ #include "arcompactdasm.h" -#define GET_01_01_01_BRANCH_ADDR \ - int32_t address = (op & 0x00fe0000) >> 17; \ - address |= ((op & 0x00008000) >> 15) << 7; \ - if (address & 0x80) address = -0x80 + (address & 0x7f); \ - op &= ~ 0x00fe800f; - - -#define GROUP_0e_GET_h \ - h = ((op & 0x0007) << 3); \ - h |= ((op & 0x00e0) >> 5); \ - op &= ~0x00e7; -#define COMMON32_GET_breg \ - int b_temp = (op & 0x07000000) >> 24; op &= ~0x07000000; \ - int B_temp = (op & 0x00007000) >> 12; op &= ~0x00007000; \ - int breg = b_temp | (B_temp << 3); -#define COMMON32_GET_creg \ - int creg = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; -#define COMMON32_GET_u6 \ - int u = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; -#define COMMON32_GET_areg \ - int areg = (op & 0x0000003f) >> 0; op &= ~0x0000003f; -#define COMMON32_GET_areg_reserved \ - int ares = (op & 0x0000003f) >> 0; op &= ~0x0000003f; -#define COMMON32_GET_F \ - int F = (op & 0x00008000) >> 15; op &= ~0x00008000; -#define COMMON32_GET_p \ - int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000; - -#define COMMON32_GET_s12 \ - int S_temp = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \ - int s_temp = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \ - int S = s_temp | (S_temp<<6); -#define COMMON32_GET_CONDITION \ - uint8_t condition = op & 0x0000001f; op &= ~0x0000001f; - - -#define COMMON16_GET_breg \ - breg = ((op & 0x0700) >>8); \ - op &= ~0x0700; -#define COMMON16_GET_creg \ - creg = ((op & 0x00e0) >>5); \ - op &= ~0x00e0; -#define COMMON16_GET_areg \ - areg = ((op & 0x0007) >>0); \ - op &= ~0x0007; -#define COMMON16_GET_u3 \ - u = ((op & 0x0007) >>0); \ - op &= ~0x0007; -#define COMMON16_GET_u5 \ - u = ((op & 0x001f) >>0); \ - op &= ~0x001f; -#define COMMON16_GET_u8 \ - u = ((op & 0x00ff) >>0); \ - op &= ~0x00ff; -#define COMMON16_GET_u7 \ - u = ((op & 0x007f) >>0); \ - op &= ~0x007f; -#define COMMON16_GET_s9 \ - s = ((op & 0x01ff) >>0); \ - op &= ~0x01ff; -// registers used in 16-bit opcodes hae a limited range -// and can only address registers r0-r3 and r12-r15 - -#define REG_16BIT_RANGE(_reg_) \ - if (_reg_>3) _reg_+= 8; - -// this is as messed up as the rest of the 16-bit alignment in LE mode... - -#define LIMM_REG 62 -#define GET_LIMM \ - limm = opcodes.r32(pc+2); -#define PC_ALIGNED32 \ - (pc&0xfffffffc) - /************************************************************************************************************************************ * * @@ -91,334 +16,8 @@ * * ************************************************************************************************************************************/ -int arcompact_disassembler::handle00_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - // Branch Conditionally - // 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ - int32_t address = (op & 0x07fe0000) >> 17; - address |= ((op & 0x0000ffc0) >> 6) << 10; - if (address & 0x80000) address = -0x80000 + (address & 0x7ffff); - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; - COMMON32_GET_CONDITION - - util::stream_format(stream, "B%s(%s) %08x", delaybit[n], conditions[condition], PC_ALIGNED32 + (address * 2)); - return size; -} - -int arcompact_disassembler::handle00_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - // Branch Unconditionally Far - // 0000 0sss ssss sss1 SSSS SSSS SSNR TTTT - int32_t address = (op & 0x07fe0000) >> 17; - address |= ((op & 0x0000ffc0) >> 6) << 10; - address |= ((op & 0x0000000f) >> 0) << 20; - if (address & 0x800000) address = -0x800000 + (address & 0x7fffff); - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; - int res = (op & 0x00000010) >> 4; op &= ~0x00000010; - - util::stream_format(stream, "B%s %08x", delaybit[n], PC_ALIGNED32 + (address * 2)); - if (res) util::stream_format(stream, "(reserved bit set)"); - - return size; -} - -int arcompact_disassembler::handle01_00_00dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - - // Branch and Link Conditionally - // 00001 sssssssss 00 SSSSSSSSSS N QQQQQ - int32_t address = (op & 0x07fc0000) >> 17; - address |= ((op & 0x0000ffc0) >> 6) << 10; - if (address & 0x800000) address = -0x800000 + (address&0x7fffff); - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; - - COMMON32_GET_CONDITION - - util::stream_format(stream, "BL%s(%s) %08x", delaybit[n], conditions[condition], PC_ALIGNED32 + (address *2)); - return size; -} - -int arcompact_disassembler::handle01_00_01dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - // Branch and Link Unconditionally Far - // 00001 sssssssss 10 SSSSSSSSSS N R TTTT - int32_t address = (op & 0x07fc0000) >> 17; - address |= ((op & 0x0000ffc0) >> 6) << 10; - address |= ((op & 0x0000000f) >> 0) << 20; - if (address & 0x800000) address = -0x800000 + (address&0x7fffff); - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; - int res = (op & 0x00000010) >> 4; op &= ~0x00000010; - - util::stream_format(stream, "BL%s %08x", delaybit[n], PC_ALIGNED32 + (address *2)); - if (res) util::stream_format(stream, "(reserved bit set)"); - - return size; -} - - - -int arcompact_disassembler::handle01_01_00_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) -{ - int size = 4; - - // Branch on Compare / Bit Test - Register-Register - // 00001 bbb sssssss 1 S BBB CCCCCC N 0 iiii - GET_01_01_01_BRANCH_ADDR - - - COMMON32_GET_creg - COMMON32_GET_breg; - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; - - op &= ~0x07007fe0; - - if ((breg != LIMM_REG) && (creg != LIMM_REG)) - { - util::stream_format( stream, "%s%s %s, %s to 0x%08x", optext, delaybit[n], regnames[breg], regnames[creg], PC_ALIGNED32 + (address * 2) ); - } - else - { - uint32_t limm; - GET_LIMM; - size = 8; - - if ((breg == LIMM_REG) && (creg != LIMM_REG)) - { - util::stream_format( stream, "%s%s 0x%08x, %s to 0x%08x", optext, delaybit[n], limm, regnames[creg], PC_ALIGNED32 + (address * 2) ); - } - else if ((creg == LIMM_REG) && (breg != LIMM_REG)) - { - util::stream_format( stream, "%s%s %s, 0x%08x to 0x%08x", optext, delaybit[n], regnames[breg], limm, PC_ALIGNED32 + (address * 2) ); - } - else - { - // b and c are LIMM? invalid?? - util::stream_format( stream, "%s%s 0x%08x, 0x%08x (illegal?) to 0x%08x", optext, delaybit[n], limm, limm, PC_ALIGNED32 + (address * 2) ); - - } - } - - return size; -} - - -// register - register cases -int arcompact_disassembler::handle01_01_00_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BREQ"); -} - -int arcompact_disassembler::handle01_01_00_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BRNE"); -} - -int arcompact_disassembler::handle01_01_00_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BRLT"); -} - -int arcompact_disassembler::handle01_01_00_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BRGE"); -} - -int arcompact_disassembler::handle01_01_00_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BRLO"); -} - -int arcompact_disassembler::handle01_01_00_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BRHS"); -} - -int arcompact_disassembler::handle01_01_00_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BBIT0"); -} - -int arcompact_disassembler::handle01_01_00_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_00_helper( stream, pc, op, opcodes, "BBIT1"); -} - - -int arcompact_disassembler::handle01_01_01_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) -{ - int size = 4; - - // using 'b' as limm here makes no sense (comparing a long immediate against a short immediate) so I assume it isn't - // valid? - - // Branch on Compare / Bit Test - Register-Immediate - // 0000 1bbb ssss sss1 SBBB uuuu uuN1 iiii - GET_01_01_01_BRANCH_ADDR - - COMMON32_GET_u6 - COMMON32_GET_breg; - int n = (op & 0x00000020) >> 5; op &= ~0x00000020; - - op &= ~0x07007fe0; - - util::stream_format(stream, "%s%s %s, 0x%02x %08x (%08x)", optext, delaybit[n], regnames[breg], u, PC_ALIGNED32 + (address * 2), op & ~0xf8fe800f); - - return size; -} - -// register -immediate cases -int arcompact_disassembler::handle01_01_01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BREQ"); -} - -int arcompact_disassembler::handle01_01_01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BRNE"); -} - -int arcompact_disassembler::handle01_01_01_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BRLT"); -} - -int arcompact_disassembler::handle01_01_01_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BRGE"); -} - -int arcompact_disassembler::handle01_01_01_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BRLO"); -} - -int arcompact_disassembler::handle01_01_01_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BRHS"); -} - -int arcompact_disassembler::handle01_01_01_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BBIT0"); -} - -int arcompact_disassembler::handle01_01_01_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle01_01_01_helper(stream, pc, op, opcodes, "BBIT1"); -} - - -int arcompact_disassembler::handle02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - // bitpos - // 1111 1111 1111 1111 0000 0000 0000 0000 - // fedc ba98 7654 3210 fedc ba98 7654 3210 - // fields - // 0001 0bbb ssss ssss SBBB DaaZ ZXAA AAAA - int size = 4; - - COMMON32_GET_areg - int X = (op & 0x00000040) >> 6; //op &= ~0x00000040; - int Z = (op & 0x00000180) >> 7; //op &= ~0x00000180; - int a = (op & 0x00000600) >> 9; //op &= ~0x00000600; - int D = (op & 0x00000800) >> 11;// op &= ~0x00000800; - int S = (op & 0x00008000) >> 15;// op &= ~0x00008000; - int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000; - COMMON32_GET_breg; - - int sdat = s | (S << 8); // todo - signed - - uint32_t limm = 0; - if (breg == LIMM_REG) - { - GET_LIMM; - size = 8; - } - - util::stream_format(stream, "LD"); - util::stream_format(stream, "%s", datasize[Z]); - util::stream_format(stream, "%s", dataextend[X]); - util::stream_format(stream, "%s", addressmode[a]); - util::stream_format(stream, "%s", cachebit[D]); - util::stream_format(stream, " "); - util::stream_format(stream, "%s <- ", regnames[areg]); - util::stream_format(stream, "["); - if (breg == LIMM_REG) util::stream_format(stream, "(%08x), ", limm); - else util::stream_format(stream, "%s, ", regnames[breg]); - util::stream_format(stream, "%03x", sdat); - util::stream_format(stream, "]"); - - return size; -} - -int arcompact_disassembler::handle03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - // bitpos - // 1111 1111 1111 1111 0000 0000 0000 0000 - // fedc ba98 7654 3210 fedc ba98 7654 3210 - // fields - // 0001 1bbb ssss ssss SBBB CCCC CCDa aZZR - int S = (op & 0x00008000) >> 15;// op &= ~0x00008000; - int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000; - - COMMON32_GET_breg; - int sdat = s | (S << 8); // todo - signed - - int R = (op & 0x00000001) >> 0; op &= ~0x00000001; - int Z = (op & 0x00000006) >> 1; op &= ~0x00000006; - int a = (op & 0x00000018) >> 3; op &= ~0x00000018; - int D = (op & 0x00000020) >> 5; op &= ~0x00000020; - COMMON32_GET_creg - - if (breg == LIMM_REG) - { - GET_LIMM; - size = 8; - got_limm = 1; - } - - - util::stream_format(stream, "ST"); - util::stream_format(stream, "%s", datasize[Z]); - util::stream_format(stream, "%s", addressmode[a]); - util::stream_format(stream, "%s", cachebit[D]); - util::stream_format(stream, " "); - - util::stream_format(stream, "["); - if (breg == LIMM_REG) util::stream_format(stream, "(%08x), ", limm); - else util::stream_format(stream, "%s, ", regnames[breg]); - util::stream_format(stream, "%03x", sdat); - util::stream_format(stream, "] <- "); - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM; - size = 8; - } - util::stream_format(stream, "(%08x)", limm); - - } - else - { - util::stream_format(stream, "%s", regnames[creg]); - } - if (R) util::stream_format(stream, "(reserved bit set)"); - - - return size; -} - -int arcompact_disassembler::handle04_p00_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved) +int arcompact_disassembler::handle04_f_a_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved) { // PP // 0010 0bbb 00ii iiii FBBB CCCC CCAA AAAA @@ -426,28 +25,25 @@ int arcompact_disassembler::handle04_p00_helper_dasm(std::ostream &stream, offs_ uint32_t limm = 0; int got_limm = 0; - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_creg - COMMON32_GET_areg - - util::stream_format(stream, "%s", optext); - util::stream_format(stream, "%s", flagbit[F]); - // util::stream_format(stream, " p(%d)", p); + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint8_t creg = dasm_common32_get_creg(op); + uint8_t areg = dasm_common32_get_areg(op); + util::stream_format(stream, "%s%s", optext, flagbit[F ? 1:0]); - if ((!b_reserved) && (breg == LIMM_REG)) + if ((!b_reserved) && (breg == DASM_REG_LIMM)) { - GET_LIMM; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); size = 8; got_limm = 1; } - if (creg == LIMM_REG) + if (creg == DASM_REG_LIMM) { if (!got_limm) { - GET_LIMM; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); size = 8; } } @@ -456,7 +52,7 @@ int arcompact_disassembler::handle04_p00_helper_dasm(std::ostream &stream, offs_ if (ignore_dst == 0) { - if (areg != LIMM_REG) util::stream_format(stream, " %s <-", regnames[areg]); + if (areg != DASM_REG_LIMM) util::stream_format(stream, " %s <-", regnames[areg]); else util::stream_format(stream, " <-"); } else if (ignore_dst == 1) // certain opcode types ignore the 'a' field entirely, it should be set to 0. @@ -465,13 +61,13 @@ int arcompact_disassembler::handle04_p00_helper_dasm(std::ostream &stream, offs_ } else if (ignore_dst == 2) // for multiply operations areg should always be set to LIMM { - if (areg != LIMM_REG) util::stream_format(stream, " <-", areg); + if (areg != DASM_REG_LIMM) util::stream_format(stream, " <-", areg); else util::stream_format(stream, " <-"); } if (!b_reserved) { - if (breg == LIMM_REG) + if (breg == DASM_REG_LIMM) util::stream_format(stream, " 0x%08x,", limm); else util::stream_format(stream, " %s,", regnames[breg]); @@ -481,7 +77,7 @@ int arcompact_disassembler::handle04_p00_helper_dasm(std::ostream &stream, offs_ if (breg) util::stream_format(stream, ",", breg); } - if (creg == LIMM_REG) + if (creg == DASM_REG_LIMM) util::stream_format(stream, " 0x%08x", limm); else util::stream_format(stream, " %s", regnames[creg]); @@ -490,7 +86,7 @@ int arcompact_disassembler::handle04_p00_helper_dasm(std::ostream &stream, offs_ } // like p00 but with 'u6' istead of C -int arcompact_disassembler::handle04_p01_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved) +int arcompact_disassembler::handle04_f_a_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved) { // PP // 0010 0bbb 01ii iiii FBBB uuuu uuAA AAAA @@ -498,19 +94,16 @@ int arcompact_disassembler::handle04_p01_helper_dasm(std::ostream &stream, offs_ uint32_t limm = 0; // int got_limm = 0; - COMMON32_GET_breg; - COMMON32_GET_F; - COMMON32_GET_u6 - COMMON32_GET_areg + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint32_t u = dasm_common32_get_u6(op); + uint8_t areg = dasm_common32_get_areg(op); - util::stream_format(stream, "%s", optext); - util::stream_format(stream, "%s", flagbit[F]); - // util::stream_format(stream, " p(%d)", p); + util::stream_format(stream, "%s%s", optext, flagbit[F ? 1:0]); - - if ((!b_reserved) && (breg == LIMM_REG)) + if ((!b_reserved) && (breg == DASM_REG_LIMM)) { - GET_LIMM; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); size = 8; // got_limm = 1; } @@ -519,7 +112,7 @@ int arcompact_disassembler::handle04_p01_helper_dasm(std::ostream &stream, offs_ if (ignore_dst == 0) { - if (areg != LIMM_REG) util::stream_format(stream, " %s <-", regnames[areg]); + if (areg != DASM_REG_LIMM) util::stream_format(stream, " %s <-", regnames[areg]); else util::stream_format(stream, " <-"); } else if (ignore_dst == 1) // certain opcode types ignore the 'a' field entirely, it should be set to 0. @@ -528,13 +121,13 @@ int arcompact_disassembler::handle04_p01_helper_dasm(std::ostream &stream, offs_ } else if (ignore_dst == 2) // for multiply operations areg should always be set to LIMM { - if (areg != LIMM_REG) util::stream_format(stream, " <-", areg); + if (areg != DASM_REG_LIMM) util::stream_format(stream, " <-", areg); else util::stream_format(stream, " <-"); } if (!b_reserved) { - if (breg == LIMM_REG) + if (breg == DASM_REG_LIMM) util::stream_format(stream, " 0x%08x,", limm); else util::stream_format(stream, " %s,", regnames[breg]); @@ -550,26 +143,23 @@ int arcompact_disassembler::handle04_p01_helper_dasm(std::ostream &stream, offs_ } -int arcompact_disassembler::handle04_p10_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved) +int arcompact_disassembler::handle04_f_b_b_s12_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved) { int size = 4; uint32_t limm; //int got_limm = 0; - COMMON32_GET_breg; - COMMON32_GET_F - COMMON32_GET_s12; - - util::stream_format(stream, "%s", optext); - util::stream_format(stream, "%s", flagbit[F]); - // util::stream_format(stream, " p(%d)", p); + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint32_t S = dasm_common32_get_s12(op); + util::stream_format(stream, "%s%s", optext, flagbit[F ? 1:0]); if (!b_reserved) { - if (breg == LIMM_REG) + if (breg == DASM_REG_LIMM) { - GET_LIMM; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); size = 8; //got_limm = 1; util::stream_format(stream, " 0x%08x ", limm); @@ -580,35 +170,29 @@ int arcompact_disassembler::handle04_p10_helper_dasm(std::ostream &stream, offs_ util::stream_format(stream, " %s, ", regnames[breg]); } } - else - { - if (breg) util::stream_format(stream, "reserved(%s), ", regnames[breg]); - } - util::stream_format(stream, "S(%02x)", S); + util::stream_format(stream, "0x%02x", S); return size; } -int arcompact_disassembler::handle04_p11_m0_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved) +int arcompact_disassembler::handle04_cc_f_b_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved) { int size = 4; uint32_t limm = 0; int got_limm = 0; - COMMON32_GET_breg; - COMMON32_GET_F - COMMON32_GET_CONDITION; - COMMON32_GET_creg + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint8_t condition = dasm_common32_get_condition(op); + uint8_t creg = dasm_common32_get_creg(op); - util::stream_format(stream, "%s", optext); - util::stream_format(stream, "%s", flagbit[F]); - // util::stream_format(stream, " p(%d)", p); + util::stream_format(stream, "%s%s%s", optext, conditions[condition], flagbit[F ? 1:0]); if (!b_reserved) { - if (breg == LIMM_REG) + if (breg == DASM_REG_LIMM) { - GET_LIMM; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); size = 8; got_limm = 1; util::stream_format(stream, " 0x%08x ", limm); @@ -619,52 +203,42 @@ int arcompact_disassembler::handle04_p11_m0_helper_dasm(std::ostream &stream, of util::stream_format(stream, " %s, ", regnames[breg]); } } - else - { - if (breg) util::stream_format(stream, "reserved(%s), ", regnames[breg]); - } - - - util::stream_format(stream, " Cond<%s> ", conditions[condition]); - - if (creg == LIMM_REG) + if (creg == DASM_REG_LIMM) { if (!got_limm) { - GET_LIMM; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); size = 8; } - util::stream_format(stream, " 0x%08x ", limm); + util::stream_format(stream, "0x%08x", limm); } else { - util::stream_format(stream, "C(%s)", regnames[creg]); + util::stream_format(stream, "%s", regnames[creg]); } return size; } -int arcompact_disassembler::handle04_p11_m1_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved) +int arcompact_disassembler::handle04_cc_f_b_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved) { int size = 4; uint32_t limm; //int got_limm = 0; - COMMON32_GET_breg; - COMMON32_GET_F - COMMON32_GET_CONDITION; - COMMON32_GET_u6 + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint8_t condition = dasm_common32_get_condition(op); + uint32_t u = dasm_common32_get_u6(op); - util::stream_format(stream, "%s", optext); - util::stream_format(stream, "%s", flagbit[F]); - // util::stream_format(stream, " p(%d)", p); + util::stream_format(stream, "%s%s%s", optext, conditions[condition], flagbit[F ? 1:0]); if (!b_reserved) { - if (breg == LIMM_REG) + if (breg == DASM_REG_LIMM) { - GET_LIMM; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); size = 8; //got_limm = 1; util::stream_format(stream, " 0x%08x ", limm); @@ -675,28 +249,20 @@ int arcompact_disassembler::handle04_p11_m1_helper_dasm(std::ostream &stream, of util::stream_format(stream, " %s, ", regnames[breg]); } } - else - { - if (breg) util::stream_format(stream, "reserved(%s), ", regnames[breg]); - } - - - util::stream_format(stream, " Cond<%s> ", conditions[condition]); - - util::stream_format(stream, "U(%02x)", u); + util::stream_format(stream, "0x%02x", u); return size; } int arcompact_disassembler::handle04_p11_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved) { - int M = (op & 0x00000020) >> 5; op &= ~0x00000020; + int M = (op & 0x00000020) >> 5; switch (M) { - case 0x00: return handle04_p11_m0_helper_dasm(stream, pc, op, opcodes, optext, b_reserved); - case 0x01: return handle04_p11_m1_helper_dasm(stream, pc, op, opcodes, optext, b_reserved); + case 0x00: return handle04_cc_f_b_b_c_helper_dasm(stream, pc, op, opcodes, optext, b_reserved); + case 0x01: return handle04_cc_f_b_b_u6_helper_dasm(stream, pc, op, opcodes, optext, b_reserved); } return 0; } @@ -704,4047 +270,40 @@ int arcompact_disassembler::handle04_p11_helper_dasm(std::ostream &stream, offs_ int arcompact_disassembler::handle04_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved) { - COMMON32_GET_p; + uint8_t p = dasm_common32_get_p(op); switch (p) { - case 0x00: return handle04_p00_helper_dasm(stream, pc, op, opcodes, optext, ignore_dst, b_reserved); - case 0x01: return handle04_p01_helper_dasm(stream, pc, op, opcodes, optext, ignore_dst, b_reserved); - case 0x02: return handle04_p10_helper_dasm(stream, pc, op, opcodes, optext, b_reserved); + case 0x00: return handle04_f_a_b_c_helper_dasm(stream, pc, op, opcodes, optext, ignore_dst, b_reserved); + case 0x01: return handle04_f_a_b_u6_helper_dasm(stream, pc, op, opcodes, optext, ignore_dst, b_reserved); + case 0x02: return handle04_f_b_b_s12_helper_dasm(stream, pc, op, opcodes, optext, b_reserved); case 0x03: return handle04_p11_helper_dasm(stream, pc, op, opcodes, optext, b_reserved); } return 0; } -int arcompact_disassembler::handle04_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ADD", 0,0); -} - -int arcompact_disassembler::handle04_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ADC", 0,0); -} - -int arcompact_disassembler::handle04_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "SUB", 0,0); -} - -int arcompact_disassembler::handle04_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "SBC", 0,0); -} - -int arcompact_disassembler::handle04_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "AND", 0,0); -} - -int arcompact_disassembler::handle04_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "OR", 0,0); -} - -int arcompact_disassembler::handle04_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "BIC", 0,0); -} - -int arcompact_disassembler::handle04_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "XOR", 0,0); -} - -int arcompact_disassembler::handle04_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MAX", 0,0); -} - -int arcompact_disassembler::handle04_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MIN", 0,0); -} - - -int arcompact_disassembler::handle04_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MOV", 1,0); -} - -int arcompact_disassembler::handle04_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "TST", 1,0); -} - -int arcompact_disassembler::handle04_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "CMP", 1,0); -} - -int arcompact_disassembler::handle04_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "RCMP", 1,0); -} - -int arcompact_disassembler::handle04_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "RSUB", 0,0); -} - -int arcompact_disassembler::handle04_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "BSET", 0,0); -} -int arcompact_disassembler::handle04_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +int arcompact_disassembler::handle_dasm_illegal(std::ostream& stream, offs_t pc, uint8_t param1, uint8_t param2, uint32_t op, const data_buffer& opcodes) { - return handle04_helper_dasm(stream, pc, op, opcodes, "BCLR", 0,0); -} - -int arcompact_disassembler::handle04_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "BTST", 0,0); -} - -int arcompact_disassembler::handle04_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "BXOR", 0,0); -} - -int arcompact_disassembler::handle04_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "BMSK", 0,0); -} - -int arcompact_disassembler::handle04_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ADD1", 0,0); + util::stream_format(stream, " (%08x)\n", param1, param2, op); + return 4; } -int arcompact_disassembler::handle04_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +int arcompact_disassembler::handle_dasm_illegal(std::ostream& stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint32_t op, const data_buffer& opcodes) { - return handle04_helper_dasm(stream, pc, op, opcodes, "ADD2", 0,0); + util::stream_format(stream, " (%08x)\n", param1, param2, param3, op); + return 4; } -int arcompact_disassembler::handle04_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +int arcompact_disassembler::handle_dasm_illegal(std::ostream& stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op, const data_buffer& opcodes) { - return handle04_helper_dasm(stream, pc, op, opcodes, "ADD3", 0,0); + util::stream_format(stream, " (%08x)\n", param1, param2, param3, param4, op); + return 4; } -int arcompact_disassembler::handle04_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +int arcompact_disassembler::handle_dasm_reserved(std::ostream& stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint32_t op, const data_buffer& opcodes) { - return handle04_helper_dasm(stream, pc, op, opcodes, "SUB1", 0,0); -} - -int arcompact_disassembler::handle04_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "SUB2", 0,0); -} - -int arcompact_disassembler::handle04_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "SUB3", 0,0); -} - -int arcompact_disassembler::handle04_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MPY", 0,0); -} // * - -int arcompact_disassembler::handle04_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MPYH", 0,0); -} // * - -int arcompact_disassembler::handle04_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MPYHU", 0,0); -} // * - -int arcompact_disassembler::handle04_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MPYU", 0,0); -} // * - - - -int arcompact_disassembler::handle04_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "J", 1,1); -} - - - -int arcompact_disassembler::handle04_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "J.D", 1,1); -} - -int arcompact_disassembler::handle04_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "JL", 1,1); -} - -int arcompact_disassembler::handle04_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "JL.D", 1,1); -} - - - - -int arcompact_disassembler::handle04_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) // LPcc (loop setup) -{ - COMMON32_GET_breg; // breg is reserved - COMMON32_GET_p; - - if (p == 0x00) - { - util::stream_format(stream, " (start %08x, end %08x)", conditions[condition], pc + 4, PC_ALIGNED32 + u*2); - - int unused = (op & 0x00000020)>>5; - if (unused==0) util::stream_format(stream, "(unused bit not set)"); - - } - - if (breg) util::stream_format(stream, "(reseved B bits set %02x)", breg); - - return 4; -} - -#define PRINT_AUX_REGNAME \ - if ((auxreg >= 0) && (auxreg < 0x420)) \ - { \ - if (strcmp(auxregnames[auxreg],"unusedreg")) \ - util::stream_format(stream, "[%s]", auxregnames[auxreg]); \ - else \ - util::stream_format(stream, "[%03x]", auxreg); \ - } \ - else \ - util::stream_format(stream, "[%03x]", auxreg); - -int arcompact_disassembler::handle04_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) // Load FROM Auxiliary register TO register -{ - // pp F - // 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR - // 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR - // 0010 0bbb 0110 1010 0BBB uuuu uu00 0000 - // 0010 0bbb 1010 1010 0BBB ssss ssSS SSSS - - - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_p; - COMMON32_GET_breg; - COMMON32_GET_F - - util::stream_format(stream, "LR"); - if (F) util::stream_format(stream, "."); -// util::stream_format(stream, " p(%d)", p); - - - - if (breg == LIMM_REG) - { - util::stream_format(stream, ""); // illegal encoding? - } - else - { - util::stream_format(stream, " %s, ", regnames[breg]); - } - - - - if (p == 0) - { - COMMON32_GET_creg - COMMON32_GET_areg_reserved - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM; - size = 8; - } - - util::stream_format(stream, "(%08x) ", limm); - - } - else - { - util::stream_format(stream, "C(%s) ", regnames[creg]); - } - - if (ares) util::stream_format(stream, "reserved(%02x) ", ares); - } - else if (p == 1) - { - COMMON32_GET_u6 - COMMON32_GET_areg_reserved - - int auxreg = u; - PRINT_AUX_REGNAME - - if (ares) util::stream_format(stream, "reserved(%02x) ", ares); - } - else if (p == 2) - { - COMMON32_GET_s12; - - int auxreg = S; - PRINT_AUX_REGNAME - - } - else if (p == 3) - { - util::stream_format(stream, " "); - } - - return size; -} - -int arcompact_disassembler::handle04_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) // Store TO Auxiliary register FROM register -{ - // code at ~ 40073DFE in leapster bios is manually setting up a loop this way - // rather than using the lPcc opcode - - int size = 4; - uint32_t limm = 0; - int got_limm = 0; - - COMMON32_GET_p; - COMMON32_GET_breg; - COMMON32_GET_F - - util::stream_format(stream, "SR"); - if (F) util::stream_format(stream, "."); -// util::stream_format(stream, " p(%d)", p); - - - - if (breg == LIMM_REG) - { - GET_LIMM; - size = 8; - got_limm = 1; - util::stream_format(stream, " %08x -> ", limm); - - } - else - { - util::stream_format(stream, " %s -> ", regnames[breg]); - } - - - - if (p == 0) - { - COMMON32_GET_creg - COMMON32_GET_areg_reserved - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM; - size = 8; - } - - util::stream_format(stream, "[%08x]", limm); - - } - else - { - util::stream_format(stream, "[%s]", regnames[creg]); - - - } - - if (ares) util::stream_format(stream, " (reserved %02x) ", ares); - - - } - else if (p == 1) - { - COMMON32_GET_u6 - COMMON32_GET_areg_reserved - - int auxreg = u; - PRINT_AUX_REGNAME - - if (ares) util::stream_format(stream, " (reserved %02x) ", ares); - - - } - else if (p == 2) - { - COMMON32_GET_s12; - - int auxreg = S; - - PRINT_AUX_REGNAME - - } - else if (p == 3) - { - util::stream_format(stream, " "); - } - - return size;} - - -int arcompact_disassembler::handle04_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - // leapster bios uses formats for FLAG that are not defined, bug I guess work anyway (P modes 0 / 1) - return handle04_helper_dasm(stream, pc, op, opcodes, "FLAG", 1,1); -} - - -int arcompact_disassembler::handle04_2f_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) -{ - // - // 0010 0bbb pp10 1111 FBBB CCCC CCII IIII - int size = 4; - - COMMON32_GET_p; - COMMON32_GET_breg; - COMMON32_GET_F - - util::stream_format(stream, "%s", optext); - util::stream_format(stream, "%s", flagbit[F]); -// util::stream_format(stream, " p(%d)", p); - - if (breg == LIMM_REG) - { - util::stream_format(stream, " , "); - // if using the 'EX' opcode this is illegal - } - else - { - util::stream_format(stream, " %s, ", regnames[breg]); - } - - if (p == 0) - { - COMMON32_GET_creg - - if (creg == LIMM_REG) - { - uint32_t limm; - GET_LIMM; - size = 8; - util::stream_format(stream, "(%08x) ", limm); - - } - else - { - util::stream_format(stream, "C(%s) ", regnames[creg]); - } - } - else if (p == 1) - { - COMMON32_GET_u6 - - util::stream_format(stream, "U(0x%02x) ", u); - } - else if (p == 2) - { - util::stream_format(stream, "<04_2f illegal p=10>"); - } - else if (p == 3) - { - util::stream_format(stream, "<04_2f illegal p=11>"); - } - - return size; -} - - -int arcompact_disassembler::handle04_2f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ASL"); -} // ASL - -int arcompact_disassembler::handle04_2f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ASR"); -} // ASR - -int arcompact_disassembler::handle04_2f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "LSR"); -} // LSR - -int arcompact_disassembler::handle04_2f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ROR"); -} // ROR - -int arcompact_disassembler::handle04_2f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "RCC"); -} // RCC - -int arcompact_disassembler::handle04_2f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "SEXB"); -} // SEXB - -int arcompact_disassembler::handle04_2f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "SEXW"); -} // SEXW - -int arcompact_disassembler::handle04_2f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "EXTB"); -} // EXTB - - -int arcompact_disassembler::handle04_2f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "EXTW"); -} // EXTW - - - -int arcompact_disassembler::handle04_2f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ABS"); -} // ABS - -int arcompact_disassembler::handle04_2f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "NOT"); -} // NOT - -int arcompact_disassembler::handle04_2f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "RCL"); -} // RLC - -int arcompact_disassembler::handle04_2f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_2f_helper_dasm(stream, pc, op, opcodes, "EX"); -} // EX - - - -int arcompact_disassembler::handle04_2f_3f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "SLEEP (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "SWI / TRAP0 (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "SYNC (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "RTIE (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "BRK (%08x)", op); - return 4; -} - - - - - - -// format on these is.. - -// 0010 0bbb aa11 0ZZX DBBB CCCC CCAA AAAA -// note, bits 11 0ZZX are part of the sub-opcode # already - this is a special encoding -int arcompact_disassembler::handle04_3x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, int dsize, int extend) -{ - int size = 4; - uint32_t limm=0; - int got_limm = 0; - - util::stream_format(stream, "LD"); - util::stream_format(stream, "%s", datasize[dsize]); - util::stream_format(stream, "%s", dataextend[extend]); - - int mode = (op & 0x00c00000) >> 22; op &= ~0x00c00000; - COMMON32_GET_breg; - int D = (op & 0x00008000) >> 15; op &= ~0x00008000; - COMMON32_GET_creg - COMMON32_GET_areg - - util::stream_format(stream, "%s", addressmode[mode]); - util::stream_format(stream, "%s", cachebit[D]); - - util::stream_format(stream, " %s. ", regnames[areg]); - - if (breg == LIMM_REG) - { - GET_LIMM; - size = 8; - got_limm = 1; - util::stream_format(stream, "[%08x, ", limm); - - } - else - { - util::stream_format(stream, "[%s, ", regnames[breg]); - } - - if (creg == LIMM_REG) - { - if (!got_limm) - { - GET_LIMM; - size = 8; - } - util::stream_format(stream, "(%08x)]", limm); - - } - else - { - util::stream_format(stream, "%s]", regnames[creg]); - } - - - return size; - - - -} - -int arcompact_disassembler::handle04_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,0,0); -} - -// ZZ value of 0x0 with X of 1 is illegal -int arcompact_disassembler::handle04_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,0,1); -} - -int arcompact_disassembler::handle04_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,1,0); -} - -int arcompact_disassembler::handle04_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,1,1); -} - -int arcompact_disassembler::handle04_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,2,0); -} - -int arcompact_disassembler::handle04_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,2,1); -} - -// ZZ value of 0x3 is illegal -int arcompact_disassembler::handle04_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,3,0); -} - -int arcompact_disassembler::handle04_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_3x_helper_dasm(stream, pc, op, opcodes,3,1); -} - - - - - - - -int arcompact_disassembler::handle05_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ASL", 0,0); -} - -int arcompact_disassembler::handle05_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "LSR", 0,0); -} - -int arcompact_disassembler::handle05_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ASR", 0,0); -} - -int arcompact_disassembler::handle05_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ROR", 0,0); -} - -int arcompact_disassembler::handle05_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MUL64", 2,0); -} // special - -int arcompact_disassembler::handle05_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "MULU64", 2,0); -} // special - -int arcompact_disassembler::handle05_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ADDS", 0,0); -} - -int arcompact_disassembler::handle05_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "SUBS", 0,0); -} - -int arcompact_disassembler::handle05_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "DIVAW", 0,0); -} - - - - -int arcompact_disassembler::handle05_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ASLS", 0,0); -} - -int arcompact_disassembler::handle05_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ASRS", 0,0); -} - - -int arcompact_disassembler::handle05_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "ADDSDW", 0,0); -} - -int arcompact_disassembler::handle05_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle04_helper_dasm(stream, pc, op, opcodes, "SUBSDW", 0,0); -} - - - - -int arcompact_disassembler::handle05_2f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) -{ - // - // 0010 1bbb pp10 1111 FBBB CCCC CCII IIII when pp == 0x00 - // or - // 0010 1bbb pp10 1111 FBBB UUUU UUII IIII when pp == 0x01 - // otherwise invalid - - int size = 4; - - COMMON32_GET_p; - COMMON32_GET_breg; - COMMON32_GET_F - - util::stream_format(stream, "%s", optext); - util::stream_format(stream, "%s", flagbit[F]); -// util::stream_format(stream, " p(%d)", p); - - - util::stream_format(stream, " %s, ", regnames[breg]); - - if (p == 0) - { - COMMON32_GET_creg - - if (creg == LIMM_REG) - { - uint32_t limm; - GET_LIMM; - size = 8; - util::stream_format(stream, "(%08x) ", limm); - - } - else - { - util::stream_format(stream, "C(%s) ", regnames[creg]); - } - } - else if (p == 1) - { - COMMON32_GET_u6 - util::stream_format(stream, "U(0x%02x) ", u); - } - else if (p == 2) - { - util::stream_format(stream, "<05_2f illegal p=10>"); - } - else if (p == 3) - { - util::stream_format(stream, "<05_2f illegal p=11>"); - } - - return size; -} - - -int arcompact_disassembler::handle05_2f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "SWAP"); -} - -int arcompact_disassembler::handle05_2f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NORM"); -} - -int arcompact_disassembler::handle05_2f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "SAT16"); -} - -int arcompact_disassembler::handle05_2f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "RND16"); -} - -int arcompact_disassembler::handle05_2f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "ABSSW"); -} - -int arcompact_disassembler::handle05_2f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "ABSS"); -} - -int arcompact_disassembler::handle05_2f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NEGSW"); -} - -int arcompact_disassembler::handle05_2f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NEGS"); -} - -int arcompact_disassembler::handle05_2f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NORMW"); -} - - - -int arcompact_disassembler::handle06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "op a,b,c (06 ARC ext) (%08x)", op ); - return 4; -} - -int arcompact_disassembler::handle07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "op a,b,c (07 User ext) (%08x)", op ); - return 4; -} - -int arcompact_disassembler::handle08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "op a,b,c (08 User ext) (%08x)", op ); - return 4; -} - -int arcompact_disassembler::handle09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "op a,b,c (09 Market ext) (%08x)", op ); - return 4; -} - -int arcompact_disassembler::handle0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "op a,b,c (0a Market ext) (%08x)", op ); - return 4; -} - -int arcompact_disassembler::handle0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "op a,b,c (0b Market ext) (%08x)", op ); - return 4; -} - - - -int arcompact_disassembler::handle0c_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int format) -{ - int areg, breg, creg; - - COMMON16_GET_areg; - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(areg); - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - - if (format==0) util::stream_format(stream, "%s %s <- [%s, %s]", optext, regnames[areg], regnames[breg], regnames[creg]); - else util::stream_format(stream, "%s %s <- %s, %s", optext, regnames[areg], regnames[breg], regnames[creg]); - - return 2; -} - - -int arcompact_disassembler::handle0c_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0c_helper_dasm(stream, pc, op, opcodes, "LD_S", 0); -} - -int arcompact_disassembler::handle0c_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0c_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0); -} - -int arcompact_disassembler::handle0c_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0c_helper_dasm(stream, pc, op, opcodes, "LDW_S", 0); -} - -int arcompact_disassembler::handle0c_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0c_helper_dasm(stream, pc, op, opcodes, "ADD_S", 1); -} - - -int arcompact_disassembler::handle0d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) -{ - int u, breg, creg; - - COMMON16_GET_u3; - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - util::stream_format(stream, "%s %s <- [%s, 0x%02x]", optext, regnames[creg], regnames[breg], u); - return 2; -} - - -int arcompact_disassembler::handle0d_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0d_helper_dasm(stream, pc, op, opcodes, "ADD_S"); -} - -int arcompact_disassembler::handle0d_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0d_helper_dasm(stream, pc, op, opcodes, "SUB_S"); -} - -int arcompact_disassembler::handle0d_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0d_helper_dasm(stream, pc, op, opcodes, "ASL_S"); -} - -int arcompact_disassembler::handle0d_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0d_helper_dasm(stream, pc, op, opcodes, "ASR_S"); -} - - - -int arcompact_disassembler::handle0e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int revop) -{ - int h,breg; - int size = 2; - - GROUP_0e_GET_h; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - if (h == LIMM_REG) - { - uint32_t limm; - GET_LIMM; - size = 6; - if (!revop) util::stream_format( stream, "%s %s <- 0x%08x", optext, regnames[breg], limm); - else util::stream_format( stream, "%s 0x%08x <- %s", optext, limm, regnames[breg]); - } - else - { - if (!revop) util::stream_format( stream, "%s %s <- %s", optext, regnames[breg], regnames[h]); - else util::stream_format( stream, "%s %s <- %s", optext, regnames[h], regnames[breg]); - - } - - return size; - -} - -int arcompact_disassembler::handle0e_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "ADD_S", 0); -} - -int arcompact_disassembler::handle0e_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "MOV_S", 0); -} - -int arcompact_disassembler::handle0e_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "CMP_S", 0); -} - -int arcompact_disassembler::handle0e_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "MOV_S", 1); -} - - - -int arcompact_disassembler::handle0f_00_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) -{ - int breg; - - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - util::stream_format( stream, "%s %s", optext, regnames[breg]); - - return 2; - -} - - - -int arcompact_disassembler::handle0f_00_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "J_S"); -} - -int arcompact_disassembler::handle0f_00_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "J_S.D"); -} - -int arcompact_disassembler::handle0f_00_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "JL_S"); -} - -int arcompact_disassembler::handle0f_00_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "JL_S.D"); -} - -int arcompact_disassembler::handle0f_00_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "SUB_S.NE"); -} - - - - - -// Zero parameters (ZOP) -int arcompact_disassembler::handle0f_00_07_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "NOP_S"); return 2; -} - -int arcompact_disassembler::handle0f_00_07_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "UNIMP_S"); return 2; -} // Unimplemented Instruction, same as illegal, but recommended to fill blank space - -int arcompact_disassembler::handle0f_00_07_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "JEQ_S [blink]"); return 2; -} - -int arcompact_disassembler::handle0f_00_07_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "JNE_S [blink]"); return 2; -} - -int arcompact_disassembler::handle0f_00_07_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "J_S [blink]"); return 2; -} - -int arcompact_disassembler::handle0f_00_07_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format( stream, "J_S.D [blink]"); return 2; -} - - - - - - -int arcompact_disassembler::handle0f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int nodst) -{ - int breg, creg; - - COMMON16_GET_breg; - COMMON16_GET_creg; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - if (nodst==0) util::stream_format(stream, "%s %s <- %s", optext, regnames[breg], regnames[creg]); - else if (nodst==1) util::stream_format(stream, "%s , %s, %s", optext, regnames[breg], regnames[creg]); - else if (nodst==2) util::stream_format(stream, "%s , %s, %s", optext, regnames[breg], regnames[creg]); - - return 2; -} - -int arcompact_disassembler::handle0f_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "SUB_S",0); -} - -int arcompact_disassembler::handle0f_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "AND_S",0); -} - -int arcompact_disassembler::handle0f_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "OR_S",0); -} - -int arcompact_disassembler::handle0f_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "BIC_S",0); -} - -int arcompact_disassembler::handle0f_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "XOR_S",0); -} - -int arcompact_disassembler::handle0f_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "TST_S",1); -} - -int arcompact_disassembler::handle0f_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "MUL64_S",2); -} // actual destination is special multiply registers - -int arcompact_disassembler::handle0f_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "SEXB_S",0); -} - -int arcompact_disassembler::handle0f_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "SEXW_S",0); -} - -int arcompact_disassembler::handle0f_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "EXTB_S",0); -} - -int arcompact_disassembler::handle0f_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "EXTW_S",0); -} - -int arcompact_disassembler::handle0f_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ABS_S",0); -} - -int arcompact_disassembler::handle0f_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "NOT_S",0); -} - -int arcompact_disassembler::handle0f_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "NEG_S",0); -} - -int arcompact_disassembler::handle0f_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ADD1_S",0); -} - -int arcompact_disassembler::handle0f_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ADD2_S",0); -} - -int arcompact_disassembler::handle0f_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ADD3_S",0); -} - -int arcompact_disassembler::handle0f_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASL_S",0); -} - -int arcompact_disassembler::handle0f_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "LSR_S",0); -} - -int arcompact_disassembler::handle0f_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASR_S",0); -} - -int arcompact_disassembler::handle0f_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASL1_S",0); -} - -int arcompact_disassembler::handle0f_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASR1_S",0); -} - -int arcompact_disassembler::handle0f_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "LSR1_S",0); -} - - - -int arcompact_disassembler::handle0f_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) // special -{ // 0111 1uuu uuu1 1110 - int u = (op & 0x07e0)>>5; - util::stream_format( stream, "TRAP_S %02x",u); - return 2; -} - -int arcompact_disassembler::handle0f_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) // special -{ - int u = (op & 0x07e0)>>5; op &= ~0x07e0; - - if (u == 0x003f) - { - util::stream_format(stream, "BRK_S"); - } - else - { - util::stream_format(stream, "",u); - } - return 2; -} - - -int arcompact_disassembler::handle_ld_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int swap) -{ - int breg, creg, u; - - COMMON16_GET_breg; - COMMON16_GET_creg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - REG_16BIT_RANGE(creg); - - u <<= shift; - - if (!swap) util::stream_format(stream, "%s %s, [%s, 0x%02x] (%04x)", optext, regnames[creg], regnames[breg], u, op); - else util::stream_format(stream, "%s [%s, 0x%02x], %s (%04x)", optext, regnames[breg], u, regnames[creg], op); - return 2; - -} - - -int arcompact_disassembler::handle10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_ld_helper_dasm(stream, pc, op, opcodes, "LD_S", 2, 0); -} - -int arcompact_disassembler::handle11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_ld_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0, 0); -} - -int arcompact_disassembler::handle12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_ld_helper_dasm(stream, pc, op, opcodes, "LDW_S", 1, 0); -} - -int arcompact_disassembler::handle13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_ld_helper_dasm(stream, pc, op, opcodes, "LDW_S.X", 1, 0); -} - -int arcompact_disassembler::handle14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_ld_helper_dasm(stream, pc, op, opcodes, "ST_S", 2, 1); -} - -int arcompact_disassembler::handle15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_ld_helper_dasm(stream, pc, op, opcodes, "STB_S", 0, 1); -} - -int arcompact_disassembler::handle16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_ld_helper_dasm(stream, pc, op, opcodes, "STW_S", 1, 1); -} - - -int arcompact_disassembler::handle_l7_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - util::stream_format(stream, "%s %s, 0x%02x", optext, regnames[breg], u); - - return 2; - -} - -int arcompact_disassembler::handle17_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "ASL_S"); -} - -int arcompact_disassembler::handle17_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "LSR_S"); -} - -int arcompact_disassembler::handle17_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "ASR_S"); -} - -int arcompact_disassembler::handle17_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "SUB_S"); -} - -int arcompact_disassembler::handle17_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BSET_S"); -} - -int arcompact_disassembler::handle17_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BCLR_S"); -} - -int arcompact_disassembler::handle17_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BSMK_S"); -} - -int arcompact_disassembler::handle17_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BTST_S"); -} - - -// op bits remaining for 0x18_xx subgroups 0x071f - -int arcompact_disassembler::handle18_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int st, int format) -{ - int breg, u; - - COMMON16_GET_breg; - COMMON16_GET_u5; - - REG_16BIT_RANGE(breg); - - util::stream_format(stream, "%s %s ", optext, regnames[breg]); - if (st==1) util::stream_format(stream, "-> "); - else util::stream_format(stream, "<- "); - - if (format==0) util::stream_format(stream, "[SP, 0x%02x]", u*4); - else util::stream_format(stream, "SP, 0x%02x", u*4); - - - return 2; -} - -int arcompact_disassembler::handle18_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle18_0x_helper_dasm(stream, pc, op, opcodes, "LD_S", 0,0); -} - -int arcompact_disassembler::handle18_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle18_0x_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0,0); -} - -int arcompact_disassembler::handle18_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle18_0x_helper_dasm(stream, pc, op, opcodes, "ST_S", 1,0); -} - -int arcompact_disassembler::handle18_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle18_0x_helper_dasm(stream, pc, op, opcodes, "STB_S", 1,0); -} - -int arcompact_disassembler::handle18_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle18_0x_helper_dasm(stream, pc, op, opcodes, "ADD_S", 1,1); // check format -} - -// op bits remaining for 0x18_05_xx subgroups 0x001f -int arcompact_disassembler::handle18_05_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int u; - COMMON16_GET_u5; - - util::stream_format( stream, "ADD_S SP, SP, 0x%02x", u*4); - return 2; - -} - -int arcompact_disassembler::handle18_05_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int u; - COMMON16_GET_u5; - - util::stream_format( stream, "SUB_S SP, SP, 0x%02x", u*4); - return 2; -} - -// op bits remaining for 0x18_06_xx subgroups 0x0700 -int arcompact_disassembler::handle18_06_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int breg; - COMMON16_GET_breg - REG_16BIT_RANGE(breg) - - util::stream_format(stream, "POP_S %s", regnames[breg]); - - return 2; -} - -int arcompact_disassembler::handle18_06_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int res = (op & 0x0700) >> 8; - op &= ~0x0700; // all bits now used - - if (res) - util::stream_format(stream, "POP_S [BLINK] (Reserved Bits set %04x)", op); - else - util::stream_format(stream, "POP_S [BLINK]"); - - return 2; -} - -// op bits remaining for 0x18_07_xx subgroups 0x0700 -int arcompact_disassembler::handle18_07_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int breg; - COMMON16_GET_breg - REG_16BIT_RANGE(breg) - - util::stream_format(stream, "PUSH_S %s", regnames[breg]); - - return 2; -} - - -int arcompact_disassembler::handle18_07_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int res = (op & 0x0700) >> 8; - op &= ~0x0700; // all bits now used - - if (res) - util::stream_format(stream, "PUSH_S [BLINK] (Reserved Bits set %04x)", op); - else - util::stream_format(stream, "PUSH_S [BLINK]"); - - return 2; -} - - -int arcompact_disassembler::handle19_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int format) -{ - int s; - - COMMON16_GET_s9; - // todo, signed - s <<= shift; - - - util::stream_format(stream, "%s %s, ", optext, regnames[0]); - if (format == 0) - { - util::stream_format(stream, "[GP, %03x]", s); - } - else - { - util::stream_format(stream, "GP, %03x", s); - } - - return 2; -} - -int arcompact_disassembler::handle19_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle19_0x_helper_dasm(stream, pc, op, opcodes, "LD_S", 2, 0); -} - -int arcompact_disassembler::handle19_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle19_0x_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0, 0); -} - -int arcompact_disassembler::handle19_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle19_0x_helper_dasm(stream, pc, op, opcodes, "LDW_S", 1, 0); -} - -int arcompact_disassembler::handle19_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle19_0x_helper_dasm(stream, pc, op, opcodes, "ADD_S", 2, 1); -} - - -int arcompact_disassembler::handle1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int breg, u; - COMMON16_GET_breg; - COMMON16_GET_u8; - REG_16BIT_RANGE(breg); - - util::stream_format(stream, "MOV_S %s, [PCL, %03x]", regnames[breg], u*4); - - return 2; -} - -int arcompact_disassembler::handle1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int breg, u; - COMMON16_GET_breg; - COMMON16_GET_u8; - REG_16BIT_RANGE(breg); - - util::stream_format(stream, "MOV_S %s <- 0x%02x", regnames[breg], u); - return 2; -} - -int arcompact_disassembler::handle1c_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int breg, u; - COMMON16_GET_breg; - COMMON16_GET_u7; - REG_16BIT_RANGE(breg); - - util::stream_format(stream, "ADD_S %s <- %s, %02x", regnames[breg], regnames[breg], u); - return 2; -} - -int arcompact_disassembler::handle1c_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int breg, u; - COMMON16_GET_breg; - COMMON16_GET_u7; - REG_16BIT_RANGE(breg); - - util::stream_format(stream, "CMP_S %s, %02x", regnames[breg], u); - return 2; -} - -int arcompact_disassembler::handle1d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) -{ - int breg; - COMMON16_GET_breg; - REG_16BIT_RANGE(breg); - - int s = (op & 0x007f) >> 0; op &= ~0x007f; - if (s & 0x40) s = -0x40 + (s & 0x3f); - - util::stream_format(stream, "%s %s, 0 to 0x%08x", optext, regnames[breg], PC_ALIGNED32 + s*2); - return 2; -} - - -int arcompact_disassembler::handle1d_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1d_helper_dasm(stream, pc, op, opcodes,"BREQ_S"); -} - -int arcompact_disassembler::handle1d_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1d_helper_dasm(stream, pc, op, opcodes,"BRNE_S"); -} - - - -int arcompact_disassembler::handle1e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) -{ - int s = (op & 0x01ff) >> 0; op &= ~0x01ff; - if (s & 0x100) s = -0x100 + (s & 0xff); - - util::stream_format(stream, "%s %08x", optext, PC_ALIGNED32 + s*2); - return 2; -} - - - -int arcompact_disassembler::handle1e_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_0x_helper_dasm(stream, pc, op, opcodes, "B_S"); -} - -int arcompact_disassembler::handle1e_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_0x_helper_dasm(stream, pc, op, opcodes, "BEQ_S"); -} - -int arcompact_disassembler::handle1e_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_0x_helper_dasm(stream, pc, op, opcodes, "BNE_S"); -} - - -int arcompact_disassembler::handle1e_03_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) -{ - int s = (op & 0x003f) >> 0; op &= ~0x003f; - if (s & 0x020) s = -0x20 + (s & 0x1f); - - util::stream_format(stream, "%s %08x", optext, PC_ALIGNED32 + s*2); - return 2; -} - -int arcompact_disassembler::handle1e_03_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BGT_S"); -} - -int arcompact_disassembler::handle1e_03_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BGE_S"); -} - -int arcompact_disassembler::handle1e_03_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLT_S"); -} - -int arcompact_disassembler::handle1e_03_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLE_S"); -} - -int arcompact_disassembler::handle1e_03_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BHI_S"); -} - -int arcompact_disassembler::handle1e_03_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BHS_S"); -} - -int arcompact_disassembler::handle1e_03_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLO_S"); -} - -int arcompact_disassembler::handle1e_03_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLS_S"); -} - - -int arcompact_disassembler::handle1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - int s = (op & 0x07ff) >> 0; op &= ~0x07ff; - if (s & 0x400) s = -0x400 + (s & 0x3ff); - - util::stream_format(stream, "BL_S %08x", PC_ALIGNED32 + (s*4)); - return 2; -} - -/************************************************************************************************************************************ -* * -* illegal opcode handlers (disassembly) * -* * -************************************************************************************************************************************/ - -int arcompact_disassembler::handle01_01_00_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_00_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_00_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_00_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_00_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_00_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_00_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_00_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - -int arcompact_disassembler::handle01_01_01_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_01_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_01_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_01_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_01_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_01_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_01_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle01_01_01_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - - -int arcompact_disassembler::handle04_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - -int arcompact_disassembler::handle04_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - -int arcompact_disassembler::handle04_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - -int arcompact_disassembler::handle04_2f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - - - -int arcompact_disassembler::handle05_2f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - - -int arcompact_disassembler::handle04_2f_3f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_2f_3f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - -int arcompact_disassembler::handle05_2f_3f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2f_3f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - - - - -int arcompact_disassembler::handle04_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle04_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - - -int arcompact_disassembler::handle05_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - -int arcompact_disassembler::handle05_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - - -int arcompact_disassembler::handle05_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 4; -} - -int arcompact_disassembler::handle05_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); + util::stream_format(stream, " (%08x)\n", param1, param2, param3, param4, op); return 4; } - - -int arcompact_disassembler::handle0f_00_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_00_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_00_07_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_00_07_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - -int arcompact_disassembler::handle0f_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%08x)", op); - return 2; -} - - -int arcompact_disassembler::handle18_05_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_05_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_05_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_05_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_05_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_05_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_06_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} - -int arcompact_disassembler::handle18_07_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) -{ - util::stream_format(stream, " (%04x)", op); - return 2; -} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_00to01.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_00to01.cpp new file mode 100644 index 00000000000..475d0a440ab --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_00to01.cpp @@ -0,0 +1,227 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler +\*********************************/ + +#include "emu.h" +#include "arcompactdasm.h" + + +inline uint32_t arcompact_disassembler::get_01_01_01_address_offset(uint32_t op) +{ + uint32_t address = (op & 0x00fe0000) >> 17; + address |= ((op & 0x00008000) >> 15) << 7; + address = util::sext(address, 8); + return address; +} + +int arcompact_disassembler::handle_dasm32_B_cc_D_s21(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int size = 4; + // Branch Conditionally + // 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ + int32_t address = (op & 0x07fe0000) >> 17; + address |= ((op & 0x0000ffc0) >> 6) << 10; + address = util::sext(address, 20); + int n = (op & 0x00000020) >> 5; + uint8_t condition = dasm_common32_get_condition(op); + + util::stream_format(stream, "B%s%s 0x%08x", conditions[condition], delaybit[n], (pc&0xfffffffc) + (address * 2)); + return size; +} + +int arcompact_disassembler::handle_dasm32_B_D_s25(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int size = 4; + // Branch Unconditionally Far + // 0000 0sss ssss sss1 SSSS SSSS SSNR TTTT + int32_t address = (op & 0x07fe0000) >> 17; + address |= ((op & 0x0000ffc0) >> 6) << 10; + address |= (op & 0x0000000f) << 20; + address = util::sext(address, 24); + int n = (op & 0x00000020) >> 5; + + util::stream_format(stream, "B%s 0x%08x", delaybit[n], (pc&0xfffffffc) + (address * 2)); + + return size; +} + +int arcompact_disassembler::handle_dasm32_BL_cc_d_s21(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int size = 4; + + // Branch and Link Conditionally + // 00001 sssssssss 00 SSSSSSSSSS N QQQQQ + int32_t address = (op & 0x07fc0000) >> 17; + address |= ((op & 0x0000ffc0) >> 6) << 10; + address = util::sext(address, 20); + + int n = (op & 0x00000020) >> 5; + + uint8_t condition = dasm_common32_get_condition(op); + + util::stream_format(stream, "BL%s%s 0x%08x", conditions[condition], delaybit[n], (pc&0xfffffffc) + (address *2)); + return size; +} + +int arcompact_disassembler::handle_dasm32_BL_d_s25(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int size = 4; + // Branch and Link Unconditionally Far + // 00001 sssssssss 10 SSSSSSSSSS N R TTTT + uint32_t address = (op & 0x07fc0000) >> 17; + address |= ((op & 0x0000ffc0) >> 6) << 10; + address |= (op & 0x0000000f) << 20; + address = util::sext(address, 24); + + int n = (op & 0x00000020) >> 5; + + util::stream_format(stream, "BL%s 0x%08x", delaybit[n], (pc&0xfffffffc) + (address *2)); + + return size; +} + + + +int arcompact_disassembler::handle01_01_00_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) +{ + int size = 4; + + // Branch on Compare / Bit Test - Register-Register + // 00001 bbb sssssss 1 S BBB CCCCCC N 0 iiii + uint32_t address = get_01_01_01_address_offset(op); + + uint8_t creg = dasm_common32_get_creg(op); + uint8_t breg = dasm_common32_get_breg(op); + int n = (op & 0x00000020) >> 5; + + if ((breg != DASM_REG_LIMM) && (creg != DASM_REG_LIMM)) + { + util::stream_format( stream, "%s%s %s, %s to 0x%08x", optext, delaybit[n], regnames[breg], regnames[creg], (pc&0xfffffffc) + (address * 2) ); + } + else + { + uint32_t limm; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + + if ((breg == DASM_REG_LIMM) && (creg != DASM_REG_LIMM)) + { + util::stream_format( stream, "%s%s 0x%08x, %s to 0x%08x", optext, delaybit[n], limm, regnames[creg], (pc&0xfffffffc) + (address * 2) ); + } + else if ((creg == DASM_REG_LIMM) && (breg != DASM_REG_LIMM)) + { + util::stream_format( stream, "%s%s %s, 0x%08x to 0x%08x", optext, delaybit[n], regnames[breg], limm, (pc&0xfffffffc) + (address * 2) ); + } + else + { + // b and c are LIMM? invalid?? + util::stream_format( stream, "%s%s 0x%08x, 0x%08x (illegal?) to 0x%08x", optext, delaybit[n], limm, limm, (pc&0xfffffffc) + (address * 2) ); + } + } + return size; +} + + +// register - register cases +int arcompact_disassembler::handle_dasm32_BREQ_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BREQ"); +} + +int arcompact_disassembler::handle_dasm32_BRNE_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BRNE"); +} + +int arcompact_disassembler::handle_dasm32_BRLT_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BRLT"); +} + +int arcompact_disassembler::handle_dasm32_BRGE_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BRGE"); +} + +int arcompact_disassembler::handle_dasm32_BRLO_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BRLO"); +} + +int arcompact_disassembler::handle_dasm32_BRHS_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BRHS"); +} + +int arcompact_disassembler::handle_dasm32_BBIT0_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BBIT0"); +} + +int arcompact_disassembler::handle_dasm32_BBIT1_reg_reg(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_00_helper( stream, pc, op, opcodes, "BBIT1"); +} + +int arcompact_disassembler::handle01_01_01_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) +{ + int size = 4; + + // using 'b' as limm here makes no sense (comparing a long immediate against a short immediate) so I assume it isn't + // valid? + + // Branch on Compare / Bit Test - Register-Immediate + // 0000 1bbb ssss sss1 SBBB uuuu uuN1 iiii + uint32_t address = get_01_01_01_address_offset(op); + + uint32_t u = dasm_common32_get_u6(op); + uint8_t breg = dasm_common32_get_breg(op); + int n = (op & 0x00000020) >> 5; + + util::stream_format(stream, "%s%s %s, 0x%02x 0x%08x", optext, delaybit[n], regnames[breg], u, (pc&0xfffffffc) + (address * 2)); + + return size; +} + +// register -immediate cases +int arcompact_disassembler::handle_dasm32_BREQ_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BREQ"); +} + +int arcompact_disassembler::handle_dasm32_BRNE_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BRNE"); +} + +int arcompact_disassembler::handle_dasm32_BRLT_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BRLT"); +} + +int arcompact_disassembler::handle_dasm32_BRGE_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BRGE"); +} + +int arcompact_disassembler::handle_dasm32_BRLO_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BRLO"); +} + +int arcompact_disassembler::handle_dasm32_BRHS_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BRHS"); +} + +int arcompact_disassembler::handle_dasm32_BBIT0_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BBIT0"); +} + +int arcompact_disassembler::handle_dasm32_BBIT1_reg_imm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle01_01_01_helper(stream, pc, op, opcodes, "BBIT1"); +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_02to03.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_02to03.cpp new file mode 100644 index 00000000000..43023debcee --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_02to03.cpp @@ -0,0 +1,111 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler + +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + + +int arcompact_disassembler::handle_dasm32_LD_r_o(std::ostream& stream, offs_t pc, uint32_t op, const data_buffer& opcodes) +{ + // bitpos + // 1111 1111 1111 1111 0000 0000 0000 0000 + // fedc ba98 7654 3210 fedc ba98 7654 3210 + // fields + // 0001 0bbb ssss ssss SBBB DaaZ ZXAA AAAA + int size = 4; + + uint8_t areg = dasm_common32_get_areg(op); + int X = (op & 0x00000040) >> 6; + int Z = (op & 0x00000180) >> 7; + int a = (op & 0x00000600) >> 9; + int D = (op & 0x00000800) >> 11; + int S = (op & 0x00008000) >> 15; + int s = (op & 0x00ff0000) >> 16; + uint8_t breg = dasm_common32_get_breg(op); + + uint32_t sdat = s | (S << 8); + sdat = util::sext(sdat, 9); + + uint32_t limm = 0; + if (breg == DASM_REG_LIMM) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + } + + if ((s == 0x04) && (S == 0) && (Z == 0) && (X == 0) & (a == 2) && (D == 0) && (breg == 28)) + { + util::stream_format(stream, "POP %s", regnames[areg]); + } + else + { + util::stream_format(stream, "LD%s%s%s%s %s <- [", datasize[Z], dataextend[X], addressmode[a], cachebit[D], regnames[areg]); + if (breg == DASM_REG_LIMM) util::stream_format(stream, "0x%08x, ", limm); + else util::stream_format(stream, "%s, ", regnames[breg]); + util::stream_format(stream, "0x%03x]", sdat); + } + return size; +} + +int arcompact_disassembler::handle_dasm32_ST_r_o(std::ostream& stream, offs_t pc, uint32_t op, const data_buffer& opcodes) +{ + int size = 4; + uint32_t limm = 0; + int got_limm = 0; + // bitpos + // 1111 1111 1111 1111 0000 0000 0000 0000 + // fedc ba98 7654 3210 fedc ba98 7654 3210 + // fields + // 0001 1bbb ssss ssss SBBB CCCC CCDa aZZR + int S = (op & 0x00008000) >> 15; + int s = (op & 0x00ff0000) >> 16; + + uint8_t breg = dasm_common32_get_breg(op); + uint32_t sdat = s | (S << 8); + sdat = util::sext(sdat, 9); + + int Z = (op & 0x00000006) >> 1; + int a = (op & 0x00000018) >> 3; + int D = (op & 0x00000020) >> 5; + uint8_t creg = dasm_common32_get_creg(op); + + if (breg == DASM_REG_LIMM) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + got_limm = 1; + } + + if ((s == 0xfc) && (S == 1) && (Z == 0) && (a == 1) && (D == 0) && (breg == 28)) + { + util::stream_format(stream, "PUSH %s", regnames[creg]); + } + else + { + util::stream_format(stream, "ST%s%s%s [", datasize[Z], addressmode[a], cachebit[D]); + if (breg == DASM_REG_LIMM) util::stream_format(stream, "0x%08x, ", limm); + else util::stream_format(stream, "%s, ", regnames[breg]); + util::stream_format(stream, "0x%03x] <- ", sdat); + + if (creg == DASM_REG_LIMM) + { + if (!got_limm) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + } + util::stream_format(stream, "0x%08x", limm); + + } + else + { + util::stream_format(stream, "%s", regnames[creg]); + } + } + return size; +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_04.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_04.cpp new file mode 100644 index 00000000000..cd193591226 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_04.cpp @@ -0,0 +1,470 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler + + ALU Operations, 0x04, [0x00-0x1F] + +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + + +// MOV is a special case because 'a' is completely ignored even where +// it would usually be the destination. +// as a result, b is always the destination, and LIMM handling is different +// it also has an official NOP alias for no destination + no flag cases +int arcompact_disassembler::handle04_MOV_f_a_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int size = 4; + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint8_t creg = dasm_common32_get_creg(op); + util::stream_format(stream, "MOV%s %s,", flagbit[F ? 1:0], regnames[breg]); + if (creg == DASM_REG_LIMM) + { + uint32_t limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + util::stream_format(stream, " 0x%08x", limm); + } + else + { + util::stream_format(stream, " %s", regnames[creg]); + } + return size; +} + +int arcompact_disassembler::handle04_MOV_f_a_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int size = 4; + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint32_t u = dasm_common32_get_u6(op); + // if there's no destination and no flags being set, this is a NOP + if ((F == 0) & (breg == DASM_REG_LIMM)) + { + util::stream_format(stream, "NOP"); + } + else + { + util::stream_format(stream, "MOV%s %s, 0x%08x", flagbit[F ? 1:0], regnames[breg], u); + } + return size; +} + + +int arcompact_disassembler::handle04_MOV_f_b_b_s12_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint32_t S = dasm_common32_get_s12(op); + util::stream_format(stream, "MOV%s %s, 0x%08x", flagbit[F ? 1:0], regnames[breg], S); + return 4; +} + +int arcompact_disassembler::handle04_MOV_cc_f_b_b_c_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int size = 4; + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint8_t condition = dasm_common32_get_condition(op); + uint8_t creg = dasm_common32_get_creg(op); + util::stream_format(stream, "MOV%s%s %s, ", conditions[condition], flagbit[F ? 1:0], regnames[breg]); + if (creg == DASM_REG_LIMM) + { + uint32_t limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + util::stream_format(stream, "0x%08x", limm); + } + else + { + util::stream_format(stream, "%s", regnames[creg]); + } + return size; +} + +int arcompact_disassembler::handle04_MOV_cc_f_b_b_u6_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + uint8_t condition = dasm_common32_get_condition(op); + uint32_t u = dasm_common32_get_u6(op); + util::stream_format(stream, "MOV%s%s %s, 0x%08x", conditions[condition], flagbit[F ? 1:0], regnames[breg], u); + return 4; +} + +int arcompact_disassembler::handle04_MOV_p11_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + int M = (op & 0x00000020) >> 5; + switch (M) + { + case 0x00: return handle04_MOV_cc_f_b_b_c_helper_dasm(stream, pc, op, opcodes); + case 0x01: return handle04_MOV_cc_f_b_b_u6_helper_dasm(stream, pc, op, opcodes); + } + return 0; +} + + +int arcompact_disassembler::handle04_MOV_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + uint8_t p = dasm_common32_get_p(op); + switch (p) + { + case 0x00: return handle04_MOV_f_a_b_c_helper_dasm(stream, pc, op, opcodes); + case 0x01: return handle04_MOV_f_a_b_u6_helper_dasm(stream, pc, op, opcodes); + case 0x02: return handle04_MOV_f_b_b_s12_helper_dasm(stream, pc, op, opcodes); + case 0x03: return handle04_MOV_p11_helper_dasm(stream, pc, op, opcodes); + } + + return 0; +} + + +int arcompact_disassembler::handle_dasm32_ADD(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ADD", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ADC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ADC", 0,0); +} + +int arcompact_disassembler::handle_dasm32_SUB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "SUB", 0,0); +} + +int arcompact_disassembler::handle_dasm32_SBC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "SBC", 0,0); +} + +int arcompact_disassembler::handle_dasm32_AND(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "AND", 0,0); +} + +int arcompact_disassembler::handle_dasm32_OR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "OR", 0,0); +} + +int arcompact_disassembler::handle_dasm32_BIC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "BIC", 0,0); +} + +int arcompact_disassembler::handle_dasm32_XOR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "XOR", 0,0); +} + +int arcompact_disassembler::handle_dasm32_MAX(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MAX", 0,0); +} + +int arcompact_disassembler::handle_dasm32_MIN(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MIN", 0,0); +} + +int arcompact_disassembler::handle_dasm32_MOV(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_MOV_helper_dasm(stream, pc, op, opcodes); +} + +int arcompact_disassembler::handle_dasm32_TST(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "TST", 1,0); +} + +int arcompact_disassembler::handle_dasm32_CMP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "CMP", 1,0); +} + +int arcompact_disassembler::handle_dasm32_RCMP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "RCMP", 1,0); +} + +int arcompact_disassembler::handle_dasm32_RSUB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "RSUB", 0,0); +} + +int arcompact_disassembler::handle_dasm32_BSET(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "BSET", 0,0); +} + +int arcompact_disassembler::handle_dasm32_BCLR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "BCLR", 0,0); +} + +int arcompact_disassembler::handle_dasm32_BTST(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "BTST", 0,0); +} + +int arcompact_disassembler::handle_dasm32_BXOR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "BXOR", 0,0); +} + +int arcompact_disassembler::handle_dasm32_BMSK(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "BMSK", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ADD1(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ADD1", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ADD2(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ADD2", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ADD3(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ADD3", 0,0); +} + +int arcompact_disassembler::handle_dasm32_SUB1(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "SUB1", 0,0); +} + +int arcompact_disassembler::handle_dasm32_SUB2(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "SUB2", 0,0); +} + +int arcompact_disassembler::handle_dasm32_SUB3(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "SUB3", 0,0); +} + +int arcompact_disassembler::handle_dasm32_MPY(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MPY", 0,0); +} // * + +int arcompact_disassembler::handle_dasm32_MPYH(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MPYH", 0,0); +} // * + +int arcompact_disassembler::handle_dasm32_MPYHU(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MPYHU", 0,0); +} // * + +int arcompact_disassembler::handle_dasm32_MPYU(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MPYU", 0,0); +} // * + +int arcompact_disassembler::handle_dasm32_Jcc(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "J", 1,1); +} + +int arcompact_disassembler::handle_dasm32_Jcc_D(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "J.D", 1,1); +} + +int arcompact_disassembler::handle_dasm32_JLcc(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "JL", 1,1); +} + +int arcompact_disassembler::handle_dasm32_JLcc_D(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "JL.D", 1,1); +} + +int arcompact_disassembler::handle_dasm32_LP(std::ostream& stream, offs_t pc, uint32_t op, const data_buffer& opcodes) // LPcc (loop setup) +{ + //uint8_t breg = dasm_common32_get_breg(op); // breg is reserved + uint8_t p = dasm_common32_get_p(op); + + if (p == 0x00) + { + util::stream_format(stream, ""); + } + else if (p == 0x01) + { + util::stream_format(stream, ""); + } + else if (p == 0x02) // Loop unconditional + { // 0010 0RRR 1010 1000 0RRR ssss ssSS SSSS + uint32_t S = dasm_common32_get_s12(op); + util::stream_format(stream, "LP (start %08x, end %08x)", pc + 4, (pc & 0xfffffffc) + S * 2); + } + else if (p == 0x03) // Loop conditional + { // 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ + uint32_t u = dasm_common32_get_u6(op); + uint8_t condition = dasm_common32_get_condition(op); + util::stream_format(stream, "LP<%s> (start %08x, end %08x)", conditions[condition], pc + 4, (pc & 0xfffffffc) + u * 2); + } + + return 4; +} + +void arcompact_disassembler::output_aux_regname(std::ostream& stream, uint32_t auxreg) +{ + if ((auxreg >= 0) && (auxreg < 0x420)) + { + if (strcmp(auxregnames[auxreg], "unusedreg")) + util::stream_format(stream, "[%s]", auxregnames[auxreg]); + else + util::stream_format(stream, "[%03x]", auxreg); + } + else + util::stream_format(stream, "[%03x]", auxreg); +} + +int arcompact_disassembler::handle_dasm32_LR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) // Load FROM Auxiliary register TO register +{ + // pp F + // 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR + // 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR + // 0010 0bbb 0110 1010 0BBB uuuu uu00 0000 + // 0010 0bbb 1010 1010 0BBB ssss ssSS SSSS + int size = 4; + uint32_t limm = 0; + int got_limm = 0; + + uint8_t p = dasm_common32_get_p(op); + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + + util::stream_format(stream, "LR"); + if (F) util::stream_format(stream, "."); +// util::stream_format(stream, " p(%d)", p); + + if (breg == DASM_REG_LIMM) + { + util::stream_format(stream, ""); // illegal encoding? + } + else + { + util::stream_format(stream, " %s, ", regnames[breg]); + } + + if (p == 0) + { + uint8_t creg = dasm_common32_get_creg(op); + if (creg == DASM_REG_LIMM) + { + if (!got_limm) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + } + + util::stream_format(stream, "0x%08x ", limm); + } + else + { + util::stream_format(stream, "%s ", regnames[creg]); + } + } + else if (p == 1) + { + uint32_t u = dasm_common32_get_u6(op); + output_aux_regname(stream, u); + } + else if (p == 2) + { + uint32_t S = dasm_common32_get_s12(op); + output_aux_regname(stream, S); + } + else if (p == 3) + { + util::stream_format(stream, " "); + } + + return size; +} + +int arcompact_disassembler::handle_dasm32_SR(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) // Store TO Auxiliary register FROM register +{ + // code at ~ 40073DFE in leapster bios is manually setting up a loop this way + // rather than using the lPcc opcode + int size = 4; + uint32_t limm = 0; + int got_limm = 0; + + uint8_t p = dasm_common32_get_p(op); + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + + util::stream_format(stream, "SR"); + if (F) util::stream_format(stream, "."); +// util::stream_format(stream, " p(%d)", p); + + if (breg == DASM_REG_LIMM) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + got_limm = 1; + util::stream_format(stream, " 0x%08x -> ", limm); + + } + else + { + util::stream_format(stream, " %s -> ", regnames[breg]); + } + + if (p == 0) + { + uint8_t creg = dasm_common32_get_creg(op); + + if (creg == DASM_REG_LIMM) + { + if (!got_limm) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + } + util::stream_format(stream, "[0x%08x]", limm); + + } + else + { + util::stream_format(stream, "[%s]", regnames[creg]); + } + } + else if (p == 1) + { + uint32_t u = dasm_common32_get_u6(op); + output_aux_regname(stream, u); + } + else if (p == 2) + { + uint32_t S = dasm_common32_get_s12(op); + output_aux_regname(stream, S); + } + else if (p == 3) + { + util::stream_format(stream, " "); + } + return size; +} + + +int arcompact_disassembler::handle_dasm32_FLAG(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + // leapster bios uses formats for FLAG that are explicitly defined and are considered redundant + return handle04_helper_dasm(stream, pc, op, opcodes, "FLAG", 1,1); +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_3f_zop.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_3f_zop.cpp new file mode 100644 index 00000000000..e4628a71524 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_3f_zop.cpp @@ -0,0 +1,42 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler + + ALU Operations, 0x04, [0x00-0x1F] + +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + +int arcompact_disassembler::handle_dasm32_SLEEP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "SLEEP (%08x)", op); + return 4; +} + +int arcompact_disassembler::handle_dasm32_SWI(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "SWI / TRAP0 (%08x)", op); + return 4; +} + +int arcompact_disassembler::handle_dasm32_SYNC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "SYNC (%08x)", op); + return 4; +} + +int arcompact_disassembler::handle_dasm32_RTIE(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "RTIE (%08x)", op); + return 4; +} + +int arcompact_disassembler::handle_dasm32_BRK(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "BRK (%08x)", op); + return 4; +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_sop.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_sop.cpp new file mode 100644 index 00000000000..1caf849734d --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_04_2f_sop.cpp @@ -0,0 +1,135 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler + + ALU Operations, 0x04, [0x00-0x1F] + +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + +int arcompact_disassembler::handle04_2f_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) +{ + // + // 0010 0bbb pp10 1111 FBBB CCCC CCII IIII + int size = 4; + + uint8_t p = dasm_common32_get_p(op); + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + + util::stream_format(stream, "%s%s", optext, flagbit[F]); + + if (breg == DASM_REG_LIMM) + { + util::stream_format(stream, " , "); + // if using the 'EX' opcode this is illegal + } + else + { + util::stream_format(stream, " %s, ", regnames[breg]); + } + + if (p == 0) + { + uint8_t creg = dasm_common32_get_creg(op); + + if (creg == DASM_REG_LIMM) + { + uint32_t limm; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + util::stream_format(stream, "0x%08x ", limm); + } + else + { + util::stream_format(stream, "%s ", regnames[creg]); + } + } + else if (p == 1) + { + uint32_t u = dasm_common32_get_u6(op); + + util::stream_format(stream, "0x%02x ", u); + } + else if (p == 2) + { + util::stream_format(stream, "<04_2f illegal p=10>"); + } + else if (p == 3) + { + util::stream_format(stream, "<04_2f illegal p=11>"); + } + + return size; +} + +int arcompact_disassembler::handle_dasm32_ASL_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ASL"); +} + +int arcompact_disassembler::handle_dasm32_ASR_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ASR"); +} + +int arcompact_disassembler::handle_dasm32_LSR_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "LSR"); +} + +int arcompact_disassembler::handle_dasm32_ROR_single(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ROR"); +} + +int arcompact_disassembler::handle_dasm32_RRC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "RCC"); +} + +int arcompact_disassembler::handle_dasm32_SEXB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "SEXB"); +} + +int arcompact_disassembler::handle_dasm32_SEXW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "SEXW"); +} + +int arcompact_disassembler::handle_dasm32_EXTB(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "EXTB"); +} + +int arcompact_disassembler::handle_dasm32_EXTW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "EXTW"); +} + +int arcompact_disassembler::handle_dasm32_ABS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "ABS"); +} + +int arcompact_disassembler::handle_dasm32_NOT(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "NOT"); +} + +int arcompact_disassembler::handle_dasm32_RLC(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "RLC"); +} + +int arcompact_disassembler::handle_dasm32_EX(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_2f_helper_dasm(stream, pc, op, opcodes, "EX"); +} + + diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_04_3x.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_04_3x.cpp new file mode 100644 index 00000000000..c1596d7ac24 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_04_3x.cpp @@ -0,0 +1,102 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler + +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + +// format on these is.. + +// 0010 0bbb aa11 0ZZX DBBB CCCC CCAA AAAA +// note, bits 11 0ZZX are part of the sub-opcode # already - this is a special encoding +int arcompact_disassembler::handle04_3x_helper_dasm(std::ostream& stream, offs_t pc, uint32_t op, const data_buffer& opcodes, int dsize, int extend) +{ + int size = 4; + uint32_t limm = 0; + int got_limm = 0; + + util::stream_format(stream, "LD%s%s", datasize[dsize], dataextend[extend]); + + int mode = (op & 0x00c00000) >> 22; + uint8_t breg = dasm_common32_get_breg(op); + int D = (op & 0x00008000) >> 15; + uint8_t creg = dasm_common32_get_creg(op); + uint8_t areg = dasm_common32_get_areg(op); + + util::stream_format(stream, "%s%s %s. ", addressmode[mode], cachebit[D], regnames[areg]); + + if (breg == DASM_REG_LIMM) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + got_limm = 1; + util::stream_format(stream, "[0x%08x, ", limm); + + } + else + { + util::stream_format(stream, "[%s, ", regnames[breg]); + } + + if (creg == DASM_REG_LIMM) + { + if (!got_limm) + { + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + } + util::stream_format(stream, "0x%08x]", limm); + } + else + { + util::stream_format(stream, "%s]", regnames[creg]); + } + + return size; +} + +int arcompact_disassembler::handle_dasm32_LD_0(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,0,0); +} + +// ZZ value of 0x0 with X of 1 is illegal +int arcompact_disassembler::handle_dasm32_LD_1(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,0,1); +} + +int arcompact_disassembler::handle_dasm32_LD_2(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,1,0); +} + +int arcompact_disassembler::handle_dasm32_LD_3(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,1,1); +} + +int arcompact_disassembler::handle_dasm32_LD_4(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,2,0); +} + +int arcompact_disassembler::handle_dasm32_LD_5(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,2,1); +} + +// ZZ value of 0x3 is illegal +int arcompact_disassembler::handle_dasm32_LD_6(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,3,0); +} + +int arcompact_disassembler::handle_dasm32_LD_7(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_3x_helper_dasm(stream, pc, op, opcodes,3,1); +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_05.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_05.cpp new file mode 100644 index 00000000000..6d9fe4962ec --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_05.cpp @@ -0,0 +1,74 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + +int arcompact_disassembler::handle_dasm32_ASL_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ASL", 0,0); +} + +int arcompact_disassembler::handle_dasm32_LSR_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "LSR", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ASR_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ASR", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ROR_multiple(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ROR", 0,0); +} + +int arcompact_disassembler::handle_dasm32_MUL64(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MUL64", 2,0); +} + +int arcompact_disassembler::handle_dasm32_MULU64(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "MULU64", 2,0); +} + +int arcompact_disassembler::handle_dasm32_ADDS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ADDS", 0,0); +} + +int arcompact_disassembler::handle_dasm32_SUBS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "SUBS", 0,0); +} + +int arcompact_disassembler::handle_dasm32_DIVAW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "DIVAW", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ASLS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ASLS", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ASRS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ASRS", 0,0); +} + +int arcompact_disassembler::handle_dasm32_ADDSDW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "ADDSDW", 0,0); +} + +int arcompact_disassembler::handle_dasm32_SUBSDW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle04_helper_dasm(stream, pc, op, opcodes, "SUBSDW", 0,0); +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_05_2f_sop.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_05_2f_sop.cpp new file mode 100644 index 00000000000..20aae625211 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_05_2f_sop.cpp @@ -0,0 +1,105 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler + +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + +int arcompact_disassembler::handle05_2f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext) +{ + // + // 0010 1bbb pp10 1111 FBBB CCCC CCII IIII when pp == 0x00 + // or + // 0010 1bbb pp10 1111 FBBB UUUU UUII IIII when pp == 0x01 + // otherwise invalid + + int size = 4; + + uint8_t p = dasm_common32_get_p(op); + uint8_t breg = dasm_common32_get_breg(op); + bool F = dasm_common32_get_F(op); + + util::stream_format(stream, "%s%s %s, ", optext, flagbit[F], regnames[breg]); + + if (p == 0) + { + uint8_t creg = dasm_common32_get_creg(op); + + if (creg == DASM_REG_LIMM) + { + uint32_t limm; + limm = dasm_get_limm_32bit_opcode(pc, opcodes); + size = 8; + util::stream_format(stream, "0x%08x ", limm); + + } + else + { + util::stream_format(stream, "%s ", regnames[creg]); + } + } + else if (p == 1) + { + uint32_t u = dasm_common32_get_u6(op); + util::stream_format(stream, "0x%02x ", u); + } + else if (p == 2) + { + util::stream_format(stream, "<05_2f illegal p=10>"); + } + else if (p == 3) + { + util::stream_format(stream, "<05_2f illegal p=11>"); + } + + return size; +} + +int arcompact_disassembler::handle_dasm32_SWAP(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "SWAP"); +} + +int arcompact_disassembler::handle_dasm32_NORM(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NORM"); +} + +int arcompact_disassembler::handle_dasm32_SAT16(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "SAT16"); +} + +int arcompact_disassembler::handle_dasm32_RND16(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "RND16"); +} + +int arcompact_disassembler::handle_dasm32_ABSSW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "ABSSW"); +} + +int arcompact_disassembler::handle_dasm32_ABSS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "ABSS"); +} + +int arcompact_disassembler::handle_dasm32_NEGSW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NEGSW"); +} + +int arcompact_disassembler::handle_dasm32_NEGS(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NEGS"); +} + +int arcompact_disassembler::handle_dasm32_NORMW(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + return handle05_2f_0x_helper_dasm(stream, pc, op, opcodes, "NORMW"); +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_06to0b.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_06to0b.cpp new file mode 100644 index 00000000000..0c999da25a2 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_06to0b.cpp @@ -0,0 +1,46 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler + +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + +int arcompact_disassembler::handle_dasm32_ARC_EXT06(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "op a,b,c (06 ARC ext) (%08x)", op ); + return 4; +} + +int arcompact_disassembler::handle_dasm32_USER_EXT07(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "op a,b,c (07 User ext) (%08x)", op ); + return 4; +} + +int arcompact_disassembler::handle_dasm32_USER_EXT08(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "op a,b,c (08 User ext) (%08x)", op ); + return 4; +} + +int arcompact_disassembler::handle_dasm32_MARKET_EXT09(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "op a,b,c (09 Market ext) (%08x)", op ); + return 4; +} + +int arcompact_disassembler::handle_dasm32_MARKET_EXT0a(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "op a,b,c (0a Market ext) (%08x)", op ); + return 4; +} + +int arcompact_disassembler::handle_dasm32_MARKET_EXT0b(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "op a,b,c (0b Market ext) (%08x)", op ); + return 4; +} diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops_16bit.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops_16bit.cpp new file mode 100644 index 00000000000..a4dfaabcb45 --- /dev/null +++ b/src/devices/cpu/arcompact/arcompactdasm_ops_16bit.cpp @@ -0,0 +1,722 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/*********************************\ + ARCompact disassembler +\*********************************/ + +#include "emu.h" + +#include "arcompactdasm.h" + +int arcompact_disassembler::handle0c_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int format) +{ + uint8_t areg = expand_reg(dasm_common16_get_areg(op)); + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint8_t creg = expand_reg(dasm_common16_get_creg(op)); + if (format == 0) util::stream_format(stream, "%s %s <- [%s, %s]", optext, regnames[areg], regnames[breg], regnames[creg]); + else util::stream_format(stream, "%s %s <- %s, %s", optext, regnames[areg], regnames[breg], regnames[creg]); + return 2; +} + +int arcompact_disassembler::handle_dasm_LD_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0c_helper_dasm(stream, pc, op, opcodes, "LD_S", 0); +} + +int arcompact_disassembler::handle_dasm_LDB_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0c_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0); +} + +int arcompact_disassembler::handle_dasm_LDW_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0c_helper_dasm(stream, pc, op, opcodes, "LDW_S", 0); +} + +int arcompact_disassembler::handle_dasm_ADD_S_a_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0c_helper_dasm(stream, pc, op, opcodes, "ADD_S", 1); +} + +int arcompact_disassembler::handle0d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) +{ + uint32_t u = dasm_common16_get_u3(op); + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint8_t creg = expand_reg(dasm_common16_get_creg(op)); + util::stream_format(stream, "%s %s <- [%s, 0x%02x]", optext, regnames[creg], regnames[breg], u); + return 2; +} + +int arcompact_disassembler::handle_dasm_ADD_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0d_helper_dasm(stream, pc, op, opcodes, "ADD_S"); +} + +int arcompact_disassembler::handle_dasm_SUB_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0d_helper_dasm(stream, pc, op, opcodes, "SUB_S"); +} + +int arcompact_disassembler::handle_dasm_ASL_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0d_helper_dasm(stream, pc, op, opcodes, "ASL_S"); +} + +int arcompact_disassembler::handle_dasm_ASR_S_c_b_u3(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0d_helper_dasm(stream, pc, op, opcodes, "ASR_S"); +} + +int arcompact_disassembler::handle0e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int revop) +{ + int size = 2; + uint8_t h = dasm_group_0e_get_h(op); + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + if (h == DASM_REG_LIMM) + { + uint32_t limm; + limm = dasm_get_limm_16bit_opcode(pc, opcodes); + size = 6; + if (!revop) util::stream_format( stream, "%s %s <- 0x%08x", optext, regnames[breg], limm); + else util::stream_format( stream, "%s 0x%08x <- %s", optext, limm, regnames[breg]); + } + else + { + if (!revop) util::stream_format( stream, "%s %s <- %s", optext, regnames[breg], regnames[h]); + else util::stream_format( stream, "%s %s <- %s", optext, regnames[h], regnames[breg]); + + } + return size; +} + +int arcompact_disassembler::handle_dasm_ADD_S_b_b_h_or_limm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "ADD_S", 0); +} + +int arcompact_disassembler::handle_dasm_MOV_S_b_h_or_limm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "MOV_S", 0); +} + +int arcompact_disassembler::handle_dasm_CMP_S_b_h_or_limm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "CMP_S", 0); +} + +int arcompact_disassembler::handle_dasm_MOV_S_h_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0e_0x_helper_dasm(stream, pc, op, opcodes, "MOV_S", 1); +} + +int arcompact_disassembler::handle0f_00_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + util::stream_format( stream, "%s %s", optext, regnames[breg]); + return 2; +} + +int arcompact_disassembler::handle_dasm_J_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "J_S"); +} + +int arcompact_disassembler::handle_dasm_J_S_D_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "J_S.D"); +} + +int arcompact_disassembler::handle_dasm_JL_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "JL_S"); +} + +int arcompact_disassembler::handle_dasm_JL_S_D_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "JL_S.D"); +} + +int arcompact_disassembler::handle_dasm_SUB_S_NE_b_b_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_00_0x_helper_dasm(stream, pc, op, opcodes, "SUB_S.NE"); +} + +// Zero parameters (ZOP) +int arcompact_disassembler::handle_dasm_NOP_S(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + util::stream_format(stream, "NOP_S"); + return 2; +} + +int arcompact_disassembler::handle_dasm_UNIMP_S(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + // Unimplemented Instruction, same as illegal, but recommended to fill blank space + util::stream_format( stream, "UNIMP_S"); + return 2; +} + +int arcompact_disassembler::handle_dasm_JEQ_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "JEQ_S [blink]"); + return 2; +} + +int arcompact_disassembler::handle_dasm_JNE_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "JNE_S [blink]"); + return 2; +} + +int arcompact_disassembler::handle_dasm_J_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "J_S [blink]"); + return 2; +} + +int arcompact_disassembler::handle_dasm_J_S_D_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + util::stream_format( stream, "J_S.D [blink]"); + return 2; +} + +int arcompact_disassembler::handle0f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int nodst) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint8_t creg = expand_reg(dasm_common16_get_creg(op)); + + if (nodst==0) util::stream_format(stream, "%s %s <- %s", optext, regnames[breg], regnames[creg]); + else if (nodst==1) util::stream_format(stream, "%s , %s, %s", optext, regnames[breg], regnames[creg]); + else if (nodst==2) util::stream_format(stream, "%s , %s, %s", optext, regnames[breg], regnames[creg]); + + return 2; +} + +int arcompact_disassembler::handle_dasm_SUB_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "SUB_S",0); +} + +int arcompact_disassembler::handle_dasm_AND_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "AND_S",0); +} + +int arcompact_disassembler::handle_dasm_OR_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "OR_S",0); +} + +int arcompact_disassembler::handle_dasm_BIC_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "BIC_S",0); +} + +int arcompact_disassembler::handle_dasm_XOR_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "XOR_S",0); +} + +int arcompact_disassembler::handle_dasm_TST_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "TST_S",1); +} + +int arcompact_disassembler::handle_dasm_MUL64_S_0_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "MUL64_S",2); +} // actual destination is special multiply registers + +int arcompact_disassembler::handle_dasm_SEXB_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "SEXB_S",0); +} + +int arcompact_disassembler::handle_dasm_SEXW_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "SEXW_S",0); +} + +int arcompact_disassembler::handle_dasm_EXTB_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "EXTB_S",0); +} + +int arcompact_disassembler::handle_dasm_EXTW_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "EXTW_S",0); +} + +int arcompact_disassembler::handle_dasm_ABS_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ABS_S",0); +} + +int arcompact_disassembler::handle_dasm_NOT_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "NOT_S",0); +} + +int arcompact_disassembler::handle_dasm_NEG_S_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "NEG_S",0); +} + +int arcompact_disassembler::handle_dasm_ADD1_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ADD1_S",0); +} + +int arcompact_disassembler::handle_dasm_ADD2_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ADD2_S",0); +} + +int arcompact_disassembler::handle_dasm_ADD3_S_b_b_c(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ADD3_S",0); +} + +int arcompact_disassembler::handle_dasm_ASL_S_b_b_c_multiple(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASL_S",0); +} + +int arcompact_disassembler::handle_dasm_LSR_S_b_b_c_multiple(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "LSR_S",0); +} + +int arcompact_disassembler::handle_dasm_ASR_S_b_b_c_multiple(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASR_S",0); +} + +int arcompact_disassembler::handle_dasm_ASL_S_b_c_single(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASL1_S",0); +} + +int arcompact_disassembler::handle_dasm_ASR_S_b_c_single(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "ASR1_S",0); +} + +int arcompact_disassembler::handle_dasm_LSR_S_b_c_single(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle0f_0x_helper_dasm(stream, pc, op, opcodes, "LSR1_S",0); +} + +int arcompact_disassembler::handle_dasm_TRAP_S_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) // special +{ // 0111 1uuu uuu1 1110 + int u = (op & 0x07e0)>>5; + util::stream_format( stream, "TRAP_S %02x",u); + return 2; +} + +int arcompact_disassembler::handle_dasm_BRK_S(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) // special +{ + int u = (op & 0x07e0) >> 5; + + if (u == 0x003f) + { + util::stream_format(stream, "BRK_S"); + } + else + { + util::stream_format(stream, "", u); + } + return 2; +} + + +int arcompact_disassembler::handle_ld_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int swap) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint8_t creg = expand_reg(dasm_common16_get_creg(op)); + uint32_t u = dasm_common16_get_u5(op); + + u <<= shift; + + if (!swap) util::stream_format(stream, "%s %s, [%s, 0x%02x]", optext, regnames[creg], regnames[breg], u); + else util::stream_format(stream, "%s [%s, 0x%02x], %s", optext, regnames[breg], u, regnames[creg]); + return 2; +} + + +int arcompact_disassembler::handle_dasm_LD_S_c_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_ld_helper_dasm(stream, pc, op, opcodes, "LD_S", 2, 0); +} + +int arcompact_disassembler::handle_dasm_LDB_S_c_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_ld_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0, 0); +} + +int arcompact_disassembler::handle_dasm_LDW_S_c_b_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_ld_helper_dasm(stream, pc, op, opcodes, "LDW_S", 1, 0); +} + +int arcompact_disassembler::handle_dasm_LDW_S_X_c_b_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_ld_helper_dasm(stream, pc, op, opcodes, "LDW_S.X", 1, 0); +} + +int arcompact_disassembler::handle_dasm_ST_S_c_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_ld_helper_dasm(stream, pc, op, opcodes, "ST_S", 2, 1); +} + +int arcompact_disassembler::handle_dasm_STB_S_c_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_ld_helper_dasm(stream, pc, op, opcodes, "STB_S", 0, 1); +} + +int arcompact_disassembler::handle_dasm_STW_S_c_b_u6(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_ld_helper_dasm(stream, pc, op, opcodes, "STW_S", 1, 1); +} + + +int arcompact_disassembler::handle_l7_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint32_t u = dasm_common16_get_u5(op); + util::stream_format(stream, "%s %s, 0x%02x", optext, regnames[breg], u); + return 2; +} + +int arcompact_disassembler::handle_dasm_ASL_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "ASL_S"); +} + +int arcompact_disassembler::handle_dasm_LSR_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "LSR_S"); +} + +int arcompact_disassembler::handle_dasm_ASR_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "ASR_S"); +} + +int arcompact_disassembler::handle_dasm_SUB_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "SUB_S"); +} + +int arcompact_disassembler::handle_dasm_BSET_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BSET_S"); +} + +int arcompact_disassembler::handle_dasm_BCLR_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BCLR_S"); +} + +int arcompact_disassembler::handle_dasm_BMSK_S_b_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BSMK_S"); +} + +int arcompact_disassembler::handle_dasm_BTST_S_b_u5(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle_l7_0x_helper_dasm(stream, pc, op, opcodes, "BTST_S"); +} + + +// op bits remaining for 0x18_xx subgroups 0x071f + +int arcompact_disassembler::handle18_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int st, int format) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint32_t u = dasm_common16_get_u5(op); + + util::stream_format(stream, "%s %s ", optext, regnames[breg]); + if (st == 1) util::stream_format(stream, "-> "); + else util::stream_format(stream, "<- "); + + if (format == 0) util::stream_format(stream, "[SP, 0x%02x]", u * 4); + else util::stream_format(stream, "SP, 0x%02x", u * 4); + + return 2; +} + +int arcompact_disassembler::handle_dasm_LD_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle18_0x_helper_dasm(stream, pc, op, opcodes, "LD_S", 0,0); +} + +int arcompact_disassembler::handle_dasm_LDB_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle18_0x_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0,0); +} + +int arcompact_disassembler::handle_dasm_ST_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle18_0x_helper_dasm(stream, pc, op, opcodes, "ST_S", 1,0); +} + +int arcompact_disassembler::handle_dasm_STB_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle18_0x_helper_dasm(stream, pc, op, opcodes, "STB_S", 1,0); +} + +int arcompact_disassembler::handle_dasm_ADD_S_b_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle18_0x_helper_dasm(stream, pc, op, opcodes, "ADD_S", 1,1); // check format +} + +// op bits remaining for 0x18_05_xx subgroups 0x001f +int arcompact_disassembler::handle_dasm_ADD_S_sp_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + int u; + u = dasm_common16_get_u5(op); + + util::stream_format( stream, "ADD_S SP, SP, 0x%02x", u*4); + return 2; + +} + +int arcompact_disassembler::handle_dasm_SUB_S_sp_sp_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + uint32_t u = dasm_common16_get_u5(op); + + util::stream_format( stream, "SUB_S SP, SP, 0x%02x", u*4); + return 2; +} + +// op bits remaining for 0x18_06_xx subgroups 0x0700 +int arcompact_disassembler::handle_dasm_POP_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + + util::stream_format(stream, "POP_S %s", regnames[breg]); + + return 2; +} + +int arcompact_disassembler::handle_dasm_POP_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + util::stream_format(stream, "POP_S [BLINK]"); + return 2; +} + +// op bits remaining for 0x18_07_xx subgroups 0x0700 +int arcompact_disassembler::handle_dasm_PUSH_S_b(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + util::stream_format(stream, "PUSH_S %s", regnames[breg]); + return 2; +} + + +int arcompact_disassembler::handle_dasm_PUSH_S_blink(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + util::stream_format(stream, "PUSH_S [BLINK]"); + return 2; +} + + +int arcompact_disassembler::handle19_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int format) +{ + uint32_t s = dasm_common16_get_s9(op); + s <<= shift; + util::stream_format(stream, "%s %s, ", optext, regnames[0]); + if (format == 0) + { + util::stream_format(stream, "[GP, 0x%03x]", s); + } + else + { + util::stream_format(stream, "GP, 0x%03x", s); + } + return 2; +} + +int arcompact_disassembler::handle_dasm_LD_S_r0_gp_s11(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle19_0x_helper_dasm(stream, pc, op, opcodes, "LD_S", 2, 0); +} + +int arcompact_disassembler::handle_dasm_LDB_S_r0_gp_s9(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle19_0x_helper_dasm(stream, pc, op, opcodes, "LDB_S", 0, 0); +} + +int arcompact_disassembler::handle_dasm_LDW_S_r0_gp_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle19_0x_helper_dasm(stream, pc, op, opcodes, "LDW_S", 1, 0); +} + +int arcompact_disassembler::handle_dasm_ADD_S_r0_gp_s11(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle19_0x_helper_dasm(stream, pc, op, opcodes, "ADD_S", 2, 1); +} + + +int arcompact_disassembler::handle_dasm_LD_S_b_pcl_u10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint32_t u = dasm_common16_get_u8(op); + + util::stream_format(stream, "MOV_S %s, [PCL, 0x%03x]", regnames[breg], u*4); + + return 2; +} + +int arcompact_disassembler::handle_dasm_MOV_S_b_u8(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint32_t u = dasm_common16_get_u8(op); + util::stream_format(stream, "MOV_S %s <- 0x%02x", regnames[breg], u); + return 2; +} + +int arcompact_disassembler::handle_dasm_ADD_S_b_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint32_t u = dasm_common16_get_u7(op); + + util::stream_format(stream, "ADD_S %s <- %s, 0x%02x", regnames[breg], regnames[breg], u); + return 2; +} + +int arcompact_disassembler::handle_dasm_CMP_S_b_u7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + uint32_t u = dasm_common16_get_u7(op); + + util::stream_format(stream, "CMP_S %s, 0x%02x", regnames[breg], u); + return 2; +} + +int arcompact_disassembler::handle1d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) +{ + uint8_t breg = expand_reg(dasm_common16_get_breg(op)); + + uint32_t s = op & 0x007f; + s = util::sext(s, 7); + + util::stream_format(stream, "%s %s, 0 to 0x%08x", optext, regnames[breg], (pc&0xfffffffc) + s*2); + return 2; +} + +int arcompact_disassembler::handle_dasm_BREQ_S_b_0_s8(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1d_helper_dasm(stream, pc, op, opcodes,"BREQ_S"); +} + +int arcompact_disassembler::handle_dasm_BRNE_S_b_0_s8(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1d_helper_dasm(stream, pc, op, opcodes,"BRNE_S"); +} + +int arcompact_disassembler::handle1e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) +{ + int s = op & 0x01ff; + s = util::sext(s, 9); + + util::stream_format(stream, "%s 0x%08x", optext, (pc & 0xfffffffc) + s * 2); + return 2; +} + +int arcompact_disassembler::handle_dasm_B_S_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_0x_helper_dasm(stream, pc, op, opcodes, "B_S"); +} + +int arcompact_disassembler::handle_dasm_BEQ_S_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_0x_helper_dasm(stream, pc, op, opcodes, "BEQ_S"); +} + +int arcompact_disassembler::handle_dasm_BNE_S_s10(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_0x_helper_dasm(stream, pc, op, opcodes, "BNE_S"); +} + +int arcompact_disassembler::handle1e_03_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext) +{ + int s = op & 0x003f; + s = util::sext(s, 6); + + util::stream_format(stream, "%s 0x%08x", optext, (pc & 0xfffffffc) + s * 2); + return 2; +} + +int arcompact_disassembler::handle_dasm_BGT_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BGT_S"); +} + +int arcompact_disassembler::handle_dasm_BGE_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BGE_S"); +} + +int arcompact_disassembler::handle_dasm_BLT_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLT_S"); +} + +int arcompact_disassembler::handle_dasm_BLE_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLE_S"); +} + +int arcompact_disassembler::handle_dasm_BHI_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BHI_S"); +} + +int arcompact_disassembler::handle_dasm_BHS_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BHS_S"); +} + +int arcompact_disassembler::handle_dasm_BLO_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLO_S"); +} + +int arcompact_disassembler::handle_dasm_BLS_S_s7(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + return handle1e_03_0x_helper_dasm(stream, pc, op, opcodes, "BLS_S"); +} + +int arcompact_disassembler::handle_dasm_BL_S_s13(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes) +{ + int s = op & 0x07ff; + s = util::sext(s, 11); + + util::stream_format(stream, "BL_S 0x%08x", (pc & 0xfffffffc) + (s * 4)); + return 2; +} + +/************************************************************************************************************************************ +* * +* illegal opcode handlers (disassembly) * +* * +************************************************************************************************************************************/ + +int arcompact_disassembler::handle_dasm_illegal(std::ostream& stream, offs_t pc, uint8_t param1, uint8_t param2, uint16_t op, const data_buffer& opcodes) +{ + util::stream_format(stream, " (%04x)\n", param1, param2, op); + return 2; +} + +int arcompact_disassembler::handle_dasm_illegal(std::ostream& stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint16_t op, const data_buffer& opcodes) +{ + util::stream_format(stream, " (%04x)\n", param1, param2, param3, op); + return 2; +} + +int arcompact_disassembler::handle_dasm_illegal(std::ostream& stream, offs_t pc, uint8_t param1, uint8_t param2, uint8_t param3, uint8_t param4, uint16_t op, const data_buffer& opcodes) +{ + util::stream_format(stream, " (%04x)\n", param1, param2, param3, param4, op); + return 2; +} diff --git a/src/mame/leapfrog/leapster.cpp b/src/mame/leapfrog/leapster.cpp index 3b55379181f..b73e959cd6d 100644 --- a/src/mame/leapfrog/leapster.cpp +++ b/src/mame/leapfrog/leapster.cpp @@ -31,6 +31,13 @@ The Leapster 2 also has USB 1.1 (client only) + full-sized SD slot. + + many magic numbers in the BIOS ROM match the [strings:VALID_FLAGS] table in + https://github.com/tsbiberdorf/MqxSrc/blob/master/tools/tad/mqx.tad + does this mean the System is running on the MQX RTOS? + https://www.synopsys.com/dw/ipdir.php?ds=os_mqx_software + indicates it was available for ARC processors + */ /* Cartridge pinout - for games list see hash/leapster.xml @@ -187,9 +194,12 @@ PCB - LEAPSTER-TV: */ #include "emu.h" + #include "bus/generic/slot.h" #include "bus/generic/carts.h" #include "cpu/arcompact/arcompact.h" + +#include "emupal.h" #include "screen.h" #include "softlist_dev.h" @@ -199,10 +209,11 @@ namespace { class leapster_state : public driver_device { public: - leapster_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + leapster_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), - m_cart(*this, "cartslot") + m_cart(*this, "cartslot"), + m_palette(*this, "palette") { } void leapster(machine_config &config); @@ -216,21 +227,42 @@ private: uint32_t screen_update_leapster(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); - uint32_t leapster_random_r() - { - return machine().rand() | (machine().rand()<<16); // there is a loop checking that this is above a certain value - } - - void leapster_aux004b_w(uint32_t data) - { - printf("leapster_aux004b_w %04x\n", data); - } + INTERRUPT_GEN_MEMBER(testirq); + + uint32_t leapster_1801000_r(); + uint32_t leapster_1801004_r(); + uint32_t leapster_1801008_r(); + uint32_t leapster_180100c_r(); + uint32_t leapster_1801018_r(); + uint32_t leapster_1809004_r(); + uint32_t leapster_1809008_r(); + uint32_t leapster_180b000_r(); + uint32_t leapster_180b004_r(); + uint32_t leapster_180b008_r(); + uint32_t leapster_180d400_r(); + uint32_t leapster_180d514_r(); + uint32_t leapster_180d800_r(); + + void leapster_aux0047_w(uint32_t data); + uint32_t leapster_aux0048_r(); + void leapster_aux0048_w(uint32_t data); + void leapster_aux004b_w(uint32_t data); + + void leapster_aux0010_w(uint32_t data); + uint32_t leapster_aux0011_r(); + void leapster_aux0011_w(uint32_t data); + void leapster_aux001a_w(uint32_t data); + uint32_t leapster_aux001b_r(); void leapster_aux(address_map &map); void leapster_map(address_map &map); - required_device m_maincpu; + uint16_t m_1a_data[0x800]; + int m_1a_pointer; + + required_device m_maincpu; required_device m_cart; + required_device m_palette; memory_region *m_cart_rom = nullptr; }; @@ -239,6 +271,150 @@ private: static INPUT_PORTS_START( leapster ) INPUT_PORTS_END +void leapster_state::leapster_aux0010_w(uint32_t data) +{ +} + +void leapster_state::leapster_aux0011_w(uint32_t data) +{ + // unknown, written with 1a +} + +void leapster_state::leapster_aux001a_w(uint32_t data) +{ + // probably not palette, but it does load 0x1000 words of increasing value on startup, so could be? + m_1a_data[m_1a_pointer & 0x7ff] = data; + + uint8_t r = (data >> 12) & 0x7; + uint8_t g = (data >> 8) & 0xf; + uint8_t b = (data >> 4) & 0xf; + + m_palette->set_pen_color(m_1a_pointer & 0x7ff, rgb_t(pal3bit(r), pal4bit(g), pal4bit(b))); + m_1a_pointer++; +} + +uint32_t leapster_state::leapster_aux0011_r() +{ + // unknown, read when 11/1a are being written + logerror("%s: leapster_aux0011_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_aux001b_r() +{ + // unknown, read when 11/1a are being written + logerror("%s: leapster_aux001b_r\n", machine().describe_context()); + return 0x00000000; +} + +void leapster_state::leapster_aux0047_w(uint32_t data) +{ + logerror("%s: leapster_aux0047_w %08x\n", machine().describe_context(), data); +} + +uint32_t leapster_state::leapster_aux0048_r() +{ + logerror("%s: leapster_aux0048_r\n", machine().describe_context()); + return 0x00000000; +} + +void leapster_state::leapster_aux0048_w(uint32_t data) +{ + logerror("%s: leapster_aux0047_w %08x\n", machine().describe_context(), data); +} + +void leapster_state::leapster_aux004b_w(uint32_t data) +{ + logerror("%s: leapster_aux004b_w %08x\n", machine().describe_context(), data); +} + +uint32_t leapster_state::leapster_1801000_r() +{ + logerror("%s: leapster_1801000_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_1801004_r() +{ + logerror("%s: leapster_1801004_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_1801008_r() +{ + logerror("%s: leapster_1801004_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_180100c_r() +{ + logerror("%s: leapster_180100c_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_1801018_r() +{ + logerror("%s: leapster_1801018_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_1809004_r() +{ + logerror("%s: leapster_1809004_r (return usually checked against 0x00200000)\n", machine().describe_context()); + // does an AND with 0x00200000 and often jumps to dead loops if that fails + return 0x00200000; +} + +uint32_t leapster_state::leapster_1809008_r() +{ + logerror("%s: leapster_1809008_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_180b000_r() +{ + logerror("%s: leapster_180b000_r\n", machine().describe_context()); + return 0x00000000; +} + +uint32_t leapster_state::leapster_180b004_r() +{ + // leapster2 BIOS checks if this is 0 + logerror("%s: leapster_180b004_r\n", machine().describe_context()); + return 0xffffffff; +} + +uint32_t leapster_state::leapster_180b008_r() +{ + // checks bit 1 (using BMSK instruction and AND instruction) + // writes back to same address? + logerror("%s: leapster_180b008_r\n", machine().describe_context()); + return 0x00000001; +} + +uint32_t leapster_state::leapster_180d400_r() +{ + logerror("%s: leapster_180d400_r (return usually checked against 0x0030d400)\n", machine().describe_context()); + // does a BRLO.ND against it + // loops against 0x0030d400 (3,200,000) at 4003A52A for example + return 0x0030d400; +} + +uint32_t leapster_state::leapster_180d514_r() +{ + logerror("%s: leapster_180d514_r (return usually checked against 0x0030d400)\n", machine().describe_context()); + // leapster -bios 0 does a BRNE in a loop comparing with 0x80 + return 0x00000080; +} + +uint32_t leapster_state::leapster_180d800_r() +{ + logerror("%s: leapster_180d800_r (return usually checked against 0x00027100 or 0x00003e80)\n", machine().describe_context()); + // does a BRLO.ND against it + // loops against 0x00027100 (160,000) + // loops against 0x00003e80 (16,000) in other places 4003A56C for example + return 0x00027100; +} uint32_t leapster_state::screen_update_leapster(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { @@ -264,33 +440,80 @@ void leapster_state::machine_start() { m_maincpu->space(AS_PROGRAM).install_rom(0x80000000, 0x807fffff, m_cart_rom->base()); } + + save_item(NAME(m_1a_data)); } void leapster_state::machine_reset() { + m_1a_pointer = 0; + for (int i = 0; i < 0x800; i++) + m_1a_data[i] = 0; } void leapster_state::leapster_map(address_map &map) { - map(0x00000000, 0x007fffff).rom().mirror(0x40000000); // pointers in the BIOS region seem to be to the 40xxxxxx region, either we mirror there or something (real BIOS?) is acutally missing - map(0x0180D800, 0x0180D803).r(FUNC(leapster_state::leapster_random_r)); +// A vector table is copied from 0x00000000 to 0x3c000000, but it is unclear if that is a BIOS mirror +// or if it should be copying a different table. + map(0x00000000, 0x007fffff).mirror(0x40000000).rom().region("maincpu", 0); + //map(0x40000000, 0x407fffff).rom().region("maincpu", 0); + +// map(0x01800000, 0x0180ffff).ram(); + + map(0x01801000, 0x01801003).r(FUNC(leapster_state::leapster_1801000_r)); + map(0x01801004, 0x01801007).r(FUNC(leapster_state::leapster_1801004_r)); + map(0x01801008, 0x0180100b).r(FUNC(leapster_state::leapster_1801008_r)); + map(0x0180100c, 0x0180100f).r(FUNC(leapster_state::leapster_180100c_r)); + map(0x01801018, 0x0180101b).r(FUNC(leapster_state::leapster_1801018_r)); + + map(0x01809004, 0x01809007).r(FUNC(leapster_state::leapster_1809004_r)); + map(0x01809008, 0x0180900b).r(FUNC(leapster_state::leapster_1809008_r)); + + map(0x0180b000, 0x0180b003).r(FUNC(leapster_state::leapster_180b000_r)); + map(0x0180b004, 0x0180b007).r(FUNC(leapster_state::leapster_180b004_r)); + map(0x0180b008, 0x0180b00b).r(FUNC(leapster_state::leapster_180b008_r)); + + map(0x0180d400, 0x0180d403).r(FUNC(leapster_state::leapster_180d400_r)); + + map(0x0180d514, 0x0180d517).r(FUNC(leapster_state::leapster_180d514_r)); + + map(0x0180d800, 0x0180d803).r(FUNC(leapster_state::leapster_180d800_r)); + map(0x03000000, 0x030007ff).ram(); // puts stack here, writes a pointer @ 0x03000000 on startup - map(0x3c000000, 0x3c1fffff).ram(); // really ram, or has our code execution gone wrong? -// map(0x80000000, 0x807fffff).bankr("cartrom"); // game ROM pointers are all to the 80xxxxxx region, so I assume it maps here - installed if a cart is present + map(0x03000800, 0x0300ffff).ram(); // some of the later models need to store stack values here (or code execution has gone wrong?) + map(0x3c000000, 0x3c1fffff).ram(); // vector base gets moved here with new IRQ table, puts task stacks etc. here + map(0x3c200000, 0x3fffffff).ram(); + // map(0x80000000, 0x807fffff).bankr("cartrom"); // game ROM pointers are all to the 80xxxxxx region, so I assume it maps here - installed if a cart is present } + void leapster_state::leapster_aux(address_map &map) { - map(0x00000004b, 0x00000004b).w(FUNC(leapster_state::leapster_aux004b_w)); // this address isn't used by ARC internal stuff afaik, so probably leapster specific + // addresses used here aren't known internal ARC addresses, so are presumed to be Leapster specific + map(0x000000010, 0x000000010).w(FUNC(leapster_state::leapster_aux0010_w)); + map(0x000000011, 0x000000011).rw(FUNC(leapster_state::leapster_aux0011_r), FUNC(leapster_state::leapster_aux0011_w)); + map(0x00000001a, 0x00000001a).w(FUNC(leapster_state::leapster_aux001a_w)); + map(0x00000001b, 0x00000001b).r(FUNC(leapster_state::leapster_aux001b_r)); + + map(0x000000047, 0x000000047).w(FUNC(leapster_state::leapster_aux0047_w)); + map(0x000000048, 0x000000048).rw(FUNC(leapster_state::leapster_aux0048_r), FUNC(leapster_state::leapster_aux0048_w)); + map(0x00000004b, 0x00000004b).w(FUNC(leapster_state::leapster_aux004b_w)); +} + +INTERRUPT_GEN_MEMBER(leapster_state::testirq) +{ + m_maincpu->set_input_line(0, ASSERT_LINE); } void leapster_state::leapster(machine_config &config) { // Basic machine hardware // CPU is ArcTangent-A5 '5.1' (ARCompact core) - ARCA5(config, m_maincpu, 96000000/10); + ARCA5(config, m_maincpu, 96000000); m_maincpu->set_addrmap(AS_PROGRAM, &leapster_state::leapster_map); m_maincpu->set_addrmap(AS_IO, &leapster_state::leapster_aux); + m_maincpu->set_default_vector_base(0x40000000); + m_maincpu->set_vblank_int("screen", FUNC(leapster_state::testirq)); // Video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); @@ -299,6 +522,8 @@ void leapster_state::leapster(machine_config &config) screen.set_visarea(0, 160-1, 0, 160-1); screen.set_screen_update(FUNC(leapster_state::screen_update_leapster)); + PALETTE(config, "palette").set_format(palette_device::xRGB_444, 0x800).set_endianness(ENDIANNESS_BIG); + // Cartridge GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, "leapster_cart", "bin").set_device_load(FUNC(leapster_state::cart_load)); @@ -319,17 +544,20 @@ ROM_START(leapster) ROM_REGION(0x800000, "maincpu", ROMREGION_ERASE00) ROM_SYSTEM_BIOS( 0, "uni15", "Universal v1.5" ) // 152-10346 Leapster BaseROM Universal v1.5 - Sep 04 2003 10:46:47 ROM_LOAD_BIOS( 0, "155-10072-a.bin" , 0x00000, 0x200000, CRC(af05e5a0) SHA1(d4468d060543ba7e44785041093bc98bcd9afa07) ) + + // most (all?) ROMs below seem to be from LMAX devices, or Leapster 2 devices based on the boot logos contained within! + // TODO: properly sort once they boot in the driver ROM_SYSTEM_BIOS( 1, "us21", "USA v2.1" ) // 152-11265 Leapster BaseROM US v2.1 - Apr 13 2005 15:34:57 ROM_LOAD_BIOS( 1, "152-11265_2.1.bin", 0x00000, 0x800000, CRC(9639b3ae) SHA1(002873b782e823c7a8159deed16c78c149f2afab) ) ROM_SYSTEM_BIOS( 2, "uk21", "UK v2.1" ) // 152-11452 Leapster BaseROM UK v2.1 - Aug 30 2005 16:01:46 ROM_LOAD_BIOS( 2, "leapster2_1004.bin", 0x00000, 0x800000, CRC(b466e14d) SHA1(910c234f03e76b7de55b8aa0a0c62fd1daae4910) ) ROM_SYSTEM_BIOS( 3, "ger21", "German v2.1" ) // 152-11435 Leapster BaseROM German v2.1 - Oct 21 2005 18:53:59 - ROM_LOAD_BIOS( 3, "leapster2_1006.bin", 0x00000, 0x800000, CRC(a69ed8ca) SHA1(e6aacba0c39b1465f344c2b07ff1cbd8a395adac) ) + ROM_LOAD_BIOS( 3, "leapster2_1006.bin", 0x00000, 0x800000, BAD_DUMP CRC(a69ed8ca) SHA1(e6aacba0c39b1465f344c2b07ff1cbd8a395adac) ) // BADADDR xxx-xxxxxxxxxxxxxxxxxxx ROM_SYSTEM_BIOS( 4, "sp10", "Spanish v1.0" ) // 152-11546 Leapster Baserom SP v1.0 - Apr 03 2006 06:26:00 ROM_LOAD_BIOS( 4, "leapster2_1008.bin", 0x00000, 0x800000, CRC(b43345e7) SHA1(31c27e79568115bf36e5ef668f528e3005054152) ) ROM_SYSTEM_BIOS( 5, "connb5", "Connected B5" ) // 152-12076 Leapster Connected Baserom B5 - Feb 29 2008 18:11:21 - ROM_LOAD_BIOS( 5, "152-12076_b5.bin", 0x00000, 0x800000, CRC(4d223022) SHA1(bdc10ad70aa7641716e16fbea16bd0ef35f6e85e) ) - ROM_DEFAULT_BIOS( "connb5" ) + ROM_LOAD_BIOS( 5, "152-12076_b5.bin", 0x00000, 0x800000, CRC(4d223022) SHA1(bdc10ad70aa7641716e16fbea16bd0ef35f6e85e) ) // is this a Leapster 2 BIOS or another device called "Leapster Connected"? + ROM_DEFAULT_BIOS( "uni15" ) ROM_END ROM_START(leapstertv) -- cgit v1.2.3