From 7732deb266a957cfc28b44111fb16cc2adeb9321 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 18 Dec 2022 13:14:53 +0100 Subject: m6809: srcclean *.ops files --- src/devices/cpu/m6809/base6x09.ops | 214 ++++---- src/devices/cpu/m6809/hd6309.ops | 984 ++++++++++++++++++------------------- src/devices/cpu/m6809/konami.ops | 432 ++++++++-------- src/devices/cpu/m6809/m6809.ops | 613 +++++++++++------------ 4 files changed, 1142 insertions(+), 1101 deletions(-) diff --git a/src/devices/cpu/m6809/base6x09.ops b/src/devices/cpu/m6809/base6x09.ops index e6ba8c22f10..d7387dc02ea 100644 --- a/src/devices/cpu/m6809/base6x09.ops +++ b/src/devices/cpu/m6809/base6x09.ops @@ -58,10 +58,11 @@ INTERRUPT_VECTOR: NEG8: @m_temp.b.l = read_operand(); m_temp.b.l = set_flags(CC_NZVC, (uint8_t)0, m_temp.b.l, -m_temp.b.l); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; @@ -70,10 +71,11 @@ COM8: m_cc &= ~CC_V; m_cc |= CC_C; m_temp.b.l = set_flags(CC_NZ, (uint8_t) ~m_temp.b.l); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; @@ -82,20 +84,22 @@ LSR8: m_cc &= ~CC_C; m_cc |= (m_temp.b.l & 1) ? CC_C : 0; m_temp.b.l = set_flags(CC_NZ, m_temp.b.l >> 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; ROR8: @m_temp.b.l = read_operand(); m_temp.b.l = set_flags(CC_NZ, rotate_right(m_temp.b.l)); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; @@ -104,64 +108,71 @@ ASR8: m_cc &= ~CC_C; m_cc |= (m_temp.b.l & 1) ? CC_C : 0; m_temp.b.l = set_flags(CC_NZ, ((int8_t) m_temp.b.l) >> 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; ASL8: @m_temp.b.l = read_operand(); m_temp.b.l = set_flags(CC_NZVC, m_temp.b.l, m_temp.b.l, m_temp.b.l << 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; ROL8: @m_temp.b.l = read_operand(); m_temp.b.l = set_flags(CC_NZV, m_temp.b.l, m_temp.b.l, rotate_left(m_temp.b.l)); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; DEC8: @m_temp.b.l = read_operand(); m_temp.b.l = set_flags(CC_NZV, m_temp.b.l, 1, m_temp.b.l - 1); - if(!hd6309_native_mode() || !is_register_addressing_mode()) { + if(!hd6309_native_mode() || !is_register_addressing_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; INC8: @m_temp.b.l = read_operand(); m_temp.b.l = set_flags(CC_NZV, m_temp.b.l, 1, m_temp.b.l + 1); - if(!hd6309_native_mode() || !is_register_addressing_mode()) { + if(!hd6309_native_mode() || !is_register_addressing_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(m_temp.b.l); return; TST8: @m_temp.b.l = read_operand(); set_flags(CC_NZV, m_temp.b.l); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_vma(1); ; - } - if(!is_register_addressing_mode()) { + } + if(!is_register_addressing_mode()) + { @dummy_vma(1); ; - } + } return; JMP: @@ -172,10 +183,11 @@ CLR8: @read_operand(); m_cc &= ~CC_NZVC; m_cc |= CC_Z; - if(!hd6309_native_mode() || !is_register_addressing_mode()) { + if(!hd6309_native_mode() || !is_register_addressing_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(0); return; @@ -183,10 +195,11 @@ NEG16: m_temp.b.h = read_operand(0); m_temp.b.l = read_operand(1); m_temp.w = set_flags(CC_NZVC, (uint16_t)0, m_temp.w, -m_temp.w); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -197,10 +210,11 @@ LSR16: m_cc &= ~CC_C; m_cc |= (m_temp.w & 1) ? CC_C : 0; m_temp.w = set_flags(CC_NZ, m_temp.w >> 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -209,10 +223,11 @@ ROR16: @m_temp.b.h = read_operand(0); @m_temp.b.l = read_operand(1); m_temp.w = set_flags(CC_NZ, rotate_right(m_temp.w)); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -223,10 +238,11 @@ ASR16: m_cc &= ~CC_C; m_cc |= (m_temp.w & 1) ? CC_C : 0; m_temp.w = set_flags(CC_NZ, ((int16_t) m_temp.w) >> 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -235,10 +251,11 @@ ASL16: @m_temp.b.h = read_operand(0); @m_temp.b.l = read_operand(1); m_temp.w = set_flags(CC_NZVC, m_temp.w, m_temp.w, m_temp.w << 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -247,10 +264,11 @@ ROL16: @m_temp.b.h = read_operand(0); @m_temp.b.l = read_operand(1); m_temp.w = set_flags(CC_NZV, rotate_left(m_temp.w)); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } @write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -259,10 +277,11 @@ DEC16: m_temp.b.h = read_operand(0); m_temp.b.l = read_operand(1); m_temp.w = set_flags(CC_NZVC, m_temp.w, 1, m_temp.w - 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -271,10 +290,11 @@ INC16: m_temp.b.h = read_operand(0); m_temp.b.l = read_operand(1); m_temp.w = set_flags(CC_NZVC, m_temp.w, 1, m_temp.w + 1); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } write_operand(0, m_temp.b.h); write_operand(1, m_temp.b.l); return; @@ -283,21 +303,24 @@ TST16: m_temp.b.h = read_operand(0); m_temp.b.l = read_operand(1); set_flags(CC_NZV, m_temp.w); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_vma(1); ; - } - if(!is_register_addressing_mode()) { + } + if(!is_register_addressing_mode()) + { @dummy_vma(1); ; - } + } return; CLR16: - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } m_cc &= ~CC_NZVC; m_cc |= CC_Z; write_operand(0, 0x00); @@ -353,30 +376,33 @@ ADD16: @m_temp.b.h = read_operand(0); @m_temp.b.l = read_operand(1); regop16().w = set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w + m_temp.w); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; SUB16: @m_temp.b.h = read_operand(0); @m_temp.b.l = read_operand(1); regop16().w = set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w - m_temp.w); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; CMP16: @m_temp.b.h = read_operand(0); @m_temp.b.l = read_operand(1); set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w - m_temp.w); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; LD8: @@ -403,10 +429,11 @@ ST16: return; NOP: - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; SYNC: @@ -431,42 +458,47 @@ SYNC: DAA: daa(); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; ORCC: m_cc |= read_operand(); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; ANDCC: m_cc &= read_operand(); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; SEX: m_q.r.d = set_flags(CC_NZ, (int8_t) m_q.r.b); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } return; BRANCH: @m_temp.b.l = read_opcode_arg(); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_vma(1); ; - } + } if (branch_taken()) { m_pc.w += (int8_t) m_temp.b.l; @@ -476,17 +508,19 @@ BRANCH: LBRANCH: @m_temp.b.h = read_opcode_arg(); @m_temp.b.l = read_opcode_arg(); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_vma(1); ; - } + } if (branch_taken()) { m_pc.w += m_temp.w; - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_vma(1); ; - } + } } return; @@ -515,21 +549,23 @@ GOTO_SUBROUTINE: return; RTS: - m_temp.w = 0x80; // RTS is equivalent to "PULS PC" - if(!hd6309_native_mode()) { + m_temp.w = 0x80; // RTS is equivalent to "PULS PC" + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); ; - } + } set_regop16(m_s); goto PULL_REGISTERS; ABX: m_x.w += m_q.r.b; - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_read_opcode_arg(0); @dummy_vma(1); ; - } + } return; MUL: @@ -541,7 +577,7 @@ MUL: RTI: @dummy_read_opcode_arg(0); set_regop16(m_s); - @m_cc = read_memory(regop16().w++); // PULS CC + @m_cc = read_memory(regop16().w++); // PULS CC m_temp.w = ((m_cc & CC_E) ? entire_state_registers() : partial_state_registers()) & ~0x01; goto PULL_REGISTERS; @@ -570,16 +606,16 @@ CWAI: if (m_nmi_asserted) m_nmi_asserted = false; - set_ea(m_ea.w); // need to do this to set the addressing mode + set_ea(m_ea.w); // need to do this to set the addressing mode m_cc |= CC_I | (m_ea.w != VECTOR_IRQ ? CC_F : 0); // invoke standard interrupt callback for MAME core switch (m_ea.w) { - case VECTOR_NMI: standard_irq_callback(INPUT_LINE_NMI); break; - case VECTOR_FIRQ: standard_irq_callback(M6809_FIRQ_LINE); break; - case VECTOR_IRQ: standard_irq_callback(M6809_IRQ_LINE); break; - default: break; + case VECTOR_NMI: standard_irq_callback(INPUT_LINE_NMI); break; + case VECTOR_FIRQ: standard_irq_callback(M6809_FIRQ_LINE); break; + case VECTOR_IRQ: standard_irq_callback(M6809_IRQ_LINE); break; + default: break; } goto INTERRUPT_VECTOR; @@ -600,10 +636,11 @@ PSHS: @m_temp.w = read_opcode_arg(); @dummy_vma(2); set_regop16(m_s); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @(void)read_memory(regop16().w); ; - } + } goto PUSH_REGISTERS; PULS: @@ -616,10 +653,11 @@ PSHU: @m_temp.w = read_opcode_arg(); @dummy_vma(2); set_regop16(m_u); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @(void)read_memory(regop16().w); ; - } + } goto PUSH_REGISTERS; PULU: @@ -664,17 +702,19 @@ SOFTWARE_INTERRUPT: DIRECT: @set_ea(((uint16_t)m_dp << 8) | read_opcode_arg()); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_vma(1); ; - } + } return; EXTENDED: @set_ea_h(read_opcode_arg()); @set_ea_l(read_opcode_arg()); - if(!hd6309_native_mode()) { + if(!hd6309_native_mode()) + { @dummy_vma(1); ; - } + } return; diff --git a/src/devices/cpu/m6809/hd6309.ops b/src/devices/cpu/m6809/hd6309.ops index 39e7ddb405b..531828c1c46 100644 --- a/src/devices/cpu/m6809/hd6309.ops +++ b/src/devices/cpu/m6809/hd6309.ops @@ -4,9 +4,9 @@ MAIN: // check interrupt lines switch(get_pending_interrupt()) { - case VECTOR_NMI: goto NMI; - case VECTOR_FIRQ: goto FIRQ; - case VECTOR_IRQ: goto IRQ; + case VECTOR_NMI: goto NMI; + case VECTOR_FIRQ: goto FIRQ; + case VECTOR_IRQ: goto IRQ; } // debugger hook @@ -19,259 +19,259 @@ MAIN: // dispatch opcode switch(m_opcode) { - case 0x00: %DIRECT; %NEG8; return; - case 0x01: %IMM_IM; %DIRECT; %OIM; return; - case 0x02: %IMM_IM; %DIRECT; %AIM; return; - case 0x03: %DIRECT; %COM8; return; - case 0x04: %DIRECT; %LSR8; return; - case 0x05: %IMM_IM; %DIRECT; %EIM; return; - case 0x06: %DIRECT; %ROR8; return; - case 0x07: %DIRECT; %ASR8; return; - case 0x08: %DIRECT; %ASL8; return; - case 0x09: %DIRECT; %ROL8; return; - case 0x0A: %DIRECT; %DEC8; return; - case 0x0B: %IMM_IM; %DIRECT; %TIM; return; - case 0x0C: %DIRECT; %INC8; return; - case 0x0D: %DIRECT; %TST8; return; - case 0x0E: %DIRECT; %JMP; return; - case 0x0F: %DIRECT; %CLR8; return; - - case 0x10: %DISPATCH10; return; - case 0x11: %DISPATCH11; return; - case 0x12: %NOP; return; - case 0x13: %SYNC; return; - case 0x14: %SEXW; return; - case 0x16: set_cond(true); %LBRANCH; return; - case 0x17: %LBSR; return; - case 0x19: %DAA; return; - case 0x1A: set_imm(); %ORCC; return; - case 0x1C: set_imm(); %ANDCC; return; - case 0x1D: %SEX; return; - case 0x1E: %EXG; return; - case 0x1F: %TFR; return; - - case 0x20: set_cond(true); %BRANCH; return; - case 0x21: set_cond(false); %BRANCH; return; - case 0x22: set_cond(cond_hi()); %BRANCH; return; - case 0x23: set_cond(!cond_hi()); %BRANCH; return; - case 0x24: set_cond(cond_cc()); %BRANCH; return; - case 0x25: set_cond(!cond_cc()); %BRANCH; return; - case 0x26: set_cond(cond_ne()); %BRANCH; return; - case 0x27: set_cond(!cond_ne()); %BRANCH; return; - case 0x28: set_cond(cond_vc()); %BRANCH; return; - case 0x29: set_cond(!cond_vc()); %BRANCH; return; - case 0x2A: set_cond(cond_pl()); %BRANCH; return; - case 0x2B: set_cond(!cond_pl()); %BRANCH; return; - case 0x2C: set_cond(cond_ge()); %BRANCH; return; - case 0x2D: set_cond(!cond_ge()); %BRANCH; return; - case 0x2E: set_cond(cond_gt()); %BRANCH; return; - case 0x2F: set_cond(!cond_gt()); %BRANCH; return; - - case 0x30: set_regop16(m_x); %INDEXED; %LEA_xy; return; - case 0x31: set_regop16(m_y); %INDEXED; %LEA_xy; return; - case 0x32: set_regop16(m_s); %INDEXED; %LEA_us; return; - case 0x33: set_regop16(m_u); %INDEXED; %LEA_us; return; - case 0x34: %PSHS; return; - case 0x35: %PULS; return; - case 0x36: %PSHU; return; - case 0x37: %PULU; return; - case 0x39: %RTS; return; - case 0x3A: %ABX; return; - case 0x3B: %RTI; return; - case 0x3C: %CWAI; return; - case 0x3D: %MUL; return; - case 0x3F: %SWI; return; - - case 0x40: set_a(); %NEG8; return; - case 0x43: set_a(); %COM8; return; - case 0x44: set_a(); %LSR8; return; - case 0x46: set_a(); %ROR8; return; - case 0x47: set_a(); %ASR8; return; - case 0x48: set_a(); %ASL8; return; - case 0x49: set_a(); %ROL8; return; - case 0x4A: set_a(); %DEC8; return; - case 0x4C: set_a(); %INC8; return; - case 0x4D: set_a(); %TST8; return; - case 0x4F: set_a(); %CLR8; return; - - case 0x50: set_b(); %NEG8; return; - case 0x53: set_b(); %COM8; return; - case 0x54: set_b(); %LSR8; return; - case 0x56: set_b(); %ROR8; return; - case 0x57: set_b(); %ASR8; return; - case 0x58: set_b(); %ASL8; return; - case 0x59: set_b(); %ROL8; return; - case 0x5A: set_b(); %DEC8; return; - case 0x5C: set_b(); %INC8; return; - case 0x5D: set_b(); %TST8; return; - case 0x5F: set_b(); %CLR8; return; - - case 0x60: %INDEXED; %NEG8; return; - case 0x61: %IMM_IM; %INDEXED; %OIM; return; - case 0x62: %IMM_IM; %INDEXED; %AIM; return; - case 0x63: %INDEXED; %COM8; return; - case 0x64: %INDEXED; %LSR8; return; - case 0x65: %IMM_IM; %INDEXED; %EIM; return; - case 0x66: %INDEXED; %ROR8; return; - case 0x67: %INDEXED; %ASR8; return; - case 0x68: %INDEXED; %ASL8; return; - case 0x69: %INDEXED; %ROL8; return; - case 0x6A: %INDEXED; %DEC8; return; - case 0x6B: %IMM_IM; %INDEXED; %TIM; return; - case 0x6C: %INDEXED; %INC8; return; - case 0x6D: %INDEXED; %TST8; return; - case 0x6E: %INDEXED; %JMP; return; - case 0x6F: %INDEXED; %CLR8; return; - - case 0x70: %EXTENDED; %NEG8; return; - case 0x71: %IMM_IM; %EXTENDED; %OIM; return; - case 0x72: %IMM_IM; %EXTENDED; %AIM; return; - case 0x73: %EXTENDED; %COM8; return; - case 0x74: %EXTENDED; %LSR8; return; - case 0x75: %IMM_IM; %EXTENDED; %EIM; return; - case 0x76: %EXTENDED; %ROR8; return; - case 0x77: %EXTENDED; %ASR8; return; - case 0x78: %EXTENDED; %ASL8; return; - case 0x79: %EXTENDED; %ROL8; return; - case 0x7A: %EXTENDED; %DEC8; return; - case 0x7B: %IMM_IM; %EXTENDED; %TIM; return; - case 0x7C: %EXTENDED; %INC8; return; - case 0x7D: %EXTENDED; %TST8; return; - case 0x7E: %EXTENDED; %JMP; return; - case 0x7F: %EXTENDED; %CLR8; return; - - case 0x80: set_regop8(m_q.r.a); set_imm(); %SUB8; return; - case 0x81: set_regop8(m_q.r.a); set_imm(); %CMP8; return; - case 0x82: set_regop8(m_q.r.a); set_imm(); %SBC8; return; - case 0x83: set_regop16(m_q.p.d); set_imm(); %SUB16; return; - case 0x84: set_regop8(m_q.r.a); set_imm(); %AND8; return; - case 0x85: set_regop8(m_q.r.a); set_imm(); %BIT8; return; - case 0x86: set_regop8(m_q.r.a); set_imm(); %LD8; return; - case 0x88: set_regop8(m_q.r.a); set_imm(); %EOR8; return; - case 0x89: set_regop8(m_q.r.a); set_imm(); %ADC8; return; - case 0x8A: set_regop8(m_q.r.a); set_imm(); %OR8; return; - case 0x8B: set_regop8(m_q.r.a); set_imm(); %ADD8; return; - case 0x8C: set_regop16(m_x); set_imm(); %CMP16; return; - case 0x8D: %BSR; return; - case 0x8E: set_regop16(m_x); set_imm(); %LD16; return; - - case 0x90: set_regop8(m_q.r.a); %DIRECT; %SUB8; return; - case 0x91: set_regop8(m_q.r.a); %DIRECT; %CMP8; return; - case 0x92: set_regop8(m_q.r.a); %DIRECT; %SBC8; return; - case 0x93: set_regop16(m_q.p.d); %DIRECT; %SUB16; return; - case 0x94: set_regop8(m_q.r.a); %DIRECT; %AND8; return; - case 0x95: set_regop8(m_q.r.a); %DIRECT; %BIT8; return; - case 0x96: set_regop8(m_q.r.a); %DIRECT; %LD8; return; - case 0x97: set_regop8(m_q.r.a); %DIRECT; %ST8; return; - case 0x98: set_regop8(m_q.r.a); %DIRECT; %EOR8; return; - case 0x99: set_regop8(m_q.r.a); %DIRECT; %ADC8; return; - case 0x9A: set_regop8(m_q.r.a); %DIRECT; %OR8; return; - case 0x9B: set_regop8(m_q.r.a); %DIRECT; %ADD8; return; - case 0x9C: set_regop16(m_x); %DIRECT; %CMP16; return; - case 0x9D: %DIRECT; %JSR; return; - case 0x9E: set_regop16(m_x); %DIRECT; %LD16; return; - case 0x9F: set_regop16(m_x); %DIRECT; %ST16; return; - - case 0xA0: set_regop8(m_q.r.a); %INDEXED; %SUB8; return; - case 0xA1: set_regop8(m_q.r.a); %INDEXED; %CMP8; return; - case 0xA2: set_regop8(m_q.r.a); %INDEXED; %SBC8; return; - case 0xA3: set_regop16(m_q.p.d); %INDEXED; %SUB16; return; - case 0xA4: set_regop8(m_q.r.a); %INDEXED; %AND8; return; - case 0xA5: set_regop8(m_q.r.a); %INDEXED; %BIT8; return; - case 0xA6: set_regop8(m_q.r.a); %INDEXED; %LD8; return; - case 0xA7: set_regop8(m_q.r.a); %INDEXED; %ST8; return; - case 0xA8: set_regop8(m_q.r.a); %INDEXED; %EOR8; return; - case 0xA9: set_regop8(m_q.r.a); %INDEXED; %ADC8; return; - case 0xAA: set_regop8(m_q.r.a); %INDEXED; %OR8; return; - case 0xAB: set_regop8(m_q.r.a); %INDEXED; %ADD8; return; - case 0xAC: set_regop16(m_x); %INDEXED; %CMP16; return; - case 0xAD: %INDEXED; %JSR_ind; return; - case 0xAE: set_regop16(m_x); %INDEXED; %LD16; return; - case 0xAF: set_regop16(m_x); %INDEXED; %ST16; return; - - case 0xB0: set_regop8(m_q.r.a); %EXTENDED; %SUB8; return; - case 0xB1: set_regop8(m_q.r.a); %EXTENDED; %CMP8; return; - case 0xB2: set_regop8(m_q.r.a); %EXTENDED; %SBC8; return; - case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %SUB16; return; - case 0xB4: set_regop8(m_q.r.a); %EXTENDED; %AND8; return; - case 0xB5: set_regop8(m_q.r.a); %EXTENDED; %BIT8; return; - case 0xB6: set_regop8(m_q.r.a); %EXTENDED; %LD8; return; - case 0xB7: set_regop8(m_q.r.a); %EXTENDED; %ST8; return; - case 0xB8: set_regop8(m_q.r.a); %EXTENDED; %EOR8; return; - case 0xB9: set_regop8(m_q.r.a); %EXTENDED; %ADC8; return; - case 0xBA: set_regop8(m_q.r.a); %EXTENDED; %OR8; return; - case 0xBB: set_regop8(m_q.r.a); %EXTENDED; %ADD8; return; - case 0xBC: set_regop16(m_x); %EXTENDED; %CMP16; return; - case 0xBD: %EXTENDED; %JSR; return; - case 0xBE: set_regop16(m_x); %EXTENDED; %LD16; return; - case 0xBF: set_regop16(m_x); %EXTENDED; %ST16; return; - - case 0xC0: set_regop8(m_q.r.b); set_imm(); %SUB8; return; - case 0xC1: set_regop8(m_q.r.b); set_imm(); %CMP8; return; - case 0xC2: set_regop8(m_q.r.b); set_imm(); %SBC8; return; - case 0xC3: set_regop16(m_q.p.d); set_imm(); %ADD16; return; - case 0xC4: set_regop8(m_q.r.b); set_imm(); %AND8; return; - case 0xC5: set_regop8(m_q.r.b); set_imm(); %BIT8; return; - case 0xC6: set_regop8(m_q.r.b); set_imm(); %LD8; return; - case 0xC8: set_regop8(m_q.r.b); set_imm(); %EOR8; return; - case 0xC9: set_regop8(m_q.r.b); set_imm(); %ADC8; return; - case 0xCA: set_regop8(m_q.r.b); set_imm(); %OR8; return; - case 0xCB: set_regop8(m_q.r.b); set_imm(); %ADD8; return; - case 0xCC: set_regop16(m_q.p.d); set_imm(); %LD16; return; - case 0xCD: set_imm(); %LDQ; return; - case 0xCE: set_regop16(m_u); set_imm(); %LD16; return; - - case 0xD0: set_regop8(m_q.r.b); %DIRECT; %SUB8; return; - case 0xD1: set_regop8(m_q.r.b); %DIRECT; %CMP8; return; - case 0xD2: set_regop8(m_q.r.b); %DIRECT; %SBC8; return; - case 0xD3: set_regop16(m_q.p.d); %DIRECT; %ADD16; return; - case 0xD4: set_regop8(m_q.r.b); %DIRECT; %AND8; return; - case 0xD5: set_regop8(m_q.r.b); %DIRECT; %BIT8; return; - case 0xD6: set_regop8(m_q.r.b); %DIRECT; %LD8; return; - case 0xD7: set_regop8(m_q.r.b); %DIRECT; %ST8; return; - case 0xD8: set_regop8(m_q.r.b); %DIRECT; %EOR8; return; - case 0xD9: set_regop8(m_q.r.b); %DIRECT; %ADC8; return; - case 0xDA: set_regop8(m_q.r.b); %DIRECT; %OR8; return; - case 0xDB: set_regop8(m_q.r.b); %DIRECT; %ADD8; return; - case 0xDC: set_regop16(m_q.p.d); %DIRECT; %LD16; return; - case 0xDD: set_regop16(m_q.p.d); %DIRECT; %ST16; return; - case 0xDE: set_regop16(m_u); %DIRECT; %LD16; return; - case 0xDF: set_regop16(m_u); %DIRECT; %ST16; return; - - case 0xE0: set_regop8(m_q.r.b); %INDEXED; %SUB8; return; - case 0xE1: set_regop8(m_q.r.b); %INDEXED; %CMP8; return; - case 0xE2: set_regop8(m_q.r.b); %INDEXED; %SBC8; return; - case 0xE3: set_regop16(m_q.p.d); %INDEXED; %ADD16; return; - case 0xE4: set_regop8(m_q.r.b); %INDEXED; %AND8; return; - case 0xE5: set_regop8(m_q.r.b); %INDEXED; %BIT8; return; - case 0xE6: set_regop8(m_q.r.b); %INDEXED; %LD8; return; - case 0xE7: set_regop8(m_q.r.b); %INDEXED; %ST8; return; - case 0xE8: set_regop8(m_q.r.b); %INDEXED; %EOR8; return; - case 0xE9: set_regop8(m_q.r.b); %INDEXED; %ADC8; return; - case 0xEA: set_regop8(m_q.r.b); %INDEXED; %OR8; return; - case 0xEB: set_regop8(m_q.r.b); %INDEXED; %ADD8; return; - case 0xEC: set_regop16(m_q.p.d); %INDEXED; %LD16; return; - case 0xED: set_regop16(m_q.p.d); %INDEXED; %ST16; return; - case 0xEE: set_regop16(m_u); %INDEXED; %LD16; return; - case 0xEF: set_regop16(m_u); %INDEXED; %ST16; return; - - case 0xF0: set_regop8(m_q.r.b); %EXTENDED; %SUB8; return; - case 0xF1: set_regop8(m_q.r.b); %EXTENDED; %CMP8; return; - case 0xF2: set_regop8(m_q.r.b); %EXTENDED; %SBC8; return; - case 0xF3: set_regop16(m_q.p.d); %EXTENDED; %ADD16; return; - case 0xF4: set_regop8(m_q.r.b); %EXTENDED; %AND8; return; - case 0xF5: set_regop8(m_q.r.b); %EXTENDED; %BIT8; return; - case 0xF6: set_regop8(m_q.r.b); %EXTENDED; %LD8; return; - case 0xF7: set_regop8(m_q.r.b); %EXTENDED; %ST8; return; - case 0xF8: set_regop8(m_q.r.b); %EXTENDED; %EOR8; return; - case 0xF9: set_regop8(m_q.r.b); %EXTENDED; %ADC8; return; - case 0xFA: set_regop8(m_q.r.b); %EXTENDED; %OR8; return; - case 0xFB: set_regop8(m_q.r.b); %EXTENDED; %ADD8; return; - case 0xFC: set_regop16(m_q.p.d); %EXTENDED; %LD16; return; - case 0xFD: set_regop16(m_q.p.d); %EXTENDED; %ST16; return; - case 0xFE: set_regop16(m_u); %EXTENDED; %LD16; return; - case 0xFF: set_regop16(m_u); %EXTENDED; %ST16; return; - default: %ILLEGAL; return; + case 0x00: %DIRECT; %NEG8; return; + case 0x01: %IMM_IM; %DIRECT; %OIM; return; + case 0x02: %IMM_IM; %DIRECT; %AIM; return; + case 0x03: %DIRECT; %COM8; return; + case 0x04: %DIRECT; %LSR8; return; + case 0x05: %IMM_IM; %DIRECT; %EIM; return; + case 0x06: %DIRECT; %ROR8; return; + case 0x07: %DIRECT; %ASR8; return; + case 0x08: %DIRECT; %ASL8; return; + case 0x09: %DIRECT; %ROL8; return; + case 0x0A: %DIRECT; %DEC8; return; + case 0x0B: %IMM_IM; %DIRECT; %TIM; return; + case 0x0C: %DIRECT; %INC8; return; + case 0x0D: %DIRECT; %TST8; return; + case 0x0E: %DIRECT; %JMP; return; + case 0x0F: %DIRECT; %CLR8; return; + + case 0x10: %DISPATCH10; return; + case 0x11: %DISPATCH11; return; + case 0x12: %NOP; return; + case 0x13: %SYNC; return; + case 0x14: %SEXW; return; + case 0x16: set_cond(true); %LBRANCH; return; + case 0x17: %LBSR; return; + case 0x19: %DAA; return; + case 0x1A: set_imm(); %ORCC; return; + case 0x1C: set_imm(); %ANDCC; return; + case 0x1D: %SEX; return; + case 0x1E: %EXG; return; + case 0x1F: %TFR; return; + + case 0x20: set_cond(true); %BRANCH; return; + case 0x21: set_cond(false); %BRANCH; return; + case 0x22: set_cond(cond_hi()); %BRANCH; return; + case 0x23: set_cond(!cond_hi()); %BRANCH; return; + case 0x24: set_cond(cond_cc()); %BRANCH; return; + case 0x25: set_cond(!cond_cc()); %BRANCH; return; + case 0x26: set_cond(cond_ne()); %BRANCH; return; + case 0x27: set_cond(!cond_ne()); %BRANCH; return; + case 0x28: set_cond(cond_vc()); %BRANCH; return; + case 0x29: set_cond(!cond_vc()); %BRANCH; return; + case 0x2A: set_cond(cond_pl()); %BRANCH; return; + case 0x2B: set_cond(!cond_pl()); %BRANCH; return; + case 0x2C: set_cond(cond_ge()); %BRANCH; return; + case 0x2D: set_cond(!cond_ge()); %BRANCH; return; + case 0x2E: set_cond(cond_gt()); %BRANCH; return; + case 0x2F: set_cond(!cond_gt()); %BRANCH; return; + + case 0x30: set_regop16(m_x); %INDEXED; %LEA_xy; return; + case 0x31: set_regop16(m_y); %INDEXED; %LEA_xy; return; + case 0x32: set_regop16(m_s); %INDEXED; %LEA_us; return; + case 0x33: set_regop16(m_u); %INDEXED; %LEA_us; return; + case 0x34: %PSHS; return; + case 0x35: %PULS; return; + case 0x36: %PSHU; return; + case 0x37: %PULU; return; + case 0x39: %RTS; return; + case 0x3A: %ABX; return; + case 0x3B: %RTI; return; + case 0x3C: %CWAI; return; + case 0x3D: %MUL; return; + case 0x3F: %SWI; return; + + case 0x40: set_a(); %NEG8; return; + case 0x43: set_a(); %COM8; return; + case 0x44: set_a(); %LSR8; return; + case 0x46: set_a(); %ROR8; return; + case 0x47: set_a(); %ASR8; return; + case 0x48: set_a(); %ASL8; return; + case 0x49: set_a(); %ROL8; return; + case 0x4A: set_a(); %DEC8; return; + case 0x4C: set_a(); %INC8; return; + case 0x4D: set_a(); %TST8; return; + case 0x4F: set_a(); %CLR8; return; + + case 0x50: set_b(); %NEG8; return; + case 0x53: set_b(); %COM8; return; + case 0x54: set_b(); %LSR8; return; + case 0x56: set_b(); %ROR8; return; + case 0x57: set_b(); %ASR8; return; + case 0x58: set_b(); %ASL8; return; + case 0x59: set_b(); %ROL8; return; + case 0x5A: set_b(); %DEC8; return; + case 0x5C: set_b(); %INC8; return; + case 0x5D: set_b(); %TST8; return; + case 0x5F: set_b(); %CLR8; return; + + case 0x60: %INDEXED; %NEG8; return; + case 0x61: %IMM_IM; %INDEXED; %OIM; return; + case 0x62: %IMM_IM; %INDEXED; %AIM; return; + case 0x63: %INDEXED; %COM8; return; + case 0x64: %INDEXED; %LSR8; return; + case 0x65: %IMM_IM; %INDEXED; %EIM; return; + case 0x66: %INDEXED; %ROR8; return; + case 0x67: %INDEXED; %ASR8; return; + case 0x68: %INDEXED; %ASL8; return; + case 0x69: %INDEXED; %ROL8; return; + case 0x6A: %INDEXED; %DEC8; return; + case 0x6B: %IMM_IM; %INDEXED; %TIM; return; + case 0x6C: %INDEXED; %INC8; return; + case 0x6D: %INDEXED; %TST8; return; + case 0x6E: %INDEXED; %JMP; return; + case 0x6F: %INDEXED; %CLR8; return; + + case 0x70: %EXTENDED; %NEG8; return; + case 0x71: %IMM_IM; %EXTENDED; %OIM; return; + case 0x72: %IMM_IM; %EXTENDED; %AIM; return; + case 0x73: %EXTENDED; %COM8; return; + case 0x74: %EXTENDED; %LSR8; return; + case 0x75: %IMM_IM; %EXTENDED; %EIM; return; + case 0x76: %EXTENDED; %ROR8; return; + case 0x77: %EXTENDED; %ASR8; return; + case 0x78: %EXTENDED; %ASL8; return; + case 0x79: %EXTENDED; %ROL8; return; + case 0x7A: %EXTENDED; %DEC8; return; + case 0x7B: %IMM_IM; %EXTENDED; %TIM; return; + case 0x7C: %EXTENDED; %INC8; return; + case 0x7D: %EXTENDED; %TST8; return; + case 0x7E: %EXTENDED; %JMP; return; + case 0x7F: %EXTENDED; %CLR8; return; + + case 0x80: set_regop8(m_q.r.a); set_imm(); %SUB8; return; + case 0x81: set_regop8(m_q.r.a); set_imm(); %CMP8; return; + case 0x82: set_regop8(m_q.r.a); set_imm(); %SBC8; return; + case 0x83: set_regop16(m_q.p.d); set_imm(); %SUB16; return; + case 0x84: set_regop8(m_q.r.a); set_imm(); %AND8; return; + case 0x85: set_regop8(m_q.r.a); set_imm(); %BIT8; return; + case 0x86: set_regop8(m_q.r.a); set_imm(); %LD8; return; + case 0x88: set_regop8(m_q.r.a); set_imm(); %EOR8; return; + case 0x89: set_regop8(m_q.r.a); set_imm(); %ADC8; return; + case 0x8A: set_regop8(m_q.r.a); set_imm(); %OR8; return; + case 0x8B: set_regop8(m_q.r.a); set_imm(); %ADD8; return; + case 0x8C: set_regop16(m_x); set_imm(); %CMP16; return; + case 0x8D: %BSR; return; + case 0x8E: set_regop16(m_x); set_imm(); %LD16; return; + + case 0x90: set_regop8(m_q.r.a); %DIRECT; %SUB8; return; + case 0x91: set_regop8(m_q.r.a); %DIRECT; %CMP8; return; + case 0x92: set_regop8(m_q.r.a); %DIRECT; %SBC8; return; + case 0x93: set_regop16(m_q.p.d); %DIRECT; %SUB16; return; + case 0x94: set_regop8(m_q.r.a); %DIRECT; %AND8; return; + case 0x95: set_regop8(m_q.r.a); %DIRECT; %BIT8; return; + case 0x96: set_regop8(m_q.r.a); %DIRECT; %LD8; return; + case 0x97: set_regop8(m_q.r.a); %DIRECT; %ST8; return; + case 0x98: set_regop8(m_q.r.a); %DIRECT; %EOR8; return; + case 0x99: set_regop8(m_q.r.a); %DIRECT; %ADC8; return; + case 0x9A: set_regop8(m_q.r.a); %DIRECT; %OR8; return; + case 0x9B: set_regop8(m_q.r.a); %DIRECT; %ADD8; return; + case 0x9C: set_regop16(m_x); %DIRECT; %CMP16; return; + case 0x9D: %DIRECT; %JSR; return; + case 0x9E: set_regop16(m_x); %DIRECT; %LD16; return; + case 0x9F: set_regop16(m_x); %DIRECT; %ST16; return; + + case 0xA0: set_regop8(m_q.r.a); %INDEXED; %SUB8; return; + case 0xA1: set_regop8(m_q.r.a); %INDEXED; %CMP8; return; + case 0xA2: set_regop8(m_q.r.a); %INDEXED; %SBC8; return; + case 0xA3: set_regop16(m_q.p.d); %INDEXED; %SUB16; return; + case 0xA4: set_regop8(m_q.r.a); %INDEXED; %AND8; return; + case 0xA5: set_regop8(m_q.r.a); %INDEXED; %BIT8; return; + case 0xA6: set_regop8(m_q.r.a); %INDEXED; %LD8; return; + case 0xA7: set_regop8(m_q.r.a); %INDEXED; %ST8; return; + case 0xA8: set_regop8(m_q.r.a); %INDEXED; %EOR8; return; + case 0xA9: set_regop8(m_q.r.a); %INDEXED; %ADC8; return; + case 0xAA: set_regop8(m_q.r.a); %INDEXED; %OR8; return; + case 0xAB: set_regop8(m_q.r.a); %INDEXED; %ADD8; return; + case 0xAC: set_regop16(m_x); %INDEXED; %CMP16; return; + case 0xAD: %INDEXED; %JSR_ind; return; + case 0xAE: set_regop16(m_x); %INDEXED; %LD16; return; + case 0xAF: set_regop16(m_x); %INDEXED; %ST16; return; + + case 0xB0: set_regop8(m_q.r.a); %EXTENDED; %SUB8; return; + case 0xB1: set_regop8(m_q.r.a); %EXTENDED; %CMP8; return; + case 0xB2: set_regop8(m_q.r.a); %EXTENDED; %SBC8; return; + case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %SUB16; return; + case 0xB4: set_regop8(m_q.r.a); %EXTENDED; %AND8; return; + case 0xB5: set_regop8(m_q.r.a); %EXTENDED; %BIT8; return; + case 0xB6: set_regop8(m_q.r.a); %EXTENDED; %LD8; return; + case 0xB7: set_regop8(m_q.r.a); %EXTENDED; %ST8; return; + case 0xB8: set_regop8(m_q.r.a); %EXTENDED; %EOR8; return; + case 0xB9: set_regop8(m_q.r.a); %EXTENDED; %ADC8; return; + case 0xBA: set_regop8(m_q.r.a); %EXTENDED; %OR8; return; + case 0xBB: set_regop8(m_q.r.a); %EXTENDED; %ADD8; return; + case 0xBC: set_regop16(m_x); %EXTENDED; %CMP16; return; + case 0xBD: %EXTENDED; %JSR; return; + case 0xBE: set_regop16(m_x); %EXTENDED; %LD16; return; + case 0xBF: set_regop16(m_x); %EXTENDED; %ST16; return; + + case 0xC0: set_regop8(m_q.r.b); set_imm(); %SUB8; return; + case 0xC1: set_regop8(m_q.r.b); set_imm(); %CMP8; return; + case 0xC2: set_regop8(m_q.r.b); set_imm(); %SBC8; return; + case 0xC3: set_regop16(m_q.p.d); set_imm(); %ADD16; return; + case 0xC4: set_regop8(m_q.r.b); set_imm(); %AND8; return; + case 0xC5: set_regop8(m_q.r.b); set_imm(); %BIT8; return; + case 0xC6: set_regop8(m_q.r.b); set_imm(); %LD8; return; + case 0xC8: set_regop8(m_q.r.b); set_imm(); %EOR8; return; + case 0xC9: set_regop8(m_q.r.b); set_imm(); %ADC8; return; + case 0xCA: set_regop8(m_q.r.b); set_imm(); %OR8; return; + case 0xCB: set_regop8(m_q.r.b); set_imm(); %ADD8; return; + case 0xCC: set_regop16(m_q.p.d); set_imm(); %LD16; return; + case 0xCD: set_imm(); %LDQ; return; + case 0xCE: set_regop16(m_u); set_imm(); %LD16; return; + + case 0xD0: set_regop8(m_q.r.b); %DIRECT; %SUB8; return; + case 0xD1: set_regop8(m_q.r.b); %DIRECT; %CMP8; return; + case 0xD2: set_regop8(m_q.r.b); %DIRECT; %SBC8; return; + case 0xD3: set_regop16(m_q.p.d); %DIRECT; %ADD16; return; + case 0xD4: set_regop8(m_q.r.b); %DIRECT; %AND8; return; + case 0xD5: set_regop8(m_q.r.b); %DIRECT; %BIT8; return; + case 0xD6: set_regop8(m_q.r.b); %DIRECT; %LD8; return; + case 0xD7: set_regop8(m_q.r.b); %DIRECT; %ST8; return; + case 0xD8: set_regop8(m_q.r.b); %DIRECT; %EOR8; return; + case 0xD9: set_regop8(m_q.r.b); %DIRECT; %ADC8; return; + case 0xDA: set_regop8(m_q.r.b); %DIRECT; %OR8; return; + case 0xDB: set_regop8(m_q.r.b); %DIRECT; %ADD8; return; + case 0xDC: set_regop16(m_q.p.d); %DIRECT; %LD16; return; + case 0xDD: set_regop16(m_q.p.d); %DIRECT; %ST16; return; + case 0xDE: set_regop16(m_u); %DIRECT; %LD16; return; + case 0xDF: set_regop16(m_u); %DIRECT; %ST16; return; + + case 0xE0: set_regop8(m_q.r.b); %INDEXED; %SUB8; return; + case 0xE1: set_regop8(m_q.r.b); %INDEXED; %CMP8; return; + case 0xE2: set_regop8(m_q.r.b); %INDEXED; %SBC8; return; + case 0xE3: set_regop16(m_q.p.d); %INDEXED; %ADD16; return; + case 0xE4: set_regop8(m_q.r.b); %INDEXED; %AND8; return; + case 0xE5: set_regop8(m_q.r.b); %INDEXED; %BIT8; return; + case 0xE6: set_regop8(m_q.r.b); %INDEXED; %LD8; return; + case 0xE7: set_regop8(m_q.r.b); %INDEXED; %ST8; return; + case 0xE8: set_regop8(m_q.r.b); %INDEXED; %EOR8; return; + case 0xE9: set_regop8(m_q.r.b); %INDEXED; %ADC8; return; + case 0xEA: set_regop8(m_q.r.b); %INDEXED; %OR8; return; + case 0xEB: set_regop8(m_q.r.b); %INDEXED; %ADD8; return; + case 0xEC: set_regop16(m_q.p.d); %INDEXED; %LD16; return; + case 0xED: set_regop16(m_q.p.d); %INDEXED; %ST16; return; + case 0xEE: set_regop16(m_u); %INDEXED; %LD16; return; + case 0xEF: set_regop16(m_u); %INDEXED; %ST16; return; + + case 0xF0: set_regop8(m_q.r.b); %EXTENDED; %SUB8; return; + case 0xF1: set_regop8(m_q.r.b); %EXTENDED; %CMP8; return; + case 0xF2: set_regop8(m_q.r.b); %EXTENDED; %SBC8; return; + case 0xF3: set_regop16(m_q.p.d); %EXTENDED; %ADD16; return; + case 0xF4: set_regop8(m_q.r.b); %EXTENDED; %AND8; return; + case 0xF5: set_regop8(m_q.r.b); %EXTENDED; %BIT8; return; + case 0xF6: set_regop8(m_q.r.b); %EXTENDED; %LD8; return; + case 0xF7: set_regop8(m_q.r.b); %EXTENDED; %ST8; return; + case 0xF8: set_regop8(m_q.r.b); %EXTENDED; %EOR8; return; + case 0xF9: set_regop8(m_q.r.b); %EXTENDED; %ADC8; return; + case 0xFA: set_regop8(m_q.r.b); %EXTENDED; %OR8; return; + case 0xFB: set_regop8(m_q.r.b); %EXTENDED; %ADD8; return; + case 0xFC: set_regop16(m_q.p.d); %EXTENDED; %LD16; return; + case 0xFD: set_regop16(m_q.p.d); %EXTENDED; %ST16; return; + case 0xFE: set_regop16(m_u); %EXTENDED; %LD16; return; + case 0xFF: set_regop16(m_u); %EXTENDED; %ST16; return; + default: %ILLEGAL; return; } return; @@ -279,137 +279,137 @@ DISPATCH10: @m_opcode = read_opcode(); switch(m_opcode) { - case 0x21: set_cond(false); %LBRANCH; return; - case 0x22: set_cond(cond_hi()); %LBRANCH; return; - case 0x23: set_cond(!cond_hi()); %LBRANCH; return; - case 0x24: set_cond(cond_cc()); %LBRANCH; return; - case 0x25: set_cond(!cond_cc()); %LBRANCH; return; - case 0x26: set_cond(cond_ne()); %LBRANCH; return; - case 0x27: set_cond(!cond_ne()); %LBRANCH; return; - case 0x28: set_cond(cond_vc()); %LBRANCH; return; - case 0x29: set_cond(!cond_vc()); %LBRANCH; return; - case 0x2A: set_cond(cond_pl()); %LBRANCH; return; - case 0x2B: set_cond(!cond_pl()); %LBRANCH; return; - case 0x2C: set_cond(cond_ge()); %LBRANCH; return; - case 0x2D: set_cond(!cond_ge()); %LBRANCH; return; - case 0x2E: set_cond(cond_gt()); %LBRANCH; return; - case 0x2F: set_cond(!cond_gt()); %LBRANCH; return; - - case 0x30: register_register_op(); %ADD*; return; - case 0x31: register_register_op(); %ADC*; return; - case 0x32: register_register_op(); %SUB*; return; - case 0x33: register_register_op(); %SBC*; return; - case 0x34: register_register_op(); %AND*; return; - case 0x35: register_register_op(); %OR*; return; - case 0x36: register_register_op(); %EOR*; return; - case 0x37: register_register_op(); %CMP*; return; - case 0x38: %PSHSW; return; - case 0x39: %PULSW; return; - case 0x3A: %PSHUW; return; - case 0x3B: %PULUW; return; - case 0x3F: %SWI2; return; - - case 0x40: set_d(); %NEG16; return; - case 0x43: set_d(); %COM16; return; - case 0x44: set_d(); %LSR16; return; - case 0x46: set_d(); %ROR16; return; - case 0x47: set_d(); %ASR16; return; - case 0x48: set_d(); %ASL16; return; - case 0x49: set_d(); %ROL16; return; - case 0x4A: set_d(); %DEC16; return; - case 0x4C: set_d(); %INC16; return; - case 0x4D: set_d(); %TST16; return; - case 0x4F: set_d(); %CLR16; return; - - case 0x50: set_w(); %NEG16; return; - case 0x53: set_w(); %COM16; return; - case 0x54: set_w(); %LSR16; return; - case 0x56: set_w(); %ROR16; return; - case 0x57: set_w(); %ASR16; return; - case 0x58: set_w(); %ASL16; return; - case 0x59: set_w(); %ROL16; return; - case 0x5A: set_w(); %DEC16; return; - case 0x5C: set_w(); %INC16; return; - case 0x5D: set_w(); %TST16; return; - case 0x5F: set_w(); %CLR16; return; - - case 0x80: set_regop16(m_q.p.w); set_imm(); %SUB16; return; - case 0x81: set_regop16(m_q.p.w); set_imm(); %CMP16; return; - case 0x82: set_regop16(m_q.p.d); set_imm(); %SBC16; return; - case 0x83: set_regop16(m_q.p.d); set_imm(); %CMP16; return; - case 0x84: set_regop16(m_q.p.d); set_imm(); %AND16; return; - case 0x85: set_regop16(m_q.p.d); set_imm(); %BIT16; return; - case 0x86: set_regop16(m_q.p.w); set_imm(); %LD16; return; - case 0x88: set_regop16(m_q.p.d); set_imm(); %EOR16; return; - case 0x89: set_regop16(m_q.p.d); set_imm(); %ADC16; return; - case 0x8A: set_regop16(m_q.p.d); set_imm(); %OR16; return; - case 0x8B: set_regop16(m_q.p.w); set_imm(); %ADD16; return; - case 0x8C: set_regop16(m_y); set_imm(); %CMP16; return; - case 0x8E: set_regop16(m_y); set_imm(); %LD16; return; - - case 0x90: set_regop16(m_q.p.w); %DIRECT; %SUB16; return; - case 0x91: set_regop16(m_q.p.w); %DIRECT; %CMP16; return; - case 0x92: set_regop16(m_q.p.d); %DIRECT; %SBC16; return; - case 0x93: set_regop16(m_q.p.d); %DIRECT; %CMP16; return; - case 0x94: set_regop16(m_q.p.d); %DIRECT; %AND16; return; - case 0x95: set_regop16(m_q.p.d); %DIRECT; %BIT16; return; - case 0x96: set_regop16(m_q.p.w); %DIRECT; %LD16; return; - case 0x97: set_regop16(m_q.p.w); %DIRECT; %ST16; return; - case 0x98: set_regop16(m_q.p.d); %DIRECT; %EOR16; return; - case 0x99: set_regop16(m_q.p.d); %DIRECT; %ADC16; return; - case 0x9A: set_regop16(m_q.p.d); %DIRECT; %OR16; return; - case 0x9B: set_regop16(m_q.p.w); %DIRECT; %ADD16; return; - case 0x9C: set_regop16(m_y); %DIRECT; %CMP16; return; - case 0x9E: set_regop16(m_y); %DIRECT; %LD16; return; - case 0x9F: set_regop16(m_y); %DIRECT; %ST16; return; - - case 0xA0: set_regop16(m_q.p.w); %INDEXED; %SUB16; return; - case 0xA1: set_regop16(m_q.p.w); %INDEXED; %CMP16; return; - case 0xA2: set_regop16(m_q.p.d); %INDEXED; %SBC16; return; - case 0xA3: set_regop16(m_q.p.d); %INDEXED; %CMP16; return; - case 0xA4: set_regop16(m_q.p.d); %INDEXED; %AND16; return; - case 0xA5: set_regop16(m_q.p.d); %INDEXED; %BIT16; return; - case 0xA6: set_regop16(m_q.p.w); %INDEXED; %LD16; return; - case 0xA7: set_regop16(m_q.p.w); %INDEXED; %ST16; return; - case 0xA8: set_regop16(m_q.p.d); %INDEXED; %EOR16; return; - case 0xA9: set_regop16(m_q.p.d); %INDEXED; %ADC16; return; - case 0xAA: set_regop16(m_q.p.d); %INDEXED; %OR16; return; - case 0xAB: set_regop16(m_q.p.w); %INDEXED; %ADD16; return; - case 0xAC: set_regop16(m_y); %INDEXED; %CMP16; return; - case 0xAE: set_regop16(m_y); %INDEXED; %LD16; return; - case 0xAF: set_regop16(m_y); %INDEXED; %ST16; return; - - case 0xB0: set_regop16(m_q.p.w); %EXTENDED; %SUB16; return; - case 0xB1: set_regop16(m_q.p.w); %EXTENDED; %CMP16; return; - case 0xB2: set_regop16(m_q.p.d); %EXTENDED; %SBC16; return; - case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %CMP16; return; - case 0xB4: set_regop16(m_q.p.d); %EXTENDED; %AND16; return; - case 0xB5: set_regop16(m_q.p.d); %EXTENDED; %BIT16; return; - case 0xB6: set_regop16(m_q.p.w); %EXTENDED; %LD16; return; - case 0xB7: set_regop16(m_q.p.w); %EXTENDED; %ST16; return; - case 0xB8: set_regop16(m_q.p.d); %EXTENDED; %EOR16; return; - case 0xB9: set_regop16(m_q.p.d); %EXTENDED; %ADC16; return; - case 0xBA: set_regop16(m_q.p.d); %EXTENDED; %OR16; return; - case 0xBB: set_regop16(m_q.p.w); %EXTENDED; %ADD16; return; - case 0xBC: set_regop16(m_y); %EXTENDED; %CMP16; return; - case 0xBE: set_regop16(m_y); %EXTENDED; %LD16; return; - case 0xBF: set_regop16(m_y); %EXTENDED; %ST16; return; - - case 0xCE: set_regop16(m_s); set_imm(); %LD16; return; - case 0xDC: %DIRECT; %LDQ; return; - case 0xDD: %DIRECT; %STQ; return; - case 0xDE: set_regop16(m_s); %DIRECT; %LD16; return; - case 0xDF: set_regop16(m_s); %DIRECT; %ST16; return; - case 0xEC: %INDEXED; %LDQ; return; - case 0xED: %INDEXED; %STQ; return; - case 0xEE: set_regop16(m_s); %INDEXED; %LD16; return; - case 0xEF: set_regop16(m_s); %INDEXED; %ST16; return; - case 0xFC: %EXTENDED; %LDQ; return; - case 0xFD: %EXTENDED; %STQ; return; - case 0xFE: set_regop16(m_s); %EXTENDED; %LD16; return; - case 0xFF: set_regop16(m_s); %EXTENDED; %ST16; return; - - default: %ILLEGAL; return; + case 0x21: set_cond(false); %LBRANCH; return; + case 0x22: set_cond(cond_hi()); %LBRANCH; return; + case 0x23: set_cond(!cond_hi()); %LBRANCH; return; + case 0x24: set_cond(cond_cc()); %LBRANCH; return; + case 0x25: set_cond(!cond_cc()); %LBRANCH; return; + case 0x26: set_cond(cond_ne()); %LBRANCH; return; + case 0x27: set_cond(!cond_ne()); %LBRANCH; return; + case 0x28: set_cond(cond_vc()); %LBRANCH; return; + case 0x29: set_cond(!cond_vc()); %LBRANCH; return; + case 0x2A: set_cond(cond_pl()); %LBRANCH; return; + case 0x2B: set_cond(!cond_pl()); %LBRANCH; return; + case 0x2C: set_cond(cond_ge()); %LBRANCH; return; + case 0x2D: set_cond(!cond_ge()); %LBRANCH; return; + case 0x2E: set_cond(cond_gt()); %LBRANCH; return; + case 0x2F: set_cond(!cond_gt()); %LBRANCH; return; + + case 0x30: register_register_op(); %ADD*; return; + case 0x31: register_register_op(); %ADC*; return; + case 0x32: register_register_op(); %SUB*; return; + case 0x33: register_register_op(); %SBC*; return; + case 0x34: register_register_op(); %AND*; return; + case 0x35: register_register_op(); %OR*; return; + case 0x36: register_register_op(); %EOR*; return; + case 0x37: register_register_op(); %CMP*; return; + case 0x38: %PSHSW; return; + case 0x39: %PULSW; return; + case 0x3A: %PSHUW; return; + case 0x3B: %PULUW; return; + case 0x3F: %SWI2; return; + + case 0x40: set_d(); %NEG16; return; + case 0x43: set_d(); %COM16; return; + case 0x44: set_d(); %LSR16; return; + case 0x46: set_d(); %ROR16; return; + case 0x47: set_d(); %ASR16; return; + case 0x48: set_d(); %ASL16; return; + case 0x49: set_d(); %ROL16; return; + case 0x4A: set_d(); %DEC16; return; + case 0x4C: set_d(); %INC16; return; + case 0x4D: set_d(); %TST16; return; + case 0x4F: set_d(); %CLR16; return; + + case 0x50: set_w(); %NEG16; return; + case 0x53: set_w(); %COM16; return; + case 0x54: set_w(); %LSR16; return; + case 0x56: set_w(); %ROR16; return; + case 0x57: set_w(); %ASR16; return; + case 0x58: set_w(); %ASL16; return; + case 0x59: set_w(); %ROL16; return; + case 0x5A: set_w(); %DEC16; return; + case 0x5C: set_w(); %INC16; return; + case 0x5D: set_w(); %TST16; return; + case 0x5F: set_w(); %CLR16; return; + + case 0x80: set_regop16(m_q.p.w); set_imm(); %SUB16; return; + case 0x81: set_regop16(m_q.p.w); set_imm(); %CMP16; return; + case 0x82: set_regop16(m_q.p.d); set_imm(); %SBC16; return; + case 0x83: set_regop16(m_q.p.d); set_imm(); %CMP16; return; + case 0x84: set_regop16(m_q.p.d); set_imm(); %AND16; return; + case 0x85: set_regop16(m_q.p.d); set_imm(); %BIT16; return; + case 0x86: set_regop16(m_q.p.w); set_imm(); %LD16; return; + case 0x88: set_regop16(m_q.p.d); set_imm(); %EOR16; return; + case 0x89: set_regop16(m_q.p.d); set_imm(); %ADC16; return; + case 0x8A: set_regop16(m_q.p.d); set_imm(); %OR16; return; + case 0x8B: set_regop16(m_q.p.w); set_imm(); %ADD16; return; + case 0x8C: set_regop16(m_y); set_imm(); %CMP16; return; + case 0x8E: set_regop16(m_y); set_imm(); %LD16; return; + + case 0x90: set_regop16(m_q.p.w); %DIRECT; %SUB16; return; + case 0x91: set_regop16(m_q.p.w); %DIRECT; %CMP16; return; + case 0x92: set_regop16(m_q.p.d); %DIRECT; %SBC16; return; + case 0x93: set_regop16(m_q.p.d); %DIRECT; %CMP16; return; + case 0x94: set_regop16(m_q.p.d); %DIRECT; %AND16; return; + case 0x95: set_regop16(m_q.p.d); %DIRECT; %BIT16; return; + case 0x96: set_regop16(m_q.p.w); %DIRECT; %LD16; return; + case 0x97: set_regop16(m_q.p.w); %DIRECT; %ST16; return; + case 0x98: set_regop16(m_q.p.d); %DIRECT; %EOR16; return; + case 0x99: set_regop16(m_q.p.d); %DIRECT; %ADC16; return; + case 0x9A: set_regop16(m_q.p.d); %DIRECT; %OR16; return; + case 0x9B: set_regop16(m_q.p.w); %DIRECT; %ADD16; return; + case 0x9C: set_regop16(m_y); %DIRECT; %CMP16; return; + case 0x9E: set_regop16(m_y); %DIRECT; %LD16; return; + case 0x9F: set_regop16(m_y); %DIRECT; %ST16; return; + + case 0xA0: set_regop16(m_q.p.w); %INDEXED; %SUB16; return; + case 0xA1: set_regop16(m_q.p.w); %INDEXED; %CMP16; return; + case 0xA2: set_regop16(m_q.p.d); %INDEXED; %SBC16; return; + case 0xA3: set_regop16(m_q.p.d); %INDEXED; %CMP16; return; + case 0xA4: set_regop16(m_q.p.d); %INDEXED; %AND16; return; + case 0xA5: set_regop16(m_q.p.d); %INDEXED; %BIT16; return; + case 0xA6: set_regop16(m_q.p.w); %INDEXED; %LD16; return; + case 0xA7: set_regop16(m_q.p.w); %INDEXED; %ST16; return; + case 0xA8: set_regop16(m_q.p.d); %INDEXED; %EOR16; return; + case 0xA9: set_regop16(m_q.p.d); %INDEXED; %ADC16; return; + case 0xAA: set_regop16(m_q.p.d); %INDEXED; %OR16; return; + case 0xAB: set_regop16(m_q.p.w); %INDEXED; %ADD16; return; + case 0xAC: set_regop16(m_y); %INDEXED; %CMP16; return; + case 0xAE: set_regop16(m_y); %INDEXED; %LD16; return; + case 0xAF: set_regop16(m_y); %INDEXED; %ST16; return; + + case 0xB0: set_regop16(m_q.p.w); %EXTENDED; %SUB16; return; + case 0xB1: set_regop16(m_q.p.w); %EXTENDED; %CMP16; return; + case 0xB2: set_regop16(m_q.p.d); %EXTENDED; %SBC16; return; + case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %CMP16; return; + case 0xB4: set_regop16(m_q.p.d); %EXTENDED; %AND16; return; + case 0xB5: set_regop16(m_q.p.d); %EXTENDED; %BIT16; return; + case 0xB6: set_regop16(m_q.p.w); %EXTENDED; %LD16; return; + case 0xB7: set_regop16(m_q.p.w); %EXTENDED; %ST16; return; + case 0xB8: set_regop16(m_q.p.d); %EXTENDED; %EOR16; return; + case 0xB9: set_regop16(m_q.p.d); %EXTENDED; %ADC16; return; + case 0xBA: set_regop16(m_q.p.d); %EXTENDED; %OR16; return; + case 0xBB: set_regop16(m_q.p.w); %EXTENDED; %ADD16; return; + case 0xBC: set_regop16(m_y); %EXTENDED; %CMP16; return; + case 0xBE: set_regop16(m_y); %EXTENDED; %LD16; return; + case 0xBF: set_regop16(m_y); %EXTENDED; %ST16; return; + + case 0xCE: set_regop16(m_s); set_imm(); %LD16; return; + case 0xDC: %DIRECT; %LDQ; return; + case 0xDD: %DIRECT; %STQ; return; + case 0xDE: set_regop16(m_s); %DIRECT; %LD16; return; + case 0xDF: set_regop16(m_s); %DIRECT; %ST16; return; + case 0xEC: %INDEXED; %LDQ; return; + case 0xED: %INDEXED; %STQ; return; + case 0xEE: set_regop16(m_s); %INDEXED; %LD16; return; + case 0xEF: set_regop16(m_s); %INDEXED; %ST16; return; + case 0xFC: %EXTENDED; %LDQ; return; + case 0xFD: %EXTENDED; %STQ; return; + case 0xFE: set_regop16(m_s); %EXTENDED; %LD16; return; + case 0xFF: set_regop16(m_s); %EXTENDED; %ST16; return; + + default: %ILLEGAL; return; } return; @@ -417,101 +417,101 @@ DISPATCH11: @m_opcode = read_opcode(); switch(m_opcode) { - case 0x30: %BAND; return; - case 0x31: %BIAND; return; - case 0x32: %BOR; return; - case 0x33: %BIOR; return; - case 0x34: %BEOR; return; - case 0x35: %BIEOR; return; - case 0x36: %LDBT; return; - case 0x37: %STBT; return; - case 0x38: %TFM; return; - case 0x39: %TFM; return; - case 0x3A: %TFM; return; - case 0x3B: %TFM; return; - case 0x3C: set_regop8(m_md); set_imm(); %BIT8; return; - case 0x3D: set_regop8(m_md); set_imm(); %LD8; return; - case 0x3F: %SWI3; return; - - case 0x43: set_e(); %COM8; return; - case 0x4A: set_e(); %DEC8; return; - case 0x4C: set_e(); %INC8; return; - case 0x4D: set_e(); %TST8; return; - case 0x4F: set_e(); %CLR8; return; - - case 0x53: set_f(); %COM8; return; - case 0x5A: set_f(); %DEC8; return; - case 0x5C: set_f(); %INC8; return; - case 0x5D: set_f(); %TST8; return; - case 0x5F: set_f(); %CLR8; return; - - case 0x80: set_regop8(m_q.r.e); set_imm(); %SUB8; return; - case 0x81: set_regop8(m_q.r.e); set_imm(); %CMP8; return; - case 0x83: set_regop16(m_u); set_imm(); %CMP16; return; - case 0x86: set_regop8(m_q.r.e); set_imm(); %LD8; return; - case 0x8B: set_regop8(m_q.r.e); set_imm(); %ADD8; return; - case 0x8C: set_regop16(m_s); set_imm(); %CMP16; return; - case 0x8D: set_imm(); %DIVD; return; - case 0x8E: set_imm(); %DIVQ; return; - case 0x8F: set_imm(); %MULD; return; - - case 0x90: set_regop8(m_q.r.e); %DIRECT; %SUB8; return; - case 0x91: set_regop8(m_q.r.e); %DIRECT; %CMP8; return; - case 0x93: set_regop16(m_u); %DIRECT; %CMP16; return; - case 0x96: set_regop8(m_q.r.e); %DIRECT; %LD8; return; - case 0x97: set_regop8(m_q.r.e); %DIRECT; %ST8; return; - case 0x9B: set_regop8(m_q.r.e); %DIRECT; %ADD8; return; - case 0x9C: set_regop16(m_s); %DIRECT; %CMP16; return; - case 0x9D: %DIRECT; %DIVD; return; - case 0x9E: %DIRECT; %DIVQ; return; - case 0x9F: %DIRECT; %MULD; return; - - case 0xA0: set_regop8(m_q.r.e); %INDEXED; %SUB8; return; - case 0xA1: set_regop8(m_q.r.e); %INDEXED; %CMP8; return; - case 0xA3: set_regop16(m_u); %INDEXED; %CMP16; return; - case 0xA6: set_regop8(m_q.r.e); %INDEXED; %LD8; return; - case 0xA7: set_regop8(m_q.r.e); %INDEXED; %ST8; return; - case 0xAB: set_regop8(m_q.r.e); %INDEXED; %ADD8; return; - case 0xAC: set_regop16(m_s); %INDEXED; %CMP16; return; - case 0xAD: %INDEXED; %DIVD; return; - case 0xAE: %INDEXED; %DIVQ; return; - case 0xAF: %INDEXED; %MULD; return; - - case 0xB0: set_regop8(m_q.r.e); %EXTENDED; %SUB8; return; - case 0xB1: set_regop8(m_q.r.e); %EXTENDED; %CMP8; return; - case 0xB3: set_regop16(m_u); %EXTENDED; %CMP16; return; - case 0xB6: set_regop8(m_q.r.e); %EXTENDED; %LD8; return; - case 0xB7: set_regop8(m_q.r.e); %EXTENDED; %ST8; return; - case 0xBB: set_regop8(m_q.r.e); %EXTENDED; %ADD8; return; - case 0xBC: set_regop16(m_s); %EXTENDED; %CMP16; return; - case 0xBD: %EXTENDED; %DIVD; return; - case 0xBE: %EXTENDED; %DIVQ; return; - case 0xBF: %EXTENDED; %MULD; return; - - case 0xC0: set_regop8(m_q.r.f); set_imm(); %SUB8; return; - case 0xC1: set_regop8(m_q.r.f); set_imm(); %CMP8; return; - case 0xC6: set_regop8(m_q.r.f); set_imm(); %LD8; return; - case 0xCB: set_regop8(m_q.r.f); set_imm(); %ADD8; return; - - case 0xD0: set_regop8(m_q.r.f); %DIRECT; %SUB8; return; - case 0xD1: set_regop8(m_q.r.f); %DIRECT; %CMP8; return; - case 0xD6: set_regop8(m_q.r.f); %DIRECT; %LD8; return; - case 0xD7: set_regop8(m_q.r.f); %DIRECT; %ST8; return; - case 0xDB: set_regop8(m_q.r.f); %DIRECT; %ADD8; return; - - case 0xE0: set_regop8(m_q.r.f); %INDEXED; %SUB8; return; - case 0xE1: set_regop8(m_q.r.f); %INDEXED; %CMP8; return; - case 0xE6: set_regop8(m_q.r.f); %INDEXED; %LD8; return; - case 0xE7: set_regop8(m_q.r.f); %INDEXED; %ST8; return; - case 0xEB: set_regop8(m_q.r.f); %INDEXED; %ADD8; return; - - case 0xF0: set_regop8(m_q.r.f); %EXTENDED; %SUB8; return; - case 0xF1: set_regop8(m_q.r.f); %EXTENDED; %CMP8; return; - case 0xF6: set_regop8(m_q.r.f); %EXTENDED; %LD8; return; - case 0xF7: set_regop8(m_q.r.f); %EXTENDED; %ST8; return; - case 0xFB: set_regop8(m_q.r.f); %EXTENDED; %ADD8; return; - - default: %ILLEGAL; return; + case 0x30: %BAND; return; + case 0x31: %BIAND; return; + case 0x32: %BOR; return; + case 0x33: %BIOR; return; + case 0x34: %BEOR; return; + case 0x35: %BIEOR; return; + case 0x36: %LDBT; return; + case 0x37: %STBT; return; + case 0x38: %TFM; return; + case 0x39: %TFM; return; + case 0x3A: %TFM; return; + case 0x3B: %TFM; return; + case 0x3C: set_regop8(m_md); set_imm(); %BIT8; return; + case 0x3D: set_regop8(m_md); set_imm(); %LD8; return; + case 0x3F: %SWI3; return; + + case 0x43: set_e(); %COM8; return; + case 0x4A: set_e(); %DEC8; return; + case 0x4C: set_e(); %INC8; return; + case 0x4D: set_e(); %TST8; return; + case 0x4F: set_e(); %CLR8; return; + + case 0x53: set_f(); %COM8; return; + case 0x5A: set_f(); %DEC8; return; + case 0x5C: set_f(); %INC8; return; + case 0x5D: set_f(); %TST8; return; + case 0x5F: set_f(); %CLR8; return; + + case 0x80: set_regop8(m_q.r.e); set_imm(); %SUB8; return; + case 0x81: set_regop8(m_q.r.e); set_imm(); %CMP8; return; + case 0x83: set_regop16(m_u); set_imm(); %CMP16; return; + case 0x86: set_regop8(m_q.r.e); set_imm(); %LD8; return; + case 0x8B: set_regop8(m_q.r.e); set_imm(); %ADD8; return; + case 0x8C: set_regop16(m_s); set_imm(); %CMP16; return; + case 0x8D: set_imm(); %DIVD; return; + case 0x8E: set_imm(); %DIVQ; return; + case 0x8F: set_imm(); %MULD; return; + + case 0x90: set_regop8(m_q.r.e); %DIRECT; %SUB8; return; + case 0x91: set_regop8(m_q.r.e); %DIRECT; %CMP8; return; + case 0x93: set_regop16(m_u); %DIRECT; %CMP16; return; + case 0x96: set_regop8(m_q.r.e); %DIRECT; %LD8; return; + case 0x97: set_regop8(m_q.r.e); %DIRECT; %ST8; return; + case 0x9B: set_regop8(m_q.r.e); %DIRECT; %ADD8; return; + case 0x9C: set_regop16(m_s); %DIRECT; %CMP16; return; + case 0x9D: %DIRECT; %DIVD; return; + case 0x9E: %DIRECT; %DIVQ; return; + case 0x9F: %DIRECT; %MULD; return; + + case 0xA0: set_regop8(m_q.r.e); %INDEXED; %SUB8; return; + case 0xA1: set_regop8(m_q.r.e); %INDEXED; %CMP8; return; + case 0xA3: set_regop16(m_u); %INDEXED; %CMP16; return; + case 0xA6: set_regop8(m_q.r.e); %INDEXED; %LD8; return; + case 0xA7: set_regop8(m_q.r.e); %INDEXED; %ST8; return; + case 0xAB: set_regop8(m_q.r.e); %INDEXED; %ADD8; return; + case 0xAC: set_regop16(m_s); %INDEXED; %CMP16; return; + case 0xAD: %INDEXED; %DIVD; return; + case 0xAE: %INDEXED; %DIVQ; return; + case 0xAF: %INDEXED; %MULD; return; + + case 0xB0: set_regop8(m_q.r.e); %EXTENDED; %SUB8; return; + case 0xB1: set_regop8(m_q.r.e); %EXTENDED; %CMP8; return; + case 0xB3: set_regop16(m_u); %EXTENDED; %CMP16; return; + case 0xB6: set_regop8(m_q.r.e); %EXTENDED; %LD8; return; + case 0xB7: set_regop8(m_q.r.e); %EXTENDED; %ST8; return; + case 0xBB: set_regop8(m_q.r.e); %EXTENDED; %ADD8; return; + case 0xBC: set_regop16(m_s); %EXTENDED; %CMP16; return; + case 0xBD: %EXTENDED; %DIVD; return; + case 0xBE: %EXTENDED; %DIVQ; return; + case 0xBF: %EXTENDED; %MULD; return; + + case 0xC0: set_regop8(m_q.r.f); set_imm(); %SUB8; return; + case 0xC1: set_regop8(m_q.r.f); set_imm(); %CMP8; return; + case 0xC6: set_regop8(m_q.r.f); set_imm(); %LD8; return; + case 0xCB: set_regop8(m_q.r.f); set_imm(); %ADD8; return; + + case 0xD0: set_regop8(m_q.r.f); %DIRECT; %SUB8; return; + case 0xD1: set_regop8(m_q.r.f); %DIRECT; %CMP8; return; + case 0xD6: set_regop8(m_q.r.f); %DIRECT; %LD8; return; + case 0xD7: set_regop8(m_q.r.f); %DIRECT; %ST8; return; + case 0xDB: set_regop8(m_q.r.f); %DIRECT; %ADD8; return; + + case 0xE0: set_regop8(m_q.r.f); %INDEXED; %SUB8; return; + case 0xE1: set_regop8(m_q.r.f); %INDEXED; %CMP8; return; + case 0xE6: set_regop8(m_q.r.f); %INDEXED; %LD8; return; + case 0xE7: set_regop8(m_q.r.f); %INDEXED; %ST8; return; + case 0xEB: set_regop8(m_q.r.f); %INDEXED; %ADD8; return; + + case 0xF0: set_regop8(m_q.r.f); %EXTENDED; %SUB8; return; + case 0xF1: set_regop8(m_q.r.f); %EXTENDED; %CMP8; return; + case 0xF6: set_regop8(m_q.r.f); %EXTENDED; %LD8; return; + case 0xF7: set_regop8(m_q.r.f); %EXTENDED; %ST8; return; + case 0xFB: set_regop8(m_q.r.f); %EXTENDED; %ADD8; return; + + default: %ILLEGAL; return; } return; @@ -815,12 +815,12 @@ TFR: return; ILLEGAL: - m_md |= 0x40; // illegal op flag + m_md |= 0x40; // illegal op flag set_ea(VECTOR_ILLEGAL); goto SOFTWARE_INTERRUPT; DIVIDE_BY_ZERO: - m_md |= 0x80; // divide by zero flag + m_md |= 0x80; // divide by zero flag set_ea(VECTOR_ILLEGAL); goto SOFTWARE_INTERRUPT; @@ -853,7 +853,7 @@ OIM: @m_temp.b.l = read_operand(); m_cc &= ~CC_V; m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l | m_temp_im); - @eat(1); // this is just a guess + @eat(1); // this is just a guess @write_operand(m_temp.b.l); return; @@ -861,7 +861,7 @@ AIM: @m_temp.b.l = read_operand(); m_cc &= ~CC_V; m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l & m_temp_im); - @eat(1); // this is just a guess + @eat(1); // this is just a guess @write_operand(m_temp.b.l); return; @@ -869,7 +869,7 @@ EIM: @m_temp.b.l = read_operand(); m_cc &= ~CC_V; m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l ^ m_temp_im); - @eat(1); // this is just a guess + @eat(1); // this is just a guess @write_operand(m_temp.b.l); return; @@ -877,7 +877,7 @@ TIM: @m_temp.b.l = read_operand(); m_cc &= ~CC_V; m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l & m_temp_im); - @eat(2); // this is just a guess + @eat(2); // this is just a guess return; TFM: @@ -974,25 +974,25 @@ EOR16: return; PSHSW: - m_temp.w = 0x300; // PSHS W + m_temp.w = 0x300; eat(2); set_regop16(m_s); goto PUSH_REGISTERS; PULSW: - m_temp.w = 0x300; // PULS W + m_temp.w = 0x300; eat(2); set_regop16(m_s); goto PULL_REGISTERS; PSHUW: - m_temp.w = 0x300; // PSHU W + m_temp.w = 0x300; eat(2); set_regop16(m_u); goto PUSH_REGISTERS; PULUW: - m_temp.w = 0x300; // PULU W + m_temp.w = 0x300; eat(2); set_regop16(m_u); goto PULL_REGISTERS; diff --git a/src/devices/cpu/m6809/konami.ops b/src/devices/cpu/m6809/konami.ops index e1ae3c3e0c6..00e1d910a86 100644 --- a/src/devices/cpu/m6809/konami.ops +++ b/src/devices/cpu/m6809/konami.ops @@ -4,9 +4,9 @@ MAIN: // check interrupt lines switch(get_pending_interrupt()) { - case VECTOR_NMI: goto NMI; - case VECTOR_FIRQ: goto FIRQ; - case VECTOR_IRQ: goto IRQ; + case VECTOR_NMI: goto NMI; + case VECTOR_FIRQ: goto FIRQ; + case VECTOR_IRQ: goto IRQ; } // debugger hook @@ -19,217 +19,217 @@ MAIN: // dispatch opcode switch(m_opcode) { - case 0x08: set_regop16(m_x); %INDEXED; %LEA_xy; return; - case 0x09: set_regop16(m_y); %INDEXED; %LEA_xy; return; - case 0x0A: set_regop16(m_u); %INDEXED; %LEA_us; return; - case 0x0B: set_regop16(m_s); %INDEXED; %LEA_us; return; - case 0x0C: %PSHS; return; - case 0x0D: %PSHU; return; - case 0x0E: %PULS; return; - case 0x0F: %PULU; return; - - case 0x10: set_regop8(m_q.r.a); set_imm(); %LD8; return; - case 0x11: set_regop8(m_q.r.b); set_imm(); %LD8; return; - case 0x12: set_regop8(m_q.r.a); %INDEXED; %LD8; return; - case 0x13: set_regop8(m_q.r.b); %INDEXED; %LD8; return; - case 0x14: set_regop8(m_q.r.a); set_imm(); %ADD8; return; - case 0x15: set_regop8(m_q.r.b); set_imm(); %ADD8; return; - case 0x16: set_regop8(m_q.r.a); %INDEXED; %ADD8; return; - case 0x17: set_regop8(m_q.r.b); %INDEXED; %ADD8; return; - case 0x18: set_regop8(m_q.r.a); set_imm(); %ADC8; return; - case 0x19: set_regop8(m_q.r.b); set_imm(); %ADC8; return; - case 0x1A: set_regop8(m_q.r.a); %INDEXED; %ADC8; return; - case 0x1B: set_regop8(m_q.r.b); %INDEXED; %ADC8; return; - case 0x1C: set_regop8(m_q.r.a); set_imm(); %SUB8; return; - case 0x1D: set_regop8(m_q.r.b); set_imm(); %SUB8; return; - case 0x1E: set_regop8(m_q.r.a); %INDEXED; %SUB8; return; - case 0x1F: set_regop8(m_q.r.b); %INDEXED; %SUB8; return; - - case 0x20: set_regop8(m_q.r.a); set_imm(); %SBC8; return; - case 0x21: set_regop8(m_q.r.b); set_imm(); %SBC8; return; - case 0x22: set_regop8(m_q.r.a); %INDEXED; %SBC8; return; - case 0x23: set_regop8(m_q.r.b); %INDEXED; %SBC8; return; - case 0x24: set_regop8(m_q.r.a); set_imm(); %AND8; return; - case 0x25: set_regop8(m_q.r.b); set_imm(); %AND8; return; - case 0x26: set_regop8(m_q.r.a); %INDEXED; %AND8; return; - case 0x27: set_regop8(m_q.r.b); %INDEXED; %AND8; return; - case 0x28: set_regop8(m_q.r.a); set_imm(); %BIT8; return; - case 0x29: set_regop8(m_q.r.b); set_imm(); %BIT8; return; - case 0x2A: set_regop8(m_q.r.a); %INDEXED; %BIT8; return; - case 0x2B: set_regop8(m_q.r.b); %INDEXED; %BIT8; return; - case 0x2C: set_regop8(m_q.r.a); set_imm(); %EOR8; return; - case 0x2D: set_regop8(m_q.r.b); set_imm(); %EOR8; return; - case 0x2E: set_regop8(m_q.r.a); %INDEXED; %EOR8; return; - case 0x2F: set_regop8(m_q.r.b); %INDEXED; %EOR8; return; - - case 0x30: set_regop8(m_q.r.a); set_imm(); %OR8; return; - case 0x31: set_regop8(m_q.r.b); set_imm(); %OR8; return; - case 0x32: set_regop8(m_q.r.a); %INDEXED; %OR8; return; - case 0x33: set_regop8(m_q.r.b); %INDEXED; %OR8; return; - case 0x34: set_regop8(m_q.r.a); set_imm(); %CMP8; return; - case 0x35: set_regop8(m_q.r.b); set_imm(); %CMP8; return; - case 0x36: set_regop8(m_q.r.a); %INDEXED; %CMP8; return; - case 0x37: set_regop8(m_q.r.b); %INDEXED; %CMP8; return; - case 0x38: set_imm(); %SETLINE; return; - case 0x39: %INDEXED; %SETLINE; return; - case 0x3A: set_regop8(m_q.r.a); %INDEXED; %ST8; return; - case 0x3B: set_regop8(m_q.r.b); %INDEXED; %ST8; return; - case 0x3C: set_imm(); %ANDCC; return; - case 0x3D: set_imm(); %ORCC; return; - case 0x3E: %EXG; return; - case 0x3F: %TFR; return; - - case 0x40: set_regop16(m_q.p.d); set_imm(); %LD16; return; - case 0x41: set_regop16(m_q.p.d); %INDEXED; %LD16; return; - case 0x42: set_regop16(m_x); set_imm(); %LD16; return; - case 0x43: set_regop16(m_x); %INDEXED; %LD16; return; - case 0x44: set_regop16(m_y); set_imm(); %LD16; return; - case 0x45: set_regop16(m_y); %INDEXED; %LD16; return; - case 0x46: set_regop16(m_u); set_imm(); %LD16; return; - case 0x47: set_regop16(m_u); %INDEXED; %LD16; return; - case 0x48: set_regop16(m_s); set_imm(); %LD16; return; - case 0x49: set_regop16(m_s); %INDEXED; %LD16; return; - case 0x4A: set_regop16(m_q.p.d); set_imm(); %CMP16; return; - case 0x4B: set_regop16(m_q.p.d); %INDEXED; %CMP16; return; - case 0x4C: set_regop16(m_x); set_imm(); %CMP16; return; - case 0x4D: set_regop16(m_x); %INDEXED; %CMP16; return; - case 0x4E: set_regop16(m_y); set_imm(); %CMP16; return; - case 0x4F: set_regop16(m_y); %INDEXED; %CMP16; return; - - case 0x50: set_regop16(m_u); set_imm(); %CMP16; return; - case 0x51: set_regop16(m_u); %INDEXED; %CMP16; return; - case 0x52: set_regop16(m_s); set_imm(); %CMP16; return; - case 0x53: set_regop16(m_s); %INDEXED; %CMP16; return; - case 0x54: set_regop16(m_q.p.d); set_imm(); %ADD16; return; - case 0x55: set_regop16(m_q.p.d); %INDEXED; %ADD16; return; - case 0x56: set_regop16(m_q.p.d); set_imm(); %SUB16; return; - case 0x57: set_regop16(m_q.p.d); %INDEXED; %SUB16; return; - case 0x58: set_regop16(m_q.p.d); %INDEXED; %ST16; return; - case 0x59: set_regop16(m_x); %INDEXED; %ST16; return; - case 0x5A: set_regop16(m_y); %INDEXED; %ST16; return; - case 0x5B: set_regop16(m_u); %INDEXED; %ST16; return; - case 0x5C: set_regop16(m_s); %INDEXED; %ST16; return; - - case 0x60: set_cond(true); %BRANCH; return; - case 0x61: set_cond(cond_hi()); %BRANCH; return; - case 0x62: set_cond(cond_cc()); %BRANCH; return; - case 0x63: set_cond(cond_ne()); %BRANCH; return; - case 0x64: set_cond(cond_vc()); %BRANCH; return; - case 0x65: set_cond(cond_pl()); %BRANCH; return; - case 0x66: set_cond(cond_ge()); %BRANCH; return; - case 0x67: set_cond(cond_gt()); %BRANCH; return; - case 0x68: set_cond(true); %LBRANCH; return; - case 0x69: set_cond(cond_hi()); %LBRANCH; return; - case 0x6A: set_cond(cond_cc()); %LBRANCH; return; - case 0x6B: set_cond(cond_ne()); %LBRANCH; return; - case 0x6C: set_cond(cond_vc()); %LBRANCH; return; - case 0x6D: set_cond(cond_pl()); %LBRANCH; return; - case 0x6E: set_cond(cond_ge()); %LBRANCH; return; - case 0x6F: set_cond(cond_gt()); %LBRANCH; return; - - case 0x70: set_cond(false); %BRANCH; return; - case 0x71: set_cond(!cond_hi()); %BRANCH; return; - case 0x72: set_cond(!cond_cc()); %BRANCH; return; - case 0x73: set_cond(!cond_ne()); %BRANCH; return; - case 0x74: set_cond(!cond_vc()); %BRANCH; return; - case 0x75: set_cond(!cond_pl()); %BRANCH; return; - case 0x76: set_cond(!cond_ge()); %BRANCH; return; - case 0x77: set_cond(!cond_gt()); %BRANCH; return; - case 0x78: set_cond(false); %LBRANCH; return; - case 0x79: set_cond(!cond_hi()); %LBRANCH; return; - case 0x7A: set_cond(!cond_cc()); %LBRANCH; return; - case 0x7B: set_cond(!cond_ne()); %LBRANCH; return; - case 0x7C: set_cond(!cond_vc()); %LBRANCH; return; - case 0x7D: set_cond(!cond_pl()); %LBRANCH; return; - case 0x7E: set_cond(!cond_ge()); %LBRANCH; return; - case 0x7F: set_cond(!cond_gt()); %LBRANCH; return; - - case 0x80: set_a(); %CLR8; return; - case 0x81: set_b(); %CLR8; return; - case 0x82: %INDEXED; %CLR8; return; - case 0x83: set_a(); %COM8; return; - case 0x84: set_b(); %COM8; return; - case 0x85: %INDEXED; %COM8; return; - case 0x86: set_a(); %NEG8; return; - case 0x87: set_b(); %NEG8; return; - case 0x88: %INDEXED; %NEG8; return; - case 0x89: set_a(); %INC8; return; - case 0x8A: set_b(); %INC8; return; - case 0x8B: %INDEXED; %INC8; return; - case 0x8C: set_a(); %DEC8; return; - case 0x8D: set_b(); %DEC8; return; - case 0x8E: %INDEXED; %DEC8; return; - case 0x8F: %RTS; return; - - case 0x90: set_a(); %TST8; return; - case 0x91: set_b(); %TST8; return; - case 0x92: %INDEXED; %TST8; return; - case 0x93: set_a(); %LSR8; return; - case 0x94: set_b(); %LSR8; return; - case 0x95: %INDEXED; %LSR8; return; - case 0x96: set_a(); %ROR8; return; - case 0x97: set_b(); %ROR8; return; - case 0x98: %INDEXED; %ROR8; return; - case 0x99: set_a(); %ASR8; return; - case 0x9A: set_b(); %ASR8; return; - case 0x9B: %INDEXED; %ASR8; return; - case 0x9C: set_a(); %ASL8; return; - case 0x9D: set_b(); %ASL8; return; - case 0x9E: %INDEXED; %ASL8; return; - case 0x9F: %RTI; return; - - case 0xA0: set_a(); %ROL8; return; - case 0xA1: set_b(); %ROL8; return; - case 0xA2: %INDEXED; %ROL8; return; - case 0xA3: %INDEXED; %LSR16; return; - case 0xA4: %INDEXED; %ROR16; return; - case 0xA5: %INDEXED; %ASR16; return; - case 0xA6: %INDEXED; %ASL16; return; - case 0xA7: %INDEXED; %ROL16; return; - case 0xA8: %INDEXED; %JMP; return; - case 0xA9: %INDEXED; %JSR; return; - case 0xAA: %BSR; return; - case 0xAB: %LBSR; return; - case 0xAC: %DECBJNZ; return; - case 0xAD: %DECXJNZ; return; - case 0xAE: %NOP; return; - - case 0xB0: %ABX; return; - case 0xB1: %DAA; return; - case 0xB2: %SEX; return; - case 0xB3: %MUL; return; - case 0xB4: %LMUL; return; - case 0xB5: %DIVX; return; - case 0xB6: %BMOVE; return; - case 0xB7: %MOVE; return; - case 0xB8: %IMM_IM; set_d(); %LSRD; return; - case 0xB9: %INDEXED; %LSRD; return; - case 0xBA: %IMM_IM; set_d(); %RORD; return; - case 0xBB: %INDEXED; %RORD; return; - case 0xBC: %IMM_IM; set_d(); %ASRD; return; - case 0xBD: %INDEXED; %ASRD; return; - case 0xBE: %IMM_IM; set_d(); %ASLD; return; - case 0xBF: %INDEXED; %ASLD; return; - - case 0xC0: %IMM_IM; set_d(); %ROLD; return; - case 0xC1: %INDEXED; %ROLD; return; - case 0xC2: set_d(); %CLR16; return; - case 0xC3: %INDEXED; %CLR16; return; - case 0xC4: set_d(); %NEG16; return; - case 0xC5: %INDEXED; %NEG16; return; - case 0xC6: set_d(); %INC16; return; - case 0xC7: %INDEXED; %INC16; return; - case 0xC8: set_d(); %DEC16; return; - case 0xC9: %INDEXED; %DEC16; return; - case 0xCA: set_d(); %TST16; return; - case 0xCB: %INDEXED; %TST16; return; - case 0xCC: set_a(); %ABS8; return; - case 0xCD: set_b(); %ABS8; return; - case 0xCE: set_d(); %ABS16; return; - case 0xCF: %BSET; return; - - case 0xD0: %BSET2; return; - default: %ILLEGAL; return; + case 0x08: set_regop16(m_x); %INDEXED; %LEA_xy; return; + case 0x09: set_regop16(m_y); %INDEXED; %LEA_xy; return; + case 0x0A: set_regop16(m_u); %INDEXED; %LEA_us; return; + case 0x0B: set_regop16(m_s); %INDEXED; %LEA_us; return; + case 0x0C: %PSHS; return; + case 0x0D: %PSHU; return; + case 0x0E: %PULS; return; + case 0x0F: %PULU; return; + + case 0x10: set_regop8(m_q.r.a); set_imm(); %LD8; return; + case 0x11: set_regop8(m_q.r.b); set_imm(); %LD8; return; + case 0x12: set_regop8(m_q.r.a); %INDEXED; %LD8; return; + case 0x13: set_regop8(m_q.r.b); %INDEXED; %LD8; return; + case 0x14: set_regop8(m_q.r.a); set_imm(); %ADD8; return; + case 0x15: set_regop8(m_q.r.b); set_imm(); %ADD8; return; + case 0x16: set_regop8(m_q.r.a); %INDEXED; %ADD8; return; + case 0x17: set_regop8(m_q.r.b); %INDEXED; %ADD8; return; + case 0x18: set_regop8(m_q.r.a); set_imm(); %ADC8; return; + case 0x19: set_regop8(m_q.r.b); set_imm(); %ADC8; return; + case 0x1A: set_regop8(m_q.r.a); %INDEXED; %ADC8; return; + case 0x1B: set_regop8(m_q.r.b); %INDEXED; %ADC8; return; + case 0x1C: set_regop8(m_q.r.a); set_imm(); %SUB8; return; + case 0x1D: set_regop8(m_q.r.b); set_imm(); %SUB8; return; + case 0x1E: set_regop8(m_q.r.a); %INDEXED; %SUB8; return; + case 0x1F: set_regop8(m_q.r.b); %INDEXED; %SUB8; return; + + case 0x20: set_regop8(m_q.r.a); set_imm(); %SBC8; return; + case 0x21: set_regop8(m_q.r.b); set_imm(); %SBC8; return; + case 0x22: set_regop8(m_q.r.a); %INDEXED; %SBC8; return; + case 0x23: set_regop8(m_q.r.b); %INDEXED; %SBC8; return; + case 0x24: set_regop8(m_q.r.a); set_imm(); %AND8; return; + case 0x25: set_regop8(m_q.r.b); set_imm(); %AND8; return; + case 0x26: set_regop8(m_q.r.a); %INDEXED; %AND8; return; + case 0x27: set_regop8(m_q.r.b); %INDEXED; %AND8; return; + case 0x28: set_regop8(m_q.r.a); set_imm(); %BIT8; return; + case 0x29: set_regop8(m_q.r.b); set_imm(); %BIT8; return; + case 0x2A: set_regop8(m_q.r.a); %INDEXED; %BIT8; return; + case 0x2B: set_regop8(m_q.r.b); %INDEXED; %BIT8; return; + case 0x2C: set_regop8(m_q.r.a); set_imm(); %EOR8; return; + case 0x2D: set_regop8(m_q.r.b); set_imm(); %EOR8; return; + case 0x2E: set_regop8(m_q.r.a); %INDEXED; %EOR8; return; + case 0x2F: set_regop8(m_q.r.b); %INDEXED; %EOR8; return; + + case 0x30: set_regop8(m_q.r.a); set_imm(); %OR8; return; + case 0x31: set_regop8(m_q.r.b); set_imm(); %OR8; return; + case 0x32: set_regop8(m_q.r.a); %INDEXED; %OR8; return; + case 0x33: set_regop8(m_q.r.b); %INDEXED; %OR8; return; + case 0x34: set_regop8(m_q.r.a); set_imm(); %CMP8; return; + case 0x35: set_regop8(m_q.r.b); set_imm(); %CMP8; return; + case 0x36: set_regop8(m_q.r.a); %INDEXED; %CMP8; return; + case 0x37: set_regop8(m_q.r.b); %INDEXED; %CMP8; return; + case 0x38: set_imm(); %SETLINE; return; + case 0x39: %INDEXED; %SETLINE; return; + case 0x3A: set_regop8(m_q.r.a); %INDEXED; %ST8; return; + case 0x3B: set_regop8(m_q.r.b); %INDEXED; %ST8; return; + case 0x3C: set_imm(); %ANDCC; return; + case 0x3D: set_imm(); %ORCC; return; + case 0x3E: %EXG; return; + case 0x3F: %TFR; return; + + case 0x40: set_regop16(m_q.p.d); set_imm(); %LD16; return; + case 0x41: set_regop16(m_q.p.d); %INDEXED; %LD16; return; + case 0x42: set_regop16(m_x); set_imm(); %LD16; return; + case 0x43: set_regop16(m_x); %INDEXED; %LD16; return; + case 0x44: set_regop16(m_y); set_imm(); %LD16; return; + case 0x45: set_regop16(m_y); %INDEXED; %LD16; return; + case 0x46: set_regop16(m_u); set_imm(); %LD16; return; + case 0x47: set_regop16(m_u); %INDEXED; %LD16; return; + case 0x48: set_regop16(m_s); set_imm(); %LD16; return; + case 0x49: set_regop16(m_s); %INDEXED; %LD16; return; + case 0x4A: set_regop16(m_q.p.d); set_imm(); %CMP16; return; + case 0x4B: set_regop16(m_q.p.d); %INDEXED; %CMP16; return; + case 0x4C: set_regop16(m_x); set_imm(); %CMP16; return; + case 0x4D: set_regop16(m_x); %INDEXED; %CMP16; return; + case 0x4E: set_regop16(m_y); set_imm(); %CMP16; return; + case 0x4F: set_regop16(m_y); %INDEXED; %CMP16; return; + + case 0x50: set_regop16(m_u); set_imm(); %CMP16; return; + case 0x51: set_regop16(m_u); %INDEXED; %CMP16; return; + case 0x52: set_regop16(m_s); set_imm(); %CMP16; return; + case 0x53: set_regop16(m_s); %INDEXED; %CMP16; return; + case 0x54: set_regop16(m_q.p.d); set_imm(); %ADD16; return; + case 0x55: set_regop16(m_q.p.d); %INDEXED; %ADD16; return; + case 0x56: set_regop16(m_q.p.d); set_imm(); %SUB16; return; + case 0x57: set_regop16(m_q.p.d); %INDEXED; %SUB16; return; + case 0x58: set_regop16(m_q.p.d); %INDEXED; %ST16; return; + case 0x59: set_regop16(m_x); %INDEXED; %ST16; return; + case 0x5A: set_regop16(m_y); %INDEXED; %ST16; return; + case 0x5B: set_regop16(m_u); %INDEXED; %ST16; return; + case 0x5C: set_regop16(m_s); %INDEXED; %ST16; return; + + case 0x60: set_cond(true); %BRANCH; return; + case 0x61: set_cond(cond_hi()); %BRANCH; return; + case 0x62: set_cond(cond_cc()); %BRANCH; return; + case 0x63: set_cond(cond_ne()); %BRANCH; return; + case 0x64: set_cond(cond_vc()); %BRANCH; return; + case 0x65: set_cond(cond_pl()); %BRANCH; return; + case 0x66: set_cond(cond_ge()); %BRANCH; return; + case 0x67: set_cond(cond_gt()); %BRANCH; return; + case 0x68: set_cond(true); %LBRANCH; return; + case 0x69: set_cond(cond_hi()); %LBRANCH; return; + case 0x6A: set_cond(cond_cc()); %LBRANCH; return; + case 0x6B: set_cond(cond_ne()); %LBRANCH; return; + case 0x6C: set_cond(cond_vc()); %LBRANCH; return; + case 0x6D: set_cond(cond_pl()); %LBRANCH; return; + case 0x6E: set_cond(cond_ge()); %LBRANCH; return; + case 0x6F: set_cond(cond_gt()); %LBRANCH; return; + + case 0x70: set_cond(false); %BRANCH; return; + case 0x71: set_cond(!cond_hi()); %BRANCH; return; + case 0x72: set_cond(!cond_cc()); %BRANCH; return; + case 0x73: set_cond(!cond_ne()); %BRANCH; return; + case 0x74: set_cond(!cond_vc()); %BRANCH; return; + case 0x75: set_cond(!cond_pl()); %BRANCH; return; + case 0x76: set_cond(!cond_ge()); %BRANCH; return; + case 0x77: set_cond(!cond_gt()); %BRANCH; return; + case 0x78: set_cond(false); %LBRANCH; return; + case 0x79: set_cond(!cond_hi()); %LBRANCH; return; + case 0x7A: set_cond(!cond_cc()); %LBRANCH; return; + case 0x7B: set_cond(!cond_ne()); %LBRANCH; return; + case 0x7C: set_cond(!cond_vc()); %LBRANCH; return; + case 0x7D: set_cond(!cond_pl()); %LBRANCH; return; + case 0x7E: set_cond(!cond_ge()); %LBRANCH; return; + case 0x7F: set_cond(!cond_gt()); %LBRANCH; return; + + case 0x80: set_a(); %CLR8; return; + case 0x81: set_b(); %CLR8; return; + case 0x82: %INDEXED; %CLR8; return; + case 0x83: set_a(); %COM8; return; + case 0x84: set_b(); %COM8; return; + case 0x85: %INDEXED; %COM8; return; + case 0x86: set_a(); %NEG8; return; + case 0x87: set_b(); %NEG8; return; + case 0x88: %INDEXED; %NEG8; return; + case 0x89: set_a(); %INC8; return; + case 0x8A: set_b(); %INC8; return; + case 0x8B: %INDEXED; %INC8; return; + case 0x8C: set_a(); %DEC8; return; + case 0x8D: set_b(); %DEC8; return; + case 0x8E: %INDEXED; %DEC8; return; + case 0x8F: %RTS; return; + + case 0x90: set_a(); %TST8; return; + case 0x91: set_b(); %TST8; return; + case 0x92: %INDEXED; %TST8; return; + case 0x93: set_a(); %LSR8; return; + case 0x94: set_b(); %LSR8; return; + case 0x95: %INDEXED; %LSR8; return; + case 0x96: set_a(); %ROR8; return; + case 0x97: set_b(); %ROR8; return; + case 0x98: %INDEXED; %ROR8; return; + case 0x99: set_a(); %ASR8; return; + case 0x9A: set_b(); %ASR8; return; + case 0x9B: %INDEXED; %ASR8; return; + case 0x9C: set_a(); %ASL8; return; + case 0x9D: set_b(); %ASL8; return; + case 0x9E: %INDEXED; %ASL8; return; + case 0x9F: %RTI; return; + + case 0xA0: set_a(); %ROL8; return; + case 0xA1: set_b(); %ROL8; return; + case 0xA2: %INDEXED; %ROL8; return; + case 0xA3: %INDEXED; %LSR16; return; + case 0xA4: %INDEXED; %ROR16; return; + case 0xA5: %INDEXED; %ASR16; return; + case 0xA6: %INDEXED; %ASL16; return; + case 0xA7: %INDEXED; %ROL16; return; + case 0xA8: %INDEXED; %JMP; return; + case 0xA9: %INDEXED; %JSR; return; + case 0xAA: %BSR; return; + case 0xAB: %LBSR; return; + case 0xAC: %DECBJNZ; return; + case 0xAD: %DECXJNZ; return; + case 0xAE: %NOP; return; + + case 0xB0: %ABX; return; + case 0xB1: %DAA; return; + case 0xB2: %SEX; return; + case 0xB3: %MUL; return; + case 0xB4: %LMUL; return; + case 0xB5: %DIVX; return; + case 0xB6: %BMOVE; return; + case 0xB7: %MOVE; return; + case 0xB8: %IMM_IM; set_d(); %LSRD; return; + case 0xB9: %INDEXED; %LSRD; return; + case 0xBA: %IMM_IM; set_d(); %RORD; return; + case 0xBB: %INDEXED; %RORD; return; + case 0xBC: %IMM_IM; set_d(); %ASRD; return; + case 0xBD: %INDEXED; %ASRD; return; + case 0xBE: %IMM_IM; set_d(); %ASLD; return; + case 0xBF: %INDEXED; %ASLD; return; + + case 0xC0: %IMM_IM; set_d(); %ROLD; return; + case 0xC1: %INDEXED; %ROLD; return; + case 0xC2: set_d(); %CLR16; return; + case 0xC3: %INDEXED; %CLR16; return; + case 0xC4: set_d(); %NEG16; return; + case 0xC5: %INDEXED; %NEG16; return; + case 0xC6: set_d(); %INC16; return; + case 0xC7: %INDEXED; %INC16; return; + case 0xC8: set_d(); %DEC16; return; + case 0xC9: %INDEXED; %DEC16; return; + case 0xCA: set_d(); %TST16; return; + case 0xCB: %INDEXED; %TST16; return; + case 0xCC: set_a(); %ABS8; return; + case 0xCD: set_b(); %ABS8; return; + case 0xCE: set_d(); %ABS16; return; + case 0xCF: %BSET; return; + + case 0xD0: %BSET2; return; + default: %ILLEGAL; return; } return; @@ -371,7 +371,7 @@ INDEXED: case 0x24: case 0x34: case 0x54: case 0x64: case 0x74: // postbyte offset - m_ea.w = ireg(); // need to do this now because ireg() might be PC + m_ea.w = ireg(); // need to do this now because ireg() might be PC @m_temp.b.l = read_opcode_arg(); m_temp.w = m_ea.w + (int8_t) m_temp.b.l; eat(2); @@ -379,7 +379,7 @@ INDEXED: case 0x25: case 0x35: case 0x55: case 0x65: case 0x75: // postword offset - m_ea.w = ireg(); // need to do this now because ireg() might be PC + m_ea.w = ireg(); // need to do this now because ireg() might be PC @m_temp.b.h = read_opcode_arg(); @m_temp.b.l = read_opcode_arg(); m_temp.w = m_ea.w + (int16_t) m_temp.w; diff --git a/src/devices/cpu/m6809/m6809.ops b/src/devices/cpu/m6809/m6809.ops index 93ac3c2c014..b6e40530880 100644 --- a/src/devices/cpu/m6809/m6809.ops +++ b/src/devices/cpu/m6809/m6809.ops @@ -4,9 +4,9 @@ MAIN: // check interrupt lines switch(get_pending_interrupt()) { - case VECTOR_NMI: goto NMI; - case VECTOR_FIRQ: goto FIRQ; - case VECTOR_IRQ: goto IRQ; + case VECTOR_NMI: goto NMI; + case VECTOR_FIRQ: goto FIRQ; + case VECTOR_IRQ: goto IRQ; } // debugger hook @@ -21,252 +21,252 @@ MAIN: // dispatch opcode switch(m_opcode) { - case 0x00: case 0x01: %DIRECT; %NEG8; return; - case 0x03: case 0x02: %DIRECT; %COM8; return; - case 0x04: case 0x05: %DIRECT; %LSR8; return; - case 0x06: %DIRECT; %ROR8; return; - case 0x07: %DIRECT; %ASR8; return; - case 0x08: %DIRECT; %ASL8; return; - case 0x09: %DIRECT; %ROL8; return; - case 0x0A: case 0x0B: %DIRECT; %DEC8; return; - case 0x0C: %DIRECT; %INC8; return; - case 0x0D: %DIRECT; %TST8; return; - case 0x0E: %DIRECT; %JMP; return; - case 0x0F: %DIRECT; %CLR8; return; - - case 0x10: %DISPATCH10; return; - case 0x11: %DISPATCH11; return; - case 0x12: %NOP; return; - case 0x13: %SYNC; return; - case 0x16: set_cond(true); %LBRANCH; return; - case 0x17: %LBSR; return; - case 0x19: %DAA; return; - case 0x1A: set_imm(); %ORCC; return; - case 0x1C: set_imm(); %ANDCC; return; - case 0x1D: %SEX; return; - case 0x1E: %EXG; return; - case 0x1F: %TFR; return; - - case 0x20: set_cond(true); %BRANCH; return; - case 0x21: set_cond(false); %BRANCH; return; - case 0x22: set_cond(cond_hi()); %BRANCH; return; - case 0x23: set_cond(!cond_hi()); %BRANCH; return; - case 0x24: set_cond(cond_cc()); %BRANCH; return; - case 0x25: set_cond(!cond_cc()); %BRANCH; return; - case 0x26: set_cond(cond_ne()); %BRANCH; return; - case 0x27: set_cond(!cond_ne()); %BRANCH; return; - case 0x28: set_cond(cond_vc()); %BRANCH; return; - case 0x29: set_cond(!cond_vc()); %BRANCH; return; - case 0x2A: set_cond(cond_pl()); %BRANCH; return; - case 0x2B: set_cond(!cond_pl()); %BRANCH; return; - case 0x2C: set_cond(cond_ge()); %BRANCH; return; - case 0x2D: set_cond(!cond_ge()); %BRANCH; return; - case 0x2E: set_cond(cond_gt()); %BRANCH; return; - case 0x2F: set_cond(!cond_gt()); %BRANCH; return; - - case 0x30: set_regop16(m_x); %INDEXED; %LEA_xy; return; - case 0x31: set_regop16(m_y); %INDEXED; %LEA_xy; return; - case 0x32: set_regop16(m_s); %INDEXED; %LEA_us; return; - case 0x33: set_regop16(m_u); %INDEXED; %LEA_us; return; - case 0x34: %PSHS; return; - case 0x35: %PULS; return; - case 0x36: %PSHU; return; - case 0x37: %PULU; return; - case 0x39: %RTS; return; - case 0x3A: %ABX; return; - case 0x3B: %RTI; return; - case 0x3C: %CWAI; return; - case 0x3D: %MUL; return; - case 0x3F: %SWI; return; - - case 0x40: case 0x41: set_a(); %NEG8; return; - case 0x43: case 0x42: set_a(); %COM8; return; - case 0x44: case 0x45: set_a(); %LSR8; return; - case 0x46: set_a(); %ROR8; return; - case 0x47: set_a(); %ASR8; return; - case 0x48: set_a(); %ASL8; return; - case 0x49: set_a(); %ROL8; return; - case 0x4A: case 0x4B: set_a(); %DEC8; return; - case 0x4C: set_a(); %INC8; return; - case 0x4D: set_a(); %TST8; return; - case 0x4E: set_a(); %JMP; return; - case 0x4F: set_a(); %CLR8; return; - - case 0x50: case 0x51: set_b(); %NEG8; return; - case 0x53: case 0x52: set_b(); %COM8; return; - case 0x54: case 0x55: set_b(); %LSR8; return; - case 0x56: set_b(); %ROR8; return; - case 0x57: set_b(); %ASR8; return; - case 0x58: set_b(); %ASL8; return; - case 0x59: set_b(); %ROL8; return; - case 0x5A: case 0x5B: set_b(); %DEC8; return; - case 0x5C: set_b(); %INC8; return; - case 0x5D: set_b(); %TST8; return; - case 0x5E: set_b(); %JMP; return; - case 0x5F: set_b(); %CLR8; return; - - case 0x60: case 0x61: %INDEXED; %NEG8; return; - case 0x63: case 0x62: %INDEXED; %COM8; return; - case 0x64: case 0x65: %INDEXED; %LSR8; return; - case 0x66: %INDEXED; %ROR8; return; - case 0x67: %INDEXED; %ASR8; return; - case 0x68: %INDEXED; %ASL8; return; - case 0x69: %INDEXED; %ROL8; return; - case 0x6A: case 0x6B: %INDEXED; %DEC8; return; - case 0x6C: %INDEXED; %INC8; return; - case 0x6D: %INDEXED; %TST8; return; - case 0x6E: %INDEXED; %JMP; return; - case 0x6F: %INDEXED; %CLR8; return; - - case 0x70: case 0x71: %EXTENDED; %NEG8; return; - case 0x73: case 0x72: %EXTENDED; %COM8; return; - case 0x74: case 0x75: %EXTENDED; %LSR8; return; - case 0x76: %EXTENDED; %ROR8; return; - case 0x77: %EXTENDED; %ASR8; return; - case 0x78: %EXTENDED; %ASL8; return; - case 0x79: %EXTENDED; %ROL8; return; - case 0x7A: case 0x7B: %EXTENDED; %DEC8; return; - case 0x7C: %EXTENDED; %INC8; return; - case 0x7D: %EXTENDED; %TST8; return; - case 0x7E: %EXTENDED; %JMP; return; - case 0x7F: %EXTENDED; %CLR8; return; - - case 0x80: set_regop8(m_q.r.a); set_imm(); %SUB8; return; - case 0x81: set_regop8(m_q.r.a); set_imm(); %CMP8; return; - case 0x82: set_regop8(m_q.r.a); set_imm(); %SBC8; return; - case 0x83: set_regop16(m_q.p.d); set_imm(); %SUB16; return; - case 0x84: set_regop8(m_q.r.a); set_imm(); %AND8; return; - case 0x85: set_regop8(m_q.r.a); set_imm(); %BIT8; return; - case 0x86: set_regop8(m_q.r.a); set_imm(); %LD8; return; - case 0x87: set_regop8(m_q.r.a); set_imm(); %ST8; return; - case 0x88: set_regop8(m_q.r.a); set_imm(); %EOR8; return; - case 0x89: set_regop8(m_q.r.a); set_imm(); %ADC8; return; - case 0x8A: set_regop8(m_q.r.a); set_imm(); %OR8; return; - case 0x8B: set_regop8(m_q.r.a); set_imm(); %ADD8; return; - case 0x8C: set_regop16(m_x); set_imm(); %CMP16; return; - case 0x8D: %BSR; return; - case 0x8E: set_regop16(m_x); set_imm(); %LD16; return; - case 0x8F: set_regop16(m_x); set_imm(); %ST16; return; - - case 0x90: set_regop8(m_q.r.a); %DIRECT; %SUB8; return; - case 0x91: set_regop8(m_q.r.a); %DIRECT; %CMP8; return; - case 0x92: set_regop8(m_q.r.a); %DIRECT; %SBC8; return; - case 0x93: set_regop16(m_q.p.d); %DIRECT; %SUB16; return; - case 0x94: set_regop8(m_q.r.a); %DIRECT; %AND8; return; - case 0x95: set_regop8(m_q.r.a); %DIRECT; %BIT8; return; - case 0x96: set_regop8(m_q.r.a); %DIRECT; %LD8; return; - case 0x97: set_regop8(m_q.r.a); %DIRECT; %ST8; return; - case 0x98: set_regop8(m_q.r.a); %DIRECT; %EOR8; return; - case 0x99: set_regop8(m_q.r.a); %DIRECT; %ADC8; return; - case 0x9A: set_regop8(m_q.r.a); %DIRECT; %OR8; return; - case 0x9B: set_regop8(m_q.r.a); %DIRECT; %ADD8; return; - case 0x9C: set_regop16(m_x); %DIRECT; %CMP16; return; - case 0x9D: %DIRECT; %JSR; return; - case 0x9E: set_regop16(m_x); %DIRECT; %LD16; return; - case 0x9F: set_regop16(m_x); %DIRECT; %ST16; return; - - case 0xA0: set_regop8(m_q.r.a); %INDEXED; %SUB8; return; - case 0xA1: set_regop8(m_q.r.a); %INDEXED; %CMP8; return; - case 0xA2: set_regop8(m_q.r.a); %INDEXED; %SBC8; return; - case 0xA3: set_regop16(m_q.p.d); %INDEXED; %SUB16; return; - case 0xA4: set_regop8(m_q.r.a); %INDEXED; %AND8; return; - case 0xA5: set_regop8(m_q.r.a); %INDEXED; %BIT8; return; - case 0xA6: set_regop8(m_q.r.a); %INDEXED; %LD8; return; - case 0xA7: set_regop8(m_q.r.a); %INDEXED; %ST8; return; - case 0xA8: set_regop8(m_q.r.a); %INDEXED; %EOR8; return; - case 0xA9: set_regop8(m_q.r.a); %INDEXED; %ADC8; return; - case 0xAA: set_regop8(m_q.r.a); %INDEXED; %OR8; return; - case 0xAB: set_regop8(m_q.r.a); %INDEXED; %ADD8; return; - case 0xAC: set_regop16(m_x); %INDEXED; %CMP16; return; - case 0xAD: %INDEXED; %JSR; return; - case 0xAE: set_regop16(m_x); %INDEXED; %LD16; return; - case 0xAF: set_regop16(m_x); %INDEXED; %ST16; return; - - case 0xB0: set_regop8(m_q.r.a); %EXTENDED; %SUB8; return; - case 0xB1: set_regop8(m_q.r.a); %EXTENDED; %CMP8; return; - case 0xB2: set_regop8(m_q.r.a); %EXTENDED; %SBC8; return; - case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %SUB16; return; - case 0xB4: set_regop8(m_q.r.a); %EXTENDED; %AND8; return; - case 0xB5: set_regop8(m_q.r.a); %EXTENDED; %BIT8; return; - case 0xB6: set_regop8(m_q.r.a); %EXTENDED; %LD8; return; - case 0xB7: set_regop8(m_q.r.a); %EXTENDED; %ST8; return; - case 0xB8: set_regop8(m_q.r.a); %EXTENDED; %EOR8; return; - case 0xB9: set_regop8(m_q.r.a); %EXTENDED; %ADC8; return; - case 0xBA: set_regop8(m_q.r.a); %EXTENDED; %OR8; return; - case 0xBB: set_regop8(m_q.r.a); %EXTENDED; %ADD8; return; - case 0xBC: set_regop16(m_x); %EXTENDED; %CMP16; return; - case 0xBD: %EXTENDED; %JSR; return; - case 0xBE: set_regop16(m_x); %EXTENDED; %LD16; return; - case 0xBF: set_regop16(m_x); %EXTENDED; %ST16; return; - - case 0xC0: set_regop8(m_q.r.b); set_imm(); %SUB8; return; - case 0xC1: set_regop8(m_q.r.b); set_imm(); %CMP8; return; - case 0xC2: set_regop8(m_q.r.b); set_imm(); %SBC8; return; - case 0xC3: set_regop16(m_q.p.d); set_imm(); %ADD16; return; - case 0xC4: set_regop8(m_q.r.b); set_imm(); %AND8; return; - case 0xC5: set_regop8(m_q.r.b); set_imm(); %BIT8; return; - case 0xC6: set_regop8(m_q.r.b); set_imm(); %LD8; return; - case 0xC7: set_regop8(m_q.r.b); set_imm(); %ST8; return; - case 0xC8: set_regop8(m_q.r.b); set_imm(); %EOR8; return; - case 0xC9: set_regop8(m_q.r.b); set_imm(); %ADC8; return; - case 0xCA: set_regop8(m_q.r.b); set_imm(); %OR8; return; - case 0xCB: set_regop8(m_q.r.b); set_imm(); %ADD8; return; - case 0xCC: set_regop16(m_q.p.d); set_imm(); %LD16; return; - case 0xCD: set_regop16(m_q.p.d); set_imm(); %ST16; return; - case 0xCE: set_regop16(m_u); set_imm(); %LD16; return; - case 0xCF: set_regop16(m_u); set_imm(); %ST16; return; - - case 0xD0: set_regop8(m_q.r.b); %DIRECT; %SUB8; return; - case 0xD1: set_regop8(m_q.r.b); %DIRECT; %CMP8; return; - case 0xD2: set_regop8(m_q.r.b); %DIRECT; %SBC8; return; - case 0xD3: set_regop16(m_q.p.d); %DIRECT; %ADD16; return; - case 0xD4: set_regop8(m_q.r.b); %DIRECT; %AND8; return; - case 0xD5: set_regop8(m_q.r.b); %DIRECT; %BIT8; return; - case 0xD6: set_regop8(m_q.r.b); %DIRECT; %LD8; return; - case 0xD7: set_regop8(m_q.r.b); %DIRECT; %ST8; return; - case 0xD8: set_regop8(m_q.r.b); %DIRECT; %EOR8; return; - case 0xD9: set_regop8(m_q.r.b); %DIRECT; %ADC8; return; - case 0xDA: set_regop8(m_q.r.b); %DIRECT; %OR8; return; - case 0xDB: set_regop8(m_q.r.b); %DIRECT; %ADD8; return; - case 0xDC: set_regop16(m_q.p.d); %DIRECT; %LD16; return; - case 0xDD: set_regop16(m_q.p.d); %DIRECT; %ST16; return; - case 0xDE: set_regop16(m_u); %DIRECT; %LD16; return; - case 0xDF: set_regop16(m_u); %DIRECT; %ST16; return; - - case 0xE0: set_regop8(m_q.r.b); %INDEXED; %SUB8; return; - case 0xE1: set_regop8(m_q.r.b); %INDEXED; %CMP8; return; - case 0xE2: set_regop8(m_q.r.b); %INDEXED; %SBC8; return; - case 0xE3: set_regop16(m_q.p.d); %INDEXED; %ADD16; return; - case 0xE4: set_regop8(m_q.r.b); %INDEXED; %AND8; return; - case 0xE5: set_regop8(m_q.r.b); %INDEXED; %BIT8; return; - case 0xE6: set_regop8(m_q.r.b); %INDEXED; %LD8; return; - case 0xE7: set_regop8(m_q.r.b); %INDEXED; %ST8; return; - case 0xE8: set_regop8(m_q.r.b); %INDEXED; %EOR8; return; - case 0xE9: set_regop8(m_q.r.b); %INDEXED; %ADC8; return; - case 0xEA: set_regop8(m_q.r.b); %INDEXED; %OR8; return; - case 0xEB: set_regop8(m_q.r.b); %INDEXED; %ADD8; return; - case 0xEC: set_regop16(m_q.p.d); %INDEXED; %LD16; return; - case 0xED: set_regop16(m_q.p.d); %INDEXED; %ST16; return; - case 0xEE: set_regop16(m_u); %INDEXED; %LD16; return; - case 0xEF: set_regop16(m_u); %INDEXED; %ST16; return; - - case 0xF0: set_regop8(m_q.r.b); %EXTENDED; %SUB8; return; - case 0xF1: set_regop8(m_q.r.b); %EXTENDED; %CMP8; return; - case 0xF2: set_regop8(m_q.r.b); %EXTENDED; %SBC8; return; - case 0xF3: set_regop16(m_q.p.d); %EXTENDED; %ADD16; return; - case 0xF4: set_regop8(m_q.r.b); %EXTENDED; %AND8; return; - case 0xF5: set_regop8(m_q.r.b); %EXTENDED; %BIT8; return; - case 0xF6: set_regop8(m_q.r.b); %EXTENDED; %LD8; return; - case 0xF7: set_regop8(m_q.r.b); %EXTENDED; %ST8; return; - case 0xF8: set_regop8(m_q.r.b); %EXTENDED; %EOR8; return; - case 0xF9: set_regop8(m_q.r.b); %EXTENDED; %ADC8; return; - case 0xFA: set_regop8(m_q.r.b); %EXTENDED; %OR8; return; - case 0xFB: set_regop8(m_q.r.b); %EXTENDED; %ADD8; return; - case 0xFC: set_regop16(m_q.p.d); %EXTENDED; %LD16; return; - case 0xFD: set_regop16(m_q.p.d); %EXTENDED; %ST16; return; - case 0xFE: set_regop16(m_u); %EXTENDED; %LD16; return; - case 0xFF: set_regop16(m_u); %EXTENDED; %ST16; return; - default: %ILLEGAL; return; + case 0x00: case 0x01: %DIRECT; %NEG8; return; + case 0x03: case 0x02: %DIRECT; %COM8; return; + case 0x04: case 0x05: %DIRECT; %LSR8; return; + case 0x06: %DIRECT; %ROR8; return; + case 0x07: %DIRECT; %ASR8; return; + case 0x08: %DIRECT; %ASL8; return; + case 0x09: %DIRECT; %ROL8; return; + case 0x0A: case 0x0B: %DIRECT; %DEC8; return; + case 0x0C: %DIRECT; %INC8; return; + case 0x0D: %DIRECT; %TST8; return; + case 0x0E: %DIRECT; %JMP; return; + case 0x0F: %DIRECT; %CLR8; return; + + case 0x10: %DISPATCH10; return; + case 0x11: %DISPATCH11; return; + case 0x12: %NOP; return; + case 0x13: %SYNC; return; + case 0x16: set_cond(true); %LBRANCH; return; + case 0x17: %LBSR; return; + case 0x19: %DAA; return; + case 0x1A: set_imm(); %ORCC; return; + case 0x1C: set_imm(); %ANDCC; return; + case 0x1D: %SEX; return; + case 0x1E: %EXG; return; + case 0x1F: %TFR; return; + + case 0x20: set_cond(true); %BRANCH; return; + case 0x21: set_cond(false); %BRANCH; return; + case 0x22: set_cond(cond_hi()); %BRANCH; return; + case 0x23: set_cond(!cond_hi()); %BRANCH; return; + case 0x24: set_cond(cond_cc()); %BRANCH; return; + case 0x25: set_cond(!cond_cc()); %BRANCH; return; + case 0x26: set_cond(cond_ne()); %BRANCH; return; + case 0x27: set_cond(!cond_ne()); %BRANCH; return; + case 0x28: set_cond(cond_vc()); %BRANCH; return; + case 0x29: set_cond(!cond_vc()); %BRANCH; return; + case 0x2A: set_cond(cond_pl()); %BRANCH; return; + case 0x2B: set_cond(!cond_pl()); %BRANCH; return; + case 0x2C: set_cond(cond_ge()); %BRANCH; return; + case 0x2D: set_cond(!cond_ge()); %BRANCH; return; + case 0x2E: set_cond(cond_gt()); %BRANCH; return; + case 0x2F: set_cond(!cond_gt()); %BRANCH; return; + + case 0x30: set_regop16(m_x); %INDEXED; %LEA_xy; return; + case 0x31: set_regop16(m_y); %INDEXED; %LEA_xy; return; + case 0x32: set_regop16(m_s); %INDEXED; %LEA_us; return; + case 0x33: set_regop16(m_u); %INDEXED; %LEA_us; return; + case 0x34: %PSHS; return; + case 0x35: %PULS; return; + case 0x36: %PSHU; return; + case 0x37: %PULU; return; + case 0x39: %RTS; return; + case 0x3A: %ABX; return; + case 0x3B: %RTI; return; + case 0x3C: %CWAI; return; + case 0x3D: %MUL; return; + case 0x3F: %SWI; return; + + case 0x40: case 0x41: set_a(); %NEG8; return; + case 0x43: case 0x42: set_a(); %COM8; return; + case 0x44: case 0x45: set_a(); %LSR8; return; + case 0x46: set_a(); %ROR8; return; + case 0x47: set_a(); %ASR8; return; + case 0x48: set_a(); %ASL8; return; + case 0x49: set_a(); %ROL8; return; + case 0x4A: case 0x4B: set_a(); %DEC8; return; + case 0x4C: set_a(); %INC8; return; + case 0x4D: set_a(); %TST8; return; + case 0x4E: set_a(); %JMP; return; + case 0x4F: set_a(); %CLR8; return; + + case 0x50: case 0x51: set_b(); %NEG8; return; + case 0x53: case 0x52: set_b(); %COM8; return; + case 0x54: case 0x55: set_b(); %LSR8; return; + case 0x56: set_b(); %ROR8; return; + case 0x57: set_b(); %ASR8; return; + case 0x58: set_b(); %ASL8; return; + case 0x59: set_b(); %ROL8; return; + case 0x5A: case 0x5B: set_b(); %DEC8; return; + case 0x5C: set_b(); %INC8; return; + case 0x5D: set_b(); %TST8; return; + case 0x5E: set_b(); %JMP; return; + case 0x5F: set_b(); %CLR8; return; + + case 0x60: case 0x61: %INDEXED; %NEG8; return; + case 0x63: case 0x62: %INDEXED; %COM8; return; + case 0x64: case 0x65: %INDEXED; %LSR8; return; + case 0x66: %INDEXED; %ROR8; return; + case 0x67: %INDEXED; %ASR8; return; + case 0x68: %INDEXED; %ASL8; return; + case 0x69: %INDEXED; %ROL8; return; + case 0x6A: case 0x6B: %INDEXED; %DEC8; return; + case 0x6C: %INDEXED; %INC8; return; + case 0x6D: %INDEXED; %TST8; return; + case 0x6E: %INDEXED; %JMP; return; + case 0x6F: %INDEXED; %CLR8; return; + + case 0x70: case 0x71: %EXTENDED; %NEG8; return; + case 0x73: case 0x72: %EXTENDED; %COM8; return; + case 0x74: case 0x75: %EXTENDED; %LSR8; return; + case 0x76: %EXTENDED; %ROR8; return; + case 0x77: %EXTENDED; %ASR8; return; + case 0x78: %EXTENDED; %ASL8; return; + case 0x79: %EXTENDED; %ROL8; return; + case 0x7A: case 0x7B: %EXTENDED; %DEC8; return; + case 0x7C: %EXTENDED; %INC8; return; + case 0x7D: %EXTENDED; %TST8; return; + case 0x7E: %EXTENDED; %JMP; return; + case 0x7F: %EXTENDED; %CLR8; return; + + case 0x80: set_regop8(m_q.r.a); set_imm(); %SUB8; return; + case 0x81: set_regop8(m_q.r.a); set_imm(); %CMP8; return; + case 0x82: set_regop8(m_q.r.a); set_imm(); %SBC8; return; + case 0x83: set_regop16(m_q.p.d); set_imm(); %SUB16; return; + case 0x84: set_regop8(m_q.r.a); set_imm(); %AND8; return; + case 0x85: set_regop8(m_q.r.a); set_imm(); %BIT8; return; + case 0x86: set_regop8(m_q.r.a); set_imm(); %LD8; return; + case 0x87: set_regop8(m_q.r.a); set_imm(); %ST8; return; + case 0x88: set_regop8(m_q.r.a); set_imm(); %EOR8; return; + case 0x89: set_regop8(m_q.r.a); set_imm(); %ADC8; return; + case 0x8A: set_regop8(m_q.r.a); set_imm(); %OR8; return; + case 0x8B: set_regop8(m_q.r.a); set_imm(); %ADD8; return; + case 0x8C: set_regop16(m_x); set_imm(); %CMP16; return; + case 0x8D: %BSR; return; + case 0x8E: set_regop16(m_x); set_imm(); %LD16; return; + case 0x8F: set_regop16(m_x); set_imm(); %ST16; return; + + case 0x90: set_regop8(m_q.r.a); %DIRECT; %SUB8; return; + case 0x91: set_regop8(m_q.r.a); %DIRECT; %CMP8; return; + case 0x92: set_regop8(m_q.r.a); %DIRECT; %SBC8; return; + case 0x93: set_regop16(m_q.p.d); %DIRECT; %SUB16; return; + case 0x94: set_regop8(m_q.r.a); %DIRECT; %AND8; return; + case 0x95: set_regop8(m_q.r.a); %DIRECT; %BIT8; return; + case 0x96: set_regop8(m_q.r.a); %DIRECT; %LD8; return; + case 0x97: set_regop8(m_q.r.a); %DIRECT; %ST8; return; + case 0x98: set_regop8(m_q.r.a); %DIRECT; %EOR8; return; + case 0x99: set_regop8(m_q.r.a); %DIRECT; %ADC8; return; + case 0x9A: set_regop8(m_q.r.a); %DIRECT; %OR8; return; + case 0x9B: set_regop8(m_q.r.a); %DIRECT; %ADD8; return; + case 0x9C: set_regop16(m_x); %DIRECT; %CMP16; return; + case 0x9D: %DIRECT; %JSR; return; + case 0x9E: set_regop16(m_x); %DIRECT; %LD16; return; + case 0x9F: set_regop16(m_x); %DIRECT; %ST16; return; + + case 0xA0: set_regop8(m_q.r.a); %INDEXED; %SUB8; return; + case 0xA1: set_regop8(m_q.r.a); %INDEXED; %CMP8; return; + case 0xA2: set_regop8(m_q.r.a); %INDEXED; %SBC8; return; + case 0xA3: set_regop16(m_q.p.d); %INDEXED; %SUB16; return; + case 0xA4: set_regop8(m_q.r.a); %INDEXED; %AND8; return; + case 0xA5: set_regop8(m_q.r.a); %INDEXED; %BIT8; return; + case 0xA6: set_regop8(m_q.r.a); %INDEXED; %LD8; return; + case 0xA7: set_regop8(m_q.r.a); %INDEXED; %ST8; return; + case 0xA8: set_regop8(m_q.r.a); %INDEXED; %EOR8; return; + case 0xA9: set_regop8(m_q.r.a); %INDEXED; %ADC8; return; + case 0xAA: set_regop8(m_q.r.a); %INDEXED; %OR8; return; + case 0xAB: set_regop8(m_q.r.a); %INDEXED; %ADD8; return; + case 0xAC: set_regop16(m_x); %INDEXED; %CMP16; return; + case 0xAD: %INDEXED; %JSR; return; + case 0xAE: set_regop16(m_x); %INDEXED; %LD16; return; + case 0xAF: set_regop16(m_x); %INDEXED; %ST16; return; + + case 0xB0: set_regop8(m_q.r.a); %EXTENDED; %SUB8; return; + case 0xB1: set_regop8(m_q.r.a); %EXTENDED; %CMP8; return; + case 0xB2: set_regop8(m_q.r.a); %EXTENDED; %SBC8; return; + case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %SUB16; return; + case 0xB4: set_regop8(m_q.r.a); %EXTENDED; %AND8; return; + case 0xB5: set_regop8(m_q.r.a); %EXTENDED; %BIT8; return; + case 0xB6: set_regop8(m_q.r.a); %EXTENDED; %LD8; return; + case 0xB7: set_regop8(m_q.r.a); %EXTENDED; %ST8; return; + case 0xB8: set_regop8(m_q.r.a); %EXTENDED; %EOR8; return; + case 0xB9: set_regop8(m_q.r.a); %EXTENDED; %ADC8; return; + case 0xBA: set_regop8(m_q.r.a); %EXTENDED; %OR8; return; + case 0xBB: set_regop8(m_q.r.a); %EXTENDED; %ADD8; return; + case 0xBC: set_regop16(m_x); %EXTENDED; %CMP16; return; + case 0xBD: %EXTENDED; %JSR; return; + case 0xBE: set_regop16(m_x); %EXTENDED; %LD16; return; + case 0xBF: set_regop16(m_x); %EXTENDED; %ST16; return; + + case 0xC0: set_regop8(m_q.r.b); set_imm(); %SUB8; return; + case 0xC1: set_regop8(m_q.r.b); set_imm(); %CMP8; return; + case 0xC2: set_regop8(m_q.r.b); set_imm(); %SBC8; return; + case 0xC3: set_regop16(m_q.p.d); set_imm(); %ADD16; return; + case 0xC4: set_regop8(m_q.r.b); set_imm(); %AND8; return; + case 0xC5: set_regop8(m_q.r.b); set_imm(); %BIT8; return; + case 0xC6: set_regop8(m_q.r.b); set_imm(); %LD8; return; + case 0xC7: set_regop8(m_q.r.b); set_imm(); %ST8; return; + case 0xC8: set_regop8(m_q.r.b); set_imm(); %EOR8; return; + case 0xC9: set_regop8(m_q.r.b); set_imm(); %ADC8; return; + case 0xCA: set_regop8(m_q.r.b); set_imm(); %OR8; return; + case 0xCB: set_regop8(m_q.r.b); set_imm(); %ADD8; return; + case 0xCC: set_regop16(m_q.p.d); set_imm(); %LD16; return; + case 0xCD: set_regop16(m_q.p.d); set_imm(); %ST16; return; + case 0xCE: set_regop16(m_u); set_imm(); %LD16; return; + case 0xCF: set_regop16(m_u); set_imm(); %ST16; return; + + case 0xD0: set_regop8(m_q.r.b); %DIRECT; %SUB8; return; + case 0xD1: set_regop8(m_q.r.b); %DIRECT; %CMP8; return; + case 0xD2: set_regop8(m_q.r.b); %DIRECT; %SBC8; return; + case 0xD3: set_regop16(m_q.p.d); %DIRECT; %ADD16; return; + case 0xD4: set_regop8(m_q.r.b); %DIRECT; %AND8; return; + case 0xD5: set_regop8(m_q.r.b); %DIRECT; %BIT8; return; + case 0xD6: set_regop8(m_q.r.b); %DIRECT; %LD8; return; + case 0xD7: set_regop8(m_q.r.b); %DIRECT; %ST8; return; + case 0xD8: set_regop8(m_q.r.b); %DIRECT; %EOR8; return; + case 0xD9: set_regop8(m_q.r.b); %DIRECT; %ADC8; return; + case 0xDA: set_regop8(m_q.r.b); %DIRECT; %OR8; return; + case 0xDB: set_regop8(m_q.r.b); %DIRECT; %ADD8; return; + case 0xDC: set_regop16(m_q.p.d); %DIRECT; %LD16; return; + case 0xDD: set_regop16(m_q.p.d); %DIRECT; %ST16; return; + case 0xDE: set_regop16(m_u); %DIRECT; %LD16; return; + case 0xDF: set_regop16(m_u); %DIRECT; %ST16; return; + + case 0xE0: set_regop8(m_q.r.b); %INDEXED; %SUB8; return; + case 0xE1: set_regop8(m_q.r.b); %INDEXED; %CMP8; return; + case 0xE2: set_regop8(m_q.r.b); %INDEXED; %SBC8; return; + case 0xE3: set_regop16(m_q.p.d); %INDEXED; %ADD16; return; + case 0xE4: set_regop8(m_q.r.b); %INDEXED; %AND8; return; + case 0xE5: set_regop8(m_q.r.b); %INDEXED; %BIT8; return; + case 0xE6: set_regop8(m_q.r.b); %INDEXED; %LD8; return; + case 0xE7: set_regop8(m_q.r.b); %INDEXED; %ST8; return; + case 0xE8: set_regop8(m_q.r.b); %INDEXED; %EOR8; return; + case 0xE9: set_regop8(m_q.r.b); %INDEXED; %ADC8; return; + case 0xEA: set_regop8(m_q.r.b); %INDEXED; %OR8; return; + case 0xEB: set_regop8(m_q.r.b); %INDEXED; %ADD8; return; + case 0xEC: set_regop16(m_q.p.d); %INDEXED; %LD16; return; + case 0xED: set_regop16(m_q.p.d); %INDEXED; %ST16; return; + case 0xEE: set_regop16(m_u); %INDEXED; %LD16; return; + case 0xEF: set_regop16(m_u); %INDEXED; %ST16; return; + + case 0xF0: set_regop8(m_q.r.b); %EXTENDED; %SUB8; return; + case 0xF1: set_regop8(m_q.r.b); %EXTENDED; %CMP8; return; + case 0xF2: set_regop8(m_q.r.b); %EXTENDED; %SBC8; return; + case 0xF3: set_regop16(m_q.p.d); %EXTENDED; %ADD16; return; + case 0xF4: set_regop8(m_q.r.b); %EXTENDED; %AND8; return; + case 0xF5: set_regop8(m_q.r.b); %EXTENDED; %BIT8; return; + case 0xF6: set_regop8(m_q.r.b); %EXTENDED; %LD8; return; + case 0xF7: set_regop8(m_q.r.b); %EXTENDED; %ST8; return; + case 0xF8: set_regop8(m_q.r.b); %EXTENDED; %EOR8; return; + case 0xF9: set_regop8(m_q.r.b); %EXTENDED; %ADC8; return; + case 0xFA: set_regop8(m_q.r.b); %EXTENDED; %OR8; return; + case 0xFB: set_regop8(m_q.r.b); %EXTENDED; %ADD8; return; + case 0xFC: set_regop16(m_q.p.d); %EXTENDED; %LD16; return; + case 0xFD: set_regop16(m_q.p.d); %EXTENDED; %ST16; return; + case 0xFE: set_regop16(m_u); %EXTENDED; %LD16; return; + case 0xFF: set_regop16(m_u); %EXTENDED; %ST16; return; + default: %ILLEGAL; return; } return; @@ -274,52 +274,52 @@ DISPATCH10: @m_opcode = read_opcode(); switch(m_opcode) { - case 0x20: set_cond(true); %LBRANCH; return; - case 0x21: set_cond(false); %LBRANCH; return; - case 0x22: set_cond(cond_hi()); %LBRANCH; return; - case 0x23: set_cond(!cond_hi()); %LBRANCH; return; - case 0x24: set_cond(cond_cc()); %LBRANCH; return; - case 0x25: set_cond(!cond_cc()); %LBRANCH; return; - case 0x26: set_cond(cond_ne()); %LBRANCH; return; - case 0x27: set_cond(!cond_ne()); %LBRANCH; return; - case 0x28: set_cond(cond_vc()); %LBRANCH; return; - case 0x29: set_cond(!cond_vc()); %LBRANCH; return; - case 0x2A: set_cond(cond_pl()); %LBRANCH; return; - case 0x2B: set_cond(!cond_pl()); %LBRANCH; return; - case 0x2C: set_cond(cond_ge()); %LBRANCH; return; - case 0x2D: set_cond(!cond_ge()); %LBRANCH; return; - case 0x2E: set_cond(cond_gt()); %LBRANCH; return; - case 0x2F: set_cond(!cond_gt()); %LBRANCH; return; - - case 0x3F: %SWI2; return; - - case 0x83: set_regop16(m_q.p.d); set_imm(); %CMP16; return; - case 0x8C: set_regop16(m_y); set_imm(); %CMP16; return; - case 0x8E: set_regop16(m_y); set_imm(); %LD16; return; - case 0x8F: set_regop16(m_y); set_imm(); %ST16; return; - case 0x93: set_regop16(m_q.p.d); %DIRECT; %CMP16; return; - case 0x9C: set_regop16(m_y); %DIRECT; %CMP16; return; - case 0x9E: set_regop16(m_y); %DIRECT; %LD16; return; - case 0x9F: set_regop16(m_y); %DIRECT; %ST16; return; - case 0xA3: set_regop16(m_q.p.d); %INDEXED; %CMP16; return; - case 0xAC: set_regop16(m_y); %INDEXED; %CMP16; return; - case 0xAE: set_regop16(m_y); %INDEXED; %LD16; return; - case 0xAF: set_regop16(m_y); %INDEXED; %ST16; return; - case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %CMP16; return; - case 0xBC: set_regop16(m_y); %EXTENDED; %CMP16; return; - case 0xBE: set_regop16(m_y); %EXTENDED; %LD16; return; - case 0xBF: set_regop16(m_y); %EXTENDED; %ST16; return; - - case 0xCE: set_regop16(m_s); set_imm(); %LD16; return; - case 0xCF: set_regop16(m_s); set_imm(); %ST16; return; - case 0xDE: set_regop16(m_s); %DIRECT; %LD16; return; - case 0xDF: set_regop16(m_s); %DIRECT; %ST16; return; - case 0xEE: set_regop16(m_s); %INDEXED; %LD16; return; - case 0xEF: set_regop16(m_s); %INDEXED; %ST16; return; - case 0xFE: set_regop16(m_s); %EXTENDED; %LD16; return; - case 0xFF: set_regop16(m_s); %EXTENDED; %ST16; return; - - default: %ILLEGAL; return; + case 0x20: set_cond(true); %LBRANCH; return; + case 0x21: set_cond(false); %LBRANCH; return; + case 0x22: set_cond(cond_hi()); %LBRANCH; return; + case 0x23: set_cond(!cond_hi()); %LBRANCH; return; + case 0x24: set_cond(cond_cc()); %LBRANCH; return; + case 0x25: set_cond(!cond_cc()); %LBRANCH; return; + case 0x26: set_cond(cond_ne()); %LBRANCH; return; + case 0x27: set_cond(!cond_ne()); %LBRANCH; return; + case 0x28: set_cond(cond_vc()); %LBRANCH; return; + case 0x29: set_cond(!cond_vc()); %LBRANCH; return; + case 0x2A: set_cond(cond_pl()); %LBRANCH; return; + case 0x2B: set_cond(!cond_pl()); %LBRANCH; return; + case 0x2C: set_cond(cond_ge()); %LBRANCH; return; + case 0x2D: set_cond(!cond_ge()); %LBRANCH; return; + case 0x2E: set_cond(cond_gt()); %LBRANCH; return; + case 0x2F: set_cond(!cond_gt()); %LBRANCH; return; + + case 0x3F: %SWI2; return; + + case 0x83: set_regop16(m_q.p.d); set_imm(); %CMP16; return; + case 0x8C: set_regop16(m_y); set_imm(); %CMP16; return; + case 0x8E: set_regop16(m_y); set_imm(); %LD16; return; + case 0x8F: set_regop16(m_y); set_imm(); %ST16; return; + case 0x93: set_regop16(m_q.p.d); %DIRECT; %CMP16; return; + case 0x9C: set_regop16(m_y); %DIRECT; %CMP16; return; + case 0x9E: set_regop16(m_y); %DIRECT; %LD16; return; + case 0x9F: set_regop16(m_y); %DIRECT; %ST16; return; + case 0xA3: set_regop16(m_q.p.d); %INDEXED; %CMP16; return; + case 0xAC: set_regop16(m_y); %INDEXED; %CMP16; return; + case 0xAE: set_regop16(m_y); %INDEXED; %LD16; return; + case 0xAF: set_regop16(m_y); %INDEXED; %ST16; return; + case 0xB3: set_regop16(m_q.p.d); %EXTENDED; %CMP16; return; + case 0xBC: set_regop16(m_y); %EXTENDED; %CMP16; return; + case 0xBE: set_regop16(m_y); %EXTENDED; %LD16; return; + case 0xBF: set_regop16(m_y); %EXTENDED; %ST16; return; + + case 0xCE: set_regop16(m_s); set_imm(); %LD16; return; + case 0xCF: set_regop16(m_s); set_imm(); %ST16; return; + case 0xDE: set_regop16(m_s); %DIRECT; %LD16; return; + case 0xDF: set_regop16(m_s); %DIRECT; %ST16; return; + case 0xEE: set_regop16(m_s); %INDEXED; %LD16; return; + case 0xEF: set_regop16(m_s); %INDEXED; %ST16; return; + case 0xFE: set_regop16(m_s); %EXTENDED; %LD16; return; + case 0xFF: set_regop16(m_s); %EXTENDED; %ST16; return; + + default: %ILLEGAL; return; } return; @@ -327,16 +327,16 @@ DISPATCH11: @m_opcode = read_opcode(); switch(m_opcode) { - case 0x3F: %SWI3; return; - case 0x83: set_regop16(m_u); set_imm(); %CMP16; return; - case 0x8C: set_regop16(m_s); set_imm(); %CMP16; return; - case 0x93: set_regop16(m_u); %DIRECT; %CMP16; return; - case 0x9C: set_regop16(m_s); %DIRECT; %CMP16; return; - case 0xA3: set_regop16(m_u); %INDEXED; %CMP16; return; - case 0xAC: set_regop16(m_s); %INDEXED; %CMP16; return; - case 0xB3: set_regop16(m_u); %EXTENDED; %CMP16; return; - case 0xBC: set_regop16(m_s); %EXTENDED; %CMP16; return; - default: %ILLEGAL; return; + case 0x3F: %SWI3; return; + case 0x83: set_regop16(m_u); set_imm(); %CMP16; return; + case 0x8C: set_regop16(m_s); set_imm(); %CMP16; return; + case 0x93: set_regop16(m_u); %DIRECT; %CMP16; return; + case 0x9C: set_regop16(m_s); %DIRECT; %CMP16; return; + case 0xA3: set_regop16(m_u); %INDEXED; %CMP16; return; + case 0xAC: set_regop16(m_s); %INDEXED; %CMP16; return; + case 0xB3: set_regop16(m_u); %EXTENDED; %CMP16; return; + case 0xBC: set_regop16(m_s); %EXTENDED; %CMP16; return; + default: %ILLEGAL; return; } return; @@ -592,7 +592,8 @@ TFR: uint8_t param = read_opcode_arg(); uint16_t reg = read_tfr_exg_816_register(param >> 4); write_exgtfr_register(param >> 0, reg); - if ((param & 0x0F) == 4) { + if ((param & 0x0F) == 4) + { m_lds_encountered = true; } } -- cgit v1.2.3