From 74fa8ec1585fe4ce7dd906216ab51755962177c9 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 24 Aug 2022 03:45:50 +1000 Subject: -nintendo/gb.cpp: Use taps to handle the boot ROM overlay. -Moved some stuff out of misc and skeleton: * Moved Innovative Concepts machines to their own project. * Moved various things out of skeleton to existing company projects. --- docs/source/techspecs/luareference.rst | 14 +- scripts/src/bus.lua | 6 +- src/devices/bus/gameboy/carts.cpp | 48 ++ src/devices/bus/gameboy/carts.h | 11 + src/devices/bus/gameboy/mbc.cpp | 452 +++++++++++- src/devices/bus/gameboy/mbc.h | 460 +----------- src/devices/bus/gameboy/rom.cpp | 158 +++- src/devices/bus/gameboy/rom.h | 155 +--- src/mame/apple/newton.cpp | 194 +++++ src/mame/arcade.flt | 16 +- src/mame/hp/hp3478a.cpp | 754 +++++++++++++++++++ src/mame/hp/hpz80unk.cpp | 232 ++++++ src/mame/ibm/ibm3153.cpp | 135 ++++ src/mame/ice/chexx.cpp | 575 +++++++++++++++ src/mame/ice/frenzyxprss.cpp | 132 ++++ src/mame/ice/ice_bozopail.cpp | 79 ++ src/mame/ice/ice_hhhippos.cpp | 94 +++ src/mame/ice/ice_tbd.cpp | 89 +++ src/mame/ice/lethalj.cpp | 1268 ++++++++++++++++++++++++++++++++ src/mame/ice/lethalj.h | 84 +++ src/mame/ice/lethalj_v.cpp | 203 +++++ src/mame/ice/schexx4gen.cpp | 54 ++ src/mame/ice/vp101.cpp | 662 +++++++++++++++++ src/mame/mame.lst | 32 +- src/mame/mess.flt | 16 +- src/mame/misc/chexx.cpp | 575 --------------- src/mame/misc/frenzyxprss.cpp | 132 ---- src/mame/misc/ice_bozopail.cpp | 79 -- src/mame/misc/ice_hhhippos.cpp | 94 --- src/mame/misc/ice_tbd.cpp | 89 --- src/mame/misc/lethalj.cpp | 1268 -------------------------------- src/mame/misc/lethalj.h | 84 --- src/mame/misc/lethalj_v.cpp | 203 ----- src/mame/misc/schexx4gen.cpp | 54 -- src/mame/misc/vp101.cpp | 662 ----------------- src/mame/motorola/ampscarp.cpp | 51 ++ src/mame/motorola/powerstack.cpp | 41 ++ src/mame/nichibutsu/myvision.cpp | 261 +++++++ src/mame/nintendo/gb.cpp | 484 ++++++------ src/mame/skeleton/ampscarp.cpp | 51 -- src/mame/skeleton/hp3478a.cpp | 754 ------------------- src/mame/skeleton/hpz80unk.cpp | 232 ------ src/mame/skeleton/ibm3153.cpp | 135 ---- src/mame/skeleton/myvision.cpp | 257 ------- src/mame/skeleton/newton.cpp | 194 ----- src/mame/skeleton/notetaker.cpp | 998 ------------------------- src/mame/skeleton/powerstack.cpp | 41 -- src/mame/xerox/notetaker.cpp | 998 +++++++++++++++++++++++++ 48 files changed, 6858 insertions(+), 6802 deletions(-) create mode 100644 src/devices/bus/gameboy/carts.cpp create mode 100644 src/devices/bus/gameboy/carts.h create mode 100644 src/mame/apple/newton.cpp create mode 100644 src/mame/hp/hp3478a.cpp create mode 100644 src/mame/hp/hpz80unk.cpp create mode 100644 src/mame/ibm/ibm3153.cpp create mode 100644 src/mame/ice/chexx.cpp create mode 100644 src/mame/ice/frenzyxprss.cpp create mode 100644 src/mame/ice/ice_bozopail.cpp create mode 100644 src/mame/ice/ice_hhhippos.cpp create mode 100644 src/mame/ice/ice_tbd.cpp create mode 100644 src/mame/ice/lethalj.cpp create mode 100644 src/mame/ice/lethalj.h create mode 100644 src/mame/ice/lethalj_v.cpp create mode 100644 src/mame/ice/schexx4gen.cpp create mode 100644 src/mame/ice/vp101.cpp delete mode 100644 src/mame/misc/chexx.cpp delete mode 100644 src/mame/misc/frenzyxprss.cpp delete mode 100644 src/mame/misc/ice_bozopail.cpp delete mode 100644 src/mame/misc/ice_hhhippos.cpp delete mode 100644 src/mame/misc/ice_tbd.cpp delete mode 100644 src/mame/misc/lethalj.cpp delete mode 100644 src/mame/misc/lethalj.h delete mode 100644 src/mame/misc/lethalj_v.cpp delete mode 100644 src/mame/misc/schexx4gen.cpp delete mode 100644 src/mame/misc/vp101.cpp create mode 100644 src/mame/motorola/ampscarp.cpp create mode 100644 src/mame/motorola/powerstack.cpp create mode 100644 src/mame/nichibutsu/myvision.cpp delete mode 100644 src/mame/skeleton/ampscarp.cpp delete mode 100644 src/mame/skeleton/hp3478a.cpp delete mode 100644 src/mame/skeleton/hpz80unk.cpp delete mode 100644 src/mame/skeleton/ibm3153.cpp delete mode 100644 src/mame/skeleton/myvision.cpp delete mode 100644 src/mame/skeleton/newton.cpp delete mode 100644 src/mame/skeleton/notetaker.cpp delete mode 100644 src/mame/skeleton/powerstack.cpp create mode 100644 src/mame/xerox/notetaker.cpp diff --git a/docs/source/techspecs/luareference.rst b/docs/source/techspecs/luareference.rst index 8e1f4151936..b1d4334e9fb 100644 --- a/docs/source/techspecs/luareference.rst +++ b/docs/source/techspecs/luareference.rst @@ -1502,9 +1502,10 @@ space:install_read_tap(start, end, name, callback) a string, and the callback must be a function. The callback is passed three arguments for the access offset, the data read, - and the memory access mask. To modify the data being read, return the - modified value from the callback function as an integer. If the callback - does not return an integer, the data will not be modified. + and the memory access mask. The offset is the absolute offset into the + address space. To modify the data being read, return the modified value + from the callback function as an integer. If the callback does not return + an integer, the data will not be modified. space:install_write_tap(start, end, name, callback) Installs a :ref:`pass-through handler ` that will receive notifications on write to the specified range of addresses in the @@ -1512,9 +1513,10 @@ space:install_write_tap(start, end, name, callback) a string, and the callback must be a function. The callback is passed three arguments for the access offset, the data - written, and the memory access mask. To modify the data being written, - return the modified value from the callback function as an integer. If the - callback does not return an integer, the data will not be modified. + written, and the memory access mask. The offset is the absolute offset into + the address space. To modify the data being written, return the modified + value from the callback function as an integer. If the callback does not + return an integer, the data will not be modified. Properties ^^^^^^^^^^ diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index a19c320559e..465892d47e6 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -3685,12 +3685,14 @@ end if (BUSES["GAMEBOY"]~=null) then files { + MAME_DIR .. "src/devices/bus/gameboy/carts.cpp", + MAME_DIR .. "src/devices/bus/gameboy/carts.h", + MAME_DIR .. "src/devices/bus/gameboy/mbc.cpp", + MAME_DIR .. "src/devices/bus/gameboy/mbc.h", MAME_DIR .. "src/devices/bus/gameboy/gb_slot.cpp", MAME_DIR .. "src/devices/bus/gameboy/gb_slot.h", MAME_DIR .. "src/devices/bus/gameboy/rom.cpp", MAME_DIR .. "src/devices/bus/gameboy/rom.h", - MAME_DIR .. "src/devices/bus/gameboy/mbc.cpp", - MAME_DIR .. "src/devices/bus/gameboy/mbc.h", } end diff --git a/src/devices/bus/gameboy/carts.cpp b/src/devices/bus/gameboy/carts.cpp new file mode 100644 index 00000000000..69655ab1145 --- /dev/null +++ b/src/devices/bus/gameboy/carts.cpp @@ -0,0 +1,48 @@ +// license:BSD-3-Clause +// copyright-holders:Wilbert Pol + +#include "emu.h" +#include "carts.h" + +#include "mbc.h" +#include "rom.h" + + +void gameboy_cartridges(device_slot_interface &device) +{ + device.option_add_internal("rom", GB_STD_ROM); + device.option_add_internal("rom_mbc1", GB_ROM_MBC1); + device.option_add_internal("rom_mbc1col", GB_ROM_MBC1); + device.option_add_internal("rom_mbc2", GB_ROM_MBC2); + device.option_add_internal("rom_mbc3", GB_ROM_MBC3); + device.option_add_internal("rom_huc1", GB_ROM_MBC3); + device.option_add_internal("rom_huc3", GB_ROM_MBC3); + device.option_add_internal("rom_mbc5", GB_ROM_MBC5); + device.option_add_internal("rom_mbc6", GB_ROM_MBC6); + device.option_add_internal("rom_mbc7", GB_ROM_MBC7); + device.option_add_internal("rom_tama5", GB_ROM_TAMA5); + device.option_add_internal("rom_mmm01", GB_ROM_MMM01); + device.option_add_internal("rom_m161", GB_ROM_M161); + device.option_add_internal("rom_sachen1", GB_ROM_SACHEN1); + device.option_add_internal("rom_sachen2", GB_ROM_SACHEN2); + device.option_add_internal("rom_wisdom", GB_ROM_WISDOM); + device.option_add_internal("rom_yong", GB_ROM_YONG); + device.option_add_internal("rom_lasama", GB_ROM_LASAMA); + device.option_add_internal("rom_atvrac", GB_ROM_ATVRAC); + device.option_add_internal("rom_camera", GB_ROM_CAMERA); + device.option_add_internal("rom_188in1", GB_ROM_188IN1); + device.option_add_internal("rom_sintax", GB_ROM_SINTAX); + device.option_add_internal("rom_chong", GB_ROM_CHONGWU); + device.option_add_internal("rom_licheng", GB_ROM_LICHENG); + device.option_add_internal("rom_digimon", GB_ROM_DIGIMON); + device.option_add_internal("rom_rock8", GB_ROM_ROCKMAN8); + device.option_add_internal("rom_sm3sp", GB_ROM_SM3SP); +// device.option_add_internal("rom_dkong5", GB_ROM_DKONG5); +// device.option_add_internal("rom_unk01", GB_ROM_UNK01); +} + + +void megaduck_cartridges(device_slot_interface &device) +{ + device.option_add_internal("rom", MEGADUCK_ROM); +} diff --git a/src/devices/bus/gameboy/carts.h b/src/devices/bus/gameboy/carts.h new file mode 100644 index 00000000000..269a9a9be31 --- /dev/null +++ b/src/devices/bus/gameboy/carts.h @@ -0,0 +1,11 @@ +// license:BSD-3-Clause +// copyright-holders:Wilbert Pol +#ifndef MAME_BUS_GAMEBOY_CARTS_H +#define MAME_BUS_GAMEBOY_CARTS_H + +#pragma once + +void gameboy_cartridges(device_slot_interface &device); +void megaduck_cartridges(device_slot_interface &device); + +#endif // MAME_BUS_GAMEBOY_CARTS_H diff --git a/src/devices/bus/gameboy/mbc.cpp b/src/devices/bus/gameboy/mbc.cpp index 7f32f01cc30..2a07d390a60 100644 --- a/src/devices/bus/gameboy/mbc.cpp +++ b/src/devices/bus/gameboy/mbc.cpp @@ -186,30 +186,419 @@ #include "mbc.h" +namespace { + +class gb_rom_mbc_device : public device_t, public device_gb_cart_interface +{ +public: + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // construction/destruction + gb_rom_mbc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } + + void shared_start(); + void shared_reset(); + + uint8_t m_ram_enable; +}; + + +class gb_rom_mbc1_device : public gb_rom_mbc_device +{ +public: + + // construction/destruction + gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + enum { + MODE_16M_64k = 0, /// 16Mbit ROM, 64kBit RAM + MODE_4M_256k = 1 /// 4Mbit ROM, 256kBit RAM + }; + + gb_rom_mbc1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_start() override { shared_start(); save_item(NAME(m_mode)); } + virtual void device_reset() override { shared_reset(); m_mode = MODE_16M_64k; } + virtual void set_additional_wirings(uint8_t mask, int shift) override { m_mask = mask; m_shift = shift; } // these get set at cart loading + + uint8_t m_mode, m_mask; + int m_shift; +}; + + +class gb_rom_mbc2_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_mbc2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } +}; + + +class gb_rom_mbc3_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_mbc3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + +private: + void update_rtc(); + uint8_t m_rtc_regs[5]; + int m_rtc_ready; +}; + + +class gb_rom_mbc5_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_mbc5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + gb_rom_mbc5_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_start() override { shared_start(); m_rumble.resolve(); } + virtual void device_reset() override { shared_reset(); } + + output_finder<> m_rumble; +}; + + +class gb_rom_mbc6_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_mbc6_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + uint16_t m_latch1, m_latch2; + uint8_t m_bank_4000, m_bank_6000; +}; + + +class gb_rom_mbc7_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_mbc7_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } +}; + + +class gb_rom_m161_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_m161_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override { return 0xff; } + virtual void write_ram(offs_t offset, uint8_t data) override { } + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + uint8_t m_base_bank; + uint8_t m_load_disable; +}; + + +class gb_rom_mmm01_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_mmm01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + uint16_t m_romb; + uint8_t m_romb_nwe; + uint8_t m_ramb; + uint8_t m_ramb_nwe; + uint8_t m_mode; + uint8_t m_mode_nwe; + uint8_t m_map; + uint8_t m_mux; +}; + + +class gb_rom_sachen_mmc1_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_sachen_mmc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override { return 0xff; } + virtual void write_ram(offs_t offset, uint8_t data) override { } + +protected: + enum { + MODE_LOCKED, + MODE_UNLOCKED + }; + + gb_rom_sachen_mmc1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + uint8_t m_base_bank, m_mask, m_mode, m_unlock_cnt; +}; + + +class gb_rom_sachen_mmc2_device : public gb_rom_sachen_mmc1_device +{ +public: + // construction/destruction + gb_rom_sachen_mmc2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + enum { + MODE_LOCKED_DMG, + MODE_LOCKED_CGB, + MODE_UNLOCKED + }; + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; +}; + + +class gb_rom_188in1_device : public gb_rom_mbc1_device +{ +public: + // construction/destruction + gb_rom_188in1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); save_item(NAME(m_game_base)); } + virtual void device_reset() override { shared_reset(); m_game_base = 0; } + +private: + uint32_t m_game_base; +}; + + +class gb_rom_sintax_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_sintax_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + void set_xor_for_bank(uint8_t bank); + + uint8_t m_bank_mask, m_bank, m_reg; + + uint8_t m_currentxor, m_xor2, m_xor3, m_xor4, m_xor5, m_sintax_mode; +}; + + +class gb_rom_chongwu_device : public gb_rom_mbc5_device +{ +public: + // construction/destruction + gb_rom_chongwu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + uint8_t m_protection_checked; +}; + + +class gb_rom_licheng_device : public gb_rom_mbc5_device +{ +public: + // construction/destruction + gb_rom_licheng_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void write_bank(offs_t offset, uint8_t data) override; +}; + + +class gb_rom_digimon_device : public gb_rom_mbc5_device +{ +public: + // construction/destruction + gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } + virtual void write_ram(offs_t offset, uint8_t data) override; +}; + + +class gb_rom_rockman8_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } + + uint8_t m_bank_mask, m_bank, m_reg; +}; + + +class gb_rom_sm3sp_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } + + uint8_t m_bank_mask, m_bank, m_reg, m_mode; +}; + + +class gb_rom_camera_device : public gb_rom_mbc_device +{ +public: + // construction/destruction + gb_rom_camera_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + +private: + void update_camera(); + uint8_t m_camera_regs[54]; +}; + + //------------------------------------------------- // gb_rom_mbc*_device - constructor //------------------------------------------------- -DEFINE_DEVICE_TYPE(GB_ROM_MBC1, gb_rom_mbc1_device, "gb_rom_mbc1", "GB MBC1 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_MBC2, gb_rom_mbc2_device, "gb_rom_mbc2", "GB MBC2 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_MBC3, gb_rom_mbc3_device, "gb_rom_mbc3", "GB MBC3 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_MBC5, gb_rom_mbc5_device, "gb_rom_mbc5", "GB MBC5 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_MBC6, gb_rom_mbc6_device, "gb_rom_mbc6", "GB MBC6 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_MBC7, gb_rom_mbc7_device, "gb_rom_mbc7", "GB MBC7 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_M161, gb_rom_m161_device, "gb_rom_m161", "GB M161 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_MMM01, gb_rom_mmm01_device, "gb_rom_mmm01", "GB MMM01 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_SACHEN1, gb_rom_sachen_mmc1_device, "gb_rom_sachen1", "GB Sachen MMC1 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_SACHEN2, gb_rom_sachen_mmc2_device, "gb_rom_sachen2", "GB Sachen MMC2 Carts") -DEFINE_DEVICE_TYPE(GB_ROM_188IN1, gb_rom_188in1_device, "gb_rom_188in1", "GB 188in1") -DEFINE_DEVICE_TYPE(GB_ROM_SINTAX, gb_rom_sintax_device, "gb_rom_sintax", "GB MBC5 Sintax Carts") -DEFINE_DEVICE_TYPE(GB_ROM_CHONGWU, gb_rom_chongwu_device, "gb_rom_chongwu", "GB Chong Wu Xiao Jing Ling") -DEFINE_DEVICE_TYPE(GB_ROM_LICHENG, gb_rom_licheng_device, "gb_rom_licheng", "GB MBC5 Li Cheng Carts") -DEFINE_DEVICE_TYPE(GB_ROM_DIGIMON, gb_rom_digimon_device, "gb_rom_digimon", "GB Digimon") -DEFINE_DEVICE_TYPE(GB_ROM_ROCKMAN8, gb_rom_rockman8_device, "gb_rom_rockman8", "GB MBC1 Rockman 8") -DEFINE_DEVICE_TYPE(GB_ROM_SM3SP, gb_rom_sm3sp_device, "gb_sm3sp", "GB MBC1 Super Mario 3 Special") -DEFINE_DEVICE_TYPE(GB_ROM_CAMERA, gb_rom_camera_device, "gb_rom_camera", "GB Camera") - - gb_rom_mbc_device::gb_rom_mbc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock) , device_gb_cart_interface(mconfig, *this) @@ -1611,3 +2000,26 @@ void gb_rom_camera_device::write_ram(offs_t offset, uint8_t data) m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data; } } + +} // anonymous namespace + + +// device type definition +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_MBC1, device_gb_cart_interface, gb_rom_mbc1_device, "gb_rom_mbc1", "GB MBC1 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_MBC2, device_gb_cart_interface, gb_rom_mbc2_device, "gb_rom_mbc2", "GB MBC2 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_MBC3, device_gb_cart_interface, gb_rom_mbc3_device, "gb_rom_mbc3", "GB MBC3 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_MBC5, device_gb_cart_interface, gb_rom_mbc5_device, "gb_rom_mbc5", "GB MBC5 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_MBC6, device_gb_cart_interface, gb_rom_mbc6_device, "gb_rom_mbc6", "GB MBC6 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_MBC7, device_gb_cart_interface, gb_rom_mbc7_device, "gb_rom_mbc7", "GB MBC7 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_M161, device_gb_cart_interface, gb_rom_m161_device, "gb_rom_m161", "GB M161 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_MMM01, device_gb_cart_interface, gb_rom_mmm01_device, "gb_rom_mmm01", "GB MMM01 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_SACHEN1, device_gb_cart_interface, gb_rom_sachen_mmc1_device, "gb_rom_sachen1", "GB Sachen MMC1 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_SACHEN2, device_gb_cart_interface, gb_rom_sachen_mmc2_device, "gb_rom_sachen2", "GB Sachen MMC2 Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_188IN1, device_gb_cart_interface, gb_rom_188in1_device, "gb_rom_188in1", "GB 188in1") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_SINTAX, device_gb_cart_interface, gb_rom_sintax_device, "gb_rom_sintax", "GB MBC5 Sintax Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_CHONGWU, device_gb_cart_interface, gb_rom_chongwu_device, "gb_rom_chongwu", "GB Chong Wu Xiao Jing Ling") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_LICHENG, device_gb_cart_interface, gb_rom_licheng_device, "gb_rom_licheng", "GB MBC5 Li Cheng Carts") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_DIGIMON, device_gb_cart_interface, gb_rom_digimon_device, "gb_rom_digimon", "GB Digimon") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_ROCKMAN8, device_gb_cart_interface, gb_rom_rockman8_device, "gb_rom_rockman8", "GB MBC1 Rockman 8") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_SM3SP, device_gb_cart_interface, gb_rom_sm3sp_device, "gb_sm3sp", "GB MBC1 Super Mario 3 Special") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_CAMERA, device_gb_cart_interface, gb_rom_camera_device, "gb_rom_camera", "GB Camera") diff --git a/src/devices/bus/gameboy/mbc.h b/src/devices/bus/gameboy/mbc.h index 52e5e56b583..7b0c980ace0 100644 --- a/src/devices/bus/gameboy/mbc.h +++ b/src/devices/bus/gameboy/mbc.h @@ -6,447 +6,23 @@ #include "gb_slot.h" -// ======================> gb_rom_mbc_device - -class gb_rom_mbc_device : public device_t, - public device_gb_cart_interface -{ -public: - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // construction/destruction - gb_rom_mbc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } - - void shared_start(); - void shared_reset(); - - uint8_t m_ram_enable; -}; - -// ======================> gb_rom_mbc1_device - -class gb_rom_mbc1_device : public gb_rom_mbc_device -{ -public: - - // construction/destruction - gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - enum { - MODE_16M_64k = 0, /// 16Mbit ROM, 64kBit RAM - MODE_4M_256k = 1 /// 4Mbit ROM, 256kBit RAM - }; - - gb_rom_mbc1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - // device-level overrides - virtual void device_start() override { shared_start(); save_item(NAME(m_mode)); } - virtual void device_reset() override { shared_reset(); m_mode = MODE_16M_64k; } - virtual void set_additional_wirings(uint8_t mask, int shift) override { m_mask = mask; m_shift = shift; } // these get set at cart loading - - uint8_t m_mode, m_mask; - int m_shift; -}; - -// ======================> gb_rom_mbc2_device - -class gb_rom_mbc2_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_mbc2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } -}; - -// ======================> gb_rom_mbc3_device - -class gb_rom_mbc3_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_mbc3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - -private: - void update_rtc(); - uint8_t m_rtc_regs[5]; - int m_rtc_ready; -}; - -// ======================> gb_rom_mbc5_device - -class gb_rom_mbc5_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_mbc5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - gb_rom_mbc5_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - // device-level overrides - virtual void device_start() override { shared_start(); m_rumble.resolve(); } - virtual void device_reset() override { shared_reset(); } - - output_finder<> m_rumble; -}; - -// ======================> gb_rom_mbc6_device - -class gb_rom_mbc6_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_mbc6_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - uint16_t m_latch1, m_latch2; - uint8_t m_bank_4000, m_bank_6000; -}; - -// ======================> gb_rom_mbc7_device - -class gb_rom_mbc7_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_mbc7_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } -}; - -// ======================> gb_rom_m161_device - -class gb_rom_m161_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_m161_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override { return 0xff; } - virtual void write_ram(offs_t offset, uint8_t data) override { } - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - uint8_t m_base_bank; - uint8_t m_load_disable; -}; - -// ======================> gb_rom_mmm01_device -class gb_rom_mmm01_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_mmm01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - uint16_t m_romb; - uint8_t m_romb_nwe; - uint8_t m_ramb; - uint8_t m_ramb_nwe; - uint8_t m_mode; - uint8_t m_mode_nwe; - uint8_t m_map; - uint8_t m_mux; -}; - -// ======================> gb_rom_sachen_mmc1_device - -class gb_rom_sachen_mmc1_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_sachen_mmc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override { return 0xff; } - virtual void write_ram(offs_t offset, uint8_t data) override { } - -protected: - enum { - MODE_LOCKED, - MODE_UNLOCKED - }; - - gb_rom_sachen_mmc1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - uint8_t m_base_bank, m_mask, m_mode, m_unlock_cnt; -}; - -// ======================> gb_rom_sachen_mmc2_device - -class gb_rom_sachen_mmc2_device : public gb_rom_sachen_mmc1_device -{ -public: - // construction/destruction - gb_rom_sachen_mmc2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - enum { - MODE_LOCKED_DMG, - MODE_LOCKED_CGB, - MODE_UNLOCKED - }; - - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; -}; - -// ======================> gb_rom_188in1_device -class gb_rom_188in1_device : public gb_rom_mbc1_device -{ -public: - // construction/destruction - gb_rom_188in1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); save_item(NAME(m_game_base)); } - virtual void device_reset() override { shared_reset(); m_game_base = 0; } - -private: - uint32_t m_game_base; -}; - -// ======================> gb_rom_sintax_device -class gb_rom_sintax_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_sintax_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - void set_xor_for_bank(uint8_t bank); - - uint8_t m_bank_mask, m_bank, m_reg; - - uint8_t m_currentxor, m_xor2, m_xor3, m_xor4, m_xor5, m_sintax_mode; -}; - -// ======================> gb_rom_chongwu_device - -class gb_rom_chongwu_device : public gb_rom_mbc5_device -{ -public: - // construction/destruction - gb_rom_chongwu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - uint8_t m_protection_checked; -}; - -// ======================> gb_rom_licheng_device - -class gb_rom_licheng_device : public gb_rom_mbc5_device -{ -public: - // construction/destruction - gb_rom_licheng_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual void write_bank(offs_t offset, uint8_t data) override; -}; - -// ======================> gb_rom_digimon_device - -class gb_rom_digimon_device : public gb_rom_mbc5_device -{ -public: - // construction/destruction - gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } - virtual void write_ram(offs_t offset, uint8_t data) override; -}; - -// ======================> gb_rom_rockman8_device -class gb_rom_rockman8_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } - - uint8_t m_bank_mask, m_bank, m_reg; -}; - -// ======================> gb_rom_sm3sp_device -class gb_rom_sm3sp_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } - - uint8_t m_bank_mask, m_bank, m_reg, m_mode; -}; - -// ======================> gb_rom_camera_device -class gb_rom_camera_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_camera_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - -private: - void update_camera(); - uint8_t m_camera_regs[54]; -}; - - - -// device type definition -DECLARE_DEVICE_TYPE(GB_ROM_MBC1, gb_rom_mbc1_device) -DECLARE_DEVICE_TYPE(GB_ROM_MBC2, gb_rom_mbc2_device) -DECLARE_DEVICE_TYPE(GB_ROM_MBC3, gb_rom_mbc3_device) -DECLARE_DEVICE_TYPE(GB_ROM_MBC5, gb_rom_mbc5_device) -DECLARE_DEVICE_TYPE(GB_ROM_MBC6, gb_rom_mbc6_device) -DECLARE_DEVICE_TYPE(GB_ROM_MBC7, gb_rom_mbc7_device) -DECLARE_DEVICE_TYPE(GB_ROM_M161, gb_rom_m161_device) -DECLARE_DEVICE_TYPE(GB_ROM_MMM01, gb_rom_mmm01_device) -DECLARE_DEVICE_TYPE(GB_ROM_SACHEN1, gb_rom_sachen_mmc1_device) -DECLARE_DEVICE_TYPE(GB_ROM_SACHEN2, gb_rom_sachen_mmc2_device) -DECLARE_DEVICE_TYPE(GB_ROM_188IN1, gb_rom_188in1_device) -DECLARE_DEVICE_TYPE(GB_ROM_SINTAX, gb_rom_sintax_device) -DECLARE_DEVICE_TYPE(GB_ROM_CHONGWU, gb_rom_chongwu_device) -DECLARE_DEVICE_TYPE(GB_ROM_LICHENG, gb_rom_licheng_device) -DECLARE_DEVICE_TYPE(GB_ROM_DIGIMON, gb_rom_digimon_device) -DECLARE_DEVICE_TYPE(GB_ROM_ROCKMAN8, gb_rom_rockman8_device) -DECLARE_DEVICE_TYPE(GB_ROM_SM3SP, gb_rom_sm3sp_device) -DECLARE_DEVICE_TYPE(GB_ROM_CAMERA, gb_rom_camera_device) +DECLARE_DEVICE_TYPE(GB_ROM_MBC1, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_MBC2, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_MBC3, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_MBC5, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_MBC6, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_MBC7, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_M161, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_MMM01, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_SACHEN1, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_SACHEN2, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_188IN1, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_SINTAX, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_CHONGWU, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_LICHENG, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_DIGIMON, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_ROCKMAN8, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_SM3SP, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_CAMERA, device_gb_cart_interface) #endif // MAME_BUS_GAMEBOY_MBC_H diff --git a/src/devices/bus/gameboy/rom.cpp b/src/devices/bus/gameboy/rom.cpp index 060bd7ef3a4..f10bdb28ad7 100644 --- a/src/devices/bus/gameboy/rom.cpp +++ b/src/devices/bus/gameboy/rom.cpp @@ -91,21 +91,146 @@ #include "emu.h" #include "rom.h" +namespace { -//------------------------------------------------- -// gb_rom_device - constructor -//------------------------------------------------- +class gb_rom_device : public device_t, public device_gb_cart_interface +{ +public: + // construction/destruction + gb_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + gb_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } + + void shared_start(); + void shared_reset(); +}; + + +class gb_rom_tama5_device : public gb_rom_device +{ +public: + // construction/destruction + gb_rom_tama5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual uint8_t read_ram(offs_t offset) override; + virtual void write_ram(offs_t offset, uint8_t data) override; -DEFINE_DEVICE_TYPE(GB_STD_ROM, gb_rom_device, "gb_rom", "GB Carts") -DEFINE_DEVICE_TYPE(GB_ROM_TAMA5, gb_rom_tama5_device, "gb_rom_tama5", "GB Tamagotchi") -DEFINE_DEVICE_TYPE(GB_ROM_WISDOM, gb_rom_wisdom_device, "gb_rom_wisdom", "GB Wisdom Tree Carts") -DEFINE_DEVICE_TYPE(GB_ROM_YONG, gb_rom_yong_device, "gb_rom_yong", "GB Young Yong Carts") -DEFINE_DEVICE_TYPE(GB_ROM_ATVRAC, gb_rom_atvrac_device, "gb_rom_atvrac", "GB ATV Racin'") -DEFINE_DEVICE_TYPE(GB_ROM_LASAMA, gb_rom_lasama_device, "gb_rom_lasama", "GB LaSaMa") +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; -DEFINE_DEVICE_TYPE(MEGADUCK_ROM, megaduck_rom_device, "megaduck_rom", "MegaDuck Carts") + uint16_t m_tama5_data, m_tama5_addr, m_tama5_cmd; + uint8_t m_regs[32]; + uint8_t m_rtc_reg; +}; +class gb_rom_wisdom_device : public gb_rom_device +{ +public: + // construction/destruction + gb_rom_wisdom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } +}; + + +class gb_rom_yong_device : public gb_rom_device +{ +public: + // construction/destruction + gb_rom_yong_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } +}; + + +class gb_rom_atvrac_device : public gb_rom_device +{ +public: + // construction/destruction + gb_rom_atvrac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } +}; + + +class gb_rom_lasama_device : public gb_rom_device +{ +public: + // construction/destruction + gb_rom_lasama_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + +protected: + // device-level overrides + virtual void device_start() override { shared_start(); } + virtual void device_reset() override { shared_reset(); } +}; + + + +class megaduck_rom_device : public device_t, public device_gb_cart_interface +{ +public: + // construction/destruction + megaduck_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // reading and writing + virtual uint8_t read_rom(offs_t offset) override; + virtual void write_bank(offs_t offset, uint8_t data) override; + virtual void write_ram(offs_t offset, uint8_t data) override; + +protected: + megaduck_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; +}; + + +//------------------------------------------------- +// gb_rom_device - constructor +//------------------------------------------------- + gb_rom_device::gb_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock) , device_gb_cart_interface(mconfig, *this) @@ -438,3 +563,16 @@ void megaduck_rom_device::write_ram(offs_t offset, uint8_t data) m_latch_bank = data * 2; m_latch_bank2 = data * 2 + 1; } + +} // anonymous namespace + + +// device type definition +DEFINE_DEVICE_TYPE_PRIVATE(GB_STD_ROM, device_gb_cart_interface, gb_rom_device, "gb_rom", "Game Boy Cartridge") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_TAMA5, device_gb_cart_interface, gb_rom_tama5_device, "gb_rom_tama5", "Game Boy Tamagotchi Cartridge") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_WISDOM, device_gb_cart_interface, gb_rom_wisdom_device, "gb_rom_wisdom", "Game Boy Wisdom Tree Cartridge") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_YONG, device_gb_cart_interface, gb_rom_yong_device, "gb_rom_yong", "Game Boy Young Yong Cartridge") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_ATVRAC, device_gb_cart_interface, gb_rom_atvrac_device, "gb_rom_atvrac", "Game Boy ATV Racin' Cartridge") +DEFINE_DEVICE_TYPE_PRIVATE(GB_ROM_LASAMA, device_gb_cart_interface, gb_rom_lasama_device, "gb_rom_lasama", "Game Boy LaSaMa Cartridge") + +DEFINE_DEVICE_TYPE_PRIVATE(MEGADUCK_ROM, device_gb_cart_interface, megaduck_rom_device, "megaduck_rom", "MegaDuck Cartridge") diff --git a/src/devices/bus/gameboy/rom.h b/src/devices/bus/gameboy/rom.h index f2388446863..6ca12e80a60 100644 --- a/src/devices/bus/gameboy/rom.h +++ b/src/devices/bus/gameboy/rom.h @@ -5,152 +5,13 @@ #include "gb_slot.h" - -// ======================> gb_rom_device - -class gb_rom_device : public device_t, - public device_gb_cart_interface -{ -public: - // construction/destruction - gb_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - gb_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } - - void shared_start(); - void shared_reset(); -}; - -// ======================> gb_rom_tama5_device -class gb_rom_tama5_device : public gb_rom_device -{ -public: - // construction/destruction - gb_rom_tama5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual uint8_t read_ram(offs_t offset) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - uint16_t m_tama5_data, m_tama5_addr, m_tama5_cmd; - uint8_t m_regs[32]; - uint8_t m_rtc_reg; -}; - -// ======================> gb_rom_wisdom_device -class gb_rom_wisdom_device : public gb_rom_device -{ -public: - // construction/destruction - gb_rom_wisdom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } -}; - -// ======================> gb_rom_yong_device -class gb_rom_yong_device : public gb_rom_device -{ -public: - // construction/destruction - gb_rom_yong_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } -}; - -// ======================> gb_rom_atvrac_device -class gb_rom_atvrac_device : public gb_rom_device -{ -public: - // construction/destruction - gb_rom_atvrac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } -}; - -// ======================> gb_rom_lasama_device -class gb_rom_lasama_device : public gb_rom_device -{ -public: - // construction/destruction - gb_rom_lasama_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - -protected: - // device-level overrides - virtual void device_start() override { shared_start(); } - virtual void device_reset() override { shared_reset(); } -}; - - -// ======================> megaduck_rom_device -class megaduck_rom_device :public device_t, - public device_gb_cart_interface -{ -public: - // construction/destruction - megaduck_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // reading and writing - virtual uint8_t read_rom(offs_t offset) override; - virtual void write_bank(offs_t offset, uint8_t data) override; - virtual void write_ram(offs_t offset, uint8_t data) override; - -protected: - megaduck_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; -}; - -// device type definition -DECLARE_DEVICE_TYPE(GB_STD_ROM, gb_rom_device) -DECLARE_DEVICE_TYPE(GB_ROM_TAMA5, gb_rom_tama5_device) -DECLARE_DEVICE_TYPE(GB_ROM_WISDOM, gb_rom_wisdom_device) -DECLARE_DEVICE_TYPE(GB_ROM_YONG, gb_rom_yong_device) -DECLARE_DEVICE_TYPE(GB_ROM_ATVRAC, gb_rom_atvrac_device) -DECLARE_DEVICE_TYPE(GB_ROM_LASAMA, gb_rom_lasama_device) - -DECLARE_DEVICE_TYPE(MEGADUCK_ROM, megaduck_rom_device) +DECLARE_DEVICE_TYPE(GB_STD_ROM, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_TAMA5, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_WISDOM, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_YONG, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_ATVRAC, device_gb_cart_interface) +DECLARE_DEVICE_TYPE(GB_ROM_LASAMA, device_gb_cart_interface) + +DECLARE_DEVICE_TYPE(MEGADUCK_ROM, device_gb_cart_interface) #endif // MAME_BUS_GAMEBOY_ROM_H diff --git a/src/mame/apple/newton.cpp b/src/mame/apple/newton.cpp new file mode 100644 index 00000000000..f9c6f787516 --- /dev/null +++ b/src/mame/apple/newton.cpp @@ -0,0 +1,194 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + Apple Newton devices skeleton driver + + CPUs: + Newton MessagePad: ARM 610 (20MHz) + ExpertPad PI-7000: ARM 610 (20MHz) + Newton MessagePad 100: ARM 610 (20MHz) + Newton MessagePad 110: ARM 610 (20MHz) + Newton MessagePad 120: ARM 610 (20MHz) + Marco: ARM 610 (20MHz) + Newton MessagePad 130: ARM 610 (20MHz) + + eMate 300: ARM 710a (25MHz) + + Newton MessagePad 2000: StrongARM SA-110 (162MHz) + Newton MessagePad 2100: StrongARM SA-110 (162MHz) + +****************************************************************************/ + +#include "emu.h" +#include "cpu/arm7/arm7.h" +#include "cpu/arm7/arm7core.h" +#include "machine/ram.h" +#include "emupal.h" +#include "screen.h" + +class newton_state : public driver_device +{ +public: + newton_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_ram(*this, "ram") + { } + + void gen1(machine_config &config); + void mp120(machine_config &config); + void marco(machine_config &config); + void mp130(machine_config &config); + void emate(machine_config &config); + void mp2000(machine_config &config); + void mp2100(machine_config &config); + +protected: + void mem_map(address_map &map); + + uint32_t tick_count_r(); + + required_device m_maincpu; + required_device m_ram; + + uint32_t m_ram_size = 0; +}; + +uint32_t newton_state::tick_count_r() +{ + return (uint32_t)m_maincpu->total_cycles(); +} + +void newton_state::mem_map(address_map &map) +{ + map(0x00000000, 0x007fffff).mirror(0x00800000).rom().region("maincpu", 0); + map(0x02000000, 0x023fffff).ram(); // Actually Flash + map(0x04000000, 0x04ffffff).rw(m_ram, FUNC(ram_device::read), FUNC(ram_device::write)); + map(0x0f181800, 0x0f181803).r(FUNC(newton_state::tick_count_r)); + map(0x0f001800, 0x0f001803).lrw32(NAME([this](){ return m_ram_size; }), NAME([this](uint32_t data) { m_ram_size = data; })); +} + +static INPUT_PORTS_START( newton ) +INPUT_PORTS_END + +void newton_state::gen1(machine_config &config) +{ + ARM7(config, m_maincpu, XTAL(20'000'000)); // really ARM610 + m_maincpu->set_addrmap(AS_PROGRAM, &newton_state::mem_map); + + RAM(config, m_ram); + m_ram->set_default_size("640K"); +} + +void newton_state::mp120(machine_config &config) +{ + gen1(config); + m_ram->set_default_size("1M"); + m_ram->set_extra_options("2M"); +} + +void newton_state::marco(machine_config &config) +{ + gen1(config); + m_ram->set_extra_options("687K"); +} + +void newton_state::mp130(machine_config &config) +{ + gen1(config); + m_ram->set_default_size("2560K"); +} + +void newton_state::emate(machine_config &config) +{ + ARM710A(config, m_maincpu, 162000000); + m_maincpu->set_addrmap(AS_PROGRAM, &newton_state::mem_map); + + RAM(config, m_ram); + m_ram->set_default_size("1M"); + m_ram->set_extra_options("2M"); +} + +void newton_state::mp2000(machine_config &config) +{ + ARM710A(config, m_maincpu, 162000000); // really SA110 + m_maincpu->set_addrmap(AS_PROGRAM, &newton_state::mem_map); + + RAM(config, m_ram); + m_ram->set_default_size("1M"); +} + +void newton_state::mp2100(machine_config &config) +{ + mp2000(config); + m_ram->set_default_size("4M"); +} + +/* ROM definition */ +ROM_START( newtnotp ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "v10b1.rom", 0x000000, 0x400000, CRC(9fec5b35) SHA1(87ae4afe72814117f9100b67c6fda7010463a0f8), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( newtonmp ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROM_SYSTEM_BIOS(0, "v100", "v1.00") + ROMX_LOAD( "v100.rom", 0x000000, 0x400000, CRC(bab51f17) SHA1(5e754fe7db01ec3c331ff4d71b2dc4565eafce98), ROM_BIOS(0) | ROM_REVERSE | ROM_GROUPDWORD ) + ROM_SYSTEM_BIOS(1, "v13", "v1.3") + ROMX_LOAD( "v13.rom", 0x000000, 0x400000, CRC(8976832c) SHA1(964d07743589cf854fbbcd5e51e3289b739d8050), ROM_BIOS(1) | ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( spi7000 ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "v110.rom", 0x000000, 0x400000, CRC(0a2e0d96) SHA1(1e8e4c74ca19eee120b2647b267e2c467b668f1f), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( mp110 ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "v12.rom", 0x000000, 0x400000, CRC(291aac40) SHA1(517094fc26702b82d558d0c9d677a91de25d0b7f), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( mp120 ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "v13.rom", 0x000000, 0x400000, CRC(d8a34419) SHA1(deda5023dbcb0c11bd6384e444a800c4a271312c), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( motmarco ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "v13 444347.rom", 0x000000, 0x400000, CRC(ad79abc5) SHA1(5c4731008ac402b8f0be37158482b61b36e247cc), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( mp130 ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "v2x.rom", 0x000000, 0x800000, CRC(88ac9c6c) SHA1(44e33b72328974ed0ac41a13fe0e56bf97d15be3), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( emate ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "emate300.rom", 0x000000, 0x800000, CRC(782ea604) SHA1(dcc42e45a6914c7a771819856a1fa05892fe0519), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( mp2000 ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "mp2000.rom", 0x000000, 0x800000, CRC(9001b0f8) SHA1(06751fa69b791febae7267e0486aa15eea933a53), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +ROM_START( mp2100 ) + ROM_REGION32_LE( 0x800000, "maincpu", 0 ) + ROMX_LOAD( "mp2100.rom", 0x000000, 0x800000, CRC(81d5efc6) SHA1(82a191652b2689ce0e254ee11c6f43c84b5185cc), ROM_REVERSE | ROM_GROUPDWORD ) +ROM_END + +/* Driver */ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +CONS( 1992, newtnotp, 0, 0, gen1, newton, newton_state, empty_init, "Apple Computer", "Newton Notepad (prototype)", MACHINE_IS_SKELETON ) +CONS( 1993, newtonmp, 0, 0, gen1, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad", MACHINE_IS_SKELETON ) +CONS( 1993, spi7000, 0, 0, gen1, newton, newton_state, empty_init, "Sharp", "ExpertPad PI-7000", MACHINE_IS_SKELETON ) +CONS( 1994, mp110, 0, 0, gen1, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 110", MACHINE_IS_SKELETON ) +CONS( 1995, mp120, 0, 0, mp120, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 120", MACHINE_IS_SKELETON ) +CONS( 1995, motmarco, 0, 0, marco, newton, newton_state, empty_init, "Motorola", "Marco", MACHINE_IS_SKELETON ) +CONS( 1996, mp130, 0, 0, mp130, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 130", MACHINE_IS_SKELETON ) +CONS( 1997, emate, 0, 0, emate, newton, newton_state, empty_init, "Apple Computer", "eMate 300", MACHINE_IS_SKELETON ) +CONS( 1997, mp2000, 0, 0, mp2000, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 2000", MACHINE_IS_SKELETON ) +CONS( 1997, mp2100, 0, 0, mp2100, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 2100", MACHINE_IS_SKELETON ) diff --git a/src/mame/arcade.flt b/src/mame/arcade.flt index b60a1df19f6..5badc253eba 100644 --- a/src/mame/arcade.flt +++ b/src/mame/arcade.flt @@ -348,6 +348,14 @@ gametron/gotya.cpp gametron/sbugger.cpp gottlieb/exterm.cpp gottlieb/gottlieb.cpp +ice/chexx.cpp +ice/frenzyxprss.cpp +ice/ice_bozopail.cpp +ice/ice_hhhippos.cpp +ice/ice_tbd.cpp +ice/lethalj.cpp +ice/schexx4gen.cpp +ice/vp101.cpp igs/cabaret.cpp igs/dunhuang.cpp igs/funtech.cpp @@ -647,7 +655,6 @@ misc/cb2001.cpp misc/chameleonrx1.cpp misc/chance32.cpp misc/changyu.cpp -misc/chexx.cpp misc/chicago.cpp misc/chsuper.cpp misc/clowndwn.cpp @@ -708,7 +715,6 @@ misc/flower.cpp misc/fortecar.cpp misc/freekick.cpp misc/freeway.cpp -misc/frenzyxprss.cpp misc/fresh.cpp misc/funeball.cpp misc/fungames.cpp @@ -742,9 +748,6 @@ misc/hotblock.cpp misc/hotchili.cpp misc/hotstuff.cpp misc/houseball.cpp -misc/ice_bozopail.cpp -misc/ice_hhhippos.cpp -misc/ice_tbd.cpp misc/imolagp.cpp misc/intrscti.cpp misc/island.cpp @@ -769,7 +772,6 @@ misc/laserbas.cpp misc/laz_aftrshok.cpp misc/laz_ribrac.cpp misc/lependu.cpp -misc/lethalj.cpp misc/limenko.cpp misc/ltcasino.cpp misc/luckybal.cpp @@ -853,7 +855,6 @@ misc/rulechan.cpp misc/sanremmg.cpp misc/sanremo.cpp misc/savquest.cpp -misc/schexx4gen.cpp misc/scm_500.cpp misc/sealy.cpp misc/sealy_fr.cpp @@ -916,7 +917,6 @@ misc/videosaa.cpp misc/vlc.cpp misc/vlc34010.cpp misc/voyager.cpp -misc/vp101.cpp misc/vpoker.cpp misc/vroulet.cpp misc/wildpkr.cpp diff --git a/src/mame/hp/hp3478a.cpp b/src/mame/hp/hp3478a.cpp new file mode 100644 index 00000000000..ae76df6831a --- /dev/null +++ b/src/mame/hp/hp3478a.cpp @@ -0,0 +1,754 @@ +// license:BSD-3-Clause +// copyright-holders:fenugrec +/****************************************************************************** +* HP 3478A Digital Multimeter +* +* Emulating test equipment is not very meaningful except for developping ROM patches. +* This aims to be the minimal emulation sufficient to run the UI (keypad and display). +* Ideally, faking ADC readings could be useful too. +* +* Some of this will probably be applicable to HP 3468A units too. +* +* Current status : runs, AD LINK ERROR on stock ROM due to unimplemented AD link +* - patching the AD comms, we get to a mostly functional state (for patch examples, +* see https://github.com/fenugrec/hp3478a_rompatch ) +* +* TODO +* - split out LCD driver code. It seems common to other HP equipment of the +* era, such as the 3468, 3457, 3488?, 4263?, 6623?, and probably others. +* +* TODO next level +* * do something for analog CPU serial link (not quite uart), or emulate CPU +* * better display render and layout - actual photo ? +* +* TODO level 9000 +* * Connect this with the existing i8291.cpp driver +* * add analog CPU (8049) +* * validate one single chipselect active when doing external access (movx) + + +**** Hardware details (refer to service manual for schematics) +Main CPU : i8039 , no internal ROM +Analog (floating) CPU : i8049, internal ROM (, dump available at ko4bb.com) +ROM : 2764 (64kbit, org 8kB) +RAM : 5101 , 256 * 4bit (!), battery-backed calibration data +GPIB: i8291 +Display : unknown; similar protocol for HP 3457A documented on + http://www.eevblog.com/forum/projects/led-display-for-hp-3457a-multimeter-i-did-it-)/25/ + + + +Main cpu I/O ports: +Port1 +P14-P17 : keypad out (cols) +P10-P13 : keypad in (rows) + +P20 : disp.clk1 +P21 : !CS for GPIB, and disp.IWA +P22 : !CS for DIPswitch; disp.ISA (for instructions) +P23 = !OE for RAM ; disp.sync (enable instruction) +P24 = disp.PWO (enable) +P25 = disp.clk2 +P26 : address bit12 ! (0x1000) => hardware banking +P27 : data out thru isol, to analog CPU + +T1 : data in thru isol, from analog CPU (opcodes jt1 / jnt1) +*/ + +#include "emu.h" +#include "cpu/mcs48/mcs48.h" +#include "machine/bankdev.h" +#include "machine/nvram.h" +#include "machine/watchdog.h" +#include "hp3478a.lh" + +#define CPU_CLOCK XTAL(5'856'000) + +/* port pin/bit defs. Would be nice if mcs48.h had these */ +#define P20 (1 << 0) +#define P21 (1 << 1) +#define P22 (1 << 2) +#define P23 (1 << 3) +#define P24 (1 << 4) +#define P25 (1 << 5) +#define P26 (1 << 6) +#define P27 (1 << 7) + + + +#define A12_PIN P26 +#define CALRAM_CS P23 +#define DIPSWITCH_CS P22 +#define GPIB_CS P21 + +#define DISP_PWO P24 +#define DISP_SYNC P23 +#define DISP_ISA P22 +#define DISP_IWA P21 +#define DISP_CK1 P20 + //don't care about CK2 since it's supposed to be a delayed copy of CK1 +#define DISP_MASK (DISP_PWO | DISP_SYNC | DISP_ISA | DISP_IWA | DISP_CK1) //used for edge detection + +// IO banking : indexes of m_iobank maps +#define CALRAM_ENTRY 0 +#define GPIB_ENTRY 1 +#define DIP_ENTRY 2 + +/**** optional debug outputs, must be before #include logmacro.*/ +#define DEBUG_PORTS (LOG_GENERAL << 1) +#define DEBUG_BANKING (LOG_GENERAL << 2) +#define DEBUG_BUS (LOG_GENERAL << 3) //not used after all +#define DEBUG_KEYPAD (LOG_GENERAL << 4) +#define DEBUG_LCD (LOG_GENERAL << 5) //low level +#define DEBUG_LCD2 (LOG_GENERAL << 6) +#define DEBUG_CAL (LOG_GENERAL << 7) + +#define VERBOSE (DEBUG_BUS) //can be combined, like (DEBUG_CAL | DEBUG_KEYPAD) + +#include "logmacro.h" + +/**** HP 3478A class **/ + + +namespace { + +class hp3478a_state : public driver_device +{ +public: + hp3478a_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_nvram(*this, "nvram") + , m_nvram_raw(*this, "nvram") + , m_watchdog(*this, "watchdog") + , m_bank0(*this, "bank0") + , m_iobank(*this, "iobank") + , m_keypad(*this, "COL.%u", 0) + , m_calenable(*this, "CAL_EN") + { + } + + void hp3478a(machine_config &config); + +protected: + virtual void machine_start() override; + //virtual void machine_reset() override; //not needed? + +private: + uint8_t p1read(); + void p1write(uint8_t data); + void p2write(uint8_t data); + void nvwrite(offs_t offset, uint8_t data); + + void io_bank(address_map &map); + void i8039_io(address_map &map); + void i8039_map(address_map &map); + + required_device m_maincpu; + required_device m_nvram; + required_shared_ptr m_nvram_raw; + required_device m_watchdog; + required_memory_bank m_bank0; + required_device m_iobank; + required_ioport_array<4> m_keypad; + required_ioport m_calenable; + + /////////////// stuff for internal LCD emulation + // shoud be split to a separate driver + std::unique_ptr > m_outputs; + std::unique_ptr > m_annuns; + + void lcd_interface(uint8_t p2new); + void lcd_update_hinib(uint64_t shiftreg); + void lcd_update_lonib(uint64_t shiftreg); + void lcd_update_annuns(uint64_t shiftreg); + void lcd_map_chars(); + static uint32_t lcd_set_display(uint32_t segin); + + uint8_t m_lcd_bitcount; + uint8_t m_lcd_want; + uint64_t m_lcd_bitbuf; + enum class lcd_state : uint8_t { + IDLE, + SYNC_SKIP, + SELECTED_ISA, + SELECTED_IWA + } m_lcdstate; + enum class lcd_iwatype : uint8_t { + ANNUNS, + REG_A, + REG_B, + REG_C, + DISCARD + } m_lcdiwa; + uint8_t m_lcd_chrbuf[12]; //raw digits (not ASCII) + uint8_t m_lcd_text[13]; //mapped to ASCII, only for debug output + uint32_t m_lcd_segdata[12]; + bool m_lcd_annuns[12]; //local copy of annunciators + /////////////////////////// + + + uint8_t m_p2_oldstate; //used to detect edges on Port2 IO pins. Should be saveable ? + uint8_t m_p1_oldstate; //for P17 edge detection (WDT reset) + +}; + + + +/***** callbacks */ +/* port1 manages the keypad matrix */ + +uint8_t hp3478a_state::p1read() +{ + unsigned i; + uint8_t data = m_maincpu->p1_r() | 0x0F; //P10-P13 "pull-up" + + // for each column, set Px=0 for pressed buttons (active low) + for (i = 0; i < 4; i++) { + if (!(data & (0x10 << i))) { + data &= (0xF0 | m_keypad[i]->read()); //not sure if the undefined upper bits will read as 1 ? + } + } + LOGMASKED(DEBUG_KEYPAD, "port1 read: 0x%02X\n", data); + return data; +} + +/* pin P17 rising edges also reset the external WDT counter */ +void hp3478a_state::p1write(uint8_t data) +{ + if (~m_p1_oldstate & data & 0x80) { + //P17 rising edge + m_watchdog->watchdog_reset(); + } + m_p1_oldstate = data; +} + +/** a lot of stuff multiplexed on the P2 pins. + * parse the chipselect lines, A12 line, and LCD interface. + */ +void hp3478a_state::p2write(uint8_t data) +{ + LOGMASKED(DEBUG_PORTS, "port2 write: %02X\n", data); + + // check which CS line is active. No collision checking is done here + // because the LCD interface reuses those pins and we'd get spurious errors. + // So the last evaluated condition will be kept. + + if (!(data & CALRAM_CS)) { + //will read lower 4 bits from calram + m_iobank->set_bank(CALRAM_ENTRY); + } + if (!(data & DIPSWITCH_CS)) { + m_iobank->set_bank(DIP_ENTRY); + } + if (!(data & GPIB_CS)) { + m_iobank->set_bank(GPIB_ENTRY); + } + + if ((m_p2_oldstate ^ data) & A12_PIN) { + /* A12 pin state changed */ + if (data & A12_PIN) { + m_bank0->set_entry(1); + LOGMASKED(DEBUG_BANKING, "changed to bank1\n"); + } else { + m_bank0->set_entry(0); + LOGMASKED(DEBUG_BANKING, "changed to bank0\n"); + } + } + + if ((m_p2_oldstate ^ data) & DISP_MASK) { + /* display signals changed */ + lcd_interface(data); + } + + m_p2_oldstate = data; +} + + +/* CAL RAM write handler, to implement "CAL enable" front panel switch +*/ +void hp3478a_state::nvwrite(offs_t offset, uint8_t data) { + if (m_calenable->read()) { + m_nvram_raw[offset] = data; + LOGMASKED(DEBUG_CAL, "write %02X to cal[%02X]\n", data, offset); + } else { + LOGMASKED(DEBUG_CAL, "write %02X to cal[%02X]:dropped\n", data, offset); + } +} + + +/**** LCD emulation + * + * Yuck. Emulate serial LCD module interface. don't really want to make a separate driver for this... + * The protocol is common to many HP products of the era. Some sources have the instruction words written as 10-bit + * words, but it would appear more consistent (and matches the intent guessed from the disassembled functions) + * that they are actually 8-bit bytes. The 2-bit difference is a "bogus" 2 clock cycles for when SYNC or PWO changes ? + * +*/ + +/** charset copied from roc10937 driver. Some special chars are wrong. + * Interestingly, the 3478a usually doesn't use "0x30" for the number 0, but instead + * maps it to the character 'O' ! It does use 0x30 when printing the GPIB address however. + */ +static const uint16_t hpcharset[]= +{ // FEDC BA98 7654 3210 + 0x507F, // 0101 0000 0111 1111 @. + 0x44CF, // 0100 0100 1100 1111 A. + 0x153F, // 0001 0101 0011 1111 B. + 0x00F3, // 0000 0000 1111 0011 C. + 0x113F, // 0001 0001 0011 1111 D. + 0x40F3, // 0100 0000 1111 0011 E. + 0x40C3, // 0100 0000 1100 0011 F. + 0x04FB, // 0000 0100 1111 1011 G. + 0x44CC, // 0100 0100 1100 1100 H. + 0x1133, // 0001 0001 0011 0011 I. + 0x007C, // 0000 0000 0111 1100 J. + 0x4AC0, // 0100 1010 1100 0000 K. + 0x00F0, // 0000 0000 1111 0000 L. + 0x82CC, // 1000 0010 1100 1100 M. + 0x88CC, // 1000 1000 1100 1100 N. + 0x00FF, // 0000 0000 1111 1111 O. + 0x44C7, // 0100 0100 1100 0111 P. + 0x08FF, // 0000 1000 1111 1111 Q. + 0x4CC7, // 0100 1100 1100 0111 R. + 0x44BB, // 0100 0100 1011 1011 S. + 0x1103, // 0001 0001 0000 0011 T. + 0x00FC, // 0000 0000 1111 1100 U. + 0x22C0, // 0010 0010 1100 0000 V. + 0x28CC, // 0010 1000 1100 1100 W. + 0xAA00, // 1010 1010 0000 0000 X. + 0x9200, // 1001 0010 0000 0000 Y. + 0x2233, // 0010 0010 0011 0011 Z. + 0x00E1, // 0000 0000 1110 0001 [. + 0x8800, // 1000 1000 0000 0000 \. + 0x001E, // 0000 0000 0001 1110 ]. + 0x2800, // 0010 1000 0000 0000 ^. + 0x0030, // 0000 0000 0011 0000 _. + 0x0000, // 0000 0000 0000 0000 [space] , 0x20 + 0x8121, // 1000 0001 0010 0001 !. + 0x0180, // 0000 0001 1000 0000 ". + 0x553C, // 0101 0101 0011 1100 #. + 0x55BB, // 0101 0101 1011 1011 $. + 0x7799, // 0111 0111 1001 1001 %. + 0xC979, // 1100 1001 0111 1001 &. + 0x0200, // 0000 0010 0000 0000 '. + 0x0A00, // 0000 1010 0000 0000 (. + 0xA050, // 1010 0000 0000 0000 ). + 0xFF00, // 1111 1111 0000 0000 *. + 0x5500, // 0101 0101 0000 0000 +. + 0x0000, // 0000 0000 0000 0000 //XXX (0x2C) + 0x4400, // 0100 0100 0000 0000 --. + 0x0000, // 0000 0000 0000 0000 //XXX (0x2E) + 0x2200, // 0010 0010 0000 0000 /. + 0x22FF, // 0010 0010 1111 1111 0. (0x30) + 0x1100, // 0001 0001 0000 0000 1. + 0x4477, // 0100 0100 0111 0111 2. + 0x443F, // 0100 0100 0011 1111 3. + 0x448C, // 0100 0100 1000 1100 4. + 0x44BB, // 0100 0100 1011 1011 5. + 0x44FB, // 0100 0100 1111 1011 6. + 0x000F, // 0000 0000 0000 1111 7. + 0x44FF, // 0100 0100 1111 1111 8. + 0x44BF, // 0100 0100 1011 1111 9. + 0xFFFF, // 1111 1111 1111 1111 [all segs] (0x3A) + 0x2001, // 0010 0000 0000 0001 //XXX + 0x2230, // 0010 0010 0011 0000 <. + 0x4430, // 0100 0100 0011 0000 =. + 0x8830, // 1000 1000 0011 0000 >. + 0x1407, // 0001 0100 0000 0111 ?. +}; + +/** copy data in shiftreg to the high nibble of each digit in m_lcd_chrbuf */ +void hp3478a_state::lcd_update_hinib(uint64_t shiftreg) +{ + int i; + for (i=11; i >= 0; i--) { + m_lcd_chrbuf[i] &= 0x0F; + m_lcd_chrbuf[i] |= (shiftreg & 0x0F) << 4; + shiftreg >>= 4; + } +} + +/** copy data in shiftreg to the low nibble of each digit in m_lcd_chrbuf */ +void hp3478a_state::lcd_update_lonib(uint64_t shiftreg) +{ + int i; + for (i=11; i >= 0; i--) { + m_lcd_chrbuf[i] &= 0xF0; + m_lcd_chrbuf[i] |= (shiftreg & 0x0F); + shiftreg >>= 4; + } +} + + +/** update annunciators : 12 bits */ +void hp3478a_state::lcd_update_annuns(uint64_t shiftreg) +{ + int i; + for (i=11; i >= 0; i--) { + m_lcd_annuns[i] = (shiftreg & 0x01); + shiftreg >>=1; + } + std::copy(std::begin(m_lcd_annuns), std::end(m_lcd_annuns), std::begin(*m_annuns)); +} + +/** map LCD char to ASCII and segment data + update + * + * discards extra bits + */ +void hp3478a_state::lcd_map_chars() +{ + int i; + LOGMASKED(DEBUG_LCD2, "LCD : map "); + for (i=0; i < 12; i++) { + bool dp = m_lcd_chrbuf[i] & 0x40; //check decimal point. Needs to be mapped to seg_bit16 + bool comma = m_lcd_chrbuf[i] & 0x80; //check comma, maps to seg17 + m_lcd_text[i] = (m_lcd_chrbuf[i] & 0x3F) + 0x40; + m_lcd_segdata[i] = hpcharset[m_lcd_chrbuf[i] & 0x3F] | (dp << 16) | (comma << 17); + LOGMASKED(DEBUG_LCD2, "[%02X>%04X] ", m_lcd_chrbuf[i] & 0x3F, m_lcd_segdata[i]); + } + LOGMASKED(DEBUG_LCD2, "\n"); +} + +/** ?? from roc10937 */ +uint32_t hp3478a_state::lcd_set_display(uint32_t segin) +{ + return bitswap<32>(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); +} + +// ISA command bytes +#define DISP_ISA_WANNUN 0xBC //annunciators +#define DISP_ISA_WA 0x0A //low nibbles +#define DISP_ISA_WB 0x1A //hi nib +#define DISP_ISA_WC 0x2A // "extended bit" ? + +/** LCD serial interface state machine. I cheat and don't implement all commands. + * Also, it's not clear when exactly the display should be updated. After each regA/regB write + * seems to generate some glitches. After PWO deselect causes some half-written text to appear sometimes. + */ +void hp3478a_state::lcd_interface(uint8_t p2new) +{ + bool pwo_state, sync_state, isa_state, iwa_state; + + pwo_state = p2new & DISP_PWO; + sync_state = p2new & DISP_SYNC; + isa_state = p2new & DISP_ISA; + iwa_state = p2new & DISP_IWA; + + if (!((p2new ^ m_p2_oldstate) & DISP_CK1)) { + // no clock edge : boring. + //LOGMASKED(DEBUG_LCD, "LCD : pwo(%d), sync(%d), isa(%d), iwa(%d)\n", + // pwo_state, sync_state, isa_state, iwa_state); + return; + } + + if (!(p2new & DISP_CK1)) { + //neg edge + return; + } + + // CK1 clock positive edge + if (!pwo_state) { + //not selected, reset everything + LOGMASKED(DEBUG_LCD, "LCD : state=IDLE, PWO deselected, %d stray bits(0x...%02X)\n",m_lcd_bitcount, m_lcd_bitbuf & 0xFF); + m_lcdstate = lcd_state::IDLE; + m_lcdiwa = lcd_iwatype::DISCARD; + std::transform(std::begin(m_lcd_segdata), std::end(m_lcd_segdata), std::begin(*m_outputs), lcd_set_display); + m_lcd_bitcount = 0; + m_lcd_bitbuf = 0; + return; + } + switch (m_lcdstate) { + case lcd_state::IDLE: + m_lcd_want = 8; + m_lcdstate = lcd_state::SYNC_SKIP; + break; + case lcd_state::SYNC_SKIP: + // if SYNC changed, we need to ignore two clock pulses. + m_lcd_bitcount++; + if (m_lcd_bitcount < 1) { + break; + } + m_lcd_bitcount = 0; + m_lcd_bitbuf = 0; + if (sync_state) { + m_lcdstate = lcd_state::SELECTED_ISA; + m_lcd_want = 8; + LOGMASKED(DEBUG_LCD, "LCD : state=SELECTED_ISA\n"); + } else { + //don't touch m_lcd_want since it was possibly set in the ISA stage + m_lcdstate = lcd_state::SELECTED_IWA; + LOGMASKED(DEBUG_LCD, "LCD : state=SELECTED_IWA, want %d\n", m_lcd_want); + } + break; + case lcd_state::SELECTED_ISA: + if (!sync_state) { + //changing to SELECTED_IWA + m_lcdstate = lcd_state::SYNC_SKIP; + if (m_lcd_bitcount) { + LOGMASKED(DEBUG_LCD, "LCD : ISA->IWA, %d stray bits (0x%0X)\n", m_lcd_bitcount, m_lcd_bitbuf); + } else { + LOGMASKED(DEBUG_LCD, "LCD : ISA->IWA\n"); + } + m_lcd_bitcount = 0; + m_lcd_bitbuf = 0; + break; + } + m_lcd_bitbuf |= (isa_state << m_lcd_bitcount); + m_lcd_bitcount++; + if (m_lcd_bitcount != m_lcd_want) { + break; + } + LOGMASKED(DEBUG_LCD, "LCD : Instruction 0x%02X\n", m_lcd_bitbuf & 0xFF); + //shouldn't get extra bits, but we have nothing better to do so just reset the shiftreg. + m_lcd_bitcount = 0; + switch (m_lcd_bitbuf & 0xFF) { + case DISP_ISA_WANNUN: + m_lcd_want = 44; + m_lcdiwa = lcd_iwatype::ANNUNS; + break; + case DISP_ISA_WA: + m_lcd_want = 100; //no, doesn't fit in a uint64, but only the first 36 bits are significant. + m_lcdiwa = lcd_iwatype::REG_A; + break; + case DISP_ISA_WB: + m_lcd_want = 100; + m_lcdiwa = lcd_iwatype::REG_B; + break; + case DISP_ISA_WC: + m_lcd_want = 44; + m_lcdiwa = lcd_iwatype::REG_C; + break; + default: + m_lcd_want = 44; + m_lcdiwa = lcd_iwatype::DISCARD; + break; + } + m_lcd_bitbuf = 0; + break; + case lcd_state::SELECTED_IWA: + if (sync_state) { + //changing to SELECTED_ISA + m_lcdstate = lcd_state::SYNC_SKIP; + if (m_lcd_bitcount) { + LOGMASKED(DEBUG_LCD, "LCD : IWA->ISA, %d stray bits (0x%X)\n", m_lcd_bitcount, m_lcd_bitbuf); + } else { + LOGMASKED(DEBUG_LCD, "LCD : IWA->ISA\n"); + } + m_lcd_bitcount = 0; + m_lcd_bitbuf = 0; + break; + } + if (m_lcd_bitcount <= 0x3F) { + //clamp to bit 63; + m_lcd_bitbuf |= ((uint64_t) iwa_state << m_lcd_bitcount); + } + m_lcd_bitcount++; + if (m_lcd_bitcount != m_lcd_want) { + break; + } + LOGMASKED(DEBUG_LCD, "LCD : data 0x%X\n", m_lcd_bitbuf); + switch (m_lcdiwa) { + case lcd_iwatype::ANNUNS: + lcd_update_annuns(m_lcd_bitbuf); + LOGMASKED(DEBUG_LCD2, "LCD : write annuns 0x%02X\n", m_lcd_bitbuf & 0xFF); + break; + case lcd_iwatype::REG_A: + lcd_update_lonib(m_lcd_bitbuf); + lcd_map_chars(); + LOGMASKED(DEBUG_LCD2, "LCD : write reg A (lonib) %X, text=%s\n", m_lcd_bitbuf, (char *) m_lcd_text); + break; + case lcd_iwatype::REG_B: + lcd_update_hinib(m_lcd_bitbuf); + lcd_map_chars(); + LOGMASKED(DEBUG_LCD2, "LCD : write reg B (lonib) %X, text=%s\n", m_lcd_bitbuf, (char *) m_lcd_text); + break; + default: + //discard + break; + } + //shouldn't get extra bits, but we have nothing better to do so just reset the shiftreg. + m_lcd_bitcount = 0; + m_lcd_bitbuf = 0; + break; //case SELECTED_IWA + } + + return; +} + + + + + +void hp3478a_state::machine_start() +{ + m_bank0->configure_entries(0, 2, memregion("maincpu")->base(), 0x1000); + + m_outputs = std::make_unique >(*this, "vfd%u", (unsigned) 0); + m_outputs->resolve(); + m_annuns = std::make_unique >(*this, "ann%u", (unsigned) 0); + m_annuns->resolve(); + + m_watchdog->watchdog_enable(); + + m_p1_oldstate = 0; + m_p2_oldstate = 0; + +} + +/****************************************************************************** + Address Maps +******************************************************************************/ + +void hp3478a_state::i8039_map(address_map &map) +{ + map(0x0000, 0x0fff).bankr("bank0"); // CPU address space (4kB), banked according to P26 pin +} + +void hp3478a_state::i8039_io(address_map &map) +{ + map.global_mask(0xff); + map(0x00, 0xff).m(m_iobank, FUNC(address_map_bank_device::amap8)); +} + +/* depending on the P2 port state, different chipselect lines are activated, which + * affect the subsequent external accesses (movx) + * The addresses in here have nothing to do with the mcs48 address space. + */ +void hp3478a_state::io_bank(address_map &map) +{ + map.unmap_value_high(); + map(0x000, 0x0ff).ram().share("nvram").w(FUNC(hp3478a_state::nvwrite)); + map(0x100, 0x107).ram().share("gpibregs"); //XXX TODO : connect to i8291.cpp + map(0x200, 0x2ff).portr("DIP"); +} + + +/****************************************************************************** + Input Ports +******************************************************************************/ +static INPUT_PORTS_START( hp3478a ) +/* keypad bit matrix: + 0x08|0x04|0x02|0x01 + col.0 : (nc)|shift|ACA|DCA + col.1 : 4W|2W|ACV|DCV + col.2 : int|dn|up|auto + col.3 : (nc)|loc|srq|sgl +*/ + PORT_START("COL.0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("DCA") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("ACA") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("SHIFT") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) //nothing on 0x08 + PORT_START("COL.1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("DCV") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("ACV") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("2W") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("4W") + PORT_START("COL.2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("AUTO") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("UP") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("DN") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("INT") + PORT_START("COL.3") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("SGL") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON13 ) PORT_NAME("SRQ") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON14 ) PORT_NAME("LOC") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) //nothing on 0x08 + + PORT_START("CAL_EN") + PORT_CONFNAME(1, 0, "CAL") + PORT_CONFSETTING(0x00, "disabled") + PORT_CONFSETTING(0x01, "enabled") + + PORT_START("DIP") + PORT_DIPNAME( 0x1f, 0x17, "HP-IB Bus Address" ) PORT_DIPLOCATION("DIP:1,2,3,4,5") + PORT_DIPSETTING( 0x00, "0" ) + PORT_DIPSETTING( 0x01, "1" ) + PORT_DIPSETTING( 0x02, "2" ) + PORT_DIPSETTING( 0x03, "3" ) + PORT_DIPSETTING( 0x04, "4" ) + PORT_DIPSETTING( 0x05, "5" ) + PORT_DIPSETTING( 0x06, "6" ) + PORT_DIPSETTING( 0x07, "7" ) + PORT_DIPSETTING( 0x08, "8" ) + PORT_DIPSETTING( 0x09, "9" ) + PORT_DIPSETTING( 0x0a, "10" ) + PORT_DIPSETTING( 0x0b, "11" ) + PORT_DIPSETTING( 0x0c, "12" ) + PORT_DIPSETTING( 0x0d, "13" ) + PORT_DIPSETTING( 0x0e, "14" ) + PORT_DIPSETTING( 0x0f, "15" ) + PORT_DIPSETTING( 0x10, "16" ) + PORT_DIPSETTING( 0x11, "17" ) + PORT_DIPSETTING( 0x12, "18" ) + PORT_DIPSETTING( 0x13, "19" ) + PORT_DIPSETTING( 0x14, "20" ) + PORT_DIPSETTING( 0x15, "21" ) + PORT_DIPSETTING( 0x16, "22" ) + PORT_DIPSETTING( 0x17, "23" ) + PORT_DIPSETTING( 0x18, "24" ) + PORT_DIPSETTING( 0x19, "25" ) + PORT_DIPSETTING( 0x1a, "26" ) + PORT_DIPSETTING( 0x1b, "27" ) + PORT_DIPSETTING( 0x1c, "28" ) + PORT_DIPSETTING( 0x1d, "29" ) + PORT_DIPSETTING( 0x1e, "30" ) + PORT_DIPSETTING( 0x1f, "31" ) + PORT_DIPNAME( 0x20, 0x00, "PWR ON SRQ" ) PORT_DIPLOCATION("DIP:6") + PORT_DIPSETTING( 0x00, "Disabled" ) + PORT_DIPSETTING( 0x20, "Enabled" ) + //0x40 unused + PORT_DIPNAME( 0x80, 0x00, "50/60Hz AC" ) PORT_DIPLOCATION("DIP:8") + PORT_DIPSETTING( 0x00, "60Hz" ) + PORT_DIPSETTING( 0x80, "50Hz" ) + +INPUT_PORTS_END + +/****************************************************************************** + Machine Drivers +******************************************************************************/ + +void hp3478a_state::hp3478a(machine_config &config) +{ + auto &mcu(I8039(config, "maincpu", CPU_CLOCK)); + mcu.set_addrmap(AS_PROGRAM, &hp3478a_state::i8039_map); + mcu.set_addrmap(AS_IO, &hp3478a_state::i8039_io); + mcu.p1_in_cb().set(FUNC(hp3478a_state::p1read)); + mcu.p1_out_cb().set(FUNC(hp3478a_state::p1write)); + mcu.p2_out_cb().set(FUNC(hp3478a_state::p2write)); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + ADDRESS_MAP_BANK(config, m_iobank, 0); + m_iobank->set_map(&hp3478a_state::io_bank); + m_iobank->set_data_width(8); + m_iobank->set_addr_width(18); + m_iobank->set_stride(0x100); + + WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_ticks(3*5*(1<<19),CPU_CLOCK)); + + // video + config.set_default_layout(layout_hp3478a); +} + +/****************************************************************************** + ROM Definitions +******************************************************************************/ +ROM_START( hp3478a ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD("rom_dc118.bin", 0, 0x2000, CRC(10097ced) SHA1(bd665cf7e07e63f825b2353c8322ed8a4376b3bd)) // main CPU ROM, can match other datecodes too + + ROM_REGION( 0x100, "nvram", 0 ) // default data for battery-backed Calibration RAM + ROM_LOAD( "calram.bin", 0, 0x100, NO_DUMP) +ROM_END + +} // Anonymous namespace + + +/****************************************************************************** + Drivers +******************************************************************************/ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +SYST( 1983, hp3478a, 0, 0, hp3478a, hp3478a,hp3478a_state, empty_init, "HP", "HP 3478A Multimeter", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW ) diff --git a/src/mame/hp/hpz80unk.cpp b/src/mame/hp/hpz80unk.cpp new file mode 100644 index 00000000000..4147444ed03 --- /dev/null +++ b/src/mame/hp/hpz80unk.cpp @@ -0,0 +1,232 @@ +// license:BSD-3-Clause +// copyright-holders:Robbbert +/*************************************************************************** + +HP Z80-based unknown in a large metal cage + +2012-05-25 Skeleton driver [Robbbert] + +http://www.classiccmp.org/hp/unknown Z80 computer/ + +Looks like roms are in 2 banks in range C000-FFFF. +BASIC is included, if we can find out how to access it. + +Commands: +Axxxx Disassemble (. to quit) +DAxxxx,yyyy Ascii Dump of memory +DBxxxx,yyyy Binary Dump of memory +DHxxxx,yyyy Hex Dump of memory +DOxxxx,yyyy Octal dump of memory +G +H +L +MMxxxx Modify Memory (. to quit) +Pxx Binary Display of Port +Pxx,xx Write to port +RC ??? +RF ??? +RM ??? +RT ??? +UC Displays 11111111 +US ??? +UZ Displays FFFF +W Punch papertape +X choose Q,V,R,P (Q to quit; others ask for ram and prom ranges) +Y nothing +Z nothing + + ToDo: + - Almost everything; there are a lot of I/O ports used + - Hook up rom banking + +****************************************************************************/ + +#include "emu.h" +#include "cpu/z80/z80.h" +#include "machine/ay31015.h" +#include "machine/clock.h" +#include "bus/rs232/rs232.h" + + +class hpz80unk_state : public driver_device +{ +public: + hpz80unk_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_p_rom(*this, "rom") + , m_uart(*this, "uart%u", 1U) + { } + + void hpz80unk(machine_config &config); + +private: + u8 port00_r(); + u8 port02_r(); + u8 port03_r(); + u8 port0d_r(); + u8 portfc_r(); + + void io_map(address_map &map); + void mem_map(address_map &map); + + u8 m_port02_data = 0U; + void machine_reset() override; + void machine_start() override; + required_device m_maincpu; + required_shared_ptr m_p_rom; + required_device_array m_uart; +}; + +u8 hpz80unk_state::port00_r() +{ + return (m_uart[0]->dav_r() << 1) | (m_uart[0]->tbmt_r()) | 0xfc; +} + +u8 hpz80unk_state::port02_r() +{ + m_port02_data ^= 1; + return m_port02_data; +} + +u8 hpz80unk_state::port03_r() +{ + return (m_uart[1]->dav_r() << 1) | (m_uart[1]->tbmt_r()) | 0xfc; +} + +u8 hpz80unk_state::port0d_r() +{ + return (m_uart[2]->dav_r() << 1) | (m_uart[2]->tbmt_r()) | 0xfc; +} + +u8 hpz80unk_state::portfc_r() +{ + return 0xfe; // or it halts +} + +void hpz80unk_state::mem_map(address_map &map) +{ + map.unmap_value_high(); + map(0x0000, 0xbfff).ram(); + map(0xc000, 0xffff).rom().share("rom"); +} + +void hpz80unk_state::io_map(address_map &map) +{ + map.unmap_value_high(); + map.global_mask(0xff); + map(0x00, 0x00).r(FUNC(hpz80unk_state::port00_r)); // uart1 status + map(0x01, 0x01).rw("uart1", FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit)); // uart1 data + map(0x02, 0x02).r(FUNC(hpz80unk_state::port02_r)); + map(0x03, 0x03).r(FUNC(hpz80unk_state::port03_r)); // uart2 status + map(0x04, 0x04).rw("uart2", FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit)); // uart2 data + map(0x0d, 0x0d).r(FUNC(hpz80unk_state::port0d_r)); // uart3 status + map(0x0e, 0x0e).w("uart3", FUNC(ay31015_device::transmit)); // uart3 data + map(0x1d, 0x1e); // top of memory is written here, big-endian + map(0x1f, 0x1f).portr("DSW"); // select which uarts to use + map(0xfc, 0xfc).r(FUNC(hpz80unk_state::portfc_r)); +} + +/* Input ports */ +static INPUT_PORTS_START( hpz80unk ) + // this is a theoretical switch + PORT_START("DSW") + PORT_DIPNAME( 0x03, 0x00, "UART selection") + PORT_DIPSETTING( 0x00, "In UART1, Out UART1") + PORT_DIPSETTING( 0x01, "In UART1, Out UART2") + PORT_DIPSETTING( 0x02, "In UART1, Out UART3") + PORT_DIPSETTING( 0x03, "In UART2, Out UART1") +INPUT_PORTS_END + + +void hpz80unk_state::machine_start() +{ + save_item(NAME(m_port02_data)); +} + +void hpz80unk_state::machine_reset() +{ + u8* user1 = memregion("user1")->base(); + memcpy((u8*)m_p_rom, user1, 0x4000); + m_maincpu->set_pc(0xc000); + + // no idea if these are hard-coded, or programmable + for (auto &uart : m_uart) + { + uart->write_xr(0); + uart->write_xr(1); + uart->write_swe(0); + uart->write_np(1); + uart->write_tsb(0); + uart->write_nb1(1); + uart->write_nb2(1); + uart->write_eps(1); + uart->write_cs(1); + uart->write_cs(0); + } + + // this should be rom/ram banking +} + + +void hpz80unk_state::hpz80unk(machine_config &config) +{ + /* basic machine hardware */ + Z80(config, m_maincpu, XTAL(4'000'000)); + m_maincpu->set_addrmap(AS_PROGRAM, &hpz80unk_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &hpz80unk_state::io_map); + + AY51013(config, m_uart[0]); // COM2502 + m_uart[0]->read_si_callback().set("rs232a", FUNC(rs232_port_device::rxd_r)); + m_uart[0]->write_so_callback().set("rs232a", FUNC(rs232_port_device::write_txd)); + m_uart[0]->set_auto_rdav(true); + RS232_PORT(config, "rs232a", default_rs232_devices, "terminal"); + + AY51013(config, m_uart[1]); // COM2502 + m_uart[1]->read_si_callback().set("rs232b", FUNC(rs232_port_device::rxd_r)); + m_uart[1]->write_so_callback().set("rs232b", FUNC(rs232_port_device::write_txd)); + m_uart[1]->set_auto_rdav(true); + RS232_PORT(config, "rs232b", default_rs232_devices, nullptr); + + AY51013(config, m_uart[2]); // COM2502 + m_uart[2]->read_si_callback().set("rs232c", FUNC(rs232_port_device::rxd_r)); + m_uart[2]->write_so_callback().set("rs232c", FUNC(rs232_port_device::write_txd)); + m_uart[2]->set_auto_rdav(true); + RS232_PORT(config, "rs232c", default_rs232_devices, nullptr); + + clock_device &uart_clock(CLOCK(config, "uart_clock", 153600)); + uart_clock.signal_handler().set(m_uart[0], FUNC(ay51013_device::write_tcp)); + uart_clock.signal_handler().append(m_uart[0], FUNC(ay51013_device::write_rcp)); + uart_clock.signal_handler().append(m_uart[1], FUNC(ay51013_device::write_tcp)); + uart_clock.signal_handler().append(m_uart[1], FUNC(ay51013_device::write_rcp)); + uart_clock.signal_handler().append(m_uart[2], FUNC(ay51013_device::write_tcp)); + uart_clock.signal_handler().append(m_uart[2], FUNC(ay51013_device::write_rcp)); +} + +/* ROM definition */ +ROM_START( hpz80unk ) + ROM_REGION( 0x8000, "user1", 0 ) + // 1st bank + ROM_LOAD( "u1", 0x0000, 0x0800, CRC(080cd04a) SHA1(42004af65d44e3507a4e0f343c5bf385b6377c40) ) + ROM_LOAD( "u3", 0x0800, 0x0800, CRC(694075e1) SHA1(3db62645ade6a7f454b2d505aecc1661284c8ce2) ) + ROM_LOAD( "u5", 0x1000, 0x0800, CRC(5573bd05) SHA1(68c8f02b3fe9d77ecb83df407ca78430e118004a) ) + ROM_LOAD( "u7", 0x1800, 0x0800, CRC(d18a304a) SHA1(69dd0486bb6e4c2a22ab9da863bfb962016a321b) ) + ROM_LOAD( "u9", 0x2000, 0x0800, CRC(f7a8665c) SHA1(e39d0ba4ce2dc773622d411a25f40a6a24b45449) ) + ROM_LOAD( "u11", 0x2800, 0x0800, CRC(6c1ac77a) SHA1(50ca04ff0a11bd1c7d96f4731cef50978266ecca) ) + ROM_LOAD( "u13", 0x3000, 0x0800, CRC(8b166911) SHA1(4301dcd6840d37ccfa5bff998a0d88bebe99dc31) ) + ROM_LOAD( "u15", 0x3800, 0x0800, CRC(c6300499) SHA1(1b62d2a85c8f0b6a817e4be73ee34e0d90515c00) ) + // 2nd bank + ROM_LOAD( "u2", 0x4000, 0x0800, CRC(080cd04a) SHA1(42004af65d44e3507a4e0f343c5bf385b6377c40) ) + ROM_LOAD( "u4", 0x4800, 0x0800, CRC(66c3745c) SHA1(d79fe764312a222ac64d325bf5f4abc7ca401d0f) ) + ROM_LOAD( "u6", 0x5000, 0x0800, CRC(80761b4c) SHA1(5f6a12fbba533308b9fe7067c67a836be436a6f0) ) + ROM_LOAD( "u8", 0x5800, 0x0800, CRC(64a2be18) SHA1(b11c08fdc9dc126038559462493f458ecdc78532) ) + ROM_LOAD( "u10", 0x6000, 0x0800, CRC(40244d09) SHA1(106f8f978de36df9f3ebbe1e2c959b60e53273a2) ) + ROM_LOAD( "u12", 0x6800, 0x0800, CRC(6eb01765) SHA1(66f9036a9f86cf3a79493330bbc06fb6932ab771) ) + ROM_LOAD( "u14", 0x7000, 0x0800, CRC(3410e682) SHA1(30d94c0c0b6478dab202a603edaccca943008e35) ) + ROM_LOAD( "u16", 0x7800, 0x0800, CRC(c03fdcab) SHA1(1081d787085add489c6e2a1d450e1a5790d18885) ) +ROM_END + +/* Driver */ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1977, hpz80unk, 0, 0, hpz80unk, hpz80unk, hpz80unk_state, empty_init, "Hewlett-Packard", "unknown Z80-based mainframe", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/ibm/ibm3153.cpp b/src/mame/ibm/ibm3153.cpp new file mode 100644 index 00000000000..385c5444429 --- /dev/null +++ b/src/mame/ibm/ibm3153.cpp @@ -0,0 +1,135 @@ +// license:BSD-3-Clause +// copyright-holders:Robbbert +/*************************************************************************** + +IBM 3153 Terminal. + +2016-05-04 Skeleton driver. + +A green-screen terminal with a beeper. +Chip complement: +U1 K6T0808C10-DB70 (32k static ram) +U2 D-80C32-16 (cpu) +U3 DM74LS373N +U5 LM339N +U6 DM74LS125AN +U7 K6T0808C10-DB70 (ram) +U8 K6T0808C10-DB70 (ram) +U9 598-0013040 6491 3.19 (boot rom) +U10 DS1488N +U11 74LS377N +U12 DS1489AN +U13 LSI VICTOR 006-9802760 REV B WDB36003 Y9936 (video processor) +U14 74F00PC +U16 DM74LS125AN +U17 DS1488N +U18 DS1489AN +U25 SN74F04N +U100 74F07N +Crystals: +Y1 16.000 MHz +Y2 65.089 MHz +Y3 44.976 MHz + + +ToDo: +- Everything! + +****************************************************************************/ + +#include "emu.h" +#include "cpu/mcs51/mcs51.h" +#include "emupal.h" +#include "screen.h" + + +class ibm3153_state : public driver_device +{ +public: + ibm3153_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_p_chargen(*this, "chargen") + { } + + void ibm3153(machine_config &config); + +private: + virtual void machine_reset() override; + void ibm3153_palette(palette_device &palette) const; + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void io_map(address_map &map); + void mem_map(address_map &map); + + required_device m_maincpu; + required_region_ptr m_p_chargen; +}; + + +void ibm3153_state::mem_map(address_map &map) +{ + map.unmap_value_high(); + map(0x00000, 0x0ffff).rom().region("user1", 0); +} + +void ibm3153_state::io_map(address_map &map) +{ + map(0x0000, 0xffff).ram(); + //map.unmap_value_high(); + //map.global_mask(0xff); +} + + +/* Input ports */ +static INPUT_PORTS_START( ibm3153 ) +INPUT_PORTS_END + +uint32_t ibm3153_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + return 0; +} + +void ibm3153_state::ibm3153_palette(palette_device &palette) const +{ + palette.set_pen_color(0, 0, 0, 0); // Black + palette.set_pen_color(1, 0, 255, 0); // Full + palette.set_pen_color(2, 0, 128, 0); // Dimmed +} + +void ibm3153_state::machine_reset() +{ +} + +void ibm3153_state::ibm3153(machine_config &config) +{ + /* basic machine hardware */ + I80C32(config, m_maincpu, XTAL(16'000'000)); // no idea of clock + m_maincpu->set_addrmap(AS_PROGRAM, &ibm3153_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &ibm3153_state::io_map); + + /* video hardware */ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_refresh_hz(60); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ + screen.set_screen_update(FUNC(ibm3153_state::screen_update)); + screen.set_size(640, 240); + screen.set_visarea(0, 639, 0, 239); + screen.set_palette("palette"); + + PALETTE(config, "palette", FUNC(ibm3153_state::ibm3153_palette), 3); +} + +/* ROM definition */ +ROM_START( ibm3153 ) + ROM_REGION( 0x40000, "user1", 0 ) + ROM_LOAD("598-0013040_6491_3.19.u9", 0x0000, 0x040000, CRC(7092d690) SHA1(a23a5bd5eae90e9b31fa32ef4be1258612eaaa0a) ) + + ROM_REGION( 0x2000, "chargen", 0 ) + ROM_LOAD( "char.bin", 0x0000, 0x2000, NO_DUMP ) // probably inside the video processor +ROM_END + +/* Driver */ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1999?, ibm3153, 0, 0, ibm3153, ibm3153, ibm3153_state, empty_init, "IBM", "IBM 3153 Terminal", MACHINE_IS_SKELETON) diff --git a/src/mame/ice/chexx.cpp b/src/mame/ice/chexx.cpp new file mode 100644 index 00000000000..1253d835c9f --- /dev/null +++ b/src/mame/ice/chexx.cpp @@ -0,0 +1,575 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia +/*************************************************************************** + +Electro-mechanical bubble hockey games: + +- Chexx (1983 version) by ICE + http://www.pinrepair.com/arcade/chexx.htm + +- Face-Off, an illegal? copy of Chexx + http://valker.us/gameroom/SegaFaceOff.htm + https://casetext.com/case/innovative-concepts-in-ent-v-entertainment-enter + +(Some sources indicate these may have been copied from a earlier Sega game called Face-Off) + +Olimpic Hockey, Spanish clone from Inor (probably unlicensed), runs on an almost +exact clone of the 1st generation ICE Chexx hardware (https://www.recreativas.org/olimpic-hockey-1110-inor): + + Inor Olympic Hockey PCB + ________________________________________ + | | + | : <- Conn P4 ____________ | + | |/B8342 SJLB| | + | |___________| | + | ____________ | + | |/B8342 SJLC| | + | |___________| | + | ____________ | + | |/B8342 SJLD| | + | |___________| | + | ____________ | + |/o\ <- Conn p5 |/B8342 SJLF| | + ||o| |___________| | + ||o| ____________ | + | |/B8342 SJLG| | + | |___________| | + | : <- Conn P7 ____________ | + | : |/B8342 SJLH| | + | |___________| | + | ____ ____________ | + | LM358N |EMPTY | | + | |___________| | + | ____________ | + | _________ |EMPTY | | + | 74LS138B1 |___________| | + | ______________________ | + | | 54104 DIGITALKER | | + | |_____________________| | + | _________ : | + | _________ |________| : | + | |74LS74B1| Conn P2 -> : | + | ______________________ | + | | UM6522A | | + | _________ |_____________________| | + | |________| | + | ____________ | + | : | EF68B10P | | + | : <- Conn P1 |___________| | + | : o <- Conn P8 | + | o : <- Conn P6 | + | 0 : | + | : ______________________ | + | : <- Conn P3 | UM6502A | | + | |_____________________| | + | _________ | + | _________ ____________ PC74HCT74P | + | |74LS04_| | EPROM | | + | |___________| | + | Xtal | + | 4.000 MHz DSW _________ DSW | + | x2 T74LS365B1 x2 | + |___________ COST _____________ TIME ___| + +The electromechanical game Fire Escape (1984, Mech-Tronic Games, Inc.) +appears to run on very similar hardware, with a AY8912 but no Digitalker. + +***************************************************************************/ + +#include "emu.h" +#include "cpu/m6502/m6502.h" +#include "machine/6522via.h" +#include "machine/timer.h" +#include "sound/ay8910.h" +#include "sound/digitalk.h" +#include "speaker.h" + +#include "chexx.lh" + + +namespace { + +class chexx_state : public driver_device +{ +public: + chexx_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_via(*this, "via6522") + , m_digitalker(*this, "digitalker") + , m_digits(*this, "digit%u", 0U) + , m_leds(*this, "led%u", 0U) + , m_lamps(*this, "lamp%u", 0U) + , m_dsw(*this, "DSW") + , m_input(*this, "INPUT") + , m_coin(*this, "COIN") + { + } + + // handlers + uint8_t via_a_in(); + uint8_t via_b_in(); + + void via_a_out(uint8_t data); + void via_b_out(uint8_t data); + + DECLARE_WRITE_LINE_MEMBER(via_ca2_out); + DECLARE_WRITE_LINE_MEMBER(via_cb1_out); + DECLARE_WRITE_LINE_MEMBER(via_cb2_out); + DECLARE_WRITE_LINE_MEMBER(via_irq_out); + + uint8_t input_r(); + + void lamp_w(uint8_t data); + + void chexx(machine_config &config); + void mem(address_map &map); + +protected: + TIMER_CALLBACK_MEMBER(update); + + // digitalker + void digitalker_set_bank(uint8_t bank); + + // driver_device overrides + virtual void machine_start() override; + virtual void machine_reset() override; + + // devices + required_device m_maincpu; + required_device m_via; + required_device m_digitalker; + output_finder<4> m_digits; + output_finder<3> m_leds; + output_finder<2> m_lamps; + + required_ioport m_dsw; + required_ioport m_input; + required_ioport m_coin; + + // vars + emu_timer *m_update_timer; + uint8_t m_port_a; + uint8_t m_port_b; + uint8_t m_bank; + uint32_t m_shift; + uint8_t m_lamp; +}; + +class faceoffh_state : public chexx_state +{ +public: + faceoffh_state(const machine_config &mconfig, device_type type, const char *tag) + : chexx_state(mconfig, type, tag) + , m_aysnd(*this, "aysnd") + { + } + + void faceoffh(machine_config &config); + +protected: + void ay_w(offs_t offset, uint8_t data); + + void mem(address_map &map); + + required_device m_aysnd; // only faceoffh + uint8_t m_ay_cmd = 0; + uint8_t m_ay_data = 0; +}; + + +// VIA + +uint8_t chexx_state::via_a_in() +{ + uint8_t ret = 0; + logerror("%s: VIA read A: %02X\n", machine().describe_context(), ret); + return ret; +} + +uint8_t chexx_state::via_b_in() +{ + uint8_t ret = 0; + logerror("%s: VIA read B: %02X\n", machine().describe_context(), ret); + return ret; +} + +void chexx_state::via_a_out(uint8_t data) +{ + m_port_a = data; // multiplexer + m_digitalker->digitalker_data_w(data); +// logerror("%s: VIA write A = %02X\n", machine().describe_context(), data); +} + +void chexx_state::via_b_out(uint8_t data) +{ + m_port_b = data; + + digitalker_set_bank(data & 3); + m_digitalker->set_output_gain(0, BIT(data,2) ? 1.0f : 0.0f); // bit 2 controls the Digitalker output + machine().bookkeeping().coin_counter_w(0, BIT(~data,3)); + // bit 4 is EJECT + // bit 7 is related to speaker out + +// logerror("%s: VIA write B = %02X\n", machine().describe_context(), data); +} + +WRITE_LINE_MEMBER(chexx_state::via_ca2_out) +{ + m_digitalker->digitalker_0_cms_w(CLEAR_LINE); + m_digitalker->digitalker_0_cs_w(CLEAR_LINE); + m_digitalker->digitalker_0_wr_w(state ? ASSERT_LINE : CLEAR_LINE); + +// logerror("%s: VIA write CA2 = %02X\n", machine().describe_context(), state); +} + +WRITE_LINE_MEMBER(chexx_state::via_cb1_out) +{ +// logerror("%s: VIA write CB1 = %02X\n", machine().describe_context(), state); +} + +WRITE_LINE_MEMBER(chexx_state::via_cb2_out) +{ + m_shift = ((m_shift << 1) & 0xffffff) | state; + + // 7segs (score) + constexpr uint8_t patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0, 0, 0, 0, 0, 0 }; // 4511 + + m_digits[0] = patterns[(m_shift >> (16+4)) & 0xf]; + m_digits[1] = patterns[(m_shift >> (16+0)) & 0xf]; + m_digits[2] = patterns[(m_shift >> (8+4)) & 0xf]; + m_digits[3] = patterns[(m_shift >> (8+0)) & 0xf]; + + // Leds (period being played) + m_leds[0] = BIT(m_shift,2); + m_leds[1] = BIT(m_shift,1); + m_leds[2] = BIT(m_shift,0); + +// logerror("%s: VIA write CB2 = %02X\n", machine().describe_context(), state); +} + +WRITE_LINE_MEMBER(chexx_state::via_irq_out) +{ + m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE); +// logerror("%s: VIA write IRQ = %02X\n", machine().describe_context(), state); +} + +uint8_t chexx_state::input_r() +{ + uint8_t ret = m_dsw->read(); // bits 0-3 + uint8_t inp = m_input->read(); // bit 7 (multiplexed) + + for (int i = 0; i < 8; ++i) + if (BIT(~m_port_a, i) && BIT(~inp, i)) + ret &= 0x7f; + + return ret; +} + +// Chexx Memory Map + +void chexx_state::mem(address_map &map) +{ + map(0x0000, 0x007f).ram().mirror(0x100); // 6810 - 128 x 8 static RAM + map(0x4000, 0x400f).m(m_via, FUNC(via6522_device::map)); + map(0x8000, 0x8000).r(FUNC(chexx_state::input_r)); + map(0xf800, 0xffff).rom().region("maincpu", 0); +} + +void chexx_state::lamp_w(uint8_t data) +{ + m_lamp = data; + m_lamps[0] = BIT(m_lamp,0); + m_lamps[1] = BIT(m_lamp,1); +} + +// Face-Off Memory Map + +void faceoffh_state::mem(address_map &map) +{ + map(0x0000, 0x007f).ram().mirror(0x100); // M58725P - 2KB + map(0x4000, 0x400f).m(m_via, FUNC(via6522_device::map)); + map(0x8000, 0x8000).r(FUNC(faceoffh_state::input_r)); + map(0xa000, 0xa001).w(FUNC(faceoffh_state::ay_w)); + map(0xc000, 0xc000).w(FUNC(faceoffh_state::lamp_w)); + map(0xf000, 0xffff).rom().region("maincpu", 0); +} + +void faceoffh_state::ay_w(offs_t offset, uint8_t data) +{ + if (offset) + { + m_ay_data = data; + return; + } + + if (m_ay_cmd == 0x00 && data == 0x03) + { + m_aysnd->address_w(m_ay_data); +// logerror("%s: AY addr = %02X\n", machine().describe_context(), m_ay_data); + } + else if (m_ay_cmd == 0x00 && data == 0x02) + { + m_aysnd->data_w(m_ay_data); +// logerror("%s: AY data = %02X\n", machine().describe_context(), m_ay_data); + } + m_ay_cmd = data; +} + +// Inputs + +static INPUT_PORTS_START( chexx83 ) + PORT_START("COIN") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // play anthem + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // play anthem + + PORT_START("INPUT") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("P1 Goal Sensor") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("P2 Goal Sensor") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 ) PORT_NAME("Puck Near Goal Sensors") // play "ohh" sample + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Boo Button") // stop anthem, play "boo" sample, eject puck + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P2 Boo Button") // stop anthem, play "boo" sample, eject puck + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Puck Eject Ready Sensor") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("DSW") + PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") + PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPNAME( 0x0c, 0x00, "Game Duration (mins)" ) PORT_DIPLOCATION("SW1:3,4") + PORT_DIPSETTING( 0x00, "2" ) // 40 + PORT_DIPSETTING( 0x04, "3" ) // 60 + PORT_DIPSETTING( 0x08, "4" ) // 80 + PORT_DIPSETTING( 0x0c, "5" ) // 100 + PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) // multiplexed inputs +INPUT_PORTS_END + +// Machine + +void chexx_state::machine_start() +{ + m_digits.resolve(); + m_leds.resolve(); + m_lamps.resolve(); + + m_update_timer = timer_alloc(FUNC(chexx_state::update), this); +} + +void chexx_state::digitalker_set_bank(uint8_t bank) +{ + if (m_bank != bank) + { + uint8_t *src = memregion("samples")->base(); + uint8_t *dst = memregion("digitalker")->base(); + + memcpy(dst, src + bank * 0x4000, 0x4000); + + m_bank = bank; + } +} + +void chexx_state::machine_reset() +{ + m_bank = -1; + digitalker_set_bank(0); + m_update_timer->adjust(attotime::from_hz(60), 0, attotime::from_hz(60)); +} + +TIMER_CALLBACK_MEMBER(chexx_state::update) +{ + // NMI on coin-in + uint8_t coin = (~m_coin->read()) & 0x03; + m_maincpu->set_input_line(INPUT_LINE_NMI, coin ? ASSERT_LINE : CLEAR_LINE); + + // VIA CA1 connected to Digitalker INTR line + m_via->write_ca1(m_digitalker->digitalker_0_intr_r()); + +#if 0 + // Play the digitalker samples (it's not hooked up correctly yet) + static uint8_t sample = 0, bank = 0; + + if (machine().input().code_pressed_once(KEYCODE_Q)) + --bank; + if (machine().input().code_pressed_once(KEYCODE_W)) + ++bank; + bank %= 3; + digitalker_set_bank(bank); + + if (machine().input().code_pressed_once(KEYCODE_A)) + --sample; + if (machine().input().code_pressed_once(KEYCODE_S)) + ++sample; + + if (machine().input().code_pressed_once(KEYCODE_Z)) + { + m_digitalker->digitalker_0_cms_w(CLEAR_LINE); + m_digitalker->digitalker_0_cs_w(CLEAR_LINE); + + m_digitalker->digitalker_data_w(sample); + + m_digitalker->digitalker_0_wr_w(ASSERT_LINE); + m_digitalker->digitalker_0_wr_w(CLEAR_LINE); + m_digitalker->digitalker_0_wr_w(ASSERT_LINE); + } +#endif +} + +void chexx_state::chexx(machine_config &config) +{ + M6502(config, m_maincpu, XTAL(4'000'000) / 2); + m_maincpu->set_addrmap(AS_PROGRAM, &chexx_state::mem); + + // via + MOS6522(config, m_via, XTAL(4'000'000) / 4); + + m_via->readpa_handler().set(FUNC(chexx_state::via_a_in)); + m_via->readpb_handler().set(FUNC(chexx_state::via_b_in)); + + m_via->writepa_handler().set(FUNC(chexx_state::via_a_out)); + m_via->writepb_handler().set(FUNC(chexx_state::via_b_out)); + + m_via->ca2_handler().set(FUNC(chexx_state::via_ca2_out)); + m_via->cb1_handler().set(FUNC(chexx_state::via_cb1_out)); + m_via->cb2_handler().set(FUNC(chexx_state::via_cb2_out)); + m_via->irq_handler().set(FUNC(chexx_state::via_irq_out)); + + // Layout + config.set_default_layout(layout_chexx); + + // sound hardware + SPEAKER(config, "mono").front_center(); + DIGITALKER(config, m_digitalker, XTAL(4'000'000)); + m_digitalker->add_route(ALL_OUTPUTS, "mono", 0.16); +} + +void faceoffh_state::faceoffh(machine_config &config) +{ + chexx(config); + m_maincpu->set_addrmap(AS_PROGRAM, &faceoffh_state::mem); + + AY8910(config, m_aysnd, XTAL(4'000'000) / 2); + m_aysnd->add_route(ALL_OUTPUTS, "mono", 0.30); +} + +// ROMs + +/*************************************************************************** + +Chexx Hockey (1983 version 1.1) + +The "long and skinny" Moog CPU board used a 6502 for the processor, +a 6522 for the PIA, a 6810 static RAM, eight 52164 64k bit sound ROM chips, +a 40 pin 54104 sound chip, and a single 2716 CPU EPROM + +***************************************************************************/ + +ROM_START( chexx83 ) + ROM_REGION( 0x0800, "maincpu", 0 ) + ROM_LOAD( "chexx83.u4", 0x0000, 0x0800, CRC(a34abac1) SHA1(75a31670eb6d1b62ba984f0bac7c6e6067f6ae87) ) + + ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) + // bank switched (from samples region) + + ROM_REGION( 0x10000, "samples", ROMREGION_ERASE00 ) + ROM_LOAD( "chexx83.u12", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "chexx83.u13", 0x2000, 0x2000, NO_DUMP ) + ROM_LOAD( "chexx83.u14", 0x4000, 0x2000, NO_DUMP ) + ROM_LOAD( "chexx83.u15", 0x6000, 0x2000, NO_DUMP ) + ROM_LOAD( "chexx83.u16", 0x8000, 0x2000, NO_DUMP ) + ROM_LOAD( "chexx83.u17", 0xa000, 0x2000, NO_DUMP ) + ROM_LOAD( "chexx83.u18", 0xc000, 0x2000, NO_DUMP ) + ROM_LOAD( "chexx83.u19", 0xe000, 0x2000, NO_DUMP ) +ROM_END + +// Same PCB as 'chexx83' +ROM_START( olihockey ) + ROM_REGION( 0x0800, "maincpu", 0 ) + ROM_LOAD( "inor_1.u4", 0x0000, 0x0800, CRC(97716ac9) SHA1(b85ff1401544dc7121babee8adf618f82a2f6a89) ) + + ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) + // bank switched (from samples region) + + ROM_REGION( 0x10000, "samples", ROMREGION_ERASE00 ) + ROM_LOAD( "b8342_sjlb.u19", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) + ROM_LOAD( "b8342_sjlc.u18", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) + ROM_LOAD( "b8342_sjld.u17", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) + ROM_LOAD( "b8342_sjlf.u16", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) + ROM_LOAD( "b8342_sjlg.u15", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) + ROM_LOAD( "b8342_sjlh.u14", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) + + // U13 and U12 unpopulated + ROM_FILL( 0xc000, 0x2000, 0xff ) + ROM_FILL( 0xe000, 0x2000, 0xff ) +ROM_END + +// Same PCB as 'chexx83' +ROM_START( olihockeya ) + ROM_REGION( 0x0800, "maincpu", 0 ) + ROM_LOAD( "inor_2.u4", 0x0000, 0x0800, CRC(038958a4) SHA1(aec5e24eea1829459dd3ef9ffe3e4b8c39071ced) ) + + ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) + // bank switched (from samples region) + + ROM_REGION( 0x10000, "samples", ROMREGION_ERASE00 ) + ROM_LOAD( "b8342_sjlb.u19", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) + ROM_LOAD( "b8342_sjlc.u18", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) + ROM_LOAD( "b8342_sjld.u17", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) + ROM_LOAD( "b8342_sjlf.u16", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) + ROM_LOAD( "b8342_sjlg.u15", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) + ROM_LOAD( "b8342_sjlh.u14", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) + + // U13 and U12 unpopulated + ROM_FILL( 0xc000, 0x2000, 0xff ) + ROM_FILL( 0xe000, 0x2000, 0xff ) +ROM_END + +/*************************************************************************** + +Face-Off PCB? + +Entertainment Enterprises Ltd. 1983 (sticker) +Serial No. 025402 (sticker) +MADE IN JAPAN (etched) + +CPU: R6502P +RAM: M58725P (2KB) +I/O: R6522P (VIA) +Samples: Digitalker (MM54104) +Music: AY-3-8910 +Misc: XTAL 4MHz, DSW4, 42-pin connector + +***************************************************************************/ + +ROM_START( faceoffh ) + ROM_REGION( 0x1000, "maincpu", 0 ) + // "Copyright (c) 1983 SoftLogic JAPAN" + ROM_LOAD( "1.5d", 0x0000, 0x1000, CRC(6ab050be) SHA1(ebecae855e22e9c3c46bdee51f84fd5352bf191a) ) + + ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) + // bank switched (from samples region) + + ROM_REGION( 0x10000, "samples", 0 ) + ROM_LOAD( "9.2a", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) // digitalker header + ROM_LOAD( "8.2b", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) + + ROM_LOAD( "7.2c", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) // digitalker header + ROM_LOAD( "6.2d", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) + + ROM_LOAD( "5.3a", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) // digitalker header + ROM_LOAD( "4.3b", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) + + ROM_FILL( 0xc000, 0x2000, 0xff ) // unpopulated + ROM_FILL( 0xe000, 0x2000, 0xff ) // unpopulated +ROM_END + +} // Anonymous namespace + + +GAME( 1983, chexx83, 0, chexx, chexx83, chexx_state, empty_init, ROT270, "ICE", "Chexx (EM Bubble Hockey, 1983 1.1)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_NO_SOUND ) +GAME( 1983, faceoffh, chexx83, faceoffh, chexx83, faceoffh_state, empty_init, ROT270, "SoftLogic (Entertainment Enterprises, Ltd. license)", "Face-Off (EM Bubble Hockey)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND ) +GAME( 1985, olihockey, 0, chexx, chexx83, chexx_state, empty_init, ROT270, "Inor", "Olimpic Hockey (EM Bubble Hockey, set 1)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND ) +GAME( 1985, olihockeya, olihockey, chexx, chexx83, chexx_state, empty_init, ROT270, "Inor", "Olimpic Hockey (EM Bubble Hockey, set 2)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/ice/frenzyxprss.cpp b/src/mame/ice/frenzyxprss.cpp new file mode 100644 index 00000000000..15b7949f788 --- /dev/null +++ b/src/mame/ice/frenzyxprss.cpp @@ -0,0 +1,132 @@ +// license:BSD-3-Clause +// copyright-holders: +/* + Skeleton driver for ICE Frenzy Express. + PC-based configuration running Windows 98 SE SP3: + - 694T Pro Ver 5 motherboard (Via VT82C686B + Via VT82C694T). + - Intel Celeron CPU 1000A/256/100/1.475 Q208A083-0620 SL5ZF. + - 256MB PC133 RAM (one single M366S3253CTS-C7A module). + - InsideTNC IV011A AGP graphics card. + - Crystal CS4281-CM EP based PCI sound card. + - "FE 107 I/O" ISA card. + + FE 107 I/O + ________ ________ ________ ________ + ___| |___| |___| |___| |___ + | |_______| |_______| |_______| |_______| | + | | + | __________ __________ __________ | + | |DM74LS245N |ADC0838CCN |DM74LS245N | + | _____________ | + | _________ | ACTEL | __________ | + | |DM74LS14N | A40MX04-F | |DM74LS245N | + | _______ | PL84 0007 | | + | | Xtal | | | | + | 4.9152MHz |____________| | + | ___ | + | |___|<-Empty socket for 93C46 | + |_ ____ ________| + |_|_|_|_|_|_| |_|_|_|_|_|_|_|_|_|_|_|_| + ISA SLOT +*/ + +#include "emu.h" +#include "cpu/i386/i386.h" +#include "screen.h" + +namespace { + +class frenzyxprss_state : public driver_device +{ +public: + frenzyxprss_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") + { } + + void frenzyxprss(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void video_start() override; + +private: + required_device m_maincpu; + + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + void frenzyxprss_map(address_map &map); +}; + +void frenzyxprss_state::video_start() +{ +} + +uint32_t frenzyxprss_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + return 0; +} + +void frenzyxprss_state::frenzyxprss_map(address_map &map) +{ +} + +static INPUT_PORTS_START( frenzyxprss ) +INPUT_PORTS_END + + +void frenzyxprss_state::machine_start() +{ +} + +void frenzyxprss_state::machine_reset() +{ +} + +void frenzyxprss_state::frenzyxprss(machine_config &config) +{ + // Basic machine hardware + PENTIUM3(config, m_maincpu, 100000000); // Intel Celeron SL5ZF 1GHz + m_maincpu->set_addrmap(AS_PROGRAM, &frenzyxprss_state::frenzyxprss_map); + + // Video hardware + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_refresh_hz(60); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); + screen.set_size(800, 600); // Guess + screen.set_visarea(0, 800-1, 0, 600-1); + screen.set_screen_update(FUNC(frenzyxprss_state::screen_update)); +} + +/*************************************************************************** + + Game drivers + +***************************************************************************/ + +ROM_START( frenzyxprss ) + ROM_REGION( 0x40000, "bios", 0 ) + ROM_SYSTEM_BIOS( 0, "750", "2002-04-19" ) + ROMX_LOAD( "a6309vms_2002-04-19.750.u24", 0x00000, 0x40000, CRC(a227ff2a) SHA1(eea6b336082bf8091f120b6c4cc9bb61c3c3c234), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS( 1, "740", "2002-02-28" ) + ROMX_LOAD( "a6309vms_2002-02-28.740.u24", 0x00000, 0x40000, CRC(316df0fd) SHA1(94995f35356e136c51abba3be05fe97b2c1baf7b), ROM_BIOS(1) ) + ROM_SYSTEM_BIOS( 2, "73x", "2002-02-07" ) + ROMX_LOAD( "a6309vms_2002-02-07.73x.u24", 0x00000, 0x40000, CRC(82c3b24c) SHA1(4b145def75e62fc64ebecf2ad666c9ab580b5d38), ROM_BIOS(2) ) + ROM_SYSTEM_BIOS( 3, "730", "2002-01-07" ) + ROMX_LOAD( "a6309vms_2002-01-07.730.u24", 0x00000, 0x40000, CRC(3c226a0b) SHA1(c8ccab6eb8acc775732055eebf914b274d314c37), ROM_BIOS(3) ) + ROM_SYSTEM_BIOS( 4, "720", "2001-11-03" ) + ROMX_LOAD( "a6309vms_2001-11-03.720.u24", 0x00000, 0x40000, CRC(7bd0ced9) SHA1(ddd3bdde983c7b3746fc9a7ee8d9dea9988089ce), ROM_BIOS(4) ) + ROM_SYSTEM_BIOS( 5, "710", "2001-09-19" ) + ROMX_LOAD( "a6309vms_2001-09-19.710.u24", 0x00000, 0x40000, CRC(bb2c094e) SHA1(2c2def2b5b22d7f66661742f23d7a0fc23cd8cff), ROM_BIOS(5) ) + ROM_SYSTEM_BIOS( 6, "700", "2001-07-11" ) + ROMX_LOAD( "a6309vms_2001-07-11.700.u24", 0x00000, 0x40000, CRC(72081fd3) SHA1(99556f6d7b638f229c466245eed82eb47a2c2304), ROM_BIOS(6) ) + ROM_DEFAULT_BIOS("73x") // The one dumped from the actual machine + + DISK_REGION( "ide:0:hdd:image" ) + DISK_IMAGE( "fexpress_cf_version_2.1", 0, SHA1(583607be83048ca10b1837a8982ba379256a3cf2) ) +ROM_END + +} // Anonymous namespace + + +GAME(2001, frenzyxprss, 0, frenzyxprss, frenzyxprss, frenzyxprss_state, empty_init, ROT0, "ICE / Uniana", "Frenzy Express", MACHINE_IS_SKELETON) diff --git a/src/mame/ice/ice_bozopail.cpp b/src/mame/ice/ice_bozopail.cpp new file mode 100644 index 00000000000..d9ba63da518 --- /dev/null +++ b/src/mame/ice/ice_bozopail.cpp @@ -0,0 +1,79 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/* + +Bozo Pail toss by ICE (ice_tbd notes say Innovative Creations in Entertainment - same company?) + +Devices are 27c080 + +U9 is version 2.07 + + +PCB uses a 68HC11A1P for a processor/security...... + +could be related to (or the same thing as - our name could be incorrect) +http://www.highwaygames.com/arcade-machines/bozo-s-grand-prize-game-6751/ + + +*/ + +#include "emu.h" +#include "cpu/mc68hc11/mc68hc11.h" +#include "speaker.h" + +class ice_bozopail_state : public driver_device +{ +public: + ice_bozopail_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void ice_bozo(machine_config &config); + +private: + virtual void machine_start() override; + virtual void machine_reset() override; + + required_device m_maincpu; + void ice_bozo_map(address_map &map); +}; + +void ice_bozopail_state::ice_bozo_map(address_map &map) +{ + map(0xe000, 0xffff).rom().region("maincpu", 0x1fe000); +} + +static INPUT_PORTS_START( ice_bozo ) +INPUT_PORTS_END + + + +void ice_bozopail_state::machine_start() +{ +} + +void ice_bozopail_state::machine_reset() +{ +} + + +void ice_bozopail_state::ice_bozo(machine_config &config) +{ + /* basic machine hardware */ + MC68HC11A1(config, m_maincpu, 8000000); // unknown clock + m_maincpu->set_addrmap(AS_PROGRAM, &ice_bozopail_state::ice_bozo_map); + + /* sound hardware */ + SPEAKER(config, "mono").front_center(); +} + + + +ROM_START( ice_bozo ) + ROM_REGION( 0x200000, "maincpu", 0 ) // mostly sound data, some code + ROM_LOAD( "ice-bozo.u18", 0x000000, 0x100000, CRC(00500a8b) SHA1(50b8a784ae61510a08cafbfb8529ec2a8ac1bf06) ) + ROM_LOAD( "ice-bozo.u9", 0x100000, 0x100000, CRC(26fd9d60) SHA1(41fe8d42db1eb16b413bd5a0f16bf0d081c3cc97) ) +ROM_END + +GAME( 1997?, ice_bozo, 0, ice_bozo, ice_bozo, ice_bozopail_state, empty_init, ROT0, "Innovative Creations in Entertainment", "Bozo's Pail Toss (v2.07)", MACHINE_IS_SKELETON_MECHANICAL ) diff --git a/src/mame/ice/ice_hhhippos.cpp b/src/mame/ice/ice_hhhippos.cpp new file mode 100644 index 00000000000..c0edd2c4444 --- /dev/null +++ b/src/mame/ice/ice_hhhippos.cpp @@ -0,0 +1,94 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/**************************************************************************** + + Skeleton driver for Hungry Hungry Hippos redemption game by I.C.E. Inc. + + _________________________________________________________________________ + | ___ ___ _____ ___ ___ _ | + | |__| FUSE |ooo| |o| |··| (_) | + | |ooo| |o| COUNTER VOLUME ____ ____ | + | |ooo| DOME CONTROL LM358 LM358 | + | ___ |ooo| LIGHT | + | _ ___ |__| O<-LED ___ ______________ ______________ | + | (_) |__| ___ FUSE | U119 | | U122 | | + |SPEED ____FUSE |_____________| |_____________| | + | ___ |oo| _______ _______ _______ _______ | + |FUSE |oo| 74HC4040 74HC4060 74HC4040 74HC4060 | + | O<-LED |oo| ____ SW _________ | + | __ ____ LED->O XTAL START |__CONN__| | + | | | |oo| LM340AT 2.000 ________ ________ | + | | | |oo| 74HC08N 74HC138AN BATT | + | |_| |oo| ________________ 3.2V | + | LM723CN ____ TIP115 | MC68HC705C8P | | + | O<-LED |oo| _____ |_______________| _____ | + | __ |oo| |ooo| ________ ________ |ooo| | + | | | |oo| |ooo| 74HC174P 74HC174P |ooo| | + | | | ____ |ooo| ________ ________ |ooo| | + | |_| |oo| |ooo| 74HC174P 74HC174P |ooo| TIP115 + | LM723CN |oo| TIP115 _____ ________ ________ _____ | + | |oo| |ooo| 74HC174P 74HC174P |ooo| | + | ___ ___ |ooo| ________ ________ |ooo| | + | |__| |__| |ooo| 74HC174P 74HC174P |ooo| | + | |ooo| ________ ________ |ooo| TIP115 + | ___ ___ SW SW SW SW 74HC153N 74HC153N | + | |__| |__| PROG SEL STEP TST | + |________________________________________________________________________| + +For each hippo there's an eaten ball counter (two digits 7-seg display with 8 leds) + _______________________________ + | ___ _______ _______ ___ | + | | | | ___ | | ___ | | | | +MC14499P->| | | |__| | | |__| | | |<- TP03904 + | | | |o|__|o| |o|__|o| | | | + | |__| |______| |______| |__| | + | O O O O O O O O <- 8 leds + |_______________________________| + +****************************************************************************/ + +#include "emu.h" +#include "cpu/m6805/m68hc05.h" + +namespace +{ + +class ice_hhhippos_state : public driver_device +{ +public: + ice_hhhippos_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { + } + + void hhhippos(machine_config &config); + +private: + required_device m_maincpu; +}; + +static INPUT_PORTS_START(hhhippos) +INPUT_PORTS_END + +void ice_hhhippos_state::hhhippos(machine_config &config) +{ + M68HC705C8A(config, m_maincpu, 2_MHz_XTAL); + + // TODO: sound (R2R DACs streamed from ROMs using HCMOS ripple counters) +} + +ROM_START(hhhippos) + ROM_REGION(0x2000, "maincpu", 0) + ROM_LOAD("68hc705c8.bin", 0x0000, 0x2000, CRC(5c74bcd7) SHA1(3c30ae38647c8f69f7bbcdbeb35b748c8f4c4cd8)) + + ROM_REGION(0x10000, "audio0", 0) + ROM_LOAD("u119.bin", 0x00000, 0x10000, CRC(77c8bd90) SHA1(e9a044d83f39fb617961f8985bc4bed06a03e07b)) + + ROM_REGION(0x20000, "audio1", 0) + ROM_LOAD("u122.bin", 0x00000, 0x20000, CRC(fc188905) SHA1(7bab8feb1f304c9fe7cde31aff4b40e2db56d525)) +ROM_END + +} // anonymous namespace + +GAME(1991, hhhippos, 0, hhhippos, hhhippos, ice_hhhippos_state, empty_init, ROT0, "ICE (Innovative Concepts in Entertainment)", "Hungry Hungry Hippos (redemption game)", MACHINE_IS_SKELETON_MECHANICAL) diff --git a/src/mame/ice/ice_tbd.cpp b/src/mame/ice/ice_tbd.cpp new file mode 100644 index 00000000000..33922745ace --- /dev/null +++ b/src/mame/ice/ice_tbd.cpp @@ -0,0 +1,89 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/* + +Turbo Drive by Innovative Creations in Entertainment (ICE) + +http://www.arcade-museum.com/game_detail.php?game_id=10658 + + +Slot car type race game, coin operated. + +Device is a 27c128 + +-- +not sure what the actual inputs / outputs would be on this, maybe just track position / lap sensors? + + +*/ + +#include "emu.h" +#include "cpu/z80/z80.h" +#include "machine/i8255.h" + +class ice_tbd_state : public driver_device +{ +public: + ice_tbd_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void ice_tbd(machine_config &config); + +private: + void ice_tbd_io_map(address_map &map); + void ice_tbd_map(address_map &map); + + virtual void machine_start() override; + virtual void machine_reset() override; + required_device m_maincpu; +}; + + + +void ice_tbd_state::ice_tbd_map(address_map &map) +{ + map(0x0000, 0x3fff).rom(); + map(0x4000, 0x47ff).ram(); +} + +void ice_tbd_state::ice_tbd_io_map(address_map &map) +{ + map.global_mask(0xff); + map(0x00, 0x03).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); +} + + +static INPUT_PORTS_START( ice_tbd ) +INPUT_PORTS_END + +void ice_tbd_state::machine_start() +{ +} + +void ice_tbd_state::machine_reset() +{ +} + +void ice_tbd_state::ice_tbd(machine_config &config) +{ + /* basic machine hardware */ + Z80(config, m_maincpu, 8000000); /* ? MHz */ + m_maincpu->set_addrmap(AS_PROGRAM, &ice_tbd_state::ice_tbd_map); + m_maincpu->set_addrmap(AS_IO, &ice_tbd_state::ice_tbd_io_map); + + i8255_device &ppi(I8255(config, "ppi")); + ppi.out_pa_callback().set_nop(); // ? + ppi.out_pb_callback().set_nop(); // ? + ppi.in_pc_callback().set_constant(0); // ? +} + + +ROM_START( ice_tbd ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "turbo-dr.ive", 0x0000, 0x4000, CRC(d7c79ac4) SHA1(a01d93411e604e36a3ced58063f2ab81e431b82a) ) +ROM_END + + +GAME( 1988, ice_tbd, 0, ice_tbd, ice_tbd, ice_tbd_state, empty_init, ROT0, "Innovative Creations in Entertainment", "Turbo Drive (ICE)", MACHINE_IS_SKELETON_MECHANICAL ) diff --git a/src/mame/ice/lethalj.cpp b/src/mame/ice/lethalj.cpp new file mode 100644 index 00000000000..ee732f83c9b --- /dev/null +++ b/src/mame/ice/lethalj.cpp @@ -0,0 +1,1268 @@ +// license:BSD-3-Clause +// copyright-holders:Aaron Giles +/*************************************************************************** + + The Game Room Lethal Justice hardware + + driver by Aaron Giles + + Games supported: + * Lethal Justice + * Egg Venture + * Ripper Ribit + * Chicken Farm + * Crazzy Clownz + + Note: I.C.E. is Innovative Concepts in Entertainment + +**************************************************************************** + +Egg Venture +The Gameroom, 1997 + +PCB Layout +---------- + +(C) 1996 I.C.E. +|-------------------------------------------------------| +| EU21.U21 EU18.U18 EU20.U20 32MHz | +| |-------| | +| M6295 M6295 M6295 |XILINX | | +| 2MHz 2MHz 2MHz |XC3042 | | +| DSW(8) KYLR1 |-------| | +|J EGR9.VC9 EGR4.GR4 | +|A DSW(4)EGR8.VC8 |-------| | +|M M5M442256 |XILINX | EGR6.GR6 | +|M M5M442256 11.0592MHz |XC3042 | | +|A M5M442256 MACH210 |-------| EGR3.GR3 | +|4116R M5M442256 MACH210 MACH210 MACH210 | +|4116R |--------| W241024 EGR1.GR2 | +| |TMS34010| W241024 | +|2803A |-50 | W241024 EGR1.GR1 | +| | | W241024 | +| 40MHz |--------| EGR5.GR5 | +| BT121 MACH210 MACH210 MACH210 | +|-------------------------------------------------------| + +Notes: + TMS34010 - TMS34010FNL-50 CPU, clock input 20.000MHz [40/2] (PLCC68) + M6295 - Clock input 2.000MHz, pin 7 HIGH (QFP44) + XC3042 - XILINX XC3042 FPGA (PLCC84) + BT121 - BT121KPJ80 Triple 8-bit 80MHz Video DAC (PLCC44) + MACH210 - AMD MACH210A-10JC Complex Programmable Logic Device (CPLD, PLCC44) + 2803A - ST ULN2803A Eight Darlington Transistor Arrays With Common Emitters (DIP18) + 4116R - 4116R-001 Bourns Type 4100R Series Resistor Network (DIP16) + M5M442256 - Mitsubishi M5M442256AL-8 256k x4 DRAM (ZIP28) + W241024 - Winbond W241024AK-20 128 x8 SRAM (NDIP32) + KYLR1 - 8 Pin Gun Connector + +Note 1: Some PCBs use a 11.2896MHz OSC instead of the 11.0592MHz +Note 2: Some PCBs use a TMS34010FNL-40 instead of the TMS34010FNL-50 + + Egg Venture & Lethal Justice JAMMA Pinout + + Main Jamma Connector + Solder Side | Parts Side +------------------------------------------------------------------ + GND | A | 1 | GND + GND | B | 2 | GND + +5 | C | 3 | +5 + +5 | D | 4 | +5 + -5 | E | 5 | -5 + +12 | F | 6 | +12 +------------ KEY ------------| H | 7 |------------ KEY ----------- + | J | 8 | Coin Counter # 1 + | K | 9 | + L Speaker (-) | L | 10| L Speaker (+) + R Speaker (-) | M | 11| R Speaker (+) + Video Green | N | 12| Video Red + Video Sync | P | 13| Video Blue + Service Switch | R | 14| Video GND + | S | 15| + Coin Switch 2 | T | 16| Coin Switch 1 + Start Player 2 | U | 17| Start Player 1 + | V | 18| + | W | 19| + | X | 20| + | Y | 21| + | Z | 22| + | a | 23| + | b | 24| + | c | 25| + | d | 26| + GND | e | 27| GND + GND | f | 28| GND + + + Gun Connector Pinout + + 1| +5 Volts + 2| Gun OPTO Player 1 + 3| Gun OPTO Player 2 + 4| NOT USED + 5| Gun Trigger Player 1 + 6| NOT USED + 7| Gun Trigger Player 2 + 8| KEY + 9| Ground + ++5v and GND are wired to both player 1 & 2 + + +The Egg Venture/Lethal Justice PCB does NOT supply an amplified +sound signal. An external sound AMP is required + +Addition information for Sound & AMP hookup: + + Power AMP /| + +-------------------+ / | + | | -------| | Right Speaker + [| Volume/Gain | | ----| | + | R+|]--| | \ | + [| BASS R-|]-----| \| + | | + [| Treble L+|]-----| /| + | L-|]--| | / | + | | | ----| | Left Speaker +Pin #L (-) | | -------| | + --------->|\ | \ | +Pin #10(+) | | L I | \| + --------->|/ N | + | P | +Pin #M (-) | U | + --------->|\ T | +Pin #11(+) | | R | + --------->|/ RMT|]--| +12 Volts + | +12|]--+----------- To Power Source + | GND|]-------------- + +-------------------+ Ground + + + + Frantic Fred JAMMA Pinout + + Main Jamma Connector + Solder Side | Parts Side +------------------------------------------------------------------ + GND | A | 1 | GND + GND | B | 2 | GND + +5 | C | 3 | +5 + +5 | D | 4 | +5 + | E | 5 | + +12 | F | 6 | +12 +------------ KEY ------------| H | 7 |------------ KEY ----------- + Ticket Counter | J | 8 | Coin Counter # 1 + Marquee* | K | 9 | Ticket Motor + | L | 10| + R Speaker (-) | M | 11| R Speaker (+) + Video Green | N | 12| Video Red + Video Sync | P | 13| Video Blue + Service Switch | R | 14| Video GND + | S | 15| Ticket Sense + Coin Switch 2 | T | 16| Coin Switch 1 + | U | 17| + | V | 18| + | W | 19| + Dummy Pin | X | 20| Bonus Button + | Y | 21| + Dummy Pin | Z | 22| Wheel + Dummy Pin | a | 23| Wheel + | b | 24| + | c | 25| + | d | 26| + GND | e | 27| GND + GND | f | 28| GND + +* There is a resistor connected between +12v & Marquee - so it's to power the light + +***************************************************************************/ + +#include "emu.h" +#include "lethalj.h" + +#include "sound/okim6295.h" +#include "emupal.h" +#include "speaker.h" + + +#define MASTER_CLOCK XTAL(40'000'000) +#define SOUND_CLOCK XTAL(2'000'000) + +#define VIDEO_CLOCK XTAL(11'289'600) +#define VIDEO_CLOCK_LETHALJ XTAL(11'059'200) + + + +/************************************* + * + * Custom inputs + * + *************************************/ + +CUSTOM_INPUT_MEMBER(lethalj_state::cclownz_paddle) +{ + int value = m_paddle->read(); + return ((value << 4) & 0xf00) | (value & 0x00f); +} + + + +/************************************* + * + * Output controls + * + *************************************/ + +void lethalj_state::ripribit_control_w(uint16_t data) +{ + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + m_ticket->motor_w(BIT(data, 1)); + m_lamps[0] = BIT(data, 2); +} + + +void lethalj_state::cfarm_control_w(uint16_t data) +{ + m_ticket->motor_w(BIT(data, 0)); + m_lamps[0] = BIT(data, 2); + m_lamps[1] = BIT(data, 3); + m_lamps[2] = BIT(data, 4); + machine().bookkeeping().coin_counter_w(0, BIT(data, 7)); +} + + +void lethalj_state::cclownz_control_w(uint16_t data) +{ + m_ticket->motor_w(BIT(data, 0)); + m_lamps[0] = BIT(data, 2); + m_lamps[1] = BIT(data, 4); + m_lamps[2] = BIT(data, 5); + machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); +} + + + +/************************************* + * + * Memory maps + * + *************************************/ + +void lethalj_state::lethalj_map(address_map &map) +{ + map(0x00000000, 0x003fffff).ram(); + map(0x04000000, 0x0400000f).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write)).umask16(0x00ff); + map(0x04000010, 0x0400001f).rw("oki2", FUNC(okim6295_device::read), FUNC(okim6295_device::write)).umask16(0x00ff); + map(0x04100000, 0x0410000f).rw("oki3", FUNC(okim6295_device::read), FUNC(okim6295_device::write)).umask16(0x00ff); +// map(0x04100010, 0x0410001f).nopr(); /* read but never examined */ + map(0x04200000, 0x0420001f).nopw(); /* clocks bits through here */ + map(0x04300000, 0x0430007f).r(FUNC(lethalj_state::lethalj_gun_r)); + map(0x04400000, 0x0440000f).nopw(); /* clocks bits through here */ + map(0x04500010, 0x0450001f).portr("IN0"); + map(0x04600000, 0x0460000f).portr("IN1"); + map(0x04700000, 0x0470007f).w(FUNC(lethalj_state::blitter_w)); + map(0xc0000240, 0xc000025f).nopw(); /* seems to be a bug in their code, one of many. */ + map(0xff800000, 0xffffffff).rom().region("maincpu", 0); +} + + + +/************************************* + * + * Input ports + * + *************************************/ + +static INPUT_PORTS_START( lethalj ) + PORT_START("IN0") + PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* ??? Seems to be rigged up to the auto scroll, and acts as a fast forward*/ + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0xffe0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("IN1") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x00c0, DEF_STR( Free_Play ) ) + PORT_DIPNAME( 0x0300, 0x0100, DEF_STR( Lives ) ) + PORT_DIPSETTING( 0x0000, "2" ) + PORT_DIPSETTING( 0x0100, "3" ) + PORT_DIPSETTING( 0x0200, "4" ) + PORT_DIPSETTING( 0x0300, "5" ) + PORT_DIPNAME( 0x0c10, 0x0010, "Right Gun Offset" ) + PORT_DIPSETTING( 0x0000, "-4" ) + PORT_DIPSETTING( 0x0400, "-3" ) + PORT_DIPSETTING( 0x0800, "-2" ) + PORT_DIPSETTING( 0x0c00, "-1" ) + PORT_DIPSETTING( 0x0010, "0" ) + PORT_DIPSETTING( 0x0410, "+1" ) + PORT_DIPSETTING( 0x0810, "+2" ) + PORT_DIPSETTING( 0x0c10, "+3" ) + PORT_DIPNAME( 0x3020, 0x0020, "Left Gun Offset" ) + PORT_DIPSETTING( 0x0000, "-4" ) + PORT_DIPSETTING( 0x1000, "-3" ) + PORT_DIPSETTING( 0x2000, "-2" ) + PORT_DIPSETTING( 0x3000, "-1" ) + PORT_DIPSETTING( 0x0020, "0" ) + PORT_DIPSETTING( 0x1020, "+1" ) + PORT_DIPSETTING( 0x2020, "+2" ) + PORT_DIPSETTING( 0x3020, "+3" ) + PORT_DIPNAME( 0x4000, 0x0000, "DIP E" ) + PORT_DIPSETTING( 0x0000, "0" ) + PORT_DIPSETTING( 0x4000, "1" ) + PORT_DIPNAME( 0x8000, 0x8000, "Global Gun Offset" ) + PORT_DIPSETTING( 0x0000, "-2.5" ) + PORT_DIPSETTING( 0x8000, "+0" ) + + PORT_START("LIGHT0_X") /* fake analog X */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) + + PORT_START("LIGHT0_Y") /* fake analog Y */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) + + PORT_START("LIGHT1_X") /* fake analog X */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2) + + PORT_START("LIGHT1_Y") /* fake analog Y */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2) +INPUT_PORTS_END + + +static INPUT_PORTS_START( eggventr ) + PORT_START("IN0") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_DIPNAME( 0x0070, 0x0000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,3,2") + PORT_DIPSETTING( 0x0040, DEF_STR( 8C_1C ) ) + PORT_DIPSETTING( 0x0030, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x0050, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x0060, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x0070, DEF_STR( Free_Play ) ) + PORT_DIPUNUSED_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:1" ) // 4-position switch - switch 1 not used + PORT_DIPNAME( 0x0300, 0x0200, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW3:8,7") // Verified Correct + PORT_DIPSETTING( 0x0000, "3" ) + PORT_DIPSETTING( 0x0100, "4" ) + PORT_DIPSETTING( 0x0200, "5" ) + PORT_DIPSETTING( 0x0300, "6" ) + PORT_DIPNAME( 0x0c00, 0x0400, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW3:6,5") // According to info from The Gameroom / Manual + PORT_DIPSETTING( 0x0c00, DEF_STR( Very_Easy) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Medium ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Hard ) ) + PORT_DIPNAME( 0x1000, 0x1000, "Slot Machine" ) PORT_DIPLOCATION("SW3:4") // Verified Correct + PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( On ) ) + PORT_DIPUNUSED_DIPLOC( 0x2000, IP_ACTIVE_LOW, "SW3:3" ) // Manual says switches 1-3 are reserved + PORT_DIPUNUSED_DIPLOC( 0x4000, IP_ACTIVE_LOW, "SW3:2" ) + PORT_DIPUNUSED_DIPLOC( 0x8000, IP_ACTIVE_LOW, "SW3:1" ) + + PORT_START("IN1") + PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x7f00, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 ) + + PORT_START("LIGHT0_X") /* fake analog X */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) + + PORT_START("LIGHT0_Y") /* fake analog Y */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) + + PORT_START("LIGHT1_X") /* fake analog X */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2) + + PORT_START("LIGHT1_Y") /* fake analog Y */ + PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2) +INPUT_PORTS_END + +static INPUT_PORTS_START( eggventr2 ) + PORT_INCLUDE(eggventr) + + PORT_MODIFY("IN0") + PORT_DIPNAME( 0x0300, 0x0200, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW3:8,7") // Verified Correct - 1 extra life per setting + PORT_DIPSETTING( 0x0000, "4" ) + PORT_DIPSETTING( 0x0100, "5" ) + PORT_DIPSETTING( 0x0200, "6" ) + PORT_DIPSETTING( 0x0300, "7" ) +INPUT_PORTS_END + +static INPUT_PORTS_START( eggvntdx ) + PORT_INCLUDE(eggventr) + + PORT_MODIFY("IN0") + PORT_DIPUNUSED_DIPLOC( 0x1000, IP_ACTIVE_LOW, "SW3:4" ) // Was "Slot Machine" - The slot machine is present in the code as a 'bonus stage' + // (when the egg reaches Vegas?), but not actually called (EC). +INPUT_PORTS_END + + +static INPUT_PORTS_START( ripribit ) + PORT_START("IN0") + PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) + PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("IN1") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_HIGH ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_DIPNAME( 0x0010, 0x0010, "Bonus Ticket Increment" ) + PORT_DIPSETTING( 0x0010, "+1 Ticket Per Game" ) + PORT_DIPSETTING( 0x0000, "Fixed" ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( On ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) + PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_2C ) ) + PORT_DIPNAME( 0x0700, 0x0200, "Starting Jackpot" ) + PORT_DIPSETTING( 0x0000, "0" ) + PORT_DIPSETTING( 0x0100, "5" ) + PORT_DIPSETTING( 0x0200, "10" ) + PORT_DIPSETTING( 0x0300, "15" ) + PORT_DIPSETTING( 0x0400, "20" ) + PORT_DIPSETTING( 0x0500, "25" ) + PORT_DIPSETTING( 0x0600, "30" ) + PORT_DIPSETTING( 0x0700, "35" ) + PORT_DIPNAME( 0x1800, 0x1800, "Bonus Screen Setting" ) + PORT_DIPSETTING( 0x0000, "1" ) + PORT_DIPSETTING( 0x0800, "2" ) + PORT_DIPSETTING( 0x1000, "3" ) + PORT_DIPSETTING( 0x1800, "4" ) + PORT_DIPNAME( 0xe000, 0x8000, "Points per Ticket" ) + PORT_DIPSETTING( 0xe000, "200" ) + PORT_DIPSETTING( 0xc000, "300" ) + PORT_DIPSETTING( 0xa000, "400" ) + PORT_DIPSETTING( 0x8000, "500" ) + PORT_DIPSETTING( 0x6000, "600" ) + PORT_DIPSETTING( 0x4000, "700" ) + PORT_DIPSETTING( 0x2000, "800" ) + PORT_DIPSETTING( 0x0000, "1000" ) +INPUT_PORTS_END + + +static INPUT_PORTS_START( cfarm ) + PORT_START("IN0") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_HIGH ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_DIPNAME( 0x0010, 0x0010, "Bonus Ticket Increment" ) + PORT_DIPSETTING( 0x0010, "+1 Ticket Per Game" ) + PORT_DIPSETTING( 0x0000, "Fixed" ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( On ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) + PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_2C ) ) + PORT_DIPNAME( 0x0700, 0x0300, "Starting Jackpot" ) + PORT_DIPSETTING( 0x0000, "0" ) + PORT_DIPSETTING( 0x0100, "5" ) + PORT_DIPSETTING( 0x0200, "8" ) + PORT_DIPSETTING( 0x0300, "10" ) + PORT_DIPSETTING( 0x0400, "12" ) + PORT_DIPSETTING( 0x0500, "15" ) + PORT_DIPSETTING( 0x0600, "18" ) + PORT_DIPSETTING( 0x0700, "20" ) + PORT_DIPNAME( 0x1800, 0x1800, "Bonus Screen Setting" ) + PORT_DIPSETTING( 0x0000, "1" ) + PORT_DIPSETTING( 0x0800, "2" ) + PORT_DIPSETTING( 0x1000, "3" ) + PORT_DIPSETTING( 0x1800, "4" ) + PORT_DIPNAME( 0xe000, 0x8000, "Eggs per Ticket" ) + PORT_DIPSETTING( 0xe000, "1" ) + PORT_DIPSETTING( 0xc000, "2" ) + PORT_DIPSETTING( 0xa000, "3" ) + PORT_DIPSETTING( 0x8000, "4" ) + PORT_DIPSETTING( 0x6000, "5" ) + PORT_DIPSETTING( 0x4000, "6" ) + PORT_DIPSETTING( 0x2000, "8" ) + PORT_DIPSETTING( 0x0000, "10" ) + + PORT_START("IN1") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) + PORT_BIT( 0x0006, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + + +static INPUT_PORTS_START( cclownz ) + PORT_START("IN0") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_HIGH ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_DIPNAME( 0x0010, 0x0010, "Bonus Ticket Increment" ) + PORT_DIPSETTING( 0x0010, "+1 Ticket Per Game" ) + PORT_DIPSETTING( 0x0000, "Fixed" ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( On ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) + PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_2C ) ) + PORT_DIPNAME( 0x0700, 0x0700, "Starting Jackpot" ) + PORT_DIPSETTING( 0x0000, "0" ) + PORT_DIPSETTING( 0x0100, "2" ) + PORT_DIPSETTING( 0x0200, "5" ) + PORT_DIPSETTING( 0x0300, "8" ) + PORT_DIPSETTING( 0x0400, "10" ) + PORT_DIPSETTING( 0x0500, "15" ) + PORT_DIPSETTING( 0x0600, "20" ) + PORT_DIPSETTING( 0x0700, "30" ) + PORT_DIPNAME( 0x1800, 0x1800, "Bonus Screen Settings" ) + PORT_DIPSETTING( 0x0000, "1" ) + PORT_DIPSETTING( 0x0800, "2" ) + PORT_DIPSETTING( 0x1000, "3" ) + PORT_DIPSETTING( 0x1800, "4" ) + PORT_DIPNAME( 0xe000, 0x8000, "Points per Ticket" ) + PORT_DIPSETTING( 0xe000, "700" ) + PORT_DIPSETTING( 0xc000, "900" ) + PORT_DIPSETTING( 0xa000, "1200" ) + PORT_DIPSETTING( 0x8000, "1500" ) + PORT_DIPSETTING( 0x6000, "1800" ) + PORT_DIPSETTING( 0x4000, "2100" ) + PORT_DIPSETTING( 0x2000, "2400" ) + PORT_DIPSETTING( 0x0000, "3000" ) + + PORT_START("IN1") + PORT_BIT( 0x0f0f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(lethalj_state, cclownz_paddle) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) + PORT_BIT( 0x0060, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("PADDLE") + PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE +INPUT_PORTS_END + + +static INPUT_PORTS_START( franticf ) // how do the directional inputs work? + PORT_START("IN0") + PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x8000, "x" ) + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("IN1") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,3") + PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) ) + PORT_DIPNAME( 0x0040, 0x0040, "Bonus Mode" ) PORT_DIPLOCATION("SW1:2") + PORT_DIPSETTING( 0x0040, "0 Missed Apples" ) + PORT_DIPSETTING( 0x0000, "1 Missed Apple" ) + PORT_DIPNAME( 0x0080, 0x0000, "Bonus Ticket" ) PORT_DIPLOCATION("SW1:1") + PORT_DIPSETTING( 0x0080, "Every 3rd Game" ) + PORT_DIPSETTING( 0x0000, "Every Game" ) + PORT_DIPNAME( 0x0100, 0x0100, "Double Ticket Values" ) PORT_DIPLOCATION("SW3:1") + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, "Bonus Round" ) PORT_DIPLOCATION("SW3:2") + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) /* Enables "Cyclone" bonus option at the end of the game */ + PORT_DIPNAME( 0x0400, 0x0400, "Ticket Payout" ) PORT_DIPLOCATION("SW3:3") + PORT_DIPSETTING( 0x0400, "Preset" ) /* AKA "Just for Playing" */ + PORT_DIPSETTING( 0x0000, "Based on Play" ) + PORT_DIPNAME( 0x1800, 0x1800, "Apples Per Game" ) PORT_DIPLOCATION("SW3:5,4") + PORT_DIPSETTING( 0x0000, "5" ) + PORT_DIPSETTING( 0x0800, "7" ) + PORT_DIPSETTING( 0x1000, "8" ) + PORT_DIPSETTING( 0x1800, "9" ) + PORT_DIPNAME( 0xe000, 0x8000, "Ticket Preset" ) PORT_DIPLOCATION("SW3:8,7,6") + PORT_DIPSETTING( 0x0000, "1" ) + PORT_DIPSETTING( 0x2000, "2" ) + PORT_DIPSETTING( 0x4000, "3" ) + PORT_DIPSETTING( 0x6000, "4" ) + PORT_DIPSETTING( 0x8000, "5" ) + PORT_DIPSETTING( 0xa000, "6" ) + PORT_DIPSETTING( 0xc000, "7" ) + PORT_DIPSETTING( 0xe000, "8" ) +/* + "Play Based" Tickets despenced based on setting of DSW6-8 + -------------------------------------------------------------- +Apples Per Game 0x7000 0x6000 0x5000 0x4000 0x3000 0x2000 0x1000 0x0000 +---------------------------------------------------------------------------------- + 5 3 9 3 9 7 6 5 5 + 7 4 10 4 13 8 7 9 7 + 8 4 10 6 15 9 9 9 8 + 9 5 11 6 18 10 9 10 9 + +*/ + +// PORT_START("PADDLE") +// PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE +INPUT_PORTS_END + +static INPUT_PORTS_START( franticfa ) // how do the directional inputs work? + PORT_START("IN0") + PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x8000, "x" ) + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("IN1") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,3") + PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) ) + PORT_DIPNAME( 0x0040, 0x0040, "Bonus Mode" ) PORT_DIPLOCATION("SW1:2") + PORT_DIPSETTING( 0x0040, "0 Missed Apples" ) + PORT_DIPSETTING( 0x0000, "1 Missed Apple" ) + PORT_DIPNAME( 0x0080, 0x0000, "Bonus Ticket" ) PORT_DIPLOCATION("SW1:1") + PORT_DIPSETTING( 0x0080, "Every 3rd Game" ) + PORT_DIPSETTING( 0x0000, "Every Game" ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1") /* This one likey Enables/Disables the Bonus round */ + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2") /* Preset & play based? */ + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + +/* + PORT_DIPNAME( 0x1c00, 0x0400, "Number of Fruit" ) + PORT_DIPSETTING( 0x0000, "3" ) + PORT_DIPSETTING( 0x0400, "5" ) + PORT_DIPSETTING( 0x0800, "7" ) + PORT_DIPSETTING( 0x0c00, "9" ) + PORT_DIPSETTING( 0x1000, "9 (duplicate 1)" ) // appear to be duplicates but could affect something else too + PORT_DIPSETTING( 0x1400, "9 (duplicate 2)" ) + PORT_DIPSETTING( 0x1800, "9 (duplicate 3)" ) + PORT_DIPSETTING( 0x1c00, "9 (duplicate 4)" ) + PORT_DIPNAME( 0x6000, 0x2000, "Initial Fruit Values" ) + PORT_DIPSETTING( 0x0000, "Lowest" ) + PORT_DIPSETTING( 0x2000, "Low" ) + PORT_DIPSETTING( 0x4000, "Medium" ) + PORT_DIPSETTING( 0x6000, "High" ) +*/ + + PORT_DIPNAME( 0x0c00, 0x0400, "Apples Per Game" ) PORT_DIPLOCATION("SW3:4,3") + PORT_DIPSETTING( 0x0000, "3" ) + PORT_DIPSETTING( 0x0400, "5" ) + PORT_DIPSETTING( 0x0800, "7" ) + PORT_DIPSETTING( 0x0c00, "9" ) + PORT_DIPNAME( 0x7000, 0x7000, "Ticket Preset" ) PORT_DIPLOCATION("SW3:7,6,5") + PORT_DIPSETTING( 0x0000, "1" ) + PORT_DIPSETTING( 0x1000, "2" ) + PORT_DIPSETTING( 0x2000, "3" ) + PORT_DIPSETTING( 0x3000, "4" ) + PORT_DIPSETTING( 0x4000, "5" ) + PORT_DIPSETTING( 0x5000, "6" ) + PORT_DIPSETTING( 0x6000, "7" ) + PORT_DIPSETTING( 0x7000, "8" ) + PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW3:8") + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + +// PORT_START("PADDLE") +// PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE +INPUT_PORTS_END + + +/************************************* + * + * Machine drivers + * + *************************************/ + +void lethalj_state::gameroom(machine_config &config) +{ + /* basic machine hardware */ + TMS34010(config, m_maincpu, MASTER_CLOCK); + m_maincpu->set_addrmap(AS_PROGRAM, &lethalj_state::lethalj_map); + m_maincpu->set_halt_on_reset(false); + m_maincpu->set_pixel_clock(VIDEO_CLOCK); + m_maincpu->set_pixels_per_clock(1); + m_maincpu->set_scanline_ind16_callback(FUNC(lethalj_state::scanline_update)); + + TICKET_DISPENSER(config, m_ticket, attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH); + + /* video hardware */ + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(VIDEO_CLOCK, 701, 0, 512, 263, 0, 236); + m_screen->set_screen_update("maincpu", FUNC(tms34010_device::tms340x0_ind16)); + m_screen->set_palette("palette"); + + PALETTE(config, "palette", palette_device::RGB_555); + + /* sound hardware */ + SPEAKER(config, "mono").front_center(); + + OKIM6295(config, "oki1", SOUND_CLOCK, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.33); + + OKIM6295(config, "oki2", SOUND_CLOCK, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.33); + + OKIM6295(config, "oki3", SOUND_CLOCK, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.33); +} + + +void lethalj_state::lethalj(machine_config &config) +{ + gameroom(config); + + m_maincpu->set_pixel_clock(VIDEO_CLOCK_LETHALJ); + + m_screen->set_raw(VIDEO_CLOCK_LETHALJ, 689, 0, 512, 259, 0, 236); +} + + + +/************************************* + * + * ROM definitions + * + *************************************/ + +ROM_START( lethalj ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "lethal_vc8_2.3.vc8", 0x000000, 0x080000, CRC(8d568e1d) SHA1(e4dd3794789f9ccd7be8374978a3336f2b79136f) ) // Labeled as LETHAL VC8 2.3, also found labeled as VC-8 + ROM_LOAD16_BYTE( "lethal_vc9_2.3.vc9", 0x000001, 0x080000, CRC(8f22add4) SHA1(e773d3ae9cf512810fc266e784d21ed115c8830c) ) // Labeled as LETHAL VC9 2.3, also found labeled as VC-9 + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "gr1.gr1", 0x000000, 0x100000, CRC(27f7b244) SHA1(628b29c066e217e1fe54553ea3ed98f86735e262) ) // These had non specific GRx labels, also found labeled as GR-x + ROM_LOAD16_BYTE( "gr2.gr2", 0x000001, 0x100000, CRC(1f25d3ab) SHA1(bdb8a3c546cdee9a5630c47b9c5079a956e8a093) ) + ROM_LOAD16_BYTE( "gr4.gr4", 0x200000, 0x100000, CRC(c5838b4c) SHA1(9ad03d0f316eb31fdf0ca6f65c02a27d3406d072) ) + ROM_LOAD16_BYTE( "gr3.gr3", 0x200001, 0x100000, CRC(ba9fa057) SHA1(db6f11a8964870f04f94fef6f1b1a58168a942ad) ) + ROM_LOAD16_BYTE( "lethal_gr6_2.3.gr6", 0x400000, 0x100000, CRC(51c99b85) SHA1(9a23bf21a73d2884b49c64a8f42c288534c79dc5) ) // Labeled as LETHAL GR6 2.3, also found labeled as GR-6 + ROM_LOAD16_BYTE( "lethal_gr5_2.3.gr5", 0x400001, 0x100000, CRC(80dda9b5) SHA1(d8a79cad112bc7d9e4ba31a950e4807581f3bf46) ) // Labeled as LETHAL GR5 2.3, also found labeled as GR-5 + + ROM_REGION( 0x40000, "oki1", 0 ) // sound data + ROM_LOAD( "sound1.u20", 0x00000, 0x40000, CRC(7d93ca66) SHA1(9e1dc0efa5d0f770c7e1f10de56fbf5620dea437) ) + + ROM_REGION( 0x40000, "oki2", 0 ) // sound data + ROM_LOAD( "sound1.u21", 0x00000, 0x40000, CRC(7d3beae0) SHA1(5ec753c5fd5ca0f9492c9e274703a1aa758062a7) ) + + ROM_REGION( 0x40000, "oki3", 0 ) // sound data + ROM_LOAD( "sound1.u18", 0x00000, 0x40000, CRC(7d93ca66) SHA1(9e1dc0efa5d0f770c7e1f10de56fbf5620dea437) ) +ROM_END + + +ROM_START( eggventr ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "evc8.10.vc8", 0x000000, 0x020000, CRC(225d1164) SHA1(b0dc55f2e8ded1fe7874de05987fcf879772289e) ) // Labeled as EVC8.10 + ROM_LOAD16_BYTE( "evc9.10.vc9", 0x000001, 0x020000, CRC(42f6e904) SHA1(11be8e7383a218aac0e1a63236bbdb7cca0993bf) ) // Labeled as EVC9.10 + ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff + ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) + ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) + ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) + ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) + ROM_LOAD16_BYTE( "egr6.3.gr6", 0x400000, 0x100000, CRC(f299d818) SHA1(abbb333c43675d34c59201b5d297779cfea8b092) ) // Labeled as EGR6.3 + ROM_LOAD16_BYTE( "egr5.3.gr5", 0x400001, 0x100000, CRC(ebfca07b) SHA1(20465d14b41d99651166f221057737d7b3cc770c) ) // Labeled as EGR5.3 + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) +ROM_END + + +ROM_START( eggventr8 ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "evc8.8.vc8", 0x000000, 0x020000, CRC(5a130c04) SHA1(00408912b436efa003bb02dce90fae4fe33a0180) ) // Labeled as EVC8.8 + ROM_LOAD16_BYTE( "evc9.8.vc9", 0x000001, 0x020000, CRC(3ac0a95b) SHA1(7f3bd0e6d2d790af4aa6881ea8de8b296a64164a) ) // Labeled as EVC9.8 + ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff + ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) + ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) + ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) + ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) + ROM_LOAD16_BYTE( "egr6.3.gr6", 0x400000, 0x100000, CRC(f299d818) SHA1(abbb333c43675d34c59201b5d297779cfea8b092) ) // Labeled as EGR6.3 + ROM_LOAD16_BYTE( "egr5.3.gr5", 0x400001, 0x100000, CRC(ebfca07b) SHA1(20465d14b41d99651166f221057737d7b3cc770c) ) // Labeled as EGR5.3 + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) +ROM_END + + +ROM_START( eggventr7 ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "evc8.7.vc8", 0x000000, 0x020000, CRC(99999899) SHA1(e3908600fa711baa7f7562f86498ec7e988a5bea) ) // Labeled as EVC8.7 + ROM_LOAD16_BYTE( "evc9.7.vc9", 0x000001, 0x020000, CRC(1b608155) SHA1(256dd981515d57f806a3770bdc6ff46b9000f7f3) ) // Labeled as EVC9.7 + ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff + ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) + ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) + ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) + ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) + ROM_LOAD16_BYTE( "egr6.3.gr6", 0x400000, 0x100000, CRC(f299d818) SHA1(abbb333c43675d34c59201b5d297779cfea8b092) ) // Labeled as EGR6.3 + ROM_LOAD16_BYTE( "egr5.3.gr5", 0x400001, 0x100000, CRC(ebfca07b) SHA1(20465d14b41d99651166f221057737d7b3cc770c) ) // Labeled as EGR5.3 + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) +ROM_END + +// There is an undumped release 3 when GR5 & GR6 was updated to the .3 versions + +ROM_START( eggventr2 ) // Comes from a PCB with an early serial number EV00123, program roms are 27C040 with required data at 0x7ffe0 in each rom + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "ev_vc8.2.vc8", 0x000000, 0x080000, CRC(ce1da4f7) SHA1(c163041d684dc6a6fab07394e8aac3d82a2ecb52) ) // Labeled as EV VC8.2 - Added "RANK" screen after start button push + ROM_LOAD16_BYTE( "ev_vc9.2.vc9", 0x000001, 0x080000, CRC(4b24906b) SHA1(2e9b85a658cb02d76854f3ee5a071e4161d0d0cf) ) // Labeled as EV VC9.2 - Align guns: game lets you fire 3 shots and starts + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) + ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) + ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) + ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) + ROM_LOAD16_BYTE( "ev_gr6.2.gr6", 0x400000, 0x100000, CRC(a4d9d126) SHA1(d5f2bc4bfa7c0462865907dbc39fc0479340e1c8) ) // Labeled as EV GR6.2 - Replaces Kyle Hodgetts copyright with ICE logo & added 2 Eggs flying planes + ROM_LOAD16_BYTE( "ev_gr5.2.gr5", 0x400001, 0x100000, CRC(b5162234) SHA1(3f05c7eb5b00805eb7fc1e3634dea29b1ce3af62) ) // Labeled as EV GR5.2 - Removed sub title and web site information + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) +ROM_END + + +ROM_START( eggventr1 ) // The original first release as Egg Venture: The Adventures of Egg & Kyle Hodgetts copyright + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "vc-8.vc8", 0x000000, 0x080000, CRC(30a3fb0a) SHA1(e4bcafaf82b10a57513558927ea4f5d26195fc1b) ) // Labeled as VC-8 - Align guns: unlimited shots, player MUST press start + ROM_LOAD16_BYTE( "vc-9.vc9", 0x000001, 0x080000, CRC(65ebf5e8) SHA1(afc72bc1e50a8cc8ef080cc4aea4d75f8c9f3e8d) ) // Labeled as VC-9 + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data, NOTE: Only GR-1 & GR-2 were in the correct GRx PCB locations + ROM_LOAD16_BYTE( "gr-1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) // GR-1 + ROM_LOAD16_BYTE( "gr-2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) // GR-2 + ROM_LOAD16_BYTE( "gr-3.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) // GR-3 + ROM_LOAD16_BYTE( "gr-4.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) // GR-4 + ROM_LOAD16_BYTE( "gr-5.gr6", 0x400000, 0x100000, CRC(8959ad2c) SHA1(4a5c07c5e037696413871c43c7eb056540c5048e) ) // GR-5 - Shows C 1997 KYLE HODGETTS on title screen + ROM_LOAD16_BYTE( "gr-6.gr5", 0x400001, 0x100000, CRC(0d33cc61) SHA1(062c23b6b959f49631cd2666731c39fd3ff7c57d) ) // GR-6 - Sub title "ADVENTURES OF EGG" & VISIT OUR WEB SITE AT "WWWTHEGAMEROOM.COM" (no period after "www") shows after credit + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) +ROM_END + + +ROM_START( eggventra ) // A.L. Australia license + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "egr8.vc8", 0x000000, 0x080000, CRC(a62c4143) SHA1(a21d6b7efdba4965285265426ed79f3249a86685) ) + ROM_LOAD16_BYTE( "egr9.vc9", 0x000001, 0x080000, CRC(bc55bc7a) SHA1(d6e3fc76b4a0a20176af1338a32bb81f0599fdc0) ) + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) + ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) + ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) + ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) + ROM_LOAD16_BYTE( "egr6.gr6", 0x400000, 0x100000, CRC(0d73dd85) SHA1(d99a95ace89483688bae48021b416fc0a3c531d6) ) + ROM_LOAD16_BYTE( "egr5.gr5", 0x400001, 0x100000, CRC(6d89c4e3) SHA1(613703a3f194af3ed44a58610d99b7dc99382725) ) + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) +ROM_END + + +ROM_START( eggventrd ) // Deluxe version + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "eggdlx.vc8", 0x000000, 0x020000, CRC(8d678842) SHA1(92b18ec903ec8579e7dffb40284987f1d44255b8) ) // Also known to be labeled ED VC 8 + ROM_LOAD16_BYTE( "eggdlx.vc9", 0x000001, 0x020000, CRC(9db3fd23) SHA1(165a12a2d107c93cf216e755596e7457010a8f17) ) // Also known to be labeled ED VC 9 + ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with data repeated 4 times + ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with data repeated 4 times + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) + ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) + ROM_LOAD16_BYTE( "eggdlx.gr4", 0x200000, 0x100000, CRC(cfb1e28b) SHA1(8d535a27158acee893233cf2012b4ab0ffc8dc03) ) // Also known to be labeled ED GR 4 + ROM_LOAD16_BYTE( "eggdlx.gr3", 0x200001, 0x100000, CRC(a7da3891) SHA1(9139c846006bbed4bdb183659a5b40aaa0000708) ) // Also known to be labeled ED GR 3 + ROM_LOAD16_BYTE( "eggdlx.gr6", 0x400000, 0x100000, CRC(97d02e8a) SHA1(6f9532fb031953c1187782b4fce5a0cfaf9461b3) ) // Also known to be labeled ED GR 6 + ROM_LOAD16_BYTE( "eggdlx.gr5", 0x400001, 0x100000, CRC(387d9176) SHA1(9f26f97cab8baeea1d5e4860a8a35a55bdc601e8) ) // Also known to be labeled ED GR 5 + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) +ROM_END + + +ROM_START( franticf ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "cfvc_8.02.vc8", 0x000000, 0x020000, CRC(9c8ff952) SHA1(f5c5b001d12aa7564d106f90ca0c49da4224c84d) ) // AMD 27C010 EPROM + ROM_LOAD16_BYTE( "cfvc_9.02.vc9", 0x000001, 0x020000, CRC(8da38843) SHA1(dd3d1013bea69d2939d11bcbfe6269e89cb3ba77) ) // AMD 27C010 EPROM + ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) + ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "cfgr_1.0.gr1", 0x000000, 0x080000, CRC(5a60aca0) SHA1(33ad0a03ab70e29c0dbf2b034498e9fd395eb353) ) // Also known to be labeled "FFCGR 1.0" + ROM_LOAD16_BYTE( "cfgr_2.gr2", 0x000001, 0x080000, CRC(fc44a126) SHA1(54d27c3f5bdea33c72ea5595410178f1e70ac43b) ) + ROM_LOAD16_BYTE( "cfgr_4.gr4", 0x200000, 0x080000, CRC(b3997f9d) SHA1(25d67ee122eb342f3c617fef345a32abe965739e) ) // Also known to be labeled "CF GR 4.00" + ROM_LOAD16_BYTE( "cfgr_3.gr3", 0x200001, 0x080000, CRC(0834b6fe) SHA1(779fb60ce6b1dcdb432c6e3b48864ddb05b73038) ) + ROM_LOAD16_BYTE( "ffgr6.gr6", 0x400000, 0x080000, CRC(41bd31a2) SHA1(9e7b5479b2ae8001ea624a7d53e49cd85fb2984d) ) // Also known to be labeled "FF GR 6.00" + ROM_LOAD16_BYTE( "ffgr5.gr5", 0x400001, 0x080000, CRC(ca8a5e67) SHA1(ec9d74f13c21897a3d36626a2fc0320979aa6a3a) ) // Also known to be labeled "FF GR 5.00" + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "ffu18.u20", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) // known to be labeled either "FFU18" or "FF U18/U20" + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "ffu21.u21", 0x00000, 0x80000, CRC(7d9c85c8) SHA1(6090645d981d56eb8d072d042c0f02114c874137) ) // Also known to be labeled "CFU 21" + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "ffu18.u18", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) // known to be labeled either "FFU18" or "FF U18/U20" +ROM_END + + +ROM_START( franticfa ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "fred_vc-8.vc8", 0x000000, 0x080000, CRC(f7eb92a2) SHA1(c56a0432b8c4fe8522f6dd1e0b60eded3dfc25d2) ) + ROM_LOAD16_BYTE( "fred_vc-9.vc9", 0x000001, 0x080000, CRC(b657b800) SHA1(12649becab0019ea7150b5d797b72b07121c6a3e) ) + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "fred_gr1.gr1", 0x000000, 0x080000, CRC(acb75e63) SHA1(637ec6b7101f34a2bb93be8d0d5eaa800aafd332) ) + ROM_LOAD16_BYTE( "fred_gr2.gr2", 0x000001, 0x080000, CRC(b47c6363) SHA1(0acfd7dc45d21e6e73b5abbc544e7c0fa192c462) ) + ROM_LOAD16_BYTE( "fred_gr4.gr4", 0x200000, 0x080000, CRC(ac63729f) SHA1(dd856d983d85c38a784666105cb2d421bee8e76a) ) + ROM_LOAD16_BYTE( "fred_gr3.gr3", 0x200001, 0x080000, CRC(d7444ecc) SHA1(47b9369fec845e844ffccd121fdde12cb4842ec6) ) + ROM_LOAD16_BYTE( "fred_gr6.gr6", 0x400000, 0x080000, CRC(a0f1c918) SHA1(2004c2081a90ecc940d56f120f6e63190c8897a2) ) + ROM_LOAD16_BYTE( "fred_gr5.gr5", 0x400001, 0x080000, CRC(fcdf73a6) SHA1(081daa1dc6af59ce63b976e059533b23097cedd9) ) + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "fred_u20.u20", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) + + ROM_REGION( 0x80000, "oki2", ROMREGION_ERASE00 ) // sound data + /* Not populated */ + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "fred_u18.u18", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) +ROM_END + + +ROM_START( cclownz ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "cc-v1-vc8.bin", 0x000000, 0x080000, CRC(433fe6ac) SHA1(dea7aede9882ee52be88927418b7395418757d12) ) + ROM_LOAD16_BYTE( "cc-v1-vc9.bin", 0x000001, 0x080000, CRC(9d1b3dae) SHA1(44a97c38bc9685e97721722c67505832fa06b44d) ) + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "cc-gr1.bin", 0x000000, 0x100000, CRC(17c0ab2a) SHA1(f5ec66f4ac3292ef74f6434fe3ef17f9e977e8f6) ) + ROM_LOAD16_BYTE( "cc-gr2.bin", 0x000001, 0x100000, CRC(dead9528) SHA1(195ad9f7da61ecb5a364da92ba837aa3fcb3a347) ) + ROM_LOAD16_BYTE( "cc-gr4.bin", 0x200000, 0x100000, CRC(78cceed8) SHA1(bc8e5bb625072b17a5711402b07a39ea4a87a0f8) ) + ROM_LOAD16_BYTE( "cc-gr3.bin", 0x200001, 0x100000, CRC(af836fee) SHA1(9e32d5030d3bc5ff106242e5d4969b0150b2c516) ) + ROM_LOAD16_BYTE( "cc-gr6.bin", 0x400000, 0x100000, CRC(889d2771) SHA1(3222d7105c3a68e2050f00b07e8d84d57a9f7a19) ) + ROM_LOAD16_BYTE( "cc-gr5.bin", 0x400001, 0x100000, CRC(2a15ef8f) SHA1(3e33cff2657bb1371acf25641080aff2d8da6c05) ) + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "cc-s-u20.bin", 0x00000, 0x80000, CRC(252fc4b5) SHA1(bbc6c3599869f3f46d3df4f3f8d0a8d88d8e0132) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "cc-s-u21.bin", 0x00000, 0x80000, CRC(6c3da4ed) SHA1(f10cbea6e03ada5ac1535041636e96b6224967fa) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "cc-s-u18.bin", 0x00000, 0x80000, CRC(9cdf87af) SHA1(77dfc0bc1d535b5d585071dd4e9deb367003ab2d) ) + + ROM_REGION( 0x80000, "user2", 0 ) // convert these + ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) + ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + /* 25 / 26 are secure? */ +ROM_END + + +ROM_START( ripribit ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "ribbit_vc8_v3.5.vc8", 0x000000, 0x080000, CRC(8ce7f8f2) SHA1(b40b5127a0dc84a44e0283711cc526114e012c09) ) + ROM_LOAD16_BYTE( "ribbit_vc9_v3.5.vc9", 0x000001, 0x080000, CRC(70be27c3) SHA1(61328e51d083b0ffde739711675d19cfe3253244) ) + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "ribbit_gr1_rv2.81.gr1", 0x000000, 0x100000, CRC(e02c79b7) SHA1(75e352424c449cd5cba1057555928d7ee13ab113) ) + ROM_LOAD16_BYTE( "ribbit_gr2_rv2.81.gr2", 0x000001, 0x100000, CRC(09f48db7) SHA1(d0156c6e3d05ff81540c0eeb66e9a5e7fc4d053c) ) + ROM_LOAD16_BYTE( "ribbit_gr4_rv2.81.gr4", 0x200000, 0x100000, CRC(94d0db81) SHA1(aa46c2e5a627cf01c1d57002204ec3419f0d4503) ) + ROM_LOAD16_BYTE( "ribbit_gr3_rv2.81.gr3", 0x200001, 0x100000, CRC(b65e1a36) SHA1(4feb7ea0bec509fa07d27c76e5a3904b8d1690c4) ) + ROM_LOAD16_BYTE( "ribbit_gr6_rv2.81.gr6", 0x400000, 0x100000, CRC(c9ac211b) SHA1(75cbfa0f875da82d510d75ad28b9db0892b3da85) ) + ROM_LOAD16_BYTE( "ribbit_gr5_rv2.81.gr5", 0x400001, 0x100000, CRC(84ae466a) SHA1(4e7b3dc27a46f735ff13a753806b3688f34a64fe) ) + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data (music) + ROM_LOAD( "ribbit_rr_u20.u20", 0x00000, 0x80000, CRC(c345b779) SHA1(418058bbda74727ec99ac375982c9cd2c8bc5c86) ) + + ROM_REGION( 0x80000, "oki2", ROMREGION_ERASE00 ) // sound data + /* Not populated */ + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data (effects) + ROM_LOAD( "ribbit_rr_u18.u18", 0x00000, 0x80000, CRC(badb9cb6) SHA1(716d65b5ff8d3f8ff25ae70426ce318af9a92b7e) ) + + ROM_REGION( 0x80000, "user2", 0 ) // convert these + ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) + ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + /* 25 / 26 are secure? */ +ROM_END + + +ROM_START( ripribita ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "rr_v2-84-vc8.bin", 0x000000, 0x080000, CRC(5ecc432d) SHA1(073062528fbcf63be7e3c6695d60d048430f6e4b) ) + ROM_LOAD16_BYTE( "rr_v2-84-vc9.bin", 0x000001, 0x080000, CRC(d9bae3f8) SHA1(fcf8099ebe170ad5778aaa533bcfd1e5ead46e6b) ) + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "rr-gr1.bin", 0x000000, 0x100000, CRC(e02c79b7) SHA1(75e352424c449cd5cba1057555928d7ee13ab113) ) // Same data, different labels + ROM_LOAD16_BYTE( "rr-gr2.bin", 0x000001, 0x100000, CRC(09f48db7) SHA1(d0156c6e3d05ff81540c0eeb66e9a5e7fc4d053c) ) + ROM_LOAD16_BYTE( "rr-gr4.bin", 0x200000, 0x100000, CRC(94d0db81) SHA1(aa46c2e5a627cf01c1d57002204ec3419f0d4503) ) + ROM_LOAD16_BYTE( "rr-gr3.bin", 0x200001, 0x100000, CRC(b65e1a36) SHA1(4feb7ea0bec509fa07d27c76e5a3904b8d1690c4) ) + ROM_LOAD16_BYTE( "rr-gr6.bin", 0x400000, 0x100000, CRC(c9ac211b) SHA1(75cbfa0f875da82d510d75ad28b9db0892b3da85) ) + ROM_LOAD16_BYTE( "rr-gr5.bin", 0x400001, 0x100000, CRC(84ae466a) SHA1(4e7b3dc27a46f735ff13a753806b3688f34a64fe) ) + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data (music) + ROM_LOAD( "rr-s-u20.bin", 0x00000, 0x80000, CRC(c345b779) SHA1(418058bbda74727ec99ac375982c9cd2c8bc5c86) ) // Same data, different label + + ROM_REGION( 0x80000, "oki2", ROMREGION_ERASE00 ) // sound data + /* Not populated */ + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data (effects) + ROM_LOAD( "rr-s-u18.bin", 0x00000, 0x80000, CRC(badb9cb6) SHA1(716d65b5ff8d3f8ff25ae70426ce318af9a92b7e) ) // Same data, different label + + ROM_REGION( 0x80000, "user2", 0 ) // convert these + ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) + ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + /* 25 / 26 are secure? */ +ROM_END + + +ROM_START( cfarm ) + ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code + ROM_LOAD16_BYTE( "cf-v2-vc8.bin", 0x000000, 0x080000, CRC(93bcf145) SHA1(134ac3ee4fd837f56fb0b338289cf03108346539) ) + ROM_LOAD16_BYTE( "cf-v2-vc9.bin", 0x000001, 0x080000, CRC(954421f9) SHA1(bf1faa9b085f066d1e2ff6ee01c468b1c1d945e9) ) + + ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data + ROM_LOAD16_BYTE( "cf-gr1.bin", 0x000000, 0x100000, CRC(2241a06e) SHA1(f07a99372bb951dd345378da212b41cb8204e782) ) + ROM_LOAD16_BYTE( "cf-gr2.bin", 0x000001, 0x100000, CRC(31182263) SHA1(d5d36f9b5d612f681e6aa563831b6704bc05489e) ) + ROM_LOAD16_BYTE( "cf-gr4.bin", 0x200000, 0x100000, CRC(0883a6f2) SHA1(ef259dcdc7b1325f15a98f6c97ecb965b2b6f9b1) ) + ROM_LOAD16_BYTE( "cf-gr3.bin", 0x200001, 0x100000, CRC(572f45d6) SHA1(a48cb6ab16654d5e07e8833e2848802ddc0e2667) ) + ROM_LOAD16_BYTE( "cf-gr6.bin", 0x400000, 0x100000, CRC(8709a62c) SHA1(3691fb055155ae339c78ec8b7f485aa7d576556b) ) + ROM_LOAD16_BYTE( "cf-gr5.bin", 0x400001, 0x100000, CRC(6de18621) SHA1(9e83f8ed3a2999ee4fdca389c5e792c5b1293717) ) + + ROM_REGION( 0x80000, "oki1", 0 ) // sound data + ROM_LOAD( "cf-s-u20.bin", 0x00000, 0x80000, CRC(715a12dd) SHA1(374185b062853f3e2ea069ea53494cbe3d8dd511) ) + + ROM_REGION( 0x80000, "oki2", 0 ) // sound data + ROM_LOAD( "cf-s-u21.bin", 0x00000, 0x80000, CRC(bc27e3d5) SHA1(a25215b8314fe44974e9efe78cdc10de34f7bfba) ) + + ROM_REGION( 0x80000, "oki3", 0 ) // sound data + ROM_LOAD( "cf-s-u18.bin", 0x00000, 0x80000, CRC(63984658) SHA1(5594965c9304850187859ba730aff26001782f0f) ) + + ROM_REGION( 0x80000, "user2", 0 ) // convert these + ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) + ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) + ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) + /* 25 / 26 are secure? */ +ROM_END + + + +/************************************* + * + * Driver-specific initialization + * + *************************************/ + +void lethalj_state::init_ripribit() +{ + m_maincpu->space(AS_PROGRAM).install_write_handler(0x04100010, 0x0410001f, write16smo_delegate(*this, FUNC(lethalj_state::ripribit_control_w))); +} + + +void lethalj_state::init_cfarm() +{ + m_maincpu->space(AS_PROGRAM).install_write_handler(0x04100010, 0x0410001f, write16smo_delegate(*this, FUNC(lethalj_state::cfarm_control_w))); +} + + +void lethalj_state::init_cclownz() +{ + m_maincpu->space(AS_PROGRAM).install_write_handler(0x04100010, 0x0410001f, write16smo_delegate(*this, FUNC(lethalj_state::cclownz_control_w))); +} + + + +/************************************* + * + * Game drivers + * + *************************************/ + +GAME( 1996, lethalj, 0, lethalj, lethalj, lethalj_state, empty_init, ROT0, "The Game Room", "Lethal Justice (Version 2.3)", 0 ) +GAME( 1998, franticf, 0, gameroom, franticf, lethalj_state, empty_init, ROT0, "ICE", "Frantic Fred (Release 2)", MACHINE_NOT_WORKING ) /* manual states (C) 1998 Innovative Concepts in Entertainment, Inc. */ +GAME( 1996, franticfa, franticf, gameroom, franticfa, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Frantic Fred", MACHINE_NOT_WORKING ) +GAME( 1997, eggventr, 0, gameroom, eggventr, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 10)", 0 ) +GAME( 1997, eggventr8, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 8)", 0 ) +GAME( 1997, eggventr7, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 7)", 0 ) +GAME( 1997, eggventr2, eggventr, gameroom, eggventr2, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 2)", 0 ) +GAME( 1997, eggventr1, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "Kyle Hodgetts / The Game Room", "Egg Venture (Release 1)", 0 ) +GAME( 1997, eggventra, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "The Game Room (A.L. Australia license)", "Egg Venture (A.L. Release)", 0 ) +GAME( 1997, eggventrd, eggventr, gameroom, eggvntdx, lethalj_state, empty_init, ROT0, "The Game Room", "Egg Venture Deluxe", 0 ) +GAME( 1997, ripribit, 0, gameroom, ripribit, lethalj_state, init_ripribit, ROT0, "LAI Games", "Ripper Ribbit (Version 3.5)", 0 ) +GAME( 1997, ripribita, ripribit, gameroom, ripribit, lethalj_state, init_ripribit, ROT0, "LAI Games", "Ripper Ribbit (Version 2.8.4)", 0 ) +GAME( 1999, cfarm, 0, gameroom, cfarm, lethalj_state, init_cfarm, ROT90, "LAI Games", "Chicken Farm (Version 2.0)", 0 ) +GAME( 1999, cclownz, 0, gameroom, cclownz, lethalj_state, init_cclownz, ROT0, "LAI Games", "Crazzy Clownz (Version 1.0)", 0 ) diff --git a/src/mame/ice/lethalj.h b/src/mame/ice/lethalj.h new file mode 100644 index 00000000000..c699c386a63 --- /dev/null +++ b/src/mame/ice/lethalj.h @@ -0,0 +1,84 @@ +// license:BSD-3-Clause +// copyright-holders:Aaron Giles +/************************************************************************* + + The Game Room Lethal Justice hardware + +**************************************************************************/ +#ifndef MAME_INCLUDES_LETHALJ_H +#define MAME_INCLUDES_LETHALJ_H + +#pragma once + +#include "cpu/tms34010/tms34010.h" +#include "machine/ticket.h" +#include "screen.h" + + +class lethalj_state : public driver_device +{ +public: + lethalj_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_screen(*this, "screen"), + m_ticket(*this, "ticket"), + m_blitter_base(*this, "gfx"), + m_paddle(*this, "PADDLE"), + m_light0_x(*this, "LIGHT0_X"), + m_light0_y(*this, "LIGHT0_Y"), + m_light1_x(*this, "LIGHT1_X"), + m_light1_y(*this, "LIGHT1_Y"), + m_lamps(*this, "lamp%u", 0U) + { } + + void lethalj(machine_config &config); + void gameroom(machine_config &config); + + void init_cfarm(); + void init_ripribit(); + void init_cclownz(); + + DECLARE_CUSTOM_INPUT_MEMBER(cclownz_paddle); + +private: + void ripribit_control_w(uint16_t data); + void cfarm_control_w(uint16_t data); + void cclownz_control_w(uint16_t data); + uint16_t lethalj_gun_r(offs_t offset); + void blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void do_blit(); + inline void get_crosshair_xy(int player, int *x, int *y); + TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_update); + + void lethalj_map(address_map &map); + + virtual void machine_start() override { m_lamps.resolve(); } + virtual void video_start() override; + + TIMER_CALLBACK_MEMBER(gen_ext1_int); + + required_device m_maincpu; + required_device m_screen; + required_device m_ticket; + + required_region_ptr m_blitter_base; + + optional_ioport m_paddle; + optional_ioport m_light0_x; + optional_ioport m_light0_y; + optional_ioport m_light1_x; + optional_ioport m_light1_y; + output_finder<3> m_lamps; + + emu_timer *m_gen_ext1_int_timer = nullptr; + uint16_t m_blitter_data[8]{}; + std::unique_ptr m_screenram; + uint8_t m_vispage = 0; + int m_blitter_rows = 0; + uint16_t m_gunx = 0; + uint16_t m_guny = 0; + uint8_t m_blank_palette = 0; +}; + +#endif // MAME_INCLUDES_LETHALJ_H diff --git a/src/mame/ice/lethalj_v.cpp b/src/mame/ice/lethalj_v.cpp new file mode 100644 index 00000000000..d3363b2456c --- /dev/null +++ b/src/mame/ice/lethalj_v.cpp @@ -0,0 +1,203 @@ +// license:BSD-3-Clause +// copyright-holders:Aaron Giles +/*************************************************************************** + + The Game Room Lethal Justice hardware + +***************************************************************************/ + +#include "emu.h" +#include "lethalj.h" + + +#define BLITTER_SOURCE_WIDTH 1024 +#define BLITTER_DEST_WIDTH 512 +#define BLITTER_DEST_HEIGHT 512 + + +/************************************* + * + * Compute X/Y coordinates + * + *************************************/ + +inline void lethalj_state::get_crosshair_xy(int player, int *x, int *y) +{ + const rectangle &visarea = m_screen->visible_area(); + int width = visarea.width(); + int height = visarea.height(); + + if (player) + { + *x = ((m_light1_x.read_safe(0) & 0xff) * width) / 255; + *y = ((m_light1_y.read_safe(0) & 0xff) * height) / 255; + } + else + { + *x = ((m_light0_x.read_safe(0) & 0xff) * width) / 255; + *y = ((m_light0_y.read_safe(0) & 0xff) * height) / 255; + } +} + + + +/************************************* + * + * Gun input handling + * + *************************************/ + +uint16_t lethalj_state::lethalj_gun_r(offs_t offset) +{ + uint16_t result = 0; + int beamx, beamy; + + switch (offset) + { + case 4: + case 5: + /* latch the crosshair position */ + get_crosshair_xy(offset - 4, &beamx, &beamy); + m_gunx = beamx; + m_guny = beamy; + m_blank_palette = 1; + break; + + case 6: + result = m_gunx / 2; + break; + + case 7: + result = m_guny + 4; + break; + } +/* logerror("%s:lethalj_gun_r(%d) = %04X\n", machine().describe_context(), offset, result); */ + return result; +} + + + +/************************************* + * + * video startup + * + *************************************/ + +void lethalj_state::video_start() +{ + /* allocate video RAM for screen */ + m_screenram = std::make_unique(BLITTER_DEST_WIDTH * BLITTER_DEST_HEIGHT); + + /* predetermine blitter info */ + m_blitter_rows = m_blitter_base.length() / BLITTER_SOURCE_WIDTH; + + m_gen_ext1_int_timer = timer_alloc(FUNC(lethalj_state::gen_ext1_int), this); + + m_vispage = 0; +} + + + +/************************************* + * + * Memory maps + * + *************************************/ + +TIMER_CALLBACK_MEMBER(lethalj_state::gen_ext1_int) +{ + m_maincpu->set_input_line(0, ASSERT_LINE); +} + + +void lethalj_state::do_blit() +{ + int dsty = (int16_t)m_blitter_data[1]; + int srcx = (uint16_t)m_blitter_data[2]; + int srcy = (uint16_t)(m_blitter_data[3] + 1); + int width = (uint16_t)m_blitter_data[5]; + int dstx = (int16_t)m_blitter_data[6]; + int height = (uint16_t)m_blitter_data[7]; + int y; +/* + logerror("blitter data = %04X %04X %04X %04X %04X %04X %04X %04X\n", + m_blitter_data[0], m_blitter_data[1], m_blitter_data[2], m_blitter_data[3], + m_blitter_data[4], m_blitter_data[5], m_blitter_data[6], m_blitter_data[7]); +*/ + /* loop over Y coordinates */ + for (y = 0; y <= height; y++, srcy++, dsty++) + { + /* clip in Y */ + if (dsty >= 0 && dsty < BLITTER_DEST_HEIGHT/2) + { + uint16_t *source = m_blitter_base + ((srcy % m_blitter_rows) << 10); + uint16_t *dest = m_screenram.get() + ((dsty + ((m_vispage ^ 1) << 8)) << 9); + int sx = srcx; + int dx = dstx; + int x; + + /* loop over X coordinates */ + for (x = 0; x <= width; x++, sx++, dx++) + { + dx &= 0x1ff; + + int pix = source[sx & 0x3ff]; + if (pix) + dest[dx] = pix; + + } + } + } +} + + +void lethalj_state::blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + /* combine the data */ + COMBINE_DATA(&m_blitter_data[offset]); + + /* blit on a write to offset 7, and signal an IRQ */ + if (offset == 7) + { + if (m_blitter_data[6] == 2 && m_blitter_data[7] == 2) + m_vispage ^= 1; + else + do_blit(); + + m_gen_ext1_int_timer->adjust(attotime::from_hz(XTAL(32'000'000)) * ((m_blitter_data[5] + 1) * (m_blitter_data[7] + 1))); + } + + /* clear the IRQ on offset 0 */ + else if (offset == 0) + m_maincpu->set_input_line(0, CLEAR_LINE); +} + + + +/************************************* + * + * video update + * + *************************************/ + +TMS340X0_SCANLINE_IND16_CB_MEMBER(lethalj_state::scanline_update) +{ + uint16_t const *const src = &m_screenram[(m_vispage << 17) | ((params->rowaddr << 9) & 0x3fe00)]; + uint16_t *const dest = &bitmap.pix(scanline); + int coladdr = params->coladdr << 1; + + /* blank palette: fill with white */ + if (m_blank_palette) + { + for (int x = params->heblnk; x < params->hsblnk; x++) + dest[x] = 0x7fff; + if (scanline == screen.visible_area().max_y) + m_blank_palette = 0; + } + else + { + /* copy the non-blanked portions of this scanline */ + for (int x = params->heblnk; x < params->hsblnk; x++) + dest[x] = src[coladdr++ & 0x1ff] & 0x7fff; + } +} diff --git a/src/mame/ice/schexx4gen.cpp b/src/mame/ice/schexx4gen.cpp new file mode 100644 index 00000000000..2c0f8cdaa1f --- /dev/null +++ b/src/mame/ice/schexx4gen.cpp @@ -0,0 +1,54 @@ +// license:BSD-3-Clause +// copyright-holders: +/**************************************************************************** + + Skeleton driver for 4th Generation "Super Chexx" bubble jockey + electromechanical machines + +****************************************************************************/ + +#include "emu.h" +#include "cpu/mc68hc11/mc68hc11.h" + +namespace { + +class schexx_state : public driver_device +{ + +public: + schexx_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { + } + + void schexx(machine_config &config); + +private: + void mem_map(address_map &map); + + required_device m_maincpu; +}; + +void schexx_state::mem_map(address_map &map) +{ + map(0xe000, 0xffff).rom().region("program", 0x7e000); +} + +INPUT_PORTS_START(schexx) +INPUT_PORTS_END + +void schexx_state::schexx(machine_config &config) +{ + MC68HC11A1(config, m_maincpu, 8_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &schexx_state::mem_map); +} + +ROM_START(schexx) + ROM_REGION(0x80000, "program", 0) + ROM_LOAD("schexx1_2_040.u4", 0x0000, 0x80000, CRC(8cbb7172) SHA1(ba59f7d8dd7e08c837181e18ce15e3c976f8f00b)) +ROM_END + +} // Anonymous namespace + +GAME(1996, schexx, 0, schexx, schexx, schexx_state, empty_init, ROT0, "ICE", "Super Chexx (EM Bubble Hockey)", MACHINE_IS_SKELETON_MECHANICAL) diff --git a/src/mame/ice/vp101.cpp b/src/mame/ice/vp101.cpp new file mode 100644 index 00000000000..8a88b3a9431 --- /dev/null +++ b/src/mame/ice/vp101.cpp @@ -0,0 +1,662 @@ +// license:BSD-3-Clause +// copyright-holders:R. Belmont +/*************************************************************************** + + Play Mechanix / Right Hand Tech "VP50", "VP100" and "VP101" platforms + (PCBs are also marked "Raw Thrills" but all RT games appear to be on PC hardware) + + Boards: + - VP101: Johnny Nero. The original (?) + - VP100: Special Forces Elite Training. A not-quite-complete VP101; missing ATA DMA. + - VP50 : Zoofari. Cost-reduced (?) with TX4925 SoC, much less complex FPGA. + : Rhythm Nation. + + Preliminary driver by R. Belmont + + TODO: + - All games: that formidable sounding 3D accelerator mentioned below. + - All games: the sound system (the POST plays some example sounds) + - Zoofari's framebuffer is 256 color but I don't know where the CLUT comes from. + + To make the games go into a POST test, hold down START 1 while resetting. + + VP101 Features from http://web.archive.org/web/20041016000248/http://www.righthandtech.com/projects.htm + + MIPS VR5500 CPU + The VR5500 operates at either at 300 or 400 MHz with 120MHz external bus + MIPS 64-bit RISC architecture + Two-way super-scalar super pipeline + On-chip floating-point unit (FPU) + High-speed translation look-aside buffer (TLB)(48 double-entries) + On-chip primary cache memory (instruction/data: 32 KB each) + 2-way set associative, Supports line lock feature + Conforms to MIPS I, II, III, and IV instruction sets. Also supports product-sum operation instruction, rotate instruction, register scan instruction + Six execution units (ALU0, ALU1, FPU, FPU/MAC, BRU, and LSU) + Employment of out-of-order execution mechanism + Branch prediction mechanism - Branch history table with 4K entries + Support for CPU emulator connection via JTAG/n-Wire port + + Unified Memory Architecture - DDR SDRAM bank + Arbitrating DDR SDRAM Memory controller + 128Mbyte to 512Mbyte memory capacity + 120/240 MHz @ 64 bits - ~2GBytes/sec bandwidth + + 3D Render Engine + True color and 8-bit palette lookup textures + 8K byte texel cache for accelerated source texel selection. + Perspective corrected rendering + Bi-linear filter for source texel scaling + 256 Color Palette Lookup (888 RGB plus 8 bit Source Palette Alpha) + True Color Source Textures (888 RGB plus 8 bit Alpha) + 24 bit Z-buffer structure in DDR SDRAM buffer + Per-vertex colored lighting + Alpha channel structure in DDR SDRAM buffer + Pixel processing effects (fog, night, etc.) + 888 RGB Video DAC output section. + Bitmap structure in DDR SDRAM with DMA for screen update + Flexible CRT controller with X/Y gun interface counters + + Game I/O + Standard JAMMA I/O interface, including player 3 and 4 connectors + 4 channel general purpose A to D interface (steering wheel and control pedals) + 100baseT Ethernet interface for debugging and/or inter game communications + Forced-feedback “Wheel Driver Interface” for driving games + High-current drivers for lamps or solenoids + Gun interface I/O tightly coupled to the CRT controller + + Sound System + AC97 codec for low cost of implementation and development + TDA7375 40 Watt Integrated Amplifier + Codec fed from the DDR bank via a 16 channel (8 channels of stereo) DMA engine. + + ATA/IDE Disk Drive Interface + Standard ATA/IDE interface + Ultra DMA 33/66/100/133 to the DDR SDRAM memory + + Video DAC + RGB values at 8 bits per color + RGB voltage level adjustable from 0-1.0 Vp-p to 0-4.0 Vp-p + + Flash Memory + Minimum of 1MB of Flash memory – expandable to 4 MB + Updateable Boot ROM + Updateable FPGA configuration + + Battery Backed Up RAM + 32K bytes of non-volatile memory for static game configuration and high score table + Non-volatile Real-Time clock + + Small Footprint + Small outline design for easy kit retrofitting of existing cabinet + 12.2 in x 14.96 in + + Security Interface + Security processor provides for a means to “unlock” the FPGA functions + Enabled for software protection against piracy and unwarranted game updates + +Full populated and tested board is less than $500, including IDE hard disk. +Small outline design for easy kit retrofitting of existing cabinets. + +****************************************************************************/ + +#include "emu.h" +#include "cpu/mips/mips3.h" +#include "bus/ata/ataintf.h" +#include "machine/nvram.h" +#include "imagedev/harddriv.h" +#include "screen.h" + +#define VERBOSE (0) +#include "logmacro.h" + +class vp10x_state : public driver_device +{ +public: + vp10x_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_mainram(*this, "mainram"), + m_ata(*this, "ata") + { } + + void vp50(machine_config &config); + void vp101(machine_config &config); + +private: + virtual void machine_reset() override; + virtual void machine_start() override; + + uint32_t tty_ready_r(); + void tty_w(uint32_t data); + uint32_t test_r(); + uint32_t sound_r(offs_t offset); + void sound_w(offs_t offset, uint32_t data); + void fb_base_w(uint32_t data); + uint32_t video_r(offs_t offset); + void video_w(offs_t offset, uint32_t data); + uint32_t video2_r(offs_t offset); + void video2_w(offs_t offset, uint32_t data); + + uint32_t pic_r(); + void pic_w(uint32_t data); + + void dmaaddr_w(uint32_t data); + + DECLARE_WRITE_LINE_MEMBER(dmarq_w); + + uint32_t tty_4925_rdy_r() { return 0x2; } + + uint32_t spi_status_r() { return 0x8007; } + + uint32_t spi_r(); + void spi_w(uint32_t data); + + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + uint32_t vp50_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + void main_map(address_map &map); + void vp50_map(address_map &map); + + // devices + required_device m_maincpu; + required_shared_ptr m_mainram; + required_device m_ata; + + // driver_device overrides + virtual void video_start() override; + int pic_cmd = 0; + int pic_state = 0; + int m_dmarq_state = 0; + uint32_t m_dma_ptr = 0U; + uint32_t m_spi_select = 0U; + uint32_t m_unk_sound_toggle = 0U; + uint32_t m_sound_cmd = 0U; + uint32_t m_fb_base = 0U; +}; + +void vp10x_state::machine_reset() +{ + m_dmarq_state = 0; + pic_cmd = pic_state = 0; +} + +void vp10x_state::machine_start() +{ + m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS | MIPS3DRC_DISABLE_INTRABLOCK); +// m_maincpu->add_fastram(0x00000000, 0x03ffffff, false, m_mainram); +} + +uint32_t vp10x_state::test_r() +{ + LOG("%s: test_r\n", machine().describe_context()); + return 0xffffffff; +} + +void vp10x_state::dmaaddr_w(uint32_t data) +{ + LOG("%s: dmaaddr_w: %08x\n", machine().describe_context(), data); + m_dma_ptr = (data & 0x07ffffff); +} + +WRITE_LINE_MEMBER(vp10x_state::dmarq_w) +{ + if (state != m_dmarq_state) + { + m_dmarq_state = state; + + if (state) + { + uint16_t *RAMbase = (uint16_t *)&m_mainram[0]; + uint16_t *RAM = &RAMbase[m_dma_ptr>>1]; + + m_ata->write_dmack(ASSERT_LINE); + + while (m_dmarq_state) + { + *RAM++ = m_ata->read_dma(); + m_dma_ptr += 2; // pointer must advance + } + + m_ata->write_dmack(CLEAR_LINE); + } + } +} + +uint32_t vp10x_state::pic_r() +{ + static const uint8_t vers[5] = { 0x00, 0x01, 0x00, 0x00, 0x00 }; + static const uint8_t serial[10] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a }; + static const uint8_t magic[10] = { 0xaa, 0x55, 0x18, 0x18, 0xc0, 0x03, 0xf0, 0x0f, 0x09, 0x0a }; + + switch (pic_cmd) + { + case 0x20: + return vers[pic_state++]; + + case 0x21: + case 0x22: + return serial[pic_state++]; + + case 0x23: // this is the same for jnero and specfrce. great security! + return magic[pic_state++]; + } + + return 0; +} + +void vp10x_state::pic_w(uint32_t data) +{ + LOG("%s: pic_w: %08x\n", machine().describe_context(), data); + if ((data & 0xff) == 0) + { + return; + } + pic_cmd = data & 0xff; + pic_state = 0; +} + +uint32_t vp10x_state::spi_r() +{ + LOG("%s: spi_r\n", machine().describe_context()); + return 0xffffffff; +} + +void vp10x_state::spi_w(uint32_t data) +{ + LOG("%s: spi_w: %08x\n", machine().describe_context(), data); + m_spi_select = data; +} + +void vp10x_state::video_start() +{ +} + +uint32_t vp10x_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + for (int y = 0; y < 240; y++) + { + uint32_t *line = &bitmap.pix(y); + const uint32_t *video_ram = (const uint32_t *) &m_mainram[(m_fb_base/4) + (y * (0x1000/4)) + 4]; + + for (int x = 0; x < 320; x++) + { + uint32_t word = *(video_ram++); + video_ram++; + *line++ = word; + } + } + + if (machine().input().code_pressed_once(KEYCODE_R)) + m_maincpu->set_input_line(MIPS3_IRQ0, ASSERT_LINE); + if (machine().input().code_pressed_once(KEYCODE_T)) + m_maincpu->set_input_line(MIPS3_IRQ1, ASSERT_LINE); + if (machine().input().code_pressed_once(KEYCODE_Y)) + m_maincpu->set_input_line(MIPS3_IRQ2, ASSERT_LINE); + if (machine().input().code_pressed_once(KEYCODE_U)) + m_maincpu->set_input_line(MIPS3_IRQ3, ASSERT_LINE); + if (machine().input().code_pressed_once(KEYCODE_I)) + m_maincpu->set_input_line(MIPS3_IRQ4, ASSERT_LINE); + return 0; +} + +// TODO: Palette is not at 0, where is it? +uint32_t vp10x_state::vp50_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + const uint16_t *pal_ram = (const uint16_t *) &m_mainram[0]; + + for (int y = 0; y < 240; y++) + { + uint32_t *line = &bitmap.pix(y); + const uint8_t *video_ram = (const uint8_t *) &m_mainram[(0x10000/4)+(y * 100)]; + + for (int x = 0; x < 400; x++) + { + // assume 565 + int r = pal_ram[video_ram[x]] >> 11; + int g = (pal_ram[video_ram[x]] >> 5) & 0x3f; + int b = pal_ram[video_ram[x]] & 0x1f; + + *line++ = (r << 19) | (g << 10) | (b << 3); + } + } + return 0; +} + +uint32_t vp10x_state::tty_ready_r() +{ + LOG("%s: tty_ready_r\n", machine().describe_context()); + return 0x60; // must return &0x20 for output at tty_w to continue +} + +void vp10x_state::tty_w(uint32_t data) // set breakpoint at bfc01430 to catch when it's printing things +{ +// uncomment to see startup messages - it says "RAM OK" and "EPI RSS Ver 4.5.1" followed by "" and then lots of dots +// Special Forces also says " = 00000032" + if (data >= 0x20 || data == 0x09) + printf("%c", data); + else if (data == 0x0d) + printf("\n"); +} + +uint32_t vp10x_state::video_r(offs_t offset) +{ + uint32_t data = 0; + if (offset == (0x10 >> 2)) + { + data = 0xffffffff; + } + LOG("%s: video_r %08x: %08x\n", machine().describe_context(), 0x1a000000 + (offset << 2), data); + return data; +} + +void vp10x_state::video_w(offs_t offset, uint32_t data) +{ + LOG("%s: video_w %08x = %08x\n", machine().describe_context(), 0x1a000000 + (offset << 2), data); +} + +uint32_t vp10x_state::video2_r(offs_t offset) +{ + uint32_t data = machine().rand(); + //LOG("%s: video2_r %08x: %08x\n", machine().describe_context(), 0x1a800000 + (offset << 2), data); + return data; +} + +void vp10x_state::video2_w(offs_t offset, uint32_t data) +{ + //LOG("%s: video2_w %08x = %08x\n", machine().describe_context(), 0x1a800000 + (offset << 2), data); +} + +void vp10x_state::fb_base_w(uint32_t data) +{ + m_fb_base = data & 0x07ffffff; +} + +uint32_t vp10x_state::sound_r(offs_t offset) +{ + switch (offset) + { + case 0: + LOG("%s: sound_r: hardware flags(?): 11000000 = %08x\n", machine().describe_context(), 1 << 4); + return (1 << 4); // Flag that sound hardware is initialized + case 3: + { + uint32_t cmd_return = 0; + bool known = true; + switch (m_sound_cmd) + { + case 0xa6: + cmd_return = 0x0000000e; + break; + case 0xfc: + cmd_return = 0x00004352; // Some sort of info request? Looks like ASCII, 'CR' - codec is from Crystal Semi? + break; + default: + known = false; + break; + } + if (known) + { + LOG("%s: sound_r: sound command return value(?): 11000004 = %08x for cmd %02x\n", machine().describe_context(), cmd_return, m_sound_cmd); + } + else + { + LOG("%s: sound_r: sound command return value(?): 11000004 = %08x for unknown cmd %02x\n", machine().describe_context(), cmd_return, m_sound_cmd); + } + return cmd_return; + } + case 4: + m_unk_sound_toggle ^= 1; + LOG("%s: sound_r: unknown: 11000010 = %08x\n", machine().describe_context(), m_unk_sound_toggle); + return m_unk_sound_toggle; // Unknown + default: + LOG("%s: sound_r: %08x\n", machine().describe_context(), 0x11000000 | (offset << 2)); + return 0; + } +} + +void vp10x_state::sound_w(offs_t offset, uint32_t data) +{ + switch (offset) + { + case 1: + LOG("%s: sound_w: command(?): 11000004 = %08x\n", machine().describe_context(), data); + m_sound_cmd = data; + return; + default: + LOG("%s: sound_w: %08x = %08x\n", machine().describe_context(), 0x11000000 | (offset << 2), data); + return; + } +} + +void vp10x_state::main_map(address_map &map) +{ + map(0x00000000, 0x07ffffff).ram().share("mainram"); + map(0x11000000, 0x11000013).rw(FUNC(vp10x_state::sound_r), FUNC(vp10x_state::sound_w)); + map(0x14000000, 0x14000003).r(FUNC(vp10x_state::test_r)); + map(0x18000010, 0x18000013).w(FUNC(vp10x_state::fb_base_w)); + map(0x1a000000, 0x1a000013).rw(FUNC(vp10x_state::video_r), FUNC(vp10x_state::video_w)); + map(0x1a800000, 0x1a800003).rw(FUNC(vp10x_state::video2_r), FUNC(vp10x_state::video2_w)); + map(0x1c000000, 0x1c000003).w(FUNC(vp10x_state::tty_w)); // RSS OS code uses this one + map(0x1c000014, 0x1c000017).r(FUNC(vp10x_state::tty_ready_r)); + map(0x1c400000, 0x1c400003).w(FUNC(vp10x_state::tty_w)); // boot ROM code uses this one + map(0x1c400014, 0x1c400017).r(FUNC(vp10x_state::tty_ready_r)); + map(0x1ca00000, 0x1ca00003).portr("GUNX"); + map(0x1ca00004, 0x1ca00007).portr("GUNY"); + map(0x1ca00008, 0x1ca0000b).portr("GUNBUTTONS"); + map(0x1ca0000c, 0x1ca0000f).portr("BUTTONS"); + map(0x1ca00010, 0x1ca00013).portr("DIPS"); + map(0x1cf00000, 0x1cf00003).noprw().nopr(); + map(0x1d000030, 0x1d000033).w(FUNC(vp10x_state::dmaaddr_w)); // ATA DMA destination address + map(0x1d000040, 0x1d00005f).rw(m_ata, FUNC(ata_interface_device::cs0_r), FUNC(ata_interface_device::cs0_w)).umask32(0x0000ffff); + map(0x1d000060, 0x1d00007f).rw(m_ata, FUNC(ata_interface_device::cs1_r), FUNC(ata_interface_device::cs1_w)).umask32(0x0000ffff); + + map(0x1f200000, 0x1f200003).rw(FUNC(vp10x_state::pic_r), FUNC(vp10x_state::pic_w)); + map(0x1f807000, 0x1f807fff).ram().share("nvram"); + map(0x1fc00000, 0x1fffffff).rom().region("maincpu", 0); +} + +void vp10x_state::vp50_map(address_map &map) +{ + map(0x00000000, 0x03ffffff).ram().share("mainram"); + map(0x1f000010, 0x1f00001f).rw(m_ata, FUNC(ata_interface_device::cs1_r), FUNC(ata_interface_device::cs1_w)); + map(0x1f000020, 0x1f00002f).rw(m_ata, FUNC(ata_interface_device::cs0_r), FUNC(ata_interface_device::cs0_w)); + map(0x1f400000, 0x1f400003).noprw(); // FPGA bitstream download? + map(0x1f400800, 0x1f400bff).ram().share("nvram"); + map(0x1fc00000, 0x1fffffff).rom().region("maincpu", 0); + + // TX4925 peripherals + map(0xff1ff40c, 0xff1ff40f).r(FUNC(vp10x_state::tty_4925_rdy_r)); + map(0xff1ff41c, 0xff1ff41f).w(FUNC(vp10x_state::tty_w)); + map(0xff1ff500, 0xff1ff503).noprw(); + map(0xff1ff814, 0xff1ff817).r(FUNC(vp10x_state::spi_status_r)); + map(0xff1ff818, 0xff1ff81b).rw(FUNC(vp10x_state::spi_r), FUNC(vp10x_state::spi_w)); +} + +static INPUT_PORTS_START( jnero ) + PORT_START("GUNX") + PORT_BIT( 0x1ff, 0x000, IPT_LIGHTGUN_X ) PORT_MINMAX(0x000, 0x1ff) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) + + PORT_START("GUNY") + PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_Y ) PORT_MINMAX(0x00, 0xff) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) + + PORT_START("GUNBUTTONS") + PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("Trigger") + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("Sense") + PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("Pump") + PORT_BIT( 0x00000010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("Trigger") + PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("Sense") + PORT_BIT( 0x00000040, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_NAME("Pump") + PORT_BIT( 0xffffff88, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("BUTTONS") + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT (0x00000040, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT (0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 ) + PORT_BIT (0x00001000, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) + PORT_BIT (0x00002000, IP_ACTIVE_LOW, IPT_VOLUME_UP ) + PORT_BIT( 0xffffcf30, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("DIPS") + PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Test ) ) + PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_BIT( 0xffffefaf, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x00001040, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + +static INPUT_PORTS_START( specfrce ) + PORT_START("GUNX") + PORT_BIT( 0x1ff, 0x000, IPT_LIGHTGUN_X ) PORT_MINMAX(0x000, 0x1ff) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) + + PORT_START("GUNY") + PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_Y ) PORT_MINMAX(0x00, 0xff) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) + + PORT_START("GUNBUTTONS") + PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Trigger") + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Sense") + PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Pump") + PORT_BIT( 0xfffffff8, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("BUTTONS") + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT (0x00000040, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT (0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 ) + PORT_BIT (0x00001000, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) + PORT_BIT (0x00002000, IP_ACTIVE_LOW, IPT_VOLUME_UP ) + PORT_BIT( 0xffffcf38, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("DIPS") + PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Test ) ) + PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_BIT( 0xffffefaf, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x00001040, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + +static INPUT_PORTS_START( vp50 ) + PORT_START("IN0") + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0xfffffff0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + + PORT_START("IN1") + PORT_BIT( 0xffffffff, IP_ACTIVE_HIGH, IPT_UNKNOWN ) +INPUT_PORTS_END + +void vp10x_state::vp101(machine_config &config) +{ + VR5500LE(config, m_maincpu, 400000000); + m_maincpu->set_dcache_size(32768); + m_maincpu->set_system_clock(100000000); + m_maincpu->set_addrmap(AS_PROGRAM, &vp10x_state::main_map); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_refresh_hz(60); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ + screen.set_screen_update(FUNC(vp10x_state::screen_update)); + screen.set_size(320, 240); + screen.set_visarea(0, 319, 0, 239); + + ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, false); + m_ata->dmarq_handler().set(FUNC(vp10x_state::dmarq_w)); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); +} + +void vp10x_state::vp50(machine_config &config) +{ + TX4925LE(config, m_maincpu, 200000000); + m_maincpu->set_dcache_size(32768); + m_maincpu->set_system_clock(100000000); + m_maincpu->set_addrmap(AS_PROGRAM, &vp10x_state::vp50_map); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_refresh_hz(60); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ + screen.set_screen_update(FUNC(vp10x_state::vp50_screen_update)); + screen.set_size(400, 240); + screen.set_visarea(0, 399, 0, 239); + + ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, false); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); +} + +ROM_START(jnero) + ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ + ROM_LOAD( "d710.05523.bin", 0x000000, 0x100000, CRC(6054a066) SHA1(58e68b7d86e6f24c79b99c8406e86e3c14387726) ) + + ROM_REGION(0x80000, "pic", 0) /* PIC18c422 program - read-protected, need dumped */ + ROM_LOAD( "8722a-1206.bin", 0x000000, 0x80000, NO_DUMP ) + + DISK_REGION( "ata:0:hdd:image" ) /* ideally an IDENTIFY page from a real drive should be the IDTN metadata, + but even factory-new boardsets came with a variety of HDD makes and models */ + DISK_IMAGE_READONLY("jn010108", 0, SHA1(5a27990478b65fca801c3a6518c519c5b4ca934d) ) +ROM_END + +ROM_START(specfrce) + ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ + ROM_SYSTEM_BIOS(0, "default", "rev. 3.6") + ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS(1, "r35", "rev. 3.5") + ROMX_LOAD( "special_forces_boot_v3.5.u4", 0x000000, 0x100000, CRC(ae8dfdf0) SHA1(d64130e710d0c70095ad8ebd4e2194b8c461be4a), ROM_BIOS(1) ) /* Newer, but keep both in driver */ + ROM_SYSTEM_BIOS(2, "r34", "rev. 3.4") + ROMX_LOAD( "special_forces_boot_v3.4.u4", 0x000000, 0x100000, CRC(db4862ac) SHA1(a1e886d424cf7d26605e29d972d48e8d44ae2d58), ROM_BIOS(2) ) + + ROM_REGION(0x80000, "pic", 0) /* PIC18c422 I/P program - read-protected, need dumped */ + ROM_LOAD( "special_forces_et_u7_rev1.2.u7", 0x000000, 0x80000, NO_DUMP ) + + DISK_REGION( "ata:0:hdd:image" ) + DISK_IMAGE_READONLY("sf010200", 0, SHA1(33c35fd5e110ff06330e0f0313fcd75d5c64a090) ) +ROM_END + +ROM_START(specfrceo) + ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ + ROM_SYSTEM_BIOS(0, "default", "rev. 3.6") + ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS(1, "r35", "rev. 3.5") + ROMX_LOAD( "special_forces_boot_v3.5.u4", 0x000000, 0x100000, CRC(ae8dfdf0) SHA1(d64130e710d0c70095ad8ebd4e2194b8c461be4a), ROM_BIOS(1) ) /* Newer, but keep both in driver */ + ROM_SYSTEM_BIOS(2, "r34", "rev. 3.4") + ROMX_LOAD( "special_forces_boot_v3.4.u4", 0x000000, 0x100000, CRC(db4862ac) SHA1(a1e886d424cf7d26605e29d972d48e8d44ae2d58), ROM_BIOS(2) ) + + ROM_REGION(0x80000, "pic", 0) /* PIC18c422 I/P program - read-protected, need dumped */ + ROM_LOAD( "special_forces_et_u7_rev1.2.u7", 0x000000, 0x80000, NO_DUMP ) + + DISK_REGION( "ata:0:hdd:image" ) + DISK_IMAGE_READONLY("sf010101", 0, SHA1(59b5e3d8e1d5537204233598830be2066aad0556) ) +ROM_END + +ROM_START(zoofari) + ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ + ROM_LOAD( "zf_boot_rel.u13", 0x000000, 0x400000, CRC(e629689a) SHA1(7352d033c638040c3e51a453e2440a7f38a1b406) ) + + ROM_REGION(0x80000, "pic", 0) /* PIC18c422 program - read-protected, need dumped */ + ROM_LOAD( "8777z-568.bin", 0x000000, 0x80000, NO_DUMP ) + + DISK_REGION( "ata:0:hdd:image" ) + DISK_IMAGE_READONLY("zoofari", 0, SHA1(8fb9cfb1ab2660f40b643fcd772243903bd69a6c) ) +ROM_END + +ROM_START(rhnation) + ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ + ROM_LOAD( "rhythm_nation_rev_3.1.5_m27v322.u13", 0x000000, 0x400000, CRC(456f043d) SHA1(cc166897fdbdaa3583e44816da9dfbbf303f5c61) ) + + ROM_REGION(0x80000, "pic", 0) /* PIC18c242 program - read-protected, need dumped */ + ROM_LOAD( "pic18c242-i-sp.u22", 0x000000, 0x80000, NO_DUMP ) + + DISK_REGION( "ata:0:hdd:image" ) + DISK_IMAGE_READONLY("rhn010104", 0, SHA1(5bc2e5817b29bf42ec483414242795fd76d749d9) ) +ROM_END + +GAME( 2002, specfrce, 0, vp101, specfrce, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Special Forces Elite Training (v01.02.00)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2002, specfrceo, specfrce, vp101, specfrce, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Special Forces Elite Training (v01.01.01)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2003, rhnation, 0, vp50, vp50, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Rhythm Nation (v01.00.04, boot v3.1.5)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) +GAME( 2004, jnero, 0, vp101, jnero, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Johnny Nero Action Hero (v01.01.08)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2006, zoofari, 0, vp50, vp50, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Zoofari", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 7cd459cda67..e6f4bd89e5c 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1371,7 +1371,7 @@ ampex230p // @source:ampro/ampro.cpp ampro // -@source:skeleton/ampscarp.cpp +@source:motorola/ampscarp.cpp ampscarp // Motorola Amps Car Phone @source:misc/amspdwy.cpp @@ -10438,7 +10438,7 @@ chessmsta @source:ddr/chessmstdm.cpp chessmstdm -@source:misc/chexx.cpp +@source:ice/chexx.cpp chexx83 // 1983 ICE faceoffh // 1983 SoftLogic / Entertainment Enterprises olihockey // 1985 Inor @@ -14292,7 +14292,7 @@ pbillrdsa // (c) 1987 Nihon System (Sega license?) freeway freewaya -@source:misc/frenzyxprss.cpp +@source:ice/frenzyxprss.cpp frenzyxprss // (c) 2001 ICE / Uniana @source:misc/fresh.cpp @@ -17105,7 +17105,7 @@ hp2622a // hp2641 // hp2645 // -@source:skeleton/hp3478a.cpp +@source:hp/hp3478a.cpp hp3478a // @source:hp/hp48.cpp @@ -17166,7 +17166,7 @@ hprot1 // hprot2r6 // hprotr8a // -@source:skeleton/hpz80unk.cpp +@source:hp/hpz80unk.cpp hpz80unk // @source:hp/hp80.cpp @@ -17233,7 +17233,7 @@ magerror // (c) 1994 Technosoft (Japan) (Arcade TV Game L @source:skeleton/i7000.cpp i7000 // -@source:skeleton/ibm3153.cpp +@source:ibm/ibm3153.cpp ibm3153 // @source:ibm/ibm6580.cpp @@ -17255,13 +17255,13 @@ icebox // Nutting Icebox @source:skeleton/icatel.cpp icatel // -@source:misc/ice_bozopail.cpp +@source:ice/ice_bozopail.cpp ice_bozo // ICE - Bozo Pail Toss -@source:misc/ice_hhhippos.cpp +@source:ice/ice_hhhippos.cpp hhhippos // -@source:misc/ice_tbd.cpp +@source:ice/ice_tbd.cpp ice_tbd // ICE - Turbo Drive @source:pinball/icecold.cpp @@ -20299,7 +20299,7 @@ lethalenua // GX191 (c) 1992 lethalenub // GX191 (c) 1992 lethalenux // GX191 (c) 1992 -@source:misc/lethalj.cpp +@source:ice/lethalj.cpp cclownz // (c) 1999 LAI Games cfarm // (c) 1999 LAI Games eggventr // (c) 1997 The Game Room @@ -31984,7 +31984,7 @@ viostormj // GX168 (c) 1993 (Japan) viostormu // GX168 (c) 1993 (US) viostormub // GX168 (c) 1993 (US) -@source:skeleton/myvision.cpp +@source:nichibutsu/myvision.cpp myvision // @source:sharp/mz2000.cpp @@ -33546,7 +33546,7 @@ nws3260 // Sony NEWS NWS-3260 @source:sony/news_r4k.cpp nws5000x // Sony NEWS NWS-5000X -@source:skeleton/newton.cpp +@source:apple/newton.cpp newtnotp newtonmp spi7000 @@ -33811,7 +33811,7 @@ tpoker2 // (c) 1993 Micro Manufacturing, Inc. @source:misc/notechan.cpp notechan // (c) 1995 Banpresto -@source:skeleton/notetaker.cpp +@source:xerox/notetaker.cpp notetakr // @source:upl/nova2001.cpp @@ -36061,7 +36061,7 @@ powerinsj // (c) 1993 Atlus (Japan) powerinspj // prototype (Japan) powerinspu // prototype (USA) -@source:skeleton/powerstack.cpp +@source:motorola/powerstack.cpp powerstk // Motorola Powerstack II @source:stm/pp.cpp @@ -37699,7 +37699,7 @@ sc2a // @source:pacman/schick.cpp schick // Microhard -@source:misc/schexx4gen.cpp +@source:ice/schexx4gen.cpp schexx // (c) 1996 ICE @source:misc/scm_500.cpp @@ -43021,7 +43021,7 @@ voyager // (c) 2002 Team Play, Inc. voyagers // (c) 2002 Team Play, Inc. policet2 // (c) 2003 Team Play, Inc. -@source:misc/vp101.cpp +@source:ice/vp101.cpp jnero // (c) 2004 ICE/Play Mechanix specfrce // (c) 2002 ICE/Play Mechanix specfrceo // (c) 2002 ICE/Play Mechanix diff --git a/src/mame/mess.flt b/src/mame/mess.flt index 70a23036483..1ef7603e37e 100644 --- a/src/mame/mess.flt +++ b/src/mame/mess.flt @@ -58,6 +58,7 @@ apple/macpdm.cpp apple/macprtb.cpp apple/macpwrbk030.cpp apple/macquadra700.cpp +apple/newton.cpp apple/tk2000.cpp appliedconcepts/boris.cpp appliedconcepts/borisdpl.cpp @@ -369,6 +370,7 @@ hp/hp16500.cpp hp/hp2100.cpp hp/hp2620.cpp hp/hp2640.cpp +hp/hp3478a.cpp hp/hp48.cpp hp/hp49gp.cpp hp/hp64k.cpp @@ -379,11 +381,13 @@ hp/hp9825.cpp hp/hp9845.cpp hp/hp9k.cpp hp/hp9k_3xx.cpp +hp/hpz80unk.cpp hp/jornada.cpp husky/hawk.cpp husky/hunter16.cpp husky/hunter2.cpp husky/husky.cpp +ibm/ibm3153.cpp ibm/ibm6580.cpp ibm/rtpc.cpp informer/informer_207_100.cpp @@ -485,6 +489,7 @@ morrow/microdec.cpp morrow/mpz80.cpp morrow/tricep.cpp mos/kim1.cpp +motorola/ampscarp.cpp motorola/exorciser.cpp motorola/exorterm.cpp motorola/m6805evs.cpp @@ -496,6 +501,7 @@ motorola/mekd4.cpp motorola/mekd5.cpp motorola/mvme147.cpp motorola/mvme162.cpp +motorola/powerstack.cpp motorola/sys1121.cpp motorola/uchroma68.cpp msx/msx.cpp @@ -531,6 +537,7 @@ neogeo/neogeocd.cpp netronics/elf.cpp netronics/exp85.cpp next/next.cpp +nichibutsu/myvision.cpp nintendo/compmahj.cpp nintendo/gamecube.cpp nintendo/gb.cpp @@ -765,7 +772,6 @@ skeleton/alphasma3k.cpp skeleton/am1000.cpp skeleton/ampex.cpp skeleton/ampex210.cpp -skeleton/ampscarp.cpp skeleton/anzterm.cpp skeleton/argox.cpp skeleton/attache.cpp @@ -838,12 +844,9 @@ skeleton/grfd2301.cpp skeleton/hazeltin.cpp skeleton/hazl1420.cpp skeleton/hohnadam.cpp -skeleton/hp3478a.cpp skeleton/hprot1.cpp -skeleton/hpz80unk.cpp skeleton/ht68k.cpp skeleton/i7000.cpp -skeleton/ibm3153.cpp skeleton/icatel.cpp skeleton/icebox.cpp skeleton/iez80.cpp @@ -895,10 +898,7 @@ skeleton/mtd1256.cpp skeleton/mw4pole.cpp skeleton/mx2178.cpp skeleton/mycom.cpp -skeleton/myvision.cpp -skeleton/newton.cpp skeleton/ngen.cpp -skeleton/notetaker.cpp skeleton/onyx.cpp skeleton/p8k.cpp skeleton/palestra.cpp @@ -911,7 +911,6 @@ skeleton/picno.cpp skeleton/plan80.cpp skeleton/pm68k.cpp skeleton/pockchal.cpp -skeleton/powerstack.cpp skeleton/proteus3.cpp skeleton/pt68k4.cpp skeleton/ptcsol.cpp @@ -1241,6 +1240,7 @@ wyse/wy85.cpp xerox/alto1.cpp xerox/alto2.cpp xerox/bigbord2.cpp +xerox/notetaker.cpp xerox/xerox820.cpp yamaha/fb01.cpp yamaha/tg100.cpp diff --git a/src/mame/misc/chexx.cpp b/src/mame/misc/chexx.cpp deleted file mode 100644 index 1253d835c9f..00000000000 --- a/src/mame/misc/chexx.cpp +++ /dev/null @@ -1,575 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Luca Elia -/*************************************************************************** - -Electro-mechanical bubble hockey games: - -- Chexx (1983 version) by ICE - http://www.pinrepair.com/arcade/chexx.htm - -- Face-Off, an illegal? copy of Chexx - http://valker.us/gameroom/SegaFaceOff.htm - https://casetext.com/case/innovative-concepts-in-ent-v-entertainment-enter - -(Some sources indicate these may have been copied from a earlier Sega game called Face-Off) - -Olimpic Hockey, Spanish clone from Inor (probably unlicensed), runs on an almost -exact clone of the 1st generation ICE Chexx hardware (https://www.recreativas.org/olimpic-hockey-1110-inor): - - Inor Olympic Hockey PCB - ________________________________________ - | | - | : <- Conn P4 ____________ | - | |/B8342 SJLB| | - | |___________| | - | ____________ | - | |/B8342 SJLC| | - | |___________| | - | ____________ | - | |/B8342 SJLD| | - | |___________| | - | ____________ | - |/o\ <- Conn p5 |/B8342 SJLF| | - ||o| |___________| | - ||o| ____________ | - | |/B8342 SJLG| | - | |___________| | - | : <- Conn P7 ____________ | - | : |/B8342 SJLH| | - | |___________| | - | ____ ____________ | - | LM358N |EMPTY | | - | |___________| | - | ____________ | - | _________ |EMPTY | | - | 74LS138B1 |___________| | - | ______________________ | - | | 54104 DIGITALKER | | - | |_____________________| | - | _________ : | - | _________ |________| : | - | |74LS74B1| Conn P2 -> : | - | ______________________ | - | | UM6522A | | - | _________ |_____________________| | - | |________| | - | ____________ | - | : | EF68B10P | | - | : <- Conn P1 |___________| | - | : o <- Conn P8 | - | o : <- Conn P6 | - | 0 : | - | : ______________________ | - | : <- Conn P3 | UM6502A | | - | |_____________________| | - | _________ | - | _________ ____________ PC74HCT74P | - | |74LS04_| | EPROM | | - | |___________| | - | Xtal | - | 4.000 MHz DSW _________ DSW | - | x2 T74LS365B1 x2 | - |___________ COST _____________ TIME ___| - -The electromechanical game Fire Escape (1984, Mech-Tronic Games, Inc.) -appears to run on very similar hardware, with a AY8912 but no Digitalker. - -***************************************************************************/ - -#include "emu.h" -#include "cpu/m6502/m6502.h" -#include "machine/6522via.h" -#include "machine/timer.h" -#include "sound/ay8910.h" -#include "sound/digitalk.h" -#include "speaker.h" - -#include "chexx.lh" - - -namespace { - -class chexx_state : public driver_device -{ -public: - chexx_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - , m_via(*this, "via6522") - , m_digitalker(*this, "digitalker") - , m_digits(*this, "digit%u", 0U) - , m_leds(*this, "led%u", 0U) - , m_lamps(*this, "lamp%u", 0U) - , m_dsw(*this, "DSW") - , m_input(*this, "INPUT") - , m_coin(*this, "COIN") - { - } - - // handlers - uint8_t via_a_in(); - uint8_t via_b_in(); - - void via_a_out(uint8_t data); - void via_b_out(uint8_t data); - - DECLARE_WRITE_LINE_MEMBER(via_ca2_out); - DECLARE_WRITE_LINE_MEMBER(via_cb1_out); - DECLARE_WRITE_LINE_MEMBER(via_cb2_out); - DECLARE_WRITE_LINE_MEMBER(via_irq_out); - - uint8_t input_r(); - - void lamp_w(uint8_t data); - - void chexx(machine_config &config); - void mem(address_map &map); - -protected: - TIMER_CALLBACK_MEMBER(update); - - // digitalker - void digitalker_set_bank(uint8_t bank); - - // driver_device overrides - virtual void machine_start() override; - virtual void machine_reset() override; - - // devices - required_device m_maincpu; - required_device m_via; - required_device m_digitalker; - output_finder<4> m_digits; - output_finder<3> m_leds; - output_finder<2> m_lamps; - - required_ioport m_dsw; - required_ioport m_input; - required_ioport m_coin; - - // vars - emu_timer *m_update_timer; - uint8_t m_port_a; - uint8_t m_port_b; - uint8_t m_bank; - uint32_t m_shift; - uint8_t m_lamp; -}; - -class faceoffh_state : public chexx_state -{ -public: - faceoffh_state(const machine_config &mconfig, device_type type, const char *tag) - : chexx_state(mconfig, type, tag) - , m_aysnd(*this, "aysnd") - { - } - - void faceoffh(machine_config &config); - -protected: - void ay_w(offs_t offset, uint8_t data); - - void mem(address_map &map); - - required_device m_aysnd; // only faceoffh - uint8_t m_ay_cmd = 0; - uint8_t m_ay_data = 0; -}; - - -// VIA - -uint8_t chexx_state::via_a_in() -{ - uint8_t ret = 0; - logerror("%s: VIA read A: %02X\n", machine().describe_context(), ret); - return ret; -} - -uint8_t chexx_state::via_b_in() -{ - uint8_t ret = 0; - logerror("%s: VIA read B: %02X\n", machine().describe_context(), ret); - return ret; -} - -void chexx_state::via_a_out(uint8_t data) -{ - m_port_a = data; // multiplexer - m_digitalker->digitalker_data_w(data); -// logerror("%s: VIA write A = %02X\n", machine().describe_context(), data); -} - -void chexx_state::via_b_out(uint8_t data) -{ - m_port_b = data; - - digitalker_set_bank(data & 3); - m_digitalker->set_output_gain(0, BIT(data,2) ? 1.0f : 0.0f); // bit 2 controls the Digitalker output - machine().bookkeeping().coin_counter_w(0, BIT(~data,3)); - // bit 4 is EJECT - // bit 7 is related to speaker out - -// logerror("%s: VIA write B = %02X\n", machine().describe_context(), data); -} - -WRITE_LINE_MEMBER(chexx_state::via_ca2_out) -{ - m_digitalker->digitalker_0_cms_w(CLEAR_LINE); - m_digitalker->digitalker_0_cs_w(CLEAR_LINE); - m_digitalker->digitalker_0_wr_w(state ? ASSERT_LINE : CLEAR_LINE); - -// logerror("%s: VIA write CA2 = %02X\n", machine().describe_context(), state); -} - -WRITE_LINE_MEMBER(chexx_state::via_cb1_out) -{ -// logerror("%s: VIA write CB1 = %02X\n", machine().describe_context(), state); -} - -WRITE_LINE_MEMBER(chexx_state::via_cb2_out) -{ - m_shift = ((m_shift << 1) & 0xffffff) | state; - - // 7segs (score) - constexpr uint8_t patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0, 0, 0, 0, 0, 0 }; // 4511 - - m_digits[0] = patterns[(m_shift >> (16+4)) & 0xf]; - m_digits[1] = patterns[(m_shift >> (16+0)) & 0xf]; - m_digits[2] = patterns[(m_shift >> (8+4)) & 0xf]; - m_digits[3] = patterns[(m_shift >> (8+0)) & 0xf]; - - // Leds (period being played) - m_leds[0] = BIT(m_shift,2); - m_leds[1] = BIT(m_shift,1); - m_leds[2] = BIT(m_shift,0); - -// logerror("%s: VIA write CB2 = %02X\n", machine().describe_context(), state); -} - -WRITE_LINE_MEMBER(chexx_state::via_irq_out) -{ - m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE); -// logerror("%s: VIA write IRQ = %02X\n", machine().describe_context(), state); -} - -uint8_t chexx_state::input_r() -{ - uint8_t ret = m_dsw->read(); // bits 0-3 - uint8_t inp = m_input->read(); // bit 7 (multiplexed) - - for (int i = 0; i < 8; ++i) - if (BIT(~m_port_a, i) && BIT(~inp, i)) - ret &= 0x7f; - - return ret; -} - -// Chexx Memory Map - -void chexx_state::mem(address_map &map) -{ - map(0x0000, 0x007f).ram().mirror(0x100); // 6810 - 128 x 8 static RAM - map(0x4000, 0x400f).m(m_via, FUNC(via6522_device::map)); - map(0x8000, 0x8000).r(FUNC(chexx_state::input_r)); - map(0xf800, 0xffff).rom().region("maincpu", 0); -} - -void chexx_state::lamp_w(uint8_t data) -{ - m_lamp = data; - m_lamps[0] = BIT(m_lamp,0); - m_lamps[1] = BIT(m_lamp,1); -} - -// Face-Off Memory Map - -void faceoffh_state::mem(address_map &map) -{ - map(0x0000, 0x007f).ram().mirror(0x100); // M58725P - 2KB - map(0x4000, 0x400f).m(m_via, FUNC(via6522_device::map)); - map(0x8000, 0x8000).r(FUNC(faceoffh_state::input_r)); - map(0xa000, 0xa001).w(FUNC(faceoffh_state::ay_w)); - map(0xc000, 0xc000).w(FUNC(faceoffh_state::lamp_w)); - map(0xf000, 0xffff).rom().region("maincpu", 0); -} - -void faceoffh_state::ay_w(offs_t offset, uint8_t data) -{ - if (offset) - { - m_ay_data = data; - return; - } - - if (m_ay_cmd == 0x00 && data == 0x03) - { - m_aysnd->address_w(m_ay_data); -// logerror("%s: AY addr = %02X\n", machine().describe_context(), m_ay_data); - } - else if (m_ay_cmd == 0x00 && data == 0x02) - { - m_aysnd->data_w(m_ay_data); -// logerror("%s: AY data = %02X\n", machine().describe_context(), m_ay_data); - } - m_ay_cmd = data; -} - -// Inputs - -static INPUT_PORTS_START( chexx83 ) - PORT_START("COIN") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // play anthem - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // play anthem - - PORT_START("INPUT") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("P1 Goal Sensor") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("P2 Goal Sensor") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 ) PORT_NAME("Puck Near Goal Sensors") // play "ohh" sample - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Boo Button") // stop anthem, play "boo" sample, eject puck - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P2 Boo Button") // stop anthem, play "boo" sample, eject puck - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Puck Eject Ready Sensor") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("DSW") - PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") - PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_DIPNAME( 0x0c, 0x00, "Game Duration (mins)" ) PORT_DIPLOCATION("SW1:3,4") - PORT_DIPSETTING( 0x00, "2" ) // 40 - PORT_DIPSETTING( 0x04, "3" ) // 60 - PORT_DIPSETTING( 0x08, "4" ) // 80 - PORT_DIPSETTING( 0x0c, "5" ) // 100 - PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) // multiplexed inputs -INPUT_PORTS_END - -// Machine - -void chexx_state::machine_start() -{ - m_digits.resolve(); - m_leds.resolve(); - m_lamps.resolve(); - - m_update_timer = timer_alloc(FUNC(chexx_state::update), this); -} - -void chexx_state::digitalker_set_bank(uint8_t bank) -{ - if (m_bank != bank) - { - uint8_t *src = memregion("samples")->base(); - uint8_t *dst = memregion("digitalker")->base(); - - memcpy(dst, src + bank * 0x4000, 0x4000); - - m_bank = bank; - } -} - -void chexx_state::machine_reset() -{ - m_bank = -1; - digitalker_set_bank(0); - m_update_timer->adjust(attotime::from_hz(60), 0, attotime::from_hz(60)); -} - -TIMER_CALLBACK_MEMBER(chexx_state::update) -{ - // NMI on coin-in - uint8_t coin = (~m_coin->read()) & 0x03; - m_maincpu->set_input_line(INPUT_LINE_NMI, coin ? ASSERT_LINE : CLEAR_LINE); - - // VIA CA1 connected to Digitalker INTR line - m_via->write_ca1(m_digitalker->digitalker_0_intr_r()); - -#if 0 - // Play the digitalker samples (it's not hooked up correctly yet) - static uint8_t sample = 0, bank = 0; - - if (machine().input().code_pressed_once(KEYCODE_Q)) - --bank; - if (machine().input().code_pressed_once(KEYCODE_W)) - ++bank; - bank %= 3; - digitalker_set_bank(bank); - - if (machine().input().code_pressed_once(KEYCODE_A)) - --sample; - if (machine().input().code_pressed_once(KEYCODE_S)) - ++sample; - - if (machine().input().code_pressed_once(KEYCODE_Z)) - { - m_digitalker->digitalker_0_cms_w(CLEAR_LINE); - m_digitalker->digitalker_0_cs_w(CLEAR_LINE); - - m_digitalker->digitalker_data_w(sample); - - m_digitalker->digitalker_0_wr_w(ASSERT_LINE); - m_digitalker->digitalker_0_wr_w(CLEAR_LINE); - m_digitalker->digitalker_0_wr_w(ASSERT_LINE); - } -#endif -} - -void chexx_state::chexx(machine_config &config) -{ - M6502(config, m_maincpu, XTAL(4'000'000) / 2); - m_maincpu->set_addrmap(AS_PROGRAM, &chexx_state::mem); - - // via - MOS6522(config, m_via, XTAL(4'000'000) / 4); - - m_via->readpa_handler().set(FUNC(chexx_state::via_a_in)); - m_via->readpb_handler().set(FUNC(chexx_state::via_b_in)); - - m_via->writepa_handler().set(FUNC(chexx_state::via_a_out)); - m_via->writepb_handler().set(FUNC(chexx_state::via_b_out)); - - m_via->ca2_handler().set(FUNC(chexx_state::via_ca2_out)); - m_via->cb1_handler().set(FUNC(chexx_state::via_cb1_out)); - m_via->cb2_handler().set(FUNC(chexx_state::via_cb2_out)); - m_via->irq_handler().set(FUNC(chexx_state::via_irq_out)); - - // Layout - config.set_default_layout(layout_chexx); - - // sound hardware - SPEAKER(config, "mono").front_center(); - DIGITALKER(config, m_digitalker, XTAL(4'000'000)); - m_digitalker->add_route(ALL_OUTPUTS, "mono", 0.16); -} - -void faceoffh_state::faceoffh(machine_config &config) -{ - chexx(config); - m_maincpu->set_addrmap(AS_PROGRAM, &faceoffh_state::mem); - - AY8910(config, m_aysnd, XTAL(4'000'000) / 2); - m_aysnd->add_route(ALL_OUTPUTS, "mono", 0.30); -} - -// ROMs - -/*************************************************************************** - -Chexx Hockey (1983 version 1.1) - -The "long and skinny" Moog CPU board used a 6502 for the processor, -a 6522 for the PIA, a 6810 static RAM, eight 52164 64k bit sound ROM chips, -a 40 pin 54104 sound chip, and a single 2716 CPU EPROM - -***************************************************************************/ - -ROM_START( chexx83 ) - ROM_REGION( 0x0800, "maincpu", 0 ) - ROM_LOAD( "chexx83.u4", 0x0000, 0x0800, CRC(a34abac1) SHA1(75a31670eb6d1b62ba984f0bac7c6e6067f6ae87) ) - - ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) - // bank switched (from samples region) - - ROM_REGION( 0x10000, "samples", ROMREGION_ERASE00 ) - ROM_LOAD( "chexx83.u12", 0x0000, 0x2000, NO_DUMP ) - ROM_LOAD( "chexx83.u13", 0x2000, 0x2000, NO_DUMP ) - ROM_LOAD( "chexx83.u14", 0x4000, 0x2000, NO_DUMP ) - ROM_LOAD( "chexx83.u15", 0x6000, 0x2000, NO_DUMP ) - ROM_LOAD( "chexx83.u16", 0x8000, 0x2000, NO_DUMP ) - ROM_LOAD( "chexx83.u17", 0xa000, 0x2000, NO_DUMP ) - ROM_LOAD( "chexx83.u18", 0xc000, 0x2000, NO_DUMP ) - ROM_LOAD( "chexx83.u19", 0xe000, 0x2000, NO_DUMP ) -ROM_END - -// Same PCB as 'chexx83' -ROM_START( olihockey ) - ROM_REGION( 0x0800, "maincpu", 0 ) - ROM_LOAD( "inor_1.u4", 0x0000, 0x0800, CRC(97716ac9) SHA1(b85ff1401544dc7121babee8adf618f82a2f6a89) ) - - ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) - // bank switched (from samples region) - - ROM_REGION( 0x10000, "samples", ROMREGION_ERASE00 ) - ROM_LOAD( "b8342_sjlb.u19", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) - ROM_LOAD( "b8342_sjlc.u18", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) - ROM_LOAD( "b8342_sjld.u17", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) - ROM_LOAD( "b8342_sjlf.u16", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) - ROM_LOAD( "b8342_sjlg.u15", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) - ROM_LOAD( "b8342_sjlh.u14", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) - - // U13 and U12 unpopulated - ROM_FILL( 0xc000, 0x2000, 0xff ) - ROM_FILL( 0xe000, 0x2000, 0xff ) -ROM_END - -// Same PCB as 'chexx83' -ROM_START( olihockeya ) - ROM_REGION( 0x0800, "maincpu", 0 ) - ROM_LOAD( "inor_2.u4", 0x0000, 0x0800, CRC(038958a4) SHA1(aec5e24eea1829459dd3ef9ffe3e4b8c39071ced) ) - - ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) - // bank switched (from samples region) - - ROM_REGION( 0x10000, "samples", ROMREGION_ERASE00 ) - ROM_LOAD( "b8342_sjlb.u19", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) - ROM_LOAD( "b8342_sjlc.u18", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) - ROM_LOAD( "b8342_sjld.u17", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) - ROM_LOAD( "b8342_sjlf.u16", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) - ROM_LOAD( "b8342_sjlg.u15", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) - ROM_LOAD( "b8342_sjlh.u14", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) - - // U13 and U12 unpopulated - ROM_FILL( 0xc000, 0x2000, 0xff ) - ROM_FILL( 0xe000, 0x2000, 0xff ) -ROM_END - -/*************************************************************************** - -Face-Off PCB? - -Entertainment Enterprises Ltd. 1983 (sticker) -Serial No. 025402 (sticker) -MADE IN JAPAN (etched) - -CPU: R6502P -RAM: M58725P (2KB) -I/O: R6522P (VIA) -Samples: Digitalker (MM54104) -Music: AY-3-8910 -Misc: XTAL 4MHz, DSW4, 42-pin connector - -***************************************************************************/ - -ROM_START( faceoffh ) - ROM_REGION( 0x1000, "maincpu", 0 ) - // "Copyright (c) 1983 SoftLogic JAPAN" - ROM_LOAD( "1.5d", 0x0000, 0x1000, CRC(6ab050be) SHA1(ebecae855e22e9c3c46bdee51f84fd5352bf191a) ) - - ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) - // bank switched (from samples region) - - ROM_REGION( 0x10000, "samples", 0 ) - ROM_LOAD( "9.2a", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) // digitalker header - ROM_LOAD( "8.2b", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) - - ROM_LOAD( "7.2c", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) // digitalker header - ROM_LOAD( "6.2d", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) - - ROM_LOAD( "5.3a", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) // digitalker header - ROM_LOAD( "4.3b", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) - - ROM_FILL( 0xc000, 0x2000, 0xff ) // unpopulated - ROM_FILL( 0xe000, 0x2000, 0xff ) // unpopulated -ROM_END - -} // Anonymous namespace - - -GAME( 1983, chexx83, 0, chexx, chexx83, chexx_state, empty_init, ROT270, "ICE", "Chexx (EM Bubble Hockey, 1983 1.1)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_NO_SOUND ) -GAME( 1983, faceoffh, chexx83, faceoffh, chexx83, faceoffh_state, empty_init, ROT270, "SoftLogic (Entertainment Enterprises, Ltd. license)", "Face-Off (EM Bubble Hockey)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND ) -GAME( 1985, olihockey, 0, chexx, chexx83, chexx_state, empty_init, ROT270, "Inor", "Olimpic Hockey (EM Bubble Hockey, set 1)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND ) -GAME( 1985, olihockeya, olihockey, chexx, chexx83, chexx_state, empty_init, ROT270, "Inor", "Olimpic Hockey (EM Bubble Hockey, set 2)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/misc/frenzyxprss.cpp b/src/mame/misc/frenzyxprss.cpp deleted file mode 100644 index 15b7949f788..00000000000 --- a/src/mame/misc/frenzyxprss.cpp +++ /dev/null @@ -1,132 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders: -/* - Skeleton driver for ICE Frenzy Express. - PC-based configuration running Windows 98 SE SP3: - - 694T Pro Ver 5 motherboard (Via VT82C686B + Via VT82C694T). - - Intel Celeron CPU 1000A/256/100/1.475 Q208A083-0620 SL5ZF. - - 256MB PC133 RAM (one single M366S3253CTS-C7A module). - - InsideTNC IV011A AGP graphics card. - - Crystal CS4281-CM EP based PCI sound card. - - "FE 107 I/O" ISA card. - - FE 107 I/O - ________ ________ ________ ________ - ___| |___| |___| |___| |___ - | |_______| |_______| |_______| |_______| | - | | - | __________ __________ __________ | - | |DM74LS245N |ADC0838CCN |DM74LS245N | - | _____________ | - | _________ | ACTEL | __________ | - | |DM74LS14N | A40MX04-F | |DM74LS245N | - | _______ | PL84 0007 | | - | | Xtal | | | | - | 4.9152MHz |____________| | - | ___ | - | |___|<-Empty socket for 93C46 | - |_ ____ ________| - |_|_|_|_|_|_| |_|_|_|_|_|_|_|_|_|_|_|_| - ISA SLOT -*/ - -#include "emu.h" -#include "cpu/i386/i386.h" -#include "screen.h" - -namespace { - -class frenzyxprss_state : public driver_device -{ -public: - frenzyxprss_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") - { } - - void frenzyxprss(machine_config &config); - -protected: - virtual void machine_start() override; - virtual void machine_reset() override; - virtual void video_start() override; - -private: - required_device m_maincpu; - - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - void frenzyxprss_map(address_map &map); -}; - -void frenzyxprss_state::video_start() -{ -} - -uint32_t frenzyxprss_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - return 0; -} - -void frenzyxprss_state::frenzyxprss_map(address_map &map) -{ -} - -static INPUT_PORTS_START( frenzyxprss ) -INPUT_PORTS_END - - -void frenzyxprss_state::machine_start() -{ -} - -void frenzyxprss_state::machine_reset() -{ -} - -void frenzyxprss_state::frenzyxprss(machine_config &config) -{ - // Basic machine hardware - PENTIUM3(config, m_maincpu, 100000000); // Intel Celeron SL5ZF 1GHz - m_maincpu->set_addrmap(AS_PROGRAM, &frenzyxprss_state::frenzyxprss_map); - - // Video hardware - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_size(800, 600); // Guess - screen.set_visarea(0, 800-1, 0, 600-1); - screen.set_screen_update(FUNC(frenzyxprss_state::screen_update)); -} - -/*************************************************************************** - - Game drivers - -***************************************************************************/ - -ROM_START( frenzyxprss ) - ROM_REGION( 0x40000, "bios", 0 ) - ROM_SYSTEM_BIOS( 0, "750", "2002-04-19" ) - ROMX_LOAD( "a6309vms_2002-04-19.750.u24", 0x00000, 0x40000, CRC(a227ff2a) SHA1(eea6b336082bf8091f120b6c4cc9bb61c3c3c234), ROM_BIOS(0) ) - ROM_SYSTEM_BIOS( 1, "740", "2002-02-28" ) - ROMX_LOAD( "a6309vms_2002-02-28.740.u24", 0x00000, 0x40000, CRC(316df0fd) SHA1(94995f35356e136c51abba3be05fe97b2c1baf7b), ROM_BIOS(1) ) - ROM_SYSTEM_BIOS( 2, "73x", "2002-02-07" ) - ROMX_LOAD( "a6309vms_2002-02-07.73x.u24", 0x00000, 0x40000, CRC(82c3b24c) SHA1(4b145def75e62fc64ebecf2ad666c9ab580b5d38), ROM_BIOS(2) ) - ROM_SYSTEM_BIOS( 3, "730", "2002-01-07" ) - ROMX_LOAD( "a6309vms_2002-01-07.730.u24", 0x00000, 0x40000, CRC(3c226a0b) SHA1(c8ccab6eb8acc775732055eebf914b274d314c37), ROM_BIOS(3) ) - ROM_SYSTEM_BIOS( 4, "720", "2001-11-03" ) - ROMX_LOAD( "a6309vms_2001-11-03.720.u24", 0x00000, 0x40000, CRC(7bd0ced9) SHA1(ddd3bdde983c7b3746fc9a7ee8d9dea9988089ce), ROM_BIOS(4) ) - ROM_SYSTEM_BIOS( 5, "710", "2001-09-19" ) - ROMX_LOAD( "a6309vms_2001-09-19.710.u24", 0x00000, 0x40000, CRC(bb2c094e) SHA1(2c2def2b5b22d7f66661742f23d7a0fc23cd8cff), ROM_BIOS(5) ) - ROM_SYSTEM_BIOS( 6, "700", "2001-07-11" ) - ROMX_LOAD( "a6309vms_2001-07-11.700.u24", 0x00000, 0x40000, CRC(72081fd3) SHA1(99556f6d7b638f229c466245eed82eb47a2c2304), ROM_BIOS(6) ) - ROM_DEFAULT_BIOS("73x") // The one dumped from the actual machine - - DISK_REGION( "ide:0:hdd:image" ) - DISK_IMAGE( "fexpress_cf_version_2.1", 0, SHA1(583607be83048ca10b1837a8982ba379256a3cf2) ) -ROM_END - -} // Anonymous namespace - - -GAME(2001, frenzyxprss, 0, frenzyxprss, frenzyxprss, frenzyxprss_state, empty_init, ROT0, "ICE / Uniana", "Frenzy Express", MACHINE_IS_SKELETON) diff --git a/src/mame/misc/ice_bozopail.cpp b/src/mame/misc/ice_bozopail.cpp deleted file mode 100644 index d9ba63da518..00000000000 --- a/src/mame/misc/ice_bozopail.cpp +++ /dev/null @@ -1,79 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:David Haywood -/* - -Bozo Pail toss by ICE (ice_tbd notes say Innovative Creations in Entertainment - same company?) - -Devices are 27c080 - -U9 is version 2.07 - - -PCB uses a 68HC11A1P for a processor/security...... - -could be related to (or the same thing as - our name could be incorrect) -http://www.highwaygames.com/arcade-machines/bozo-s-grand-prize-game-6751/ - - -*/ - -#include "emu.h" -#include "cpu/mc68hc11/mc68hc11.h" -#include "speaker.h" - -class ice_bozopail_state : public driver_device -{ -public: - ice_bozopail_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - { } - - void ice_bozo(machine_config &config); - -private: - virtual void machine_start() override; - virtual void machine_reset() override; - - required_device m_maincpu; - void ice_bozo_map(address_map &map); -}; - -void ice_bozopail_state::ice_bozo_map(address_map &map) -{ - map(0xe000, 0xffff).rom().region("maincpu", 0x1fe000); -} - -static INPUT_PORTS_START( ice_bozo ) -INPUT_PORTS_END - - - -void ice_bozopail_state::machine_start() -{ -} - -void ice_bozopail_state::machine_reset() -{ -} - - -void ice_bozopail_state::ice_bozo(machine_config &config) -{ - /* basic machine hardware */ - MC68HC11A1(config, m_maincpu, 8000000); // unknown clock - m_maincpu->set_addrmap(AS_PROGRAM, &ice_bozopail_state::ice_bozo_map); - - /* sound hardware */ - SPEAKER(config, "mono").front_center(); -} - - - -ROM_START( ice_bozo ) - ROM_REGION( 0x200000, "maincpu", 0 ) // mostly sound data, some code - ROM_LOAD( "ice-bozo.u18", 0x000000, 0x100000, CRC(00500a8b) SHA1(50b8a784ae61510a08cafbfb8529ec2a8ac1bf06) ) - ROM_LOAD( "ice-bozo.u9", 0x100000, 0x100000, CRC(26fd9d60) SHA1(41fe8d42db1eb16b413bd5a0f16bf0d081c3cc97) ) -ROM_END - -GAME( 1997?, ice_bozo, 0, ice_bozo, ice_bozo, ice_bozopail_state, empty_init, ROT0, "Innovative Creations in Entertainment", "Bozo's Pail Toss (v2.07)", MACHINE_IS_SKELETON_MECHANICAL ) diff --git a/src/mame/misc/ice_hhhippos.cpp b/src/mame/misc/ice_hhhippos.cpp deleted file mode 100644 index c0edd2c4444..00000000000 --- a/src/mame/misc/ice_hhhippos.cpp +++ /dev/null @@ -1,94 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:AJR -/**************************************************************************** - - Skeleton driver for Hungry Hungry Hippos redemption game by I.C.E. Inc. - - _________________________________________________________________________ - | ___ ___ _____ ___ ___ _ | - | |__| FUSE |ooo| |o| |··| (_) | - | |ooo| |o| COUNTER VOLUME ____ ____ | - | |ooo| DOME CONTROL LM358 LM358 | - | ___ |ooo| LIGHT | - | _ ___ |__| O<-LED ___ ______________ ______________ | - | (_) |__| ___ FUSE | U119 | | U122 | | - |SPEED ____FUSE |_____________| |_____________| | - | ___ |oo| _______ _______ _______ _______ | - |FUSE |oo| 74HC4040 74HC4060 74HC4040 74HC4060 | - | O<-LED |oo| ____ SW _________ | - | __ ____ LED->O XTAL START |__CONN__| | - | | | |oo| LM340AT 2.000 ________ ________ | - | | | |oo| 74HC08N 74HC138AN BATT | - | |_| |oo| ________________ 3.2V | - | LM723CN ____ TIP115 | MC68HC705C8P | | - | O<-LED |oo| _____ |_______________| _____ | - | __ |oo| |ooo| ________ ________ |ooo| | - | | | |oo| |ooo| 74HC174P 74HC174P |ooo| | - | | | ____ |ooo| ________ ________ |ooo| | - | |_| |oo| |ooo| 74HC174P 74HC174P |ooo| TIP115 - | LM723CN |oo| TIP115 _____ ________ ________ _____ | - | |oo| |ooo| 74HC174P 74HC174P |ooo| | - | ___ ___ |ooo| ________ ________ |ooo| | - | |__| |__| |ooo| 74HC174P 74HC174P |ooo| | - | |ooo| ________ ________ |ooo| TIP115 - | ___ ___ SW SW SW SW 74HC153N 74HC153N | - | |__| |__| PROG SEL STEP TST | - |________________________________________________________________________| - -For each hippo there's an eaten ball counter (two digits 7-seg display with 8 leds) - _______________________________ - | ___ _______ _______ ___ | - | | | | ___ | | ___ | | | | -MC14499P->| | | |__| | | |__| | | |<- TP03904 - | | | |o|__|o| |o|__|o| | | | - | |__| |______| |______| |__| | - | O O O O O O O O <- 8 leds - |_______________________________| - -****************************************************************************/ - -#include "emu.h" -#include "cpu/m6805/m68hc05.h" - -namespace -{ - -class ice_hhhippos_state : public driver_device -{ -public: - ice_hhhippos_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - { - } - - void hhhippos(machine_config &config); - -private: - required_device m_maincpu; -}; - -static INPUT_PORTS_START(hhhippos) -INPUT_PORTS_END - -void ice_hhhippos_state::hhhippos(machine_config &config) -{ - M68HC705C8A(config, m_maincpu, 2_MHz_XTAL); - - // TODO: sound (R2R DACs streamed from ROMs using HCMOS ripple counters) -} - -ROM_START(hhhippos) - ROM_REGION(0x2000, "maincpu", 0) - ROM_LOAD("68hc705c8.bin", 0x0000, 0x2000, CRC(5c74bcd7) SHA1(3c30ae38647c8f69f7bbcdbeb35b748c8f4c4cd8)) - - ROM_REGION(0x10000, "audio0", 0) - ROM_LOAD("u119.bin", 0x00000, 0x10000, CRC(77c8bd90) SHA1(e9a044d83f39fb617961f8985bc4bed06a03e07b)) - - ROM_REGION(0x20000, "audio1", 0) - ROM_LOAD("u122.bin", 0x00000, 0x20000, CRC(fc188905) SHA1(7bab8feb1f304c9fe7cde31aff4b40e2db56d525)) -ROM_END - -} // anonymous namespace - -GAME(1991, hhhippos, 0, hhhippos, hhhippos, ice_hhhippos_state, empty_init, ROT0, "ICE (Innovative Concepts in Entertainment)", "Hungry Hungry Hippos (redemption game)", MACHINE_IS_SKELETON_MECHANICAL) diff --git a/src/mame/misc/ice_tbd.cpp b/src/mame/misc/ice_tbd.cpp deleted file mode 100644 index 33922745ace..00000000000 --- a/src/mame/misc/ice_tbd.cpp +++ /dev/null @@ -1,89 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:David Haywood -/* - -Turbo Drive by Innovative Creations in Entertainment (ICE) - -http://www.arcade-museum.com/game_detail.php?game_id=10658 - - -Slot car type race game, coin operated. - -Device is a 27c128 - --- -not sure what the actual inputs / outputs would be on this, maybe just track position / lap sensors? - - -*/ - -#include "emu.h" -#include "cpu/z80/z80.h" -#include "machine/i8255.h" - -class ice_tbd_state : public driver_device -{ -public: - ice_tbd_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - { } - - void ice_tbd(machine_config &config); - -private: - void ice_tbd_io_map(address_map &map); - void ice_tbd_map(address_map &map); - - virtual void machine_start() override; - virtual void machine_reset() override; - required_device m_maincpu; -}; - - - -void ice_tbd_state::ice_tbd_map(address_map &map) -{ - map(0x0000, 0x3fff).rom(); - map(0x4000, 0x47ff).ram(); -} - -void ice_tbd_state::ice_tbd_io_map(address_map &map) -{ - map.global_mask(0xff); - map(0x00, 0x03).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); -} - - -static INPUT_PORTS_START( ice_tbd ) -INPUT_PORTS_END - -void ice_tbd_state::machine_start() -{ -} - -void ice_tbd_state::machine_reset() -{ -} - -void ice_tbd_state::ice_tbd(machine_config &config) -{ - /* basic machine hardware */ - Z80(config, m_maincpu, 8000000); /* ? MHz */ - m_maincpu->set_addrmap(AS_PROGRAM, &ice_tbd_state::ice_tbd_map); - m_maincpu->set_addrmap(AS_IO, &ice_tbd_state::ice_tbd_io_map); - - i8255_device &ppi(I8255(config, "ppi")); - ppi.out_pa_callback().set_nop(); // ? - ppi.out_pb_callback().set_nop(); // ? - ppi.in_pc_callback().set_constant(0); // ? -} - - -ROM_START( ice_tbd ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "turbo-dr.ive", 0x0000, 0x4000, CRC(d7c79ac4) SHA1(a01d93411e604e36a3ced58063f2ab81e431b82a) ) -ROM_END - - -GAME( 1988, ice_tbd, 0, ice_tbd, ice_tbd, ice_tbd_state, empty_init, ROT0, "Innovative Creations in Entertainment", "Turbo Drive (ICE)", MACHINE_IS_SKELETON_MECHANICAL ) diff --git a/src/mame/misc/lethalj.cpp b/src/mame/misc/lethalj.cpp deleted file mode 100644 index ee732f83c9b..00000000000 --- a/src/mame/misc/lethalj.cpp +++ /dev/null @@ -1,1268 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Aaron Giles -/*************************************************************************** - - The Game Room Lethal Justice hardware - - driver by Aaron Giles - - Games supported: - * Lethal Justice - * Egg Venture - * Ripper Ribit - * Chicken Farm - * Crazzy Clownz - - Note: I.C.E. is Innovative Concepts in Entertainment - -**************************************************************************** - -Egg Venture -The Gameroom, 1997 - -PCB Layout ----------- - -(C) 1996 I.C.E. -|-------------------------------------------------------| -| EU21.U21 EU18.U18 EU20.U20 32MHz | -| |-------| | -| M6295 M6295 M6295 |XILINX | | -| 2MHz 2MHz 2MHz |XC3042 | | -| DSW(8) KYLR1 |-------| | -|J EGR9.VC9 EGR4.GR4 | -|A DSW(4)EGR8.VC8 |-------| | -|M M5M442256 |XILINX | EGR6.GR6 | -|M M5M442256 11.0592MHz |XC3042 | | -|A M5M442256 MACH210 |-------| EGR3.GR3 | -|4116R M5M442256 MACH210 MACH210 MACH210 | -|4116R |--------| W241024 EGR1.GR2 | -| |TMS34010| W241024 | -|2803A |-50 | W241024 EGR1.GR1 | -| | | W241024 | -| 40MHz |--------| EGR5.GR5 | -| BT121 MACH210 MACH210 MACH210 | -|-------------------------------------------------------| - -Notes: - TMS34010 - TMS34010FNL-50 CPU, clock input 20.000MHz [40/2] (PLCC68) - M6295 - Clock input 2.000MHz, pin 7 HIGH (QFP44) - XC3042 - XILINX XC3042 FPGA (PLCC84) - BT121 - BT121KPJ80 Triple 8-bit 80MHz Video DAC (PLCC44) - MACH210 - AMD MACH210A-10JC Complex Programmable Logic Device (CPLD, PLCC44) - 2803A - ST ULN2803A Eight Darlington Transistor Arrays With Common Emitters (DIP18) - 4116R - 4116R-001 Bourns Type 4100R Series Resistor Network (DIP16) - M5M442256 - Mitsubishi M5M442256AL-8 256k x4 DRAM (ZIP28) - W241024 - Winbond W241024AK-20 128 x8 SRAM (NDIP32) - KYLR1 - 8 Pin Gun Connector - -Note 1: Some PCBs use a 11.2896MHz OSC instead of the 11.0592MHz -Note 2: Some PCBs use a TMS34010FNL-40 instead of the TMS34010FNL-50 - - Egg Venture & Lethal Justice JAMMA Pinout - - Main Jamma Connector - Solder Side | Parts Side ------------------------------------------------------------------- - GND | A | 1 | GND - GND | B | 2 | GND - +5 | C | 3 | +5 - +5 | D | 4 | +5 - -5 | E | 5 | -5 - +12 | F | 6 | +12 ------------- KEY ------------| H | 7 |------------ KEY ----------- - | J | 8 | Coin Counter # 1 - | K | 9 | - L Speaker (-) | L | 10| L Speaker (+) - R Speaker (-) | M | 11| R Speaker (+) - Video Green | N | 12| Video Red - Video Sync | P | 13| Video Blue - Service Switch | R | 14| Video GND - | S | 15| - Coin Switch 2 | T | 16| Coin Switch 1 - Start Player 2 | U | 17| Start Player 1 - | V | 18| - | W | 19| - | X | 20| - | Y | 21| - | Z | 22| - | a | 23| - | b | 24| - | c | 25| - | d | 26| - GND | e | 27| GND - GND | f | 28| GND - - - Gun Connector Pinout - - 1| +5 Volts - 2| Gun OPTO Player 1 - 3| Gun OPTO Player 2 - 4| NOT USED - 5| Gun Trigger Player 1 - 6| NOT USED - 7| Gun Trigger Player 2 - 8| KEY - 9| Ground - -+5v and GND are wired to both player 1 & 2 - - -The Egg Venture/Lethal Justice PCB does NOT supply an amplified -sound signal. An external sound AMP is required - -Addition information for Sound & AMP hookup: - - Power AMP /| - +-------------------+ / | - | | -------| | Right Speaker - [| Volume/Gain | | ----| | - | R+|]--| | \ | - [| BASS R-|]-----| \| - | | - [| Treble L+|]-----| /| - | L-|]--| | / | - | | | ----| | Left Speaker -Pin #L (-) | | -------| | - --------->|\ | \ | -Pin #10(+) | | L I | \| - --------->|/ N | - | P | -Pin #M (-) | U | - --------->|\ T | -Pin #11(+) | | R | - --------->|/ RMT|]--| +12 Volts - | +12|]--+----------- To Power Source - | GND|]-------------- - +-------------------+ Ground - - - - Frantic Fred JAMMA Pinout - - Main Jamma Connector - Solder Side | Parts Side ------------------------------------------------------------------- - GND | A | 1 | GND - GND | B | 2 | GND - +5 | C | 3 | +5 - +5 | D | 4 | +5 - | E | 5 | - +12 | F | 6 | +12 ------------- KEY ------------| H | 7 |------------ KEY ----------- - Ticket Counter | J | 8 | Coin Counter # 1 - Marquee* | K | 9 | Ticket Motor - | L | 10| - R Speaker (-) | M | 11| R Speaker (+) - Video Green | N | 12| Video Red - Video Sync | P | 13| Video Blue - Service Switch | R | 14| Video GND - | S | 15| Ticket Sense - Coin Switch 2 | T | 16| Coin Switch 1 - | U | 17| - | V | 18| - | W | 19| - Dummy Pin | X | 20| Bonus Button - | Y | 21| - Dummy Pin | Z | 22| Wheel - Dummy Pin | a | 23| Wheel - | b | 24| - | c | 25| - | d | 26| - GND | e | 27| GND - GND | f | 28| GND - -* There is a resistor connected between +12v & Marquee - so it's to power the light - -***************************************************************************/ - -#include "emu.h" -#include "lethalj.h" - -#include "sound/okim6295.h" -#include "emupal.h" -#include "speaker.h" - - -#define MASTER_CLOCK XTAL(40'000'000) -#define SOUND_CLOCK XTAL(2'000'000) - -#define VIDEO_CLOCK XTAL(11'289'600) -#define VIDEO_CLOCK_LETHALJ XTAL(11'059'200) - - - -/************************************* - * - * Custom inputs - * - *************************************/ - -CUSTOM_INPUT_MEMBER(lethalj_state::cclownz_paddle) -{ - int value = m_paddle->read(); - return ((value << 4) & 0xf00) | (value & 0x00f); -} - - - -/************************************* - * - * Output controls - * - *************************************/ - -void lethalj_state::ripribit_control_w(uint16_t data) -{ - machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); - m_ticket->motor_w(BIT(data, 1)); - m_lamps[0] = BIT(data, 2); -} - - -void lethalj_state::cfarm_control_w(uint16_t data) -{ - m_ticket->motor_w(BIT(data, 0)); - m_lamps[0] = BIT(data, 2); - m_lamps[1] = BIT(data, 3); - m_lamps[2] = BIT(data, 4); - machine().bookkeeping().coin_counter_w(0, BIT(data, 7)); -} - - -void lethalj_state::cclownz_control_w(uint16_t data) -{ - m_ticket->motor_w(BIT(data, 0)); - m_lamps[0] = BIT(data, 2); - m_lamps[1] = BIT(data, 4); - m_lamps[2] = BIT(data, 5); - machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); -} - - - -/************************************* - * - * Memory maps - * - *************************************/ - -void lethalj_state::lethalj_map(address_map &map) -{ - map(0x00000000, 0x003fffff).ram(); - map(0x04000000, 0x0400000f).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write)).umask16(0x00ff); - map(0x04000010, 0x0400001f).rw("oki2", FUNC(okim6295_device::read), FUNC(okim6295_device::write)).umask16(0x00ff); - map(0x04100000, 0x0410000f).rw("oki3", FUNC(okim6295_device::read), FUNC(okim6295_device::write)).umask16(0x00ff); -// map(0x04100010, 0x0410001f).nopr(); /* read but never examined */ - map(0x04200000, 0x0420001f).nopw(); /* clocks bits through here */ - map(0x04300000, 0x0430007f).r(FUNC(lethalj_state::lethalj_gun_r)); - map(0x04400000, 0x0440000f).nopw(); /* clocks bits through here */ - map(0x04500010, 0x0450001f).portr("IN0"); - map(0x04600000, 0x0460000f).portr("IN1"); - map(0x04700000, 0x0470007f).w(FUNC(lethalj_state::blitter_w)); - map(0xc0000240, 0xc000025f).nopw(); /* seems to be a bug in their code, one of many. */ - map(0xff800000, 0xffffffff).rom().region("maincpu", 0); -} - - - -/************************************* - * - * Input ports - * - *************************************/ - -static INPUT_PORTS_START( lethalj ) - PORT_START("IN0") - PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* ??? Seems to be rigged up to the auto scroll, and acts as a fast forward*/ - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) - PORT_BIT( 0xffe0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_START("IN1") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x00c0, DEF_STR( Free_Play ) ) - PORT_DIPNAME( 0x0300, 0x0100, DEF_STR( Lives ) ) - PORT_DIPSETTING( 0x0000, "2" ) - PORT_DIPSETTING( 0x0100, "3" ) - PORT_DIPSETTING( 0x0200, "4" ) - PORT_DIPSETTING( 0x0300, "5" ) - PORT_DIPNAME( 0x0c10, 0x0010, "Right Gun Offset" ) - PORT_DIPSETTING( 0x0000, "-4" ) - PORT_DIPSETTING( 0x0400, "-3" ) - PORT_DIPSETTING( 0x0800, "-2" ) - PORT_DIPSETTING( 0x0c00, "-1" ) - PORT_DIPSETTING( 0x0010, "0" ) - PORT_DIPSETTING( 0x0410, "+1" ) - PORT_DIPSETTING( 0x0810, "+2" ) - PORT_DIPSETTING( 0x0c10, "+3" ) - PORT_DIPNAME( 0x3020, 0x0020, "Left Gun Offset" ) - PORT_DIPSETTING( 0x0000, "-4" ) - PORT_DIPSETTING( 0x1000, "-3" ) - PORT_DIPSETTING( 0x2000, "-2" ) - PORT_DIPSETTING( 0x3000, "-1" ) - PORT_DIPSETTING( 0x0020, "0" ) - PORT_DIPSETTING( 0x1020, "+1" ) - PORT_DIPSETTING( 0x2020, "+2" ) - PORT_DIPSETTING( 0x3020, "+3" ) - PORT_DIPNAME( 0x4000, 0x0000, "DIP E" ) - PORT_DIPSETTING( 0x0000, "0" ) - PORT_DIPSETTING( 0x4000, "1" ) - PORT_DIPNAME( 0x8000, 0x8000, "Global Gun Offset" ) - PORT_DIPSETTING( 0x0000, "-2.5" ) - PORT_DIPSETTING( 0x8000, "+0" ) - - PORT_START("LIGHT0_X") /* fake analog X */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) - - PORT_START("LIGHT0_Y") /* fake analog Y */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) - - PORT_START("LIGHT1_X") /* fake analog X */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2) - - PORT_START("LIGHT1_Y") /* fake analog Y */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2) -INPUT_PORTS_END - - -static INPUT_PORTS_START( eggventr ) - PORT_START("IN0") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_DIPNAME( 0x0070, 0x0000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,3,2") - PORT_DIPSETTING( 0x0040, DEF_STR( 8C_1C ) ) - PORT_DIPSETTING( 0x0030, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x0050, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x0060, DEF_STR( 1C_4C ) ) - PORT_DIPSETTING( 0x0070, DEF_STR( Free_Play ) ) - PORT_DIPUNUSED_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:1" ) // 4-position switch - switch 1 not used - PORT_DIPNAME( 0x0300, 0x0200, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW3:8,7") // Verified Correct - PORT_DIPSETTING( 0x0000, "3" ) - PORT_DIPSETTING( 0x0100, "4" ) - PORT_DIPSETTING( 0x0200, "5" ) - PORT_DIPSETTING( 0x0300, "6" ) - PORT_DIPNAME( 0x0c00, 0x0400, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW3:6,5") // According to info from The Gameroom / Manual - PORT_DIPSETTING( 0x0c00, DEF_STR( Very_Easy) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Easy ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Medium ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( Hard ) ) - PORT_DIPNAME( 0x1000, 0x1000, "Slot Machine" ) PORT_DIPLOCATION("SW3:4") // Verified Correct - PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( On ) ) - PORT_DIPUNUSED_DIPLOC( 0x2000, IP_ACTIVE_LOW, "SW3:3" ) // Manual says switches 1-3 are reserved - PORT_DIPUNUSED_DIPLOC( 0x4000, IP_ACTIVE_LOW, "SW3:2" ) - PORT_DIPUNUSED_DIPLOC( 0x8000, IP_ACTIVE_LOW, "SW3:1" ) - - PORT_START("IN1") - PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x7f00, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 ) - - PORT_START("LIGHT0_X") /* fake analog X */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) - - PORT_START("LIGHT0_Y") /* fake analog Y */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) - - PORT_START("LIGHT1_X") /* fake analog X */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2) - - PORT_START("LIGHT1_Y") /* fake analog Y */ - PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2) -INPUT_PORTS_END - -static INPUT_PORTS_START( eggventr2 ) - PORT_INCLUDE(eggventr) - - PORT_MODIFY("IN0") - PORT_DIPNAME( 0x0300, 0x0200, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW3:8,7") // Verified Correct - 1 extra life per setting - PORT_DIPSETTING( 0x0000, "4" ) - PORT_DIPSETTING( 0x0100, "5" ) - PORT_DIPSETTING( 0x0200, "6" ) - PORT_DIPSETTING( 0x0300, "7" ) -INPUT_PORTS_END - -static INPUT_PORTS_START( eggvntdx ) - PORT_INCLUDE(eggventr) - - PORT_MODIFY("IN0") - PORT_DIPUNUSED_DIPLOC( 0x1000, IP_ACTIVE_LOW, "SW3:4" ) // Was "Slot Machine" - The slot machine is present in the code as a 'bonus stage' - // (when the egg reaches Vegas?), but not actually called (EC). -INPUT_PORTS_END - - -static INPUT_PORTS_START( ripribit ) - PORT_START("IN0") - PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) - PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_START("IN1") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_HIGH ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_DIPNAME( 0x0010, 0x0010, "Bonus Ticket Increment" ) - PORT_DIPSETTING( 0x0010, "+1 Ticket Per Game" ) - PORT_DIPSETTING( 0x0000, "Fixed" ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( On ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) - PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x0700, 0x0200, "Starting Jackpot" ) - PORT_DIPSETTING( 0x0000, "0" ) - PORT_DIPSETTING( 0x0100, "5" ) - PORT_DIPSETTING( 0x0200, "10" ) - PORT_DIPSETTING( 0x0300, "15" ) - PORT_DIPSETTING( 0x0400, "20" ) - PORT_DIPSETTING( 0x0500, "25" ) - PORT_DIPSETTING( 0x0600, "30" ) - PORT_DIPSETTING( 0x0700, "35" ) - PORT_DIPNAME( 0x1800, 0x1800, "Bonus Screen Setting" ) - PORT_DIPSETTING( 0x0000, "1" ) - PORT_DIPSETTING( 0x0800, "2" ) - PORT_DIPSETTING( 0x1000, "3" ) - PORT_DIPSETTING( 0x1800, "4" ) - PORT_DIPNAME( 0xe000, 0x8000, "Points per Ticket" ) - PORT_DIPSETTING( 0xe000, "200" ) - PORT_DIPSETTING( 0xc000, "300" ) - PORT_DIPSETTING( 0xa000, "400" ) - PORT_DIPSETTING( 0x8000, "500" ) - PORT_DIPSETTING( 0x6000, "600" ) - PORT_DIPSETTING( 0x4000, "700" ) - PORT_DIPSETTING( 0x2000, "800" ) - PORT_DIPSETTING( 0x0000, "1000" ) -INPUT_PORTS_END - - -static INPUT_PORTS_START( cfarm ) - PORT_START("IN0") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_HIGH ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_DIPNAME( 0x0010, 0x0010, "Bonus Ticket Increment" ) - PORT_DIPSETTING( 0x0010, "+1 Ticket Per Game" ) - PORT_DIPSETTING( 0x0000, "Fixed" ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( On ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) - PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x0700, 0x0300, "Starting Jackpot" ) - PORT_DIPSETTING( 0x0000, "0" ) - PORT_DIPSETTING( 0x0100, "5" ) - PORT_DIPSETTING( 0x0200, "8" ) - PORT_DIPSETTING( 0x0300, "10" ) - PORT_DIPSETTING( 0x0400, "12" ) - PORT_DIPSETTING( 0x0500, "15" ) - PORT_DIPSETTING( 0x0600, "18" ) - PORT_DIPSETTING( 0x0700, "20" ) - PORT_DIPNAME( 0x1800, 0x1800, "Bonus Screen Setting" ) - PORT_DIPSETTING( 0x0000, "1" ) - PORT_DIPSETTING( 0x0800, "2" ) - PORT_DIPSETTING( 0x1000, "3" ) - PORT_DIPSETTING( 0x1800, "4" ) - PORT_DIPNAME( 0xe000, 0x8000, "Eggs per Ticket" ) - PORT_DIPSETTING( 0xe000, "1" ) - PORT_DIPSETTING( 0xc000, "2" ) - PORT_DIPSETTING( 0xa000, "3" ) - PORT_DIPSETTING( 0x8000, "4" ) - PORT_DIPSETTING( 0x6000, "5" ) - PORT_DIPSETTING( 0x4000, "6" ) - PORT_DIPSETTING( 0x2000, "8" ) - PORT_DIPSETTING( 0x0000, "10" ) - - PORT_START("IN1") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) - PORT_BIT( 0x0006, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) - PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - - -static INPUT_PORTS_START( cclownz ) - PORT_START("IN0") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_HIGH ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_DIPNAME( 0x0010, 0x0010, "Bonus Ticket Increment" ) - PORT_DIPSETTING( 0x0010, "+1 Ticket Per Game" ) - PORT_DIPSETTING( 0x0000, "Fixed" ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( On ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) - PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coinage ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x0700, 0x0700, "Starting Jackpot" ) - PORT_DIPSETTING( 0x0000, "0" ) - PORT_DIPSETTING( 0x0100, "2" ) - PORT_DIPSETTING( 0x0200, "5" ) - PORT_DIPSETTING( 0x0300, "8" ) - PORT_DIPSETTING( 0x0400, "10" ) - PORT_DIPSETTING( 0x0500, "15" ) - PORT_DIPSETTING( 0x0600, "20" ) - PORT_DIPSETTING( 0x0700, "30" ) - PORT_DIPNAME( 0x1800, 0x1800, "Bonus Screen Settings" ) - PORT_DIPSETTING( 0x0000, "1" ) - PORT_DIPSETTING( 0x0800, "2" ) - PORT_DIPSETTING( 0x1000, "3" ) - PORT_DIPSETTING( 0x1800, "4" ) - PORT_DIPNAME( 0xe000, 0x8000, "Points per Ticket" ) - PORT_DIPSETTING( 0xe000, "700" ) - PORT_DIPSETTING( 0xc000, "900" ) - PORT_DIPSETTING( 0xa000, "1200" ) - PORT_DIPSETTING( 0x8000, "1500" ) - PORT_DIPSETTING( 0x6000, "1800" ) - PORT_DIPSETTING( 0x4000, "2100" ) - PORT_DIPSETTING( 0x2000, "2400" ) - PORT_DIPSETTING( 0x0000, "3000" ) - - PORT_START("IN1") - PORT_BIT( 0x0f0f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(lethalj_state, cclownz_paddle) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) - PORT_BIT( 0x0060, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_START("PADDLE") - PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE -INPUT_PORTS_END - - -static INPUT_PORTS_START( franticf ) // how do the directional inputs work? - PORT_START("IN0") - PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, "x" ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - - PORT_START("IN1") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,3") - PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x0040, 0x0040, "Bonus Mode" ) PORT_DIPLOCATION("SW1:2") - PORT_DIPSETTING( 0x0040, "0 Missed Apples" ) - PORT_DIPSETTING( 0x0000, "1 Missed Apple" ) - PORT_DIPNAME( 0x0080, 0x0000, "Bonus Ticket" ) PORT_DIPLOCATION("SW1:1") - PORT_DIPSETTING( 0x0080, "Every 3rd Game" ) - PORT_DIPSETTING( 0x0000, "Every Game" ) - PORT_DIPNAME( 0x0100, 0x0100, "Double Ticket Values" ) PORT_DIPLOCATION("SW3:1") - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, "Bonus Round" ) PORT_DIPLOCATION("SW3:2") - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) /* Enables "Cyclone" bonus option at the end of the game */ - PORT_DIPNAME( 0x0400, 0x0400, "Ticket Payout" ) PORT_DIPLOCATION("SW3:3") - PORT_DIPSETTING( 0x0400, "Preset" ) /* AKA "Just for Playing" */ - PORT_DIPSETTING( 0x0000, "Based on Play" ) - PORT_DIPNAME( 0x1800, 0x1800, "Apples Per Game" ) PORT_DIPLOCATION("SW3:5,4") - PORT_DIPSETTING( 0x0000, "5" ) - PORT_DIPSETTING( 0x0800, "7" ) - PORT_DIPSETTING( 0x1000, "8" ) - PORT_DIPSETTING( 0x1800, "9" ) - PORT_DIPNAME( 0xe000, 0x8000, "Ticket Preset" ) PORT_DIPLOCATION("SW3:8,7,6") - PORT_DIPSETTING( 0x0000, "1" ) - PORT_DIPSETTING( 0x2000, "2" ) - PORT_DIPSETTING( 0x4000, "3" ) - PORT_DIPSETTING( 0x6000, "4" ) - PORT_DIPSETTING( 0x8000, "5" ) - PORT_DIPSETTING( 0xa000, "6" ) - PORT_DIPSETTING( 0xc000, "7" ) - PORT_DIPSETTING( 0xe000, "8" ) -/* - "Play Based" Tickets despenced based on setting of DSW6-8 - -------------------------------------------------------------- -Apples Per Game 0x7000 0x6000 0x5000 0x4000 0x3000 0x2000 0x1000 0x0000 ----------------------------------------------------------------------------------- - 5 3 9 3 9 7 6 5 5 - 7 4 10 4 13 8 7 9 7 - 8 4 10 6 15 9 9 9 8 - 9 5 11 6 18 10 9 10 9 - -*/ - -// PORT_START("PADDLE") -// PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE -INPUT_PORTS_END - -static INPUT_PORTS_START( franticfa ) // how do the directional inputs work? - PORT_START("IN0") - PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, "x" ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - - PORT_START("IN1") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,3") - PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x0040, 0x0040, "Bonus Mode" ) PORT_DIPLOCATION("SW1:2") - PORT_DIPSETTING( 0x0040, "0 Missed Apples" ) - PORT_DIPSETTING( 0x0000, "1 Missed Apple" ) - PORT_DIPNAME( 0x0080, 0x0000, "Bonus Ticket" ) PORT_DIPLOCATION("SW1:1") - PORT_DIPSETTING( 0x0080, "Every 3rd Game" ) - PORT_DIPSETTING( 0x0000, "Every Game" ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1") /* This one likey Enables/Disables the Bonus round */ - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2") /* Preset & play based? */ - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - -/* - PORT_DIPNAME( 0x1c00, 0x0400, "Number of Fruit" ) - PORT_DIPSETTING( 0x0000, "3" ) - PORT_DIPSETTING( 0x0400, "5" ) - PORT_DIPSETTING( 0x0800, "7" ) - PORT_DIPSETTING( 0x0c00, "9" ) - PORT_DIPSETTING( 0x1000, "9 (duplicate 1)" ) // appear to be duplicates but could affect something else too - PORT_DIPSETTING( 0x1400, "9 (duplicate 2)" ) - PORT_DIPSETTING( 0x1800, "9 (duplicate 3)" ) - PORT_DIPSETTING( 0x1c00, "9 (duplicate 4)" ) - PORT_DIPNAME( 0x6000, 0x2000, "Initial Fruit Values" ) - PORT_DIPSETTING( 0x0000, "Lowest" ) - PORT_DIPSETTING( 0x2000, "Low" ) - PORT_DIPSETTING( 0x4000, "Medium" ) - PORT_DIPSETTING( 0x6000, "High" ) -*/ - - PORT_DIPNAME( 0x0c00, 0x0400, "Apples Per Game" ) PORT_DIPLOCATION("SW3:4,3") - PORT_DIPSETTING( 0x0000, "3" ) - PORT_DIPSETTING( 0x0400, "5" ) - PORT_DIPSETTING( 0x0800, "7" ) - PORT_DIPSETTING( 0x0c00, "9" ) - PORT_DIPNAME( 0x7000, 0x7000, "Ticket Preset" ) PORT_DIPLOCATION("SW3:7,6,5") - PORT_DIPSETTING( 0x0000, "1" ) - PORT_DIPSETTING( 0x1000, "2" ) - PORT_DIPSETTING( 0x2000, "3" ) - PORT_DIPSETTING( 0x3000, "4" ) - PORT_DIPSETTING( 0x4000, "5" ) - PORT_DIPSETTING( 0x5000, "6" ) - PORT_DIPSETTING( 0x6000, "7" ) - PORT_DIPSETTING( 0x7000, "8" ) - PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW3:8") - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - -// PORT_START("PADDLE") -// PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE -INPUT_PORTS_END - - -/************************************* - * - * Machine drivers - * - *************************************/ - -void lethalj_state::gameroom(machine_config &config) -{ - /* basic machine hardware */ - TMS34010(config, m_maincpu, MASTER_CLOCK); - m_maincpu->set_addrmap(AS_PROGRAM, &lethalj_state::lethalj_map); - m_maincpu->set_halt_on_reset(false); - m_maincpu->set_pixel_clock(VIDEO_CLOCK); - m_maincpu->set_pixels_per_clock(1); - m_maincpu->set_scanline_ind16_callback(FUNC(lethalj_state::scanline_update)); - - TICKET_DISPENSER(config, m_ticket, attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH); - - /* video hardware */ - SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(VIDEO_CLOCK, 701, 0, 512, 263, 0, 236); - m_screen->set_screen_update("maincpu", FUNC(tms34010_device::tms340x0_ind16)); - m_screen->set_palette("palette"); - - PALETTE(config, "palette", palette_device::RGB_555); - - /* sound hardware */ - SPEAKER(config, "mono").front_center(); - - OKIM6295(config, "oki1", SOUND_CLOCK, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.33); - - OKIM6295(config, "oki2", SOUND_CLOCK, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.33); - - OKIM6295(config, "oki3", SOUND_CLOCK, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.33); -} - - -void lethalj_state::lethalj(machine_config &config) -{ - gameroom(config); - - m_maincpu->set_pixel_clock(VIDEO_CLOCK_LETHALJ); - - m_screen->set_raw(VIDEO_CLOCK_LETHALJ, 689, 0, 512, 259, 0, 236); -} - - - -/************************************* - * - * ROM definitions - * - *************************************/ - -ROM_START( lethalj ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "lethal_vc8_2.3.vc8", 0x000000, 0x080000, CRC(8d568e1d) SHA1(e4dd3794789f9ccd7be8374978a3336f2b79136f) ) // Labeled as LETHAL VC8 2.3, also found labeled as VC-8 - ROM_LOAD16_BYTE( "lethal_vc9_2.3.vc9", 0x000001, 0x080000, CRC(8f22add4) SHA1(e773d3ae9cf512810fc266e784d21ed115c8830c) ) // Labeled as LETHAL VC9 2.3, also found labeled as VC-9 - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "gr1.gr1", 0x000000, 0x100000, CRC(27f7b244) SHA1(628b29c066e217e1fe54553ea3ed98f86735e262) ) // These had non specific GRx labels, also found labeled as GR-x - ROM_LOAD16_BYTE( "gr2.gr2", 0x000001, 0x100000, CRC(1f25d3ab) SHA1(bdb8a3c546cdee9a5630c47b9c5079a956e8a093) ) - ROM_LOAD16_BYTE( "gr4.gr4", 0x200000, 0x100000, CRC(c5838b4c) SHA1(9ad03d0f316eb31fdf0ca6f65c02a27d3406d072) ) - ROM_LOAD16_BYTE( "gr3.gr3", 0x200001, 0x100000, CRC(ba9fa057) SHA1(db6f11a8964870f04f94fef6f1b1a58168a942ad) ) - ROM_LOAD16_BYTE( "lethal_gr6_2.3.gr6", 0x400000, 0x100000, CRC(51c99b85) SHA1(9a23bf21a73d2884b49c64a8f42c288534c79dc5) ) // Labeled as LETHAL GR6 2.3, also found labeled as GR-6 - ROM_LOAD16_BYTE( "lethal_gr5_2.3.gr5", 0x400001, 0x100000, CRC(80dda9b5) SHA1(d8a79cad112bc7d9e4ba31a950e4807581f3bf46) ) // Labeled as LETHAL GR5 2.3, also found labeled as GR-5 - - ROM_REGION( 0x40000, "oki1", 0 ) // sound data - ROM_LOAD( "sound1.u20", 0x00000, 0x40000, CRC(7d93ca66) SHA1(9e1dc0efa5d0f770c7e1f10de56fbf5620dea437) ) - - ROM_REGION( 0x40000, "oki2", 0 ) // sound data - ROM_LOAD( "sound1.u21", 0x00000, 0x40000, CRC(7d3beae0) SHA1(5ec753c5fd5ca0f9492c9e274703a1aa758062a7) ) - - ROM_REGION( 0x40000, "oki3", 0 ) // sound data - ROM_LOAD( "sound1.u18", 0x00000, 0x40000, CRC(7d93ca66) SHA1(9e1dc0efa5d0f770c7e1f10de56fbf5620dea437) ) -ROM_END - - -ROM_START( eggventr ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "evc8.10.vc8", 0x000000, 0x020000, CRC(225d1164) SHA1(b0dc55f2e8ded1fe7874de05987fcf879772289e) ) // Labeled as EVC8.10 - ROM_LOAD16_BYTE( "evc9.10.vc9", 0x000001, 0x020000, CRC(42f6e904) SHA1(11be8e7383a218aac0e1a63236bbdb7cca0993bf) ) // Labeled as EVC9.10 - ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff - ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) - ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) - ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) - ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) - ROM_LOAD16_BYTE( "egr6.3.gr6", 0x400000, 0x100000, CRC(f299d818) SHA1(abbb333c43675d34c59201b5d297779cfea8b092) ) // Labeled as EGR6.3 - ROM_LOAD16_BYTE( "egr5.3.gr5", 0x400001, 0x100000, CRC(ebfca07b) SHA1(20465d14b41d99651166f221057737d7b3cc770c) ) // Labeled as EGR5.3 - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) -ROM_END - - -ROM_START( eggventr8 ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "evc8.8.vc8", 0x000000, 0x020000, CRC(5a130c04) SHA1(00408912b436efa003bb02dce90fae4fe33a0180) ) // Labeled as EVC8.8 - ROM_LOAD16_BYTE( "evc9.8.vc9", 0x000001, 0x020000, CRC(3ac0a95b) SHA1(7f3bd0e6d2d790af4aa6881ea8de8b296a64164a) ) // Labeled as EVC9.8 - ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff - ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) - ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) - ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) - ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) - ROM_LOAD16_BYTE( "egr6.3.gr6", 0x400000, 0x100000, CRC(f299d818) SHA1(abbb333c43675d34c59201b5d297779cfea8b092) ) // Labeled as EGR6.3 - ROM_LOAD16_BYTE( "egr5.3.gr5", 0x400001, 0x100000, CRC(ebfca07b) SHA1(20465d14b41d99651166f221057737d7b3cc770c) ) // Labeled as EGR5.3 - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) -ROM_END - - -ROM_START( eggventr7 ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "evc8.7.vc8", 0x000000, 0x020000, CRC(99999899) SHA1(e3908600fa711baa7f7562f86498ec7e988a5bea) ) // Labeled as EVC8.7 - ROM_LOAD16_BYTE( "evc9.7.vc9", 0x000001, 0x020000, CRC(1b608155) SHA1(256dd981515d57f806a3770bdc6ff46b9000f7f3) ) // Labeled as EVC9.7 - ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff - ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with 0xff filled 0x20000-0x7ffff - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) - ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) - ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) - ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) - ROM_LOAD16_BYTE( "egr6.3.gr6", 0x400000, 0x100000, CRC(f299d818) SHA1(abbb333c43675d34c59201b5d297779cfea8b092) ) // Labeled as EGR6.3 - ROM_LOAD16_BYTE( "egr5.3.gr5", 0x400001, 0x100000, CRC(ebfca07b) SHA1(20465d14b41d99651166f221057737d7b3cc770c) ) // Labeled as EGR5.3 - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) -ROM_END - -// There is an undumped release 3 when GR5 & GR6 was updated to the .3 versions - -ROM_START( eggventr2 ) // Comes from a PCB with an early serial number EV00123, program roms are 27C040 with required data at 0x7ffe0 in each rom - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "ev_vc8.2.vc8", 0x000000, 0x080000, CRC(ce1da4f7) SHA1(c163041d684dc6a6fab07394e8aac3d82a2ecb52) ) // Labeled as EV VC8.2 - Added "RANK" screen after start button push - ROM_LOAD16_BYTE( "ev_vc9.2.vc9", 0x000001, 0x080000, CRC(4b24906b) SHA1(2e9b85a658cb02d76854f3ee5a071e4161d0d0cf) ) // Labeled as EV VC9.2 - Align guns: game lets you fire 3 shots and starts - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) - ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) - ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) - ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) - ROM_LOAD16_BYTE( "ev_gr6.2.gr6", 0x400000, 0x100000, CRC(a4d9d126) SHA1(d5f2bc4bfa7c0462865907dbc39fc0479340e1c8) ) // Labeled as EV GR6.2 - Replaces Kyle Hodgetts copyright with ICE logo & added 2 Eggs flying planes - ROM_LOAD16_BYTE( "ev_gr5.2.gr5", 0x400001, 0x100000, CRC(b5162234) SHA1(3f05c7eb5b00805eb7fc1e3634dea29b1ce3af62) ) // Labeled as EV GR5.2 - Removed sub title and web site information - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) -ROM_END - - -ROM_START( eggventr1 ) // The original first release as Egg Venture: The Adventures of Egg & Kyle Hodgetts copyright - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "vc-8.vc8", 0x000000, 0x080000, CRC(30a3fb0a) SHA1(e4bcafaf82b10a57513558927ea4f5d26195fc1b) ) // Labeled as VC-8 - Align guns: unlimited shots, player MUST press start - ROM_LOAD16_BYTE( "vc-9.vc9", 0x000001, 0x080000, CRC(65ebf5e8) SHA1(afc72bc1e50a8cc8ef080cc4aea4d75f8c9f3e8d) ) // Labeled as VC-9 - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data, NOTE: Only GR-1 & GR-2 were in the correct GRx PCB locations - ROM_LOAD16_BYTE( "gr-1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) // GR-1 - ROM_LOAD16_BYTE( "gr-2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) // GR-2 - ROM_LOAD16_BYTE( "gr-3.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) // GR-3 - ROM_LOAD16_BYTE( "gr-4.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) // GR-4 - ROM_LOAD16_BYTE( "gr-5.gr6", 0x400000, 0x100000, CRC(8959ad2c) SHA1(4a5c07c5e037696413871c43c7eb056540c5048e) ) // GR-5 - Shows C 1997 KYLE HODGETTS on title screen - ROM_LOAD16_BYTE( "gr-6.gr5", 0x400001, 0x100000, CRC(0d33cc61) SHA1(062c23b6b959f49631cd2666731c39fd3ff7c57d) ) // GR-6 - Sub title "ADVENTURES OF EGG" & VISIT OUR WEB SITE AT "WWWTHEGAMEROOM.COM" (no period after "www") shows after credit - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) -ROM_END - - -ROM_START( eggventra ) // A.L. Australia license - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "egr8.vc8", 0x000000, 0x080000, CRC(a62c4143) SHA1(a21d6b7efdba4965285265426ed79f3249a86685) ) - ROM_LOAD16_BYTE( "egr9.vc9", 0x000001, 0x080000, CRC(bc55bc7a) SHA1(d6e3fc76b4a0a20176af1338a32bb81f0599fdc0) ) - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) - ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) - ROM_LOAD16_BYTE( "egr4.gr4", 0x200000, 0x100000, CRC(4ea5900e) SHA1(20341337ee3c6c22580c52312156b818f4187693) ) - ROM_LOAD16_BYTE( "egr3.gr3", 0x200001, 0x100000, CRC(3f8dfc73) SHA1(83a168069f896ea7e67a97c6d591d09b19d5f486) ) - ROM_LOAD16_BYTE( "egr6.gr6", 0x400000, 0x100000, CRC(0d73dd85) SHA1(d99a95ace89483688bae48021b416fc0a3c531d6) ) - ROM_LOAD16_BYTE( "egr5.gr5", 0x400001, 0x100000, CRC(6d89c4e3) SHA1(613703a3f194af3ed44a58610d99b7dc99382725) ) - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) -ROM_END - - -ROM_START( eggventrd ) // Deluxe version - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "eggdlx.vc8", 0x000000, 0x020000, CRC(8d678842) SHA1(92b18ec903ec8579e7dffb40284987f1d44255b8) ) // Also known to be labeled ED VC 8 - ROM_LOAD16_BYTE( "eggdlx.vc9", 0x000001, 0x020000, CRC(9db3fd23) SHA1(165a12a2d107c93cf216e755596e7457010a8f17) ) // Also known to be labeled ED VC 9 - ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) // Program roms found as 27C010 & 27C040 with data repeated 4 times - ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) // Program roms found as 27C010 & 27C040 with data repeated 4 times - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "egr1.gr1", 0x000000, 0x100000, CRC(f73f80d9) SHA1(6278b45579a256b9576ba6d4f5a15fab26797c3d) ) - ROM_LOAD16_BYTE( "egr2.gr2", 0x000001, 0x100000, CRC(3a9ba910) SHA1(465aa3119af103aa65b25042b3572fdcb9c1887a) ) - ROM_LOAD16_BYTE( "eggdlx.gr4", 0x200000, 0x100000, CRC(cfb1e28b) SHA1(8d535a27158acee893233cf2012b4ab0ffc8dc03) ) // Also known to be labeled ED GR 4 - ROM_LOAD16_BYTE( "eggdlx.gr3", 0x200001, 0x100000, CRC(a7da3891) SHA1(9139c846006bbed4bdb183659a5b40aaa0000708) ) // Also known to be labeled ED GR 3 - ROM_LOAD16_BYTE( "eggdlx.gr6", 0x400000, 0x100000, CRC(97d02e8a) SHA1(6f9532fb031953c1187782b4fce5a0cfaf9461b3) ) // Also known to be labeled ED GR 6 - ROM_LOAD16_BYTE( "eggdlx.gr5", 0x400001, 0x100000, CRC(387d9176) SHA1(9f26f97cab8baeea1d5e4860a8a35a55bdc601e8) ) // Also known to be labeled ED GR 5 - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "eu20.u20", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "eu21.u21", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "eu18.u18", 0x00000, 0x80000, CRC(cca5dba0) SHA1(9c750256f0cc0ed8847db85df061be3b000b0b25) ) -ROM_END - - -ROM_START( franticf ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "cfvc_8.02.vc8", 0x000000, 0x020000, CRC(9c8ff952) SHA1(f5c5b001d12aa7564d106f90ca0c49da4224c84d) ) // AMD 27C010 EPROM - ROM_LOAD16_BYTE( "cfvc_9.02.vc9", 0x000001, 0x020000, CRC(8da38843) SHA1(dd3d1013bea69d2939d11bcbfe6269e89cb3ba77) ) // AMD 27C010 EPROM - ROM_COPY( "maincpu", 0x00000, 0x040000, 0x040000 ) - ROM_COPY( "maincpu", 0x00000, 0x080000, 0x080000 ) - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "cfgr_1.0.gr1", 0x000000, 0x080000, CRC(5a60aca0) SHA1(33ad0a03ab70e29c0dbf2b034498e9fd395eb353) ) // Also known to be labeled "FFCGR 1.0" - ROM_LOAD16_BYTE( "cfgr_2.gr2", 0x000001, 0x080000, CRC(fc44a126) SHA1(54d27c3f5bdea33c72ea5595410178f1e70ac43b) ) - ROM_LOAD16_BYTE( "cfgr_4.gr4", 0x200000, 0x080000, CRC(b3997f9d) SHA1(25d67ee122eb342f3c617fef345a32abe965739e) ) // Also known to be labeled "CF GR 4.00" - ROM_LOAD16_BYTE( "cfgr_3.gr3", 0x200001, 0x080000, CRC(0834b6fe) SHA1(779fb60ce6b1dcdb432c6e3b48864ddb05b73038) ) - ROM_LOAD16_BYTE( "ffgr6.gr6", 0x400000, 0x080000, CRC(41bd31a2) SHA1(9e7b5479b2ae8001ea624a7d53e49cd85fb2984d) ) // Also known to be labeled "FF GR 6.00" - ROM_LOAD16_BYTE( "ffgr5.gr5", 0x400001, 0x080000, CRC(ca8a5e67) SHA1(ec9d74f13c21897a3d36626a2fc0320979aa6a3a) ) // Also known to be labeled "FF GR 5.00" - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "ffu18.u20", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) // known to be labeled either "FFU18" or "FF U18/U20" - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "ffu21.u21", 0x00000, 0x80000, CRC(7d9c85c8) SHA1(6090645d981d56eb8d072d042c0f02114c874137) ) // Also known to be labeled "CFU 21" - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "ffu18.u18", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) // known to be labeled either "FFU18" or "FF U18/U20" -ROM_END - - -ROM_START( franticfa ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "fred_vc-8.vc8", 0x000000, 0x080000, CRC(f7eb92a2) SHA1(c56a0432b8c4fe8522f6dd1e0b60eded3dfc25d2) ) - ROM_LOAD16_BYTE( "fred_vc-9.vc9", 0x000001, 0x080000, CRC(b657b800) SHA1(12649becab0019ea7150b5d797b72b07121c6a3e) ) - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "fred_gr1.gr1", 0x000000, 0x080000, CRC(acb75e63) SHA1(637ec6b7101f34a2bb93be8d0d5eaa800aafd332) ) - ROM_LOAD16_BYTE( "fred_gr2.gr2", 0x000001, 0x080000, CRC(b47c6363) SHA1(0acfd7dc45d21e6e73b5abbc544e7c0fa192c462) ) - ROM_LOAD16_BYTE( "fred_gr4.gr4", 0x200000, 0x080000, CRC(ac63729f) SHA1(dd856d983d85c38a784666105cb2d421bee8e76a) ) - ROM_LOAD16_BYTE( "fred_gr3.gr3", 0x200001, 0x080000, CRC(d7444ecc) SHA1(47b9369fec845e844ffccd121fdde12cb4842ec6) ) - ROM_LOAD16_BYTE( "fred_gr6.gr6", 0x400000, 0x080000, CRC(a0f1c918) SHA1(2004c2081a90ecc940d56f120f6e63190c8897a2) ) - ROM_LOAD16_BYTE( "fred_gr5.gr5", 0x400001, 0x080000, CRC(fcdf73a6) SHA1(081daa1dc6af59ce63b976e059533b23097cedd9) ) - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "fred_u20.u20", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) - - ROM_REGION( 0x80000, "oki2", ROMREGION_ERASE00 ) // sound data - /* Not populated */ - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "fred_u18.u18", 0x00000, 0x80000, CRC(2fb2e5a6) SHA1(8599ec10500016c3486f9078b72cb3bda3381208) ) -ROM_END - - -ROM_START( cclownz ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "cc-v1-vc8.bin", 0x000000, 0x080000, CRC(433fe6ac) SHA1(dea7aede9882ee52be88927418b7395418757d12) ) - ROM_LOAD16_BYTE( "cc-v1-vc9.bin", 0x000001, 0x080000, CRC(9d1b3dae) SHA1(44a97c38bc9685e97721722c67505832fa06b44d) ) - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "cc-gr1.bin", 0x000000, 0x100000, CRC(17c0ab2a) SHA1(f5ec66f4ac3292ef74f6434fe3ef17f9e977e8f6) ) - ROM_LOAD16_BYTE( "cc-gr2.bin", 0x000001, 0x100000, CRC(dead9528) SHA1(195ad9f7da61ecb5a364da92ba837aa3fcb3a347) ) - ROM_LOAD16_BYTE( "cc-gr4.bin", 0x200000, 0x100000, CRC(78cceed8) SHA1(bc8e5bb625072b17a5711402b07a39ea4a87a0f8) ) - ROM_LOAD16_BYTE( "cc-gr3.bin", 0x200001, 0x100000, CRC(af836fee) SHA1(9e32d5030d3bc5ff106242e5d4969b0150b2c516) ) - ROM_LOAD16_BYTE( "cc-gr6.bin", 0x400000, 0x100000, CRC(889d2771) SHA1(3222d7105c3a68e2050f00b07e8d84d57a9f7a19) ) - ROM_LOAD16_BYTE( "cc-gr5.bin", 0x400001, 0x100000, CRC(2a15ef8f) SHA1(3e33cff2657bb1371acf25641080aff2d8da6c05) ) - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "cc-s-u20.bin", 0x00000, 0x80000, CRC(252fc4b5) SHA1(bbc6c3599869f3f46d3df4f3f8d0a8d88d8e0132) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "cc-s-u21.bin", 0x00000, 0x80000, CRC(6c3da4ed) SHA1(f10cbea6e03ada5ac1535041636e96b6224967fa) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "cc-s-u18.bin", 0x00000, 0x80000, CRC(9cdf87af) SHA1(77dfc0bc1d535b5d585071dd4e9deb367003ab2d) ) - - ROM_REGION( 0x80000, "user2", 0 ) // convert these - ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) - ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - /* 25 / 26 are secure? */ -ROM_END - - -ROM_START( ripribit ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "ribbit_vc8_v3.5.vc8", 0x000000, 0x080000, CRC(8ce7f8f2) SHA1(b40b5127a0dc84a44e0283711cc526114e012c09) ) - ROM_LOAD16_BYTE( "ribbit_vc9_v3.5.vc9", 0x000001, 0x080000, CRC(70be27c3) SHA1(61328e51d083b0ffde739711675d19cfe3253244) ) - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "ribbit_gr1_rv2.81.gr1", 0x000000, 0x100000, CRC(e02c79b7) SHA1(75e352424c449cd5cba1057555928d7ee13ab113) ) - ROM_LOAD16_BYTE( "ribbit_gr2_rv2.81.gr2", 0x000001, 0x100000, CRC(09f48db7) SHA1(d0156c6e3d05ff81540c0eeb66e9a5e7fc4d053c) ) - ROM_LOAD16_BYTE( "ribbit_gr4_rv2.81.gr4", 0x200000, 0x100000, CRC(94d0db81) SHA1(aa46c2e5a627cf01c1d57002204ec3419f0d4503) ) - ROM_LOAD16_BYTE( "ribbit_gr3_rv2.81.gr3", 0x200001, 0x100000, CRC(b65e1a36) SHA1(4feb7ea0bec509fa07d27c76e5a3904b8d1690c4) ) - ROM_LOAD16_BYTE( "ribbit_gr6_rv2.81.gr6", 0x400000, 0x100000, CRC(c9ac211b) SHA1(75cbfa0f875da82d510d75ad28b9db0892b3da85) ) - ROM_LOAD16_BYTE( "ribbit_gr5_rv2.81.gr5", 0x400001, 0x100000, CRC(84ae466a) SHA1(4e7b3dc27a46f735ff13a753806b3688f34a64fe) ) - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data (music) - ROM_LOAD( "ribbit_rr_u20.u20", 0x00000, 0x80000, CRC(c345b779) SHA1(418058bbda74727ec99ac375982c9cd2c8bc5c86) ) - - ROM_REGION( 0x80000, "oki2", ROMREGION_ERASE00 ) // sound data - /* Not populated */ - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data (effects) - ROM_LOAD( "ribbit_rr_u18.u18", 0x00000, 0x80000, CRC(badb9cb6) SHA1(716d65b5ff8d3f8ff25ae70426ce318af9a92b7e) ) - - ROM_REGION( 0x80000, "user2", 0 ) // convert these - ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) - ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - /* 25 / 26 are secure? */ -ROM_END - - -ROM_START( ripribita ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "rr_v2-84-vc8.bin", 0x000000, 0x080000, CRC(5ecc432d) SHA1(073062528fbcf63be7e3c6695d60d048430f6e4b) ) - ROM_LOAD16_BYTE( "rr_v2-84-vc9.bin", 0x000001, 0x080000, CRC(d9bae3f8) SHA1(fcf8099ebe170ad5778aaa533bcfd1e5ead46e6b) ) - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "rr-gr1.bin", 0x000000, 0x100000, CRC(e02c79b7) SHA1(75e352424c449cd5cba1057555928d7ee13ab113) ) // Same data, different labels - ROM_LOAD16_BYTE( "rr-gr2.bin", 0x000001, 0x100000, CRC(09f48db7) SHA1(d0156c6e3d05ff81540c0eeb66e9a5e7fc4d053c) ) - ROM_LOAD16_BYTE( "rr-gr4.bin", 0x200000, 0x100000, CRC(94d0db81) SHA1(aa46c2e5a627cf01c1d57002204ec3419f0d4503) ) - ROM_LOAD16_BYTE( "rr-gr3.bin", 0x200001, 0x100000, CRC(b65e1a36) SHA1(4feb7ea0bec509fa07d27c76e5a3904b8d1690c4) ) - ROM_LOAD16_BYTE( "rr-gr6.bin", 0x400000, 0x100000, CRC(c9ac211b) SHA1(75cbfa0f875da82d510d75ad28b9db0892b3da85) ) - ROM_LOAD16_BYTE( "rr-gr5.bin", 0x400001, 0x100000, CRC(84ae466a) SHA1(4e7b3dc27a46f735ff13a753806b3688f34a64fe) ) - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data (music) - ROM_LOAD( "rr-s-u20.bin", 0x00000, 0x80000, CRC(c345b779) SHA1(418058bbda74727ec99ac375982c9cd2c8bc5c86) ) // Same data, different label - - ROM_REGION( 0x80000, "oki2", ROMREGION_ERASE00 ) // sound data - /* Not populated */ - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data (effects) - ROM_LOAD( "rr-s-u18.bin", 0x00000, 0x80000, CRC(badb9cb6) SHA1(716d65b5ff8d3f8ff25ae70426ce318af9a92b7e) ) // Same data, different label - - ROM_REGION( 0x80000, "user2", 0 ) // convert these - ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) - ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - /* 25 / 26 are secure? */ -ROM_END - - -ROM_START( cfarm ) - ROM_REGION16_LE( 0x100000, "maincpu", 0 ) // 34010 code - ROM_LOAD16_BYTE( "cf-v2-vc8.bin", 0x000000, 0x080000, CRC(93bcf145) SHA1(134ac3ee4fd837f56fb0b338289cf03108346539) ) - ROM_LOAD16_BYTE( "cf-v2-vc9.bin", 0x000001, 0x080000, CRC(954421f9) SHA1(bf1faa9b085f066d1e2ff6ee01c468b1c1d945e9) ) - - ROM_REGION16_LE( 0x600000, "gfx", 0 ) // graphics data - ROM_LOAD16_BYTE( "cf-gr1.bin", 0x000000, 0x100000, CRC(2241a06e) SHA1(f07a99372bb951dd345378da212b41cb8204e782) ) - ROM_LOAD16_BYTE( "cf-gr2.bin", 0x000001, 0x100000, CRC(31182263) SHA1(d5d36f9b5d612f681e6aa563831b6704bc05489e) ) - ROM_LOAD16_BYTE( "cf-gr4.bin", 0x200000, 0x100000, CRC(0883a6f2) SHA1(ef259dcdc7b1325f15a98f6c97ecb965b2b6f9b1) ) - ROM_LOAD16_BYTE( "cf-gr3.bin", 0x200001, 0x100000, CRC(572f45d6) SHA1(a48cb6ab16654d5e07e8833e2848802ddc0e2667) ) - ROM_LOAD16_BYTE( "cf-gr6.bin", 0x400000, 0x100000, CRC(8709a62c) SHA1(3691fb055155ae339c78ec8b7f485aa7d576556b) ) - ROM_LOAD16_BYTE( "cf-gr5.bin", 0x400001, 0x100000, CRC(6de18621) SHA1(9e83f8ed3a2999ee4fdca389c5e792c5b1293717) ) - - ROM_REGION( 0x80000, "oki1", 0 ) // sound data - ROM_LOAD( "cf-s-u20.bin", 0x00000, 0x80000, CRC(715a12dd) SHA1(374185b062853f3e2ea069ea53494cbe3d8dd511) ) - - ROM_REGION( 0x80000, "oki2", 0 ) // sound data - ROM_LOAD( "cf-s-u21.bin", 0x00000, 0x80000, CRC(bc27e3d5) SHA1(a25215b8314fe44974e9efe78cdc10de34f7bfba) ) - - ROM_REGION( 0x80000, "oki3", 0 ) // sound data - ROM_LOAD( "cf-s-u18.bin", 0x00000, 0x80000, CRC(63984658) SHA1(5594965c9304850187859ba730aff26001782f0f) ) - - ROM_REGION( 0x80000, "user2", 0 ) // convert these - ROM_LOAD( "vc-12.jed", 0x0000, 0x3f03, CRC(6947ea9e) SHA1(5a418cd04851841a49beeeea274c1441fefde173) ) - ROM_LOAD( "vc-16.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-22.jed", 0x0000, 0x3efb, CRC(e535b16a) SHA1(e2c17c2a42386be957b603d2c2da4f1ac28a4074) ) - ROM_LOAD( "vc-23.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - ROM_LOAD( "vc-24.jed", 0x0000, 0x3efa, CRC(c054cb13) SHA1(1a45548747712112e2457bd933db5ced70dae72e) ) - /* 25 / 26 are secure? */ -ROM_END - - - -/************************************* - * - * Driver-specific initialization - * - *************************************/ - -void lethalj_state::init_ripribit() -{ - m_maincpu->space(AS_PROGRAM).install_write_handler(0x04100010, 0x0410001f, write16smo_delegate(*this, FUNC(lethalj_state::ripribit_control_w))); -} - - -void lethalj_state::init_cfarm() -{ - m_maincpu->space(AS_PROGRAM).install_write_handler(0x04100010, 0x0410001f, write16smo_delegate(*this, FUNC(lethalj_state::cfarm_control_w))); -} - - -void lethalj_state::init_cclownz() -{ - m_maincpu->space(AS_PROGRAM).install_write_handler(0x04100010, 0x0410001f, write16smo_delegate(*this, FUNC(lethalj_state::cclownz_control_w))); -} - - - -/************************************* - * - * Game drivers - * - *************************************/ - -GAME( 1996, lethalj, 0, lethalj, lethalj, lethalj_state, empty_init, ROT0, "The Game Room", "Lethal Justice (Version 2.3)", 0 ) -GAME( 1998, franticf, 0, gameroom, franticf, lethalj_state, empty_init, ROT0, "ICE", "Frantic Fred (Release 2)", MACHINE_NOT_WORKING ) /* manual states (C) 1998 Innovative Concepts in Entertainment, Inc. */ -GAME( 1996, franticfa, franticf, gameroom, franticfa, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Frantic Fred", MACHINE_NOT_WORKING ) -GAME( 1997, eggventr, 0, gameroom, eggventr, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 10)", 0 ) -GAME( 1997, eggventr8, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 8)", 0 ) -GAME( 1997, eggventr7, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 7)", 0 ) -GAME( 1997, eggventr2, eggventr, gameroom, eggventr2, lethalj_state, empty_init, ROT0, "ICE / The Game Room", "Egg Venture (Release 2)", 0 ) -GAME( 1997, eggventr1, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "Kyle Hodgetts / The Game Room", "Egg Venture (Release 1)", 0 ) -GAME( 1997, eggventra, eggventr, gameroom, eggventr, lethalj_state, empty_init, ROT0, "The Game Room (A.L. Australia license)", "Egg Venture (A.L. Release)", 0 ) -GAME( 1997, eggventrd, eggventr, gameroom, eggvntdx, lethalj_state, empty_init, ROT0, "The Game Room", "Egg Venture Deluxe", 0 ) -GAME( 1997, ripribit, 0, gameroom, ripribit, lethalj_state, init_ripribit, ROT0, "LAI Games", "Ripper Ribbit (Version 3.5)", 0 ) -GAME( 1997, ripribita, ripribit, gameroom, ripribit, lethalj_state, init_ripribit, ROT0, "LAI Games", "Ripper Ribbit (Version 2.8.4)", 0 ) -GAME( 1999, cfarm, 0, gameroom, cfarm, lethalj_state, init_cfarm, ROT90, "LAI Games", "Chicken Farm (Version 2.0)", 0 ) -GAME( 1999, cclownz, 0, gameroom, cclownz, lethalj_state, init_cclownz, ROT0, "LAI Games", "Crazzy Clownz (Version 1.0)", 0 ) diff --git a/src/mame/misc/lethalj.h b/src/mame/misc/lethalj.h deleted file mode 100644 index c699c386a63..00000000000 --- a/src/mame/misc/lethalj.h +++ /dev/null @@ -1,84 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Aaron Giles -/************************************************************************* - - The Game Room Lethal Justice hardware - -**************************************************************************/ -#ifndef MAME_INCLUDES_LETHALJ_H -#define MAME_INCLUDES_LETHALJ_H - -#pragma once - -#include "cpu/tms34010/tms34010.h" -#include "machine/ticket.h" -#include "screen.h" - - -class lethalj_state : public driver_device -{ -public: - lethalj_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_screen(*this, "screen"), - m_ticket(*this, "ticket"), - m_blitter_base(*this, "gfx"), - m_paddle(*this, "PADDLE"), - m_light0_x(*this, "LIGHT0_X"), - m_light0_y(*this, "LIGHT0_Y"), - m_light1_x(*this, "LIGHT1_X"), - m_light1_y(*this, "LIGHT1_Y"), - m_lamps(*this, "lamp%u", 0U) - { } - - void lethalj(machine_config &config); - void gameroom(machine_config &config); - - void init_cfarm(); - void init_ripribit(); - void init_cclownz(); - - DECLARE_CUSTOM_INPUT_MEMBER(cclownz_paddle); - -private: - void ripribit_control_w(uint16_t data); - void cfarm_control_w(uint16_t data); - void cclownz_control_w(uint16_t data); - uint16_t lethalj_gun_r(offs_t offset); - void blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void do_blit(); - inline void get_crosshair_xy(int player, int *x, int *y); - TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_update); - - void lethalj_map(address_map &map); - - virtual void machine_start() override { m_lamps.resolve(); } - virtual void video_start() override; - - TIMER_CALLBACK_MEMBER(gen_ext1_int); - - required_device m_maincpu; - required_device m_screen; - required_device m_ticket; - - required_region_ptr m_blitter_base; - - optional_ioport m_paddle; - optional_ioport m_light0_x; - optional_ioport m_light0_y; - optional_ioport m_light1_x; - optional_ioport m_light1_y; - output_finder<3> m_lamps; - - emu_timer *m_gen_ext1_int_timer = nullptr; - uint16_t m_blitter_data[8]{}; - std::unique_ptr m_screenram; - uint8_t m_vispage = 0; - int m_blitter_rows = 0; - uint16_t m_gunx = 0; - uint16_t m_guny = 0; - uint8_t m_blank_palette = 0; -}; - -#endif // MAME_INCLUDES_LETHALJ_H diff --git a/src/mame/misc/lethalj_v.cpp b/src/mame/misc/lethalj_v.cpp deleted file mode 100644 index d3363b2456c..00000000000 --- a/src/mame/misc/lethalj_v.cpp +++ /dev/null @@ -1,203 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Aaron Giles -/*************************************************************************** - - The Game Room Lethal Justice hardware - -***************************************************************************/ - -#include "emu.h" -#include "lethalj.h" - - -#define BLITTER_SOURCE_WIDTH 1024 -#define BLITTER_DEST_WIDTH 512 -#define BLITTER_DEST_HEIGHT 512 - - -/************************************* - * - * Compute X/Y coordinates - * - *************************************/ - -inline void lethalj_state::get_crosshair_xy(int player, int *x, int *y) -{ - const rectangle &visarea = m_screen->visible_area(); - int width = visarea.width(); - int height = visarea.height(); - - if (player) - { - *x = ((m_light1_x.read_safe(0) & 0xff) * width) / 255; - *y = ((m_light1_y.read_safe(0) & 0xff) * height) / 255; - } - else - { - *x = ((m_light0_x.read_safe(0) & 0xff) * width) / 255; - *y = ((m_light0_y.read_safe(0) & 0xff) * height) / 255; - } -} - - - -/************************************* - * - * Gun input handling - * - *************************************/ - -uint16_t lethalj_state::lethalj_gun_r(offs_t offset) -{ - uint16_t result = 0; - int beamx, beamy; - - switch (offset) - { - case 4: - case 5: - /* latch the crosshair position */ - get_crosshair_xy(offset - 4, &beamx, &beamy); - m_gunx = beamx; - m_guny = beamy; - m_blank_palette = 1; - break; - - case 6: - result = m_gunx / 2; - break; - - case 7: - result = m_guny + 4; - break; - } -/* logerror("%s:lethalj_gun_r(%d) = %04X\n", machine().describe_context(), offset, result); */ - return result; -} - - - -/************************************* - * - * video startup - * - *************************************/ - -void lethalj_state::video_start() -{ - /* allocate video RAM for screen */ - m_screenram = std::make_unique(BLITTER_DEST_WIDTH * BLITTER_DEST_HEIGHT); - - /* predetermine blitter info */ - m_blitter_rows = m_blitter_base.length() / BLITTER_SOURCE_WIDTH; - - m_gen_ext1_int_timer = timer_alloc(FUNC(lethalj_state::gen_ext1_int), this); - - m_vispage = 0; -} - - - -/************************************* - * - * Memory maps - * - *************************************/ - -TIMER_CALLBACK_MEMBER(lethalj_state::gen_ext1_int) -{ - m_maincpu->set_input_line(0, ASSERT_LINE); -} - - -void lethalj_state::do_blit() -{ - int dsty = (int16_t)m_blitter_data[1]; - int srcx = (uint16_t)m_blitter_data[2]; - int srcy = (uint16_t)(m_blitter_data[3] + 1); - int width = (uint16_t)m_blitter_data[5]; - int dstx = (int16_t)m_blitter_data[6]; - int height = (uint16_t)m_blitter_data[7]; - int y; -/* - logerror("blitter data = %04X %04X %04X %04X %04X %04X %04X %04X\n", - m_blitter_data[0], m_blitter_data[1], m_blitter_data[2], m_blitter_data[3], - m_blitter_data[4], m_blitter_data[5], m_blitter_data[6], m_blitter_data[7]); -*/ - /* loop over Y coordinates */ - for (y = 0; y <= height; y++, srcy++, dsty++) - { - /* clip in Y */ - if (dsty >= 0 && dsty < BLITTER_DEST_HEIGHT/2) - { - uint16_t *source = m_blitter_base + ((srcy % m_blitter_rows) << 10); - uint16_t *dest = m_screenram.get() + ((dsty + ((m_vispage ^ 1) << 8)) << 9); - int sx = srcx; - int dx = dstx; - int x; - - /* loop over X coordinates */ - for (x = 0; x <= width; x++, sx++, dx++) - { - dx &= 0x1ff; - - int pix = source[sx & 0x3ff]; - if (pix) - dest[dx] = pix; - - } - } - } -} - - -void lethalj_state::blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - /* combine the data */ - COMBINE_DATA(&m_blitter_data[offset]); - - /* blit on a write to offset 7, and signal an IRQ */ - if (offset == 7) - { - if (m_blitter_data[6] == 2 && m_blitter_data[7] == 2) - m_vispage ^= 1; - else - do_blit(); - - m_gen_ext1_int_timer->adjust(attotime::from_hz(XTAL(32'000'000)) * ((m_blitter_data[5] + 1) * (m_blitter_data[7] + 1))); - } - - /* clear the IRQ on offset 0 */ - else if (offset == 0) - m_maincpu->set_input_line(0, CLEAR_LINE); -} - - - -/************************************* - * - * video update - * - *************************************/ - -TMS340X0_SCANLINE_IND16_CB_MEMBER(lethalj_state::scanline_update) -{ - uint16_t const *const src = &m_screenram[(m_vispage << 17) | ((params->rowaddr << 9) & 0x3fe00)]; - uint16_t *const dest = &bitmap.pix(scanline); - int coladdr = params->coladdr << 1; - - /* blank palette: fill with white */ - if (m_blank_palette) - { - for (int x = params->heblnk; x < params->hsblnk; x++) - dest[x] = 0x7fff; - if (scanline == screen.visible_area().max_y) - m_blank_palette = 0; - } - else - { - /* copy the non-blanked portions of this scanline */ - for (int x = params->heblnk; x < params->hsblnk; x++) - dest[x] = src[coladdr++ & 0x1ff] & 0x7fff; - } -} diff --git a/src/mame/misc/schexx4gen.cpp b/src/mame/misc/schexx4gen.cpp deleted file mode 100644 index 2c0f8cdaa1f..00000000000 --- a/src/mame/misc/schexx4gen.cpp +++ /dev/null @@ -1,54 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders: -/**************************************************************************** - - Skeleton driver for 4th Generation "Super Chexx" bubble jockey - electromechanical machines - -****************************************************************************/ - -#include "emu.h" -#include "cpu/mc68hc11/mc68hc11.h" - -namespace { - -class schexx_state : public driver_device -{ - -public: - schexx_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - { - } - - void schexx(machine_config &config); - -private: - void mem_map(address_map &map); - - required_device m_maincpu; -}; - -void schexx_state::mem_map(address_map &map) -{ - map(0xe000, 0xffff).rom().region("program", 0x7e000); -} - -INPUT_PORTS_START(schexx) -INPUT_PORTS_END - -void schexx_state::schexx(machine_config &config) -{ - MC68HC11A1(config, m_maincpu, 8_MHz_XTAL); - m_maincpu->set_addrmap(AS_PROGRAM, &schexx_state::mem_map); -} - -ROM_START(schexx) - ROM_REGION(0x80000, "program", 0) - ROM_LOAD("schexx1_2_040.u4", 0x0000, 0x80000, CRC(8cbb7172) SHA1(ba59f7d8dd7e08c837181e18ce15e3c976f8f00b)) -ROM_END - -} // Anonymous namespace - -GAME(1996, schexx, 0, schexx, schexx, schexx_state, empty_init, ROT0, "ICE", "Super Chexx (EM Bubble Hockey)", MACHINE_IS_SKELETON_MECHANICAL) diff --git a/src/mame/misc/vp101.cpp b/src/mame/misc/vp101.cpp deleted file mode 100644 index 8a88b3a9431..00000000000 --- a/src/mame/misc/vp101.cpp +++ /dev/null @@ -1,662 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:R. Belmont -/*************************************************************************** - - Play Mechanix / Right Hand Tech "VP50", "VP100" and "VP101" platforms - (PCBs are also marked "Raw Thrills" but all RT games appear to be on PC hardware) - - Boards: - - VP101: Johnny Nero. The original (?) - - VP100: Special Forces Elite Training. A not-quite-complete VP101; missing ATA DMA. - - VP50 : Zoofari. Cost-reduced (?) with TX4925 SoC, much less complex FPGA. - : Rhythm Nation. - - Preliminary driver by R. Belmont - - TODO: - - All games: that formidable sounding 3D accelerator mentioned below. - - All games: the sound system (the POST plays some example sounds) - - Zoofari's framebuffer is 256 color but I don't know where the CLUT comes from. - - To make the games go into a POST test, hold down START 1 while resetting. - - VP101 Features from http://web.archive.org/web/20041016000248/http://www.righthandtech.com/projects.htm - - MIPS VR5500 CPU - The VR5500 operates at either at 300 or 400 MHz with 120MHz external bus - MIPS 64-bit RISC architecture - Two-way super-scalar super pipeline - On-chip floating-point unit (FPU) - High-speed translation look-aside buffer (TLB)(48 double-entries) - On-chip primary cache memory (instruction/data: 32 KB each) - 2-way set associative, Supports line lock feature - Conforms to MIPS I, II, III, and IV instruction sets. Also supports product-sum operation instruction, rotate instruction, register scan instruction - Six execution units (ALU0, ALU1, FPU, FPU/MAC, BRU, and LSU) - Employment of out-of-order execution mechanism - Branch prediction mechanism - Branch history table with 4K entries - Support for CPU emulator connection via JTAG/n-Wire port - - Unified Memory Architecture - DDR SDRAM bank - Arbitrating DDR SDRAM Memory controller - 128Mbyte to 512Mbyte memory capacity - 120/240 MHz @ 64 bits - ~2GBytes/sec bandwidth - - 3D Render Engine - True color and 8-bit palette lookup textures - 8K byte texel cache for accelerated source texel selection. - Perspective corrected rendering - Bi-linear filter for source texel scaling - 256 Color Palette Lookup (888 RGB plus 8 bit Source Palette Alpha) - True Color Source Textures (888 RGB plus 8 bit Alpha) - 24 bit Z-buffer structure in DDR SDRAM buffer - Per-vertex colored lighting - Alpha channel structure in DDR SDRAM buffer - Pixel processing effects (fog, night, etc.) - 888 RGB Video DAC output section. - Bitmap structure in DDR SDRAM with DMA for screen update - Flexible CRT controller with X/Y gun interface counters - - Game I/O - Standard JAMMA I/O interface, including player 3 and 4 connectors - 4 channel general purpose A to D interface (steering wheel and control pedals) - 100baseT Ethernet interface for debugging and/or inter game communications - Forced-feedback “Wheel Driver Interface” for driving games - High-current drivers for lamps or solenoids - Gun interface I/O tightly coupled to the CRT controller - - Sound System - AC97 codec for low cost of implementation and development - TDA7375 40 Watt Integrated Amplifier - Codec fed from the DDR bank via a 16 channel (8 channels of stereo) DMA engine. - - ATA/IDE Disk Drive Interface - Standard ATA/IDE interface - Ultra DMA 33/66/100/133 to the DDR SDRAM memory - - Video DAC - RGB values at 8 bits per color - RGB voltage level adjustable from 0-1.0 Vp-p to 0-4.0 Vp-p - - Flash Memory - Minimum of 1MB of Flash memory – expandable to 4 MB - Updateable Boot ROM - Updateable FPGA configuration - - Battery Backed Up RAM - 32K bytes of non-volatile memory for static game configuration and high score table - Non-volatile Real-Time clock - - Small Footprint - Small outline design for easy kit retrofitting of existing cabinet - 12.2 in x 14.96 in - - Security Interface - Security processor provides for a means to “unlock” the FPGA functions - Enabled for software protection against piracy and unwarranted game updates - -Full populated and tested board is less than $500, including IDE hard disk. -Small outline design for easy kit retrofitting of existing cabinets. - -****************************************************************************/ - -#include "emu.h" -#include "cpu/mips/mips3.h" -#include "bus/ata/ataintf.h" -#include "machine/nvram.h" -#include "imagedev/harddriv.h" -#include "screen.h" - -#define VERBOSE (0) -#include "logmacro.h" - -class vp10x_state : public driver_device -{ -public: - vp10x_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_mainram(*this, "mainram"), - m_ata(*this, "ata") - { } - - void vp50(machine_config &config); - void vp101(machine_config &config); - -private: - virtual void machine_reset() override; - virtual void machine_start() override; - - uint32_t tty_ready_r(); - void tty_w(uint32_t data); - uint32_t test_r(); - uint32_t sound_r(offs_t offset); - void sound_w(offs_t offset, uint32_t data); - void fb_base_w(uint32_t data); - uint32_t video_r(offs_t offset); - void video_w(offs_t offset, uint32_t data); - uint32_t video2_r(offs_t offset); - void video2_w(offs_t offset, uint32_t data); - - uint32_t pic_r(); - void pic_w(uint32_t data); - - void dmaaddr_w(uint32_t data); - - DECLARE_WRITE_LINE_MEMBER(dmarq_w); - - uint32_t tty_4925_rdy_r() { return 0x2; } - - uint32_t spi_status_r() { return 0x8007; } - - uint32_t spi_r(); - void spi_w(uint32_t data); - - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - uint32_t vp50_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - - void main_map(address_map &map); - void vp50_map(address_map &map); - - // devices - required_device m_maincpu; - required_shared_ptr m_mainram; - required_device m_ata; - - // driver_device overrides - virtual void video_start() override; - int pic_cmd = 0; - int pic_state = 0; - int m_dmarq_state = 0; - uint32_t m_dma_ptr = 0U; - uint32_t m_spi_select = 0U; - uint32_t m_unk_sound_toggle = 0U; - uint32_t m_sound_cmd = 0U; - uint32_t m_fb_base = 0U; -}; - -void vp10x_state::machine_reset() -{ - m_dmarq_state = 0; - pic_cmd = pic_state = 0; -} - -void vp10x_state::machine_start() -{ - m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS | MIPS3DRC_DISABLE_INTRABLOCK); -// m_maincpu->add_fastram(0x00000000, 0x03ffffff, false, m_mainram); -} - -uint32_t vp10x_state::test_r() -{ - LOG("%s: test_r\n", machine().describe_context()); - return 0xffffffff; -} - -void vp10x_state::dmaaddr_w(uint32_t data) -{ - LOG("%s: dmaaddr_w: %08x\n", machine().describe_context(), data); - m_dma_ptr = (data & 0x07ffffff); -} - -WRITE_LINE_MEMBER(vp10x_state::dmarq_w) -{ - if (state != m_dmarq_state) - { - m_dmarq_state = state; - - if (state) - { - uint16_t *RAMbase = (uint16_t *)&m_mainram[0]; - uint16_t *RAM = &RAMbase[m_dma_ptr>>1]; - - m_ata->write_dmack(ASSERT_LINE); - - while (m_dmarq_state) - { - *RAM++ = m_ata->read_dma(); - m_dma_ptr += 2; // pointer must advance - } - - m_ata->write_dmack(CLEAR_LINE); - } - } -} - -uint32_t vp10x_state::pic_r() -{ - static const uint8_t vers[5] = { 0x00, 0x01, 0x00, 0x00, 0x00 }; - static const uint8_t serial[10] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a }; - static const uint8_t magic[10] = { 0xaa, 0x55, 0x18, 0x18, 0xc0, 0x03, 0xf0, 0x0f, 0x09, 0x0a }; - - switch (pic_cmd) - { - case 0x20: - return vers[pic_state++]; - - case 0x21: - case 0x22: - return serial[pic_state++]; - - case 0x23: // this is the same for jnero and specfrce. great security! - return magic[pic_state++]; - } - - return 0; -} - -void vp10x_state::pic_w(uint32_t data) -{ - LOG("%s: pic_w: %08x\n", machine().describe_context(), data); - if ((data & 0xff) == 0) - { - return; - } - pic_cmd = data & 0xff; - pic_state = 0; -} - -uint32_t vp10x_state::spi_r() -{ - LOG("%s: spi_r\n", machine().describe_context()); - return 0xffffffff; -} - -void vp10x_state::spi_w(uint32_t data) -{ - LOG("%s: spi_w: %08x\n", machine().describe_context(), data); - m_spi_select = data; -} - -void vp10x_state::video_start() -{ -} - -uint32_t vp10x_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - for (int y = 0; y < 240; y++) - { - uint32_t *line = &bitmap.pix(y); - const uint32_t *video_ram = (const uint32_t *) &m_mainram[(m_fb_base/4) + (y * (0x1000/4)) + 4]; - - for (int x = 0; x < 320; x++) - { - uint32_t word = *(video_ram++); - video_ram++; - *line++ = word; - } - } - - if (machine().input().code_pressed_once(KEYCODE_R)) - m_maincpu->set_input_line(MIPS3_IRQ0, ASSERT_LINE); - if (machine().input().code_pressed_once(KEYCODE_T)) - m_maincpu->set_input_line(MIPS3_IRQ1, ASSERT_LINE); - if (machine().input().code_pressed_once(KEYCODE_Y)) - m_maincpu->set_input_line(MIPS3_IRQ2, ASSERT_LINE); - if (machine().input().code_pressed_once(KEYCODE_U)) - m_maincpu->set_input_line(MIPS3_IRQ3, ASSERT_LINE); - if (machine().input().code_pressed_once(KEYCODE_I)) - m_maincpu->set_input_line(MIPS3_IRQ4, ASSERT_LINE); - return 0; -} - -// TODO: Palette is not at 0, where is it? -uint32_t vp10x_state::vp50_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - const uint16_t *pal_ram = (const uint16_t *) &m_mainram[0]; - - for (int y = 0; y < 240; y++) - { - uint32_t *line = &bitmap.pix(y); - const uint8_t *video_ram = (const uint8_t *) &m_mainram[(0x10000/4)+(y * 100)]; - - for (int x = 0; x < 400; x++) - { - // assume 565 - int r = pal_ram[video_ram[x]] >> 11; - int g = (pal_ram[video_ram[x]] >> 5) & 0x3f; - int b = pal_ram[video_ram[x]] & 0x1f; - - *line++ = (r << 19) | (g << 10) | (b << 3); - } - } - return 0; -} - -uint32_t vp10x_state::tty_ready_r() -{ - LOG("%s: tty_ready_r\n", machine().describe_context()); - return 0x60; // must return &0x20 for output at tty_w to continue -} - -void vp10x_state::tty_w(uint32_t data) // set breakpoint at bfc01430 to catch when it's printing things -{ -// uncomment to see startup messages - it says "RAM OK" and "EPI RSS Ver 4.5.1" followed by "" and then lots of dots -// Special Forces also says " = 00000032" - if (data >= 0x20 || data == 0x09) - printf("%c", data); - else if (data == 0x0d) - printf("\n"); -} - -uint32_t vp10x_state::video_r(offs_t offset) -{ - uint32_t data = 0; - if (offset == (0x10 >> 2)) - { - data = 0xffffffff; - } - LOG("%s: video_r %08x: %08x\n", machine().describe_context(), 0x1a000000 + (offset << 2), data); - return data; -} - -void vp10x_state::video_w(offs_t offset, uint32_t data) -{ - LOG("%s: video_w %08x = %08x\n", machine().describe_context(), 0x1a000000 + (offset << 2), data); -} - -uint32_t vp10x_state::video2_r(offs_t offset) -{ - uint32_t data = machine().rand(); - //LOG("%s: video2_r %08x: %08x\n", machine().describe_context(), 0x1a800000 + (offset << 2), data); - return data; -} - -void vp10x_state::video2_w(offs_t offset, uint32_t data) -{ - //LOG("%s: video2_w %08x = %08x\n", machine().describe_context(), 0x1a800000 + (offset << 2), data); -} - -void vp10x_state::fb_base_w(uint32_t data) -{ - m_fb_base = data & 0x07ffffff; -} - -uint32_t vp10x_state::sound_r(offs_t offset) -{ - switch (offset) - { - case 0: - LOG("%s: sound_r: hardware flags(?): 11000000 = %08x\n", machine().describe_context(), 1 << 4); - return (1 << 4); // Flag that sound hardware is initialized - case 3: - { - uint32_t cmd_return = 0; - bool known = true; - switch (m_sound_cmd) - { - case 0xa6: - cmd_return = 0x0000000e; - break; - case 0xfc: - cmd_return = 0x00004352; // Some sort of info request? Looks like ASCII, 'CR' - codec is from Crystal Semi? - break; - default: - known = false; - break; - } - if (known) - { - LOG("%s: sound_r: sound command return value(?): 11000004 = %08x for cmd %02x\n", machine().describe_context(), cmd_return, m_sound_cmd); - } - else - { - LOG("%s: sound_r: sound command return value(?): 11000004 = %08x for unknown cmd %02x\n", machine().describe_context(), cmd_return, m_sound_cmd); - } - return cmd_return; - } - case 4: - m_unk_sound_toggle ^= 1; - LOG("%s: sound_r: unknown: 11000010 = %08x\n", machine().describe_context(), m_unk_sound_toggle); - return m_unk_sound_toggle; // Unknown - default: - LOG("%s: sound_r: %08x\n", machine().describe_context(), 0x11000000 | (offset << 2)); - return 0; - } -} - -void vp10x_state::sound_w(offs_t offset, uint32_t data) -{ - switch (offset) - { - case 1: - LOG("%s: sound_w: command(?): 11000004 = %08x\n", machine().describe_context(), data); - m_sound_cmd = data; - return; - default: - LOG("%s: sound_w: %08x = %08x\n", machine().describe_context(), 0x11000000 | (offset << 2), data); - return; - } -} - -void vp10x_state::main_map(address_map &map) -{ - map(0x00000000, 0x07ffffff).ram().share("mainram"); - map(0x11000000, 0x11000013).rw(FUNC(vp10x_state::sound_r), FUNC(vp10x_state::sound_w)); - map(0x14000000, 0x14000003).r(FUNC(vp10x_state::test_r)); - map(0x18000010, 0x18000013).w(FUNC(vp10x_state::fb_base_w)); - map(0x1a000000, 0x1a000013).rw(FUNC(vp10x_state::video_r), FUNC(vp10x_state::video_w)); - map(0x1a800000, 0x1a800003).rw(FUNC(vp10x_state::video2_r), FUNC(vp10x_state::video2_w)); - map(0x1c000000, 0x1c000003).w(FUNC(vp10x_state::tty_w)); // RSS OS code uses this one - map(0x1c000014, 0x1c000017).r(FUNC(vp10x_state::tty_ready_r)); - map(0x1c400000, 0x1c400003).w(FUNC(vp10x_state::tty_w)); // boot ROM code uses this one - map(0x1c400014, 0x1c400017).r(FUNC(vp10x_state::tty_ready_r)); - map(0x1ca00000, 0x1ca00003).portr("GUNX"); - map(0x1ca00004, 0x1ca00007).portr("GUNY"); - map(0x1ca00008, 0x1ca0000b).portr("GUNBUTTONS"); - map(0x1ca0000c, 0x1ca0000f).portr("BUTTONS"); - map(0x1ca00010, 0x1ca00013).portr("DIPS"); - map(0x1cf00000, 0x1cf00003).noprw().nopr(); - map(0x1d000030, 0x1d000033).w(FUNC(vp10x_state::dmaaddr_w)); // ATA DMA destination address - map(0x1d000040, 0x1d00005f).rw(m_ata, FUNC(ata_interface_device::cs0_r), FUNC(ata_interface_device::cs0_w)).umask32(0x0000ffff); - map(0x1d000060, 0x1d00007f).rw(m_ata, FUNC(ata_interface_device::cs1_r), FUNC(ata_interface_device::cs1_w)).umask32(0x0000ffff); - - map(0x1f200000, 0x1f200003).rw(FUNC(vp10x_state::pic_r), FUNC(vp10x_state::pic_w)); - map(0x1f807000, 0x1f807fff).ram().share("nvram"); - map(0x1fc00000, 0x1fffffff).rom().region("maincpu", 0); -} - -void vp10x_state::vp50_map(address_map &map) -{ - map(0x00000000, 0x03ffffff).ram().share("mainram"); - map(0x1f000010, 0x1f00001f).rw(m_ata, FUNC(ata_interface_device::cs1_r), FUNC(ata_interface_device::cs1_w)); - map(0x1f000020, 0x1f00002f).rw(m_ata, FUNC(ata_interface_device::cs0_r), FUNC(ata_interface_device::cs0_w)); - map(0x1f400000, 0x1f400003).noprw(); // FPGA bitstream download? - map(0x1f400800, 0x1f400bff).ram().share("nvram"); - map(0x1fc00000, 0x1fffffff).rom().region("maincpu", 0); - - // TX4925 peripherals - map(0xff1ff40c, 0xff1ff40f).r(FUNC(vp10x_state::tty_4925_rdy_r)); - map(0xff1ff41c, 0xff1ff41f).w(FUNC(vp10x_state::tty_w)); - map(0xff1ff500, 0xff1ff503).noprw(); - map(0xff1ff814, 0xff1ff817).r(FUNC(vp10x_state::spi_status_r)); - map(0xff1ff818, 0xff1ff81b).rw(FUNC(vp10x_state::spi_r), FUNC(vp10x_state::spi_w)); -} - -static INPUT_PORTS_START( jnero ) - PORT_START("GUNX") - PORT_BIT( 0x1ff, 0x000, IPT_LIGHTGUN_X ) PORT_MINMAX(0x000, 0x1ff) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) - - PORT_START("GUNY") - PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_Y ) PORT_MINMAX(0x00, 0xff) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) - - PORT_START("GUNBUTTONS") - PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("Trigger") - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("Sense") - PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("Pump") - PORT_BIT( 0x00000010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("Trigger") - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("Sense") - PORT_BIT( 0x00000040, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_NAME("Pump") - PORT_BIT( 0xffffff88, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("BUTTONS") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 ) - PORT_BIT (0x00000040, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_BIT (0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 ) - PORT_BIT (0x00001000, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) - PORT_BIT (0x00002000, IP_ACTIVE_LOW, IPT_VOLUME_UP ) - PORT_BIT( 0xffffcf30, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("DIPS") - PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Test ) ) - PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_BIT( 0xffffefaf, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x00001040, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - -static INPUT_PORTS_START( specfrce ) - PORT_START("GUNX") - PORT_BIT( 0x1ff, 0x000, IPT_LIGHTGUN_X ) PORT_MINMAX(0x000, 0x1ff) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) - - PORT_START("GUNY") - PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_Y ) PORT_MINMAX(0x00, 0xff) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) - - PORT_START("GUNBUTTONS") - PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Trigger") - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Sense") - PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Pump") - PORT_BIT( 0xfffffff8, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("BUTTONS") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT (0x00000040, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_BIT (0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 ) - PORT_BIT (0x00001000, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) - PORT_BIT (0x00002000, IP_ACTIVE_LOW, IPT_VOLUME_UP ) - PORT_BIT( 0xffffcf38, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("DIPS") - PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Test ) ) - PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_BIT( 0xffffefaf, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x00001040, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - -static INPUT_PORTS_START( vp50 ) - PORT_START("IN0") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 ) - PORT_BIT( 0xfffffff0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) - - PORT_START("IN1") - PORT_BIT( 0xffffffff, IP_ACTIVE_HIGH, IPT_UNKNOWN ) -INPUT_PORTS_END - -void vp10x_state::vp101(machine_config &config) -{ - VR5500LE(config, m_maincpu, 400000000); - m_maincpu->set_dcache_size(32768); - m_maincpu->set_system_clock(100000000); - m_maincpu->set_addrmap(AS_PROGRAM, &vp10x_state::main_map); - - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ - screen.set_screen_update(FUNC(vp10x_state::screen_update)); - screen.set_size(320, 240); - screen.set_visarea(0, 319, 0, 239); - - ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, false); - m_ata->dmarq_handler().set(FUNC(vp10x_state::dmarq_w)); - - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); -} - -void vp10x_state::vp50(machine_config &config) -{ - TX4925LE(config, m_maincpu, 200000000); - m_maincpu->set_dcache_size(32768); - m_maincpu->set_system_clock(100000000); - m_maincpu->set_addrmap(AS_PROGRAM, &vp10x_state::vp50_map); - - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ - screen.set_screen_update(FUNC(vp10x_state::vp50_screen_update)); - screen.set_size(400, 240); - screen.set_visarea(0, 399, 0, 239); - - ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, false); - - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); -} - -ROM_START(jnero) - ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ - ROM_LOAD( "d710.05523.bin", 0x000000, 0x100000, CRC(6054a066) SHA1(58e68b7d86e6f24c79b99c8406e86e3c14387726) ) - - ROM_REGION(0x80000, "pic", 0) /* PIC18c422 program - read-protected, need dumped */ - ROM_LOAD( "8722a-1206.bin", 0x000000, 0x80000, NO_DUMP ) - - DISK_REGION( "ata:0:hdd:image" ) /* ideally an IDENTIFY page from a real drive should be the IDTN metadata, - but even factory-new boardsets came with a variety of HDD makes and models */ - DISK_IMAGE_READONLY("jn010108", 0, SHA1(5a27990478b65fca801c3a6518c519c5b4ca934d) ) -ROM_END - -ROM_START(specfrce) - ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ - ROM_SYSTEM_BIOS(0, "default", "rev. 3.6") - ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(0) ) - ROM_SYSTEM_BIOS(1, "r35", "rev. 3.5") - ROMX_LOAD( "special_forces_boot_v3.5.u4", 0x000000, 0x100000, CRC(ae8dfdf0) SHA1(d64130e710d0c70095ad8ebd4e2194b8c461be4a), ROM_BIOS(1) ) /* Newer, but keep both in driver */ - ROM_SYSTEM_BIOS(2, "r34", "rev. 3.4") - ROMX_LOAD( "special_forces_boot_v3.4.u4", 0x000000, 0x100000, CRC(db4862ac) SHA1(a1e886d424cf7d26605e29d972d48e8d44ae2d58), ROM_BIOS(2) ) - - ROM_REGION(0x80000, "pic", 0) /* PIC18c422 I/P program - read-protected, need dumped */ - ROM_LOAD( "special_forces_et_u7_rev1.2.u7", 0x000000, 0x80000, NO_DUMP ) - - DISK_REGION( "ata:0:hdd:image" ) - DISK_IMAGE_READONLY("sf010200", 0, SHA1(33c35fd5e110ff06330e0f0313fcd75d5c64a090) ) -ROM_END - -ROM_START(specfrceo) - ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ - ROM_SYSTEM_BIOS(0, "default", "rev. 3.6") - ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(0) ) - ROM_SYSTEM_BIOS(1, "r35", "rev. 3.5") - ROMX_LOAD( "special_forces_boot_v3.5.u4", 0x000000, 0x100000, CRC(ae8dfdf0) SHA1(d64130e710d0c70095ad8ebd4e2194b8c461be4a), ROM_BIOS(1) ) /* Newer, but keep both in driver */ - ROM_SYSTEM_BIOS(2, "r34", "rev. 3.4") - ROMX_LOAD( "special_forces_boot_v3.4.u4", 0x000000, 0x100000, CRC(db4862ac) SHA1(a1e886d424cf7d26605e29d972d48e8d44ae2d58), ROM_BIOS(2) ) - - ROM_REGION(0x80000, "pic", 0) /* PIC18c422 I/P program - read-protected, need dumped */ - ROM_LOAD( "special_forces_et_u7_rev1.2.u7", 0x000000, 0x80000, NO_DUMP ) - - DISK_REGION( "ata:0:hdd:image" ) - DISK_IMAGE_READONLY("sf010101", 0, SHA1(59b5e3d8e1d5537204233598830be2066aad0556) ) -ROM_END - -ROM_START(zoofari) - ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ - ROM_LOAD( "zf_boot_rel.u13", 0x000000, 0x400000, CRC(e629689a) SHA1(7352d033c638040c3e51a453e2440a7f38a1b406) ) - - ROM_REGION(0x80000, "pic", 0) /* PIC18c422 program - read-protected, need dumped */ - ROM_LOAD( "8777z-568.bin", 0x000000, 0x80000, NO_DUMP ) - - DISK_REGION( "ata:0:hdd:image" ) - DISK_IMAGE_READONLY("zoofari", 0, SHA1(8fb9cfb1ab2660f40b643fcd772243903bd69a6c) ) -ROM_END - -ROM_START(rhnation) - ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */ - ROM_LOAD( "rhythm_nation_rev_3.1.5_m27v322.u13", 0x000000, 0x400000, CRC(456f043d) SHA1(cc166897fdbdaa3583e44816da9dfbbf303f5c61) ) - - ROM_REGION(0x80000, "pic", 0) /* PIC18c242 program - read-protected, need dumped */ - ROM_LOAD( "pic18c242-i-sp.u22", 0x000000, 0x80000, NO_DUMP ) - - DISK_REGION( "ata:0:hdd:image" ) - DISK_IMAGE_READONLY("rhn010104", 0, SHA1(5bc2e5817b29bf42ec483414242795fd76d749d9) ) -ROM_END - -GAME( 2002, specfrce, 0, vp101, specfrce, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Special Forces Elite Training (v01.02.00)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2002, specfrceo, specfrce, vp101, specfrce, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Special Forces Elite Training (v01.01.01)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2003, rhnation, 0, vp50, vp50, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Rhythm Nation (v01.00.04, boot v3.1.5)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) -GAME( 2004, jnero, 0, vp101, jnero, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Johnny Nero Action Hero (v01.01.08)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2006, zoofari, 0, vp50, vp50, vp10x_state, empty_init, ROT0, "ICE/Play Mechanix", "Zoofari", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) diff --git a/src/mame/motorola/ampscarp.cpp b/src/mame/motorola/ampscarp.cpp new file mode 100644 index 00000000000..8da8d3c86c5 --- /dev/null +++ b/src/mame/motorola/ampscarp.cpp @@ -0,0 +1,51 @@ +// license:BSD-3-Clause +// copyright-holders: +/*********************************************************************************************************************************** + +2017-10-29 Skeleton + +Motorola AMPS Car Phone. + +Nothing is really known about the hardware. The dump contains MC68HC11 code, but has no vector table. It seems likely that +whatever MCU type this uses boots from an internal ROM/PROM/EPROM but can also execute a large bankswitched external program. + +************************************************************************************************************************************/ + +#include "emu.h" +#include "cpu/mc68hc11/mc68hc11.h" + +class ampscarp_state : public driver_device +{ +public: + ampscarp_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void ampscarp(machine_config &config); + +private: + void mem_map(address_map &map); + required_device m_maincpu; +}; + +void ampscarp_state::mem_map(address_map &map) +{ + map(0x0000, 0xffff).rom().region("maincpu", 0); +} + +static INPUT_PORTS_START( ampscarp ) +INPUT_PORTS_END + +void ampscarp_state::ampscarp(machine_config &config) +{ + MC68HC11A1(config, m_maincpu, 8'000'000); // type and clock unknown + m_maincpu->set_addrmap(AS_PROGRAM, &scarp_state::mem_map); +} + +ROM_START( ampscarp ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "motorola_amps_car_phone_dump.bin", 0x0000, 0x20000, CRC(677ec85e) SHA1(219611b6c4b16461705e2df61d79a0f7ac8f529f) ) +ROM_END + +COMP( 1998, ampscarp, 0, 0, ampscarp, ampscarp, ampscarp_state, empty_init, "Motorola", "AMPS Car Phone", MACHINE_IS_SKELETON ) diff --git a/src/mame/motorola/powerstack.cpp b/src/mame/motorola/powerstack.cpp new file mode 100644 index 00000000000..d5444770d65 --- /dev/null +++ b/src/mame/motorola/powerstack.cpp @@ -0,0 +1,41 @@ +// license:BSD-3-Clause +// copyright-holders: +/*********************************************************************************************************************************** + +2017-10-29 Skeleton + +Motorola Powerstack II. CPU is a PowerPC 604e @ 300MHz. + +************************************************************************************************************************************/ + +#include "emu.h" +#include "cpu/powerpc/ppc.h" + +class powerstack_state : public driver_device +{ +public: + powerstack_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + // , m_maincpu(*this, "maincpu") + { } + + void powerstack(machine_config &config); +private: + // required_device m_maincpu; +}; + +static INPUT_PORTS_START( powerstack ) +INPUT_PORTS_END + +void powerstack_state::powerstack(machine_config &config) +{ +// ppc604_device &maincpu(PPC604(config, "maincpu", 300'000'000)); // PPC604E @ 300MHz +// maincpu.set_addrmap(AS_PROGRAM, &powerstack_state::mem_map); +} + +ROM_START( powerstk ) + ROM_REGION( 0x80000, "roms", 0 ) + ROM_LOAD( "motorola_powerstack2.bin", 0x0000, 0x80000, CRC(948e8fcd) SHA1(9a8c32b621c98bc33ee525f66747c34d39851685) ) +ROM_END + +COMP( 1996, powerstk, 0, 0, powerstack, powerstack, powerstack_state, empty_init, "Motorola", "Powerstack II", MACHINE_IS_SKELETON ) diff --git a/src/mame/nichibutsu/myvision.cpp b/src/mame/nichibutsu/myvision.cpp new file mode 100644 index 00000000000..61d9927dc8d --- /dev/null +++ b/src/mame/nichibutsu/myvision.cpp @@ -0,0 +1,261 @@ +// license:BSD-3-Clause +// copyright-holders:Wilbert Pol +/*************************************************************************** + + Nichibutsu My Vision + driver by Wilbert Pol + + 2013/12/01 Skeleton driver. + 2013/12/02 Working driver. + + Known issues: + - The inputs sometimes feel a bit unresponsive. Was the real unit like + that? Or is it just because we have incorrect clocks? + + TODO: + - Review software list + - Add clickable artwork + - Verify sound chip model + - Verify exact TMS9918 model + - Verify clock crystal(s) + - Verify size of vram + +****************************************************************************/ + + +#include "emu.h" + +#include "cpu/z80/z80.h" +#include "sound/ay8910.h" +#include "video/tms9928a.h" + +#include "bus/generic/slot.h" +#include "bus/generic/carts.h" + +#include "softlist_dev.h" +#include "speaker.h" + + +namespace { + +class myvision_state : public driver_device +{ +public: + myvision_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_cart(*this, "cartslot") + , m_io_row0(*this, "ROW0") + , m_io_row1(*this, "ROW1") + , m_io_row2(*this, "ROW2") + , m_io_row3(*this, "ROW3") + { } + + void myvision(machine_config &config); + +private: + DECLARE_DEVICE_IMAGE_LOAD_MEMBER( cart_load ); + uint8_t ay_port_a_r(); + uint8_t ay_port_b_r(); + void ay_port_a_w(uint8_t data); + void ay_port_b_w(uint8_t data); + + void myvision_io(address_map &map); + void myvision_mem(address_map &map); + + virtual void machine_start() override; + virtual void machine_reset() override; + required_device m_maincpu; + required_device m_cart; + uint8_t m_column; + required_ioport m_io_row0; + required_ioport m_io_row1; + required_ioport m_io_row2; + required_ioport m_io_row3; +}; + + +void myvision_state::myvision_mem(address_map &map) +{ + map.unmap_value_high(); + //map(0x0000, 0x5fff) // mapped by the cartslot + map(0xa000, 0xa7ff).ram(); + map(0xe000, 0xe000).rw("tms9918", FUNC(tms9918a_device::vram_read), FUNC(tms9918a_device::vram_write)); + map(0xe002, 0xe002).rw("tms9918", FUNC(tms9918a_device::register_read), FUNC(tms9918a_device::register_write)); +} + + +void myvision_state::myvision_io(address_map &map) +{ + map.unmap_value_high(); + map.global_mask(0xff); + map(0x00, 0x00).w("ay8910", FUNC(ay8910_device::address_w)); + map(0x01, 0x01).w("ay8910", FUNC(ay8910_device::data_w)); + map(0x02, 0x02).r("ay8910", FUNC(ay8910_device::data_r)); +} + + +/* Input ports */ +/* + Keyboard layout is something like: + B + A D E + C + 1 2 3 4 5 6 7 8 9 10 11 12 13 14 + */ +static INPUT_PORTS_START( myvision ) + PORT_START("ROW0") + PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M) PORT_NAME("13") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN) PORT_NAME("C/Down") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_I) PORT_NAME("9") + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_E) PORT_NAME("5") + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_A) PORT_NAME("1") + + PORT_START("ROW1") + PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP) PORT_NAME("B/Up") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_L) PORT_NAME("12") + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_H) PORT_NAME("8") + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_D) PORT_NAME("4") + + PORT_START("ROW2") + PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N) PORT_NAME("14/Start") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_NAME("D/Right") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_J) PORT_NAME("10") + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_F) PORT_NAME("6") + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_B) PORT_NAME("2") + + PORT_START("ROW3") + PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT) PORT_NAME("A/Left") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_NAME("E") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_K) PORT_NAME("11") + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_G) PORT_NAME("7") + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_C) PORT_NAME("3") + +INPUT_PORTS_END + + +void myvision_state::machine_start() +{ + if (m_cart->exists()) + m_maincpu->space(AS_PROGRAM).install_read_handler(0x0000, 0x5fff, read8sm_delegate(*m_cart, FUNC(generic_slot_device::read_rom))); + + save_item(NAME(m_column)); +} + + +void myvision_state::machine_reset() +{ + m_column = 0xff; +} + + +DEVICE_IMAGE_LOAD_MEMBER( myvision_state::cart_load ) +{ + uint32_t size = m_cart->common_get_size("rom"); + + if (size != 0x4000 && size != 0x6000) + { + image.seterror(image_error::INVALIDIMAGE, "Unsupported cartridge size"); + return image_init_result::FAIL; + } + + m_cart->rom_alloc(size, GENERIC_ROM8_WIDTH, ENDIANNESS_LITTLE); + m_cart->common_load_rom(m_cart->get_rom_base(), size, "rom"); + + return image_init_result::PASS; +} + + +uint8_t myvision_state::ay_port_a_r() +{ + uint8_t data = 0xFF; + + if ( ! ( m_column & 0x80 ) ) + { + data &= m_io_row0->read(); + } + + if ( ! ( m_column & 0x40 ) ) + { + data &= m_io_row1->read(); + } + + if ( ! ( m_column & 0x20 ) ) + { + data &= m_io_row2->read(); + } + + if ( ! ( m_column & 0x10 ) ) + { + data &= m_io_row3->read(); + } + + return data; +} + + +uint8_t myvision_state::ay_port_b_r() +{ + return 0xff; +} + + +void myvision_state::ay_port_a_w(uint8_t data) +{ +} + + +// Upper 4 bits select column +void myvision_state::ay_port_b_w(uint8_t data) +{ + m_column = data; +} + +void myvision_state::myvision(machine_config &config) +{ + /* basic machine hardware */ + Z80(config, m_maincpu, XTAL(10'738'635)/3); /* Not verified */ + m_maincpu->set_addrmap(AS_PROGRAM, &myvision_state::myvision_mem); + m_maincpu->set_addrmap(AS_IO, &myvision_state::myvision_io); + + /* video hardware */ + tms9918a_device &vdp(TMS9918A(config, "tms9918", XTAL(10'738'635))); /* Exact model not verified */ + vdp.set_screen("screen"); + vdp.set_vram_size(0x4000); /* Not verified */ + vdp.int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + SCREEN(config, "screen", SCREEN_TYPE_RASTER); + + /* sound hardware */ + SPEAKER(config, "mono").front_center(); + ay8910_device &ay8910(AY8910(config, "ay8910", XTAL(10'738'635)/3/2)); /* Exact model and clock not verified */ + ay8910.port_a_read_callback().set(FUNC(myvision_state::ay_port_a_r)); + ay8910.port_b_read_callback().set(FUNC(myvision_state::ay_port_b_r)); + ay8910.port_a_write_callback().set(FUNC(myvision_state::ay_port_a_w)); + ay8910.port_b_write_callback().set(FUNC(myvision_state::ay_port_b_w)); + ay8910.add_route(ALL_OUTPUTS, "mono", 0.50); + + /* cartridge */ + generic_cartslot_device &cartslot(GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, "myvision_cart")); + cartslot.set_device_load(FUNC(myvision_state::cart_load)); + //cartslot.set_must_be_loaded(true); + + /* software lists */ + SOFTWARE_LIST(config, "cart_list").set_original("myvision"); +} + +/* ROM definition */ +ROM_START( myvision ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) +ROM_END + +} // anonymous namespace + +/* Driver */ + +// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLN AME FLAGS +CONS( 1983, myvision, 0, 0, myvision, myvision, myvision_state, empty_init, "Nichibutsu", "My Vision (KH-1000)", 0 ) diff --git a/src/mame/nintendo/gb.cpp b/src/mame/nintendo/gb.cpp index 2a092f40bc2..db59aef5d5f 100644 --- a/src/mame/nintendo/gb.cpp +++ b/src/mame/nintendo/gb.cpp @@ -36,9 +36,8 @@ Status: not supported yet. #include "emu.h" +#include "bus/gameboy/carts.h" #include "bus/gameboy/gb_slot.h" -#include "bus/gameboy/mbc.h" -#include "bus/gameboy/rom.h" #include "cpu/lr35902/lr35902.h" #include "machine/ram.h" #include "sound/gb.h" @@ -60,52 +59,40 @@ namespace { #define SGB_FRAMES_PER_SECOND 61.17 -class gb_state : public driver_device +class base_state : public driver_device { public: - gb_state(const machine_config &mconfig, device_type type, const char *tag) : + base_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_cartslot(*this, "cartslot"), m_maincpu(*this, "maincpu"), m_apu(*this, "apu"), - m_region_maincpu(*this, "maincpu"), m_inputs(*this, "INPUTS"), - m_bios_hack(*this, "SKIP_CHECK"), m_ppu(*this, "ppu"), - m_palette(*this, "palette"), - m_cart_low(*this, "cartlow"), - m_cart_high(*this, "carthigh") + m_palette(*this, "palette") { } - void gbpocket(machine_config &config); - void gameboy(machine_config &config); - protected: - enum { + enum + { SIO_ENABLED = 0x80, SIO_FAST_CLOCK = 0x02, SIO_INTERNAL_CLOCK = 0x01 }; - static constexpr u8 NO_CART = 0x00; - static constexpr u8 BIOS_ENABLED = 0x00; - static constexpr u8 CART_PRESENT = 0x01; - static constexpr u8 BIOS_DISABLED = 0x02; + + static constexpr XTAL MASTER_CLOCK = 4.194304_MHz_XTAL; virtual void machine_start() override; virtual void machine_reset() override; void gb_io_w(offs_t offset, uint8_t data); - void gb_io2_w(offs_t offset, uint8_t data); uint8_t gb_ie_r(); void gb_ie_w(uint8_t data); uint8_t gb_io_r(offs_t offset); - uint8_t gb_bios_r(offs_t offset); - void gb_timer_callback(uint8_t data); void gb_init_regs(); - void gb_init(); uint8_t m_gb_io[0x10]{}; @@ -125,25 +112,57 @@ protected: required_device m_maincpu; required_device m_apu; - required_region_ptr m_region_maincpu; required_ioport m_inputs; - required_ioport m_bios_hack; required_device m_ppu; required_device m_palette; - memory_view m_cart_low; - memory_view m_cart_high; private: - void gb_palette(palette_device &palette) const; - void gbp_palette(palette_device &palette) const; - void gb_timer_increment(); void gb_timer_check_irq(); void gb_serial_timer_tick(); +}; + + +class gb_state : public base_state +{ +public: + gb_state(const machine_config &mconfig, device_type type, const char *tag) : + base_state(mconfig, type, tag), + m_region_boot(*this, "maincpu"), + m_bios_hack(*this, "SKIP_CHECK") + { } + + void gameboy(machine_config &config); + void gbpocket(machine_config &config); + +protected: + virtual void device_post_load() override; + + virtual void machine_start() override; + virtual void machine_reset() override; + + virtual void install_boot(); + virtual void uninstall_boot(); + + void disable_boot(); + + void gb_io2_w(offs_t offset, uint8_t data); + + required_region_ptr m_region_boot; - void save_gb_base(); +private: + void gb_palette(palette_device &palette) const; + void gbp_palette(palette_device &palette) const; void gameboy_map(address_map &map); + + required_ioport m_bios_hack; + + util::notifier_subscription m_prog_notifier; + memory_passthrough_handler m_boot_tap; + + bool m_boot_enabled = false; + bool m_installing_boot = false; }; @@ -194,7 +213,12 @@ protected: virtual void machine_start() override; virtual void machine_reset() override; + virtual void install_boot() override; + virtual void uninstall_boot() override; + private: + static constexpr XTAL GBC_CLOCK = 8.388_MHz_XTAL; + void gbc_io_w(offs_t offset, uint8_t data); void gbc_io2_w(offs_t offset, uint8_t data); uint8_t gbc_io2_r(offs_t offset); @@ -203,22 +227,20 @@ private: required_memory_bank m_rambank; memory_share_creator m_bankedram; + + memory_passthrough_handler m_boot_high_tap; }; -class megaduck_state : public gb_state +class megaduck_state : public base_state { public: megaduck_state(const machine_config &mconfig, device_type type, const char *tag) : - gb_state(mconfig, type, tag) + base_state(mconfig, type, tag) { } void megaduck(machine_config &config); -protected: - virtual void machine_start() override; - virtual void machine_reset() override; - private: uint8_t megaduck_video_r(offs_t offset); void megaduck_video_w(offs_t offset, uint8_t data); @@ -242,25 +264,7 @@ private: #define TIMEFRQ m_gb_io[0x07] // Timer frequency and start/stop switch -//------------------------- -// handle save state -//------------------------- - -void gb_state::save_gb_base() -{ - save_item(NAME(m_gb_io)); - save_item(NAME(m_divcount)); - save_item(NAME(m_shift)); - save_item(NAME(m_shift_cycles)); - save_item(NAME(m_triggering_irq)); - save_item(NAME(m_reloading)); - save_item(NAME(m_sio_count)); - - m_cartslot->save_ram(); -} - - -void gb_state::gb_init_regs() +void base_state::gb_init_regs() { /* Initialize the registers */ SIODATA = 0x00; @@ -271,29 +275,53 @@ void gb_state::gb_init_regs() } -void gb_state::gb_init() +void gb_state::device_post_load() { - m_apu->sound_w(0x16, 0x00); /* Initialize sound hardware */ - - m_divcount = 8; - m_internal_serial_clock = 0; - m_internal_serial_frequency = 512 / 2; - m_triggering_irq = 0; - m_shift = 10; // slowest timer? - m_shift_cycles = 1 << m_shift; + base_state::device_post_load(); - /* Set registers to default/startup values */ - m_gb_io[0x00] = 0xCF; - m_gb_io[0x01] = 0x00; - m_gb_io[0x02] = 0x7E; - m_gb_io[0x03] = 0xFF; - m_gb_io[0x07] = 0xF8; /* Upper bits of TIMEFRQ register are set to 1 */ + m_installing_boot = true; + if (m_boot_enabled) + install_boot(); + else + uninstall_boot(); + m_installing_boot = false; } +void base_state::machine_start() +{ + save_item(NAME(m_gb_io)); + save_item(NAME(m_divcount)); + save_item(NAME(m_shift)); + save_item(NAME(m_shift_cycles)); + save_item(NAME(m_triggering_irq)); + save_item(NAME(m_reloading)); + save_item(NAME(m_sio_count)); + + m_cartslot->save_ram(); +} + void gb_state::machine_start() { - save_gb_base(); + base_state::machine_start(); + + m_boot_enabled = false; + m_installing_boot = false; + m_prog_notifier = m_maincpu->space(AS_PROGRAM).add_change_notifier( + [this] (read_or_write mode) + { + if (!m_installing_boot && (uint32_t(mode) & uint32_t(read_or_write::READ))) + { + m_installing_boot = true; + if (m_boot_enabled) + install_boot(); + else + uninstall_boot(); + m_installing_boot = false; + } + }); + + save_item(NAME(m_boot_enabled)); } void gbc_state::machine_start() @@ -304,7 +332,6 @@ void gbc_state::machine_start() m_rambank->configure_entries(1, 7, &m_bankedram[0], 0x1000); } - void sgb_state::machine_start() { gb_state::machine_start(); @@ -321,12 +348,34 @@ void sgb_state::machine_start() save_item(NAME(m_sgb_data)); } + +void base_state::machine_reset() +{ + m_apu->sound_w(0x16, 0x00); // Initialize sound hardware + + m_divcount = 8; + m_internal_serial_clock = 0; + m_internal_serial_frequency = 512 / 2; + m_triggering_irq = 0; + m_shift = 10; // slowest timer? + m_shift_cycles = 1 << m_shift; + + // Set registers to default/startup values + m_gb_io[0x00] = 0xcf; + m_gb_io[0x01] = 0x00; + m_gb_io[0x02] = 0x7e; + m_gb_io[0x03] = 0xff; + m_gb_io[0x07] = 0xf8; // Upper bits of TIMEFRQ register are set to 1 +} + void gb_state::machine_reset() { - gb_init(); + base_state::machine_reset(); - m_cart_low.select(BIOS_ENABLED | (m_cartslot ? CART_PRESENT : NO_CART)); - m_cart_high.select(m_cartslot ? CART_PRESENT : NO_CART); + m_installing_boot = true; + m_boot_enabled = true; + install_boot(); + m_installing_boot = false; } void gbc_state::machine_reset() @@ -346,7 +395,67 @@ void sgb_state::machine_reset() } -void gb_state::gb_io_w(offs_t offset, uint8_t data) +void gb_state::install_boot() +{ + m_boot_tap.remove(); + m_boot_tap = m_maincpu->space(AS_PROGRAM).install_read_tap( + 0x0000, 0x00ff, + "boot_r", + [this] (offs_t offset, u8 &data, u8 mem_mask) + { + data = m_region_boot[offset]; + if (m_bios_hack->read()) + { + // patch out logo and checksum checks + // useful to run some pirate carts until properly emulated, or to test homebrew + if (offset == 0xe9 || offset == 0xea) + data = 0x00; + if (offset == 0xfa || offset == 0xfb) + data = 0x00; + } + }, + &m_boot_tap); +} + +void gbc_state::install_boot() +{ + gb_state::install_boot(); + + m_boot_high_tap.remove(); + m_boot_high_tap = m_maincpu->space(AS_PROGRAM).install_read_tap( + 0x0200, 0x08ff, + "boot_high_r", + [this] (offs_t offset, u8 &data, u8 mem_mask) + { + data = m_region_boot[0x0100 + offset - 0x0200]; + }, + &m_boot_high_tap); +} + + +void gb_state::uninstall_boot() +{ + m_boot_tap.remove(); +} + +void gbc_state::uninstall_boot() +{ + gb_state::uninstall_boot(); + + m_boot_high_tap.remove(); +} + + +void gb_state::disable_boot() +{ + m_installing_boot = true; + m_boot_enabled = false; + uninstall_boot(); + m_installing_boot = false; +} + + +void base_state::gb_io_w(offs_t offset, uint8_t data) { static const uint8_t timer_shifts[4] = {10, 4, 6, 8}; @@ -431,10 +540,7 @@ logerror("SIOCONT write, serial clock is %04x\n", m_internal_serial_clock); void gb_state::gb_io2_w(offs_t offset, uint8_t data) { if (offset == 0x10) - { - /* disable BIOS ROM */ - m_cart_low.select(BIOS_DISABLED | (m_cartslot ? CART_PRESENT : NO_CART)); - } + disable_boot(); // disable boot ROM else m_ppu->video_w(offset, data); } @@ -592,18 +698,18 @@ void sgb_state::sgb_io_w(offs_t offset, uint8_t data) } /* Interrupt Enable register */ -uint8_t gb_state::gb_ie_r() +uint8_t base_state::gb_ie_r() { return m_maincpu->get_ie(); } -void gb_state::gb_ie_w(uint8_t data) +void base_state::gb_ie_w(uint8_t data) { m_maincpu->set_ie(data); } /* IO read */ -uint8_t gb_state::gb_io_r(offs_t offset) +uint8_t base_state::gb_io_r(offs_t offset) { switch(offset) { @@ -632,7 +738,7 @@ logerror("IF read, serial clock is %04x\n", m_internal_serial_clock); /* Called when 512 internal cycles are passed */ -void gb_state::gb_serial_timer_tick() +void base_state::gb_serial_timer_tick() { if (SIOCONT & SIO_ENABLED) { @@ -657,7 +763,7 @@ void gb_state::gb_serial_timer_tick() } -void gb_state::gb_timer_check_irq() +void base_state::gb_timer_check_irq() { m_reloading = 0; if (m_triggering_irq) @@ -674,7 +780,7 @@ void gb_state::gb_timer_check_irq() } } -void gb_state::gb_timer_increment() +void base_state::gb_timer_increment() { gb_timer_check_irq(); @@ -687,7 +793,7 @@ void gb_state::gb_timer_increment() } // This gets called while the cpu is executing instructions to keep the timer state in sync -void gb_state::gb_timer_callback(uint8_t data) +void base_state::gb_timer_callback(uint8_t data) { uint16_t old_gb_divcount = m_divcount; uint16_t old_internal_serial_clock = m_internal_serial_clock; @@ -746,8 +852,8 @@ void gbc_state::gbc_io2_w(offs_t offset, uint8_t data) case 0x0D: // KEY1 - Prepare speed switch m_maincpu->set_speed(data); return; - case 0x10: // BFF - BIOS disable - m_cart_low.select(BIOS_DISABLED | (m_cartslot ? CART_PRESENT : NO_CART)); + case 0x10: // BFF - boot ROM disable + disable_boot(); return; case 0x16: // RP - Infrared port break; @@ -782,19 +888,6 @@ uint8_t gbc_state::gbc_io2_r(offs_t offset) ****************************************************************************/ -void megaduck_state::machine_start() -{ - gb_state::machine_start(); -} - -void megaduck_state::machine_reset() -{ - gb_init(); - - m_cart_low.select((m_cartslot ? CART_PRESENT : NO_CART)); - m_cart_high.select(m_cartslot ? CART_PRESENT : NO_CART); -} - /* Map megaduck video related area on to regular Game Boy video area @@ -897,35 +990,13 @@ uint8_t megaduck_state::megaduck_sound_r2(offs_t offset) return data; } -uint8_t gb_state::gb_bios_r(offs_t offset) -{ - if (m_bios_hack->read()) - { - // patch out logo and checksum checks - // useful to run some pirate carts until we implement their complete functionalities + to test homebrew - if (offset == 0xe9 || offset == 0xea) - return 0x00; - if (offset == 0xfa || offset == 0xfb) - return 0x00; - } - return m_region_maincpu[offset]; -} - void gb_state::gameboy_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x7fff).view(m_cart_low); - m_cart_low[BIOS_ENABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_ENABLED | NO_CART](0x0000, 0x00ff).r(FUNC(gb_state::gb_bios_r)); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0000, 0x00ff).r(FUNC(gb_state::gb_bios_r)); - m_cart_low[BIOS_DISABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_DISABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); + map(0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); map(0x8000, 0x9fff).rw(m_ppu, FUNC(dmg_ppu_device::vram_r), FUNC(dmg_ppu_device::vram_w)); - map(0xa000, 0xbfff).view(m_cart_high); - m_cart_high[NO_CART](0xa000, 0xbfff).noprw(); - m_cart_high[CART_PRESENT](0xa000, 0xbfff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_ram), FUNC(gb_cart_slot_device::write_ram)); + map(0xa000, 0xbfff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_ram), FUNC(gb_cart_slot_device::write_ram)); map(0xc000, 0xdfff).mirror(0x2000).ram(); map(0xfe00, 0xfeff).rw(m_ppu, FUNC(dmg_ppu_device::oam_r), FUNC(dmg_ppu_device::oam_w)); map(0xff00, 0xff0f).rw(FUNC(gb_state::gb_io_r), FUNC(gb_state::gb_io_w)); @@ -940,17 +1011,9 @@ void gb_state::gameboy_map(address_map &map) void sgb_state::sgb_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x7fff).view(m_cart_low); - m_cart_low[BIOS_ENABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_ENABLED | NO_CART](0x0000, 0x00ff).r(FUNC(sgb_state::gb_bios_r)); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0000, 0x00ff).r(FUNC(sgb_state::gb_bios_r)); - m_cart_low[BIOS_DISABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_DISABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); + map(0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); map(0x8000, 0x9fff).rw(m_ppu, FUNC(sgb_ppu_device::vram_r), FUNC(sgb_ppu_device::vram_w)); - map(0xa000, 0xbfff).view(m_cart_high); - m_cart_high[NO_CART](0xa000, 0xbfff).noprw(); - m_cart_high[CART_PRESENT](0xa000, 0xbfff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_ram), FUNC(gb_cart_slot_device::write_ram)); + map(0xa000, 0xbfff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_ram), FUNC(gb_cart_slot_device::write_ram)); map(0xc000, 0xdfff).mirror(0x2000).ram(); map(0xfe00, 0xfeff).rw(m_ppu, FUNC(sgb_ppu_device::oam_r), FUNC(sgb_ppu_device::oam_w)); map(0xff00, 0xff0f).rw(FUNC(sgb_state::gb_io_r), FUNC(sgb_state::sgb_io_w)); @@ -965,19 +1028,9 @@ void sgb_state::sgb_map(address_map &map) void gbc_state::gbc_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x7fff).view(m_cart_low); - m_cart_low[BIOS_ENABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_ENABLED | NO_CART](0x0000, 0x00ff).r(FUNC(gbc_state::gb_bios_r)); - m_cart_low[BIOS_ENABLED | NO_CART](0x0200, 0x08ff).rom().region("maincpu", 0x0100); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0000, 0x00ff).r(FUNC(gbc_state::gb_bios_r)); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0200, 0x08ff).rom().region("maincpu", 0x0100); - m_cart_low[BIOS_DISABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_DISABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); + map(0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); map(0x8000, 0x9fff).rw(m_ppu, FUNC(cgb_ppu_device::vram_r), FUNC(cgb_ppu_device::vram_w)); - map(0xa000, 0xbfff).view(m_cart_high); - m_cart_high[NO_CART](0xa000, 0xbfff).noprw(); - m_cart_high[CART_PRESENT](0xa000, 0xbfff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_ram), FUNC(gb_cart_slot_device::write_ram)); + map(0xa000, 0xbfff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_ram), FUNC(gb_cart_slot_device::write_ram)); map(0xc000, 0xcfff).mirror(0x2000).ram(); map(0xd000, 0xdfff).mirror(0x2000).bankrw(m_rambank); map(0xfe00, 0xfeff).rw(m_ppu, FUNC(cgb_ppu_device::oam_r), FUNC(cgb_ppu_device::oam_w)); @@ -993,18 +1046,12 @@ void gbc_state::gbc_map(address_map &map) void megaduck_state::megaduck_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x7fff).view(m_cart_low); - m_cart_low[BIOS_ENABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_ENABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); - m_cart_low[BIOS_DISABLED | NO_CART](0x0000, 0x7fff).noprw(); - m_cart_low[BIOS_DISABLED | CART_PRESENT](0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); + map(0x0000, 0x7fff).rw(m_cartslot, FUNC(gb_cart_slot_device::read_rom), FUNC(gb_cart_slot_device::write_bank)); map(0x8000, 0x9fff).rw(m_ppu, FUNC(dmg_ppu_device::vram_r), FUNC(dmg_ppu_device::vram_w)); map(0xa000, 0xafff).noprw(); // unused? - map(0xb000, 0xb000).view(m_cart_high); - m_cart_high[NO_CART](0xb000, 0xb000).noprw(); - m_cart_high[CART_PRESENT](0xb000, 0xb000).w(m_cartslot, FUNC(gb_cart_slot_device::write_ram)); // used for bankswitch + map(0xb000, 0xb000).w(m_cartslot, FUNC(gb_cart_slot_device::write_ram)); // used for bank switch map(0xb001, 0xbfff).noprw(); // unused? - map(0xc000, 0xfdff).ram(); // 8k or 16k? ram + map(0xc000, 0xfdff).ram(); // 8k or 16k? RAM map(0xfe00, 0xfeff).rw(m_ppu, FUNC(dmg_ppu_device::oam_r), FUNC(dmg_ppu_device::oam_w)); map(0xff00, 0xff0f).rw(FUNC(megaduck_state::gb_io_r), FUNC(megaduck_state::gb_io_w)); map(0xff10, 0xff1f).rw(FUNC(megaduck_state::megaduck_video_r), FUNC(megaduck_state::megaduck_video_w)); @@ -1032,47 +1079,8 @@ static INPUT_PORTS_START( gameboy ) PORT_CONFNAME( 0x01, 0x00, "[HACK] Skip BIOS Logo check" ) PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) PORT_CONFSETTING( 0x01, DEF_STR( On ) ) - INPUT_PORTS_END -static void gb_cart(device_slot_interface &device) -{ - device.option_add_internal("rom", GB_STD_ROM); - device.option_add_internal("rom_mbc1", GB_ROM_MBC1); - device.option_add_internal("rom_mbc1col", GB_ROM_MBC1); - device.option_add_internal("rom_mbc2", GB_ROM_MBC2); - device.option_add_internal("rom_mbc3", GB_ROM_MBC3); - device.option_add_internal("rom_huc1", GB_ROM_MBC3); - device.option_add_internal("rom_huc3", GB_ROM_MBC3); - device.option_add_internal("rom_mbc5", GB_ROM_MBC5); - device.option_add_internal("rom_mbc6", GB_ROM_MBC6); - device.option_add_internal("rom_mbc7", GB_ROM_MBC7); - device.option_add_internal("rom_tama5", GB_ROM_TAMA5); - device.option_add_internal("rom_mmm01", GB_ROM_MMM01); - device.option_add_internal("rom_m161", GB_ROM_M161); - device.option_add_internal("rom_sachen1", GB_ROM_SACHEN1); - device.option_add_internal("rom_sachen2", GB_ROM_SACHEN2); - device.option_add_internal("rom_wisdom", GB_ROM_WISDOM); - device.option_add_internal("rom_yong", GB_ROM_YONG); - device.option_add_internal("rom_lasama", GB_ROM_LASAMA); - device.option_add_internal("rom_atvrac", GB_ROM_ATVRAC); - device.option_add_internal("rom_camera", GB_ROM_CAMERA); - device.option_add_internal("rom_188in1", GB_ROM_188IN1); - device.option_add_internal("rom_sintax", GB_ROM_SINTAX); - device.option_add_internal("rom_chong", GB_ROM_CHONGWU); - device.option_add_internal("rom_licheng", GB_ROM_LICHENG); - device.option_add_internal("rom_digimon", GB_ROM_DIGIMON); - device.option_add_internal("rom_rock8", GB_ROM_ROCKMAN8); - device.option_add_internal("rom_sm3sp", GB_ROM_SM3SP); -// device.option_add_internal("rom_dkong5", GB_ROM_DKONG5); -// device.option_add_internal("rom_unk01", GB_ROM_UNK01); -} - -static void megaduck_cart(device_slot_interface &device) -{ - device.option_add_internal("rom", MEGADUCK_ROM); -} - static constexpr rgb_t palette_gb[] = @@ -1134,36 +1142,33 @@ void megaduck_state::megaduck_palette(palette_device &palette) const void gb_state::gameboy(machine_config &config) { - /* basic machine hardware */ - LR35902(config, m_maincpu, XTAL(4'194'304)); + // basic machine hardware + LR35902(config, m_maincpu, MASTER_CLOCK); m_maincpu->set_addrmap(AS_PROGRAM, &gb_state::gameboy_map); m_maincpu->timer_cb().set(FUNC(gb_state::gb_timer_callback)); m_maincpu->set_halt_bug(true); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); - screen.set_refresh_hz(DMG_FRAMES_PER_SECOND); - screen.set_vblank_time(0); - screen.set_screen_update("ppu", FUNC(dmg_ppu_device::screen_update)); + screen.set_raw(MASTER_CLOCK, 456, 0, 20 * 8, 154, 0, 18 * 8); + screen.set_screen_update(m_ppu, FUNC(dmg_ppu_device::screen_update)); screen.set_palette(m_palette); -// screen.set_size(20*8, 18*8); - screen.set_size(458, 154); - screen.set_visarea(0*8, 20*8-1, 0*8, 18*8-1); GFXDECODE(config, "gfxdecode", m_palette, gfxdecode_device::empty); PALETTE(config, m_palette, FUNC(gb_state::gb_palette), 4); DMG_PPU(config, m_ppu, m_maincpu); - /* sound hardware */ + // sound hardware SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - DMG_APU(config, m_apu, XTAL(4'194'304)); + + DMG_APU(config, m_apu, MASTER_CLOCK); m_apu->add_route(0, "lspeaker", 0.50); m_apu->add_route(1, "rspeaker", 0.50); - /* cartslot */ - GB_CART_SLOT(config, m_cartslot, gb_cart, nullptr); + // cartslot + GB_CART_SLOT(config, m_cartslot, gameboy_cartridges, nullptr); SOFTWARE_LIST(config, "cart_list").set_original("gameboy"); SOFTWARE_LIST(config, "gbc_list").set_compatible("gbcolor"); @@ -1171,18 +1176,18 @@ void gb_state::gameboy(machine_config &config) void sgb_state::supergb(machine_config &config) { - /* basic machine hardware */ - LR35902(config, m_maincpu, 4295454); /* 4.295454 MHz, derived from SNES xtal */ + // basic machine hardware + LR35902(config, m_maincpu, 4'295'454); // derived from SNES xtal m_maincpu->set_addrmap(AS_PROGRAM, &sgb_state::sgb_map); m_maincpu->timer_cb().set(FUNC(sgb_state::gb_timer_callback)); m_maincpu->set_halt_bug(true); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); screen.set_physical_aspect(4, 3); // runs on a TV, not an LCD screen.set_refresh_hz(SGB_FRAMES_PER_SECOND); screen.set_vblank_time(0); - screen.set_screen_update("ppu", FUNC(dmg_ppu_device::screen_update)); + screen.set_screen_update(m_ppu, FUNC(dmg_ppu_device::screen_update)); screen.set_palette(m_palette); screen.set_size(32*8, 28*8); screen.set_visarea(0*8, 32*8-1, 0*8, 28*8-1); @@ -1192,15 +1197,16 @@ void sgb_state::supergb(machine_config &config) SGB_PPU(config, m_ppu, m_maincpu); - /* sound hardware */ + // sound hardware SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - DMG_APU(config, m_apu, 4295454); + + DMG_APU(config, m_apu, 4'295'454); m_apu->add_route(0, "lspeaker", 0.50); m_apu->add_route(1, "rspeaker", 0.50); - /* cartslot */ - GB_CART_SLOT(config, m_cartslot, gb_cart, nullptr); + // cartslot + GB_CART_SLOT(config, m_cartslot, gameboy_cartridges, nullptr); SOFTWARE_LIST(config, "cart_list").set_original("gameboy"); SOFTWARE_LIST(config, "gbc_list").set_compatible("gbcolor"); @@ -1210,16 +1216,16 @@ void sgb_state::supergb2(machine_config &config) { gameboy(config); - /* basic machine hardware */ + // basic machine hardware m_maincpu->set_addrmap(AS_PROGRAM, &sgb_state::sgb_map); - /* video hardware */ + // video hardware screen_device &screen(*subdevice("screen")); screen.set_physical_aspect(4, 3); // runs on a TV, not an LCD screen.set_size(32*8, 28*8); screen.set_visarea(0*8, 32*8-1, 0*8, 28*8-1); - m_palette->set_entries(32768); + m_palette->set_entries(32'768); m_palette->set_init(FUNC(sgb_state::sgb_palette)); SGB_PPU(config.replace(), m_ppu, m_maincpu); @@ -1229,7 +1235,7 @@ void gb_state::gbpocket(machine_config &config) { gameboy(config); - /* video hardware */ + // video hardware m_palette->set_init(FUNC(gb_state::gbp_palette)); MGB_PPU(config.replace(), m_ppu, m_maincpu); @@ -1237,35 +1243,32 @@ void gb_state::gbpocket(machine_config &config) void gbc_state::gbcolor(machine_config &config) { - /* basic machine hardware */ - LR35902(config, m_maincpu, XTAL(4'194'304)); // todo XTAL(8'388'000) + // basic machine hardware + LR35902(config, m_maincpu, GBC_CLOCK / 2); // FIXME: make the CPU device divide rather than multiply the clock frequency m_maincpu->set_addrmap(AS_PROGRAM, &gbc_state::gbc_map); m_maincpu->timer_cb().set(FUNC(gbc_state::gb_timer_callback)); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); - screen.set_refresh_hz(DMG_FRAMES_PER_SECOND); - screen.set_vblank_time(0); - screen.set_screen_update("ppu", FUNC(dmg_ppu_device::screen_update)); + screen.set_raw(GBC_CLOCK / 2, 456, 0, 20 * 8, 154, 0, 18 * 8); + screen.set_screen_update(m_ppu, FUNC(dmg_ppu_device::screen_update)); screen.set_palette(m_palette); -// screen.set_size(20*8, 18*8); - screen.set_size(458, 154); - screen.set_visarea(0*8, 20*8-1, 0*8, 18*8-1); GFXDECODE(config, "gfxdecode", m_palette, gfxdecode_device::empty); PALETTE(config, m_palette, palette_device::BGR_555); CGB_PPU(config, m_ppu, m_maincpu); - /* sound hardware */ + // sound hardware SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - CGB04_APU(config, m_apu, XTAL(4'194'304)); + + CGB04_APU(config, m_apu, GBC_CLOCK / 2); m_apu->add_route(0, "lspeaker", 0.50); m_apu->add_route(1, "rspeaker", 0.50); - /* cartslot */ - GB_CART_SLOT(config, m_cartslot, gb_cart, nullptr); + // cartslot + GB_CART_SLOT(config, m_cartslot, gameboy_cartridges, nullptr); SOFTWARE_LIST(config, "cart_list").set_original("gbcolor"); SOFTWARE_LIST(config, "gb_list").set_compatible("gameboy"); @@ -1273,17 +1276,17 @@ void gbc_state::gbcolor(machine_config &config) void megaduck_state::megaduck(machine_config &config) { - /* basic machine hardware */ - LR35902(config, m_maincpu, XTAL(4'194'304)); /* 4.194304 MHz */ + // basic machine hardware + LR35902(config, m_maincpu, XTAL(4'194'304)); m_maincpu->set_addrmap(AS_PROGRAM, &megaduck_state::megaduck_map); m_maincpu->timer_cb().set(FUNC(megaduck_state::gb_timer_callback)); m_maincpu->set_halt_bug(true); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); screen.set_refresh_hz(DMG_FRAMES_PER_SECOND); screen.set_vblank_time(0); - screen.set_screen_update("ppu", FUNC(dmg_ppu_device::screen_update)); + screen.set_screen_update(m_ppu, FUNC(dmg_ppu_device::screen_update)); screen.set_palette(m_palette); screen.set_size(20*8, 18*8); screen.set_visarea(0*8, 20*8-1, 0*8, 18*8-1); @@ -1293,15 +1296,15 @@ void megaduck_state::megaduck(machine_config &config) DMG_PPU(config, m_ppu, m_maincpu); - /* sound hardware */ + // sound hardware SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); DMG_APU(config, m_apu, XTAL(4'194'304)); m_apu->add_route(0, "lspeaker", 0.50); m_apu->add_route(1, "rspeaker", 0.50); - /* cartslot */ - MEGADUCK_CART_SLOT(config, m_cartslot, megaduck_cart, nullptr); + // cartslot + MEGADUCK_CART_SLOT(config, m_cartslot, megaduck_cartridges, nullptr); SOFTWARE_LIST(config, "cart_list").set_original("megaduck"); } @@ -1341,7 +1344,6 @@ ROM_START(gbcolor) ROM_END ROM_START(megaduck) - ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF) ROM_END ROM_START(gamefgtr) diff --git a/src/mame/skeleton/ampscarp.cpp b/src/mame/skeleton/ampscarp.cpp deleted file mode 100644 index 8da8d3c86c5..00000000000 --- a/src/mame/skeleton/ampscarp.cpp +++ /dev/null @@ -1,51 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders: -/*********************************************************************************************************************************** - -2017-10-29 Skeleton - -Motorola AMPS Car Phone. - -Nothing is really known about the hardware. The dump contains MC68HC11 code, but has no vector table. It seems likely that -whatever MCU type this uses boots from an internal ROM/PROM/EPROM but can also execute a large bankswitched external program. - -************************************************************************************************************************************/ - -#include "emu.h" -#include "cpu/mc68hc11/mc68hc11.h" - -class ampscarp_state : public driver_device -{ -public: - ampscarp_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - { } - - void ampscarp(machine_config &config); - -private: - void mem_map(address_map &map); - required_device m_maincpu; -}; - -void ampscarp_state::mem_map(address_map &map) -{ - map(0x0000, 0xffff).rom().region("maincpu", 0); -} - -static INPUT_PORTS_START( ampscarp ) -INPUT_PORTS_END - -void ampscarp_state::ampscarp(machine_config &config) -{ - MC68HC11A1(config, m_maincpu, 8'000'000); // type and clock unknown - m_maincpu->set_addrmap(AS_PROGRAM, &scarp_state::mem_map); -} - -ROM_START( ampscarp ) - ROM_REGION( 0x20000, "maincpu", 0 ) - ROM_LOAD( "motorola_amps_car_phone_dump.bin", 0x0000, 0x20000, CRC(677ec85e) SHA1(219611b6c4b16461705e2df61d79a0f7ac8f529f) ) -ROM_END - -COMP( 1998, ampscarp, 0, 0, ampscarp, ampscarp, ampscarp_state, empty_init, "Motorola", "AMPS Car Phone", MACHINE_IS_SKELETON ) diff --git a/src/mame/skeleton/hp3478a.cpp b/src/mame/skeleton/hp3478a.cpp deleted file mode 100644 index ae76df6831a..00000000000 --- a/src/mame/skeleton/hp3478a.cpp +++ /dev/null @@ -1,754 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:fenugrec -/****************************************************************************** -* HP 3478A Digital Multimeter -* -* Emulating test equipment is not very meaningful except for developping ROM patches. -* This aims to be the minimal emulation sufficient to run the UI (keypad and display). -* Ideally, faking ADC readings could be useful too. -* -* Some of this will probably be applicable to HP 3468A units too. -* -* Current status : runs, AD LINK ERROR on stock ROM due to unimplemented AD link -* - patching the AD comms, we get to a mostly functional state (for patch examples, -* see https://github.com/fenugrec/hp3478a_rompatch ) -* -* TODO -* - split out LCD driver code. It seems common to other HP equipment of the -* era, such as the 3468, 3457, 3488?, 4263?, 6623?, and probably others. -* -* TODO next level -* * do something for analog CPU serial link (not quite uart), or emulate CPU -* * better display render and layout - actual photo ? -* -* TODO level 9000 -* * Connect this with the existing i8291.cpp driver -* * add analog CPU (8049) -* * validate one single chipselect active when doing external access (movx) - - -**** Hardware details (refer to service manual for schematics) -Main CPU : i8039 , no internal ROM -Analog (floating) CPU : i8049, internal ROM (, dump available at ko4bb.com) -ROM : 2764 (64kbit, org 8kB) -RAM : 5101 , 256 * 4bit (!), battery-backed calibration data -GPIB: i8291 -Display : unknown; similar protocol for HP 3457A documented on - http://www.eevblog.com/forum/projects/led-display-for-hp-3457a-multimeter-i-did-it-)/25/ - - - -Main cpu I/O ports: -Port1 -P14-P17 : keypad out (cols) -P10-P13 : keypad in (rows) - -P20 : disp.clk1 -P21 : !CS for GPIB, and disp.IWA -P22 : !CS for DIPswitch; disp.ISA (for instructions) -P23 = !OE for RAM ; disp.sync (enable instruction) -P24 = disp.PWO (enable) -P25 = disp.clk2 -P26 : address bit12 ! (0x1000) => hardware banking -P27 : data out thru isol, to analog CPU - -T1 : data in thru isol, from analog CPU (opcodes jt1 / jnt1) -*/ - -#include "emu.h" -#include "cpu/mcs48/mcs48.h" -#include "machine/bankdev.h" -#include "machine/nvram.h" -#include "machine/watchdog.h" -#include "hp3478a.lh" - -#define CPU_CLOCK XTAL(5'856'000) - -/* port pin/bit defs. Would be nice if mcs48.h had these */ -#define P20 (1 << 0) -#define P21 (1 << 1) -#define P22 (1 << 2) -#define P23 (1 << 3) -#define P24 (1 << 4) -#define P25 (1 << 5) -#define P26 (1 << 6) -#define P27 (1 << 7) - - - -#define A12_PIN P26 -#define CALRAM_CS P23 -#define DIPSWITCH_CS P22 -#define GPIB_CS P21 - -#define DISP_PWO P24 -#define DISP_SYNC P23 -#define DISP_ISA P22 -#define DISP_IWA P21 -#define DISP_CK1 P20 - //don't care about CK2 since it's supposed to be a delayed copy of CK1 -#define DISP_MASK (DISP_PWO | DISP_SYNC | DISP_ISA | DISP_IWA | DISP_CK1) //used for edge detection - -// IO banking : indexes of m_iobank maps -#define CALRAM_ENTRY 0 -#define GPIB_ENTRY 1 -#define DIP_ENTRY 2 - -/**** optional debug outputs, must be before #include logmacro.*/ -#define DEBUG_PORTS (LOG_GENERAL << 1) -#define DEBUG_BANKING (LOG_GENERAL << 2) -#define DEBUG_BUS (LOG_GENERAL << 3) //not used after all -#define DEBUG_KEYPAD (LOG_GENERAL << 4) -#define DEBUG_LCD (LOG_GENERAL << 5) //low level -#define DEBUG_LCD2 (LOG_GENERAL << 6) -#define DEBUG_CAL (LOG_GENERAL << 7) - -#define VERBOSE (DEBUG_BUS) //can be combined, like (DEBUG_CAL | DEBUG_KEYPAD) - -#include "logmacro.h" - -/**** HP 3478A class **/ - - -namespace { - -class hp3478a_state : public driver_device -{ -public: - hp3478a_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - , m_nvram(*this, "nvram") - , m_nvram_raw(*this, "nvram") - , m_watchdog(*this, "watchdog") - , m_bank0(*this, "bank0") - , m_iobank(*this, "iobank") - , m_keypad(*this, "COL.%u", 0) - , m_calenable(*this, "CAL_EN") - { - } - - void hp3478a(machine_config &config); - -protected: - virtual void machine_start() override; - //virtual void machine_reset() override; //not needed? - -private: - uint8_t p1read(); - void p1write(uint8_t data); - void p2write(uint8_t data); - void nvwrite(offs_t offset, uint8_t data); - - void io_bank(address_map &map); - void i8039_io(address_map &map); - void i8039_map(address_map &map); - - required_device m_maincpu; - required_device m_nvram; - required_shared_ptr m_nvram_raw; - required_device m_watchdog; - required_memory_bank m_bank0; - required_device m_iobank; - required_ioport_array<4> m_keypad; - required_ioport m_calenable; - - /////////////// stuff for internal LCD emulation - // shoud be split to a separate driver - std::unique_ptr > m_outputs; - std::unique_ptr > m_annuns; - - void lcd_interface(uint8_t p2new); - void lcd_update_hinib(uint64_t shiftreg); - void lcd_update_lonib(uint64_t shiftreg); - void lcd_update_annuns(uint64_t shiftreg); - void lcd_map_chars(); - static uint32_t lcd_set_display(uint32_t segin); - - uint8_t m_lcd_bitcount; - uint8_t m_lcd_want; - uint64_t m_lcd_bitbuf; - enum class lcd_state : uint8_t { - IDLE, - SYNC_SKIP, - SELECTED_ISA, - SELECTED_IWA - } m_lcdstate; - enum class lcd_iwatype : uint8_t { - ANNUNS, - REG_A, - REG_B, - REG_C, - DISCARD - } m_lcdiwa; - uint8_t m_lcd_chrbuf[12]; //raw digits (not ASCII) - uint8_t m_lcd_text[13]; //mapped to ASCII, only for debug output - uint32_t m_lcd_segdata[12]; - bool m_lcd_annuns[12]; //local copy of annunciators - /////////////////////////// - - - uint8_t m_p2_oldstate; //used to detect edges on Port2 IO pins. Should be saveable ? - uint8_t m_p1_oldstate; //for P17 edge detection (WDT reset) - -}; - - - -/***** callbacks */ -/* port1 manages the keypad matrix */ - -uint8_t hp3478a_state::p1read() -{ - unsigned i; - uint8_t data = m_maincpu->p1_r() | 0x0F; //P10-P13 "pull-up" - - // for each column, set Px=0 for pressed buttons (active low) - for (i = 0; i < 4; i++) { - if (!(data & (0x10 << i))) { - data &= (0xF0 | m_keypad[i]->read()); //not sure if the undefined upper bits will read as 1 ? - } - } - LOGMASKED(DEBUG_KEYPAD, "port1 read: 0x%02X\n", data); - return data; -} - -/* pin P17 rising edges also reset the external WDT counter */ -void hp3478a_state::p1write(uint8_t data) -{ - if (~m_p1_oldstate & data & 0x80) { - //P17 rising edge - m_watchdog->watchdog_reset(); - } - m_p1_oldstate = data; -} - -/** a lot of stuff multiplexed on the P2 pins. - * parse the chipselect lines, A12 line, and LCD interface. - */ -void hp3478a_state::p2write(uint8_t data) -{ - LOGMASKED(DEBUG_PORTS, "port2 write: %02X\n", data); - - // check which CS line is active. No collision checking is done here - // because the LCD interface reuses those pins and we'd get spurious errors. - // So the last evaluated condition will be kept. - - if (!(data & CALRAM_CS)) { - //will read lower 4 bits from calram - m_iobank->set_bank(CALRAM_ENTRY); - } - if (!(data & DIPSWITCH_CS)) { - m_iobank->set_bank(DIP_ENTRY); - } - if (!(data & GPIB_CS)) { - m_iobank->set_bank(GPIB_ENTRY); - } - - if ((m_p2_oldstate ^ data) & A12_PIN) { - /* A12 pin state changed */ - if (data & A12_PIN) { - m_bank0->set_entry(1); - LOGMASKED(DEBUG_BANKING, "changed to bank1\n"); - } else { - m_bank0->set_entry(0); - LOGMASKED(DEBUG_BANKING, "changed to bank0\n"); - } - } - - if ((m_p2_oldstate ^ data) & DISP_MASK) { - /* display signals changed */ - lcd_interface(data); - } - - m_p2_oldstate = data; -} - - -/* CAL RAM write handler, to implement "CAL enable" front panel switch -*/ -void hp3478a_state::nvwrite(offs_t offset, uint8_t data) { - if (m_calenable->read()) { - m_nvram_raw[offset] = data; - LOGMASKED(DEBUG_CAL, "write %02X to cal[%02X]\n", data, offset); - } else { - LOGMASKED(DEBUG_CAL, "write %02X to cal[%02X]:dropped\n", data, offset); - } -} - - -/**** LCD emulation - * - * Yuck. Emulate serial LCD module interface. don't really want to make a separate driver for this... - * The protocol is common to many HP products of the era. Some sources have the instruction words written as 10-bit - * words, but it would appear more consistent (and matches the intent guessed from the disassembled functions) - * that they are actually 8-bit bytes. The 2-bit difference is a "bogus" 2 clock cycles for when SYNC or PWO changes ? - * -*/ - -/** charset copied from roc10937 driver. Some special chars are wrong. - * Interestingly, the 3478a usually doesn't use "0x30" for the number 0, but instead - * maps it to the character 'O' ! It does use 0x30 when printing the GPIB address however. - */ -static const uint16_t hpcharset[]= -{ // FEDC BA98 7654 3210 - 0x507F, // 0101 0000 0111 1111 @. - 0x44CF, // 0100 0100 1100 1111 A. - 0x153F, // 0001 0101 0011 1111 B. - 0x00F3, // 0000 0000 1111 0011 C. - 0x113F, // 0001 0001 0011 1111 D. - 0x40F3, // 0100 0000 1111 0011 E. - 0x40C3, // 0100 0000 1100 0011 F. - 0x04FB, // 0000 0100 1111 1011 G. - 0x44CC, // 0100 0100 1100 1100 H. - 0x1133, // 0001 0001 0011 0011 I. - 0x007C, // 0000 0000 0111 1100 J. - 0x4AC0, // 0100 1010 1100 0000 K. - 0x00F0, // 0000 0000 1111 0000 L. - 0x82CC, // 1000 0010 1100 1100 M. - 0x88CC, // 1000 1000 1100 1100 N. - 0x00FF, // 0000 0000 1111 1111 O. - 0x44C7, // 0100 0100 1100 0111 P. - 0x08FF, // 0000 1000 1111 1111 Q. - 0x4CC7, // 0100 1100 1100 0111 R. - 0x44BB, // 0100 0100 1011 1011 S. - 0x1103, // 0001 0001 0000 0011 T. - 0x00FC, // 0000 0000 1111 1100 U. - 0x22C0, // 0010 0010 1100 0000 V. - 0x28CC, // 0010 1000 1100 1100 W. - 0xAA00, // 1010 1010 0000 0000 X. - 0x9200, // 1001 0010 0000 0000 Y. - 0x2233, // 0010 0010 0011 0011 Z. - 0x00E1, // 0000 0000 1110 0001 [. - 0x8800, // 1000 1000 0000 0000 \. - 0x001E, // 0000 0000 0001 1110 ]. - 0x2800, // 0010 1000 0000 0000 ^. - 0x0030, // 0000 0000 0011 0000 _. - 0x0000, // 0000 0000 0000 0000 [space] , 0x20 - 0x8121, // 1000 0001 0010 0001 !. - 0x0180, // 0000 0001 1000 0000 ". - 0x553C, // 0101 0101 0011 1100 #. - 0x55BB, // 0101 0101 1011 1011 $. - 0x7799, // 0111 0111 1001 1001 %. - 0xC979, // 1100 1001 0111 1001 &. - 0x0200, // 0000 0010 0000 0000 '. - 0x0A00, // 0000 1010 0000 0000 (. - 0xA050, // 1010 0000 0000 0000 ). - 0xFF00, // 1111 1111 0000 0000 *. - 0x5500, // 0101 0101 0000 0000 +. - 0x0000, // 0000 0000 0000 0000 //XXX (0x2C) - 0x4400, // 0100 0100 0000 0000 --. - 0x0000, // 0000 0000 0000 0000 //XXX (0x2E) - 0x2200, // 0010 0010 0000 0000 /. - 0x22FF, // 0010 0010 1111 1111 0. (0x30) - 0x1100, // 0001 0001 0000 0000 1. - 0x4477, // 0100 0100 0111 0111 2. - 0x443F, // 0100 0100 0011 1111 3. - 0x448C, // 0100 0100 1000 1100 4. - 0x44BB, // 0100 0100 1011 1011 5. - 0x44FB, // 0100 0100 1111 1011 6. - 0x000F, // 0000 0000 0000 1111 7. - 0x44FF, // 0100 0100 1111 1111 8. - 0x44BF, // 0100 0100 1011 1111 9. - 0xFFFF, // 1111 1111 1111 1111 [all segs] (0x3A) - 0x2001, // 0010 0000 0000 0001 //XXX - 0x2230, // 0010 0010 0011 0000 <. - 0x4430, // 0100 0100 0011 0000 =. - 0x8830, // 1000 1000 0011 0000 >. - 0x1407, // 0001 0100 0000 0111 ?. -}; - -/** copy data in shiftreg to the high nibble of each digit in m_lcd_chrbuf */ -void hp3478a_state::lcd_update_hinib(uint64_t shiftreg) -{ - int i; - for (i=11; i >= 0; i--) { - m_lcd_chrbuf[i] &= 0x0F; - m_lcd_chrbuf[i] |= (shiftreg & 0x0F) << 4; - shiftreg >>= 4; - } -} - -/** copy data in shiftreg to the low nibble of each digit in m_lcd_chrbuf */ -void hp3478a_state::lcd_update_lonib(uint64_t shiftreg) -{ - int i; - for (i=11; i >= 0; i--) { - m_lcd_chrbuf[i] &= 0xF0; - m_lcd_chrbuf[i] |= (shiftreg & 0x0F); - shiftreg >>= 4; - } -} - - -/** update annunciators : 12 bits */ -void hp3478a_state::lcd_update_annuns(uint64_t shiftreg) -{ - int i; - for (i=11; i >= 0; i--) { - m_lcd_annuns[i] = (shiftreg & 0x01); - shiftreg >>=1; - } - std::copy(std::begin(m_lcd_annuns), std::end(m_lcd_annuns), std::begin(*m_annuns)); -} - -/** map LCD char to ASCII and segment data + update - * - * discards extra bits - */ -void hp3478a_state::lcd_map_chars() -{ - int i; - LOGMASKED(DEBUG_LCD2, "LCD : map "); - for (i=0; i < 12; i++) { - bool dp = m_lcd_chrbuf[i] & 0x40; //check decimal point. Needs to be mapped to seg_bit16 - bool comma = m_lcd_chrbuf[i] & 0x80; //check comma, maps to seg17 - m_lcd_text[i] = (m_lcd_chrbuf[i] & 0x3F) + 0x40; - m_lcd_segdata[i] = hpcharset[m_lcd_chrbuf[i] & 0x3F] | (dp << 16) | (comma << 17); - LOGMASKED(DEBUG_LCD2, "[%02X>%04X] ", m_lcd_chrbuf[i] & 0x3F, m_lcd_segdata[i]); - } - LOGMASKED(DEBUG_LCD2, "\n"); -} - -/** ?? from roc10937 */ -uint32_t hp3478a_state::lcd_set_display(uint32_t segin) -{ - return bitswap<32>(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); -} - -// ISA command bytes -#define DISP_ISA_WANNUN 0xBC //annunciators -#define DISP_ISA_WA 0x0A //low nibbles -#define DISP_ISA_WB 0x1A //hi nib -#define DISP_ISA_WC 0x2A // "extended bit" ? - -/** LCD serial interface state machine. I cheat and don't implement all commands. - * Also, it's not clear when exactly the display should be updated. After each regA/regB write - * seems to generate some glitches. After PWO deselect causes some half-written text to appear sometimes. - */ -void hp3478a_state::lcd_interface(uint8_t p2new) -{ - bool pwo_state, sync_state, isa_state, iwa_state; - - pwo_state = p2new & DISP_PWO; - sync_state = p2new & DISP_SYNC; - isa_state = p2new & DISP_ISA; - iwa_state = p2new & DISP_IWA; - - if (!((p2new ^ m_p2_oldstate) & DISP_CK1)) { - // no clock edge : boring. - //LOGMASKED(DEBUG_LCD, "LCD : pwo(%d), sync(%d), isa(%d), iwa(%d)\n", - // pwo_state, sync_state, isa_state, iwa_state); - return; - } - - if (!(p2new & DISP_CK1)) { - //neg edge - return; - } - - // CK1 clock positive edge - if (!pwo_state) { - //not selected, reset everything - LOGMASKED(DEBUG_LCD, "LCD : state=IDLE, PWO deselected, %d stray bits(0x...%02X)\n",m_lcd_bitcount, m_lcd_bitbuf & 0xFF); - m_lcdstate = lcd_state::IDLE; - m_lcdiwa = lcd_iwatype::DISCARD; - std::transform(std::begin(m_lcd_segdata), std::end(m_lcd_segdata), std::begin(*m_outputs), lcd_set_display); - m_lcd_bitcount = 0; - m_lcd_bitbuf = 0; - return; - } - switch (m_lcdstate) { - case lcd_state::IDLE: - m_lcd_want = 8; - m_lcdstate = lcd_state::SYNC_SKIP; - break; - case lcd_state::SYNC_SKIP: - // if SYNC changed, we need to ignore two clock pulses. - m_lcd_bitcount++; - if (m_lcd_bitcount < 1) { - break; - } - m_lcd_bitcount = 0; - m_lcd_bitbuf = 0; - if (sync_state) { - m_lcdstate = lcd_state::SELECTED_ISA; - m_lcd_want = 8; - LOGMASKED(DEBUG_LCD, "LCD : state=SELECTED_ISA\n"); - } else { - //don't touch m_lcd_want since it was possibly set in the ISA stage - m_lcdstate = lcd_state::SELECTED_IWA; - LOGMASKED(DEBUG_LCD, "LCD : state=SELECTED_IWA, want %d\n", m_lcd_want); - } - break; - case lcd_state::SELECTED_ISA: - if (!sync_state) { - //changing to SELECTED_IWA - m_lcdstate = lcd_state::SYNC_SKIP; - if (m_lcd_bitcount) { - LOGMASKED(DEBUG_LCD, "LCD : ISA->IWA, %d stray bits (0x%0X)\n", m_lcd_bitcount, m_lcd_bitbuf); - } else { - LOGMASKED(DEBUG_LCD, "LCD : ISA->IWA\n"); - } - m_lcd_bitcount = 0; - m_lcd_bitbuf = 0; - break; - } - m_lcd_bitbuf |= (isa_state << m_lcd_bitcount); - m_lcd_bitcount++; - if (m_lcd_bitcount != m_lcd_want) { - break; - } - LOGMASKED(DEBUG_LCD, "LCD : Instruction 0x%02X\n", m_lcd_bitbuf & 0xFF); - //shouldn't get extra bits, but we have nothing better to do so just reset the shiftreg. - m_lcd_bitcount = 0; - switch (m_lcd_bitbuf & 0xFF) { - case DISP_ISA_WANNUN: - m_lcd_want = 44; - m_lcdiwa = lcd_iwatype::ANNUNS; - break; - case DISP_ISA_WA: - m_lcd_want = 100; //no, doesn't fit in a uint64, but only the first 36 bits are significant. - m_lcdiwa = lcd_iwatype::REG_A; - break; - case DISP_ISA_WB: - m_lcd_want = 100; - m_lcdiwa = lcd_iwatype::REG_B; - break; - case DISP_ISA_WC: - m_lcd_want = 44; - m_lcdiwa = lcd_iwatype::REG_C; - break; - default: - m_lcd_want = 44; - m_lcdiwa = lcd_iwatype::DISCARD; - break; - } - m_lcd_bitbuf = 0; - break; - case lcd_state::SELECTED_IWA: - if (sync_state) { - //changing to SELECTED_ISA - m_lcdstate = lcd_state::SYNC_SKIP; - if (m_lcd_bitcount) { - LOGMASKED(DEBUG_LCD, "LCD : IWA->ISA, %d stray bits (0x%X)\n", m_lcd_bitcount, m_lcd_bitbuf); - } else { - LOGMASKED(DEBUG_LCD, "LCD : IWA->ISA\n"); - } - m_lcd_bitcount = 0; - m_lcd_bitbuf = 0; - break; - } - if (m_lcd_bitcount <= 0x3F) { - //clamp to bit 63; - m_lcd_bitbuf |= ((uint64_t) iwa_state << m_lcd_bitcount); - } - m_lcd_bitcount++; - if (m_lcd_bitcount != m_lcd_want) { - break; - } - LOGMASKED(DEBUG_LCD, "LCD : data 0x%X\n", m_lcd_bitbuf); - switch (m_lcdiwa) { - case lcd_iwatype::ANNUNS: - lcd_update_annuns(m_lcd_bitbuf); - LOGMASKED(DEBUG_LCD2, "LCD : write annuns 0x%02X\n", m_lcd_bitbuf & 0xFF); - break; - case lcd_iwatype::REG_A: - lcd_update_lonib(m_lcd_bitbuf); - lcd_map_chars(); - LOGMASKED(DEBUG_LCD2, "LCD : write reg A (lonib) %X, text=%s\n", m_lcd_bitbuf, (char *) m_lcd_text); - break; - case lcd_iwatype::REG_B: - lcd_update_hinib(m_lcd_bitbuf); - lcd_map_chars(); - LOGMASKED(DEBUG_LCD2, "LCD : write reg B (lonib) %X, text=%s\n", m_lcd_bitbuf, (char *) m_lcd_text); - break; - default: - //discard - break; - } - //shouldn't get extra bits, but we have nothing better to do so just reset the shiftreg. - m_lcd_bitcount = 0; - m_lcd_bitbuf = 0; - break; //case SELECTED_IWA - } - - return; -} - - - - - -void hp3478a_state::machine_start() -{ - m_bank0->configure_entries(0, 2, memregion("maincpu")->base(), 0x1000); - - m_outputs = std::make_unique >(*this, "vfd%u", (unsigned) 0); - m_outputs->resolve(); - m_annuns = std::make_unique >(*this, "ann%u", (unsigned) 0); - m_annuns->resolve(); - - m_watchdog->watchdog_enable(); - - m_p1_oldstate = 0; - m_p2_oldstate = 0; - -} - -/****************************************************************************** - Address Maps -******************************************************************************/ - -void hp3478a_state::i8039_map(address_map &map) -{ - map(0x0000, 0x0fff).bankr("bank0"); // CPU address space (4kB), banked according to P26 pin -} - -void hp3478a_state::i8039_io(address_map &map) -{ - map.global_mask(0xff); - map(0x00, 0xff).m(m_iobank, FUNC(address_map_bank_device::amap8)); -} - -/* depending on the P2 port state, different chipselect lines are activated, which - * affect the subsequent external accesses (movx) - * The addresses in here have nothing to do with the mcs48 address space. - */ -void hp3478a_state::io_bank(address_map &map) -{ - map.unmap_value_high(); - map(0x000, 0x0ff).ram().share("nvram").w(FUNC(hp3478a_state::nvwrite)); - map(0x100, 0x107).ram().share("gpibregs"); //XXX TODO : connect to i8291.cpp - map(0x200, 0x2ff).portr("DIP"); -} - - -/****************************************************************************** - Input Ports -******************************************************************************/ -static INPUT_PORTS_START( hp3478a ) -/* keypad bit matrix: - 0x08|0x04|0x02|0x01 - col.0 : (nc)|shift|ACA|DCA - col.1 : 4W|2W|ACV|DCV - col.2 : int|dn|up|auto - col.3 : (nc)|loc|srq|sgl -*/ - PORT_START("COL.0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("DCA") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("ACA") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("SHIFT") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) //nothing on 0x08 - PORT_START("COL.1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("DCV") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("ACV") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("2W") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("4W") - PORT_START("COL.2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("AUTO") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("UP") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("DN") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("INT") - PORT_START("COL.3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("SGL") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON13 ) PORT_NAME("SRQ") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON14 ) PORT_NAME("LOC") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) //nothing on 0x08 - - PORT_START("CAL_EN") - PORT_CONFNAME(1, 0, "CAL") - PORT_CONFSETTING(0x00, "disabled") - PORT_CONFSETTING(0x01, "enabled") - - PORT_START("DIP") - PORT_DIPNAME( 0x1f, 0x17, "HP-IB Bus Address" ) PORT_DIPLOCATION("DIP:1,2,3,4,5") - PORT_DIPSETTING( 0x00, "0" ) - PORT_DIPSETTING( 0x01, "1" ) - PORT_DIPSETTING( 0x02, "2" ) - PORT_DIPSETTING( 0x03, "3" ) - PORT_DIPSETTING( 0x04, "4" ) - PORT_DIPSETTING( 0x05, "5" ) - PORT_DIPSETTING( 0x06, "6" ) - PORT_DIPSETTING( 0x07, "7" ) - PORT_DIPSETTING( 0x08, "8" ) - PORT_DIPSETTING( 0x09, "9" ) - PORT_DIPSETTING( 0x0a, "10" ) - PORT_DIPSETTING( 0x0b, "11" ) - PORT_DIPSETTING( 0x0c, "12" ) - PORT_DIPSETTING( 0x0d, "13" ) - PORT_DIPSETTING( 0x0e, "14" ) - PORT_DIPSETTING( 0x0f, "15" ) - PORT_DIPSETTING( 0x10, "16" ) - PORT_DIPSETTING( 0x11, "17" ) - PORT_DIPSETTING( 0x12, "18" ) - PORT_DIPSETTING( 0x13, "19" ) - PORT_DIPSETTING( 0x14, "20" ) - PORT_DIPSETTING( 0x15, "21" ) - PORT_DIPSETTING( 0x16, "22" ) - PORT_DIPSETTING( 0x17, "23" ) - PORT_DIPSETTING( 0x18, "24" ) - PORT_DIPSETTING( 0x19, "25" ) - PORT_DIPSETTING( 0x1a, "26" ) - PORT_DIPSETTING( 0x1b, "27" ) - PORT_DIPSETTING( 0x1c, "28" ) - PORT_DIPSETTING( 0x1d, "29" ) - PORT_DIPSETTING( 0x1e, "30" ) - PORT_DIPSETTING( 0x1f, "31" ) - PORT_DIPNAME( 0x20, 0x00, "PWR ON SRQ" ) PORT_DIPLOCATION("DIP:6") - PORT_DIPSETTING( 0x00, "Disabled" ) - PORT_DIPSETTING( 0x20, "Enabled" ) - //0x40 unused - PORT_DIPNAME( 0x80, 0x00, "50/60Hz AC" ) PORT_DIPLOCATION("DIP:8") - PORT_DIPSETTING( 0x00, "60Hz" ) - PORT_DIPSETTING( 0x80, "50Hz" ) - -INPUT_PORTS_END - -/****************************************************************************** - Machine Drivers -******************************************************************************/ - -void hp3478a_state::hp3478a(machine_config &config) -{ - auto &mcu(I8039(config, "maincpu", CPU_CLOCK)); - mcu.set_addrmap(AS_PROGRAM, &hp3478a_state::i8039_map); - mcu.set_addrmap(AS_IO, &hp3478a_state::i8039_io); - mcu.p1_in_cb().set(FUNC(hp3478a_state::p1read)); - mcu.p1_out_cb().set(FUNC(hp3478a_state::p1write)); - mcu.p2_out_cb().set(FUNC(hp3478a_state::p2write)); - - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - - ADDRESS_MAP_BANK(config, m_iobank, 0); - m_iobank->set_map(&hp3478a_state::io_bank); - m_iobank->set_data_width(8); - m_iobank->set_addr_width(18); - m_iobank->set_stride(0x100); - - WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_ticks(3*5*(1<<19),CPU_CLOCK)); - - // video - config.set_default_layout(layout_hp3478a); -} - -/****************************************************************************** - ROM Definitions -******************************************************************************/ -ROM_START( hp3478a ) - ROM_REGION( 0x2000, "maincpu", 0 ) - ROM_LOAD("rom_dc118.bin", 0, 0x2000, CRC(10097ced) SHA1(bd665cf7e07e63f825b2353c8322ed8a4376b3bd)) // main CPU ROM, can match other datecodes too - - ROM_REGION( 0x100, "nvram", 0 ) // default data for battery-backed Calibration RAM - ROM_LOAD( "calram.bin", 0, 0x100, NO_DUMP) -ROM_END - -} // Anonymous namespace - - -/****************************************************************************** - Drivers -******************************************************************************/ - -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -SYST( 1983, hp3478a, 0, 0, hp3478a, hp3478a,hp3478a_state, empty_init, "HP", "HP 3478A Multimeter", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW ) diff --git a/src/mame/skeleton/hpz80unk.cpp b/src/mame/skeleton/hpz80unk.cpp deleted file mode 100644 index 4147444ed03..00000000000 --- a/src/mame/skeleton/hpz80unk.cpp +++ /dev/null @@ -1,232 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Robbbert -/*************************************************************************** - -HP Z80-based unknown in a large metal cage - -2012-05-25 Skeleton driver [Robbbert] - -http://www.classiccmp.org/hp/unknown Z80 computer/ - -Looks like roms are in 2 banks in range C000-FFFF. -BASIC is included, if we can find out how to access it. - -Commands: -Axxxx Disassemble (. to quit) -DAxxxx,yyyy Ascii Dump of memory -DBxxxx,yyyy Binary Dump of memory -DHxxxx,yyyy Hex Dump of memory -DOxxxx,yyyy Octal dump of memory -G -H -L -MMxxxx Modify Memory (. to quit) -Pxx Binary Display of Port -Pxx,xx Write to port -RC ??? -RF ??? -RM ??? -RT ??? -UC Displays 11111111 -US ??? -UZ Displays FFFF -W Punch papertape -X choose Q,V,R,P (Q to quit; others ask for ram and prom ranges) -Y nothing -Z nothing - - ToDo: - - Almost everything; there are a lot of I/O ports used - - Hook up rom banking - -****************************************************************************/ - -#include "emu.h" -#include "cpu/z80/z80.h" -#include "machine/ay31015.h" -#include "machine/clock.h" -#include "bus/rs232/rs232.h" - - -class hpz80unk_state : public driver_device -{ -public: - hpz80unk_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - , m_p_rom(*this, "rom") - , m_uart(*this, "uart%u", 1U) - { } - - void hpz80unk(machine_config &config); - -private: - u8 port00_r(); - u8 port02_r(); - u8 port03_r(); - u8 port0d_r(); - u8 portfc_r(); - - void io_map(address_map &map); - void mem_map(address_map &map); - - u8 m_port02_data = 0U; - void machine_reset() override; - void machine_start() override; - required_device m_maincpu; - required_shared_ptr m_p_rom; - required_device_array m_uart; -}; - -u8 hpz80unk_state::port00_r() -{ - return (m_uart[0]->dav_r() << 1) | (m_uart[0]->tbmt_r()) | 0xfc; -} - -u8 hpz80unk_state::port02_r() -{ - m_port02_data ^= 1; - return m_port02_data; -} - -u8 hpz80unk_state::port03_r() -{ - return (m_uart[1]->dav_r() << 1) | (m_uart[1]->tbmt_r()) | 0xfc; -} - -u8 hpz80unk_state::port0d_r() -{ - return (m_uart[2]->dav_r() << 1) | (m_uart[2]->tbmt_r()) | 0xfc; -} - -u8 hpz80unk_state::portfc_r() -{ - return 0xfe; // or it halts -} - -void hpz80unk_state::mem_map(address_map &map) -{ - map.unmap_value_high(); - map(0x0000, 0xbfff).ram(); - map(0xc000, 0xffff).rom().share("rom"); -} - -void hpz80unk_state::io_map(address_map &map) -{ - map.unmap_value_high(); - map.global_mask(0xff); - map(0x00, 0x00).r(FUNC(hpz80unk_state::port00_r)); // uart1 status - map(0x01, 0x01).rw("uart1", FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit)); // uart1 data - map(0x02, 0x02).r(FUNC(hpz80unk_state::port02_r)); - map(0x03, 0x03).r(FUNC(hpz80unk_state::port03_r)); // uart2 status - map(0x04, 0x04).rw("uart2", FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit)); // uart2 data - map(0x0d, 0x0d).r(FUNC(hpz80unk_state::port0d_r)); // uart3 status - map(0x0e, 0x0e).w("uart3", FUNC(ay31015_device::transmit)); // uart3 data - map(0x1d, 0x1e); // top of memory is written here, big-endian - map(0x1f, 0x1f).portr("DSW"); // select which uarts to use - map(0xfc, 0xfc).r(FUNC(hpz80unk_state::portfc_r)); -} - -/* Input ports */ -static INPUT_PORTS_START( hpz80unk ) - // this is a theoretical switch - PORT_START("DSW") - PORT_DIPNAME( 0x03, 0x00, "UART selection") - PORT_DIPSETTING( 0x00, "In UART1, Out UART1") - PORT_DIPSETTING( 0x01, "In UART1, Out UART2") - PORT_DIPSETTING( 0x02, "In UART1, Out UART3") - PORT_DIPSETTING( 0x03, "In UART2, Out UART1") -INPUT_PORTS_END - - -void hpz80unk_state::machine_start() -{ - save_item(NAME(m_port02_data)); -} - -void hpz80unk_state::machine_reset() -{ - u8* user1 = memregion("user1")->base(); - memcpy((u8*)m_p_rom, user1, 0x4000); - m_maincpu->set_pc(0xc000); - - // no idea if these are hard-coded, or programmable - for (auto &uart : m_uart) - { - uart->write_xr(0); - uart->write_xr(1); - uart->write_swe(0); - uart->write_np(1); - uart->write_tsb(0); - uart->write_nb1(1); - uart->write_nb2(1); - uart->write_eps(1); - uart->write_cs(1); - uart->write_cs(0); - } - - // this should be rom/ram banking -} - - -void hpz80unk_state::hpz80unk(machine_config &config) -{ - /* basic machine hardware */ - Z80(config, m_maincpu, XTAL(4'000'000)); - m_maincpu->set_addrmap(AS_PROGRAM, &hpz80unk_state::mem_map); - m_maincpu->set_addrmap(AS_IO, &hpz80unk_state::io_map); - - AY51013(config, m_uart[0]); // COM2502 - m_uart[0]->read_si_callback().set("rs232a", FUNC(rs232_port_device::rxd_r)); - m_uart[0]->write_so_callback().set("rs232a", FUNC(rs232_port_device::write_txd)); - m_uart[0]->set_auto_rdav(true); - RS232_PORT(config, "rs232a", default_rs232_devices, "terminal"); - - AY51013(config, m_uart[1]); // COM2502 - m_uart[1]->read_si_callback().set("rs232b", FUNC(rs232_port_device::rxd_r)); - m_uart[1]->write_so_callback().set("rs232b", FUNC(rs232_port_device::write_txd)); - m_uart[1]->set_auto_rdav(true); - RS232_PORT(config, "rs232b", default_rs232_devices, nullptr); - - AY51013(config, m_uart[2]); // COM2502 - m_uart[2]->read_si_callback().set("rs232c", FUNC(rs232_port_device::rxd_r)); - m_uart[2]->write_so_callback().set("rs232c", FUNC(rs232_port_device::write_txd)); - m_uart[2]->set_auto_rdav(true); - RS232_PORT(config, "rs232c", default_rs232_devices, nullptr); - - clock_device &uart_clock(CLOCK(config, "uart_clock", 153600)); - uart_clock.signal_handler().set(m_uart[0], FUNC(ay51013_device::write_tcp)); - uart_clock.signal_handler().append(m_uart[0], FUNC(ay51013_device::write_rcp)); - uart_clock.signal_handler().append(m_uart[1], FUNC(ay51013_device::write_tcp)); - uart_clock.signal_handler().append(m_uart[1], FUNC(ay51013_device::write_rcp)); - uart_clock.signal_handler().append(m_uart[2], FUNC(ay51013_device::write_tcp)); - uart_clock.signal_handler().append(m_uart[2], FUNC(ay51013_device::write_rcp)); -} - -/* ROM definition */ -ROM_START( hpz80unk ) - ROM_REGION( 0x8000, "user1", 0 ) - // 1st bank - ROM_LOAD( "u1", 0x0000, 0x0800, CRC(080cd04a) SHA1(42004af65d44e3507a4e0f343c5bf385b6377c40) ) - ROM_LOAD( "u3", 0x0800, 0x0800, CRC(694075e1) SHA1(3db62645ade6a7f454b2d505aecc1661284c8ce2) ) - ROM_LOAD( "u5", 0x1000, 0x0800, CRC(5573bd05) SHA1(68c8f02b3fe9d77ecb83df407ca78430e118004a) ) - ROM_LOAD( "u7", 0x1800, 0x0800, CRC(d18a304a) SHA1(69dd0486bb6e4c2a22ab9da863bfb962016a321b) ) - ROM_LOAD( "u9", 0x2000, 0x0800, CRC(f7a8665c) SHA1(e39d0ba4ce2dc773622d411a25f40a6a24b45449) ) - ROM_LOAD( "u11", 0x2800, 0x0800, CRC(6c1ac77a) SHA1(50ca04ff0a11bd1c7d96f4731cef50978266ecca) ) - ROM_LOAD( "u13", 0x3000, 0x0800, CRC(8b166911) SHA1(4301dcd6840d37ccfa5bff998a0d88bebe99dc31) ) - ROM_LOAD( "u15", 0x3800, 0x0800, CRC(c6300499) SHA1(1b62d2a85c8f0b6a817e4be73ee34e0d90515c00) ) - // 2nd bank - ROM_LOAD( "u2", 0x4000, 0x0800, CRC(080cd04a) SHA1(42004af65d44e3507a4e0f343c5bf385b6377c40) ) - ROM_LOAD( "u4", 0x4800, 0x0800, CRC(66c3745c) SHA1(d79fe764312a222ac64d325bf5f4abc7ca401d0f) ) - ROM_LOAD( "u6", 0x5000, 0x0800, CRC(80761b4c) SHA1(5f6a12fbba533308b9fe7067c67a836be436a6f0) ) - ROM_LOAD( "u8", 0x5800, 0x0800, CRC(64a2be18) SHA1(b11c08fdc9dc126038559462493f458ecdc78532) ) - ROM_LOAD( "u10", 0x6000, 0x0800, CRC(40244d09) SHA1(106f8f978de36df9f3ebbe1e2c959b60e53273a2) ) - ROM_LOAD( "u12", 0x6800, 0x0800, CRC(6eb01765) SHA1(66f9036a9f86cf3a79493330bbc06fb6932ab771) ) - ROM_LOAD( "u14", 0x7000, 0x0800, CRC(3410e682) SHA1(30d94c0c0b6478dab202a603edaccca943008e35) ) - ROM_LOAD( "u16", 0x7800, 0x0800, CRC(c03fdcab) SHA1(1081d787085add489c6e2a1d450e1a5790d18885) ) -ROM_END - -/* Driver */ - -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 1977, hpz80unk, 0, 0, hpz80unk, hpz80unk, hpz80unk_state, empty_init, "Hewlett-Packard", "unknown Z80-based mainframe", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/skeleton/ibm3153.cpp b/src/mame/skeleton/ibm3153.cpp deleted file mode 100644 index 385c5444429..00000000000 --- a/src/mame/skeleton/ibm3153.cpp +++ /dev/null @@ -1,135 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Robbbert -/*************************************************************************** - -IBM 3153 Terminal. - -2016-05-04 Skeleton driver. - -A green-screen terminal with a beeper. -Chip complement: -U1 K6T0808C10-DB70 (32k static ram) -U2 D-80C32-16 (cpu) -U3 DM74LS373N -U5 LM339N -U6 DM74LS125AN -U7 K6T0808C10-DB70 (ram) -U8 K6T0808C10-DB70 (ram) -U9 598-0013040 6491 3.19 (boot rom) -U10 DS1488N -U11 74LS377N -U12 DS1489AN -U13 LSI VICTOR 006-9802760 REV B WDB36003 Y9936 (video processor) -U14 74F00PC -U16 DM74LS125AN -U17 DS1488N -U18 DS1489AN -U25 SN74F04N -U100 74F07N -Crystals: -Y1 16.000 MHz -Y2 65.089 MHz -Y3 44.976 MHz - - -ToDo: -- Everything! - -****************************************************************************/ - -#include "emu.h" -#include "cpu/mcs51/mcs51.h" -#include "emupal.h" -#include "screen.h" - - -class ibm3153_state : public driver_device -{ -public: - ibm3153_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - , m_p_chargen(*this, "chargen") - { } - - void ibm3153(machine_config &config); - -private: - virtual void machine_reset() override; - void ibm3153_palette(palette_device &palette) const; - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - - void io_map(address_map &map); - void mem_map(address_map &map); - - required_device m_maincpu; - required_region_ptr m_p_chargen; -}; - - -void ibm3153_state::mem_map(address_map &map) -{ - map.unmap_value_high(); - map(0x00000, 0x0ffff).rom().region("user1", 0); -} - -void ibm3153_state::io_map(address_map &map) -{ - map(0x0000, 0xffff).ram(); - //map.unmap_value_high(); - //map.global_mask(0xff); -} - - -/* Input ports */ -static INPUT_PORTS_START( ibm3153 ) -INPUT_PORTS_END - -uint32_t ibm3153_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - return 0; -} - -void ibm3153_state::ibm3153_palette(palette_device &palette) const -{ - palette.set_pen_color(0, 0, 0, 0); // Black - palette.set_pen_color(1, 0, 255, 0); // Full - palette.set_pen_color(2, 0, 128, 0); // Dimmed -} - -void ibm3153_state::machine_reset() -{ -} - -void ibm3153_state::ibm3153(machine_config &config) -{ - /* basic machine hardware */ - I80C32(config, m_maincpu, XTAL(16'000'000)); // no idea of clock - m_maincpu->set_addrmap(AS_PROGRAM, &ibm3153_state::mem_map); - m_maincpu->set_addrmap(AS_IO, &ibm3153_state::io_map); - - /* video hardware */ - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ - screen.set_screen_update(FUNC(ibm3153_state::screen_update)); - screen.set_size(640, 240); - screen.set_visarea(0, 639, 0, 239); - screen.set_palette("palette"); - - PALETTE(config, "palette", FUNC(ibm3153_state::ibm3153_palette), 3); -} - -/* ROM definition */ -ROM_START( ibm3153 ) - ROM_REGION( 0x40000, "user1", 0 ) - ROM_LOAD("598-0013040_6491_3.19.u9", 0x0000, 0x040000, CRC(7092d690) SHA1(a23a5bd5eae90e9b31fa32ef4be1258612eaaa0a) ) - - ROM_REGION( 0x2000, "chargen", 0 ) - ROM_LOAD( "char.bin", 0x0000, 0x2000, NO_DUMP ) // probably inside the video processor -ROM_END - -/* Driver */ - -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 1999?, ibm3153, 0, 0, ibm3153, ibm3153, ibm3153_state, empty_init, "IBM", "IBM 3153 Terminal", MACHINE_IS_SKELETON) diff --git a/src/mame/skeleton/myvision.cpp b/src/mame/skeleton/myvision.cpp deleted file mode 100644 index 58c94b94f4f..00000000000 --- a/src/mame/skeleton/myvision.cpp +++ /dev/null @@ -1,257 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Wilbert Pol -/*************************************************************************** - - Nichibutsu My Vision - driver by Wilbert Pol - - 2013/12/01 Skeleton driver. - 2013/12/02 Working driver. - - Known issues: - - The inputs sometimes feel a bit unresponsive. Was the real unit like - that? Or is it just because we have incorrect clocks? - - TODO: - - Review software list - - Add clickable artwork - - Verify sound chip model - - Verify exact TMS9918 model - - Verify clock crystal(s) - - Verify size of vram - -****************************************************************************/ - - -#include "emu.h" - -#include "cpu/z80/z80.h" -#include "sound/ay8910.h" -#include "video/tms9928a.h" - -#include "bus/generic/slot.h" -#include "bus/generic/carts.h" - -#include "softlist_dev.h" -#include "speaker.h" - - -class myvision_state : public driver_device -{ -public: - myvision_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - , m_cart(*this, "cartslot") - , m_io_row0(*this, "ROW0") - , m_io_row1(*this, "ROW1") - , m_io_row2(*this, "ROW2") - , m_io_row3(*this, "ROW3") - { } - - void myvision(machine_config &config); - -private: - DECLARE_DEVICE_IMAGE_LOAD_MEMBER( cart_load ); - uint8_t ay_port_a_r(); - uint8_t ay_port_b_r(); - void ay_port_a_w(uint8_t data); - void ay_port_b_w(uint8_t data); - - void myvision_io(address_map &map); - void myvision_mem(address_map &map); - - virtual void machine_start() override; - virtual void machine_reset() override; - required_device m_maincpu; - required_device m_cart; - uint8_t m_column; - required_ioport m_io_row0; - required_ioport m_io_row1; - required_ioport m_io_row2; - required_ioport m_io_row3; -}; - - -void myvision_state::myvision_mem(address_map &map) -{ - map.unmap_value_high(); - //map(0x0000, 0x5fff) // mapped by the cartslot - map(0xa000, 0xa7ff).ram(); - map(0xe000, 0xe000).rw("tms9918", FUNC(tms9918a_device::vram_read), FUNC(tms9918a_device::vram_write)); - map(0xe002, 0xe002).rw("tms9918", FUNC(tms9918a_device::register_read), FUNC(tms9918a_device::register_write)); -} - - -void myvision_state::myvision_io(address_map &map) -{ - map.unmap_value_high(); - map.global_mask(0xff); - map(0x00, 0x00).w("ay8910", FUNC(ay8910_device::address_w)); - map(0x01, 0x01).w("ay8910", FUNC(ay8910_device::data_w)); - map(0x02, 0x02).r("ay8910", FUNC(ay8910_device::data_r)); -} - - -/* Input ports */ -/* - Keyboard layout is something like: - B - A D E - C - 1 2 3 4 5 6 7 8 9 10 11 12 13 14 - */ -static INPUT_PORTS_START( myvision ) - PORT_START("ROW0") - PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M) PORT_NAME("13") - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN) PORT_NAME("C/Down") - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_I) PORT_NAME("9") - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_E) PORT_NAME("5") - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_A) PORT_NAME("1") - - PORT_START("ROW1") - PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP) PORT_NAME("B/Up") - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_L) PORT_NAME("12") - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_H) PORT_NAME("8") - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_D) PORT_NAME("4") - - PORT_START("ROW2") - PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N) PORT_NAME("14/Start") - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_NAME("D/Right") - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_J) PORT_NAME("10") - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_F) PORT_NAME("6") - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_B) PORT_NAME("2") - - PORT_START("ROW3") - PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT) PORT_NAME("A/Left") - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_NAME("E") - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_K) PORT_NAME("11") - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_MAHJONG_G) PORT_NAME("7") - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_MAHJONG_C) PORT_NAME("3") - -INPUT_PORTS_END - - -void myvision_state::machine_start() -{ - if (m_cart->exists()) - m_maincpu->space(AS_PROGRAM).install_read_handler(0x0000, 0x5fff, read8sm_delegate(*m_cart, FUNC(generic_slot_device::read_rom))); - - save_item(NAME(m_column)); -} - - -void myvision_state::machine_reset() -{ - m_column = 0xff; -} - - -DEVICE_IMAGE_LOAD_MEMBER( myvision_state::cart_load ) -{ - uint32_t size = m_cart->common_get_size("rom"); - - if (size != 0x4000 && size != 0x6000) - { - image.seterror(image_error::INVALIDIMAGE, "Unsupported cartridge size"); - return image_init_result::FAIL; - } - - m_cart->rom_alloc(size, GENERIC_ROM8_WIDTH, ENDIANNESS_LITTLE); - m_cart->common_load_rom(m_cart->get_rom_base(), size, "rom"); - - return image_init_result::PASS; -} - - -uint8_t myvision_state::ay_port_a_r() -{ - uint8_t data = 0xFF; - - if ( ! ( m_column & 0x80 ) ) - { - data &= m_io_row0->read(); - } - - if ( ! ( m_column & 0x40 ) ) - { - data &= m_io_row1->read(); - } - - if ( ! ( m_column & 0x20 ) ) - { - data &= m_io_row2->read(); - } - - if ( ! ( m_column & 0x10 ) ) - { - data &= m_io_row3->read(); - } - - return data; -} - - -uint8_t myvision_state::ay_port_b_r() -{ - return 0xff; -} - - -void myvision_state::ay_port_a_w(uint8_t data) -{ -} - - -// Upper 4 bits select column -void myvision_state::ay_port_b_w(uint8_t data) -{ - m_column = data; -} - -void myvision_state::myvision(machine_config &config) -{ - /* basic machine hardware */ - Z80(config, m_maincpu, XTAL(10'738'635)/3); /* Not verified */ - m_maincpu->set_addrmap(AS_PROGRAM, &myvision_state::myvision_mem); - m_maincpu->set_addrmap(AS_IO, &myvision_state::myvision_io); - - /* video hardware */ - tms9918a_device &vdp(TMS9918A(config, "tms9918", XTAL(10'738'635))); /* Exact model not verified */ - vdp.set_screen("screen"); - vdp.set_vram_size(0x4000); /* Not verified */ - vdp.int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); - SCREEN(config, "screen", SCREEN_TYPE_RASTER); - - /* sound hardware */ - SPEAKER(config, "mono").front_center(); - ay8910_device &ay8910(AY8910(config, "ay8910", XTAL(10'738'635)/3/2)); /* Exact model and clock not verified */ - ay8910.port_a_read_callback().set(FUNC(myvision_state::ay_port_a_r)); - ay8910.port_b_read_callback().set(FUNC(myvision_state::ay_port_b_r)); - ay8910.port_a_write_callback().set(FUNC(myvision_state::ay_port_a_w)); - ay8910.port_b_write_callback().set(FUNC(myvision_state::ay_port_b_w)); - ay8910.add_route(ALL_OUTPUTS, "mono", 0.50); - - /* cartridge */ - generic_cartslot_device &cartslot(GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, "myvision_cart")); - cartslot.set_device_load(FUNC(myvision_state::cart_load)); - //cartslot.set_must_be_loaded(true); - - /* software lists */ - SOFTWARE_LIST(config, "cart_list").set_original("myvision"); -} - -/* ROM definition */ -ROM_START( myvision ) - ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) -ROM_END - -/* Driver */ - -// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLN AME FLAGS -CONS( 1983, myvision, 0, 0, myvision, myvision, myvision_state, empty_init, "Nichibutsu", "My Vision (KH-1000)", 0 ) diff --git a/src/mame/skeleton/newton.cpp b/src/mame/skeleton/newton.cpp deleted file mode 100644 index f9c6f787516..00000000000 --- a/src/mame/skeleton/newton.cpp +++ /dev/null @@ -1,194 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz -/*************************************************************************** - - Apple Newton devices skeleton driver - - CPUs: - Newton MessagePad: ARM 610 (20MHz) - ExpertPad PI-7000: ARM 610 (20MHz) - Newton MessagePad 100: ARM 610 (20MHz) - Newton MessagePad 110: ARM 610 (20MHz) - Newton MessagePad 120: ARM 610 (20MHz) - Marco: ARM 610 (20MHz) - Newton MessagePad 130: ARM 610 (20MHz) - - eMate 300: ARM 710a (25MHz) - - Newton MessagePad 2000: StrongARM SA-110 (162MHz) - Newton MessagePad 2100: StrongARM SA-110 (162MHz) - -****************************************************************************/ - -#include "emu.h" -#include "cpu/arm7/arm7.h" -#include "cpu/arm7/arm7core.h" -#include "machine/ram.h" -#include "emupal.h" -#include "screen.h" - -class newton_state : public driver_device -{ -public: - newton_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - , m_ram(*this, "ram") - { } - - void gen1(machine_config &config); - void mp120(machine_config &config); - void marco(machine_config &config); - void mp130(machine_config &config); - void emate(machine_config &config); - void mp2000(machine_config &config); - void mp2100(machine_config &config); - -protected: - void mem_map(address_map &map); - - uint32_t tick_count_r(); - - required_device m_maincpu; - required_device m_ram; - - uint32_t m_ram_size = 0; -}; - -uint32_t newton_state::tick_count_r() -{ - return (uint32_t)m_maincpu->total_cycles(); -} - -void newton_state::mem_map(address_map &map) -{ - map(0x00000000, 0x007fffff).mirror(0x00800000).rom().region("maincpu", 0); - map(0x02000000, 0x023fffff).ram(); // Actually Flash - map(0x04000000, 0x04ffffff).rw(m_ram, FUNC(ram_device::read), FUNC(ram_device::write)); - map(0x0f181800, 0x0f181803).r(FUNC(newton_state::tick_count_r)); - map(0x0f001800, 0x0f001803).lrw32(NAME([this](){ return m_ram_size; }), NAME([this](uint32_t data) { m_ram_size = data; })); -} - -static INPUT_PORTS_START( newton ) -INPUT_PORTS_END - -void newton_state::gen1(machine_config &config) -{ - ARM7(config, m_maincpu, XTAL(20'000'000)); // really ARM610 - m_maincpu->set_addrmap(AS_PROGRAM, &newton_state::mem_map); - - RAM(config, m_ram); - m_ram->set_default_size("640K"); -} - -void newton_state::mp120(machine_config &config) -{ - gen1(config); - m_ram->set_default_size("1M"); - m_ram->set_extra_options("2M"); -} - -void newton_state::marco(machine_config &config) -{ - gen1(config); - m_ram->set_extra_options("687K"); -} - -void newton_state::mp130(machine_config &config) -{ - gen1(config); - m_ram->set_default_size("2560K"); -} - -void newton_state::emate(machine_config &config) -{ - ARM710A(config, m_maincpu, 162000000); - m_maincpu->set_addrmap(AS_PROGRAM, &newton_state::mem_map); - - RAM(config, m_ram); - m_ram->set_default_size("1M"); - m_ram->set_extra_options("2M"); -} - -void newton_state::mp2000(machine_config &config) -{ - ARM710A(config, m_maincpu, 162000000); // really SA110 - m_maincpu->set_addrmap(AS_PROGRAM, &newton_state::mem_map); - - RAM(config, m_ram); - m_ram->set_default_size("1M"); -} - -void newton_state::mp2100(machine_config &config) -{ - mp2000(config); - m_ram->set_default_size("4M"); -} - -/* ROM definition */ -ROM_START( newtnotp ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "v10b1.rom", 0x000000, 0x400000, CRC(9fec5b35) SHA1(87ae4afe72814117f9100b67c6fda7010463a0f8), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( newtonmp ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROM_SYSTEM_BIOS(0, "v100", "v1.00") - ROMX_LOAD( "v100.rom", 0x000000, 0x400000, CRC(bab51f17) SHA1(5e754fe7db01ec3c331ff4d71b2dc4565eafce98), ROM_BIOS(0) | ROM_REVERSE | ROM_GROUPDWORD ) - ROM_SYSTEM_BIOS(1, "v13", "v1.3") - ROMX_LOAD( "v13.rom", 0x000000, 0x400000, CRC(8976832c) SHA1(964d07743589cf854fbbcd5e51e3289b739d8050), ROM_BIOS(1) | ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( spi7000 ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "v110.rom", 0x000000, 0x400000, CRC(0a2e0d96) SHA1(1e8e4c74ca19eee120b2647b267e2c467b668f1f), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( mp110 ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "v12.rom", 0x000000, 0x400000, CRC(291aac40) SHA1(517094fc26702b82d558d0c9d677a91de25d0b7f), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( mp120 ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "v13.rom", 0x000000, 0x400000, CRC(d8a34419) SHA1(deda5023dbcb0c11bd6384e444a800c4a271312c), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( motmarco ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "v13 444347.rom", 0x000000, 0x400000, CRC(ad79abc5) SHA1(5c4731008ac402b8f0be37158482b61b36e247cc), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( mp130 ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "v2x.rom", 0x000000, 0x800000, CRC(88ac9c6c) SHA1(44e33b72328974ed0ac41a13fe0e56bf97d15be3), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( emate ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "emate300.rom", 0x000000, 0x800000, CRC(782ea604) SHA1(dcc42e45a6914c7a771819856a1fa05892fe0519), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( mp2000 ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "mp2000.rom", 0x000000, 0x800000, CRC(9001b0f8) SHA1(06751fa69b791febae7267e0486aa15eea933a53), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -ROM_START( mp2100 ) - ROM_REGION32_LE( 0x800000, "maincpu", 0 ) - ROMX_LOAD( "mp2100.rom", 0x000000, 0x800000, CRC(81d5efc6) SHA1(82a191652b2689ce0e254ee11c6f43c84b5185cc), ROM_REVERSE | ROM_GROUPDWORD ) -ROM_END - -/* Driver */ - -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -CONS( 1992, newtnotp, 0, 0, gen1, newton, newton_state, empty_init, "Apple Computer", "Newton Notepad (prototype)", MACHINE_IS_SKELETON ) -CONS( 1993, newtonmp, 0, 0, gen1, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad", MACHINE_IS_SKELETON ) -CONS( 1993, spi7000, 0, 0, gen1, newton, newton_state, empty_init, "Sharp", "ExpertPad PI-7000", MACHINE_IS_SKELETON ) -CONS( 1994, mp110, 0, 0, gen1, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 110", MACHINE_IS_SKELETON ) -CONS( 1995, mp120, 0, 0, mp120, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 120", MACHINE_IS_SKELETON ) -CONS( 1995, motmarco, 0, 0, marco, newton, newton_state, empty_init, "Motorola", "Marco", MACHINE_IS_SKELETON ) -CONS( 1996, mp130, 0, 0, mp130, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 130", MACHINE_IS_SKELETON ) -CONS( 1997, emate, 0, 0, emate, newton, newton_state, empty_init, "Apple Computer", "eMate 300", MACHINE_IS_SKELETON ) -CONS( 1997, mp2000, 0, 0, mp2000, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 2000", MACHINE_IS_SKELETON ) -CONS( 1997, mp2100, 0, 0, mp2100, newton, newton_state, empty_init, "Apple Computer", "Newton MessagePad 2100", MACHINE_IS_SKELETON ) diff --git a/src/mame/skeleton/notetaker.cpp b/src/mame/skeleton/notetaker.cpp deleted file mode 100644 index 8e5aa1f9585..00000000000 --- a/src/mame/skeleton/notetaker.cpp +++ /dev/null @@ -1,998 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Jonathan Gevaryahu -/* Xerox NoteTaker, 1978 - * Driver by Jonathan Gevaryahu - - * Notetaker Team At Xerox PARC 1976-1981: - Alan Kay - Team Lead - Bruce Horn - BIOS code and NoteTaker Hardware/Electronics Design (Ethernet, others) - Ted Kaehler - SmallTalk-76 code porting[2] and more ( http://tedkaehler.weather-dimensions.com/us/ted/index.html ) - Dan Ingalls - Later BitBlt engine and SmallTalk-76 kernel and more[3] - Doug Fairbairn - NoteTaker Hardware/Electronics Design (EmulatorP, IOP, ADC, Alto Debug/Test Interface) - ( http://www.computerhistory.org/atchm/author/dfairbairn/ ) - Ed Wakida - NoteTaker Hardware/Electronics Design (Tablet/Touch interface) - Bob Nishimura - NoteTaker Hardware/Electronics Design (PSU/Cabling/Machining/Battery) - James "Jim" Leung - NoteTaker Hardware/Electronics Design (Alto Debug/Test Interface) - Ron Freeman - NoteTaker Hardware/Electronics Design (Keyboard, Disk/Display) - Ben Sato - NoteTaker Hardware/Electronics Design (Memory/Timing, ECC) - B. Wang - NoteTaker Hardware/Electronics Design (Keyboard) - Larry Tesler - NoteTaker Hardware/Electronics Design (Ethernet, others) - Dale Mann - NoteTaker Hardware/Electronics Design (Ethernet, Circuit Assembly) - Lawrence "Larry" D. Stewart - NoteTaker Hardware/Electronics Design (Mouse) - Jim Althoff - Smalltalk-78 and Smalltalk-80 - Adele Goldberg - Smalltalk team - Diana Merry-Shapiro - Original BitBlt from Smalltalk-72 - Dave Robson - Smalltalk team - Ted Strollo - IC/VLSI design (MPC580 cell library) - Bert Sutherland - Manager of Systems Science Laboratory (SSL) - Terri Doughty - Administration, Editing - Chris Jeffers - Smalltalk music - - - * History of the machine can be found at http://freudenbergs.de/bert/publications/Ingalls-2014-Smalltalk78.pdf - - * The notetaker has an 8-slot backplane, with the following cards in it: - * I/O Processor card (8086@8Mhz, 8259pic, 4k ROM, Keyboard UART, DAC1200 (multiplexed to 2 channels)) - * Emulation Processor card (8086@5Mhz, 8259pic, 8k of local RAM with Parity check logic) - * Disk/Display card (WD1791 FDC, CRT5027 CRTC, EIA UART, AD571 ADC, 8->1 Analog Multiplexer) - * Memory Control Module \_ (bus control, buffering, refresh, Parity/ECC/Syndrome logic lives on these boards) - * Memory Data Module / - * Memory Storage Module x2 (the 4116 DRAMs live on these boards) - * Battery Module *OR* debugger module type A or B (debugger module has an - i8255 on it for alto<->notetaker comms, and allows alto to halt the cpus - [type A and B can debug either the emulator cpu or the iop respectively] - and dump registers to alto screen, etc) - - * In 1980-1981 an Ethernet card with another 8086 on it was developed, but - it is unclear if this was ever fully functional, or if smalltalk-78 - could even use it. - - * Prototypes only, 10 units[2] manufactured 1978-1980 - Known surviving units: - * One at CHM (missing? mouse, no media, has BIOP-2.0 roms) - * One at Xerox Museum at PARC (with mouse and 2? floppies, floppies were not imaged to the best of my knowledge, unknown roms) - * Rumor has it at least a few of the remaining units survived beyond these two. - - * The NoteTaker used the BitBlt graphical operation (from SmallTalk-76) to do most graphical functions, in order to fit the SmallTalk code and programs within 256K of RAM[2]. The actual BitBlt code lives in ROM[3]. - - * As far as I am aware, no media (world disks/boot disks) for the NoteTaker have survived (except maybe the two disks at Xerox Museum at PARC), but an incomplete dump of the Smalltalk-76 'world' which was used to bootstrap Smalltalk-78 originally did survive on the Alto disks at CHM - - * We are missing the dump for the i8748 Keyboard MCU which does row-column scanning and mouse quadrature reading, and talks to the main system via serial - - * see http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker for additional information - * see http://xeroxalto.computerhistory.org/Filene/Smalltalk-76/ for the smalltalk-76 dump - * see http://xeroxalto.computerhistory.org/Indigo/BasicDisks/Smalltalk14.bfs!1_/ for more notetaker/smalltalk related files, including SmallTalk-80 files based on the notetaker smalltalk-78 - - References: - * [1] http://freudenbergs.de/bert/publications/Ingalls-2014-Smalltalk78.pdf - * [2] "Smalltalk and Object Orientation: An Introduction" By John Hunt, pages 45-46 [ISBN 978-3-540-76115-0] - * [3] http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790620_Z-IOP_1.5_ls.pdf - * [4] http://xeroxalto.computerhistory.org/Filene/Smalltalk-76/ - * [5] http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790118_NoteTaker_System_Manual.pdf - -TODO: everything below. -* Get smalltalk-78 loaded as a rom and forced into ram on startup, since no boot disks have survived (or if any survived, they are not dumped) -* Hack together a functional boot disk using the recovered EP bootloader and smalltalk engine code from the alto disks. -* Harris 6402 keyboard UART (within keyboard, next to MCU) -* The harris 6402 UART is pin compatible with WD TR1865 UART, as well as the AY-3-1015A/D - (These are 5v-only versions of the older WD TR1602 and AY-5-1013 parts which used 5v and 12v) -* HLE for the missing i8748[5] MCU in the keyboard which reads the mouse quadratures and buttons and talks serially to the Keyboard UART -* floppy controller wd1791 and its interrupt - According to [3] and [5] the format is double density/MFM, 128 bytes per sector, 16 sectors per track, 1 or 2 sided, for 170K or 340K per disk. Drive spins at 300RPM. -* hook up the DiskInt from the wd1791 either using m_fdc->intrq_r() polling or using device lines (latter is a much better idea) - -WIP: -* crt5027 video controller - the iop side is hooked up, screen drawing 'works' but is scrambled due to not emulating the clock chain halting and clock changing yet. The crt5027 core also needs the odd/even interrupt hooked up, and proper interlace support as well as clock change/screen resize support (down to DC/no clock, which I guess should be a 1x1 single black pixel!) -* pic8259 interrupt controller - this is attached as a device, but only the vblank interrupt is hooked to it yet. -* Harris 6402 serial/EIA UART - connected to iop, other end isn't connected anywhere, interrupt is not connected -* Harris 6402 keyboard UART (within notetaker) - connected to iop, other end isn't connected anywhere, interrupt is not connected -* The DAC, its FIFO and its timer are hooked up and the v2.0 bios beeps, but the stereo latches are not hooked up at all, DAC is treated as mono for now - -DONE: -* i/o cpu i/o area needs the memory map worked out per the schematics - done -* figure out the correct memory maps for the 256kB of shared ram, and what part of ram constitutes the framebuffer - done - - 256k of shared ram maps at 00000-3ffff for both cpus with special mem regs at fffec,fffee. the ram mirrors 4 times on the emulatorcpu only, iop the 40000-fffff area is open bus. - - framebuffer, at least for bios 1.5, lives from 0x4000-0xd5ff, exactly 640x480 pixels 1bpp, interlaced (even? plane is at 4000-8aff, odd? plane is at 8b00-d5ff); however the starting address of the framebuffer is configurable to any address within the 0x0000-0x1ffff range? (this exact range is unclear) -* figure out how the emulation-cpu boots and where its 8k of local ram maps to - done - - both cpus boot, reset and system int controls are accessed at fffea from either cpu; emulatorcpu's 8k of ram lives at the beginning of its address space, but can be disabled in favor of mainram at the same addresses -* 82s147 DISKSEP PROM regenerated from original BCPL code -* SETMEMREQ PROM retyped from binary listing -* TIMING PROM retyped from binary listing -*/ - -#include "emu.h" -#include "cpu/i86/i86.h" -#include "imagedev/floppy.h" -#include "machine/ay31015.h" -#include "machine/clock.h" -#include "machine/pic8259.h" -#include "machine/wd_fdc.h" -#include "sound/dac.h" -#include "video/tms9927.h" -#include "emupal.h" -#include "screen.h" -#include "speaker.h" - -#define LOG_VIDEO (1U << 1) -#define LOG_READOP_STATUS (1U << 2) -#define LOG_FIFO (1U << 3) -#define LOG_SPC_DSP (1U << 4) -#define LOG_FIFO_VERBOSE (1U << 5) - -#define VERBOSE (0) -#include "logmacro.h" - -class notetaker_state : public driver_device -{ -public: - notetaker_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag) , - m_iop_cpu(*this, "iop_cpu"), - m_iop_pic(*this, "iop_pic8259"), - m_ep_cpu(*this, "ep_cpu"), - m_ep_pic(*this, "ep_pic8259"), - m_kbduart(*this, "kbduart"), - m_eiauart(*this, "eiauart"), - m_crtc(*this, "crt5027"), - m_dac(*this, "dac"), - m_fdc(*this, "wd1791"), - m_floppy0(*this, "wd1791:0"), - m_floppy(nullptr) - { - } - - void notetakr(machine_config &config); - -private: - virtual void machine_start() override; - virtual void machine_reset() override; - virtual void driver_start() override; - - void iop_io(address_map &map); - void iop_mem(address_map &map); - void ep_io(address_map &map); - void ep_mem(address_map &map); - - // devices - required_device m_iop_cpu; - required_device m_iop_pic; - required_device m_ep_cpu; - required_device m_ep_pic; - required_device m_kbduart; - required_device m_eiauart; - required_device m_crtc; - required_device m_dac; - required_device m_fdc; - required_device m_floppy0; - floppy_image_device *m_floppy; - - std::unique_ptr m_mainram; - - // screen - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - // basic io - void ipcon_reg_w(uint16_t data); - void epcon_reg_w(uint16_t data); - void fifo_reg_w(uint16_t data); - void fifo_bus_w(uint16_t data); - void disk_reg_w(uint16_t data); - void load_disp_addr_w(uint16_t data); - - // uarts - uint16_t read_op_status_r(); - void load_key_ctl_reg_w(uint16_t data); - void key_data_reset_w(uint16_t data); - void key_chip_reset_w(uint16_t data); - uint16_t read_eia_status_r(); - void load_eia_ctl_reg_w(uint16_t data); - void eia_data_reset_w(uint16_t data); - void eia_chip_reset_w(uint16_t data); - - // mem map stuff - uint16_t iop_r(offs_t offset); - void iop_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t ep_mainram_r(offs_t offset, uint16_t mem_mask); - void ep_mainram_w(offs_t offset, uint16_t data, uint16_t mem_mask); - - // IPConReg - uint8_t m_boot_seq_done = 0; - uint8_t m_proc_lock = 0; - uint8_t m_char_ctr = 0; - uint8_t m_disable_rom = 0; - uint8_t m_corr_on_q = 0; - uint8_t m_led_ind6 = 0; - uint8_t m_led_ind7 = 0; - uint8_t m_led_ind8 = 0; - - // FIFOReg - uint8_t m_tablet_y_on = 0; - uint8_t m_tablet_x_on = 0; - uint8_t m_fr_sel2 = 0; - uint8_t m_fr_sel1 = 0; - uint8_t m_fr_sel0 = 0; - uint8_t m_sh_conb = 0; - uint8_t m_sh_cona = 0; - uint8_t m_set_sh = 0; - - // DiskReg - uint8_t m_adc_spd0 = 0; - uint8_t m_adc_spd1 = 0; - uint8_t m_stopword_clock_q = 0; - uint8_t m_clr_diskcont_q = 0; - uint8_t m_prog_bitclk1 = 0; - uint8_t m_prog_bitclk2 = 0; - uint8_t m_prog_bitclk3 = 0; - uint8_t m_an_sel4 = 0; - uint8_t m_an_sel2 = 0; - uint8_t m_an_sel1 = 0; - uint8_t m_drive_sel1 = 0; - uint8_t m_drive_sel2 = 0; - uint8_t m_drive_sel3 = 0; - uint8_t m_side_select = 0; - uint8_t m_disk_5v_on = 0; - uint8_t m_disk_12v_on = 0; - - // output fifo, for DAC - uint16_t m_outfifo[16]; // technically three 74LS225 5bit*16stage FIFO chips, arranged as a 16 stage, 12-bit wide fifo (one bit unused per chip) - uint8_t m_outfifo_count = 0; - uint8_t m_outfifo_tail_ptr = 0; - uint8_t m_outfifo_head_ptr = 0; - - // fifo timer - emu_timer *m_fifo_timer = nullptr; - TIMER_CALLBACK_MEMBER(timer_fifoclk); - - // framebuffer display starting address - uint16_t m_disp_addr = 0; - - void iop_reset(); - void ep_reset(); -}; - -TIMER_CALLBACK_MEMBER(notetaker_state::timer_fifoclk) -{ - //pop a value off the fifo and send it to the dac. - if (m_outfifo_count == 0) - LOGMASKED(LOG_FIFO_VERBOSE, "output fifo is EMPTY! repeating previous sample!\n"); - - uint16_t data = m_outfifo[m_outfifo_tail_ptr]; - // if fifo is empty (tail ptr == head ptr), do not increment the tail ptr, otherwise do. - if (m_outfifo_count > 0) - { - m_outfifo_tail_ptr++; - m_outfifo_count--; - } - m_outfifo_tail_ptr &= 0xf; - m_dac->write(data); - m_fifo_timer->adjust(attotime::from_hz(((960_kHz_XTAL / 10) / 4) / ((m_fr_sel0 << 3) + (m_fr_sel1 << 2) + (m_fr_sel2 << 1) + 1))); -} - -uint32_t notetaker_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - // have to figure out what resolution we're drawing to here and draw appropriately to screen - // code borrowed/stolen from video/mac.cpp - uint32_t const video_base = (m_disp_addr << 3) & 0x1ffff; - uint16_t const *video_ram_field1 = &m_mainram[video_base / 2]; - uint16_t const *video_ram_field2 = &m_mainram[(video_base + 0x4b00) / 2]; - - LOGMASKED(LOG_VIDEO, "Video Base = 0x%05x\n", video_base); - - for (int y = 0; y < 480; y++) - { - uint16_t *const line = &bitmap.pix(y); - - for (int x = 0; x < 640; x += 16) - { - uint16_t const word = *((y & 1) ? video_ram_field2 : video_ram_field1)++; - for (int b = 0; b < 16; b++) - { - line[x + b] = BIT(word, 15 - b); - } - } - } - return 0; -} - -void notetaker_state::ipcon_reg_w(uint16_t data) -{ - m_boot_seq_done = BIT(data, 7); - m_proc_lock = BIT(data, 6); // bus lock for this processor (hold other processor in wait state) - m_char_ctr = BIT(data, 5); // battery charge control (incorrectly called 'Char counter' in source code) - m_disable_rom = BIT(data, 4); // disable rom at 0000-0fff - m_corr_on_q = BIT(data, 3); // CorrectionOn (ECC correction enabled); also LedInd5 - m_led_ind6 = BIT(data, 2); - m_led_ind7 = BIT(data, 1); - m_led_ind8 = BIT(data, 0); - popmessage("LEDS: CR1: %d, CR2: %d, CR3: %d, CR4: %d", BIT(data, 2), BIT(data, 3), BIT(data, 1), BIT(data, 0)); // cr1 and 2 are in the reverse order as expected, according to the schematic -} - -/* handlers for the two system hd6402s (ay-5-1013 equivalent) */ -/* * Keyboard hd6402 */ -uint16_t notetaker_state::read_op_status_r() // 74ls368 hex inverter at #l7 provides 4 bits, inverted -{ - uint16_t data = 0xfff0; - data |= (m_outfifo_count >= 1) ? 0 : 0x08; // m_fifo_out_rdy is true if the fifo has at least 1 word in it, false otherwise - data |= (m_outfifo_count < 16) ? 0 : 0x04; // m_fifo_in_rdy is true if the fifo has less than 16 words in it, false otherwise - // note /SWE is permanently enabled, so we don't enable it here for HD6402 reading - data |= m_kbduart->dav_r() ? 0 : 0x02; // DR - pin 19 - data |= m_kbduart->tbmt_r() ? 0 : 0x01; // TBRE - pin 22 - - LOGMASKED(LOG_READOP_STATUS, "ReadOPStatus read, returning %04x\n", data); - - return data; -} - -void notetaker_state::load_key_ctl_reg_w(uint16_t data) -{ - m_kbduart->write_cs(0); - m_kbduart->write_np(BIT(data, 4)); // PI - pin 35 - m_kbduart->write_tsb(BIT(data, 3)); // SBS - pin 36 - m_kbduart->write_nb2(BIT(data, 2)); // CLS2 - pin 37 - m_kbduart->write_nb1(BIT(data, 1)); // CLS1 - pin 38 - m_kbduart->write_eps(BIT(data, 0)); // EPE - pin 39 - m_kbduart->write_cs(1); -} - -void notetaker_state::key_data_reset_w(uint16_t data) -{ - m_kbduart->write_rdav(0); // DDR - pin 18 - m_kbduart->write_rdav(1); // '' -} - -void notetaker_state::key_chip_reset_w(uint16_t data) -{ - m_kbduart->write_xr(0); // MR - pin 21 - m_kbduart->write_xr(1); // '' -} - -/* FIFO (DAC) Stuff and ADC stuff */ -void notetaker_state::fifo_reg_w(uint16_t data) -{ - m_set_sh = BIT(data, 15); - m_sh_cona = BIT(data, 14); - m_sh_conb = BIT(data, 13); - m_fr_sel0 = BIT(data, 12); - m_fr_sel1 = BIT(data, 11); - m_fr_sel2 = BIT(data, 10); - m_tablet_x_on = BIT(data, 9); - m_tablet_y_on = BIT(data, 8); - m_fifo_timer->adjust(attotime::from_hz(((960_kHz_XTAL / 10) / 4) / ((m_fr_sel0 << 3) + (m_fr_sel1 << 2) + (m_fr_sel2 << 1) + 1))); - /* FIFO timer is clocked by 960khz divided by 10 (74ls162 decade counter), - divided by 4 (mc14568B with divider 1 pins set to 4), divided by - 1,3,5,7,9,11,13,15 (or 0,2,4,6,8,10,12,14?) - */ - // todo: handle tablet and sample/hold stuff as well - LOGMASKED(LOG_FIFO, "Write to 0x60 fifo_reg_w of %04x; fifo timer set to %d hz\n", data, ((960'000 / 10) / 4) / ((m_fr_sel0 << 3) + (m_fr_sel1 << 2) + (m_fr_sel2 << 1) + 1)); -} - -void notetaker_state::fifo_bus_w(uint16_t data) -{ - if (m_outfifo_count == 16) - { - LOGMASKED(LOG_SPC_DSP, "outfifo was full, write ignored!\n"); - return; - } - m_outfifo[m_outfifo_head_ptr] = data >> 4; - m_outfifo_head_ptr++; - m_outfifo_count++; - m_outfifo_head_ptr&=0xF; -} - -void notetaker_state::disk_reg_w(uint16_t data) -{ - /* See http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19781023_More_NoteTaker_IO_Information.pdf - but note that bit 12 (called bit 3 in documentation) was changed between - oct 1978 and 1979 to reset the disk controller digital-PLL as - ClrDiskCont' rather than acting as ProgBitClk0, which is permanently - wired high instead, meaning only the 4.5Mhz - 18Mhz dot clocks are - available for the CRTC. */ - m_adc_spd0 = BIT(data, 15); - m_adc_spd1 = BIT(data, 14); - m_stopword_clock_q = BIT(data, 13); - //if (!(m_clr_diskcont_q) && (data & 0x1000)) m_floppy->device_reset(); // reset on rising edge - m_clr_diskcont_q = BIT(data, 12); // originally ProgBitClk0, but co-opted later to reset the FDC's external PLL - m_prog_bitclk1 = BIT(data, 11); - m_prog_bitclk2 = BIT(data, 10); - m_prog_bitclk3 = BIT(data, 9); - m_an_sel4 = BIT(data, 8); - m_an_sel2 = BIT(data, 7); - m_an_sel1 = BIT(data, 6); - m_drive_sel1 = BIT(data, 5); - m_drive_sel2 = BIT(data, 4); // drive 2 not present on hardware, but could work if present - m_drive_sel3 = BIT(data, 3); // drive 3 not present on hardware, but could work if present - m_side_select = BIT(data, 2); - m_disk_5v_on = BIT(data, 1); - m_disk_12v_on = BIT(data, 0); - - // ADC stuff - //TODO - - // FDC stuff - // first handle the motor stuff; we'll clobber whatever was in m_floppy, then reset it to what it should be - m_floppy = m_floppy0->get_device(); - - // Disk5VOn and 12VOn can be thought of as a crude MotorOn signal as the motor won't run with either? of them missing. - // However, a tech note involves adding a patch so that MotorOn is only activated if the drive is actually selected. - m_floppy->mon_w(!(m_disk_5v_on && m_disk_12v_on && m_drive_sel1)); - - //m_floppy = m_floppy1->get_device(); - //m_floppy->mon_w(!(m_disk_5v_on && m_disk_12v_on && m_drive_sel2)); // Disk5VOn and 12VOn can be thought of as a crude MotorOn signal as the motor won't run with either? of them missing. - //m_floppy = m_floppy2->get_device(); - //m_floppy->mon_w(!(m_disk_5v_on && m_disk_12v_on && m_drive_sel3)); // Disk5VOn and 12VOn can be thought of as a crude MotorOn signal as the motor won't run with either? of them missing. - - // now restore m_floppy state to what it should be - if (m_drive_sel1) - m_floppy = m_floppy0->get_device(); - else - m_floppy = nullptr; - - m_fdc->set_floppy(m_floppy); // select the floppy - if (m_floppy) - { - m_floppy->ss_w(m_side_select); - } - - // CRTC clock rate stuff - //TODO -} - -void notetaker_state::load_disp_addr_w(uint16_t data) -{ - m_disp_addr = data; - // for future low level emulation: clear the current counter position here as well, as well as empty/reset the display fifo, and the setmemrq state. -} - -/* EIA hd6402 */ -uint16_t notetaker_state::read_eia_status_r() // 74ls368 hex inverter at #f1 provides 2 bits, inverted -{ - uint16_t data = 0xfffc; - // note /SWE is permanently enabled, so we don't enable it here for HD6402 reading - data |= m_eiauart->dav_r() ? 0 : 0x02; // DR - pin 19 - data |= m_eiauart->tbmt_r() ? 0 : 0x01; // TBRE - pin 22 - return data; -} - -void notetaker_state::load_eia_ctl_reg_w(uint16_t data) -{ - m_eiauart->write_cs(0); - m_eiauart->write_np(BIT(data, 4)); // PI - pin 35 - m_eiauart->write_tsb(BIT(data, 3)); // SBS - pin 36 - m_eiauart->write_nb2(BIT(data, 2)); // CLS2 - pin 37 - m_eiauart->write_nb1(BIT(data, 1)); // CLS1 - pin 38 - m_eiauart->write_eps(BIT(data, 0)); // EPE - pin 39 - m_eiauart->write_cs(1); -} - -void notetaker_state::eia_data_reset_w(uint16_t data) -{ - m_eiauart->write_rdav(0); // DDR - pin 18 - m_eiauart->write_rdav(1); // '' -} - -void notetaker_state::eia_chip_reset_w(uint16_t data) -{ - m_eiauart->write_xr(0); // MR - pin 21 - m_eiauart->write_xr(1); // '' -} - - -/* These next two members are memory map related for the iop */ -uint16_t notetaker_state::iop_r(offs_t offset) -{ - uint16_t *rom = (uint16_t *)(memregion("iop")->base()); - rom += 0x7f800; - uint16_t *ram = m_mainram.get(); - if (m_boot_seq_done == 0 || (m_disable_rom == 0 && (offset & 0x7f800) == 0)) - { - rom += offset & 0x7ff; - return *rom; - } - else - { - // are we in the FFFE8-FFFEF area where the parity/int/reset/etc stuff lives? - if (offset >= 0x7fff4) - { - logerror("attempt to read processor control regs at %d\n", offset << 1); - return 0xffff; - } - ram += offset; - return *ram; - } -} - -void notetaker_state::iop_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - //uint16_t tempword; - uint16_t *ram = m_mainram.get(); - if (m_boot_seq_done == 0 || (m_disable_rom == 0 && (offset & 0x7f800) == 0)) - { - logerror("attempt to write %04X to ROM-mapped area at %06X ignored\n", data, offset << 1); - return; - } - // are we in the FFFE8-FFFEF area where the parity/int/reset/etc stuff lives? - if (offset >= 0x7fff4) - { - logerror("attempt to write processor control regs at %d with %02X ignored\n", offset << 1, data); - } - COMBINE_DATA(&ram[offset]); -} - -/* Address map comes from http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf -a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 BootSeqDone DisableROM -mode 0: (to get the boot vector and for maybe 1 or 2 instructions afterward) -x x x x x x x x * * * * * * * * * * * * 0 x R ROM (writes are open bus) -mode 1: (during most of boot) -0 0 0 0 0 0 0 0 * * * * * * * * * * * * 1 0 R ROM (writes are open bus) -0 0 0 0 0 0 0 1 * * * * * * * * * * * * 1 0 RW RAM -0 0 0 0 0 0 1 * * * * * * * * * * * * * 1 0 RW RAM -x x x x x x x x x x x x x x 1 0 . Open Bus -mode 2: (during load of the emulatorcpu's firmware to the first 8k of shared ram which is on the emulatorcpu board) -0 0 * * * * * * * * * * * * * * * * * * 1 1 RW RAM -x x x x x x x x x x x x x x 1 1 . Open Bus - EXCEPT for the following, decoded by the memory address logic board: -1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 x 1 x . Open Bus -1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 x 1 x W FFFEA (Multiprocessor Control (reset/int/boot for each proc; data bits 3,2,1,0 = 0010 means IP, bits 3210 = 0111 means EP; all others ignored.)) -1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 x 1 x R FFFEC (Syndrome bits (gnd bit 15, parity bit 14, exp (ECC) bits 13-8, bits 7-0 are 'other' (?maybe highest address bits?) -1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 x 1 x R FFFEE (Parity Error Address: row bits 15-8, column bits 7-0; reading this acknowledges a parity interrupt) - -More or less: -BootSeqDone is 0, DisableROM is ignored, mem map is 0x00000-0xfffff reading is the 0x1000-long ROM, repeated every 0x1000 bytes. writing goes nowhere. -BootSeqDone is 1, DisableROM is 0, mem map is 0x00000-0x00fff reading is the 0x1000-long ROM, remainder of memory map goes to RAM or open bus. writing the ROM area goes nowhere, writing RAM goes to RAM. -BootSeqDone is 1, DisableROM is 1, mem map is entirely RAM or open bus for both reading and writing. -*/ - -void notetaker_state::iop_mem(address_map &map) -{ - /* - map(0x00000, 0x00fff).rom().region("iop", 0xff000); // rom is here if either BootSeqDone OR DisableROM are zero. the 1.5 source code and the schematics implies writes here are ignored while rom is enabled; if disablerom is 1 this goes to mainram - map(0x01000, 0x3ffff).ram().share("mainram"); // 256k of ram (less 8k), shared between both processors. rom goes here if bootseqdone is 0 - // note 4000-d5ff is the framebuffer for the screen, in two sets of fields for odd/even interlace? - map(0xff000, 0xfffe7).rom().region("iop", 0xff000); // rom is only banked in here if bootseqdone is 0, so the reset vector is in the proper place. otherwise the memory control regs live at fffe8-fffef - //map(0xfffea, 0xfffeb).w(FUNC(notetaker_state::cpuCtl_w)); - //map(0xfffec, 0xfffed).r(FUNC(notetaker_state::parityErrHi_r)); - //map(0xfffee, 0xfffef).r(this. FUNC(notetaker_state::parityErrLo_r)); - map(0xffff0, 0xfffff).rom().region("iop", 0xffff0); - */ - map(0x00000, 0xfffff).rw(FUNC(notetaker_state::iop_r), FUNC(notetaker_state::iop_w)); // bypass MAME's memory map system as we need finer grained control -} - -/* iop memory map comes from http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/memos/19790605_Definition_of_8086_Ports.pdf - and from the schematic at http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf -a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 -x x x x 0 x x x x x x 0 0 0 0 x x x * . RW IntCon (PIC8259) -x x x x 0 x x x x x x 0 0 0 1 x x x x . W IPConReg -x x x x 0 x x x x x x 0 0 1 0 x 0 0 0 . . KbdInt:Open Bus -x x x x 0 x x x x x x 0 0 1 0 x 0 0 1 . R KbdInt:ReadKeyData -x x x x 0 x x x x x x 0 0 1 0 x 0 1 0 . R KbdInt:ReadOPStatus -x x x x 0 x x x x x x 0 0 1 0 x 0 1 1 . . KbdInt:Open Bus -x x x x 0 x x x x x x 0 0 1 0 x 1 0 0 . W KbdInt:LoadKeyCtlReg -x x x x 0 x x x x x x 0 0 1 0 x 1 0 1 . W KbdInt:LoadKeyData -x x x x 0 x x x x x x 0 0 1 0 x 1 1 0 . W KbdInt:KeyDataReset -x x x x 0 x x x x x x 0 0 1 0 x 1 1 1 . W KbdInt:KeyChipReset -x x x x 0 x x x x x x 0 0 1 1 x x x x . W FIFOReg -x x x x 0 x x x x x x 0 1 0 0 x x x x . . Open Bus(originally ReadOpStatus) -x x x x 0 x x x x x x 0 1 0 1 x x * * . RW SelPIA (debugger board 8255 PIA)[Open Bus on normal units] -x x x x 0 x x x x x x 0 1 1 0 x x x x . W FIFOBus -x x x x 0 x x x x x x 0 1 1 1 x x x x . . Open Bus -x x x x 0 x x x x x x 1 0 0 0 x x x x . RW SelDiskReg -x x x x 0 x x x x x x 1 0 0 1 x x * * . RW SelDiskInt -x x x x 0 x x x x x x 1 0 1 0 * * * * . W SelCrtInt -x x x x 0 x x x x x x 1 0 1 1 x x x x . W LoadDispAddr -x x x x 0 x x x x x x 1 1 0 0 x x x x . . Open Bus(originally ReadEIAStatus) -x x x x 0 x x x x x x 1 1 0 1 x 0 0 0 . R SelEIA:ReadEIAStatus -x x x x 0 x x x x x x 1 1 0 1 x 0 0 1 . R SelEIA:ReadEIAData -x x x x 0 x x x x x x 1 1 0 1 x 0 1 0 . . SelEIA:Open Bus -x x x x 0 x x x x x x 1 1 0 1 x 0 1 1 . . SelEIA:Open Bus -x x x x 0 x x x x x x 1 1 0 1 x 1 0 0 . W SelEIA:LoadEIACtlReg -x x x x 0 x x x x x x 1 1 0 1 x 1 0 1 . W SelEIA:LoadEIAData -x x x x 0 x x x x x x 1 1 0 1 x 1 1 0 . W SelEIA:EIADataReset -x x x x 0 x x x x x x 1 1 0 1 x 1 1 1 . W SelEIA:EIAChipReset -x x x x 0 x x x x x x 1 1 1 0 x x x x . R SelADCHi -x x x x 0 x x x x x x 1 1 1 1 x x x x . W CRTSwitch -*/ -void notetaker_state::iop_io(address_map &map) -{ - map.unmap_value_high(); - map(0x00, 0x03).mirror(0x7e1c).rw(m_iop_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); - map(0x20, 0x21).mirror(0x7e1e).w(FUNC(notetaker_state::ipcon_reg_w)); // I/O processor (rom mapping, etc) control register - map(0x42, 0x42).mirror(0x7e10).r(m_kbduart, FUNC(ay31015_device::receive)); // read keyboard data - map(0x44, 0x45).mirror(0x7e10).r(FUNC(notetaker_state::read_op_status_r)); // read keyboard fifo state - map(0x48, 0x49).mirror(0x7e10).w(FUNC(notetaker_state::load_key_ctl_reg_w)); // kbd uart control register - map(0x4a, 0x4a).mirror(0x7e10).w(m_kbduart, FUNC(ay31015_device::transmit)); // kbd uart data register - map(0x4c, 0x4d).mirror(0x7e10).w(FUNC(notetaker_state::key_data_reset_w)); // kbd uart ddr switch (data reset) - map(0x4e, 0x4f).mirror(0x7e10).w(FUNC(notetaker_state::key_chip_reset_w)); // kbd uart reset - map(0x60, 0x61).mirror(0x7e1e).w(FUNC(notetaker_state::fifo_reg_w)); // DAC sample and hold and frequency setup - //map(0xa0, 0xa1).mirror(0x7e18).rw("debug8255", FUNC(8255_device::read), FUNC(8255_device::write)); // debugger board 8255 - map(0xc0, 0xc1).mirror(0x7e1e).w(FUNC(notetaker_state::fifo_bus_w)); // DAC data write to FIFO - map(0x100, 0x101).mirror(0x7e1e).w(FUNC(notetaker_state::disk_reg_w)); // I/O register (adc speed, crtc pixel clock and clock enable, +5 and +12v relays for floppy, etc) - map(0x120, 0x127).mirror(0x7e18).rw(m_fdc, FUNC(fd1791_device::read), FUNC(fd1791_device::write)).umask16(0x00ff); // floppy controller - map(0x140, 0x15f).mirror(0x7e00).rw(m_crtc, FUNC(crt5027_device::read), FUNC(crt5027_device::write)).umask16(0x00ff); // crt controller - map(0x160, 0x161).mirror(0x7e1e).w(FUNC(notetaker_state::load_disp_addr_w)); // loads the start address for the display framebuffer - map(0x1a0, 0x1a1).mirror(0x7e10).r(FUNC(notetaker_state::read_eia_status_r)); // read eia fifo state - map(0x1a2, 0x1a2).mirror(0x7e10).r(m_eiauart, FUNC(ay31015_device::receive)); // read eia data - map(0x1a8, 0x1a9).mirror(0x7e10).w(FUNC(notetaker_state::load_eia_ctl_reg_w)); // eia uart control register - map(0x1aa, 0x1aa).mirror(0x7e10).w(m_eiauart, FUNC(ay31015_device::transmit)); // eia uart data register - map(0x1ac, 0x1ad).mirror(0x7e10).w(FUNC(notetaker_state::eia_data_reset_w)); // eia uart ddr switch (data reset) - map(0x1ae, 0x1af).mirror(0x7e10).w(FUNC(notetaker_state::eia_chip_reset_w)); // eia uart reset - //map(0x1c0, 0x1c1).mirror(0x7e1e).r(FUNC(notetaker_state::SelADCHi_r)); // ADC read - //map(0x1e0, 0x1e1).mirror(0x7e1e).r(FUNC(notetaker_state::CRTSwitch_w)); // CRT power enable? -} - -/* iop_pic8259 interrupts: -irq0 parity error (parity error syndrome data will be in fffdx/fffex) - currently ignored -irq1 IPSysInt (interrupt triggered by the emulator cpu) -irq2 DiskInt (interrupt triggered by the IRQ or DRQ pins from the WD1791) -irq3 EIAInt (interrupt triggered by the datareceived pin from the eiauart) -irq4 OddInt (interrupt triggered by the O/E Odd/Even pin from the crt5027) -irq5 ADCInt (interrupt triggered at the ADCSpd rate interrupt from 74c161 counter on the disk/display module to indicate adc conversion finished) -irq6 KbdInt (interrupt triggered by the datareceived pin from the kbduart) -irq7 VSync (interrupt from the VSYN VSync pin from the crt5027) -*/ - -/* writes during boot of io roms v2.0: -0x88 to port 0x020 (PCR; BootSeqDone(1), processor not locked(0), battery charger off(0), rom not disabled(0) correction off&cr4 off(1), cr3 on(0), cr2 on(0), cr1 on (0);) -0x0002 to port 0x100 (IOR write: enable 5v only relay control) -0x0003 to port 0x100 (IOR write: in addition to above, enable 12v relay control) - -0x13 to port 0x000 PIC (ICW1, 8085 vector 0b000[ignored], edge trigger mode, interval of 8, single mode (no cascade/ICW3), ICW4 needed ) -0x08 to port 0x002 PIC (ICW2, T7-T3 = 0b00001) -0x0D to port 0x002 PIC (ICW4, SFNM OFF, Buffered Mode MASTER, Normal EOI, 8086 mode) -0xff to port 0x002 PIC (OCW1, All Ints Masked (disabled/suppressed)) -0x0000 to port 0x04e (reset keyboard fifo/controller) -0x0000 to port 0x1ae (reset UART) -0x0016 to port 0x048 (kbd control reg write) -0x0005 to port 0x1a8 (UART control reg write) -0x5f to port 0x140 (reg0 95 horizontal lines) \ -0xf2 to port 0x142 (reg1 interlaced, hswidth=0xE, hsdelay=2) \ -0x7d to port 0x144 (reg2 16 scans/row, 5 chars/datarow) \ -0x1d to port 0x146 (reg3 0 skew bits, 0x1D datarows/frame) \_ set up CRTC -0x04 to port 0x148 (reg4 4 scan lines/frame) / -0x10 to port 0x14a (reg5 0x10 vdatastart) / -0x00 to port 0x154 (reset the crtc) / -0x1e to port 0x15a (reg8 load cursor line address = 0x1e) / -0x0a03 to port 0x100 (IOR write: set bit clock to 12Mhz) -0x2a03 to port 0x100 (IOR write: enable crtc clock chain) -0x00 to port 0x15c (fire off crtc timing chain) -read from 0x0002 (byte wide) (IMR, read interrupt mask, will be 0xFF from above) -0xaf to port 0x002 PIC (mask out with 0xEF and 0xBF to unnmask interrupts IR4(OddInt) and IR6(KbdInt), and write back to IMR) -0x0400 to 0x060 (select DAC fifo frequency 2) -read from 0x44 (byte wide) to check input fifo status -... more stuff here missing relating to making the beep tone through fifo -(around pc=6b6) read keyboard uart until mouse button is clicked (WaitNoBug) -(around pc=6bc) read keyboard uart until mouse button is released (WaitBug) -0x2a23 to port 0x100 (select drive 1) -0x2a23 to port 0x100 (select drive 1) -0x3a23 to port 0x100 (unset disk separator clear (allow disk head reading)) -0x3a27 to port 0x100 (select disk side 1) -0x3a07 to port 0x100 (unselect all drives) - -*/ - - - -/* Emulator CPU */ - -void notetaker_state::epcon_reg_w(uint16_t data) -{ - /*m_EP_LED1 = m_EP_ParityError; // if parity checking is enabled AND the last access was to the low 8k AND there was a parity error, the parity error latch is latched here. It triggers an interrupt. - m_EP_LED2 = (data&0x40)?1:0; - m_EP_LED3 = (data&0x20)?1:0; - m_EP_LED4 = (data&0x10)?1:0; - m_EP_LED_SelROM_q = (data&0x08)?1:0; // this doesn't appear to be hooked anywhere, andjust drives an LED - // originally, SelROM_q enabled two 2716 EPROMS, later 82s137 PROMS to map code to the FFC00-FFFFF area but this was dropped in the 1979 design revision in favor of having the IOP write the boot vectors for the EP to the shared ram instead. See below for how the top two address bits are disconnected to allow this to work with the way the shared ram is mapped. - m_EP_ProcLock = (data&0x04)?1:0; // bus lock for this processor (hold other processor in wait state) - m_EP_SetParity_q = (data&0x02)?1:0; // enable parity checking on local ram if low - m_EP_DisLMem_q = (data&0x01)?1:0; // if low, the low 8k of local memory is disabled and accesses the shared memory instead. - popmessage("EP LEDS: CR1: %d, CR2: %d, CR3: %d, CR4: %d", (data&0x80)>>2, (data&0x40)>>3, (data&0x20)>>1, (data&0x10));*/ -} - -/* -Emulator cpu mem map: -(The top two address bits are disconnected, to allow the ram board, which maps itself only at 00000-3ffff, to appear at "ffff0" to the ep processor when /reset is de-asserted by the iop) -a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 DisLMem_q -x x 0 0 0 0 0 * * * * * * * * * * * * * 0 RW Local (fast) RAM -x x 0 0 0 0 0 * * * * * * * * * * * * * 1 RW System/Shared RAM - * * * * * * * * * * * * * x RW System/Shared RAM - EXCEPT for the following, decoded by the EP board and superseding above: -x x 1 1 1 1 1 1 1 1 1 1 1 1 0 x x x x x x RW FFFC0-FFFDF (trigger ILLINST interrupt on EP, data ignored?) - And the following, decoded by the memory address logic board: -x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 x x . Open Bus -x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 x x W FFFEA (Multiprocessor Control (reset(bit 6)/int(bit 5)/boot(bit 4) for each processor; data bits 3,2,1,0 are 'processor address'; 0010 means IP, 0111 means EP; all others ignored.)) -x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 x x R FFFEC (Syndrome bits (gnd bit 15, parity bit 14, exp(syndrome) bits 13-8, bits 7-0 are the highest address bits) -x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 x x R FFFEE (Parity Error Address: row bits 15-8, column bits 7-0; reading this also acknowledges a parity interrupt) -*/ - -uint16_t notetaker_state::ep_mainram_r(offs_t offset, u16 mem_mask) -{ - return m_mainram[offset + 0x2000/2]; -} - -void notetaker_state::ep_mainram_w(offs_t offset, u16 data, u16 mem_mask) -{ - COMBINE_DATA(&m_mainram[offset + 0x2000/2]); -} - -void notetaker_state::ep_mem(address_map &map) -{ - map(0x00000, 0x01fff).mirror(0xc0000).ram(); // actually a banked block of ram, 8kb (4kw) - map(0x02000, 0x3ffff).mirror(0xc0000).rw(FUNC(notetaker_state::ep_mainram_r), FUNC(notetaker_state::ep_mainram_w)); // 256k of ram (less 8k), shared between both processors, mirrored 4 times - //map(0xfffc0, 0xfffdf).mirror(0xc0000).rw(FUNC(notetaker_state::proc_illinst_r), FUNC(notetaker_state::proc_illinst_w)); - //map(0xfffe0, 0xfffef).mirror(0xc0000).rw(FUNC(notetaker_state::proc_control_r), FUNC(notetaker_state::proc_control_w)); -} - -/* note everything in the emulatorcpu's io range is incompletely decoded; so if - 0x1800 is accessed it will write to both the debug 8255 AND the pic8259! - I'm not sure the code abuses this or not, but it might do so to both write - registers and clear parity at once, or something similar. */ -/* -Emulator cpu i/o map: -a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 DisLMem_q -x x x x x x x x 1 x x x x x x x x x * x x RW 8259 -x x x x x x x 1 x x x x x x x x x * * x x RW EP debugger 8255, same exact interface on both cpu and alto side as the IOP debugger 8255 -x x x x x x 1 x x x x x x x x x x x x x x W EPConReg -x x x x x 1 x x x x x x x x x x x x x x x W Writing anything here clears the parity error latch -*/ - -void notetaker_state::ep_io(address_map &map) -{ - map.unmap_value_high(); - map(0x800, 0x803).mirror(0x07fc).rw(m_ep_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); - //map(0x1000, 0x1001).mirror(0x07fe).rw("debug8255", FUNC(8255_device::read), FUNC(8255_device::write)); // debugger board 8255, is this the same one as the iop accesses? or are these two 8255s on separate cards? - map(0x2000, 0x2001).mirror(0x07fe).w(FUNC(notetaker_state::epcon_reg_w)); // emu processor control reg & leds - //map(0x4000, 0x4001).mirror(0x07fe).w(FUNC(notetaker_state::EmuClearParity_w)); // writes here clear the local 8k-ram parity error register -} - -/* Input ports */ - -/* Floppy Image Interface */ -static void notetaker_floppies(device_slot_interface &device) -{ - device.option_add("525dd", FLOPPY_525_DD); -} - -/* Machine Start; allocate timers and savestate stuff */ -void notetaker_state::machine_start() -{ - // allocate RAM - m_mainram = make_unique_clear(0x100000/2); - - // allocate the DAC timer, and set it to fire NEVER. We'll set it up properly in IPReset. - m_fifo_timer = timer_alloc(FUNC(notetaker_state::timer_fifoclk), this); - m_fifo_timer->adjust(attotime::never); - - // FDC: /DDEN is tied permanently LOW so MFM mode is ALWAYS ON - m_fdc->dden_w(0); - - // Keyboard UART: /SWE is tied permanently LOW - m_kbduart->write_swe(0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active) - - // EIA UART: /SWE is tied permanently LOW - m_eiauart->write_swe(0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active) - - // TODO: register savestate items -} - -/* Machine Reset; this emulates the full system reset, triggered by ExtReset' (cardcage pin <50>) or the PowerOnReset' circuit */ -void notetaker_state::machine_reset() -{ - iop_reset(); - ep_reset(); -} - -/* IP Reset; this emulates the IPReset' signal */ -void notetaker_state::iop_reset() -{ - // reset the Keyboard UART - m_kbduart->write_xr(0); // MR - pin 21 - m_kbduart->write_xr(1); // '' - - // reset the EIA UART - m_eiauart->write_xr(0); // MR - pin 21 - m_eiauart->write_xr(1); // '' - - // reset the IPConReg ls273 latch at #f1 - ipcon_reg_w(0x0000); - - // Clear the DAC FIFO - for (int i = 0; i < 16; i++) - m_outfifo[i] = 0; - m_outfifo_count = 0; - m_outfifo_tail_ptr = 0; - m_outfifo_head_ptr = 0; - - // reset the FIFOReg latch at #h9 - fifo_reg_w(0x0000); - - // reset the DiskReg latches at #c4 and #b4 on the disk/display/eia controller board - disk_reg_w(0x0000); - - // reset the framebuffer display address counter: - m_disp_addr = 0; -} - -/* EP Reset; this emulates the EPReset' signal */ -void notetaker_state::ep_reset() -{ - // TODO: force ep into reset and hold it there, until the iop releases it. - // there's 6 'state' bits controllable by the memory mapped cpu control reg, which need to be reset for epcpu and iocpu separately -} - -/* Input ports */ -static INPUT_PORTS_START( notetakr ) -INPUT_PORTS_END - -void notetaker_state::notetakr(machine_config &config) -{ - /* basic machine hardware */ - /* IO CPU: 8086@8MHz */ - I8086(config, m_iop_cpu, 24_MHz_XTAL / 3); /* iD8086-2 @ E4A; 24Mhz crystal divided down to 8Mhz by i8284 clock generator */ - m_iop_cpu->set_addrmap(AS_PROGRAM, ¬etaker_state::iop_mem); - m_iop_cpu->set_addrmap(AS_IO, ¬etaker_state::iop_io); - m_iop_cpu->set_irq_acknowledge_callback("iop_pic8259", FUNC(pic8259_device::inta_cb)); - - PIC8259(config, m_iop_pic, 0); // iP8259A-2 @ E6 - m_iop_pic->out_int_callback().set_inputline(m_iop_cpu, 0); - - /* Emulator CPU: 8086@5MHz */ - I8086(config, m_ep_cpu, 15_MHz_XTAL / 3); - m_ep_cpu->set_disable(); // TODO: implement the cpu control bits so this doesn't execute garbage/zeroes before its firmware gets loaded - m_ep_cpu->set_addrmap(AS_PROGRAM, ¬etaker_state::ep_mem); - m_ep_cpu->set_addrmap(AS_IO, ¬etaker_state::ep_io); - m_ep_cpu->set_irq_acknowledge_callback("ep_pic8259", FUNC(pic8259_device::inta_cb)); - - PIC8259(config, m_ep_pic, 0); // iP8259A-2 @ E6 - m_ep_pic->out_int_callback().set_inputline(m_ep_cpu, 0); - - /* video hardware */ - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60.975); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(250)); - screen.set_screen_update(FUNC(notetaker_state::screen_update)); - screen.set_size(640, 480); - screen.set_visarea(0, 640-1, 0, 480-1); - screen.set_palette("palette"); - - PALETTE(config, "palette", palette_device::MONOCHROME); - - /* Devices */ - CRT5027(config, m_crtc, (36_MHz_XTAL / 4) / 8); // See below - /* the clock for the crt5027 is configurable rate; 36MHz xtal divided by 1*, - 2, 3, 4, 5, 6, 7, or 8 (* because this is a 74s163 this setting probably - means divide by 1; documentation at - http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790605_Definition_of_8086_Ports.pdf - claims it is 1.5, which makes no sense) and secondarily divided by 8 - (again by two to load the 16 bit output shifters after this). - on reset, bitclk is 000 so divider is (36mhz/8)/8; during boot it is - written with 101, changing the divider to (36mhz/4)/8 */ - // TODO: for now, we just hack it to the latter setting from start; this should be handled correctly in iop_reset(); - m_crtc->set_char_width(8); //(8 pixels per column/halfword, 16 pixels per fullword) - // TODO: below is HACKED to trigger the odd/even int ir4 instead of vblank int ir7 since ir4 is required for anything to be drawn to screen. - // hence with the hack this interrupt triggers twice as often as it should - m_crtc->vsyn_callback().set(m_iop_pic, FUNC(pic8259_device::ir4_w)); // note this triggers interrupts on both the iop (ir7) and emulatorcpu (ir4) - m_crtc->set_screen("screen"); - - AY31015(config, m_kbduart); // HD6402, == AY-3-1015D - m_kbduart->write_dav_callback().set(m_iop_pic, FUNC(pic8259_device::ir6_w)); // DataRecvd = KbdInt - - clock_device &kbdclock(CLOCK(config, "kbdclock", 960_kHz_XTAL)); // hard-wired to 960KHz xtal #f11 (60000 baud, 16 clocks per baud) - kbdclock.signal_handler().set(m_kbduart, FUNC(ay31015_device::write_rcp)); - kbdclock.signal_handler().append(m_kbduart, FUNC(ay31015_device::write_tcp)); - - AY31015(config, m_eiauart); // HD6402, == AY-3-1015D - m_eiauart->write_dav_callback().set(m_iop_pic, FUNC(pic8259_device::ir3_w)); // EIADataReady = EIAInt - - // hard-wired through an mc14568b divider set to divide by 4, the result set to divide by 5; this resulting 4800hz signal being 300 baud (16 clocks per baud) - clock_device &eiaclock(CLOCK(config, "eiaclock", ((960_kHz_XTAL / 10) / 4) / 5)); - eiaclock.signal_handler().set(m_eiauart, FUNC(ay31015_device::write_rcp)); - eiaclock.signal_handler().append(m_eiauart, FUNC(ay31015_device::write_tcp)); - - /* Floppy */ - FD1791(config, m_fdc, (((24_MHz_XTAL / 3) / 2) / 2)); // 2mhz, from 24mhz ip clock divided by 6 via 8284, an additional 2 by LS161 at #e1 on display/floppy board - FLOPPY_CONNECTOR(config, "wd1791:0", notetaker_floppies, "525dd", floppy_image_device::default_mfm_floppy_formats); - - /* sound hardware */ - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - // TODO: hook DAC up to two HA2425 (sample and hold) chips and hook those up to the speakers - DAC1200(config, m_dac, 0).add_route(ALL_OUTPUTS, "lspeaker", 0.5).add_route(ALL_OUTPUTS, "rspeaker", 0.5); // unknown DAC -} - -void notetaker_state::driver_start() -{ - // descramble the rom; the whole thing is a gigantic scrambled mess either to ease - // interfacing with older xerox technologies which used A0 and D0 as the MSB bits - // or maybe because someone screwed up somewhere along the line. we may never know. - // see http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf pages 12 and onward - uint16_t *romsrc = (uint16_t *)(memregion("iopload")->base()); - uint16_t *romdst = (uint16_t *)(memregion("iop")->base()); - // leave the src pointer alone, since we've only used a 0x1000 long address space - romdst += 0x7f800; // set the dest pointer to 0xff000 (>>1 because 16 bits data) - for (int i = 0; i < 0x800; i++) - { - uint16_t wordtemp = bitswap<16>(*romsrc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); // data bus is completely reversed - uint16_t addrtemp = bitswap<11>(i, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10); // address bus is completely reversed; 11-15 should always be zero - uint16_t *temppointer = romdst + (addrtemp & 0x7ff); - *temppointer = wordtemp; - romsrc++; - } -} - -/* ROM definition */ -/* -The notetaker, over its lifetime from 1978 to 1981, had three different classes of IOP roms, with multiple versions of each one. -These were: -BIOP - "Bootable", standalone "user" unit, running smalltalk-78 off of a boot disk, either single or double density; early notetakers used an fd1791 while later ones used a wd1791. -XIOP - "eXercizer" intended for initial testing of each NoteTaker system as assembled; only usable running tethered to a Xerox Alto running notex (notex.cm) as a hardware scripting language for system testing -MIOP - only bootable tethered to a Xerox Alto via a debug card, running smalltalk on the NoteTaker, but not booted off of the floppy disk. -The 'Z-iop' firmware 1.5 below seems to be a BIOP firmware. -*/ - -ROM_START( notetakr ) - ROM_REGION( 0x1000, "iopload", ROMREGION_ERASEFF ) // load roms here before descrambling - ROM_SYSTEM_BIOS( 0, "v2.00", "Bootable IO Monitor v2.00" ) // dumped from Notetaker - ROMX_LOAD( "biop__2.00_hi.b2716.h1", 0x0000, 0x0800, CRC(1119691d) SHA1(4c20b595b554e6f5489ab2c3fb364b4a052f05e3), ROM_SKIP(1) | ROM_BIOS(0)) - ROMX_LOAD( "biop__2.00_lo.b2716.g1", 0x0001, 0x0800, CRC(b72aa4c7) SHA1(85dab2399f906c7695dc92e7c18f32e2303c5892), ROM_SKIP(1) | ROM_BIOS(0)) - ROM_SYSTEM_BIOS( 1, "v1.50", "Bootable IO Monitor v1.50" ) // typed from the source listing at http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790620_Z-IOP_1.5_ls.pdf and scrambled - ROMX_LOAD( "z-iop_1.50_hi.h1", 0x0000, 0x0800, CRC(122ffb5b) SHA1(b957fe24620e1aa98b3158dbcf459937dbd54bac), ROM_SKIP(1) | ROM_BIOS(1)) - ROMX_LOAD( "z-iop_1.50_lo.g1", 0x0001, 0x0800, CRC(2cb79a67) SHA1(692aafd2aeea27533f6288dbb1cb8678ea08fade), ROM_SKIP(1) | ROM_BIOS(1)) - - ROM_REGION( 0x100000, "iop", ROMREGION_ERASEFF ) // area for descrambled roms - // main ram, on 2 cards with parity/ecc/syndrome/timing/bus arbitration on another 2 cards - - // keyboard mcu which handles key scanning as well as reading the mouse quadratures, and issues state responses if requested by the iop - ROM_REGION( 0x400, "kbmcu", ROMREGION_ERASEFF ) - ROM_LOAD( "keyboard.i8748.a10a", 0x000, 0x400, NO_DUMP ) - - ROM_REGION( 0x500, "proms", ROMREGION_ERASEFF ) - /* disk data separator prom from the disk/display module board: - there are two different versions of this prom, both generated by BCPL programs, - one from mid 1978 (Single density only? seems very buggy and might not even work) - and one from 1979 (which should work and appears here). - Note that the bit order for the state counter (data bits 6,5,4,3) may be - reversed vs the real machine, but since the prom address bus is the only - thing that ever sees the prom data bus, this prom will work even if the - bit order for those bits is backwards. - */ - // 1979 version - ROM_LOAD( "disksep.82s147.a4", 0x000, 0x200, CRC(38363714) SHA1(c995d2702573f5afb5fc919150d3a5661013f999) ) - - // memory cas/ras/write state machine prom from the memory address logic board; the contents of this are listed in: - // http://www.bitsavers.org/pdf/xerox/notetaker/schematics/19781027_Memory_Address_Timing.pdf - ROM_LOAD( "timingprom.82s147.b1", 0x200, 0x200, CRC(3003b50a) SHA1(77d9ffe4716c2297708b8e5ebce7f930619c3cc3) ) - - // SETMEMRQ memory timing prom from the disk/display module board; The equations for this one are actually listed on the schematic and the prom dump can be generated from these: - ROM_LOAD( "memreqprom.82s126.d9", 0x400, 0x100, CRC(56b2be8b) SHA1(5df0579ed8afeb59113700be6f2982ef85f64b44) ) - - /* - SetMemRq: - Address: - 76543210 - |||||||\- WCtr.0 (MSB) - ||||||\-- WCtr.1 - |||||\--- WCtr.2 - ||||\---- WCtr.3 (LSB) - |||\----- RCtr.0 (MSB) - ||\------ RCtr.1 - |\------- RCtr.2 - \-------- RCtr.3 (LSB) - - The schematic has an error here, showing the SetMemRq_q output coming from data bit 0, in reality based on the listing it comes from data bit 3 - Data: - 3210 - |\\\- N/C (always zero) - \---- SetMemRq_q - - Equation: SETMEMRQ == ( - ((Rctr == 0) && ((Wctr == 0)||(Wctr == 4)||(Wctr == 8))) - ||((Rctr == 4) && ((Wctr == 4)||(Wctr == 8)||(Wctr == 12))) - ||((Rctr == 8) && ((Wctr == 8)||(Wctr == 12)||(Wctr == 0))) - ||((Rctr == 12) && ((Wctr == 12)||(Wctr == 0)||(Wctr == 4))) - ) - The PROM output is SetMemRq_q and is inverted compared to the equation above. - */ -ROM_END - -/* Driver */ - -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 1978, notetakr, 0, 0, notetakr, notetakr, notetaker_state, empty_init, "Xerox", "NoteTaker", MACHINE_IS_SKELETON) diff --git a/src/mame/skeleton/powerstack.cpp b/src/mame/skeleton/powerstack.cpp deleted file mode 100644 index d5444770d65..00000000000 --- a/src/mame/skeleton/powerstack.cpp +++ /dev/null @@ -1,41 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders: -/*********************************************************************************************************************************** - -2017-10-29 Skeleton - -Motorola Powerstack II. CPU is a PowerPC 604e @ 300MHz. - -************************************************************************************************************************************/ - -#include "emu.h" -#include "cpu/powerpc/ppc.h" - -class powerstack_state : public driver_device -{ -public: - powerstack_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - // , m_maincpu(*this, "maincpu") - { } - - void powerstack(machine_config &config); -private: - // required_device m_maincpu; -}; - -static INPUT_PORTS_START( powerstack ) -INPUT_PORTS_END - -void powerstack_state::powerstack(machine_config &config) -{ -// ppc604_device &maincpu(PPC604(config, "maincpu", 300'000'000)); // PPC604E @ 300MHz -// maincpu.set_addrmap(AS_PROGRAM, &powerstack_state::mem_map); -} - -ROM_START( powerstk ) - ROM_REGION( 0x80000, "roms", 0 ) - ROM_LOAD( "motorola_powerstack2.bin", 0x0000, 0x80000, CRC(948e8fcd) SHA1(9a8c32b621c98bc33ee525f66747c34d39851685) ) -ROM_END - -COMP( 1996, powerstk, 0, 0, powerstack, powerstack, powerstack_state, empty_init, "Motorola", "Powerstack II", MACHINE_IS_SKELETON ) diff --git a/src/mame/xerox/notetaker.cpp b/src/mame/xerox/notetaker.cpp new file mode 100644 index 00000000000..8e5aa1f9585 --- /dev/null +++ b/src/mame/xerox/notetaker.cpp @@ -0,0 +1,998 @@ +// license:BSD-3-Clause +// copyright-holders:Jonathan Gevaryahu +/* Xerox NoteTaker, 1978 + * Driver by Jonathan Gevaryahu + + * Notetaker Team At Xerox PARC 1976-1981: + Alan Kay - Team Lead + Bruce Horn - BIOS code and NoteTaker Hardware/Electronics Design (Ethernet, others) + Ted Kaehler - SmallTalk-76 code porting[2] and more ( http://tedkaehler.weather-dimensions.com/us/ted/index.html ) + Dan Ingalls - Later BitBlt engine and SmallTalk-76 kernel and more[3] + Doug Fairbairn - NoteTaker Hardware/Electronics Design (EmulatorP, IOP, ADC, Alto Debug/Test Interface) + ( http://www.computerhistory.org/atchm/author/dfairbairn/ ) + Ed Wakida - NoteTaker Hardware/Electronics Design (Tablet/Touch interface) + Bob Nishimura - NoteTaker Hardware/Electronics Design (PSU/Cabling/Machining/Battery) + James "Jim" Leung - NoteTaker Hardware/Electronics Design (Alto Debug/Test Interface) + Ron Freeman - NoteTaker Hardware/Electronics Design (Keyboard, Disk/Display) + Ben Sato - NoteTaker Hardware/Electronics Design (Memory/Timing, ECC) + B. Wang - NoteTaker Hardware/Electronics Design (Keyboard) + Larry Tesler - NoteTaker Hardware/Electronics Design (Ethernet, others) + Dale Mann - NoteTaker Hardware/Electronics Design (Ethernet, Circuit Assembly) + Lawrence "Larry" D. Stewart - NoteTaker Hardware/Electronics Design (Mouse) + Jim Althoff - Smalltalk-78 and Smalltalk-80 + Adele Goldberg - Smalltalk team + Diana Merry-Shapiro - Original BitBlt from Smalltalk-72 + Dave Robson - Smalltalk team + Ted Strollo - IC/VLSI design (MPC580 cell library) + Bert Sutherland - Manager of Systems Science Laboratory (SSL) + Terri Doughty - Administration, Editing + Chris Jeffers - Smalltalk music + + + * History of the machine can be found at http://freudenbergs.de/bert/publications/Ingalls-2014-Smalltalk78.pdf + + * The notetaker has an 8-slot backplane, with the following cards in it: + * I/O Processor card (8086@8Mhz, 8259pic, 4k ROM, Keyboard UART, DAC1200 (multiplexed to 2 channels)) + * Emulation Processor card (8086@5Mhz, 8259pic, 8k of local RAM with Parity check logic) + * Disk/Display card (WD1791 FDC, CRT5027 CRTC, EIA UART, AD571 ADC, 8->1 Analog Multiplexer) + * Memory Control Module \_ (bus control, buffering, refresh, Parity/ECC/Syndrome logic lives on these boards) + * Memory Data Module / + * Memory Storage Module x2 (the 4116 DRAMs live on these boards) + * Battery Module *OR* debugger module type A or B (debugger module has an + i8255 on it for alto<->notetaker comms, and allows alto to halt the cpus + [type A and B can debug either the emulator cpu or the iop respectively] + and dump registers to alto screen, etc) + + * In 1980-1981 an Ethernet card with another 8086 on it was developed, but + it is unclear if this was ever fully functional, or if smalltalk-78 + could even use it. + + * Prototypes only, 10 units[2] manufactured 1978-1980 + Known surviving units: + * One at CHM (missing? mouse, no media, has BIOP-2.0 roms) + * One at Xerox Museum at PARC (with mouse and 2? floppies, floppies were not imaged to the best of my knowledge, unknown roms) + * Rumor has it at least a few of the remaining units survived beyond these two. + + * The NoteTaker used the BitBlt graphical operation (from SmallTalk-76) to do most graphical functions, in order to fit the SmallTalk code and programs within 256K of RAM[2]. The actual BitBlt code lives in ROM[3]. + + * As far as I am aware, no media (world disks/boot disks) for the NoteTaker have survived (except maybe the two disks at Xerox Museum at PARC), but an incomplete dump of the Smalltalk-76 'world' which was used to bootstrap Smalltalk-78 originally did survive on the Alto disks at CHM + + * We are missing the dump for the i8748 Keyboard MCU which does row-column scanning and mouse quadrature reading, and talks to the main system via serial + + * see http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker for additional information + * see http://xeroxalto.computerhistory.org/Filene/Smalltalk-76/ for the smalltalk-76 dump + * see http://xeroxalto.computerhistory.org/Indigo/BasicDisks/Smalltalk14.bfs!1_/ for more notetaker/smalltalk related files, including SmallTalk-80 files based on the notetaker smalltalk-78 + + References: + * [1] http://freudenbergs.de/bert/publications/Ingalls-2014-Smalltalk78.pdf + * [2] "Smalltalk and Object Orientation: An Introduction" By John Hunt, pages 45-46 [ISBN 978-3-540-76115-0] + * [3] http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790620_Z-IOP_1.5_ls.pdf + * [4] http://xeroxalto.computerhistory.org/Filene/Smalltalk-76/ + * [5] http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790118_NoteTaker_System_Manual.pdf + +TODO: everything below. +* Get smalltalk-78 loaded as a rom and forced into ram on startup, since no boot disks have survived (or if any survived, they are not dumped) +* Hack together a functional boot disk using the recovered EP bootloader and smalltalk engine code from the alto disks. +* Harris 6402 keyboard UART (within keyboard, next to MCU) +* The harris 6402 UART is pin compatible with WD TR1865 UART, as well as the AY-3-1015A/D + (These are 5v-only versions of the older WD TR1602 and AY-5-1013 parts which used 5v and 12v) +* HLE for the missing i8748[5] MCU in the keyboard which reads the mouse quadratures and buttons and talks serially to the Keyboard UART +* floppy controller wd1791 and its interrupt + According to [3] and [5] the format is double density/MFM, 128 bytes per sector, 16 sectors per track, 1 or 2 sided, for 170K or 340K per disk. Drive spins at 300RPM. +* hook up the DiskInt from the wd1791 either using m_fdc->intrq_r() polling or using device lines (latter is a much better idea) + +WIP: +* crt5027 video controller - the iop side is hooked up, screen drawing 'works' but is scrambled due to not emulating the clock chain halting and clock changing yet. The crt5027 core also needs the odd/even interrupt hooked up, and proper interlace support as well as clock change/screen resize support (down to DC/no clock, which I guess should be a 1x1 single black pixel!) +* pic8259 interrupt controller - this is attached as a device, but only the vblank interrupt is hooked to it yet. +* Harris 6402 serial/EIA UART - connected to iop, other end isn't connected anywhere, interrupt is not connected +* Harris 6402 keyboard UART (within notetaker) - connected to iop, other end isn't connected anywhere, interrupt is not connected +* The DAC, its FIFO and its timer are hooked up and the v2.0 bios beeps, but the stereo latches are not hooked up at all, DAC is treated as mono for now + +DONE: +* i/o cpu i/o area needs the memory map worked out per the schematics - done +* figure out the correct memory maps for the 256kB of shared ram, and what part of ram constitutes the framebuffer - done + - 256k of shared ram maps at 00000-3ffff for both cpus with special mem regs at fffec,fffee. the ram mirrors 4 times on the emulatorcpu only, iop the 40000-fffff area is open bus. + - framebuffer, at least for bios 1.5, lives from 0x4000-0xd5ff, exactly 640x480 pixels 1bpp, interlaced (even? plane is at 4000-8aff, odd? plane is at 8b00-d5ff); however the starting address of the framebuffer is configurable to any address within the 0x0000-0x1ffff range? (this exact range is unclear) +* figure out how the emulation-cpu boots and where its 8k of local ram maps to - done + - both cpus boot, reset and system int controls are accessed at fffea from either cpu; emulatorcpu's 8k of ram lives at the beginning of its address space, but can be disabled in favor of mainram at the same addresses +* 82s147 DISKSEP PROM regenerated from original BCPL code +* SETMEMREQ PROM retyped from binary listing +* TIMING PROM retyped from binary listing +*/ + +#include "emu.h" +#include "cpu/i86/i86.h" +#include "imagedev/floppy.h" +#include "machine/ay31015.h" +#include "machine/clock.h" +#include "machine/pic8259.h" +#include "machine/wd_fdc.h" +#include "sound/dac.h" +#include "video/tms9927.h" +#include "emupal.h" +#include "screen.h" +#include "speaker.h" + +#define LOG_VIDEO (1U << 1) +#define LOG_READOP_STATUS (1U << 2) +#define LOG_FIFO (1U << 3) +#define LOG_SPC_DSP (1U << 4) +#define LOG_FIFO_VERBOSE (1U << 5) + +#define VERBOSE (0) +#include "logmacro.h" + +class notetaker_state : public driver_device +{ +public: + notetaker_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag) , + m_iop_cpu(*this, "iop_cpu"), + m_iop_pic(*this, "iop_pic8259"), + m_ep_cpu(*this, "ep_cpu"), + m_ep_pic(*this, "ep_pic8259"), + m_kbduart(*this, "kbduart"), + m_eiauart(*this, "eiauart"), + m_crtc(*this, "crt5027"), + m_dac(*this, "dac"), + m_fdc(*this, "wd1791"), + m_floppy0(*this, "wd1791:0"), + m_floppy(nullptr) + { + } + + void notetakr(machine_config &config); + +private: + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void driver_start() override; + + void iop_io(address_map &map); + void iop_mem(address_map &map); + void ep_io(address_map &map); + void ep_mem(address_map &map); + + // devices + required_device m_iop_cpu; + required_device m_iop_pic; + required_device m_ep_cpu; + required_device m_ep_pic; + required_device m_kbduart; + required_device m_eiauart; + required_device m_crtc; + required_device m_dac; + required_device m_fdc; + required_device m_floppy0; + floppy_image_device *m_floppy; + + std::unique_ptr m_mainram; + + // screen + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + // basic io + void ipcon_reg_w(uint16_t data); + void epcon_reg_w(uint16_t data); + void fifo_reg_w(uint16_t data); + void fifo_bus_w(uint16_t data); + void disk_reg_w(uint16_t data); + void load_disp_addr_w(uint16_t data); + + // uarts + uint16_t read_op_status_r(); + void load_key_ctl_reg_w(uint16_t data); + void key_data_reset_w(uint16_t data); + void key_chip_reset_w(uint16_t data); + uint16_t read_eia_status_r(); + void load_eia_ctl_reg_w(uint16_t data); + void eia_data_reset_w(uint16_t data); + void eia_chip_reset_w(uint16_t data); + + // mem map stuff + uint16_t iop_r(offs_t offset); + void iop_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t ep_mainram_r(offs_t offset, uint16_t mem_mask); + void ep_mainram_w(offs_t offset, uint16_t data, uint16_t mem_mask); + + // IPConReg + uint8_t m_boot_seq_done = 0; + uint8_t m_proc_lock = 0; + uint8_t m_char_ctr = 0; + uint8_t m_disable_rom = 0; + uint8_t m_corr_on_q = 0; + uint8_t m_led_ind6 = 0; + uint8_t m_led_ind7 = 0; + uint8_t m_led_ind8 = 0; + + // FIFOReg + uint8_t m_tablet_y_on = 0; + uint8_t m_tablet_x_on = 0; + uint8_t m_fr_sel2 = 0; + uint8_t m_fr_sel1 = 0; + uint8_t m_fr_sel0 = 0; + uint8_t m_sh_conb = 0; + uint8_t m_sh_cona = 0; + uint8_t m_set_sh = 0; + + // DiskReg + uint8_t m_adc_spd0 = 0; + uint8_t m_adc_spd1 = 0; + uint8_t m_stopword_clock_q = 0; + uint8_t m_clr_diskcont_q = 0; + uint8_t m_prog_bitclk1 = 0; + uint8_t m_prog_bitclk2 = 0; + uint8_t m_prog_bitclk3 = 0; + uint8_t m_an_sel4 = 0; + uint8_t m_an_sel2 = 0; + uint8_t m_an_sel1 = 0; + uint8_t m_drive_sel1 = 0; + uint8_t m_drive_sel2 = 0; + uint8_t m_drive_sel3 = 0; + uint8_t m_side_select = 0; + uint8_t m_disk_5v_on = 0; + uint8_t m_disk_12v_on = 0; + + // output fifo, for DAC + uint16_t m_outfifo[16]; // technically three 74LS225 5bit*16stage FIFO chips, arranged as a 16 stage, 12-bit wide fifo (one bit unused per chip) + uint8_t m_outfifo_count = 0; + uint8_t m_outfifo_tail_ptr = 0; + uint8_t m_outfifo_head_ptr = 0; + + // fifo timer + emu_timer *m_fifo_timer = nullptr; + TIMER_CALLBACK_MEMBER(timer_fifoclk); + + // framebuffer display starting address + uint16_t m_disp_addr = 0; + + void iop_reset(); + void ep_reset(); +}; + +TIMER_CALLBACK_MEMBER(notetaker_state::timer_fifoclk) +{ + //pop a value off the fifo and send it to the dac. + if (m_outfifo_count == 0) + LOGMASKED(LOG_FIFO_VERBOSE, "output fifo is EMPTY! repeating previous sample!\n"); + + uint16_t data = m_outfifo[m_outfifo_tail_ptr]; + // if fifo is empty (tail ptr == head ptr), do not increment the tail ptr, otherwise do. + if (m_outfifo_count > 0) + { + m_outfifo_tail_ptr++; + m_outfifo_count--; + } + m_outfifo_tail_ptr &= 0xf; + m_dac->write(data); + m_fifo_timer->adjust(attotime::from_hz(((960_kHz_XTAL / 10) / 4) / ((m_fr_sel0 << 3) + (m_fr_sel1 << 2) + (m_fr_sel2 << 1) + 1))); +} + +uint32_t notetaker_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + // have to figure out what resolution we're drawing to here and draw appropriately to screen + // code borrowed/stolen from video/mac.cpp + uint32_t const video_base = (m_disp_addr << 3) & 0x1ffff; + uint16_t const *video_ram_field1 = &m_mainram[video_base / 2]; + uint16_t const *video_ram_field2 = &m_mainram[(video_base + 0x4b00) / 2]; + + LOGMASKED(LOG_VIDEO, "Video Base = 0x%05x\n", video_base); + + for (int y = 0; y < 480; y++) + { + uint16_t *const line = &bitmap.pix(y); + + for (int x = 0; x < 640; x += 16) + { + uint16_t const word = *((y & 1) ? video_ram_field2 : video_ram_field1)++; + for (int b = 0; b < 16; b++) + { + line[x + b] = BIT(word, 15 - b); + } + } + } + return 0; +} + +void notetaker_state::ipcon_reg_w(uint16_t data) +{ + m_boot_seq_done = BIT(data, 7); + m_proc_lock = BIT(data, 6); // bus lock for this processor (hold other processor in wait state) + m_char_ctr = BIT(data, 5); // battery charge control (incorrectly called 'Char counter' in source code) + m_disable_rom = BIT(data, 4); // disable rom at 0000-0fff + m_corr_on_q = BIT(data, 3); // CorrectionOn (ECC correction enabled); also LedInd5 + m_led_ind6 = BIT(data, 2); + m_led_ind7 = BIT(data, 1); + m_led_ind8 = BIT(data, 0); + popmessage("LEDS: CR1: %d, CR2: %d, CR3: %d, CR4: %d", BIT(data, 2), BIT(data, 3), BIT(data, 1), BIT(data, 0)); // cr1 and 2 are in the reverse order as expected, according to the schematic +} + +/* handlers for the two system hd6402s (ay-5-1013 equivalent) */ +/* * Keyboard hd6402 */ +uint16_t notetaker_state::read_op_status_r() // 74ls368 hex inverter at #l7 provides 4 bits, inverted +{ + uint16_t data = 0xfff0; + data |= (m_outfifo_count >= 1) ? 0 : 0x08; // m_fifo_out_rdy is true if the fifo has at least 1 word in it, false otherwise + data |= (m_outfifo_count < 16) ? 0 : 0x04; // m_fifo_in_rdy is true if the fifo has less than 16 words in it, false otherwise + // note /SWE is permanently enabled, so we don't enable it here for HD6402 reading + data |= m_kbduart->dav_r() ? 0 : 0x02; // DR - pin 19 + data |= m_kbduart->tbmt_r() ? 0 : 0x01; // TBRE - pin 22 + + LOGMASKED(LOG_READOP_STATUS, "ReadOPStatus read, returning %04x\n", data); + + return data; +} + +void notetaker_state::load_key_ctl_reg_w(uint16_t data) +{ + m_kbduart->write_cs(0); + m_kbduart->write_np(BIT(data, 4)); // PI - pin 35 + m_kbduart->write_tsb(BIT(data, 3)); // SBS - pin 36 + m_kbduart->write_nb2(BIT(data, 2)); // CLS2 - pin 37 + m_kbduart->write_nb1(BIT(data, 1)); // CLS1 - pin 38 + m_kbduart->write_eps(BIT(data, 0)); // EPE - pin 39 + m_kbduart->write_cs(1); +} + +void notetaker_state::key_data_reset_w(uint16_t data) +{ + m_kbduart->write_rdav(0); // DDR - pin 18 + m_kbduart->write_rdav(1); // '' +} + +void notetaker_state::key_chip_reset_w(uint16_t data) +{ + m_kbduart->write_xr(0); // MR - pin 21 + m_kbduart->write_xr(1); // '' +} + +/* FIFO (DAC) Stuff and ADC stuff */ +void notetaker_state::fifo_reg_w(uint16_t data) +{ + m_set_sh = BIT(data, 15); + m_sh_cona = BIT(data, 14); + m_sh_conb = BIT(data, 13); + m_fr_sel0 = BIT(data, 12); + m_fr_sel1 = BIT(data, 11); + m_fr_sel2 = BIT(data, 10); + m_tablet_x_on = BIT(data, 9); + m_tablet_y_on = BIT(data, 8); + m_fifo_timer->adjust(attotime::from_hz(((960_kHz_XTAL / 10) / 4) / ((m_fr_sel0 << 3) + (m_fr_sel1 << 2) + (m_fr_sel2 << 1) + 1))); + /* FIFO timer is clocked by 960khz divided by 10 (74ls162 decade counter), + divided by 4 (mc14568B with divider 1 pins set to 4), divided by + 1,3,5,7,9,11,13,15 (or 0,2,4,6,8,10,12,14?) + */ + // todo: handle tablet and sample/hold stuff as well + LOGMASKED(LOG_FIFO, "Write to 0x60 fifo_reg_w of %04x; fifo timer set to %d hz\n", data, ((960'000 / 10) / 4) / ((m_fr_sel0 << 3) + (m_fr_sel1 << 2) + (m_fr_sel2 << 1) + 1)); +} + +void notetaker_state::fifo_bus_w(uint16_t data) +{ + if (m_outfifo_count == 16) + { + LOGMASKED(LOG_SPC_DSP, "outfifo was full, write ignored!\n"); + return; + } + m_outfifo[m_outfifo_head_ptr] = data >> 4; + m_outfifo_head_ptr++; + m_outfifo_count++; + m_outfifo_head_ptr&=0xF; +} + +void notetaker_state::disk_reg_w(uint16_t data) +{ + /* See http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19781023_More_NoteTaker_IO_Information.pdf + but note that bit 12 (called bit 3 in documentation) was changed between + oct 1978 and 1979 to reset the disk controller digital-PLL as + ClrDiskCont' rather than acting as ProgBitClk0, which is permanently + wired high instead, meaning only the 4.5Mhz - 18Mhz dot clocks are + available for the CRTC. */ + m_adc_spd0 = BIT(data, 15); + m_adc_spd1 = BIT(data, 14); + m_stopword_clock_q = BIT(data, 13); + //if (!(m_clr_diskcont_q) && (data & 0x1000)) m_floppy->device_reset(); // reset on rising edge + m_clr_diskcont_q = BIT(data, 12); // originally ProgBitClk0, but co-opted later to reset the FDC's external PLL + m_prog_bitclk1 = BIT(data, 11); + m_prog_bitclk2 = BIT(data, 10); + m_prog_bitclk3 = BIT(data, 9); + m_an_sel4 = BIT(data, 8); + m_an_sel2 = BIT(data, 7); + m_an_sel1 = BIT(data, 6); + m_drive_sel1 = BIT(data, 5); + m_drive_sel2 = BIT(data, 4); // drive 2 not present on hardware, but could work if present + m_drive_sel3 = BIT(data, 3); // drive 3 not present on hardware, but could work if present + m_side_select = BIT(data, 2); + m_disk_5v_on = BIT(data, 1); + m_disk_12v_on = BIT(data, 0); + + // ADC stuff + //TODO + + // FDC stuff + // first handle the motor stuff; we'll clobber whatever was in m_floppy, then reset it to what it should be + m_floppy = m_floppy0->get_device(); + + // Disk5VOn and 12VOn can be thought of as a crude MotorOn signal as the motor won't run with either? of them missing. + // However, a tech note involves adding a patch so that MotorOn is only activated if the drive is actually selected. + m_floppy->mon_w(!(m_disk_5v_on && m_disk_12v_on && m_drive_sel1)); + + //m_floppy = m_floppy1->get_device(); + //m_floppy->mon_w(!(m_disk_5v_on && m_disk_12v_on && m_drive_sel2)); // Disk5VOn and 12VOn can be thought of as a crude MotorOn signal as the motor won't run with either? of them missing. + //m_floppy = m_floppy2->get_device(); + //m_floppy->mon_w(!(m_disk_5v_on && m_disk_12v_on && m_drive_sel3)); // Disk5VOn and 12VOn can be thought of as a crude MotorOn signal as the motor won't run with either? of them missing. + + // now restore m_floppy state to what it should be + if (m_drive_sel1) + m_floppy = m_floppy0->get_device(); + else + m_floppy = nullptr; + + m_fdc->set_floppy(m_floppy); // select the floppy + if (m_floppy) + { + m_floppy->ss_w(m_side_select); + } + + // CRTC clock rate stuff + //TODO +} + +void notetaker_state::load_disp_addr_w(uint16_t data) +{ + m_disp_addr = data; + // for future low level emulation: clear the current counter position here as well, as well as empty/reset the display fifo, and the setmemrq state. +} + +/* EIA hd6402 */ +uint16_t notetaker_state::read_eia_status_r() // 74ls368 hex inverter at #f1 provides 2 bits, inverted +{ + uint16_t data = 0xfffc; + // note /SWE is permanently enabled, so we don't enable it here for HD6402 reading + data |= m_eiauart->dav_r() ? 0 : 0x02; // DR - pin 19 + data |= m_eiauart->tbmt_r() ? 0 : 0x01; // TBRE - pin 22 + return data; +} + +void notetaker_state::load_eia_ctl_reg_w(uint16_t data) +{ + m_eiauart->write_cs(0); + m_eiauart->write_np(BIT(data, 4)); // PI - pin 35 + m_eiauart->write_tsb(BIT(data, 3)); // SBS - pin 36 + m_eiauart->write_nb2(BIT(data, 2)); // CLS2 - pin 37 + m_eiauart->write_nb1(BIT(data, 1)); // CLS1 - pin 38 + m_eiauart->write_eps(BIT(data, 0)); // EPE - pin 39 + m_eiauart->write_cs(1); +} + +void notetaker_state::eia_data_reset_w(uint16_t data) +{ + m_eiauart->write_rdav(0); // DDR - pin 18 + m_eiauart->write_rdav(1); // '' +} + +void notetaker_state::eia_chip_reset_w(uint16_t data) +{ + m_eiauart->write_xr(0); // MR - pin 21 + m_eiauart->write_xr(1); // '' +} + + +/* These next two members are memory map related for the iop */ +uint16_t notetaker_state::iop_r(offs_t offset) +{ + uint16_t *rom = (uint16_t *)(memregion("iop")->base()); + rom += 0x7f800; + uint16_t *ram = m_mainram.get(); + if (m_boot_seq_done == 0 || (m_disable_rom == 0 && (offset & 0x7f800) == 0)) + { + rom += offset & 0x7ff; + return *rom; + } + else + { + // are we in the FFFE8-FFFEF area where the parity/int/reset/etc stuff lives? + if (offset >= 0x7fff4) + { + logerror("attempt to read processor control regs at %d\n", offset << 1); + return 0xffff; + } + ram += offset; + return *ram; + } +} + +void notetaker_state::iop_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + //uint16_t tempword; + uint16_t *ram = m_mainram.get(); + if (m_boot_seq_done == 0 || (m_disable_rom == 0 && (offset & 0x7f800) == 0)) + { + logerror("attempt to write %04X to ROM-mapped area at %06X ignored\n", data, offset << 1); + return; + } + // are we in the FFFE8-FFFEF area where the parity/int/reset/etc stuff lives? + if (offset >= 0x7fff4) + { + logerror("attempt to write processor control regs at %d with %02X ignored\n", offset << 1, data); + } + COMBINE_DATA(&ram[offset]); +} + +/* Address map comes from http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf +a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 BootSeqDone DisableROM +mode 0: (to get the boot vector and for maybe 1 or 2 instructions afterward) +x x x x x x x x * * * * * * * * * * * * 0 x R ROM (writes are open bus) +mode 1: (during most of boot) +0 0 0 0 0 0 0 0 * * * * * * * * * * * * 1 0 R ROM (writes are open bus) +0 0 0 0 0 0 0 1 * * * * * * * * * * * * 1 0 RW RAM +0 0 0 0 0 0 1 * * * * * * * * * * * * * 1 0 RW RAM +x x x x x x x x x x x x x x 1 0 . Open Bus +mode 2: (during load of the emulatorcpu's firmware to the first 8k of shared ram which is on the emulatorcpu board) +0 0 * * * * * * * * * * * * * * * * * * 1 1 RW RAM +x x x x x x x x x x x x x x 1 1 . Open Bus + EXCEPT for the following, decoded by the memory address logic board: +1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 x 1 x . Open Bus +1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 x 1 x W FFFEA (Multiprocessor Control (reset/int/boot for each proc; data bits 3,2,1,0 = 0010 means IP, bits 3210 = 0111 means EP; all others ignored.)) +1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 x 1 x R FFFEC (Syndrome bits (gnd bit 15, parity bit 14, exp (ECC) bits 13-8, bits 7-0 are 'other' (?maybe highest address bits?) +1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 x 1 x R FFFEE (Parity Error Address: row bits 15-8, column bits 7-0; reading this acknowledges a parity interrupt) + +More or less: +BootSeqDone is 0, DisableROM is ignored, mem map is 0x00000-0xfffff reading is the 0x1000-long ROM, repeated every 0x1000 bytes. writing goes nowhere. +BootSeqDone is 1, DisableROM is 0, mem map is 0x00000-0x00fff reading is the 0x1000-long ROM, remainder of memory map goes to RAM or open bus. writing the ROM area goes nowhere, writing RAM goes to RAM. +BootSeqDone is 1, DisableROM is 1, mem map is entirely RAM or open bus for both reading and writing. +*/ + +void notetaker_state::iop_mem(address_map &map) +{ + /* + map(0x00000, 0x00fff).rom().region("iop", 0xff000); // rom is here if either BootSeqDone OR DisableROM are zero. the 1.5 source code and the schematics implies writes here are ignored while rom is enabled; if disablerom is 1 this goes to mainram + map(0x01000, 0x3ffff).ram().share("mainram"); // 256k of ram (less 8k), shared between both processors. rom goes here if bootseqdone is 0 + // note 4000-d5ff is the framebuffer for the screen, in two sets of fields for odd/even interlace? + map(0xff000, 0xfffe7).rom().region("iop", 0xff000); // rom is only banked in here if bootseqdone is 0, so the reset vector is in the proper place. otherwise the memory control regs live at fffe8-fffef + //map(0xfffea, 0xfffeb).w(FUNC(notetaker_state::cpuCtl_w)); + //map(0xfffec, 0xfffed).r(FUNC(notetaker_state::parityErrHi_r)); + //map(0xfffee, 0xfffef).r(this. FUNC(notetaker_state::parityErrLo_r)); + map(0xffff0, 0xfffff).rom().region("iop", 0xffff0); + */ + map(0x00000, 0xfffff).rw(FUNC(notetaker_state::iop_r), FUNC(notetaker_state::iop_w)); // bypass MAME's memory map system as we need finer grained control +} + +/* iop memory map comes from http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/memos/19790605_Definition_of_8086_Ports.pdf + and from the schematic at http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf +a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 +x x x x 0 x x x x x x 0 0 0 0 x x x * . RW IntCon (PIC8259) +x x x x 0 x x x x x x 0 0 0 1 x x x x . W IPConReg +x x x x 0 x x x x x x 0 0 1 0 x 0 0 0 . . KbdInt:Open Bus +x x x x 0 x x x x x x 0 0 1 0 x 0 0 1 . R KbdInt:ReadKeyData +x x x x 0 x x x x x x 0 0 1 0 x 0 1 0 . R KbdInt:ReadOPStatus +x x x x 0 x x x x x x 0 0 1 0 x 0 1 1 . . KbdInt:Open Bus +x x x x 0 x x x x x x 0 0 1 0 x 1 0 0 . W KbdInt:LoadKeyCtlReg +x x x x 0 x x x x x x 0 0 1 0 x 1 0 1 . W KbdInt:LoadKeyData +x x x x 0 x x x x x x 0 0 1 0 x 1 1 0 . W KbdInt:KeyDataReset +x x x x 0 x x x x x x 0 0 1 0 x 1 1 1 . W KbdInt:KeyChipReset +x x x x 0 x x x x x x 0 0 1 1 x x x x . W FIFOReg +x x x x 0 x x x x x x 0 1 0 0 x x x x . . Open Bus(originally ReadOpStatus) +x x x x 0 x x x x x x 0 1 0 1 x x * * . RW SelPIA (debugger board 8255 PIA)[Open Bus on normal units] +x x x x 0 x x x x x x 0 1 1 0 x x x x . W FIFOBus +x x x x 0 x x x x x x 0 1 1 1 x x x x . . Open Bus +x x x x 0 x x x x x x 1 0 0 0 x x x x . RW SelDiskReg +x x x x 0 x x x x x x 1 0 0 1 x x * * . RW SelDiskInt +x x x x 0 x x x x x x 1 0 1 0 * * * * . W SelCrtInt +x x x x 0 x x x x x x 1 0 1 1 x x x x . W LoadDispAddr +x x x x 0 x x x x x x 1 1 0 0 x x x x . . Open Bus(originally ReadEIAStatus) +x x x x 0 x x x x x x 1 1 0 1 x 0 0 0 . R SelEIA:ReadEIAStatus +x x x x 0 x x x x x x 1 1 0 1 x 0 0 1 . R SelEIA:ReadEIAData +x x x x 0 x x x x x x 1 1 0 1 x 0 1 0 . . SelEIA:Open Bus +x x x x 0 x x x x x x 1 1 0 1 x 0 1 1 . . SelEIA:Open Bus +x x x x 0 x x x x x x 1 1 0 1 x 1 0 0 . W SelEIA:LoadEIACtlReg +x x x x 0 x x x x x x 1 1 0 1 x 1 0 1 . W SelEIA:LoadEIAData +x x x x 0 x x x x x x 1 1 0 1 x 1 1 0 . W SelEIA:EIADataReset +x x x x 0 x x x x x x 1 1 0 1 x 1 1 1 . W SelEIA:EIAChipReset +x x x x 0 x x x x x x 1 1 1 0 x x x x . R SelADCHi +x x x x 0 x x x x x x 1 1 1 1 x x x x . W CRTSwitch +*/ +void notetaker_state::iop_io(address_map &map) +{ + map.unmap_value_high(); + map(0x00, 0x03).mirror(0x7e1c).rw(m_iop_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); + map(0x20, 0x21).mirror(0x7e1e).w(FUNC(notetaker_state::ipcon_reg_w)); // I/O processor (rom mapping, etc) control register + map(0x42, 0x42).mirror(0x7e10).r(m_kbduart, FUNC(ay31015_device::receive)); // read keyboard data + map(0x44, 0x45).mirror(0x7e10).r(FUNC(notetaker_state::read_op_status_r)); // read keyboard fifo state + map(0x48, 0x49).mirror(0x7e10).w(FUNC(notetaker_state::load_key_ctl_reg_w)); // kbd uart control register + map(0x4a, 0x4a).mirror(0x7e10).w(m_kbduart, FUNC(ay31015_device::transmit)); // kbd uart data register + map(0x4c, 0x4d).mirror(0x7e10).w(FUNC(notetaker_state::key_data_reset_w)); // kbd uart ddr switch (data reset) + map(0x4e, 0x4f).mirror(0x7e10).w(FUNC(notetaker_state::key_chip_reset_w)); // kbd uart reset + map(0x60, 0x61).mirror(0x7e1e).w(FUNC(notetaker_state::fifo_reg_w)); // DAC sample and hold and frequency setup + //map(0xa0, 0xa1).mirror(0x7e18).rw("debug8255", FUNC(8255_device::read), FUNC(8255_device::write)); // debugger board 8255 + map(0xc0, 0xc1).mirror(0x7e1e).w(FUNC(notetaker_state::fifo_bus_w)); // DAC data write to FIFO + map(0x100, 0x101).mirror(0x7e1e).w(FUNC(notetaker_state::disk_reg_w)); // I/O register (adc speed, crtc pixel clock and clock enable, +5 and +12v relays for floppy, etc) + map(0x120, 0x127).mirror(0x7e18).rw(m_fdc, FUNC(fd1791_device::read), FUNC(fd1791_device::write)).umask16(0x00ff); // floppy controller + map(0x140, 0x15f).mirror(0x7e00).rw(m_crtc, FUNC(crt5027_device::read), FUNC(crt5027_device::write)).umask16(0x00ff); // crt controller + map(0x160, 0x161).mirror(0x7e1e).w(FUNC(notetaker_state::load_disp_addr_w)); // loads the start address for the display framebuffer + map(0x1a0, 0x1a1).mirror(0x7e10).r(FUNC(notetaker_state::read_eia_status_r)); // read eia fifo state + map(0x1a2, 0x1a2).mirror(0x7e10).r(m_eiauart, FUNC(ay31015_device::receive)); // read eia data + map(0x1a8, 0x1a9).mirror(0x7e10).w(FUNC(notetaker_state::load_eia_ctl_reg_w)); // eia uart control register + map(0x1aa, 0x1aa).mirror(0x7e10).w(m_eiauart, FUNC(ay31015_device::transmit)); // eia uart data register + map(0x1ac, 0x1ad).mirror(0x7e10).w(FUNC(notetaker_state::eia_data_reset_w)); // eia uart ddr switch (data reset) + map(0x1ae, 0x1af).mirror(0x7e10).w(FUNC(notetaker_state::eia_chip_reset_w)); // eia uart reset + //map(0x1c0, 0x1c1).mirror(0x7e1e).r(FUNC(notetaker_state::SelADCHi_r)); // ADC read + //map(0x1e0, 0x1e1).mirror(0x7e1e).r(FUNC(notetaker_state::CRTSwitch_w)); // CRT power enable? +} + +/* iop_pic8259 interrupts: +irq0 parity error (parity error syndrome data will be in fffdx/fffex) - currently ignored +irq1 IPSysInt (interrupt triggered by the emulator cpu) +irq2 DiskInt (interrupt triggered by the IRQ or DRQ pins from the WD1791) +irq3 EIAInt (interrupt triggered by the datareceived pin from the eiauart) +irq4 OddInt (interrupt triggered by the O/E Odd/Even pin from the crt5027) +irq5 ADCInt (interrupt triggered at the ADCSpd rate interrupt from 74c161 counter on the disk/display module to indicate adc conversion finished) +irq6 KbdInt (interrupt triggered by the datareceived pin from the kbduart) +irq7 VSync (interrupt from the VSYN VSync pin from the crt5027) +*/ + +/* writes during boot of io roms v2.0: +0x88 to port 0x020 (PCR; BootSeqDone(1), processor not locked(0), battery charger off(0), rom not disabled(0) correction off&cr4 off(1), cr3 on(0), cr2 on(0), cr1 on (0);) +0x0002 to port 0x100 (IOR write: enable 5v only relay control) +0x0003 to port 0x100 (IOR write: in addition to above, enable 12v relay control) + +0x13 to port 0x000 PIC (ICW1, 8085 vector 0b000[ignored], edge trigger mode, interval of 8, single mode (no cascade/ICW3), ICW4 needed ) +0x08 to port 0x002 PIC (ICW2, T7-T3 = 0b00001) +0x0D to port 0x002 PIC (ICW4, SFNM OFF, Buffered Mode MASTER, Normal EOI, 8086 mode) +0xff to port 0x002 PIC (OCW1, All Ints Masked (disabled/suppressed)) +0x0000 to port 0x04e (reset keyboard fifo/controller) +0x0000 to port 0x1ae (reset UART) +0x0016 to port 0x048 (kbd control reg write) +0x0005 to port 0x1a8 (UART control reg write) +0x5f to port 0x140 (reg0 95 horizontal lines) \ +0xf2 to port 0x142 (reg1 interlaced, hswidth=0xE, hsdelay=2) \ +0x7d to port 0x144 (reg2 16 scans/row, 5 chars/datarow) \ +0x1d to port 0x146 (reg3 0 skew bits, 0x1D datarows/frame) \_ set up CRTC +0x04 to port 0x148 (reg4 4 scan lines/frame) / +0x10 to port 0x14a (reg5 0x10 vdatastart) / +0x00 to port 0x154 (reset the crtc) / +0x1e to port 0x15a (reg8 load cursor line address = 0x1e) / +0x0a03 to port 0x100 (IOR write: set bit clock to 12Mhz) +0x2a03 to port 0x100 (IOR write: enable crtc clock chain) +0x00 to port 0x15c (fire off crtc timing chain) +read from 0x0002 (byte wide) (IMR, read interrupt mask, will be 0xFF from above) +0xaf to port 0x002 PIC (mask out with 0xEF and 0xBF to unnmask interrupts IR4(OddInt) and IR6(KbdInt), and write back to IMR) +0x0400 to 0x060 (select DAC fifo frequency 2) +read from 0x44 (byte wide) to check input fifo status +... more stuff here missing relating to making the beep tone through fifo +(around pc=6b6) read keyboard uart until mouse button is clicked (WaitNoBug) +(around pc=6bc) read keyboard uart until mouse button is released (WaitBug) +0x2a23 to port 0x100 (select drive 1) +0x2a23 to port 0x100 (select drive 1) +0x3a23 to port 0x100 (unset disk separator clear (allow disk head reading)) +0x3a27 to port 0x100 (select disk side 1) +0x3a07 to port 0x100 (unselect all drives) + +*/ + + + +/* Emulator CPU */ + +void notetaker_state::epcon_reg_w(uint16_t data) +{ + /*m_EP_LED1 = m_EP_ParityError; // if parity checking is enabled AND the last access was to the low 8k AND there was a parity error, the parity error latch is latched here. It triggers an interrupt. + m_EP_LED2 = (data&0x40)?1:0; + m_EP_LED3 = (data&0x20)?1:0; + m_EP_LED4 = (data&0x10)?1:0; + m_EP_LED_SelROM_q = (data&0x08)?1:0; // this doesn't appear to be hooked anywhere, andjust drives an LED + // originally, SelROM_q enabled two 2716 EPROMS, later 82s137 PROMS to map code to the FFC00-FFFFF area but this was dropped in the 1979 design revision in favor of having the IOP write the boot vectors for the EP to the shared ram instead. See below for how the top two address bits are disconnected to allow this to work with the way the shared ram is mapped. + m_EP_ProcLock = (data&0x04)?1:0; // bus lock for this processor (hold other processor in wait state) + m_EP_SetParity_q = (data&0x02)?1:0; // enable parity checking on local ram if low + m_EP_DisLMem_q = (data&0x01)?1:0; // if low, the low 8k of local memory is disabled and accesses the shared memory instead. + popmessage("EP LEDS: CR1: %d, CR2: %d, CR3: %d, CR4: %d", (data&0x80)>>2, (data&0x40)>>3, (data&0x20)>>1, (data&0x10));*/ +} + +/* +Emulator cpu mem map: +(The top two address bits are disconnected, to allow the ram board, which maps itself only at 00000-3ffff, to appear at "ffff0" to the ep processor when /reset is de-asserted by the iop) +a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 DisLMem_q +x x 0 0 0 0 0 * * * * * * * * * * * * * 0 RW Local (fast) RAM +x x 0 0 0 0 0 * * * * * * * * * * * * * 1 RW System/Shared RAM + * * * * * * * * * * * * * x RW System/Shared RAM + EXCEPT for the following, decoded by the EP board and superseding above: +x x 1 1 1 1 1 1 1 1 1 1 1 1 0 x x x x x x RW FFFC0-FFFDF (trigger ILLINST interrupt on EP, data ignored?) + And the following, decoded by the memory address logic board: +x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 x x . Open Bus +x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 x x W FFFEA (Multiprocessor Control (reset(bit 6)/int(bit 5)/boot(bit 4) for each processor; data bits 3,2,1,0 are 'processor address'; 0010 means IP, 0111 means EP; all others ignored.)) +x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 x x R FFFEC (Syndrome bits (gnd bit 15, parity bit 14, exp(syndrome) bits 13-8, bits 7-0 are the highest address bits) +x x 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 x x R FFFEE (Parity Error Address: row bits 15-8, column bits 7-0; reading this also acknowledges a parity interrupt) +*/ + +uint16_t notetaker_state::ep_mainram_r(offs_t offset, u16 mem_mask) +{ + return m_mainram[offset + 0x2000/2]; +} + +void notetaker_state::ep_mainram_w(offs_t offset, u16 data, u16 mem_mask) +{ + COMBINE_DATA(&m_mainram[offset + 0x2000/2]); +} + +void notetaker_state::ep_mem(address_map &map) +{ + map(0x00000, 0x01fff).mirror(0xc0000).ram(); // actually a banked block of ram, 8kb (4kw) + map(0x02000, 0x3ffff).mirror(0xc0000).rw(FUNC(notetaker_state::ep_mainram_r), FUNC(notetaker_state::ep_mainram_w)); // 256k of ram (less 8k), shared between both processors, mirrored 4 times + //map(0xfffc0, 0xfffdf).mirror(0xc0000).rw(FUNC(notetaker_state::proc_illinst_r), FUNC(notetaker_state::proc_illinst_w)); + //map(0xfffe0, 0xfffef).mirror(0xc0000).rw(FUNC(notetaker_state::proc_control_r), FUNC(notetaker_state::proc_control_w)); +} + +/* note everything in the emulatorcpu's io range is incompletely decoded; so if + 0x1800 is accessed it will write to both the debug 8255 AND the pic8259! + I'm not sure the code abuses this or not, but it might do so to both write + registers and clear parity at once, or something similar. */ +/* +Emulator cpu i/o map: +a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 DisLMem_q +x x x x x x x x 1 x x x x x x x x x * x x RW 8259 +x x x x x x x 1 x x x x x x x x x * * x x RW EP debugger 8255, same exact interface on both cpu and alto side as the IOP debugger 8255 +x x x x x x 1 x x x x x x x x x x x x x x W EPConReg +x x x x x 1 x x x x x x x x x x x x x x x W Writing anything here clears the parity error latch +*/ + +void notetaker_state::ep_io(address_map &map) +{ + map.unmap_value_high(); + map(0x800, 0x803).mirror(0x07fc).rw(m_ep_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); + //map(0x1000, 0x1001).mirror(0x07fe).rw("debug8255", FUNC(8255_device::read), FUNC(8255_device::write)); // debugger board 8255, is this the same one as the iop accesses? or are these two 8255s on separate cards? + map(0x2000, 0x2001).mirror(0x07fe).w(FUNC(notetaker_state::epcon_reg_w)); // emu processor control reg & leds + //map(0x4000, 0x4001).mirror(0x07fe).w(FUNC(notetaker_state::EmuClearParity_w)); // writes here clear the local 8k-ram parity error register +} + +/* Input ports */ + +/* Floppy Image Interface */ +static void notetaker_floppies(device_slot_interface &device) +{ + device.option_add("525dd", FLOPPY_525_DD); +} + +/* Machine Start; allocate timers and savestate stuff */ +void notetaker_state::machine_start() +{ + // allocate RAM + m_mainram = make_unique_clear(0x100000/2); + + // allocate the DAC timer, and set it to fire NEVER. We'll set it up properly in IPReset. + m_fifo_timer = timer_alloc(FUNC(notetaker_state::timer_fifoclk), this); + m_fifo_timer->adjust(attotime::never); + + // FDC: /DDEN is tied permanently LOW so MFM mode is ALWAYS ON + m_fdc->dden_w(0); + + // Keyboard UART: /SWE is tied permanently LOW + m_kbduart->write_swe(0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active) + + // EIA UART: /SWE is tied permanently LOW + m_eiauart->write_swe(0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active) + + // TODO: register savestate items +} + +/* Machine Reset; this emulates the full system reset, triggered by ExtReset' (cardcage pin <50>) or the PowerOnReset' circuit */ +void notetaker_state::machine_reset() +{ + iop_reset(); + ep_reset(); +} + +/* IP Reset; this emulates the IPReset' signal */ +void notetaker_state::iop_reset() +{ + // reset the Keyboard UART + m_kbduart->write_xr(0); // MR - pin 21 + m_kbduart->write_xr(1); // '' + + // reset the EIA UART + m_eiauart->write_xr(0); // MR - pin 21 + m_eiauart->write_xr(1); // '' + + // reset the IPConReg ls273 latch at #f1 + ipcon_reg_w(0x0000); + + // Clear the DAC FIFO + for (int i = 0; i < 16; i++) + m_outfifo[i] = 0; + m_outfifo_count = 0; + m_outfifo_tail_ptr = 0; + m_outfifo_head_ptr = 0; + + // reset the FIFOReg latch at #h9 + fifo_reg_w(0x0000); + + // reset the DiskReg latches at #c4 and #b4 on the disk/display/eia controller board + disk_reg_w(0x0000); + + // reset the framebuffer display address counter: + m_disp_addr = 0; +} + +/* EP Reset; this emulates the EPReset' signal */ +void notetaker_state::ep_reset() +{ + // TODO: force ep into reset and hold it there, until the iop releases it. + // there's 6 'state' bits controllable by the memory mapped cpu control reg, which need to be reset for epcpu and iocpu separately +} + +/* Input ports */ +static INPUT_PORTS_START( notetakr ) +INPUT_PORTS_END + +void notetaker_state::notetakr(machine_config &config) +{ + /* basic machine hardware */ + /* IO CPU: 8086@8MHz */ + I8086(config, m_iop_cpu, 24_MHz_XTAL / 3); /* iD8086-2 @ E4A; 24Mhz crystal divided down to 8Mhz by i8284 clock generator */ + m_iop_cpu->set_addrmap(AS_PROGRAM, ¬etaker_state::iop_mem); + m_iop_cpu->set_addrmap(AS_IO, ¬etaker_state::iop_io); + m_iop_cpu->set_irq_acknowledge_callback("iop_pic8259", FUNC(pic8259_device::inta_cb)); + + PIC8259(config, m_iop_pic, 0); // iP8259A-2 @ E6 + m_iop_pic->out_int_callback().set_inputline(m_iop_cpu, 0); + + /* Emulator CPU: 8086@5MHz */ + I8086(config, m_ep_cpu, 15_MHz_XTAL / 3); + m_ep_cpu->set_disable(); // TODO: implement the cpu control bits so this doesn't execute garbage/zeroes before its firmware gets loaded + m_ep_cpu->set_addrmap(AS_PROGRAM, ¬etaker_state::ep_mem); + m_ep_cpu->set_addrmap(AS_IO, ¬etaker_state::ep_io); + m_ep_cpu->set_irq_acknowledge_callback("ep_pic8259", FUNC(pic8259_device::inta_cb)); + + PIC8259(config, m_ep_pic, 0); // iP8259A-2 @ E6 + m_ep_pic->out_int_callback().set_inputline(m_ep_cpu, 0); + + /* video hardware */ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_refresh_hz(60.975); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(250)); + screen.set_screen_update(FUNC(notetaker_state::screen_update)); + screen.set_size(640, 480); + screen.set_visarea(0, 640-1, 0, 480-1); + screen.set_palette("palette"); + + PALETTE(config, "palette", palette_device::MONOCHROME); + + /* Devices */ + CRT5027(config, m_crtc, (36_MHz_XTAL / 4) / 8); // See below + /* the clock for the crt5027 is configurable rate; 36MHz xtal divided by 1*, + 2, 3, 4, 5, 6, 7, or 8 (* because this is a 74s163 this setting probably + means divide by 1; documentation at + http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790605_Definition_of_8086_Ports.pdf + claims it is 1.5, which makes no sense) and secondarily divided by 8 + (again by two to load the 16 bit output shifters after this). + on reset, bitclk is 000 so divider is (36mhz/8)/8; during boot it is + written with 101, changing the divider to (36mhz/4)/8 */ + // TODO: for now, we just hack it to the latter setting from start; this should be handled correctly in iop_reset(); + m_crtc->set_char_width(8); //(8 pixels per column/halfword, 16 pixels per fullword) + // TODO: below is HACKED to trigger the odd/even int ir4 instead of vblank int ir7 since ir4 is required for anything to be drawn to screen. + // hence with the hack this interrupt triggers twice as often as it should + m_crtc->vsyn_callback().set(m_iop_pic, FUNC(pic8259_device::ir4_w)); // note this triggers interrupts on both the iop (ir7) and emulatorcpu (ir4) + m_crtc->set_screen("screen"); + + AY31015(config, m_kbduart); // HD6402, == AY-3-1015D + m_kbduart->write_dav_callback().set(m_iop_pic, FUNC(pic8259_device::ir6_w)); // DataRecvd = KbdInt + + clock_device &kbdclock(CLOCK(config, "kbdclock", 960_kHz_XTAL)); // hard-wired to 960KHz xtal #f11 (60000 baud, 16 clocks per baud) + kbdclock.signal_handler().set(m_kbduart, FUNC(ay31015_device::write_rcp)); + kbdclock.signal_handler().append(m_kbduart, FUNC(ay31015_device::write_tcp)); + + AY31015(config, m_eiauart); // HD6402, == AY-3-1015D + m_eiauart->write_dav_callback().set(m_iop_pic, FUNC(pic8259_device::ir3_w)); // EIADataReady = EIAInt + + // hard-wired through an mc14568b divider set to divide by 4, the result set to divide by 5; this resulting 4800hz signal being 300 baud (16 clocks per baud) + clock_device &eiaclock(CLOCK(config, "eiaclock", ((960_kHz_XTAL / 10) / 4) / 5)); + eiaclock.signal_handler().set(m_eiauart, FUNC(ay31015_device::write_rcp)); + eiaclock.signal_handler().append(m_eiauart, FUNC(ay31015_device::write_tcp)); + + /* Floppy */ + FD1791(config, m_fdc, (((24_MHz_XTAL / 3) / 2) / 2)); // 2mhz, from 24mhz ip clock divided by 6 via 8284, an additional 2 by LS161 at #e1 on display/floppy board + FLOPPY_CONNECTOR(config, "wd1791:0", notetaker_floppies, "525dd", floppy_image_device::default_mfm_floppy_formats); + + /* sound hardware */ + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + // TODO: hook DAC up to two HA2425 (sample and hold) chips and hook those up to the speakers + DAC1200(config, m_dac, 0).add_route(ALL_OUTPUTS, "lspeaker", 0.5).add_route(ALL_OUTPUTS, "rspeaker", 0.5); // unknown DAC +} + +void notetaker_state::driver_start() +{ + // descramble the rom; the whole thing is a gigantic scrambled mess either to ease + // interfacing with older xerox technologies which used A0 and D0 as the MSB bits + // or maybe because someone screwed up somewhere along the line. we may never know. + // see http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf pages 12 and onward + uint16_t *romsrc = (uint16_t *)(memregion("iopload")->base()); + uint16_t *romdst = (uint16_t *)(memregion("iop")->base()); + // leave the src pointer alone, since we've only used a 0x1000 long address space + romdst += 0x7f800; // set the dest pointer to 0xff000 (>>1 because 16 bits data) + for (int i = 0; i < 0x800; i++) + { + uint16_t wordtemp = bitswap<16>(*romsrc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); // data bus is completely reversed + uint16_t addrtemp = bitswap<11>(i, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10); // address bus is completely reversed; 11-15 should always be zero + uint16_t *temppointer = romdst + (addrtemp & 0x7ff); + *temppointer = wordtemp; + romsrc++; + } +} + +/* ROM definition */ +/* +The notetaker, over its lifetime from 1978 to 1981, had three different classes of IOP roms, with multiple versions of each one. +These were: +BIOP - "Bootable", standalone "user" unit, running smalltalk-78 off of a boot disk, either single or double density; early notetakers used an fd1791 while later ones used a wd1791. +XIOP - "eXercizer" intended for initial testing of each NoteTaker system as assembled; only usable running tethered to a Xerox Alto running notex (notex.cm) as a hardware scripting language for system testing +MIOP - only bootable tethered to a Xerox Alto via a debug card, running smalltalk on the NoteTaker, but not booted off of the floppy disk. +The 'Z-iop' firmware 1.5 below seems to be a BIOP firmware. +*/ + +ROM_START( notetakr ) + ROM_REGION( 0x1000, "iopload", ROMREGION_ERASEFF ) // load roms here before descrambling + ROM_SYSTEM_BIOS( 0, "v2.00", "Bootable IO Monitor v2.00" ) // dumped from Notetaker + ROMX_LOAD( "biop__2.00_hi.b2716.h1", 0x0000, 0x0800, CRC(1119691d) SHA1(4c20b595b554e6f5489ab2c3fb364b4a052f05e3), ROM_SKIP(1) | ROM_BIOS(0)) + ROMX_LOAD( "biop__2.00_lo.b2716.g1", 0x0001, 0x0800, CRC(b72aa4c7) SHA1(85dab2399f906c7695dc92e7c18f32e2303c5892), ROM_SKIP(1) | ROM_BIOS(0)) + ROM_SYSTEM_BIOS( 1, "v1.50", "Bootable IO Monitor v1.50" ) // typed from the source listing at http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19790620_Z-IOP_1.5_ls.pdf and scrambled + ROMX_LOAD( "z-iop_1.50_hi.h1", 0x0000, 0x0800, CRC(122ffb5b) SHA1(b957fe24620e1aa98b3158dbcf459937dbd54bac), ROM_SKIP(1) | ROM_BIOS(1)) + ROMX_LOAD( "z-iop_1.50_lo.g1", 0x0001, 0x0800, CRC(2cb79a67) SHA1(692aafd2aeea27533f6288dbb1cb8678ea08fade), ROM_SKIP(1) | ROM_BIOS(1)) + + ROM_REGION( 0x100000, "iop", ROMREGION_ERASEFF ) // area for descrambled roms + // main ram, on 2 cards with parity/ecc/syndrome/timing/bus arbitration on another 2 cards + + // keyboard mcu which handles key scanning as well as reading the mouse quadratures, and issues state responses if requested by the iop + ROM_REGION( 0x400, "kbmcu", ROMREGION_ERASEFF ) + ROM_LOAD( "keyboard.i8748.a10a", 0x000, 0x400, NO_DUMP ) + + ROM_REGION( 0x500, "proms", ROMREGION_ERASEFF ) + /* disk data separator prom from the disk/display module board: + there are two different versions of this prom, both generated by BCPL programs, + one from mid 1978 (Single density only? seems very buggy and might not even work) + and one from 1979 (which should work and appears here). + Note that the bit order for the state counter (data bits 6,5,4,3) may be + reversed vs the real machine, but since the prom address bus is the only + thing that ever sees the prom data bus, this prom will work even if the + bit order for those bits is backwards. + */ + // 1979 version + ROM_LOAD( "disksep.82s147.a4", 0x000, 0x200, CRC(38363714) SHA1(c995d2702573f5afb5fc919150d3a5661013f999) ) + + // memory cas/ras/write state machine prom from the memory address logic board; the contents of this are listed in: + // http://www.bitsavers.org/pdf/xerox/notetaker/schematics/19781027_Memory_Address_Timing.pdf + ROM_LOAD( "timingprom.82s147.b1", 0x200, 0x200, CRC(3003b50a) SHA1(77d9ffe4716c2297708b8e5ebce7f930619c3cc3) ) + + // SETMEMRQ memory timing prom from the disk/display module board; The equations for this one are actually listed on the schematic and the prom dump can be generated from these: + ROM_LOAD( "memreqprom.82s126.d9", 0x400, 0x100, CRC(56b2be8b) SHA1(5df0579ed8afeb59113700be6f2982ef85f64b44) ) + + /* + SetMemRq: + Address: + 76543210 + |||||||\- WCtr.0 (MSB) + ||||||\-- WCtr.1 + |||||\--- WCtr.2 + ||||\---- WCtr.3 (LSB) + |||\----- RCtr.0 (MSB) + ||\------ RCtr.1 + |\------- RCtr.2 + \-------- RCtr.3 (LSB) + + The schematic has an error here, showing the SetMemRq_q output coming from data bit 0, in reality based on the listing it comes from data bit 3 + Data: + 3210 + |\\\- N/C (always zero) + \---- SetMemRq_q + + Equation: SETMEMRQ == ( + ((Rctr == 0) && ((Wctr == 0)||(Wctr == 4)||(Wctr == 8))) + ||((Rctr == 4) && ((Wctr == 4)||(Wctr == 8)||(Wctr == 12))) + ||((Rctr == 8) && ((Wctr == 8)||(Wctr == 12)||(Wctr == 0))) + ||((Rctr == 12) && ((Wctr == 12)||(Wctr == 0)||(Wctr == 4))) + ) + The PROM output is SetMemRq_q and is inverted compared to the equation above. + */ +ROM_END + +/* Driver */ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1978, notetakr, 0, 0, notetakr, notetakr, notetaker_state, empty_init, "Xerox", "NoteTaker", MACHINE_IS_SKELETON) -- cgit v1.2.3