From 6dfa1274b936bb7820c9616e3539ce4f9abf38bf Mon Sep 17 00:00:00 2001 From: Peter Ferrie Date: Wed, 1 Mar 2017 09:55:48 -0800 Subject: apple2: rewrite LC handling [Peter Ferrie] --- src/devices/bus/a2bus/ramcard16k.cpp | 76 ++++++++++++++------------------- src/devices/bus/a2bus/ramcard16k.h | 5 ++- src/mame/drivers/apple2e.cpp | 81 +++++++++++++++--------------------- 3 files changed, 68 insertions(+), 94 deletions(-) diff --git a/src/devices/bus/a2bus/ramcard16k.cpp b/src/devices/bus/a2bus/ramcard16k.cpp index d12132cbef3..cbde471a14c 100644 --- a/src/devices/bus/a2bus/ramcard16k.cpp +++ b/src/devices/bus/a2bus/ramcard16k.cpp @@ -31,13 +31,13 @@ const device_type A2BUS_RAMCARD16K = device_creator; a2bus_ramcard_device::a2bus_ramcard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) : device_t(mconfig, type, name, tag, owner, clock, shortname, source), - device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_writecnt(0), m_dxxx_bank(0) + device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_last_access(0), m_dxxx_bank(0) { } a2bus_ramcard_device::a2bus_ramcard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, A2BUS_RAMCARD16K, "Apple II 16K Language Card", tag, owner, clock, "a2ram16k", __FILE__), - device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_writecnt(0), m_dxxx_bank(0) + device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_last_access(0), m_dxxx_bank(0) { } @@ -55,64 +55,52 @@ void a2bus_ramcard_device::device_start() save_item(NAME(m_inh_state)); save_item(NAME(m_ram)); save_item(NAME(m_dxxx_bank)); - save_item(NAME(m_writecnt)); + save_item(NAME(m_last_offset)); + save_item(NAME(m_last_access)); } void a2bus_ramcard_device::device_reset() { - m_inh_state = INH_NONE; + m_inh_state = INH_WRITE; m_dxxx_bank = 0; - m_writecnt = 0; + m_last_offset = -1; + m_last_access = 0; } -void a2bus_ramcard_device::do_io(int offset, bool write) +void a2bus_ramcard_device::do_io(int offset, int access) { int old_inh_state = m_inh_state; - m_dxxx_bank = 0; - - switch (offset) + m_inh_state = INH_NONE; + + switch (offset & 3) { - case 0x0: case 0x8: case 0x4: case 0xc: - m_writecnt = 0; + case 0: + { m_inh_state = INH_READ; break; - - case 0x1: case 0x9: case 0x5: case 0xd: - if (write) - { - m_writecnt = 0; - } - else - { - m_writecnt++; - } - m_inh_state &= ~INH_READ; - break; + } - case 0x2: case 0xa: case 0x6: case 0xe: - m_writecnt = 0; - m_inh_state = INH_NONE; - break; - - case 0x3: case 0xb: case 0x7: case 0xf: - if (write) + case 3: + { + m_inh_state = INH_READ; + } //fall through + + case 1: + { + //if accessed twice, then write-enable + if (((m_last_offset & 1) == 1) && (access == m_last_access)) { - m_writecnt = 0; + m_inh_state |= INH_WRITE; } - else - { - m_writecnt++; - } - m_inh_state |= INH_READ; + break; + } } - - if (m_writecnt >= 2) - { - m_inh_state |= INH_WRITE; - m_writecnt = 2; - } + + m_last_offset = offset; + m_last_access = access; + m_dxxx_bank = 0; if (!(offset & 8)) { @@ -139,7 +127,7 @@ void a2bus_ramcard_device::do_io(int offset, bool write) uint8_t a2bus_ramcard_device::read_c0nx(address_space &space, uint8_t offset) { - do_io(offset & 0xf, false); + do_io(offset & 0xf, 0); return 0xff; } @@ -150,7 +138,7 @@ uint8_t a2bus_ramcard_device::read_c0nx(address_space &space, uint8_t offset) void a2bus_ramcard_device::write_c0nx(address_space &space, uint8_t offset, uint8_t data) { - do_io(offset & 0xf, true); + do_io(offset & 0xf, 1); } uint8_t a2bus_ramcard_device::read_inh_rom(address_space &space, uint16_t offset) diff --git a/src/devices/bus/a2bus/ramcard16k.h b/src/devices/bus/a2bus/ramcard16k.h index 2484d65cfba..2180e2bf826 100644 --- a/src/devices/bus/a2bus/ramcard16k.h +++ b/src/devices/bus/a2bus/ramcard16k.h @@ -40,10 +40,11 @@ protected: virtual int inh_type() override; private: - void do_io(int offset, bool write); + void do_io(int offset, int access); int m_inh_state; - int m_writecnt; + int m_last_offset; + int m_last_access; int m_dxxx_bank; uint8_t m_ram[16*1024]; }; diff --git a/src/mame/drivers/apple2e.cpp b/src/mame/drivers/apple2e.cpp index d66013ff744..e051656cc5a 100644 --- a/src/mame/drivers/apple2e.cpp +++ b/src/mame/drivers/apple2e.cpp @@ -370,6 +370,7 @@ private: bool m_altzp; bool m_ramrd, m_ramwrt; bool m_lcram, m_lcram2, m_lcwriteenable; + int m_last_offset, m_last_access; bool m_ioudis; bool m_romswitch; bool m_mockingboard4c; @@ -396,12 +397,11 @@ private: uint8_t m_exp_regs[0x10]; uint8_t *m_exp_ram; int m_exp_wptr, m_exp_liveptr; - int m_wrtcount; void do_io(address_space &space, int offset, bool is_iic); uint8_t read_floatingbus(); void update_slotrom_banks(); - void lc_update(int offset, bool write); + void lc_update(int offset, int access); uint8_t read_slot_rom(address_space &space, int slotbias, int offset); void write_slot_rom(address_space &space, int slotbias, int offset, uint8_t data); uint8_t read_int_rom(address_space &space, int slotbias, int offset); @@ -702,8 +702,9 @@ void apple2e_state::machine_start() save_item(NAME(m_lcram)); save_item(NAME(m_lcram2)); save_item(NAME(m_lcwriteenable)); + save_item(NAME(m_last_offset)); + save_item(NAME(m_last_access)); save_item(NAME(m_mockingboard4c)); - save_item(NAME(m_wrtcount)); } void apple2e_state::machine_reset() @@ -757,9 +758,8 @@ void apple2e_state::machine_reset() m_lcram = false; m_lcram2 = true; m_lcwriteenable = true; - m_wrtcount = 2; - // set bank device to read ROM, write enabled - m_lcbank->set_bank(0); + m_last_offset = -1; + m_last_access = 0; m_exp_bankhior = 0xf0; @@ -1009,62 +1009,48 @@ void apple2e_state::update_slotrom_banks() } } -void apple2e_state::lc_update(int offset, bool write) +void apple2e_state::lc_update(int offset, int access) { - bool m_last_lcram = m_lcram; + int old_lcram = m_lcram; m_lcram = false; - m_lcram2 = false; + m_lcwriteenable = false; - switch (offset) + switch (offset & 3) { - case 0x0: case 0x8: case 0x4: case 0xc: - m_wrtcount = 0; - m_lcwriteenable = false; + case 0: + { m_lcram = true; break; - - case 0x1: case 0x9: case 0x5: case 0xd: - if (write) - { - m_wrtcount = 0; - } - else - { - m_wrtcount++; - } - break; + } - case 0x2: case 0xa: case 0x6: case 0xe: - m_wrtcount = 0; - m_lcwriteenable = false; - break; - - case 0x3: case 0xb: case 0x7: case 0xf: - if (write) + case 3: + { + m_lcram = true; + } //fall through + + case 1: + { + //if accessed twice, then write-enable + if (((m_last_offset & 1) == 1) && (access == m_last_access)) { - m_wrtcount = 0; + m_lcwriteenable = true; } - else - { - m_wrtcount++; - } - m_lcram = true; + break; + } } - - if (m_wrtcount >= 2) - { - m_lcwriteenable = true; - m_wrtcount = 2; - } + + m_last_offset = offset; + m_last_access = access; + m_lcram2 = false; if (!(offset & 8)) { m_lcram2 = true; } - if (m_lcram != m_last_lcram) + if (m_lcram != old_lcram) { if (m_lcram) { @@ -1084,10 +1070,9 @@ void apple2e_state::lc_update(int offset, bool write) } #if 0 - printf("LC: new state %c%c (%d) dxxx=%04x altzp=%d\n", + printf("LC: new state %c%c dxxx=%04x altzp=%d\n", m_lcram ? 'R' : 'x', m_lcwriteenable ? 'W' : 'x', - m_wrtcount, m_lcram2 ? 0x1000 : 0x0000, m_altzp); #endif @@ -1877,7 +1862,7 @@ READ8_MEMBER(apple2e_state::c080_r) if (slot == 0) { - lc_update(offset & 0xf, false); + lc_update(offset & 0xf, 0); } else { @@ -1900,7 +1885,7 @@ WRITE8_MEMBER(apple2e_state::c080_w) if (slot == 0) { - lc_update(offset & 0xf, true); + lc_update(offset & 0xf, 1); } else { -- cgit v1.2.3