From 66f496d22421607705776b3016efe6821983c442 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Thu, 13 Sep 2018 21:12:52 +0200 Subject: -turbogx: Added logging of FBC accesses. [Ryan Holtz] --- src/devices/bus/sbus/turbogx.cpp | 722 +++++++++++++++++++++++++++++++++++++++ src/devices/bus/sbus/turbogx.h | 388 +++++++++++++++++++++ 2 files changed, 1110 insertions(+) diff --git a/src/devices/bus/sbus/turbogx.cpp b/src/devices/bus/sbus/turbogx.cpp index 817687dd84f..79c2ad78534 100644 --- a/src/devices/bus/sbus/turbogx.cpp +++ b/src/devices/bus/sbus/turbogx.cpp @@ -17,6 +17,7 @@ void sbus_turbogx_device::mem_map(address_map &map) map(0x00000000, 0x01ffffff).rw(FUNC(sbus_turbogx_device::unknown_r), FUNC(sbus_turbogx_device::unknown_w)); map(0x00000000, 0x00007fff).r(FUNC(sbus_turbogx_device::rom_r)); map(0x00200000, 0x00200007).w(FUNC(sbus_turbogx_device::palette_w)); + map(0x00700000, 0x00700fff).rw(FUNC(sbus_turbogx_device::fbc_r), FUNC(sbus_turbogx_device::fbc_w)); map(0x00800000, 0x008fffff).rw(FUNC(sbus_turbogx_device::vram_r), FUNC(sbus_turbogx_device::vram_w)); } @@ -161,3 +162,724 @@ WRITE32_MEMBER(sbus_turbogx_device::palette_w) } } } + +READ32_MEMBER(sbus_turbogx_device::fbc_r) +{ + uint32_t ret = 0; + switch (offset) + { + case FBC_MISC: + logerror("fbc_r: MISC (%08x & %08x)\n", m_fbc.m_misc, mem_mask); + return m_fbc.m_misc; + case FBC_CLIP_CHECK: + logerror("fbc_r: CLIP_CHECK (%08x & %08x)\n", m_fbc.m_clip_check, mem_mask); + return m_fbc.m_clip_check; + + case FBC_STATUS: + logerror("fbc_r: STATUS (%08x & %08x)\n", m_fbc.m_status, mem_mask); + return m_fbc.m_status; + case FBC_DRAW_STATUS: + logerror("fbc_r: DRAW_STATUS (%08x & %08x)\n", m_fbc.m_draw_status, mem_mask); + return m_fbc.m_draw_status; + case FBC_BLIT_STATUS: + logerror("fbc_r: BLIT_STATUS (%08x & %08x)\n", m_fbc.m_blit_status, mem_mask); + return m_fbc.m_blit_status; + case FBC_FONT: + logerror("fbc_r: FONT (%08x & %08x)\n", m_fbc.m_font, mem_mask); + return m_fbc.m_font; + + case FBC_X0: + logerror("fbc_r: X0 (%08x & %08x)\n", m_fbc.m_x0, mem_mask); + return m_fbc.m_x0; + case FBC_Y0: + logerror("fbc_r: Y0 (%08x & %08x)\n", m_fbc.m_y0, mem_mask); + return m_fbc.m_y0; + case FBC_Z0: + logerror("fbc_r: Z0 (%08x & %08x)\n", m_fbc.m_z0, mem_mask); + return m_fbc.m_z0; + case FBC_COLOR0: + logerror("fbc_r: COLOR0 (%08x & %08x)\n", m_fbc.m_color0, mem_mask); + return m_fbc.m_color0; + case FBC_X1: + logerror("fbc_r: X1 (%08x & %08x)\n", m_fbc.m_x1, mem_mask); + return m_fbc.m_x1; + case FBC_Y1: + logerror("fbc_r: Y1 (%08x & %08x)\n", m_fbc.m_y1, mem_mask); + return m_fbc.m_y1; + case FBC_Z1: + logerror("fbc_r: Z1 (%08x & %08x)\n", m_fbc.m_z1, mem_mask); + return m_fbc.m_z1; + case FBC_COLOR1: + logerror("fbc_r: COLOR1 (%08x & %08x)\n", m_fbc.m_color1, mem_mask); + return m_fbc.m_color1; + case FBC_X2: + logerror("fbc_r: X2 (%08x & %08x)\n", m_fbc.m_x2, mem_mask); + return m_fbc.m_x2; + case FBC_Y2: + logerror("fbc_r: Y2 (%08x & %08x)\n", m_fbc.m_y2, mem_mask); + return m_fbc.m_y2; + case FBC_Z2: + logerror("fbc_r: Z2 (%08x & %08x)\n", m_fbc.m_z2, mem_mask); + return m_fbc.m_z2; + case FBC_COLOR2: + logerror("fbc_r: COLOR2 (%08x & %08x)\n", m_fbc.m_color2, mem_mask); + return m_fbc.m_color2; + case FBC_X3: + logerror("fbc_r: X3 (%08x & %08x)\n", m_fbc.m_x3, mem_mask); + return m_fbc.m_x3; + case FBC_Y3: + logerror("fbc_r: Y3 (%08x & %08x)\n", m_fbc.m_y3, mem_mask); + return m_fbc.m_y3; + case FBC_Z3: + logerror("fbc_r: Z3 (%08x & %08x)\n", m_fbc.m_z3, mem_mask); + return m_fbc.m_z3; + case FBC_COLOR3: + logerror("fbc_r: COLOR3 (%08x & %08x)\n", m_fbc.m_color3, mem_mask); + return m_fbc.m_color3; + + case FBC_RASTER_OFFX: + logerror("fbc_r: RASTER_OFFX (%08x & %08x)\n", m_fbc.m_raster_offx, mem_mask); + return m_fbc.m_raster_offx; + case FBC_RASTER_OFFY: + logerror("fbc_r: RASTER_OFFY (%08x & %08x)\n", m_fbc.m_raster_offy, mem_mask); + return m_fbc.m_raster_offy; + case FBC_AUTOINCX: + logerror("fbc_r: AUTOINCX (%08x & %08x)\n", m_fbc.m_autoincx, mem_mask); + return m_fbc.m_autoincx; + case FBC_AUTOINCY: + logerror("fbc_r: AUTOINCY (%08x & %08x)\n", m_fbc.m_autoincy, mem_mask); + return m_fbc.m_autoincy; + case FBC_CLIP_MINX: + logerror("fbc_r: CLIP_MINX (%08x & %08x)\n", m_fbc.m_clip_minx, mem_mask); + return m_fbc.m_clip_minx; + case FBC_CLIP_MINY: + logerror("fbc_r: CLIP_MINY (%08x & %08x)\n", m_fbc.m_clip_miny, mem_mask); + return m_fbc.m_clip_miny; + case FBC_CLIP_MAXX: + logerror("fbc_r: CLIP_MAXX (%08x & %08x)\n", m_fbc.m_clip_maxx, mem_mask); + return m_fbc.m_clip_maxx; + case FBC_CLIP_MAXY: + logerror("fbc_r: CLIP_MAXY (%08x & %08x)\n", m_fbc.m_clip_maxy, mem_mask); + return m_fbc.m_clip_maxy; + + case FBC_FCOLOR: + logerror("fbc_r: FCOLOR (%08x & %08x)\n", m_fbc.m_fcolor, mem_mask); + return m_fbc.m_fcolor; + case FBC_BCOLOR: + logerror("fbc_r: BCOLOR (%08x & %08x)\n", m_fbc.m_bcolor, mem_mask); + return m_fbc.m_bcolor; + case FBC_RASTEROP: + logerror("fbc_r: RASTEROP (%08x & %08x)\n", m_fbc.m_rasterop, mem_mask); + return m_fbc.m_rasterop; + case FBC_PLANE_MASK: + logerror("fbc_r: PLANE_MASK (%08x & %08x)\n", m_fbc.m_plane_mask, mem_mask); + return m_fbc.m_plane_mask; + case FBC_PIXEL_MASK: + logerror("fbc_r: PIXEL_MASK (%08x & %08x)\n", m_fbc.m_pixel_mask, mem_mask); + return m_fbc.m_pixel_mask; + + case FBC_PATT_ALIGN: + logerror("fbc_r: PATT_ALIGN (%08x & %08x)\n", m_fbc.m_patt_align, mem_mask); + return m_fbc.m_patt_align; + case FBC_PATTERN0: + logerror("fbc_r: PATTERN0 (%08x & %08x)\n", m_fbc.m_pattern[0], mem_mask); + return m_fbc.m_pattern[0]; + case FBC_PATTERN1: + logerror("fbc_r: PATTERN1 (%08x & %08x)\n", m_fbc.m_pattern[1], mem_mask); + return m_fbc.m_pattern[1]; + case FBC_PATTERN2: + logerror("fbc_r: PATTERN2 (%08x & %08x)\n", m_fbc.m_pattern[2], mem_mask); + return m_fbc.m_pattern[2]; + case FBC_PATTERN3: + logerror("fbc_r: PATTERN3 (%08x & %08x)\n", m_fbc.m_pattern[3], mem_mask); + return m_fbc.m_pattern[3]; + case FBC_PATTERN4: + logerror("fbc_r: PATTERN4 (%08x & %08x)\n", m_fbc.m_pattern[4], mem_mask); + return m_fbc.m_pattern[4]; + case FBC_PATTERN5: + logerror("fbc_r: PATTERN5 (%08x & %08x)\n", m_fbc.m_pattern[5], mem_mask); + return m_fbc.m_pattern[5]; + case FBC_PATTERN6: + logerror("fbc_r: PATTERN6 (%08x & %08x)\n", m_fbc.m_pattern[6], mem_mask); + return m_fbc.m_pattern[6]; + case FBC_PATTERN7: + logerror("fbc_r: PATTERN7 (%08x & %08x)\n", m_fbc.m_pattern[7], mem_mask); + return m_fbc.m_pattern[7]; + + case FBC_IPOINT_ABSX: + logerror("fbc_r: IPOINT_ABSX (%08x & %08x)\n", m_fbc.m_ipoint_absx, mem_mask); + return m_fbc.m_ipoint_absx; + case FBC_IPOINT_ABSY: + logerror("fbc_r: IPOINT_ABSY (%08x & %08x)\n", m_fbc.m_ipoint_absy, mem_mask); + return m_fbc.m_ipoint_absy; + case FBC_IPOINT_ABSZ: + logerror("fbc_r: IPOINT_ABSZ (%08x & %08x)\n", m_fbc.m_ipoint_absz, mem_mask); + return m_fbc.m_ipoint_absz; + case FBC_IPOINT_RELX: + logerror("fbc_r: IPOINT_RELX (%08x & %08x)\n", m_fbc.m_ipoint_relx, mem_mask); + return m_fbc.m_ipoint_relx; + case FBC_IPOINT_RELY: + logerror("fbc_r: IPOINT_RELY (%08x & %08x)\n", m_fbc.m_ipoint_rely, mem_mask); + return m_fbc.m_ipoint_rely; + case FBC_IPOINT_RELZ: + logerror("fbc_r: IPOINT_RELZ (%08x & %08x)\n", m_fbc.m_ipoint_relz, mem_mask); + return m_fbc.m_ipoint_relz; + case FBC_IPOINT_R: + logerror("fbc_r: IPOINT_R (%08x & %08x)\n", m_fbc.m_ipoint_r, mem_mask); + return m_fbc.m_ipoint_r; + case FBC_IPOINT_G: + logerror("fbc_r: IPOINT_G (%08x & %08x)\n", m_fbc.m_ipoint_g, mem_mask); + return m_fbc.m_ipoint_g; + case FBC_IPOINT_B: + logerror("fbc_r: IPOINT_B (%08x & %08x)\n", m_fbc.m_ipoint_b, mem_mask); + return m_fbc.m_ipoint_b; + case FBC_IPOINT_A: + logerror("fbc_r: IPOINT_A (%08x & %08x)\n", m_fbc.m_ipoint_a, mem_mask); + return m_fbc.m_ipoint_a; + + case FBC_ILINE_ABSX: + logerror("fbc_r: ILINE_ABSX (%08x & %08x)\n", m_fbc.m_iline_absx, mem_mask); + return m_fbc.m_iline_absx; + case FBC_ILINE_ABSY: + logerror("fbc_r: ILINE_ABSY (%08x & %08x)\n", m_fbc.m_iline_absy, mem_mask); + return m_fbc.m_iline_absy; + case FBC_ILINE_ABSZ: + logerror("fbc_r: ILINE_ABSZ (%08x & %08x)\n", m_fbc.m_iline_absz, mem_mask); + return m_fbc.m_iline_absz; + case FBC_ILINE_RELX: + logerror("fbc_r: ILINE_RELX (%08x & %08x)\n", m_fbc.m_iline_relx, mem_mask); + return m_fbc.m_iline_relx; + case FBC_ILINE_RELY: + logerror("fbc_r: ILINE_RELY (%08x & %08x)\n", m_fbc.m_iline_rely, mem_mask); + return m_fbc.m_iline_rely; + case FBC_ILINE_RELZ: + logerror("fbc_r: ILINE_RELZ (%08x & %08x)\n", m_fbc.m_iline_relz, mem_mask); + return m_fbc.m_iline_relz; + case FBC_ILINE_R: + logerror("fbc_r: ILINE_R (%08x & %08x)\n", m_fbc.m_iline_r, mem_mask); + return m_fbc.m_iline_r; + case FBC_ILINE_G: + logerror("fbc_r: ILINE_G (%08x & %08x)\n", m_fbc.m_iline_g, mem_mask); + return m_fbc.m_iline_g; + case FBC_ILINE_B: + logerror("fbc_r: ILINE_B (%08x & %08x)\n", m_fbc.m_iline_b, mem_mask); + return m_fbc.m_iline_b; + case FBC_ILINE_A: + logerror("fbc_r: ILINE_A (%08x & %08x)\n", m_fbc.m_iline_a, mem_mask); + return m_fbc.m_iline_a; + + case FBC_ITRI_ABSX: + logerror("fbc_r: ITRI_ABSX (%08x & %08x)\n", m_fbc.m_itri_absx, mem_mask); + return m_fbc.m_itri_absx; + case FBC_ITRI_ABSY: + logerror("fbc_r: ITRI_ABSY (%08x & %08x)\n", m_fbc.m_itri_absy, mem_mask); + return m_fbc.m_itri_absy; + case FBC_ITRI_ABSZ: + logerror("fbc_r: ITRI_ABSZ (%08x & %08x)\n", m_fbc.m_itri_absz, mem_mask); + return m_fbc.m_itri_absz; + case FBC_ITRI_RELX: + logerror("fbc_r: ITRI_RELX (%08x & %08x)\n", m_fbc.m_itri_relx, mem_mask); + return m_fbc.m_itri_relx; + case FBC_ITRI_RELY: + logerror("fbc_r: ITRI_RELY (%08x & %08x)\n", m_fbc.m_itri_rely, mem_mask); + return m_fbc.m_itri_rely; + case FBC_ITRI_RELZ: + logerror("fbc_r: ITRI_RELZ (%08x & %08x)\n", m_fbc.m_itri_relz, mem_mask); + return m_fbc.m_itri_relz; + case FBC_ITRI_R: + logerror("fbc_r: ITRI_R (%08x & %08x)\n", m_fbc.m_itri_r, mem_mask); + return m_fbc.m_itri_r; + case FBC_ITRI_G: + logerror("fbc_r: ITRI_G (%08x & %08x)\n", m_fbc.m_itri_g, mem_mask); + return m_fbc.m_itri_g; + case FBC_ITRI_B: + logerror("fbc_r: ITRI_B (%08x & %08x)\n", m_fbc.m_itri_b, mem_mask); + return m_fbc.m_itri_b; + case FBC_ITRI_A: + logerror("fbc_r: ITRI_A (%08x & %08x)\n", m_fbc.m_itri_a, mem_mask); + return m_fbc.m_itri_a; + + case FBC_IQUAD_ABSX: + logerror("fbc_r: IQUAD_ABSX (%08x & %08x)\n", m_fbc.m_iquad_absx, mem_mask); + return m_fbc.m_iquad_absx; + case FBC_IQUAD_ABSY: + logerror("fbc_r: IQUAD_ABSY (%08x & %08x)\n", m_fbc.m_iquad_absy, mem_mask); + return m_fbc.m_iquad_absy; + case FBC_IQUAD_ABSZ: + logerror("fbc_r: IQUAD_ABSZ (%08x & %08x)\n", m_fbc.m_iquad_absz, mem_mask); + return m_fbc.m_iquad_absz; + case FBC_IQUAD_RELX: + logerror("fbc_r: IQUAD_RELX (%08x & %08x)\n", m_fbc.m_iquad_relx, mem_mask); + return m_fbc.m_iquad_relx; + case FBC_IQUAD_RELY: + logerror("fbc_r: IQUAD_RELY (%08x & %08x)\n", m_fbc.m_iquad_rely, mem_mask); + return m_fbc.m_iquad_rely; + case FBC_IQUAD_RELZ: + logerror("fbc_r: IQUAD_RELZ (%08x & %08x)\n", m_fbc.m_iquad_relz, mem_mask); + return m_fbc.m_iquad_relz; + case FBC_IQUAD_R: + logerror("fbc_r: IQUAD_R (%08x & %08x)\n", m_fbc.m_iquad_r, mem_mask); + return m_fbc.m_iquad_r; + case FBC_IQUAD_G: + logerror("fbc_r: IQUAD_G (%08x & %08x)\n", m_fbc.m_iquad_g, mem_mask); + return m_fbc.m_iquad_g; + case FBC_IQUAD_B: + logerror("fbc_r: IQUAD_B (%08x & %08x)\n", m_fbc.m_iquad_b, mem_mask); + return m_fbc.m_iquad_b; + case FBC_IQUAD_A: + logerror("fbc_r: IQUAD_A (%08x & %08x)\n", m_fbc.m_iquad_a, mem_mask); + return m_fbc.m_iquad_a; + + case FBC_IRECT_ABSX: + logerror("fbc_r: IRECT_ABSX (%08x & %08x)\n", m_fbc.m_irect_absx, mem_mask); + return m_fbc.m_irect_absx; + case FBC_IRECT_ABSY: + logerror("fbc_r: IRECT_ABSY (%08x & %08x)\n", m_fbc.m_irect_absy, mem_mask); + return m_fbc.m_irect_absy; + case FBC_IRECT_ABSZ: + logerror("fbc_r: IRECT_ABSZ (%08x & %08x)\n", m_fbc.m_irect_absz, mem_mask); + return m_fbc.m_irect_absz; + case FBC_IRECT_RELX: + logerror("fbc_r: IRECT_RELX (%08x & %08x)\n", m_fbc.m_irect_relx, mem_mask); + return m_fbc.m_irect_relx; + case FBC_IRECT_RELY: + logerror("fbc_r: IRECT_RELY (%08x & %08x)\n", m_fbc.m_irect_rely, mem_mask); + return m_fbc.m_irect_rely; + case FBC_IRECT_RELZ: + logerror("fbc_r: IRECT_RELZ (%08x & %08x)\n", m_fbc.m_irect_relz, mem_mask); + return m_fbc.m_irect_relz; + case FBC_IRECT_R: + logerror("fbc_r: IRECT_R (%08x & %08x)\n", m_fbc.m_irect_r, mem_mask); + return m_fbc.m_irect_r; + case FBC_IRECT_G: + logerror("fbc_r: IRECT_G (%08x & %08x)\n", m_fbc.m_irect_g, mem_mask); + return m_fbc.m_irect_g; + case FBC_IRECT_B: + logerror("fbc_r: IRECT_B (%08x & %08x)\n", m_fbc.m_irect_b, mem_mask); + return m_fbc.m_irect_b; + case FBC_IRECT_A: + logerror("fbc_r: IRECT_A (%08x & %08x)\n", m_fbc.m_irect_a, mem_mask); + return m_fbc.m_irect_a; + + default: + logerror("fbc_r: Unknown register %08x & %08x\n", 0x00700000 | (offset << 2), mem_mask); + break; + } + return ret; +} + +WRITE32_MEMBER(sbus_turbogx_device::fbc_w) +{ + switch (offset) + { + case FBC_MISC: + logerror("fbc_w: MISC = %08x & %08x\n", data, mem_mask); + logerror(" MISC_INDEX = %d\n", fbc_misc_index()); + logerror(" MISC_INDEX_MOD = %d\n", fbc_misc_index_mod()); + logerror(" MISC_BDISP = %d\n", fbc_misc_bdisp()); + logerror(" MISC_BREAD = %d\n", fbc_misc_bread()); + logerror(" MISC_BWRITE1 = %d\n", fbc_misc_bwrite1()); + logerror(" MISC_BWRITE0 = %d\n", fbc_misc_bwrite0()); + logerror(" MISC_DRAW = %d\n", fbc_misc_draw()); + logerror(" MISC_DATA = %d\n", fbc_misc_data()); + logerror(" MISC_BLIT = %d\n", fbc_misc_blit()); + COMBINE_DATA(&m_fbc.m_misc); + break; + case FBC_CLIP_CHECK: + logerror("fbc_w: CLIP_CHECK = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_check); + break; + + case FBC_STATUS: + logerror("fbc_w: STATUS = %08x & %08x\n", data, mem_mask); + //COMBINE_DATA(&m_fbc.m_status); + break; + case FBC_DRAW_STATUS: + logerror("fbc_w: DRAW_STATUS = %08x & %08x\n", data, mem_mask); + //COMBINE_DATA(&m_fbc.m_draw_status); + break; + case FBC_BLIT_STATUS: + logerror("fbc_w: BLIT_STATUS = %08x & %08x\n", data, mem_mask); + //COMBINE_DATA(&m_fbc.m_blit_status); + break; + case FBC_FONT: + logerror("fbc_w: FONT = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_font); + break; + + case FBC_X0: + logerror("fbc_w: X0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x0); + break; + case FBC_Y0: + logerror("fbc_w: Y0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y0); + break; + case FBC_Z0: + logerror("fbc_w: Z0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z0); + break; + case FBC_COLOR0: + logerror("fbc_w: COLOR0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color0); + break; + case FBC_X1: + logerror("fbc_w: X1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x1); + break; + case FBC_Y1: + logerror("fbc_w: Y1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y1); + break; + case FBC_Z1: + logerror("fbc_w: Z1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z1); + break; + case FBC_COLOR1: + logerror("fbc_w: COLOR1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color1); + break; + case FBC_X2: + logerror("fbc_w: X2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x2); + break; + case FBC_Y2: + logerror("fbc_w: Y2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y2); + break; + case FBC_Z2: + logerror("fbc_w: Z2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z2); + break; + case FBC_COLOR2: + logerror("fbc_w: COLOR2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color2); + break; + case FBC_X3: + logerror("fbc_w: X3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x3); + break; + case FBC_Y3: + logerror("fbc_w: Y3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y3); + break; + case FBC_Z3: + logerror("fbc_w: Z3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z3); + break; + case FBC_COLOR3: + logerror("fbc_w: COLOR3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color3); + break; + + case FBC_RASTER_OFFX: + logerror("fbc_w: RASTER_OFFX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_raster_offx); + break; + case FBC_RASTER_OFFY: + logerror("fbc_w: RASTER_OFFY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_raster_offy); + break; + case FBC_AUTOINCX: + logerror("fbc_w: AUTOINCX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_autoincx); + break; + case FBC_AUTOINCY: + logerror("fbc_w: AUTOINCY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_autoincy); + break; + case FBC_CLIP_MINX: + logerror("fbc_w: CLIP_MINX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_minx); + break; + case FBC_CLIP_MINY: + logerror("fbc_w: CLIP_MINY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_miny); + break; + case FBC_CLIP_MAXX: + logerror("fbc_w: CLIP_MAXX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_maxx); + break; + case FBC_CLIP_MAXY: + logerror("fbc_w: CLIP_MAXY (%08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_maxy); + break; + + case FBC_FCOLOR: + logerror("fbc_w: FCOLOR = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_fcolor); + break; + case FBC_BCOLOR: + logerror("fbc_w: BCOLOR = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_bcolor); + break; + case FBC_RASTEROP: + logerror("fbc_w: RASTEROP = %08x & %08x\n", data, mem_mask); + logerror(" RASTEROP_ROP00 = %d\n", fbc_rasterop_rop00()); + logerror(" RASTEROP_ROP01 = %d\n", fbc_rasterop_rop01()); + logerror(" RASTEROP_ROP10 = %d\n", fbc_rasterop_rop10()); + logerror(" RASTEROP_ROP11 = %d\n", fbc_rasterop_rop11()); + logerror(" RASTEROP_PLOT = %d\n", fbc_rasterop_plot()); + logerror(" RASTEROP_RAST = %d\n", fbc_rasterop_rast()); + logerror(" RASTEROP_POLYG = %d\n", fbc_rasterop_polyg()); + logerror(" RASTEROP_PATT = %d\n", fbc_rasterop_patt()); + logerror(" RASTEROP_PIXEL = %d\n", fbc_rasterop_pixel()); + logerror(" RASTEROP_PLANE = %d\n", fbc_rasterop_plane()); + COMBINE_DATA(&m_fbc.m_rasterop); + break; + case FBC_PLANE_MASK: + logerror("fbc_w: PLANE_MASK = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_plane_mask); + break; + case FBC_PIXEL_MASK: + logerror("fbc_w: PIXEL_MASK = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pixel_mask); + break; + + case FBC_PATT_ALIGN: + logerror("fbc_w: PATT_ALIGN = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_patt_align); + break; + case FBC_PATTERN0: + logerror("fbc_w: PATTERN0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[0]); + break; + case FBC_PATTERN1: + logerror("fbc_w: PATTERN1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[1]); + break; + case FBC_PATTERN2: + logerror("fbc_w: PATTERN2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[2]); + break; + case FBC_PATTERN3: + logerror("fbc_w: PATTERN3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[3]); + break; + case FBC_PATTERN4: + logerror("fbc_w: PATTERN4 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[4]); + break; + case FBC_PATTERN5: + logerror("fbc_w: PATTERN5 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[5]); + break; + case FBC_PATTERN6: + logerror("fbc_w: PATTERN6 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[6]); + break; + case FBC_PATTERN7: + logerror("fbc_w: PATTERN7 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[7]); + break; + + case FBC_IPOINT_ABSX: + logerror("fbc_w: IPOINT_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_absx); + break; + case FBC_IPOINT_ABSY: + logerror("fbc_w: IPOINT_ABSY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_absy); + break; + case FBC_IPOINT_ABSZ: + logerror("fbc_w: IPOINT_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_absz); + break; + case FBC_IPOINT_RELX: + logerror("fbc_w: IPOINT_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_relx); + break; + case FBC_IPOINT_RELY: + logerror("fbc_w: IPOINT_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_rely); + break; + case FBC_IPOINT_RELZ: + logerror("fbc_w: IPOINT_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_relz); + break; + case FBC_IPOINT_R: + logerror("fbc_w: IPOINT_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_r); + break; + case FBC_IPOINT_G: + logerror("fbc_w: IPOINT_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_g); + break; + case FBC_IPOINT_B: + logerror("fbc_w: IPOINT_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_b); + break; + case FBC_IPOINT_A: + logerror("fbc_w: IPOINT_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_a); + break; + + case FBC_ILINE_ABSX: + logerror("fbc_w: ILINE_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_absx); + break; + case FBC_ILINE_ABSY: + logerror("fbc_w: ILINE_ABSY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_absy); + break; + case FBC_ILINE_ABSZ: + logerror("fbc_w: ILINE_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_absz); + break; + case FBC_ILINE_RELX: + logerror("fbc_w: ILINE_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_relx); + break; + case FBC_ILINE_RELY: + logerror("fbc_w: ILINE_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_rely); + break; + case FBC_ILINE_RELZ: + logerror("fbc_w: ILINE_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_relz); + break; + case FBC_ILINE_R: + logerror("fbc_w: ILINE_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_r); + break; + case FBC_ILINE_G: + logerror("fbc_w: ILINE_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_g); + break; + case FBC_ILINE_B: + logerror("fbc_w: ILINE_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_b); + break; + case FBC_ILINE_A: + logerror("fbc_w: ILINE_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_a); + break; + + case FBC_ITRI_ABSX: + logerror("fbc_w: ITRI_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_absx); + break; + case FBC_ITRI_ABSY: + COMBINE_DATA(&m_fbc.m_itri_absy); + logerror("fbc_w: ITRI_ABSY = %08x & %08x\n", data, mem_mask); + break; + case FBC_ITRI_ABSZ: + logerror("fbc_w: ITRI_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_absz); + break; + case FBC_ITRI_RELX: + logerror("fbc_w: ITRI_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_relx); + break; + case FBC_ITRI_RELY: + logerror("fbc_w: ITRI_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_rely); + break; + case FBC_ITRI_RELZ: + logerror("fbc_w: ITRI_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_relz); + break; + case FBC_ITRI_R: + logerror("fbc_w: ITRI_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_r); + break; + case FBC_ITRI_G: + logerror("fbc_w: ITRI_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_g); + break; + case FBC_ITRI_B: + logerror("fbc_w: ITRI_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_b); + break; + case FBC_ITRI_A: + logerror("fbc_w: ITRI_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_a); + break; + + case FBC_IQUAD_ABSX: + logerror("fbc_w: IQUAD_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_absx); + break; + case FBC_IQUAD_ABSY: + logerror("fbc_w: IQUAD_ABSY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_absy); + break; + case FBC_IQUAD_ABSZ: + logerror("fbc_w: IQUAD_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_absz); + break; + case FBC_IQUAD_RELX: + logerror("fbc_w: IQUAD_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_relx); + break; + case FBC_IQUAD_RELY: + logerror("fbc_w: IQUAD_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_rely); + break; + case FBC_IQUAD_RELZ: + logerror("fbc_w: IQUAD_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_relz); + break; + case FBC_IQUAD_R: + logerror("fbc_w: IQUAD_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_r); + break; + case FBC_IQUAD_G: + logerror("fbc_w: IQUAD_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_g); + break; + case FBC_IQUAD_B: + logerror("fbc_w: IQUAD_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_b); + break; + case FBC_IQUAD_A: + logerror("fbc_w: IQUAD_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_a); + break; + + case FBC_IRECT_ABSX: + logerror("fbc_w: IRECT_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_absx); + break; + case FBC_IRECT_ABSY: + logerror("fbc_w: IRECT_ABSY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_absy); + break; + case FBC_IRECT_ABSZ: + logerror("fbc_w: IRECT_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_absz); + break; + case FBC_IRECT_RELX: + logerror("fbc_w: IRECT_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_relx); + break; + case FBC_IRECT_RELY: + logerror("fbc_w: IRECT_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_rely); + break; + case FBC_IRECT_RELZ: + logerror("fbc_w: IRECT_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_relz); + break; + case FBC_IRECT_R: + logerror("fbc_w: IRECT_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_r); + break; + case FBC_IRECT_G: + logerror("fbc_w: IRECT_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_g); + break; + case FBC_IRECT_B: + logerror("fbc_w: IRECT_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_b); + break; + case FBC_IRECT_A: + logerror("fbc_w: IRECT_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_irect_a); + break; + + default: + logerror("fbc_w: Unknown register %08x = %08x & %08x\n", 0x00700000 | (offset << 2), data, mem_mask); + break; + } +} diff --git a/src/devices/bus/sbus/turbogx.h b/src/devices/bus/sbus/turbogx.h index bce7af52ae0..4babdbecd68 100644 --- a/src/devices/bus/sbus/turbogx.h +++ b/src/devices/bus/sbus/turbogx.h @@ -38,12 +38,399 @@ protected: DECLARE_READ32_MEMBER(vram_r); DECLARE_WRITE32_MEMBER(vram_w); DECLARE_WRITE32_MEMBER(palette_w); + DECLARE_READ32_MEMBER(fbc_r); + DECLARE_WRITE32_MEMBER(fbc_w); private: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); void mem_map(address_map &map) override; + enum + { + ROP_CLR = 0x00, + ROP_SRC_NOR_DST = 0x01, + ROP_NSRC_AND_DST = 0x02, + ROP_NOT_SRC = 0x03, + ROP_SRC_AND_NDST = 0x04, + ROP_NOT_DST = 0x05, + ROP_SRC_XOR_DST = 0x06, + ROP_SRC_NAND_DST = 0x07, + ROP_SRC_AND_DST = 0x08, + ROP_SRC_XNOR_DST = 0x09, + ROP_DST = 0x0a, + ROP_NSRC_OR_DST = 0x0b, + ROP_SRC = 0x0c, + ROP_SRC_OR_NDST = 0x0d, + ROP_SRC_OR_DST = 0x0e, + ROP_SET = 0x0f + }; + + enum + { + FBC_MISC_INDEX_SHIFT = 4, + FBC_MISC_INDEX_MOD_SHIFT = 6, + FBC_MISC_BDISP_SHIFT = 7, + FBC_MISC_BREAD_SHIFT = 9, + FBC_MISC_BWRITE1_SHIFT = 11, + FBC_MISC_BWRITE0_SHIFT = 13, + FBC_MISC_DRAW_SHIFT = 15, + FBC_MISC_DATA_SHIFT = 17, + FBC_MISC_VBLANK_SHIFT = 19, + FBC_MISC_BLIT_SHIFT = 20 + }; + + enum + { + FBC_MISC_INDEX_MASK = 0x3, + FBC_MISC_INDEX_MOD_MASK = 0x1, + FBC_MISC_BDISP_MASK = 0x3, + FBC_MISC_BREAD_MASK = 0x3, + FBC_MISC_BWRITE1_MASK = 0x3, + FBC_MISC_BWRITE0_MASK = 0x3, + FBC_MISC_DRAW_MASK = 0x3, + FBC_MISC_DATA_MASK = 0x3, + FBC_MISC_VBLANK_MASK = 0x1, + FBC_MISC_BLIT_MASK = 0x3 + }; + + enum + { + FBC_MISC_BDISP_IGNORE = 0, + FBC_MISC_BDISP_0 = 1, + FBC_MISC_BDISP_1 = 2, + FBC_MISC_BDISP_ILLEGAL = 3, + + FBC_MISC_BREAD_IGNORE = 0, + FBC_MISC_BREAD_0 = 1, + FBC_MISC_BREAD_1 = 2, + FBC_MISC_BREAD_ILLEGAL = 3, + + FBC_MISC_BWRITE1_IGNORE = 0, + FBC_MISC_BWRITE1_ENABLE = 1, + FBC_MISC_BWRITE1_DISABLE = 2, + FBC_MISC_BWRITE1_ILLEGAL = 3, + + FBC_MISC_BWRITE0_IGNORE = 0, + FBC_MISC_BWRITE0_ENABLE = 1, + FBC_MISC_BWRITE0_DISABLE = 2, + FBC_MISC_BWRITE0_ILLEGAL = 3, + + FBC_MISC_DRAW_IGNORE = 0, + FBC_MISC_DRAW_RENDER = 1, + FBC_MISC_DRAW_PICK = 2, + FBC_MISC_DRAW_ILLEGAL = 3, + + FBC_MISC_DATA_IGNORE = 0, + FBC_MISC_DATA_COLOR8 = 1, + FBC_MISC_DATA_COLOR1 = 2, + FBC_MISC_DATA_HRMONO = 3, + + FBC_MISC_BLIT_IGNORE = 0, + FBC_MISC_BLIT_NOSRC = 1, + FBC_MISC_BLIT_SRC = 2, + FBC_MISC_BLIT_ILLEGAL = 3 + }; + + inline uint32_t fbc_misc_index() { return (m_fbc.m_misc >> FBC_MISC_INDEX_SHIFT) & FBC_MISC_INDEX_MASK; } + inline uint32_t fbc_misc_index_mod() { return (m_fbc.m_misc >> FBC_MISC_INDEX_MOD_SHIFT) & FBC_MISC_INDEX_MOD_MASK; } + inline uint32_t fbc_misc_bdisp() { return (m_fbc.m_misc >> FBC_MISC_BDISP_SHIFT) & FBC_MISC_BDISP_MASK; } + inline uint32_t fbc_misc_bread() { return (m_fbc.m_misc >> FBC_MISC_BREAD_SHIFT) & FBC_MISC_BREAD_MASK; } + inline uint32_t fbc_misc_bwrite1() { return (m_fbc.m_misc >> FBC_MISC_BWRITE1_SHIFT) & FBC_MISC_BWRITE1_MASK; } + inline uint32_t fbc_misc_bwrite0() { return (m_fbc.m_misc >> FBC_MISC_BWRITE0_SHIFT) & FBC_MISC_BWRITE0_MASK; } + inline uint32_t fbc_misc_draw() { return (m_fbc.m_misc >> FBC_MISC_DRAW_SHIFT) & FBC_MISC_DRAW_MASK; } + inline uint32_t fbc_misc_data() { return (m_fbc.m_misc >> FBC_MISC_DATA_SHIFT) & FBC_MISC_DATA_MASK; } + inline uint32_t fbc_misc_blit() { return (m_fbc.m_misc >> FBC_MISC_BLIT_SHIFT) & FBC_MISC_BLIT_MASK; } + + enum + { + FBC_RASTEROP_ROP00_SHIFT = 0, + FBC_RASTEROP_ROP01_SHIFT = 4, + FBC_RASTEROP_ROP10_SHIFT = 8, + FBC_RASTEROP_ROP11_SHIFT = 12, + FBC_RASTEROP_PLOT_SHIFT = 16, + FBC_RASTEROP_RAST_SHIFT = 17, + FBC_RASTEROP_ATTR_SHIFT = 22, + FBC_RASTEROP_POLYG_SHIFT = 24, + FBC_RASTEROP_PATT_SHIFT = 26, + FBC_RASTEROP_PIXEL_SHIFT = 28, + FBC_RASTEROP_PLANE_SHIFT = 30 + }; + + enum + { + FBC_RASTEROP_ROP00_MASK = 0xf, + FBC_RASTEROP_ROP01_MASK = 0xf, + FBC_RASTEROP_ROP10_MASK = 0xf, + FBC_RASTEROP_ROP11_MASK = 0xf, + FBC_RASTEROP_PLOT_MASK = 0x1, + FBC_RASTEROP_RAST_MASK = 0x1, + FBC_RASTEROP_ATTR_MASK = 0x3, + FBC_RASTEROP_POLYG_MASK = 0x3, + FBC_RASTEROP_PATT_MASK = 0x3, + FBC_RASTEROP_PIXEL_MASK = 0x3, + FBC_RASTEROP_PLANE_MASK = 0x3 + }; + + enum + { + FBC_RASTEROP_PLOT_PLOT = 0, + FBC_RASTEROP_PLOT_UNPLOT = 1, + + FBC_RASTEROP_RAST_BOOL = 0, + FBC_RASTEROP_RAST_LINEAR = 1, + + FBC_RASTEROP_ATTR_IGNORE = 0, + FBC_RASTEROP_ATTR_UNSUPP = 1, + FBC_RASTEROP_ATTR_SUPP = 2, + FBC_RASTEROP_ATTR_ILLEGAL = 3, + + FBC_RASTEROP_POLYG_IGNORE = 0, + FBC_RASTEROP_POLYG_OVERLAP = 1, + FBC_RASTEROP_POLYG_NONOVERLAP = 2, + FBC_RASTEROP_POLYG_ILLEGAL = 3, + + FBC_RASTEROP_PATTERN_IGNORE = 0, + FBC_RASTEROP_PATTERN_ZEROES = 1, + FBC_RASTEROP_PATTERN_ONES = 2, + FBC_RASTEROP_PATTERN_MSK = 3, + + FBC_RASTEROP_PIXEL_IGNORE = 0, + FBC_RASTEROP_PIXEL_ZEROES = 1, + FBC_RASTEROP_PIXEL_ONES = 2, + FBC_RASTEROP_PIXEL_MSK = 3, + + FBC_RASTEROP_PLANE_IGNORE = 0, + FBC_RASTEROP_PLANE_ZEROES = 1, + FBC_RASTEROP_PLANE_ONES = 2, + FBC_RASTEROP_PLANE_MSK = 3 + }; + + inline uint32_t fbc_rasterop_rop00() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP00_SHIFT) & FBC_RASTEROP_ROP00_MASK; } + inline uint32_t fbc_rasterop_rop01() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP01_SHIFT) & FBC_RASTEROP_ROP01_MASK; } + inline uint32_t fbc_rasterop_rop10() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP10_SHIFT) & FBC_RASTEROP_ROP10_MASK; } + inline uint32_t fbc_rasterop_rop11() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP11_SHIFT) & FBC_RASTEROP_ROP11_MASK; } + inline uint32_t fbc_rasterop_plot() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLOT_SHIFT) & FBC_RASTEROP_PLOT_MASK; } + inline uint32_t fbc_rasterop_rast() { return (m_fbc.m_rasterop >> FBC_RASTEROP_RAST_SHIFT) & FBC_RASTEROP_RAST_MASK; } + inline uint32_t fbc_rasterop_attr() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ATTR_SHIFT) & FBC_RASTEROP_ATTR_MASK; } + inline uint32_t fbc_rasterop_polyg() { return (m_fbc.m_rasterop >> FBC_RASTEROP_POLYG_SHIFT) & FBC_RASTEROP_POLYG_MASK; } + inline uint32_t fbc_rasterop_patt() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PATT_SHIFT) & FBC_RASTEROP_PATT_MASK; } + inline uint32_t fbc_rasterop_pixel() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PIXEL_SHIFT) & FBC_RASTEROP_PIXEL_MASK; } + inline uint32_t fbc_rasterop_plane() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLANE_SHIFT) & FBC_RASTEROP_PLANE_MASK; } + + enum + { + FBC_MISC = 0x004/4, + FBC_CLIP_CHECK = 0x008/4, + + FBC_STATUS = 0x010/4, + FBC_DRAW_STATUS = 0x014/4, + FBC_BLIT_STATUS = 0x018/4, + FBC_FONT = 0x01c/4, + + FBC_X0 = 0x080/4, + FBC_Y0 = 0x084/4, + FBC_Z0 = 0x088/4, + FBC_COLOR0 = 0x08c/4, + FBC_X1 = 0x090/4, + FBC_Y1 = 0x094/4, + FBC_Z1 = 0x098/4, + FBC_COLOR1 = 0x09c/4, + FBC_X2 = 0x0a0/4, + FBC_Y2 = 0x0a4/4, + FBC_Z2 = 0x0a8/4, + FBC_COLOR2 = 0x0ac/4, + FBC_X3 = 0x0b0/4, + FBC_Y3 = 0x0b4/4, + FBC_Z3 = 0x0b8/4, + FBC_COLOR3 = 0x0bc/4, + + FBC_RASTER_OFFX = 0x0c0/4, + FBC_RASTER_OFFY = 0x0c4/4, + FBC_AUTOINCX = 0x0d0/4, + FBC_AUTOINCY = 0x0d4/4, + FBC_CLIP_MINX = 0x0e0/4, + FBC_CLIP_MINY = 0x0e4/4, + FBC_CLIP_MAXX = 0x0f0/4, + FBC_CLIP_MAXY = 0x0f4/4, + + FBC_FCOLOR = 0x100/4, + FBC_BCOLOR = 0x104/4, + FBC_RASTEROP = 0x108/4, + FBC_PLANE_MASK = 0x10c/4, + FBC_PIXEL_MASK = 0x110/4, + + FBC_PATT_ALIGN = 0x11c/4, + FBC_PATTERN0 = 0x120/4, + FBC_PATTERN1 = 0x124/4, + FBC_PATTERN2 = 0x128/4, + FBC_PATTERN3 = 0x12c/4, + FBC_PATTERN4 = 0x130/4, + FBC_PATTERN5 = 0x134/4, + FBC_PATTERN6 = 0x138/4, + FBC_PATTERN7 = 0x13c/4, + + FBC_IPOINT_ABSX = 0x800/4, + FBC_IPOINT_ABSY = 0x804/4, + FBC_IPOINT_ABSZ = 0x808/4, + FBC_IPOINT_RELX = 0x810/4, + FBC_IPOINT_RELY = 0x814/4, + FBC_IPOINT_RELZ = 0x818/4, + FBC_IPOINT_R = 0x830/4, + FBC_IPOINT_G = 0x834/4, + FBC_IPOINT_B = 0x838/4, + FBC_IPOINT_A = 0x83c/4, + + FBC_ILINE_ABSX = 0x840/4, + FBC_ILINE_ABSY = 0x844/4, + FBC_ILINE_ABSZ = 0x848/4, + FBC_ILINE_RELX = 0x850/4, + FBC_ILINE_RELY = 0x854/4, + FBC_ILINE_RELZ = 0x858/4, + FBC_ILINE_R = 0x870/4, + FBC_ILINE_G = 0x874/4, + FBC_ILINE_B = 0x878/4, + FBC_ILINE_A = 0x87c/4, + + FBC_ITRI_ABSX = 0x880/4, + FBC_ITRI_ABSY = 0x884/4, + FBC_ITRI_ABSZ = 0x888/4, + FBC_ITRI_RELX = 0x890/4, + FBC_ITRI_RELY = 0x894/4, + FBC_ITRI_RELZ = 0x898/4, + FBC_ITRI_R = 0x8b0/4, + FBC_ITRI_G = 0x8b4/4, + FBC_ITRI_B = 0x8b8/4, + FBC_ITRI_A = 0x8bc/4, + + FBC_IQUAD_ABSX = 0x8c0/4, + FBC_IQUAD_ABSY = 0x8c4/4, + FBC_IQUAD_ABSZ = 0x8c8/4, + FBC_IQUAD_RELX = 0x8d0/4, + FBC_IQUAD_RELY = 0x8d4/4, + FBC_IQUAD_RELZ = 0x8d8/4, + FBC_IQUAD_R = 0x8f0/4, + FBC_IQUAD_G = 0x8f4/4, + FBC_IQUAD_B = 0x8f8/4, + FBC_IQUAD_A = 0x8fc/4, + + FBC_IRECT_ABSX = 0x900/4, + FBC_IRECT_ABSY = 0x904/4, + FBC_IRECT_ABSZ = 0x908/4, + FBC_IRECT_RELX = 0x910/4, + FBC_IRECT_RELY = 0x914/4, + FBC_IRECT_RELZ = 0x918/4, + FBC_IRECT_R = 0x930/4, + FBC_IRECT_G = 0x934/4, + FBC_IRECT_B = 0x938/4, + FBC_IRECT_A = 0x93c/4, + }; + + struct fbc_t + { + uint32_t m_misc; + uint32_t m_clip_check; + uint32_t m_status; + uint32_t m_draw_status; + uint32_t m_blit_status; + uint32_t m_font; + + uint32_t m_x0; + uint32_t m_y0; + uint32_t m_z0; + uint32_t m_color0; + uint32_t m_x1; + uint32_t m_y1; + uint32_t m_z1; + uint32_t m_color1; + uint32_t m_x2; + uint32_t m_y2; + uint32_t m_z2; + uint32_t m_color2; + uint32_t m_x3; + uint32_t m_y3; + uint32_t m_z3; + uint32_t m_color3; + + uint32_t m_raster_offx; + uint32_t m_raster_offy; + + uint32_t m_autoincx; + uint32_t m_autoincy; + + uint32_t m_clip_minx; + uint32_t m_clip_miny; + + uint32_t m_clip_maxx; + uint32_t m_clip_maxy; + + uint8_t m_fcolor; + uint8_t m_bcolor; + + uint32_t m_rasterop; + + uint32_t m_plane_mask; + uint32_t m_pixel_mask; + + uint32_t m_patt_align; + uint32_t m_pattern[8]; + + uint32_t m_ipoint_absx; + uint32_t m_ipoint_absy; + uint32_t m_ipoint_absz; + uint32_t m_ipoint_relx; + uint32_t m_ipoint_rely; + uint32_t m_ipoint_relz; + uint32_t m_ipoint_r; + uint32_t m_ipoint_g; + uint32_t m_ipoint_b; + uint32_t m_ipoint_a; + + uint32_t m_iline_absx; + uint32_t m_iline_absy; + uint32_t m_iline_absz; + uint32_t m_iline_relx; + uint32_t m_iline_rely; + uint32_t m_iline_relz; + uint32_t m_iline_r; + uint32_t m_iline_g; + uint32_t m_iline_b; + uint32_t m_iline_a; + + uint32_t m_itri_absx; + uint32_t m_itri_absy; + uint32_t m_itri_absz; + uint32_t m_itri_relx; + uint32_t m_itri_rely; + uint32_t m_itri_relz; + uint32_t m_itri_r; + uint32_t m_itri_g; + uint32_t m_itri_b; + uint32_t m_itri_a; + + uint32_t m_iquad_absx; + uint32_t m_iquad_absy; + uint32_t m_iquad_absz; + uint32_t m_iquad_relx; + uint32_t m_iquad_rely; + uint32_t m_iquad_relz; + uint32_t m_iquad_r; + uint32_t m_iquad_g; + uint32_t m_iquad_b; + uint32_t m_iquad_a; + + uint32_t m_irect_absx; + uint32_t m_irect_absy; + uint32_t m_irect_absz; + uint32_t m_irect_relx; + uint32_t m_irect_rely; + uint32_t m_irect_relz; + uint32_t m_irect_r; + uint32_t m_irect_g; + uint32_t m_irect_b; + uint32_t m_irect_a; + }; + required_memory_region m_rom; std::unique_ptr m_vram; required_device m_screen; @@ -54,6 +441,7 @@ private: uint8_t m_palette_g; uint8_t m_palette_b; uint8_t m_palette_step; + fbc_t m_fbc; }; // device type definition -- cgit v1.2.3