From 591012d8919ca53a0d3774c404e9b7ddb6094277 Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 13 Dec 2018 15:42:37 -0500 Subject: alphatro: Correct various timings; differentiate PAL and NTSC versions --- src/mame/drivers/alphatro.cpp | 99 ++++++++++++++++++++++++++++--------------- src/mame/mame.lst | 1 + 2 files changed, 66 insertions(+), 34 deletions(-) diff --git a/src/mame/drivers/alphatro.cpp b/src/mame/drivers/alphatro.cpp index 4c3bd332b27..375f5cb24cd 100644 --- a/src/mame/drivers/alphatro.cpp +++ b/src/mame/drivers/alphatro.cpp @@ -47,14 +47,13 @@ #include "softlist.h" #include "speaker.h" -#define MAIN_CLOCK XTAL(4'000'000) - class alphatro_state : public driver_device { public: - alphatro_state(const machine_config &mconfig, device_type type, const char *tag) + alphatro_state(const machine_config &mconfig, device_type type, const char *tag, bool is_ntsc) : driver_device(mconfig, type, tag) + , m_is_ntsc(is_ntsc) , m_ram(*this, RAM_TAG) , m_p_videoram(*this, "videoram") , m_screen(*this, "screen") @@ -93,13 +92,13 @@ private: DECLARE_WRITE8_MEMBER(rama000_w); DECLARE_READ8_MEMBER (rame000_r); DECLARE_WRITE8_MEMBER(rame000_w); - DECLARE_READ8_MEMBER(port10_r); - DECLARE_WRITE8_MEMBER(port10_w); - DECLARE_WRITE8_MEMBER(port20_w); - DECLARE_READ8_MEMBER(port30_r); - DECLARE_WRITE8_MEMBER(port30_w); - DECLARE_READ8_MEMBER(portf0_r); - DECLARE_WRITE8_MEMBER(portf0_w); + uint8_t port10_r(); + void port10_w(uint8_t data); + void port20_w(uint8_t data); + uint8_t port30_r(); + void port30_w(uint8_t data); + uint8_t portf0_r(); + void portf0_w(uint8_t data); DECLARE_WRITE_LINE_MEMBER(txdata_callback); DECLARE_WRITE_LINE_MEMBER(hrq_w); DECLARE_WRITE_LINE_MEMBER(fdc_irq_w); @@ -118,6 +117,7 @@ private: void monbank_map(address_map &map); void rombank_map(address_map &map); + const bool m_is_ntsc; uint8_t *m_ram_ptr; required_device m_ram; required_shared_ptr m_p_videoram; @@ -146,6 +146,22 @@ private: required_device m_cart; }; +class alphatro_pal_state : public alphatro_state +{ +public: + alphatro_pal_state(const machine_config &mconfig, device_type type, const char *tag) + : alphatro_state(mconfig, type, tag, false) + { } +}; + +class alphatro_ntsc_state : public alphatro_state +{ +public: + alphatro_ntsc_state(const machine_config &mconfig, device_type type, const char *tag) + : alphatro_state(mconfig, type, tag, true) + { } +}; + void alphatro_state::update_banking() { if (m_port_10 & 0x80) // RAM at 0000? @@ -213,7 +229,7 @@ WRITE8_MEMBER(alphatro_state::rama000_w) { m_ram_ptr[offset+0xa000] = data; } READ8_MEMBER (alphatro_state::rame000_r) { return m_ram_ptr[offset+0xe000]; } WRITE8_MEMBER(alphatro_state::rame000_w) { m_ram_ptr[offset+0xe000] = data; } -READ8_MEMBER( alphatro_state::port10_r ) +uint8_t alphatro_state::port10_r() { // Bit 0 -> 1 = FDC is installed, 0 = not // Bit 1 -> 1 = Graphic Board is installed, 0 = not @@ -222,7 +238,7 @@ READ8_MEMBER( alphatro_state::port10_r ) // Bit 6 -> 1 = NTSC, 0 = PAL // Bit 7 -> 1 = vblank or hblank, 0 = active display area - u8 retval = 0x40; + u8 retval = m_is_ntsc ? 0x40 : 0x00; // we'll get "FDC present" and "graphics expansion present" from the config switches retval |= (m_config->read() & 3); @@ -235,7 +251,7 @@ READ8_MEMBER( alphatro_state::port10_r ) return retval; } -WRITE8_MEMBER( alphatro_state::port10_w ) +void alphatro_state::port10_w(uint8_t data) { // Bit 0 -> 0 = 40 cols; 1 = 80 cols // Bit 1 -> 0 = display enable, 1 = display inhibit @@ -246,9 +262,17 @@ WRITE8_MEMBER( alphatro_state::port10_w ) // Bit 6 -> 1 = select ROM pack at A000, 0 = RAM at A000 // Bit 7 -> 0 = ROM enabled at 0, 1 = RAM enabled - m_port_10 = data; + if (BIT(data ^ m_port_10, 0)) + { + if (BIT(data, 0)) + m_crtc->set_unscaled_clock(16_MHz_XTAL / 8); + else if (m_is_ntsc || system_bios() == 3) // kludge for bios 2, which expects a NTSC clock even for ~50 Hz video + m_crtc->set_unscaled_clock(14.318181_MHz_XTAL / 16); + else + m_crtc->set_unscaled_clock(17.73447_MHz_XTAL / 16); + } - data &= 0xfe; + m_port_10 = data; m_beep->set_state(BIT(data, 4)); @@ -260,7 +284,7 @@ WRITE8_MEMBER( alphatro_state::port10_w ) update_banking(); } -WRITE8_MEMBER( alphatro_state::port20_w ) +void alphatro_state::port20_w(uint8_t data) { // Bit 0 -> 0 = CRTC reset release, 1 = CRTC reset enable // Bit 1 -> 0 = Centronics reset release, 1 = Centronics reset enable @@ -276,7 +300,7 @@ WRITE8_MEMBER( alphatro_state::port20_w ) update_banking(); } -READ8_MEMBER( alphatro_state::port30_r ) +uint8_t alphatro_state::port30_r() { // Bit 0 -> SIOC // Bit 1 -> 1 = vsync, 0 = not @@ -290,17 +314,17 @@ READ8_MEMBER( alphatro_state::port30_r ) return retval; } -WRITE8_MEMBER( alphatro_state::port30_w ) +void alphatro_state::port30_w(uint8_t data) { m_port_30 = data; } -READ8_MEMBER( alphatro_state::portf0_r ) +uint8_t alphatro_state::portf0_r() { return m_fdc_irq << 6; } -WRITE8_MEMBER( alphatro_state::portf0_w) +void alphatro_state::portf0_w(uint8_t data) { if ((data & 0x1) && !(m_port_f0)) { @@ -588,6 +612,8 @@ GFXDECODE_END void alphatro_state::machine_start() { + m_port_10 = 0x01; + save_item(NAME(m_port_10)); save_item(NAME(m_port_20)); save_item(NAME(m_cass_data)); @@ -598,7 +624,8 @@ void alphatro_state::machine_start() void alphatro_state::machine_reset() { m_ram_ptr = m_ram->pointer(); - m_port_10 = m_port_20 = 0; + port10_w(0); + m_port_20 = 0; update_banking(); m_cass_data[0] = m_cass_data[1] = m_cass_data[2] = m_cass_data[3] = 0; @@ -702,24 +729,25 @@ static void alphatro_floppies(device_slot_interface &device) MACHINE_CONFIG_START(alphatro_state::alphatro) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu",Z80,MAIN_CLOCK) + MCFG_DEVICE_ADD("maincpu", Z80, 16_MHz_XTAL / 4) MCFG_DEVICE_PROGRAM_MAP(alphatro_map) MCFG_DEVICE_IO_MAP(alphatro_io) /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not correct - MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update) - MCFG_SCREEN_SIZE(32*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1) + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + if (m_is_ntsc) + screen.set_raw(16_MHz_XTAL, 1016, 0, 640, 271, 0, 216); + else + screen.set_raw(16_MHz_XTAL, 1016, 0, 640, 314, 0, 240); + screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update)); + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_alphatro) MCFG_PALETTE_ADD("palette", 9) // 8 colours + amber MCFG_PALETTE_INIT_OWNER(alphatro_state, alphatro) /* sound hardware */ SPEAKER(config, "mono").front_center(); - BEEP(config, "beeper", 950).add_route(ALL_OUTPUTS, "mono", 1.00); /* piezo-device needs to be measured */ + BEEP(config, "beeper", 16_MHz_XTAL / 4 / 13 / 128).add_route(ALL_OUTPUTS, "mono", 1.00); // nominally 2.4 kHz WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25); /* Devices */ @@ -730,7 +758,7 @@ MACHINE_CONFIG_START(alphatro_state::alphatro) MCFG_FLOPPY_DRIVE_ADD("fdc:1", alphatro_floppies, "525dd", alphatro_state::floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list", "alphatro_flop") - I8257(config, m_dmac, MAIN_CLOCK); + I8257(config, m_dmac, 16_MHz_XTAL / 4); m_dmac->out_hrq_cb().set(FUNC(alphatro_state::hrq_w)); m_dmac->in_memr_cb().set(FUNC(alphatro_state::ram0000_r)); m_dmac->out_memw_cb().set(FUNC(alphatro_state::ram0000_w)); @@ -738,16 +766,16 @@ MACHINE_CONFIG_START(alphatro_state::alphatro) m_dmac->out_iow_cb<2>().set("fdc", FUNC(upd765a_device::mdma_w)); m_dmac->out_tc_cb().set("fdc", FUNC(upd765a_device::tc_line_w)); - MC6845(config, m_crtc, XTAL(12'288'000) / 8); // clk unknown + HD6845(config, m_crtc, 16_MHz_XTAL / 8); m_crtc->set_screen(m_screen); m_crtc->set_show_border_area(false); m_crtc->set_char_width(8); m_crtc->set_update_row_callback(FUNC(alphatro_state::crtc_update_row), this); - I8251(config, m_usart, 0); + I8251(config, m_usart, 16_MHz_XTAL / 4); m_usart->txd_handler().set(FUNC(alphatro_state::txdata_callback)); - clock_device &usart_clock(CLOCK(config, "usart_clock", 19218)); // 19218 to load a real tape, 19222 to load a tape made by this driver + clock_device &usart_clock(CLOCK(config, "usart_clock", /*16_MHz_XTAL / 4 / 13 / 16*/ 19218)); // 19218 to load a real tape, 19222 to load a tape made by this driver usart_clock.signal_handler().set(m_usart, FUNC(i8251_device::write_txc)); usart_clock.signal_handler().append(m_usart, FUNC(i8251_device::write_rxc)); @@ -806,4 +834,7 @@ ROM_START( alphatro ) ROMX_LOAD( "b40r_ic1067.bin", 0x0000, 0x1000, CRC(543e3ee8) SHA1(3e6c6f8c85d3a5d0735edfec52709c5670ff1646), ROM_BIOS(2) ) ROM_END -COMP( 1983, alphatro, 0, 0, alphatro, alphatro, alphatro_state, empty_init, "Triumph-Adler", "Alphatronic PC", MACHINE_SUPPORTS_SAVE ) +#define rom_alphatron rom_alphatro + +COMP( 1983, alphatro, 0, 0, alphatro, alphatro, alphatro_pal_state, empty_init, "Triumph-Adler", "Alphatronic PC (PAL)", MACHINE_SUPPORTS_SAVE ) +COMP( 1983, alphatron, alphatro, 0, alphatro, alphatro, alphatro_ntsc_state, empty_init, "Triumph-Adler", "Alphatronic PC (NTSC)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 626ed129098..733eaf379cf 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1115,6 +1115,7 @@ alphatp30 @source:alphatro.cpp alphatro // +alphatron // @source:altair.cpp al8800bt // -- cgit v1.2.3