From 543e49cc2443e3ab531168ec80e93dd3afeea795 Mon Sep 17 00:00:00 2001 From: Michael Zapf Date: Sat, 11 Aug 2018 14:04:15 +0200 Subject: ti99: Steps towards devcb3, wip. (nw) --- src/devices/bus/ti99/peb/bwg.cpp | 6 +-- src/devices/bus/ti99/peb/hfdc.cpp | 14 ++--- src/devices/bus/ti99/peb/memex.cpp | 6 +-- src/devices/bus/ti99/peb/pcode.cpp | 94 ++++++++++++++++++++++++++-------- src/devices/bus/ti99/peb/pcode.h | 24 ++++++--- src/devices/bus/ti99/peb/ti_32kmem.cpp | 6 +-- src/devices/bus/ti99/peb/ti_fdc.cpp | 7 +-- src/devices/machine/hdc92x4.h | 46 +++-------------- src/devices/machine/tmc0430.h | 2 + src/devices/machine/tms9902.h | 6 +++ 10 files changed, 123 insertions(+), 88 deletions(-) diff --git a/src/devices/bus/ti99/peb/bwg.cpp b/src/devices/bus/ti99/peb/bwg.cpp index 85844746a7e..d52173abab4 100644 --- a/src/devices/bus/ti99/peb/bwg.cpp +++ b/src/devices/bus/ti99/peb/bwg.cpp @@ -676,9 +676,9 @@ ROM_START( bwg_fdc ) ROM_END MACHINE_CONFIG_START(snug_bwg_device::device_add_mconfig) - MCFG_DEVICE_ADD(FDC_TAG, WD1773, 8_MHz_XTAL) - MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, snug_bwg_device, fdc_irq_w)) - MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(*this, snug_bwg_device, fdc_drq_w)) + WD1773(config, m_wd1773, 8_MHz_XTAL); + m_wd1773->intrq_wr_callback().set(FUNC(snug_bwg_device::fdc_irq_w)); + m_wd1773->drq_wr_callback().set(FUNC(snug_bwg_device::fdc_drq_w)); MCFG_DEVICE_ADD(CLOCK_TAG, MM58274C, 0) MCFG_MM58274C_MODE24(1) // 24 hour diff --git a/src/devices/bus/ti99/peb/hfdc.cpp b/src/devices/bus/ti99/peb/hfdc.cpp index bd52ecd523e..6af2b2c86c1 100644 --- a/src/devices/bus/ti99/peb/hfdc.cpp +++ b/src/devices/bus/ti99/peb/hfdc.cpp @@ -1068,13 +1068,13 @@ ROM_END MACHINE_CONFIG_START(myarc_hfdc_device::device_add_mconfig) - MCFG_DEVICE_ADD(FDC_TAG, HDC9234, 0) - MCFG_HDC92X4_INTRQ_CALLBACK(WRITELINE(*this, myarc_hfdc_device, intrq_w)) - MCFG_HDC92X4_DIP_CALLBACK(WRITELINE(*this, myarc_hfdc_device, dip_w)) - MCFG_HDC92X4_AUXBUS_OUT_CALLBACK(WRITE8(*this, myarc_hfdc_device, auxbus_out)) - MCFG_HDC92X4_DMARQ_CALLBACK(WRITELINE(*this, myarc_hfdc_device, dmarq_w)) - MCFG_HDC92X4_DMA_IN_CALLBACK(READ8(*this, myarc_hfdc_device, read_buffer)) - MCFG_HDC92X4_DMA_OUT_CALLBACK(WRITE8(*this, myarc_hfdc_device, write_buffer)) + HDC9234(config, m_hdc9234, 0); + m_hdc9234->intrq_cb().set(FUNC(myarc_hfdc_device::intrq_w)); + m_hdc9234->dmarq_cb().set(FUNC(myarc_hfdc_device::dmarq_w)); + m_hdc9234->dip_cb().set(FUNC(myarc_hfdc_device::dip_w)); + m_hdc9234->auxbus_cb().set(FUNC(myarc_hfdc_device::auxbus_out)); + m_hdc9234->dmain_cb().set(FUNC(myarc_hfdc_device::read_buffer)); + m_hdc9234->dmaout_cb().set(FUNC(myarc_hfdc_device::write_buffer)); MCFG_FLOPPY_DRIVE_ADD("f1", hfdc_floppies, "525dd", myarc_hfdc_device::floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) diff --git a/src/devices/bus/ti99/peb/memex.cpp b/src/devices/bus/ti99/peb/memex.cpp index ad1572d6215..1d770a9b224 100644 --- a/src/devices/bus/ti99/peb/memex.cpp +++ b/src/devices/bus/ti99/peb/memex.cpp @@ -153,9 +153,9 @@ INPUT_PORTS_START( memex ) INPUT_PORTS_END MACHINE_CONFIG_START(geneve_memex_device::device_add_mconfig) - MCFG_RAM_ADD(RAMREGION) - MCFG_RAM_DEFAULT_SIZE("2M") - MCFG_RAM_DEFAULT_VALUE(0) + RAM(config, m_ram, 0); + m_ram->set_default_size("2M"); + m_ram->set_default_value(0); MACHINE_CONFIG_END ioport_constructor geneve_memex_device::device_input_ports() const diff --git a/src/devices/bus/ti99/peb/pcode.cpp b/src/devices/bus/ti99/peb/pcode.cpp index 85c808129ba..1d13b16e7b5 100644 --- a/src/devices/bus/ti99/peb/pcode.cpp +++ b/src/devices/bus/ti99/peb/pcode.cpp @@ -108,8 +108,16 @@ namespace bus { namespace ti99 { namespace peb { ti_pcode_card_device::ti_pcode_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, TI99_P_CODE, tag, owner, clock), device_ti99_peribox_card_interface(mconfig, *this), - m_rom(nullptr), + m_grom0(*this, PGROM0_TAG), + m_grom1(*this, PGROM1_TAG), + m_grom2(*this, PGROM2_TAG), + m_grom3(*this, PGROM3_TAG), + m_grom4(*this, PGROM4_TAG), + m_grom5(*this, PGROM5_TAG), + m_grom6(*this, PGROM6_TAG), + m_grom7(*this, PGROM7_TAG), m_crulatch(*this, "crulatch"), + m_rom(nullptr), m_bank_select(0), m_active(false), m_clock_count(0), @@ -144,8 +152,14 @@ SETADDRESS_DBIN_MEMBER( ti_pcode_card_device::setaddress_dbin ) line_state mline = (state!=0)? ASSERT_LINE : CLEAR_LINE; line_state gsq = m_isgrom? ASSERT_LINE : CLEAR_LINE; - for (int i=0; i < 8; i++) - m_grom[i]->set_lines(mline, a14, gsq); + m_grom0->set_lines(mline, a14, gsq); + m_grom1->set_lines(mline, a14, gsq); + m_grom2->set_lines(mline, a14, gsq); + m_grom3->set_lines(mline, a14, gsq); + m_grom4->set_lines(mline, a14, gsq); + m_grom5->set_lines(mline, a14, gsq); + m_grom6->set_lines(mline, a14, gsq); + m_grom7->set_lines(mline, a14, gsq); } } @@ -181,7 +195,14 @@ READ8Z_MEMBER( ti_pcode_card_device::readz ) { if (m_isgrom) { - for (auto& elem : m_grom) elem->readz(value); + m_grom0->readz(value); + m_grom1->readz(value); + m_grom2->readz(value); + m_grom3->readz(value); + m_grom4->readz(value); + m_grom5->readz(value); + m_grom6->readz(value); + m_grom7->readz(value); LOGMASKED(LOG_GROM, "Read from grom %04x: %02x\n", m_address&0xffff, *value); } else @@ -211,7 +232,14 @@ WRITE8_MEMBER( ti_pcode_card_device::write ) if (machine().side_effects_disabled()) return; if (m_active && m_isgrom && m_selected) { - for (auto & elem : m_grom) elem->write(data); + m_grom0->write(data); + m_grom1->write(data); + m_grom2->write(data); + m_grom3->write(data); + m_grom4->write(data); + m_grom5->write(data); + m_grom6->write(data); + m_grom7->write(data); } } @@ -235,7 +263,14 @@ WRITE_LINE_MEMBER( ti_pcode_card_device::clock_in) { // Toggle m_clockhigh = !m_clockhigh; - for (auto & elem : m_grom) elem->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom0->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom1->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom2->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom3->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom4->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom5->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom6->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); + m_grom7->gclock_in(m_clockhigh? ASSERT_LINE : CLEAR_LINE); } } @@ -276,14 +311,6 @@ WRITE_LINE_MEMBER(ti_pcode_card_device::ekrpg_w) void ti_pcode_card_device::device_start() { - m_grom[0] = downcast(subdevice(PGROM0_TAG)); - m_grom[1] = downcast(subdevice(PGROM1_TAG)); - m_grom[2] = downcast(subdevice(PGROM2_TAG)); - m_grom[3] = downcast(subdevice(PGROM3_TAG)); - m_grom[4] = downcast(subdevice(PGROM4_TAG)); - m_grom[5] = downcast(subdevice(PGROM5_TAG)); - m_grom[6] = downcast(subdevice(PGROM6_TAG)); - m_grom[7] = downcast(subdevice(PGROM7_TAG)); m_rom = memregion(PCODE_ROM_TAG)->base(); save_item(NAME(m_bank_select)); @@ -359,14 +386,37 @@ ROM_START( ti99_pcode ) ROM_END MACHINE_CONFIG_START(ti_pcode_card_device::device_add_mconfig) - MCFG_GROM_ADD( PGROM0_TAG, 0, PCODE_GROM_TAG, 0x0000, WRITELINE(*this, ti_pcode_card_device, ready_line)) - MCFG_GROM_ADD( PGROM1_TAG, 1, PCODE_GROM_TAG, 0x2000, WRITELINE(*this, ti_pcode_card_device, ready_line)) - MCFG_GROM_ADD( PGROM2_TAG, 2, PCODE_GROM_TAG, 0x4000, WRITELINE(*this, ti_pcode_card_device, ready_line)) - MCFG_GROM_ADD( PGROM3_TAG, 3, PCODE_GROM_TAG, 0x6000, WRITELINE(*this, ti_pcode_card_device, ready_line)) - MCFG_GROM_ADD( PGROM4_TAG, 4, PCODE_GROM_TAG, 0x8000, WRITELINE(*this, ti_pcode_card_device, ready_line)) - MCFG_GROM_ADD( PGROM5_TAG, 5, PCODE_GROM_TAG, 0xa000, WRITELINE(*this, ti_pcode_card_device, ready_line)) - MCFG_GROM_ADD( PGROM6_TAG, 6, PCODE_GROM_TAG, 0xc000, WRITELINE(*this, ti_pcode_card_device, ready_line)) - MCFG_GROM_ADD( PGROM7_TAG, 7, PCODE_GROM_TAG, 0xe000, WRITELINE(*this, ti_pcode_card_device, ready_line)) + TMC0430(config, m_grom0, 0); + m_grom0->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom0->set_region_and_ident(PCODE_GROM_TAG, 0x0000, 0); + + TMC0430(config, m_grom1, 0); + m_grom1->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom1->set_region_and_ident(PCODE_GROM_TAG, 0x2000, 1); + + TMC0430(config, m_grom2, 0); + m_grom2->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom2->set_region_and_ident(PCODE_GROM_TAG, 0x4000, 2); + + TMC0430(config, m_grom3, 0); + m_grom3->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom3->set_region_and_ident(PCODE_GROM_TAG, 0x6000, 3); + + TMC0430(config, m_grom4, 0); + m_grom4->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom4->set_region_and_ident(PCODE_GROM_TAG, 0x8000, 4); + + TMC0430(config, m_grom5, 0); + m_grom5->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom5->set_region_and_ident(PCODE_GROM_TAG, 0xa000, 5); + + TMC0430(config, m_grom6, 0); + m_grom6->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom6->set_region_and_ident(PCODE_GROM_TAG, 0xc000, 6); + + TMC0430(config, m_grom7, 0); + m_grom7->ready_cb().set(FUNC(ti_pcode_card_device::ready_line)); + m_grom7->set_region_and_ident(PCODE_GROM_TAG, 0xe000, 7); MCFG_DEVICE_ADD("crulatch", LS259, 0) // U12 MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, ti_pcode_card_device, pcpage_w)) diff --git a/src/devices/bus/ti99/peb/pcode.h b/src/devices/bus/ti99/peb/pcode.h index a07effcd478..1233ca500ce 100644 --- a/src/devices/bus/ti99/peb/pcode.h +++ b/src/devices/bus/ti99/peb/pcode.h @@ -51,14 +51,24 @@ private: DECLARE_WRITE_LINE_MEMBER(pcpage_w); DECLARE_WRITE_LINE_MEMBER(ekrpg_w); - void debugger_read(address_space& space, uint16_t addr, uint8_t& value); - tmc0430_device* m_grom[8]; - uint8_t* m_rom; + void debugger_read(address_space& space, uint16_t addr, uint8_t& value); + + required_device m_grom0; + required_device m_grom1; + required_device m_grom2; + required_device m_grom3; + required_device m_grom4; + required_device m_grom5; + required_device m_grom6; + required_device m_grom7; + required_device m_crulatch; - int m_bank_select; - bool m_active; - int m_clock_count; - bool m_clockhigh; + + uint8_t* m_rom; + int m_bank_select; + bool m_active; + int m_clock_count; + bool m_clockhigh; // Address in card area bool m_inDsrArea; diff --git a/src/devices/bus/ti99/peb/ti_32kmem.cpp b/src/devices/bus/ti99/peb/ti_32kmem.cpp index 67ef418683a..fce434c70d7 100644 --- a/src/devices/bus/ti99/peb/ti_32kmem.cpp +++ b/src/devices/bus/ti99/peb/ti_32kmem.cpp @@ -101,9 +101,9 @@ void ti_32k_expcard_device::device_start() } MACHINE_CONFIG_START(ti_32k_expcard_device::device_add_mconfig) - MCFG_RAM_ADD(RAMREGION) - MCFG_RAM_DEFAULT_SIZE("32k") - MCFG_RAM_DEFAULT_VALUE(0) + RAM(config, m_ram, 0); + m_ram->set_default_size("32k"); + m_ram->set_default_value(0); MACHINE_CONFIG_END } } } // end namespace bus::ti99::peb diff --git a/src/devices/bus/ti99/peb/ti_fdc.cpp b/src/devices/bus/ti99/peb/ti_fdc.cpp index 389cd926a87..587e4a739f1 100644 --- a/src/devices/bus/ti99/peb/ti_fdc.cpp +++ b/src/devices/bus/ti99/peb/ti_fdc.cpp @@ -420,9 +420,10 @@ ROM_START( ti_fdc ) ROM_END MACHINE_CONFIG_START(ti_fdc_device::device_add_mconfig) - MCFG_DEVICE_ADD(FDC_TAG, FD1771, 1_MHz_XTAL) - MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, ti_fdc_device, fdc_irq_w)) - MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(*this, ti_fdc_device, fdc_drq_w)) + FD1771(config, m_fd1771, 1_MHz_XTAL); + m_fd1771->intrq_wr_callback().set(FUNC(ti_fdc_device::fdc_irq_w)); + m_fd1771->drq_wr_callback().set(FUNC(ti_fdc_device::fdc_drq_w)); + MCFG_FLOPPY_DRIVE_ADD("0", tifdc_floppies, "525dd", ti_fdc_device::floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_FLOPPY_DRIVE_ADD("1", tifdc_floppies, "525dd", ti_fdc_device::floppy_formats) diff --git a/src/devices/machine/hdc92x4.h b/src/devices/machine/hdc92x4.h index 08f3fea3b44..e0c25d1a524 100644 --- a/src/devices/machine/hdc92x4.h +++ b/src/devices/machine/hdc92x4.h @@ -14,40 +14,6 @@ DECLARE_DEVICE_TYPE(HDC9224, hdc9224_device) DECLARE_DEVICE_TYPE(HDC9234, hdc9234_device) -//=================================================================== - -/* Interrupt line. To be connected with the controller PCB. */ -#define MCFG_HDC92X4_INTRQ_CALLBACK(_write) \ - downcast(*device).set_intrq_wr_callback(DEVCB_##_write); - -/* DMA request line. To be connected with the controller PCB. */ -#define MCFG_HDC92X4_DMARQ_CALLBACK(_write) \ - downcast(*device).set_dmarq_wr_callback(DEVCB_##_write); - -/* DMA in progress line. To be connected with the controller PCB. */ -#define MCFG_HDC92X4_DIP_CALLBACK(_write) \ - downcast(*device).set_dip_wr_callback(DEVCB_##_write); - -/* Auxiliary Bus. These 8 lines need to be connected to external latches - and to a counter circuitry which works together with the external RAM. - We use the S0/S1 lines as address lines. */ -#define MCFG_HDC92X4_AUXBUS_OUT_CALLBACK(_write) \ - downcast(*device).set_auxbus_wr_callback(DEVCB_##_write); - -/* Callback to read the contents of the external RAM via the data bus. - Note that the address must be set and automatically increased - by external circuitry. */ -#define MCFG_HDC92X4_DMA_IN_CALLBACK(_read) \ - downcast(*device).set_dma_rd_callback(DEVCB_##_read); - -/* Callback to write the contents of the external RAM via the data bus. - Note that the address must be set and automatically increased - by external circuitry. */ -#define MCFG_HDC92X4_DMA_OUT_CALLBACK(_write) \ - downcast(*device).set_dma_wr_callback(DEVCB_##_write); - -//=================================================================== - class hdc92x4_device : public device_t { public: @@ -85,12 +51,12 @@ public: DECLARE_WRITE_LINE_MEMBER( dmaack ); // Callbacks - template devcb_base &set_intrq_wr_callback(Object &&cb) { return m_out_intrq.set_callback(std::forward(cb)); } - template devcb_base &set_dmarq_wr_callback(Object &&cb) { return m_out_dmarq.set_callback(std::forward(cb)); } - template devcb_base &set_dip_wr_callback(Object &&cb) { return m_out_dip.set_callback(std::forward(cb)); } - template devcb_base &set_auxbus_wr_callback(Object &&cb) { return m_out_auxbus.set_callback(std::forward(cb)); } - template devcb_base &set_dma_rd_callback(Object &&cb) { return m_in_dma.set_callback(std::forward(cb)); } - template devcb_base &set_dma_wr_callback(Object &&cb) { return m_out_dma.set_callback(std::forward(cb)); } + auto intrq_cb() { return m_out_intrq.bind(); } + auto dmarq_cb() { return m_out_dmarq.bind(); } + auto dip_cb() { return m_out_dip.bind(); } + auto auxbus_cb() { return m_out_auxbus.bind(); } + auto dmain_cb() { return m_in_dma.bind(); } + auto dmaout_cb() { return m_out_dma.bind(); } // auxbus_in is intended to read events from the drives // In the real chip the status is polled; to avoid unnecessary load diff --git a/src/devices/machine/tmc0430.h b/src/devices/machine/tmc0430.h index a0f49747b88..7cd906570f1 100644 --- a/src/devices/machine/tmc0430.h +++ b/src/devices/machine/tmc0430.h @@ -30,6 +30,8 @@ public: template devcb_base &set_ready_wr_callback(Object &&cb) { return m_gromready.set_callback(std::forward(cb)); } + auto ready_cb() { return m_gromready.bind(); } + void readz(uint8_t *value); void write(uint8_t data); void set_lines(line_state mline, line_state moline, line_state gsq); diff --git a/src/devices/machine/tms9902.h b/src/devices/machine/tms9902.h index 1d3a96829db..0e055253567 100644 --- a/src/devices/machine/tms9902.h +++ b/src/devices/machine/tms9902.h @@ -55,6 +55,12 @@ public: template devcb_base &set_xmit_callback(Object &&cb) { return m_xmit_cb.set_callback(std::forward(cb)); } template devcb_base &set_ctrl_callback(Object &&cb) { return m_ctrl_cb.set_callback(std::forward(cb)); } + // Callbacks + auto int_cb() { return m_int_cb.bind(); } + auto rcv_cb() { return m_rcv_cb.bind(); } + auto xmit_cb() { return m_xmit_cb.bind(); } + auto ctrl_cb() { return m_ctrl_cb.bind(); } + void set_clock(bool state); void rcv_cts(line_state state); -- cgit v1.2.3