From 757ee7890d71ced06c97af0acb2570cb08907dea Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sun, 24 Apr 2022 23:09:44 +1000 Subject: exl100: the amateur lawyers didn't like the license. --- src/mame/drivers/exelv.cpp | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/src/mame/drivers/exelv.cpp b/src/mame/drivers/exelv.cpp index 2f75917d9ce..82195854232 100644 --- a/src/mame/drivers/exelv.cpp +++ b/src/mame/drivers/exelv.cpp @@ -1,4 +1,4 @@ -// license:GPL-2.0+, BSD-3-Clause +// license:GPL-2.0+ // copyright-holders:Raphael Nabet,Robbbert /* Experimental exelvision driver @@ -59,24 +59,24 @@ STATUS: STATUS OF SOFTWARE: -SWList name KBD poke address Status ------------------------------------------------------------------------------------------------------- -exelbas 03 works -exelbasp Cyan screen, hangs at start -exelmax options 1-4 work, 5-7 do nothing -exeldrum 32 can get to the menu, which seems useless -exelogo can type into it but the usual commands get error -exeltext 3C works but weird -exlpaint works -exlmodem it might work, need instructions -capmenkr works, large chars are corrupt. -guppy works -imagix first screen corrupt, can't proceed -pindo first screen corrupt, can select a game, how to play? -quizzy works, scores are corrupted -tennis 12 the demo works, didn't try playing -virus works, 2nd screen is corrupt, press 1 there. -wizord works +SWList name Status +--------------------------------------------------------------------------- +exelbas works +exelbasp Cyan screen, hangs at start +exelmax options 1-4 work, 5-7 do nothing +exeldrum can get to the menu, which seems useless +exelogo can type into it but the usual commands get error +exeltext works but weird +exlpaint works +exlmodem it might work, need instructions +capmenkr works, video corruptions +guppy works +imagix video corruptions, can't proceed +pindo video corruptions, can select a game, how to play? +quizzy works, video corruptions +tennis the demo works, didn't try playing +virus works, 2nd screen is corrupt, press 1 there. +wizord works Using the cassette: -- cgit v1.2.3 From 45c468cbb40d0b7e20dc9896c9cc0cdb2dcbf744 Mon Sep 17 00:00:00 2001 From: 0kmg <9137159+0kmg@users.noreply.github.com> Date: Sun, 24 Apr 2022 05:27:58 -0800 Subject: nes.xml: Fixed a few more mirroring issues. Demoted strikwlf. (#9617) --- hash/nes.xml | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/hash/nes.xml b/hash/nes.xml index 746b2235446..540bdfe01ab 100644 --- a/hash/nes.xml +++ b/hash/nes.xml @@ -2734,7 +2734,7 @@ license:CC0 - + @@ -9792,7 +9792,7 @@ license:CC0 - + @@ -45025,7 +45025,7 @@ Also notice that VRAM, WRAM & mirror are probably incorrect for some of these se - + @@ -46563,7 +46563,7 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx - + @@ -47267,7 +47267,6 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx - @@ -48073,7 +48072,6 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx - @@ -56058,7 +56056,7 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx - + Strike Wolf (Tw) 19?? TXC Corp @@ -57406,7 +57404,7 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx - + @@ -86706,7 +86704,6 @@ that the real dumps might surface --> - -- cgit v1.2.3 From 56d8a6869409393974baced28f7d3f7d0dedf35b Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 24 Apr 2022 13:32:07 -0400 Subject: mjtensin, mjvegas, mjvegasa: Fix memory_bank::set_entry exception in debug build --- src/mame/drivers/royalmah.cpp | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/royalmah.cpp b/src/mame/drivers/royalmah.cpp index 51c6b4718f2..671c695b92e 100644 --- a/src/mame/drivers/royalmah.cpp +++ b/src/mame/drivers/royalmah.cpp @@ -370,7 +370,6 @@ void royalmah_state::machine_start() { save_item(NAME(m_input_port_select)); save_item(NAME(m_dsw_select)); - save_item(NAME(m_rombank)); save_item(NAME(m_palette_base)); save_item(NAME(m_flip_screen)); @@ -5586,16 +5585,25 @@ void royalmah_state::init_daisyari() void royalmah_state::init_mjtensin() { m_mainbank->configure_entries(0, 80, memregion("maincpu")->base() + 0x10000, 0x8000); + + save_item(NAME(m_rombank)); + m_rombank = 0; } void royalmah_state::init_cafetime() { m_mainbank->configure_entries(0, 64, memregion("maincpu")->base() + 0x10000, 0x8000); + + save_item(NAME(m_rombank)); + m_rombank = 0; } void royalmah_state::init_mjvegasa() { m_mainbank->configure_entries(0, 128, memregion("maincpu")->base() + 0x10000, 0x8000); + + save_item(NAME(m_rombank)); + m_rombank = 0; } void royalmah_state::init_jongshin() @@ -5606,6 +5614,9 @@ void royalmah_state::init_jongshin() void royalmah_state::init_mjifb() { m_mainbank->configure_entries(0, 256, memregion("maincpu")->base() + 0x10000, 0x4000); + + save_item(NAME(m_rombank)); + m_rombank = 0; } void royalmah_state::init_tontonb() -- cgit v1.2.3 From 6712c44fee1725843ea027131431e7ae05367ab5 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 25 Apr 2022 04:45:35 +1000 Subject: ympsr60.cpp: Initialise interrupt states on start. --- src/mame/drivers/ympsr60.cpp | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/ympsr60.cpp b/src/mame/drivers/ympsr60.cpp index 1173d400a42..7ee7f6ec7d2 100644 --- a/src/mame/drivers/ympsr60.cpp +++ b/src/mame/drivers/ympsr60.cpp @@ -68,6 +68,8 @@ #include "psr60.lh" #include "psr70.lh" +namespace { + class psr60_state : public driver_device { static constexpr int DRVIF_MAX_TARGETS = 23; @@ -305,7 +307,7 @@ INPUT_CHANGED_MEMBER(psr60_state::mastervol_changed) void psr60_state::recalc_irqs() { - int irq_state = m_acia_irq | m_ym_irq | m_drvif_irq | m_ym2154_irq; + int const irq_state = m_acia_irq | m_ym_irq | m_drvif_irq | m_ym2154_irq; m_maincpu->set_input_line(0, irq_state); } @@ -314,7 +316,10 @@ void psr60_state::machine_start() m_drvif_out.resolve(); m_rom2bank->configure_entries(0, 2, memregion("rom2")->base(), 0x4000); m_rom2bank->set_entry(0); - m_acia_irq = CLEAR_LINE; + m_acia_irq = 0; + m_ym_irq = 0; + m_drvif_irq = 0; + m_ym2154_irq = 0; } void psr60_state::machine_reset() @@ -731,5 +736,7 @@ ROM_START(psr70) ROM_LOAD("ym21909.bin", 0x0000, 0x8000, CRC(a555b42a) SHA1(f96cdea88ffc0af4cf6009529398a0181a91a70c)) ROM_END +} // namespace + CONS(1985, psr60, 0, 0, psr60, psr60, psr60_state, empty_init, "Yamaha", "PSR-60 PortaSound", MACHINE_IMPERFECT_SOUND | MACHINE_CLICKABLE_ARTWORK) CONS(1985, psr70, psr60, 0, psr70, psr70, psr60_state, empty_init, "Yamaha", "PSR-70 PortaSound", MACHINE_IMPERFECT_SOUND | MACHINE_CLICKABLE_ARTWORK) -- cgit v1.2.3 From f04263796446b5235ee85332a50b2a6788aef148 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 25 Apr 2022 17:42:12 +1000 Subject: slapfight_ms.cpp: Fix out-of-range access warning in some GCC versions. The implicit conversion from size_t to int could theoretically produce a negative value, which triggered a warning on the memcpy. --- src/mame/drivers/blktiger_ms.cpp | 4 ++-- src/mame/drivers/slapfght_ms.cpp | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/blktiger_ms.cpp b/src/mame/drivers/blktiger_ms.cpp index 74614926871..cc7f6704bd4 100644 --- a/src/mame/drivers/blktiger_ms.cpp +++ b/src/mame/drivers/blktiger_ms.cpp @@ -355,8 +355,8 @@ ROM_END void blktiger_ms_state::init_blktigerm() { - uint8_t *src = memregion("maincpu")->base(); - int len = 0x50000; + uint8_t *const src = memregion("maincpu")->base(); + int const len = 0x50000; // bitswap data for (int i = 0; i < len; i++) diff --git a/src/mame/drivers/slapfght_ms.cpp b/src/mame/drivers/slapfght_ms.cpp index 54a12c1416f..38026529e97 100644 --- a/src/mame/drivers/slapfght_ms.cpp +++ b/src/mame/drivers/slapfght_ms.cpp @@ -447,8 +447,8 @@ ROM_END void slapfght_ms_state::init_decryption() // same as the one for blktiger_ms { - uint8_t *src = memregion("maincpu")->base(); - int len = memregion("maincpu")->bytes(); + uint8_t *const src = memregion("maincpu")->base(); + auto const len = memregion("maincpu")->bytes(); // bitswap data for (int i = 0; i < len; i++) -- cgit v1.2.3 From 1bf515ae23a51bd41a73339fd09a8f69d813f6ea Mon Sep 17 00:00:00 2001 From: Angelo Salese Date: Mon, 25 Apr 2022 17:02:03 +0200 Subject: 68340tmu.cpp: fix potential crash on mode logging --- src/devices/machine/68340tmu.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp index d66f1f2387c..96157eafc53 100644 --- a/src/devices/machine/68340tmu.cpp +++ b/src/devices/machine/68340tmu.cpp @@ -156,7 +156,7 @@ void mc68340_timer_module_device::write(offs_t offset, uint16_t data, uint16_t m "Period Measurement - not implemented", "Event Count - not implemented", "Timer Bypass (Simple Test Method) - not implemented" - }}[data & REG_CR_MODE_MASK]); + }}[(data & REG_CR_MODE_MASK) >> 2]); LOGTIMER("- OC: %s mode\n", std::array{{"Disabled", "Toggle", "Zero", "One"}}[data & REG_CR_OC_MASK]); -- cgit v1.2.3 From a7e49b61e69c4ffbba5d601260adbc443da3bd9f Mon Sep 17 00:00:00 2001 From: theoldsport Date: Mon, 25 Apr 2022 04:00:43 -0700 Subject: osborne1.cpp: revert floppy device back to SSDD (#9625) Partially reverts an old commit from @Robbbert (https://github.com/mamedev/mame/commit/247939853301565efd348cad12b04fc957707bc2) where the floppy device was (mistakenly?) set to FLOPPY_525_QD (quad density) from FLOPPY_525_SSDD (single-sided double-density). As far as I am aware, the Osborne1 only supported SSSD and SSDD disks. Revert appears to resolve known Osborne1 issues [5792](https://mametesters.org/view.php?id=5792) (thanks to @Osso13 for pointing this out) and [8100](https://mametesters.org/view.php?id=8100) @cuavas. --- src/mame/drivers/osborne1.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/osborne1.cpp b/src/mame/drivers/osborne1.cpp index 43501d3c897..4eb48432f7d 100644 --- a/src/mame/drivers/osborne1.cpp +++ b/src/mame/drivers/osborne1.cpp @@ -258,7 +258,7 @@ INPUT_PORTS_END static void osborne1_floppies(device_slot_interface &device) { device.option_add("525sssd", FLOPPY_525_SSSD); // Siemens FDD 100-5, custom Osborne electronics - device.option_add("525ssdd", FLOPPY_525_QD); // SSDD) // MPI 52(?), custom Osborne electronics + device.option_add("525ssdd", FLOPPY_525_SSDD); // MPI 52(?), custom Osborne electronics } -- cgit v1.2.3 From e0c599d620a498448cb64ea128237774fff8ccc1 Mon Sep 17 00:00:00 2001 From: MooglyGuy Date: Mon, 25 Apr 2022 23:48:07 +0200 Subject: -mips3drc: Moved unchanging conditionals outside for loop in generate_checksum_block; 7% faster. [Ryan Holtz] (#9626) --- src/devices/cpu/mips/mips3drc.cpp | 65 +++++++++++++++++++++++++++++---------- 1 file changed, 48 insertions(+), 17 deletions(-) diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp index 8d2c1be7294..db5faef8a97 100644 --- a/src/devices/cpu/mips/mips3drc.cpp +++ b/src/devices/cpu/mips/mips3drc.cpp @@ -1163,43 +1163,74 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & #else uint32_t sum = 0; const void *base = m_prptr(seqhead->physpc); - uint32_t low_bits = (seqhead->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + const uint32_t data_bits_mask = (m_data_bits == 64 ? 4 : 0); + uint32_t low_bits = (seqhead->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I0, base, low_bits, SIZE_DWORD, SCALE_x1); // load i0,base,0,dword sum += seqhead->opptr.l[0]; if ((m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK) && !(codelast->flags & OPFLAG_VIRTUAL_NOOP) && codelast->physpc != seqhead->physpc) { base = m_prptr(codelast->physpc); assert(base != nullptr); - low_bits = (codelast->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + low_bits = (codelast->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 sum += codelast->opptr.l[0]; } - for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) + if (!(m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK)) { - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) { - // Skip the last if it was already included above - if (!(m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK) || curdesc->physpc != codelast->physpc) + if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) { base = m_prptr(curdesc->physpc); assert(base != nullptr); - low_bits = (curdesc->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + low_bits = (curdesc->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 sum += curdesc->opptr.l[0]; - } - if (curdesc->delay.first() != nullptr - && !(curdesc->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) - && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) + if (curdesc->delay.first() != nullptr + && !(curdesc->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) + && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) + { + base = m_prptr(curdesc->delay.first()->physpc); + assert(base != nullptr); + low_bits = (curdesc->delay.first()->physpc & data_bits_mask) ^ m_dword_xor; + UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword + UML_ADD(block, I0, I0, I1); // add i0,i0,i1 + sum += curdesc->delay.first()->opptr.l[0]; + } + } + } + } + else + { + for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) + { + if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) { - base = m_prptr(curdesc->delay.first()->physpc); - assert(base != nullptr); - low_bits = (curdesc->delay.first()->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; - UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword - UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->delay.first()->opptr.l[0]; + // Skip the last if it was already included above + if (curdesc->physpc != codelast->physpc) + { + base = m_prptr(curdesc->physpc); + assert(base != nullptr); + low_bits = (curdesc->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword + UML_ADD(block, I0, I0, I1); // add i0,i0,i1 + sum += curdesc->opptr.l[0]; + } + + if (curdesc->delay.first() != nullptr + && !(curdesc->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) + && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) + { + base = m_prptr(curdesc->delay.first()->physpc); + assert(base != nullptr); + low_bits = (curdesc->delay.first()->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword + UML_ADD(block, I0, I0, I1); // add i0,i0,i1 + sum += curdesc->delay.first()->opptr.l[0]; + } } } } -- cgit v1.2.3 From 56ecdeef03760349175a112b23f67e3402ffa0c7 Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 26 Apr 2022 14:17:32 +0200 Subject: jaguarcd: fix nodisc crash again --- src/mame/drivers/jaguar.cpp | 65 +++++++++++++++++++++++++++++---------------- 1 file changed, 42 insertions(+), 23 deletions(-) diff --git a/src/mame/drivers/jaguar.cpp b/src/mame/drivers/jaguar.cpp index 6767856bfd6..b6771efe453 100644 --- a/src/mame/drivers/jaguar.cpp +++ b/src/mame/drivers/jaguar.cpp @@ -1231,8 +1231,15 @@ void jaguarcd_state::butch_regs_w(offs_t offset, uint32_t data, uint32_t mem_mas switch((m_butch_regs[offset] & 0xff00) >> 8) { case 0x03: // Read TOC - uint32_t msf; - + { + if(!m_cd_file) // No disc + { + m_butch_cmd_response[0] = 0x400; + m_butch_regs[0] |= 0x2000; + m_butch_cmd_index = 0; + m_butch_cmd_size = 1; + return; + } if(m_butch_regs[offset] & 0xff) // Multi Session CD, TODO { m_butch_cmd_response[0] = 0x0029; // illegal value @@ -1242,7 +1249,7 @@ void jaguarcd_state::butch_regs_w(offs_t offset, uint32_t data, uint32_t mem_mas return; } - msf = m_cd_file->get_track_start(0) + 150; + uint32_t msf = m_cd_file->get_track_start(0) + 150; /* first track number */ m_butch_cmd_response[0] = 0x2000 | 1; @@ -1259,45 +1266,57 @@ void jaguarcd_state::butch_regs_w(offs_t offset, uint32_t data, uint32_t mem_mas m_butch_cmd_index = 0; m_butch_cmd_size = 5; break; + } + case 0x14: // Read Long TOC + { + if(!m_cd_file) // No disc { - uint32_t msf; - int ntrks = m_cd_file->get_last_track(); - - for(int i=0;iget_track_start(i) + 150; - - /* track number */ - m_butch_cmd_response[i*5+0] = 0x6000 | (i+1); - /* attributes (?) */ - m_butch_cmd_response[i*5+1] = 0x6100 | 0x00; - - /* start of track minutes */ - m_butch_cmd_response[i*5+2] = 0x6200 | ((msf / 60) / 60); - /* start of track seconds */ - m_butch_cmd_response[i*5+3] = 0x6300 | (msf / 60) % 60; - /* start of track frame */ - m_butch_cmd_response[i*5+4] = 0x6400 | (msf % 75); - } + m_butch_cmd_response[0] = 0x400; m_butch_regs[0] |= 0x2000; m_butch_cmd_index = 0; - m_butch_cmd_size = 5*ntrks; + m_butch_cmd_size = 1; + return; } + int ntrks = m_cd_file->get_last_track(); + + for(int i=0;iget_track_start(i) + 150; + + /* track number */ + m_butch_cmd_response[i*5+0] = 0x6000 | (i+1); + /* attributes (?) */ + m_butch_cmd_response[i*5+1] = 0x6100 | 0x00; + + /* start of track minutes */ + m_butch_cmd_response[i*5+2] = 0x6200 | ((msf / 60) / 60); + /* start of track seconds */ + m_butch_cmd_response[i*5+3] = 0x6300 | (msf / 60) % 60; + /* start of track frame */ + m_butch_cmd_response[i*5+4] = 0x6400 | (msf % 75); + } + m_butch_regs[0] |= 0x2000; + m_butch_cmd_index = 0; + m_butch_cmd_size = 5*ntrks; break; + } + case 0x15: // Set Mode m_butch_regs[0] |= 0x2000; m_butch_cmd_response[0] = 0x1700 | (m_butch_regs[offset] & 0xff); m_butch_cmd_index = 0; m_butch_cmd_size = 1; break; + case 0x70: // Set DAC Mode m_butch_regs[0] |= 0x2000; m_butch_cmd_response[0] = 0x7000 | (m_butch_regs[offset] & 0xff); m_butch_cmd_index = 0; m_butch_cmd_size = 1; break; + default: printf("%04x CMD\n",m_butch_regs[offset]); break; -- cgit v1.2.3 From 11daee9c803d3c4f00dd67393f28fc25d7a663ad Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 26 Apr 2022 15:10:29 +0200 Subject: cat702: init 2 more variables --- src/mame/machine/cat702.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mame/machine/cat702.cpp b/src/mame/machine/cat702.cpp index 26f135718de..38c51950e6f 100644 --- a/src/mame/machine/cat702.cpp +++ b/src/mame/machine/cat702.cpp @@ -95,6 +95,8 @@ cat702_device::cat702_device(const machine_config &mconfig, const char *tag, dev m_select(1), m_clock(1), m_datain(1), + m_state(0), + m_bit(0), m_dataout_handler(*this) { } -- cgit v1.2.3 From 26ba4a362e3ad433ad34b996d2b32d7cddc03e3c Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Tue, 26 Apr 2022 19:13:55 +0200 Subject: Init cleanups and gnet fix --- src/devices/cpu/mn10200/mn10200.cpp | 11 +++++++++++ src/devices/cpu/psx/psx.cpp | 4 ++++ src/devices/machine/ataflash.cpp | 2 +- src/mame/machine/cat702.cpp | 2 ++ 4 files changed, 18 insertions(+), 1 deletion(-) diff --git a/src/devices/cpu/mn10200/mn10200.cpp b/src/devices/cpu/mn10200/mn10200.cpp index 17c45aa0cc1..0dcc3aef4ec 100644 --- a/src/devices/cpu/mn10200/mn10200.cpp +++ b/src/devices/cpu/mn10200/mn10200.cpp @@ -225,6 +225,17 @@ void mn10200_device::device_start() save_item(NAME(m_port[i].dir), i); } + // registering reads the value, so clear it before + m_pc = 0; + m_mdr = 0; + m_nmicr = 0; + m_iagr = 0; + for (int i=0; i != 4; i++) + { + m_d[i] = 0; + m_a[i] = 0; + } + // register for debugger state_add( MN10200_PC, "PC", m_pc ).mask(0xffffff).formatstr("%06X"); state_add( MN10200_MDR, "MDR", m_mdr).formatstr("%04X"); diff --git a/src/devices/cpu/psx/psx.cpp b/src/devices/cpu/psx/psx.cpp index 88c1e61aad9..7e1ce6bd6a0 100644 --- a/src/devices/cpu/psx/psx.cpp +++ b/src/devices/cpu/psx/psx.cpp @@ -1982,6 +1982,10 @@ void psxcpu_device::device_start() state_add( PSXCPU_CP2CR30, "zsf4", m_gte.m_cp2cr[ 30 ].d ); state_add( PSXCPU_CP2CR31, "flag", m_gte.m_cp2cr[ 31 ].d ); + // initialize the registers once + for(int i=0; i != 32; i++) + m_r[i] = 0; + // set our instruction counter set_icountptr(m_icount); diff --git a/src/devices/machine/ataflash.cpp b/src/devices/machine/ataflash.cpp index d1fb49054d9..892031e2052 100644 --- a/src/devices/machine/ataflash.cpp +++ b/src/devices/machine/ataflash.cpp @@ -160,7 +160,7 @@ void taito_pccard1_device::write_reg(offs_t offset, uint16_t data, uint16_t mem_ { uint8_t v = data; int pos = offset - 0x280; - uint8_t k = pos < sizeof(m_key) ? m_key[pos] : 0; + uint8_t k = pos < m_key.size() ? m_key[pos] : 0; // TODO: find out if unlocking the key then using an incorrect key will re-lock the card. if (v == k) diff --git a/src/mame/machine/cat702.cpp b/src/mame/machine/cat702.cpp index 38c51950e6f..a9b586ab06c 100644 --- a/src/mame/machine/cat702.cpp +++ b/src/mame/machine/cat702.cpp @@ -121,6 +121,8 @@ void cat702_device::device_start() m_dataout_handler.resolve_safe(); save_item(NAME(m_select)); + save_item(NAME(m_clock)); + save_item(NAME(m_datain)); save_item(NAME(m_state)); save_item(NAME(m_bit)); -- cgit v1.2.3 From 8afcaaec3daf4f9c51868da1d6bf38a86ea12773 Mon Sep 17 00:00:00 2001 From: MooglyGuy Date: Tue, 26 Apr 2022 14:53:54 +0200 Subject: Addressed performance loss from recent z80scc changes (#9629) [Ryan Holtz] z80scc: Removed unused Z80SCC_USE_LOCAL_BRG and simplified WR15_ZEROCOUNT usage to reduce the likelihood of needless timer activation. mips3drc: Additional micro-optimizations to generate_checksum_block. --- src/devices/cpu/mips/mips3drc.cpp | 25 +++++----- src/devices/machine/z80scc.cpp | 99 ++++++++------------------------------- src/devices/machine/z80scc.h | 17 +------ 3 files changed, 35 insertions(+), 106 deletions(-) diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp index db5faef8a97..9390c39cbc6 100644 --- a/src/devices/cpu/mips/mips3drc.cpp +++ b/src/devices/cpu/mips/mips3drc.cpp @@ -1164,14 +1164,15 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & uint32_t sum = 0; const void *base = m_prptr(seqhead->physpc); const uint32_t data_bits_mask = (m_data_bits == 64 ? 4 : 0); + const uint32_t last_physpc = codelast->physpc; uint32_t low_bits = (seqhead->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I0, base, low_bits, SIZE_DWORD, SCALE_x1); // load i0,base,0,dword sum += seqhead->opptr.l[0]; - if ((m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK) && !(codelast->flags & OPFLAG_VIRTUAL_NOOP) && codelast->physpc != seqhead->physpc) + if ((m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK) && !(codelast->flags & OPFLAG_VIRTUAL_NOOP) && last_physpc != seqhead->physpc) { - base = m_prptr(codelast->physpc); + base = m_prptr(last_physpc); assert(base != nullptr); - low_bits = (codelast->physpc & data_bits_mask) ^ m_dword_xor; + low_bits = (last_physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 sum += codelast->opptr.l[0]; @@ -1210,11 +1211,11 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) { // Skip the last if it was already included above - if (curdesc->physpc != codelast->physpc) + if (curdesc->physpc != last_physpc) { base = m_prptr(curdesc->physpc); assert(base != nullptr); - low_bits = (curdesc->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + low_bits = (curdesc->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 sum += curdesc->opptr.l[0]; @@ -1226,7 +1227,7 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & { base = m_prptr(curdesc->delay.first()->physpc); assert(base != nullptr); - low_bits = (curdesc->delay.first()->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + low_bits = (curdesc->delay.first()->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 sum += curdesc->delay.first()->opptr.l[0]; @@ -1243,11 +1244,11 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & uml::code_label check_failed = compiler.labelnum++; uml::code_label check_passed = compiler.labelnum++; // Check the last instruction - if (!(codelast->flags & OPFLAG_VIRTUAL_NOOP) && codelast->physpc != seqhead->physpc) + if (!(codelast->flags & OPFLAG_VIRTUAL_NOOP) && last_physpc != seqhead->physpc) { - base = m_prptr(codelast->physpc); + base = m_prptr(last_physpc); assert(base != nullptr); - low_bits = (codelast->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; + low_bits = (last_physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; UML_LOAD(block, I0, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword sum = codelast->opptr.l[0]; UML_CMP(block, I0, sum); // cmp i0,sum @@ -1255,7 +1256,7 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & static const char text[] = "Last instr validation fail seq: %08X end: %08x\n"; UML_DMOV(block, mem(&m_core->format), (uintptr_t)text); // mov [format],text UML_MOV(block, mem(&m_core->arg0), seqhead->pc); - UML_MOV(block, mem(&m_core->arg1), codelast->physpc); // mov [arg0],desc->pc + UML_MOV(block, mem(&m_core->arg1), last_physpc); // mov [arg0],desc->pc UML_CALLC(block, cfunc_printf_debug, this); // callc printf_debug //UML_CALLC(block, cfunc_debug_break, this); // Skip delay slot check @@ -1263,7 +1264,7 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & // Check the last instruction delay slot UML_LABEL(block, check_second); if (codelast->delay.first() != nullptr && !(codelast->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) - && codelast->physpc != seqhead->physpc) + && last_physpc != seqhead->physpc) { base = m_prptr(codelast->delay.first()->physpc); assert(base != nullptr); @@ -1275,7 +1276,7 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & static const char text[] = "Last delay slot validation fail seq: %08X end: %08x\n"; UML_DMOV(block, mem(&m_core->format), (uintptr_t)text); // mov [format],text UML_MOV(block, mem(&m_core->arg0), seqhead->pc); - UML_MOV(block, mem(&m_core->arg1), codelast->physpc); // mov [arg0],desc->pc + UML_MOV(block, mem(&m_core->arg1), last_physpc); // mov [arg0],desc->pc UML_CALLC(block, cfunc_printf_debug, this); // callc printf_debug //UML_CALLC(block, cfunc_debug_break, this); UML_JMP(block, check_failed); diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp index c363357f551..d82ebd1bf91 100644 --- a/src/devices/machine/z80scc.cpp +++ b/src/devices/machine/z80scc.cpp @@ -136,14 +136,8 @@ baud rate: #define FUNCNAME __PRETTY_FUNCTION__ #endif -/* LOCAL _BRG is set in z80scc.h, local timer based BRG is not complete and will be removed if not needed for synchrounous mode */ -#if Z80SCC_USE_LOCAL_BRG -#define START_BIT_HUNT 1 -#define START_BIT_ADJUST 1 -#else #define START_BIT_HUNT 0 #define START_BIT_ADJUST 0 -#endif #define CHANA_TAG "cha" #define CHANB_TAG "chb" @@ -1078,8 +1072,7 @@ void z80scc_channel::device_start() m_rxc = 0x00; m_txc = 0x00; - // baudrate clocks and timers - m_baudtimer = timer_alloc(TIMER_ID_BAUD); + m_baudtimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z80scc_channel::brg_tick), this)); // state saving save_item(NAME(m_rr0)); @@ -1192,33 +1185,10 @@ void z80scc_channel::device_reset() m_brg_counter = 0; } -void z80scc_channel::device_timer(emu_timer &timer, device_timer_id id, int param) +TIMER_CALLBACK_MEMBER(z80scc_channel::brg_tick) { -// LOG("%s %d\n", FUNCNAME, id); - - - switch(id) - { - case TIMER_ID_BAUD: - { - if (m_wr14 & WR14_BRG_ENABLE) - { -#if Z80SCC_USE_LOCAL_BRG - txc_w(m_brg_counter & 1); - rxc_w(m_brg_counter & 1); -#endif - m_brg_counter++; // Will just keep track of state in timer mode, not hardware counter value. - - if (m_wr15 & WR15_ZEROCOUNT) - m_uart->trigger_interrupt(m_index, INT_EXTERNAL); - } - update_baudtimer(); - } - break; - default: - logerror("Spurious timer %d event\n", id); - break; - } + // wr15 & WR15_ZEROCOUNT is implied by this timer being running at all + m_uart->trigger_interrupt(m_index, INT_EXTERNAL); } @@ -1619,14 +1589,6 @@ uint8_t z80scc_channel::do_sccreg_rr7() return m_rr3; } -#if 0 // Short cutted in control_read() -/* RR8 is the Receive Data register. */ -uint8_t z80scc_channel::do_sccreg_rr8() -{ - return data_read(): -} -#endif - /* (ESCC and 85C30 Only) On the ESCC, Read Register 9 reflects the contents of Write Register 3 provided the Extended Read option has been enabled. On the NMOS/CMOS version, a read to this location returns an image @@ -2290,14 +2252,6 @@ void z80scc_channel::do_sccreg_wr14(uint8_t data) { brg_change = true; LOG("%s: Misc Control Bits Baudrate generator enabled with %s source\n", FUNCNAME, (data & WR14_BRG_SOURCE) ? "PCLK" : "external clock"); - if (data & WR14_BRG_SOURCE) // Do we use the PCLK as baudrate source - { -#if Z80SCC_USE_LOCAL_BRG -#if START_BIT_HUNT - m_rcv_mode = RCV_SEEKING; -#endif -#endif - } } else if ( (m_wr14 & WR14_BRG_ENABLE) && !(data & WR14_BRG_ENABLE) ) // baud rate generator being disabled? { @@ -2332,7 +2286,13 @@ void z80scc_channel::do_sccreg_wr15(uint8_t data) LOG("CTS ints : %s\n", data & WR15_CTS ? WR15EN : "disabled"); LOG("Tx underr./EOM ints: %s\n", data & WR15_TX_EOM ? WR15NO : "disabled"); LOG("Break/Abort ints : %s\n", data & WR15_BREAK_ABORT ? WR15NO : "disabled"); + + const bool old_reg = m_wr15; m_wr15 = data; + if ((old_reg & WR15_ZEROCOUNT) != (m_wr15 & WR15_ZEROCOUNT)) + { + update_baudtimer(); + } } void z80scc_channel::scc_register_write(uint8_t reg, uint8_t data) @@ -2773,34 +2733,7 @@ void z80scc_channel::sync_w(int state) //------------------------------------------------- void z80scc_channel::rxc_w(int state) { -/* Support for external clock as source for BRG yet to be finished */ -#if 0 - //LOG("Receiver Clock Pulse\n"); - if ( ((m_wr3 & WR3_RX_ENABLE) | (m_wr5 & WR5_TX_ENABLE)) && m_wr14 & WR14_BRG_ENABLE) - { - if (!(m_wr14 & WR14_BRG_SOURCE)) // Is the Baud rate Generator driven by RTxC? - { - printf("x"); - if (!m_brg_counter) // Zero crossing?! - { - printf("."); - m_brg_counter = m_wr13 << 8 | m_wr12; // Reload BRG counter - if ((m_wr11 & WR11_TRACLK_SRC_MASK) == WR11_TRACLK_SRC_BR) // Is transmitt clock driven by BRG? - { - printf("+"); - txc_w(state); - } - } - else - { - m_brg_counter--; - if ((m_wr11 & WR11_RCVCLK_SRC_MASK) == WR11_RCVCLK_SRC_BR) // Is receive clock driven by BRG and not zero cross - return; - } - } - } -#endif - + /* Support for external clock as source for BRG has not been added */ if (m_wr3 & WR3_RX_ENABLE) { int clocks = get_clock_mode(); @@ -2904,7 +2837,15 @@ void z80scc_channel::update_baudtimer() unsigned int source = (m_index == z80scc_device::CHANNEL_A) ? m_uart->m_rxca : m_uart->m_rxcb; rate = source / (brg_const == 0 ? 1 : brg_const); } - m_baudtimer->adjust(attotime::from_hz(rate)); + + if (m_wr15 & WR15_ZEROCOUNT) + { + m_baudtimer->adjust(attotime::from_hz(rate), 0, attotime::from_hz(rate)); + } + else + { + m_baudtimer->adjust(attotime::never); + } } else { diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h index 31a80aa69b7..a993d831ce0 100644 --- a/src/devices/machine/z80scc.h +++ b/src/devices/machine/z80scc.h @@ -38,12 +38,6 @@ #include "machine/z80daisy.h" #include "diserial.h" -//************************************************************************** -// DEVICE CONFIGURATION MACROS -//************************************************************************** - -#define Z80SCC_USE_LOCAL_BRG 0 - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -64,7 +58,6 @@ public: // device-level overrides virtual void device_start() override; virtual void device_reset() override; - virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override; // device_serial_interface overrides virtual void tra_callback() override; @@ -129,6 +122,8 @@ public: void txc_w(int state); void sync_w(int state); + TIMER_CALLBACK_MEMBER(brg_tick); + int m_rxc; int m_txc; @@ -237,14 +232,6 @@ protected: REG_WR15_EXT_ST_INT_CTRL= 15 }; - enum - { - TIMER_ID_BAUD, - TIMER_ID_XTAL, - TIMER_ID_RTXC, - TIMER_ID_TRXC - }; - emu_timer *m_baudtimer; uint16_t m_brg_counter; unsigned int m_brg_rate; -- cgit v1.2.3 From 0ca2ad5affaf3682baea6f15264aba945e8774e7 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 27 Apr 2022 22:50:09 +1000 Subject: Fixed crashes on start in ZX Spectrum clones and NWK-TR games. --- src/mame/drivers/nwk-tr.cpp | 12 ++++++++---- src/mame/includes/spectrum.h | 3 ++- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/src/mame/drivers/nwk-tr.cpp b/src/mame/drivers/nwk-tr.cpp index 006e69c1bbb..109258a358a 100644 --- a/src/mame/drivers/nwk-tr.cpp +++ b/src/mame/drivers/nwk-tr.cpp @@ -291,8 +291,8 @@ namespace { class nwktr_state : public driver_device { public: - nwktr_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + nwktr_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_work_ram(*this, "work_ram"), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), @@ -345,6 +345,8 @@ private: memory_view m_cg_view; emu_timer *m_sound_irq_timer; + bool m_exrgb; + void paletteram32_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint8_t sysreg_r(offs_t offset); void sysreg_w(offs_t offset, uint8_t data); @@ -352,8 +354,6 @@ private: void soundtimer_count_w(uint16_t data); double adc12138_input_callback(uint8_t input); - bool m_exrgb; - TIMER_CALLBACK_MEMBER(sound_irq); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -508,6 +508,10 @@ void nwktr_state::machine_start() m_maincpu->ppcdrc_add_fastram(0x00000000, 0x003fffff, false, m_work_ram); m_sound_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(nwktr_state::sound_irq), this)); + + m_exrgb = false; + + save_item(NAME(m_exrgb)); } void nwktr_state::ppc_map(address_map &map) diff --git a/src/mame/includes/spectrum.h b/src/mame/includes/spectrum.h index 5a52ae6e713..c392c32e4e1 100644 --- a/src/mame/includes/spectrum.h +++ b/src/mame/includes/spectrum.h @@ -52,6 +52,7 @@ public: spectrum_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_video_ram(*this, "video_ram"), + m_scanline_timer(nullptr), m_maincpu(*this, "maincpu"), m_screen(*this, "screen"), m_cassette(*this, "cassette"), @@ -113,7 +114,7 @@ protected: optional_shared_ptr m_video_ram; uint8_t *m_screen_location; - int m_ROMSelection; + int m_ROMSelection = 0; // FIXME: this is used for various things in derived classes, but not by this base class, and should be removed // Build up the screen bitmap line-by-line as the z80 uses CPU cycles. // Eliminates sprite flicker on various games (E.g. Marauder and -- cgit v1.2.3 From 21d3bab8921c84f5114456690db371482a96739e Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 24 Apr 2022 12:44:37 +0200 Subject: iwm: Do a complete clock change on sync write for better flux change time precision iwm: Increate the flux write buffer size for better performance (complete sector write in a single call) 2gs: Correct the q3 clock value, making (sync) writes reliable --- src/devices/machine/iwm.cpp | 66 ++++++++++++++++++++++--------------------- src/devices/machine/iwm.h | 8 +++--- src/mame/drivers/apple2gs.cpp | 2 +- 3 files changed, 39 insertions(+), 37 deletions(-) diff --git a/src/devices/machine/iwm.cpp b/src/devices/machine/iwm.cpp index 49e69aee2b2..331305dab4f 100644 --- a/src/devices/machine/iwm.cpp +++ b/src/devices/machine/iwm.cpp @@ -30,16 +30,6 @@ iwm_device::iwm_device(const machine_config &mconfig, const char *tag, device_t m_fclk_q3_ratio = q3_clock ? double(q3_clock)/double(clock) : 0; // ~4 } -u64 iwm_device::q3_to_fclk(u64 cycles) const -{ - return u64(m_q3_fclk_ratio * double(cycles) + 0.5); -} - -u64 iwm_device::fclk_to_q3(u64 cycles) const -{ - return u64(m_fclk_q3_ratio * double(cycles) + 0.5); -} - void iwm_device::device_start() { applefdintf_device::device_start(); @@ -53,6 +43,7 @@ void iwm_device::device_start() save_item(NAME(m_flux_write)); save_item(NAME(m_flux_write_count)); save_item(NAME(m_q3_clock)); + save_item(NAME(m_q3_clock_active)); save_item(NAME(m_active)); save_item(NAME(m_rw)); save_item(NAME(m_rw_state)); @@ -88,6 +79,7 @@ void iwm_device::device_reset() m_rw_bit_count = 0; m_devsel = 0; m_devsel_cb(0); + m_q3_clock_active = false; } void iwm_device::device_timer(emu_timer &, device_timer_id, int) @@ -199,7 +191,7 @@ u8 iwm_device::control(int offset, u8 data) if(m_rw != MODE_READ) { if(m_rw == MODE_WRITE) { flush_write(); - m_flux_write_start = 0; + write_clock_stop(); } m_rw = MODE_READ; m_rw_state = S_IDLE; @@ -215,8 +207,7 @@ u8 iwm_device::control(int offset, u8 data) m_rw_state = S_IDLE; m_whd |= 0x40; m_next_state_change = 0; - m_flux_write_start = m_last_sync; - m_flux_write_count = 0; + write_clock_start(); if(m_floppy) m_floppy->set_write_splice(cycles_to_time(m_flux_write_start)); } @@ -225,7 +216,7 @@ u8 iwm_device::control(int offset, u8 data) if(m_active == MODE_ACTIVE) { flush_write(); if(m_mode & 0x04) { - m_flux_write_start = 0; + write_clock_stop(); m_active = MODE_IDLE; m_rw = MODE_IDLE; m_rw_state = S_IDLE; @@ -318,12 +309,12 @@ void iwm_device::data_w(u8 data) u64 iwm_device::time_to_cycles(const attotime &tm) const { - return tm.as_ticks(clock()); + return tm.as_ticks(m_q3_clock_active ? m_q3_clock : clock()); } attotime iwm_device::cycles_to_time(u64 cycles) const { - return attotime::from_ticks(cycles, clock()); + return attotime::from_ticks(cycles, m_q3_clock_active ? m_q3_clock : clock()); } bool iwm_device::is_sync() const @@ -333,6 +324,9 @@ bool iwm_device::is_sync() const u64 iwm_device::half_window_size() const { + if(m_q3_clock_active) + return m_mode & 0x08 ? 2 : 4; + switch(m_mode & 0x18) { case 0x00: return 14; case 0x08: return 7; @@ -344,6 +338,9 @@ u64 iwm_device::half_window_size() const u64 iwm_device::window_size() const { + if(m_q3_clock_active) + return m_mode & 0x08 ? 4 : 8; + switch(m_mode & 0x18) { case 0x00: return 28; case 0x08: return 14; @@ -358,9 +355,23 @@ u64 iwm_device::read_register_update_delay() const return m_mode & 0x08 ? 4 : 8; } -u64 iwm_device::write_sync_half_window_size() const +void iwm_device::write_clock_start() { - return m_mode & 0x08 ? 2 : 4; + if(is_sync() && m_q3_clock) { + m_q3_clock_active = true; + m_last_sync = machine().time().as_ticks(m_q3_clock); + } + m_flux_write_start = m_last_sync; + m_flux_write_count = 0; +} + +void iwm_device::write_clock_stop() +{ + if(m_q3_clock_active) { + m_q3_clock_active = false; + m_last_sync = machine().time().as_ticks(clock()); + } + m_flux_write_start = 0; } void iwm_device::sync() @@ -368,7 +379,7 @@ void iwm_device::sync() if(!m_active) return; - u64 next_sync = machine().time().as_ticks(clock()); + u64 next_sync = machine().time().as_ticks(m_q3_clock_active ? m_q3_clock : clock()); switch(m_rw) { case MODE_IDLE: m_last_sync = next_sync; @@ -463,10 +474,7 @@ void iwm_device::sync() } else { m_wsh = m_data; m_rw_state = SW_WINDOW_MIDDLE; - if(m_q3_clock) - m_next_state_change = q3_to_fclk(fclk_to_q3(m_last_sync) + write_sync_half_window_size()); - else - m_next_state_change = m_last_sync + half_window_size(); + m_next_state_change = m_last_sync + half_window_size(); } break; @@ -474,7 +482,7 @@ void iwm_device::sync() if(m_whd & 0x80) { logerror("underrun\n"); flush_write(next_sync); - m_flux_write_start = 0; + write_clock_stop(); m_whd &= ~0x40; m_last_sync = next_sync; m_rw_state = SW_UNDERRUN; @@ -492,10 +500,7 @@ void iwm_device::sync() m_flux_write[m_flux_write_count++] = m_last_sync; m_wsh <<= 1; m_rw_state = SW_WINDOW_END; - if((m_mode & 0x02) || !m_q3_clock) - m_next_state_change = m_last_sync + half_window_size(); - else - m_next_state_change = q3_to_fclk(fclk_to_q3(m_last_sync) + write_sync_half_window_size()); + m_next_state_change = m_last_sync + half_window_size(); break; case SW_WINDOW_END: @@ -512,10 +517,7 @@ void iwm_device::sync() m_next_state_change = m_last_sync + half_window_size(); } } else { - if(m_q3_clock) - m_next_state_change = q3_to_fclk(fclk_to_q3(m_last_sync) + write_sync_half_window_size()); - else - m_next_state_change = m_last_sync + half_window_size(); + m_next_state_change = m_last_sync + half_window_size(); m_rw_state = SW_WINDOW_MIDDLE; } break; diff --git a/src/devices/machine/iwm.h b/src/devices/machine/iwm.h index 5bae4443791..c4f13c09e6d 100644 --- a/src/devices/machine/iwm.h +++ b/src/devices/machine/iwm.h @@ -62,19 +62,18 @@ private: double m_q3_fclk_ratio, m_fclk_q3_ratio; u64 m_last_sync, m_next_state_change, m_sync_update, m_async_update; u64 m_flux_write_start; - std::array m_flux_write; + std::array m_flux_write; u32 m_flux_write_count; u32 m_q3_clock; int m_active, m_rw, m_rw_state; u8 m_data, m_whd, m_mode, m_status, m_control, m_rw_bit_count; u8 m_rsh, m_wsh; u8 m_devsel; + bool m_q3_clock_active; u8 control(int offset, u8 data); u64 time_to_cycles(const attotime &tm) const; attotime cycles_to_time(u64 cycles) const; - u64 fclk_to_q3(u64 cycles) const; - u64 q3_to_fclk(u64 cycles) const; void mode_w(u8 data); void data_w(u8 data); @@ -82,9 +81,10 @@ private: u64 window_size() const; u64 half_window_size() const; u64 read_register_update_delay() const; - u64 write_sync_half_window_size() const; inline bool is_sync() const; void flush_write(u64 when = 0); + void write_clock_start(); + void write_clock_stop(); }; DECLARE_DEVICE_TYPE(IWM, iwm_device) diff --git a/src/mame/drivers/apple2gs.cpp b/src/mame/drivers/apple2gs.cpp index b439a2c2d4b..5786a89cb09 100644 --- a/src/mame/drivers/apple2gs.cpp +++ b/src/mame/drivers/apple2gs.cpp @@ -4808,7 +4808,7 @@ void apple2gs_state::apple2gs(machine_config &config) A2BUS_SLOT(config, "sl6", m_a2bus, apple2gs_cards, nullptr); A2BUS_SLOT(config, "sl7", m_a2bus, apple2gs_cards, nullptr); - IWM(config, m_iwm, A2GS_7M, 1021800*2); + IWM(config, m_iwm, A2GS_7M, A2GS_MASTER_CLOCK/14); m_iwm->phases_cb().set(FUNC(apple2gs_state::phases_w)); m_iwm->sel35_cb().set(FUNC(apple2gs_state::sel35_w)); m_iwm->devsel_cb().set(FUNC(apple2gs_state::devsel_w)); -- cgit v1.2.3