From 49297f7ea349c03bd80a0704dc88afdf85335826 Mon Sep 17 00:00:00 2001 From: mamehaze Date: Wed, 3 Dec 2014 11:16:38 +0000 Subject: (nw) --- src/emu/cpu/arc/arcdasm.c | 92 ++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 88 insertions(+), 4 deletions(-) diff --git a/src/emu/cpu/arc/arcdasm.c b/src/emu/cpu/arc/arcdasm.c index 27bcf5f54dc..d15f77672c2 100644 --- a/src/emu/cpu/arc/arcdasm.c +++ b/src/emu/cpu/arc/arcdasm.c @@ -31,7 +31,7 @@ static const char *basic[0x20] = /* 02 */ "ST r+o", /* 03 */ "extended", /* 04 */ "B", - /* 05 */ "BLcc", + /* 05 */ "BL", /* 06 */ "LPcc", /* 07 */ "Jcc JLcc", /* 08 */ "ADD", @@ -104,13 +104,90 @@ static const char *delaytype[0x4] = "Res!", // reserved / invalid }; +static const char *regnames[0x40] = +{ + /* 0x00 */ "r00", + /* 0x01 */ "r01", + /* 0x02 */ "r02", + /* 0x03 */ "r03", + /* 0x04 */ "r04", + /* 0x05 */ "r05", + /* 0x06 */ "r06", + /* 0x07 */ "r07", + /* 0x08 */ "r08", + /* 0x09 */ "r09", + /* 0x0a */ "r10", + /* 0x0b */ "r11", + /* 0x0c */ "r12", + /* 0x0d */ "r13", + /* 0x0e */ "r14", + /* 0x0f */ "r15", + + /* 0x10 */ "r16", + /* 0x11 */ "r17", + /* 0x12 */ "r18", + /* 0x13 */ "r19", + /* 0x14 */ "r20", + /* 0x15 */ "r21", + /* 0x16 */ "r22", + /* 0x17 */ "r23", + /* 0x18 */ "r24", + /* 0x19 */ "r25", + /* 0x1a */ "r26", + /* 0x1b */ "r27", + /* 0x1c */ "r28", + /* 0x1d */ "ILINK1", + /* 0x1e */ "ILINK2", + /* 0x1f */ "BLINK", + + /* 0x20 */ "r32res", // reserved for manufacturer specific extensions + /* 0x21 */ "r33res", + /* 0x22 */ "r34res", + /* 0x23 */ "r35res", + /* 0x24 */ "r36res", + /* 0x25 */ "r37res", + /* 0x26 */ "r38res", + /* 0x27 */ "r39res", + /* 0x28 */ "r40res", + /* 0x29 */ "r41res", + /* 0x2a */ "r42res", + /* 0x2b */ "r43res", + /* 0x2c */ "r44res", + /* 0x2d */ "r45res", + /* 0x2e */ "r46res", + /* 0x2f */ "r47res", + + /* 0x30 */ "r48res", + /* 0x31 */ "r49res", + /* 0x32 */ "r50res", + /* 0x33 */ "r51res", + /* 0x34 */ "r52res", + /* 0x35 */ "r53res", + /* 0x36 */ "r54res", + /* 0x37 */ "r55res", + /* 0x38 */ "r56res", + /* 0x39 */ "r57res", + /* 0x3a */ "r58res", + /* 0x3b */ "r59res", + /* 0x3c */ "LPCOUNT", + /* 0x3d */ "sImm F", + /* 0x3e */ "lImm", + /* 0x3f */ "sImm NF", +}; + #define ARC_CONDITION ((op & 0x0000001f) >> 0 ) // used in jumps -#define ARC_BRANCH_DELAY ((op & 0x00000060) >> 5 ) // aka NN +#define ARC_BRANCH_DELAY ((op & 0x00000060) >> 5 ) // aka N #define ARC_BRANCH_ADDR ((op & 0x07ffff80) >> 7 ) // aka L -#define ARC_OPERATION ((op & 0xf8000000) >> 27) // aka QQQQQ +#define ARC_OPERATION ((op & 0xf8000000) >> 27) // aka Q + +#define ARC_REGOP_DEST ((op & 0x07e00000) >> 21 ) // aka A +#define ARC_REGOP_OP1 ((op & 0x001f8000) >> 15 ) // aka B +#define ARC_REGOP_OP2 ((op & 0x00007e00) >> 9 ) // aka C +#define ARC_REGOP_SHIMM ((op & 0x000001ff) >> 0 ) // aka D + CPU_DISASSEMBLE(arc) { @@ -123,10 +200,17 @@ CPU_DISASSEMBLE(arc) switch (opcode) { - case 0x04: + case 0x04: // B + case 0x05: // BL print("%s(%s)(%s) %08x", basic[opcode], conditions[ARC_CONDITION], delaytype[ARC_BRANCH_DELAY], (ARC_BRANCH_ADDR<<2)+pc+4); break; + case 0x08: // ADD + // todo, short / long immediate formats + print("%s %s , %s , %s (%08x)", basic[opcode], regnames[ARC_REGOP_DEST], regnames[ARC_REGOP_OP1], regnames[ARC_REGOP_OP2], op &~ 0xfffffe00); + break; + + default: print("%s (%08x)", basic[opcode], op &~ 0xf8000000); break; -- cgit v1.2.3