From 4486f7567c0f53bfdd87f2cc5081a039b7b842cc Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 6 Oct 2018 17:22:52 +0200 Subject: namcos22: fix system22 coin handling (nw) --- src/mame/drivers/namcos22.cpp | 101 ++++++++++++++---------------------------- src/mame/includes/namcos22.h | 22 ++++----- src/mame/video/namcos22.cpp | 2 +- 3 files changed, 44 insertions(+), 81 deletions(-) diff --git a/src/mame/drivers/namcos22.cpp b/src/mame/drivers/namcos22.cpp index 8712685ce29..28382747eab 100644 --- a/src/mame/drivers/namcos22.cpp +++ b/src/mame/drivers/namcos22.cpp @@ -1580,6 +1580,17 @@ READ8_MEMBER(namcos22_state::namcos22_system_controller_r) } +READ16_MEMBER(namcos22_state::namcos22_shared_r) +{ + return m_shareram[offset]; +} + +WRITE16_MEMBER(namcos22_state::namcos22_shared_w) +{ + COMBINE_DATA(&m_shareram[offset]); +} + + READ32_MEMBER(namcos22_state::namcos22_dspram_r) { return m_polygonram[offset] | 0xff000000; // only d0-23 are connected @@ -1865,7 +1876,7 @@ void namcos22_state::namcos22_am(address_map &map) * +0x0300 - 0x03ff? Song Title (put messages here from Sound CPU) */ map(0x60000000, 0x60003fff).nopw(); - map(0x60004000, 0x6000bfff).ram().share("shareram"); + map(0x60004000, 0x6000bfff).rw(FUNC(namcos22_state::namcos22_shared_r), FUNC(namcos22_state::namcos22_shared_w)); /** * C71 (TI TMS320C25 DSP) Shared RAM (0x70000000 - 0x70020000) @@ -1954,7 +1965,7 @@ void namcos22_state::namcos22s_am(address_map &map) map(0x900000, 0x90ffff).ram().share("vics_data"); map(0x940000, 0x94007f).rw(FUNC(namcos22_state::namcos22s_vics_control_r), FUNC(namcos22_state::namcos22s_vics_control_w)).share("vics_control"); map(0x980000, 0x9affff).ram().share("spriteram"); // C374 - map(0xa04000, 0xa0bfff).ram().share("shareram"); // COM RAM + map(0xa04000, 0xa0bfff).rw(FUNC(namcos22_state::namcos22_shared_r), FUNC(namcos22_state::namcos22_shared_w)); // COM RAM map(0xc00000, 0xc1ffff).rw(FUNC(namcos22_state::namcos22_dspram_r), FUNC(namcos22_state::namcos22_dspram_w)).share("polygonram"); map(0xe00000, 0xe3ffff).ram(); // workram } @@ -2298,16 +2309,6 @@ READ16_MEMBER(namcos22_state::pdp_begin_r) return 0; } -READ16_MEMBER(namcos22_state::slave_external_ram_r) -{ - return m_pSlaveExternalRAM[offset]; -} - -WRITE16_MEMBER(namcos22_state::slave_external_ram_w) -{ - COMBINE_DATA(&m_pSlaveExternalRAM[offset]); -} - READ16_MEMBER(namcos22_state::dsp_hold_signal_r) { /* STUB */ @@ -2388,7 +2389,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) break; case NAMCOS22_DSP_UPLOAD_DATA: - m_pSlaveExternalRAM[m_UploadDestIdx & 0x1fff] = data; + m_slave_extram[m_UploadDestIdx & 0x1fff] = data; m_UploadDestIdx++; break; @@ -2415,16 +2416,6 @@ READ16_MEMBER(namcos22_state::dsp_upload_status_r) return 0x0000; } -READ16_MEMBER(namcos22_state::master_external_ram_r) -{ - return m_pMasterExternalRAM[offset]; -} - -WRITE16_MEMBER(namcos22_state::master_external_ram_w) -{ - COMBINE_DATA(&m_pMasterExternalRAM[offset]); -} - WRITE16_MEMBER(namcos22_state::slave_serial_io_w) { m_SerialDataSlaveToMasterNext = data; @@ -2527,7 +2518,7 @@ void namcos22_state::master_dsp_program(address_map &map) void namcos22_state::master_dsp_data(address_map &map) { map(0x1000, 0x3fff).ram(); - map(0x4000, 0x7fff).r(FUNC(namcos22_state::master_external_ram_r)).w(FUNC(namcos22_state::master_external_ram_w)); + map(0x4000, 0x7fff).ram().share("masterextram"); map(0x8000, 0xffff).r(FUNC(namcos22_state::namcos22_dspram16_r)).w(FUNC(namcos22_state::namcos22_dspram16_w)); } @@ -2615,7 +2606,7 @@ void namcos22_state::slave_dsp_program(address_map &map) void namcos22_state::slave_dsp_data(address_map &map) { - map(0x8000, 0x9fff).rw(FUNC(namcos22_state::slave_external_ram_r), FUNC(namcos22_state::slave_external_ram_w)); + map(0x8000, 0x9fff).ram().share("slaveextram"); } void namcos22_state::slave_dsp_io(address_map &map) @@ -2666,18 +2657,6 @@ void namcos22_state::slave_dsp_io(address_map &map) // System 22 37702 -READ16_MEMBER(namcos22_state::s22mcu_shared_r) -{ - uint16_t *share16 = (uint16_t *)m_shareram.target(); - return share16[BYTE_XOR_BE(offset)]; -} - -WRITE16_MEMBER(namcos22_state::s22mcu_shared_w) -{ - uint16_t *share16 = (uint16_t *)m_shareram.target(); - COMBINE_DATA(&share16[BYTE_XOR_BE(offset)]); -} - READ8_MEMBER(namcos22_state::mcu_port4_s22_r) { // for C74, 0x10 selects sound MCU role, 0x00 selects control-reading role @@ -2693,7 +2672,7 @@ READ8_MEMBER(namcos22_state::iomcu_port4_s22_r) void namcos22_state::mcu_s22_program(address_map &map) { map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write)); - map(0x004000, 0x00bfff).rw(FUNC(namcos22_state::s22mcu_shared_r), FUNC(namcos22_state::s22mcu_shared_w)); + map(0x004000, 0x00bfff).ram().share("shareram"); map(0x080000, 0x0fffff).rom().region("mcu", 0); map(0x200000, 0x27ffff).rom().region("mcu", 0); map(0x280000, 0x2fffff).rom().region("mcu", 0); @@ -2786,7 +2765,7 @@ READ8_MEMBER(namcos22_state::namcos22s_mcu_adc_r) void namcos22_state::mcu_program(address_map &map) { map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write)); - map(0x004000, 0x00bfff).rw(FUNC(namcos22_state::s22mcu_shared_r), FUNC(namcos22_state::s22mcu_shared_w)); + map(0x004000, 0x00bfff).ram().share("shareram"); map(0x00c000, 0x00ffff).rom().region("mcu", 0xc000); map(0x080000, 0x0fffff).rom().region("mcu", 0); map(0x200000, 0x27ffff).rom().region("mcu", 0); @@ -2809,30 +2788,22 @@ void namcos22_state::mcu_io(address_map &map) // custom input handling /* TODO: REMOVE (THIS IS HANDLED BY "IOMCU") */ -void namcos22_state::handle_coinage(int slots, int address_is_odd) +void namcos22_state::handle_coinage(uint16_t flags) { - uint16_t *share16 = (uint16_t *)m_shareram.target(); + int coin_state = (flags & 0x1000) >> 12 | (flags & 0x0200) >> 8; - uint32_t coin_state = ioport("INPUTS")->read() & 0x1200; - - if (!(coin_state & 0x1000) && (m_old_coin_state & 0x1000)) + if (!(coin_state & 1) && (m_old_coin_state & 1)) { m_credits1++; } - if (!(coin_state & 0x0200) && (m_old_coin_state & 0x0200)) + if (!(coin_state & 2) && (m_old_coin_state & 2)) { m_credits2++; } m_old_coin_state = coin_state; - - share16[BYTE_XOR_LE(0x38/2)] = m_credits1 << (address_is_odd*8); - - if (slots == 2) - { - share16[BYTE_XOR_LE(0x3e/2)] = m_credits2 << (address_is_odd*8); - } + m_shareram[0x3a/2] = m_credits1 << 8 | m_credits2; } /* TODO: REMOVE (THIS IS HANDLED BY "IOMCU") */ @@ -2841,8 +2812,6 @@ void namcos22_state::handle_driving_io() if (m_syscontrol[0x18] != 0) { uint16_t flags = ioport("INPUTS")->read(); - uint16_t coinram_address_is_odd = 0; - uint16_t gas = ioport("GAS")->read(); uint16_t brake = ioport("BRAKE")->read(); uint16_t steer = ioport("STEER")->read(); @@ -2869,8 +2838,6 @@ void namcos22_state::handle_driving_io() break; case NAMCOS22_VICTORY_LAP: - coinram_address_is_odd = 1; - // (fall through) case NAMCOS22_ACE_DRIVER: gas <<= 3; gas += 992; @@ -2887,10 +2854,11 @@ void namcos22_state::handle_driving_io() break; } - handle_coinage(2, coinram_address_is_odd); - m_shareram[0x000/4] = 0x10 << 16; /* SUB CPU ready */ - m_shareram[0x030/4] = (flags << 16) | steer; - m_shareram[0x034/4] = (gas << 16) | brake; + m_shareram[0x030/2] = flags; + m_shareram[0x032/2] = steer; + m_shareram[0x034/2] = gas; + m_shareram[0x036/2] = brake; + handle_coinage(flags); } } @@ -2900,17 +2868,17 @@ void namcos22_state::handle_cybrcomm_io() if (m_syscontrol[0x18] != 0) { uint16_t flags = ioport("INPUTS")->read(); - uint16_t volume0 = ioport("STICKY1")->read() * 0x10; uint16_t volume1 = ioport("STICKY2")->read() * 0x10; uint16_t volume2 = ioport("STICKX1")->read() * 0x10; uint16_t volume3 = ioport("STICKX2")->read() * 0x10; - m_shareram[0x030/4] = (flags << 16) | volume0; - m_shareram[0x034/4] = (volume1 << 16) | volume2; - m_shareram[0x038/4] = volume3 << 16; - - handle_coinage(1, 0); + m_shareram[0x030/2] = flags; + m_shareram[0x032/2] = volume0; + m_shareram[0x034/2] = volume1; + m_shareram[0x036/2] = volume2; + m_shareram[0x038/2] = volume3; + handle_coinage(flags); } } @@ -3172,7 +3140,6 @@ static INPUT_PORTS_START( raveracw ) PORT_MODIFY("INPUTS") PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("View Change") - PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no coin2 PORT_CONFNAME( 0x2100, 0x2000, DEF_STR( Cabinet ) ) // @ JAMMA pins PORT_CONFSETTING( 0x0000, "50 Inch" ) diff --git a/src/mame/includes/namcos22.h b/src/mame/includes/namcos22.h index 2fa76c17b78..b308232af29 100644 --- a/src/mame/includes/namcos22.h +++ b/src/mame/includes/namcos22.h @@ -193,8 +193,8 @@ public: , m_iomcu(*this, "iomcu") , m_shareram(*this, "shareram") , m_eeprom(*this, "eeprom") - , m_pSlaveExternalRAM(*this, "slaveextram") - , m_pMasterExternalRAM(*this, "masterextram") + , m_slave_extram(*this, "slaveextram") + , m_master_extram(*this, "masterextram") , m_paletteram(*this, "paletteram") , m_cgram(*this, "cgram") , m_textram(*this, "textram") @@ -299,8 +299,6 @@ private: DECLARE_WRITE16_MEMBER(namcos22_dspram16_w); DECLARE_READ16_MEMBER(pdp_status_r); DECLARE_READ16_MEMBER(pdp_begin_r); - DECLARE_READ16_MEMBER(slave_external_ram_r); - DECLARE_WRITE16_MEMBER(slave_external_ram_w); DECLARE_READ16_MEMBER(dsp_hold_signal_r); DECLARE_WRITE16_MEMBER(dsp_hold_ack_w); DECLARE_WRITE16_MEMBER(dsp_xf_output_w); @@ -315,8 +313,6 @@ private: DECLARE_READ16_MEMBER(dsp_unk8_r); DECLARE_READ16_MEMBER(custom_ic_status_r); DECLARE_READ16_MEMBER(dsp_upload_status_r); - DECLARE_READ16_MEMBER(master_external_ram_r); - DECLARE_WRITE16_MEMBER(master_external_ram_w); DECLARE_WRITE16_MEMBER(slave_serial_io_w); DECLARE_READ16_MEMBER(master_serial_io_r); DECLARE_WRITE16_MEMBER(dsp_unk_porta_w); @@ -337,6 +333,8 @@ private: DECLARE_READ8_MEMBER(namcos22_system_controller_r); DECLARE_WRITE8_MEMBER(namcos22s_system_controller_w); DECLARE_WRITE8_MEMBER(namcos22_system_controller_w); + DECLARE_READ16_MEMBER(namcos22_shared_r); + DECLARE_WRITE16_MEMBER(namcos22_shared_w); DECLARE_READ16_MEMBER(namcos22_keycus_r); DECLARE_WRITE16_MEMBER(namcos22_keycus_w); DECLARE_READ16_MEMBER(namcos22_portbit_r); @@ -347,8 +345,6 @@ private: DECLARE_READ32_MEMBER(alpinesa_prot_r); DECLARE_WRITE32_MEMBER(alpinesa_prot_w); DECLARE_WRITE32_MEMBER(namcos22s_chipselect_w); - DECLARE_READ16_MEMBER(s22mcu_shared_r); - DECLARE_WRITE16_MEMBER(s22mcu_shared_w); DECLARE_WRITE8_MEMBER(mcu_port4_w); DECLARE_READ8_MEMBER(mcu_port4_r); DECLARE_WRITE8_MEMBER(mcu_port5_w); @@ -377,7 +373,7 @@ private: float dspfloat_to_nativefloat(uint32_t val); void handle_driving_io(); - void handle_coinage(int slots, int address_is_odd); + void handle_coinage(uint16_t flags); void handle_cybrcomm_io(); inline uint32_t pdp_polygonram_read(offs_t offs) { return m_polygonram[offs & 0x7fff]; } inline void pdp_polygonram_write(offs_t offs, uint32_t data) { m_polygonram[offs & 0x7fff] = data; } @@ -463,10 +459,10 @@ private: required_device m_slave; required_device m_mcu; optional_device m_iomcu; - required_shared_ptr m_shareram; + required_shared_ptr m_shareram; required_device m_eeprom; - required_shared_ptr m_pSlaveExternalRAM; - required_shared_ptr m_pMasterExternalRAM; + required_shared_ptr m_slave_extram; + required_shared_ptr m_master_extram; required_shared_ptr m_paletteram; required_shared_ptr m_cgram; required_shared_ptr m_textram; @@ -492,7 +488,7 @@ private: emu_timer *m_ar_tb_interrupt[2]; uint16_t m_dsp_master_bioz; std::unique_ptr m_pointram; - uint32_t m_old_coin_state; + int m_old_coin_state; uint32_t m_credits1; uint32_t m_credits2; uint16_t m_pdp_base; diff --git a/src/mame/video/namcos22.cpp b/src/mame/video/namcos22.cpp index f6a2da6dbc3..2023f4fdd3c 100644 --- a/src/mame/video/namcos22.cpp +++ b/src/mame/video/namcos22.cpp @@ -759,7 +759,7 @@ void namcos22_state::matrix3d_multiply(float a[4][4], float b[4][4]) { float result[4][4]; - for (int row = 0; row < 4; row++) + for (int row = 0; row < 4; row++) { for (int col = 0; col < 4; col++) { -- cgit v1.2.3