From 43f569e58f26d23032b950ebcbd02f352532ba95 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 27 Dec 2020 05:35:56 +1100 Subject: srcclean for 0.227 --- hash/easy_karaoke_cart.xml | 4 +- hash/leapfrog_turbotwistbrainquest_cart.xml | 2 +- hash/rx78.xml | 2 +- hash/vgmplay.xml | 2 +- hash/vtech_innotv_innotabmax_cart.xml | 2 +- hash/wizard_cart.xml | 86 ++-- src/devices/bus/coco/coco_midi.cpp | 4 +- src/devices/bus/coco/coco_ssc.cpp | 2 +- src/devices/bus/coco/coco_stecomp.cpp | 8 +- src/devices/bus/coco/coco_sym12.cpp | 10 +- src/devices/cpu/arm7/arm7.cpp | 2 +- src/devices/cpu/arm7/arm7core.h | 32 +- src/devices/cpu/m32c/m32cdasm.cpp | 2 +- src/devices/cpu/st62xx/st62xx.cpp | 14 +- src/devices/cpu/st62xx/st62xx.h | 30 +- src/devices/cpu/vt61/vt61.cpp | 2 +- src/devices/machine/f4702.cpp | 2 +- src/devices/machine/ie15.cpp | 4 +- src/devices/machine/locomo.cpp | 6 +- src/devices/machine/locomo.h | 2 +- src/devices/machine/sa1110.cpp | 18 +- src/devices/machine/sa1110.h | 338 +++++++------- src/devices/machine/sa1111.cpp | 24 +- src/devices/machine/sa1111.h | 486 ++++++++++----------- src/devices/machine/scoop.cpp | 6 +- src/devices/machine/scoop.h | 2 +- src/devices/machine/ucb1200.cpp | 6 +- src/devices/machine/ucb1200.h | 152 +++---- src/devices/sound/ks0164.cpp | 2 +- src/devices/sound/multipcm.cpp | 2 +- src/devices/video/lc7985.cpp | 12 +- src/devices/video/lc7985.h | 4 +- src/devices/video/saa5240.cpp | 4 +- src/devices/video/sed1356.cpp | 30 +- src/devices/video/sed1356.h | 314 ++++++------- src/lib/util/chdcd.cpp | 10 +- src/mame/drivers/altair.cpp | 2 +- src/mame/drivers/apple2.cpp | 2 +- src/mame/drivers/asteroid.cpp | 2 +- src/mame/drivers/atarig1.cpp | 2 +- src/mame/drivers/blit.cpp | 8 +- src/mame/drivers/bnstars.cpp | 52 +-- src/mame/drivers/cninja.cpp | 2 +- src/mame/drivers/coleco.cpp | 4 +- src/mame/drivers/dccons.cpp | 6 +- src/mame/drivers/dec0.cpp | 2 +- src/mame/drivers/design.cpp | 18 +- src/mame/drivers/easy_karaoke.cpp | 64 +-- src/mame/drivers/galaxian.cpp | 2 +- src/mame/drivers/galpani2.cpp | 2 +- .../drivers/generalplus_gpl16250_spi_direct.cpp | 6 +- src/mame/drivers/hp3478a.cpp | 2 +- src/mame/drivers/innotv_innotabmax.cpp | 48 +- src/mame/drivers/itech8.cpp | 2 +- src/mame/drivers/jornada.cpp | 22 +- src/mame/drivers/kpython.cpp | 2 +- src/mame/drivers/lbpc.cpp | 2 +- src/mame/drivers/leapfrog_iquest.cpp | 6 +- src/mame/drivers/mcr.cpp | 2 +- src/mame/drivers/megadriv.cpp | 2 +- src/mame/drivers/megadriv_rad.cpp | 6 +- src/mame/drivers/megadriv_sunplus_hybrid.cpp | 14 +- src/mame/drivers/megadriv_vt_hybrid.cpp | 12 +- src/mame/drivers/miuchiz.cpp | 56 +-- src/mame/drivers/ms32.cpp | 78 ++-- src/mame/drivers/nes_vt369_vtunknown.cpp | 10 +- src/mame/drivers/pc1500.cpp | 4 +- src/mame/drivers/pcat_nit.cpp | 8 +- src/mame/drivers/pingpong.cpp | 2 +- src/mame/drivers/pipedrm.cpp | 2 +- src/mame/drivers/replicator.cpp | 30 +- src/mame/drivers/rf51w14cg.cpp | 2 +- src/mame/drivers/sauro.cpp | 8 +- src/mame/drivers/segas16b.cpp | 2 +- src/mame/drivers/spc1500.cpp | 2 +- src/mame/drivers/spg2xx_shredmjr.cpp | 2 +- src/mame/drivers/st2302u_bbl_rom.cpp | 18 +- src/mame/drivers/taito_b.cpp | 4 +- src/mame/drivers/tetrisp2.cpp | 22 +- src/mame/drivers/twinbskt.cpp | 8 +- src/mame/drivers/vg5k.cpp | 10 +- src/mame/drivers/vtech1.cpp | 2 +- src/mame/drivers/wizard.cpp | 2 +- src/mame/drivers/ymmu5.cpp | 2 +- src/mame/includes/coleco.h | 2 +- src/mame/includes/fm7.h | 2 +- src/mame/includes/ms32.h | 10 +- src/mame/includes/tetrisp2.h | 8 +- src/mame/machine/agatkeyb.cpp | 2 +- src/mame/machine/agatkeyb.h | 2 +- src/mame/machine/jaleco_ms32_sysctrl.cpp | 94 ++-- src/mame/machine/jaleco_ms32_sysctrl.h | 6 +- src/mame/machine/mcr68.cpp | 2 +- src/mame/machine/nes_vt369_vtunknown_soc.cpp | 2 +- src/mame/machine/slapstic.cpp | 10 +- src/mame/video/drgnmst.cpp | 6 +- src/mame/video/ms32.cpp | 88 ++-- src/mame/video/ms32_sprite.cpp | 2 +- src/mame/video/osi.cpp | 2 +- src/mame/video/seta001.cpp | 4 +- src/mame/video/simpsons.cpp | 2 +- src/mame/video/tunhunt.cpp | 2 +- src/mame/video/undrfire.cpp | 42 +- 103 files changed, 1242 insertions(+), 1242 deletions(-) diff --git a/hash/easy_karaoke_cart.xml b/hash/easy_karaoke_cart.xml index 79c2f216a77..cf483e3b4b5 100644 --- a/hash/easy_karaoke_cart.xml +++ b/hash/easy_karaoke_cart.xml @@ -15,7 +15,7 @@ license:CC0 - + @@ -29,7 +29,7 @@ license:CC0 - + diff --git a/hash/leapfrog_turbotwistbrainquest_cart.xml b/hash/leapfrog_turbotwistbrainquest_cart.xml index 5176dae1723..f6317235594 100644 --- a/hash/leapfrog_turbotwistbrainquest_cart.xml +++ b/hash/leapfrog_turbotwistbrainquest_cart.xml @@ -5,7 +5,7 @@ license:CC0 --> - + Grades 5 & 6 (500-00745) 2002 diff --git a/hash/rx78.xml b/hash/rx78.xml index 50e24ddcc1c..59d9324872e 100644 --- a/hash/rx78.xml +++ b/hash/rx78.xml @@ -14,7 +14,7 @@ devices. One additional game and three expansion cards were announced but never printed in the game carts or tapes are used below where available. Names in brackets are unofficial translations. +========+=========+=======+=========+==============================================================================+ -| Format | Serial | Type | Overlay | Title | +| Format | Serial | Type | Overlay | Title | |========+=========+=======+========================================================================================+ | N/A | 0201001 | Other | No | RX-78 Base Unit | N/A | 0201003 | Other | No | Joystick Controller diff --git a/hash/vgmplay.xml b/hash/vgmplay.xml index aafe34a0a9d..7ee39fdee83 100644 --- a/hash/vgmplay.xml +++ b/hash/vgmplay.xml @@ -252296,7 +252296,7 @@ license:CC0 - + diff --git a/hash/vtech_innotv_innotabmax_cart.xml b/hash/vtech_innotv_innotabmax_cart.xml index 5d51e76c4ad..3bbbe866d1a 100644 --- a/hash/vtech_innotv_innotabmax_cart.xml +++ b/hash/vtech_innotv_innotabmax_cart.xml @@ -53,5 +53,5 @@ license:CC0 - + diff --git a/hash/wizard_cart.xml b/hash/wizard_cart.xml index 6fbe2b65ccc..941ce72a8c7 100644 --- a/hash/wizard_cart.xml +++ b/hash/wizard_cart.xml @@ -64,51 +64,51 @@ AC-2E Nikon F90x/N90s Card NO Cart pinout ______________________________________________ -1 VCC -2 NC -3 NC -4 VBATT -5 VCC? Connects to pin 9 of TSOP32 (unused) -6 A15 -7 A14 -8 A13 -9 A12 -10 A11 -11 A10 -12 A9 -13 A8 -14 A7 -15 A6 -16 A5 -17 A4 -18 A3 -19 A2 -20 A1 -21 A0 -22 D0 -23 D1 -24 D2 -25 D3 -26 D4 -27 D5 -28 D6 -29 D7 -30 /CE Mask ROM -31 /CE SRAM 1 -32 /CE SRAM 2 -33 /CE EPROM -34 /WR -35 /OE -36 NC -37 gpio A18? -38 gpio A17 -39 gpio A16 +1 VCC +2 NC +3 NC +4 VBATT +5 VCC? Connects to pin 9 of TSOP32 (unused) +6 A15 +7 A14 +8 A13 +9 A12 +10 A11 +11 A10 +12 A9 +13 A8 +14 A7 +15 A6 +16 A5 +17 A4 +18 A3 +19 A2 +20 A1 +21 A0 +22 D0 +23 D1 +24 D2 +25 D3 +26 D4 +27 D5 +28 D6 +29 D7 +30 /CE Mask ROM +31 /CE SRAM 1 +32 /CE SRAM 2 +33 /CE EPROM +34 /WR +35 /OE +36 NC +37 gpio A18? +38 gpio A17 +39 gpio A16 40 \ NC 41 / NC -42 NC GPIO -43 NC GPIO -44 NC -45 GND +42 NC GPIO +43 NC GPIO +44 NC +45 GND --> diff --git a/src/devices/bus/coco/coco_midi.cpp b/src/devices/bus/coco/coco_midi.cpp index 6bb27eb5456..cf4d188f649 100644 --- a/src/devices/bus/coco/coco_midi.cpp +++ b/src/devices/bus/coco/coco_midi.cpp @@ -4,8 +4,8 @@ coco_midi.cpp - Emulation of Rutherford Research's Midi Pak and also compatible with - Go4Retro's MIDI Maestro. + Emulation of Rutherford Research's Midi Pak and also compatible with + Go4Retro's MIDI Maestro. ***************************************************************************/ diff --git a/src/devices/bus/coco/coco_ssc.cpp b/src/devices/bus/coco/coco_ssc.cpp index 457c8192c35..d7836927ead 100644 --- a/src/devices/bus/coco/coco_ssc.cpp +++ b/src/devices/bus/coco/coco_ssc.cpp @@ -485,7 +485,7 @@ cocossc_sac_device::cocossc_sac_device(const machine_config &mconfig, const char m_stream(nullptr), m_index(0) { - std::fill(std::begin(m_rms), std::end(m_rms), 0); + std::fill(std::begin(m_rms), std::end(m_rms), 0); } diff --git a/src/devices/bus/coco/coco_stecomp.cpp b/src/devices/bus/coco/coco_stecomp.cpp index bf9804a1211..60b5c1a9443 100644 --- a/src/devices/bus/coco/coco_stecomp.cpp +++ b/src/devices/bus/coco/coco_stecomp.cpp @@ -5,10 +5,10 @@ coco_stecomp.cpp - Code for emulating The Stereo Composer by Speech Systems + Code for emulating The Stereo Composer by Speech Systems - This cartridge is a simple sound cartridge. It had two 8-bit DACs - connected thru a PIA. It contained no ROM. + This cartridge is a simple sound cartridge. It had two 8-bit DACs + connected thru a PIA. It contained no ROM. ***************************************************************************/ @@ -52,7 +52,7 @@ namespace virtual void device_start() override { // install handlers - install_readwrite_handler( 0xFF70, 0xFF73, read8sm_delegate(*m_pia, FUNC(pia6821_device::read)), write8sm_delegate(*m_pia, FUNC(pia6821_device::write))); + install_readwrite_handler( 0xFF70, 0xFF73, read8sm_delegate(*m_pia, FUNC(pia6821_device::read)), write8sm_delegate(*m_pia, FUNC(pia6821_device::write))); } private: diff --git a/src/devices/bus/coco/coco_sym12.cpp b/src/devices/bus/coco/coco_sym12.cpp index 633d2b3260c..c65678837de 100644 --- a/src/devices/bus/coco/coco_sym12.cpp +++ b/src/devices/bus/coco/coco_sym12.cpp @@ -5,12 +5,12 @@ coco_sym12.cpp - Code for emulating The Symphony 12 + Code for emulating The Symphony 12 - Made by Speech Systems, 1982. + Made by Speech Systems, 1982. - This cartridge is a complex sound cartridge. It had 4 AY-3-8910 PSG - connected thru a PIA. It contained no ROM. + This cartridge is a complex sound cartridge. It had 4 AY-3-8910 PSG + connected thru a PIA. It contained no ROM. ***************************************************************************/ @@ -52,7 +52,7 @@ namespace virtual void device_start() override { // install handlers - install_readwrite_handler( 0xff60, 0xff63, read8sm_delegate(*m_pia, FUNC(pia6821_device::read)), write8sm_delegate(*m_pia, FUNC(pia6821_device::write))); + install_readwrite_handler( 0xff60, 0xff63, read8sm_delegate(*m_pia, FUNC(pia6821_device::read)), write8sm_delegate(*m_pia, FUNC(pia6821_device::write))); } u8 read_porta(); diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp index 8fe96ac459f..4cbb29ca374 100644 --- a/src/devices/cpu/arm7/arm7.cpp +++ b/src/devices/cpu/arm7/arm7.cpp @@ -41,7 +41,7 @@ TODO: #define LOG_COPRO_WRITES (1 << 3) #define LOG_COPRO_UNKNOWN (1 << 4) #define LOG_COPRO_RESERVED (1 << 5) -#define LOG_TLB (1 << 6) +#define LOG_TLB (1 << 6) #define VERBOSE (0) // (LOG_COPRO_READS | LOG_COPRO_WRITES | LOG_COPRO_UNKNOWN | LOG_COPRO_RESERVED) #include "logmacro.h" diff --git a/src/devices/cpu/arm7/arm7core.h b/src/devices/cpu/arm7/arm7core.h index 32043c57d4c..937c42a550b 100644 --- a/src/devices/cpu/arm7/arm7core.h +++ b/src/devices/cpu/arm7/arm7core.h @@ -83,18 +83,18 @@ enum }; /* Coprocessor-related macros */ -#define COPRO_DOMAIN_NO_ACCESS 0 -#define COPRO_DOMAIN_CLIENT 1 -#define COPRO_DOMAIN_RESV 2 -#define COPRO_DOMAIN_MANAGER 3 - -#define COPRO_FAULT_NONE 0 -#define COPRO_FAULT_TRANSLATE_SECTION 5 -#define COPRO_FAULT_TRANSLATE_PAGE 7 -#define COPRO_FAULT_DOMAIN_SECTION 9 -#define COPRO_FAULT_DOMAIN_PAGE 11 -#define COPRO_FAULT_PERM_SECTION 13 -#define COPRO_FAULT_PERM_PAGE 15 +#define COPRO_DOMAIN_NO_ACCESS 0 +#define COPRO_DOMAIN_CLIENT 1 +#define COPRO_DOMAIN_RESV 2 +#define COPRO_DOMAIN_MANAGER 3 + +#define COPRO_FAULT_NONE 0 +#define COPRO_FAULT_TRANSLATE_SECTION 5 +#define COPRO_FAULT_TRANSLATE_PAGE 7 +#define COPRO_FAULT_DOMAIN_SECTION 9 +#define COPRO_FAULT_DOMAIN_PAGE 11 +#define COPRO_FAULT_PERM_SECTION 13 +#define COPRO_FAULT_PERM_PAGE 15 #define COPRO_TLB_BASE m_tlbBase #define COPRO_TLB_BASE_MASK 0xffffc000 @@ -122,10 +122,10 @@ enum #define COPRO_TLB_COARSE_TABLE 1 #define COPRO_TLB_SECTION_TABLE 2 #define COPRO_TLB_FINE_TABLE 3 -#define COPRO_TLB_TYPE_SECTION 0 -#define COPRO_TLB_TYPE_LARGE 1 -#define COPRO_TLB_TYPE_SMALL 2 -#define COPRO_TLB_TYPE_TINY 3 +#define COPRO_TLB_TYPE_SECTION 0 +#define COPRO_TLB_TYPE_LARGE 1 +#define COPRO_TLB_TYPE_SMALL 2 +#define COPRO_TLB_TYPE_TINY 3 #define COPRO_CTRL m_control #define COPRO_CTRL_MMU_EN 0x00000001 diff --git a/src/devices/cpu/m32c/m32cdasm.cpp b/src/devices/cpu/m32c/m32cdasm.cpp index 8a4b9422c2c..9c687a37f47 100644 --- a/src/devices/cpu/m32c/m32cdasm.cpp +++ b/src/devices/cpu/m32c/m32cdasm.cpp @@ -399,7 +399,7 @@ void m32c_disassembler::dasm_00000001(std::ostream &stream, offs_t &pc, const m3 dasm_immediate_mode(stream, pc, opcodes, (op2 & 0x0e) << 1 | BIT(op3, 6, 2), BIT(op2, 0), indirect_dest, 2, true); } else - { + { util::stream_format(stream, "%-11s", util::string_format("%sad%c.%c ", BIT(op3, 5) ? "d" : "", BIT(op3, 4) ? 'd' : 'c', BIT(op2, 0) ? 'w' : 'b')); dasm_immediate_mode(stream, pc, opcodes, (op2 & 0x0e) << 1 | BIT(op3, 6, 2), BIT(op2, 0), indirect_dest, 1, !BIT(op3, 5)); } diff --git a/src/devices/cpu/st62xx/st62xx.cpp b/src/devices/cpu/st62xx/st62xx.cpp index d1144e6dad0..81e25d72d01 100644 --- a/src/devices/cpu/st62xx/st62xx.cpp +++ b/src/devices/cpu/st62xx/st62xx.cpp @@ -16,12 +16,12 @@ #include "st62xx.h" #include "st62xx_dasm.h" -#define LOG_UNIMPL (1 << 1) -#define LOG_GPIO (1 << 2) -#define LOG_TIMER (1 << 3) -#define LOG_ALL (LOG_UNIMPL | LOG_GPIO | LOG_TIMER) +#define LOG_UNIMPL (1 << 1) +#define LOG_GPIO (1 << 2) +#define LOG_TIMER (1 << 3) +#define LOG_ALL (LOG_UNIMPL | LOG_GPIO | LOG_TIMER) -#define VERBOSE (LOG_ALL) +#define VERBOSE (LOG_ALL) #include "logmacro.h" DEFINE_DEVICE_TYPE(ST6228, st6228_device, "st6228", "STmicro ST6228") @@ -372,8 +372,8 @@ void st6228_device::watchdog_w(offs_t offset, uint8_t data) uint8_t st6228_device::gpio_data_r(offs_t offset) { const uint8_t data = (m_port_data[offset] & m_port_dir[offset]) | - (m_port_input[offset] & ~m_port_dir[offset]) | - (m_port_pullup[offset] & ~m_port_dir[offset]); + (m_port_input[offset] & ~m_port_dir[offset]) | + (m_port_pullup[offset] & ~m_port_dir[offset]); LOGMASKED(LOG_GPIO, "%s: gpio_data_r: Port %c Data: %02x\n", machine().describe_context(), offset + 'A', data); return data; } diff --git a/src/devices/cpu/st62xx/st62xx.h b/src/devices/cpu/st62xx/st62xx.h index e68385bd1e3..8442e1e798b 100644 --- a/src/devices/cpu/st62xx/st62xx.h +++ b/src/devices/cpu/st62xx/st62xx.h @@ -212,21 +212,21 @@ protected: enum : uint8_t { - PSC_MASK = 0x7f, - - TSCR_PS_BIT = 0, - TSCR_PS_MASK = 0x07, - TSCR_PSI_BIT = 3, - TSCR_DOUT_BIT = 4, - TSCR_TOUT_BIT = 5, - TSCR_ETI_BIT = 6, - TSCR_TMZ_BIT = 7, - - TSCR_MODE_MASK = (1 << TSCR_DOUT_BIT) | (1 << TSCR_TOUT_BIT), - TSCR_MODE_EVENT = 0x00, - TSCR_MODE_GATED = (1 << TSCR_DOUT_BIT), - TSCR_MODE_OUTPUT_0 = (1 << TSCR_TOUT_BIT), - TSCR_MODE_OUTPUT_1 = (1 << TSCR_DOUT_BIT) | (1 << TSCR_TOUT_BIT) + PSC_MASK = 0x7f, + + TSCR_PS_BIT = 0, + TSCR_PS_MASK = 0x07, + TSCR_PSI_BIT = 3, + TSCR_DOUT_BIT = 4, + TSCR_TOUT_BIT = 5, + TSCR_ETI_BIT = 6, + TSCR_TMZ_BIT = 7, + + TSCR_MODE_MASK = (1 << TSCR_DOUT_BIT) | (1 << TSCR_TOUT_BIT), + TSCR_MODE_EVENT = 0x00, + TSCR_MODE_GATED = (1 << TSCR_DOUT_BIT), + TSCR_MODE_OUTPUT_0 = (1 << TSCR_TOUT_BIT), + TSCR_MODE_OUTPUT_1 = (1 << TSCR_DOUT_BIT) | (1 << TSCR_TOUT_BIT) }; enum diff --git a/src/devices/cpu/vt61/vt61.cpp b/src/devices/cpu/vt61/vt61.cpp index 0e8700d5912..216187e0a55 100644 --- a/src/devices/cpu/vt61/vt61.cpp +++ b/src/devices/cpu/vt61/vt61.cpp @@ -306,7 +306,7 @@ void vt61_cpu_device::operate_t5(u16 i) // LD PC m_pc_mode = pc_mode::LD; break; - + case 3: // LD UART (TODO) break; diff --git a/src/devices/machine/f4702.cpp b/src/devices/machine/f4702.cpp index 40a1d0be517..2a6bf7218c8 100644 --- a/src/devices/machine/f4702.cpp +++ b/src/devices/machine/f4702.cpp @@ -4,7 +4,7 @@ Fairchild 4702B Programmable Bit Rate Generator - Originally numbered 34702 in Fairchild's isoplanar CMOS series (whose + Originally numbered 34702 in Fairchild's isoplanar CMOS series (whose lower-numbered products were logical equivalents of RCA CD4000 and Motorola MC14500 series devices), this BRG incorporates some unusually sophisticated features into its 16-pin package, which may be why diff --git a/src/devices/machine/ie15.cpp b/src/devices/machine/ie15.cpp index 1555e1cb645..4d9d17a3afc 100644 --- a/src/devices/machine/ie15.cpp +++ b/src/devices/machine/ie15.cpp @@ -616,8 +616,8 @@ void ie15_device::update_leds() /* VBlank is active for 3 topmost on-screen rows and 1 at the bottom. - However, control flag 3 overrides VBlank, allowing status line - to be switched on and off. + However, control flag 3 overrides VBlank, allowing status line + to be switched on and off. */ void ie15_device::scanline_callback() { diff --git a/src/devices/machine/locomo.cpp b/src/devices/machine/locomo.cpp index 4eb6c54008d..01cae8787ce 100644 --- a/src/devices/machine/locomo.cpp +++ b/src/devices/machine/locomo.cpp @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Sharp LoCoMo peripheral chip emulation skeleton + Sharp LoCoMo peripheral chip emulation skeleton ***************************************************************************/ @@ -10,8 +10,8 @@ #include "locomo.h" #define LOG_UNKNOWN (1 << 1) -#define LOG_READS (1 << 2) -#define LOG_WRITES (1 << 3) +#define LOG_READS (1 << 2) +#define LOG_WRITES (1 << 3) #define LOG_ALL (LOG_UNKNOWN | LOG_READS | LOG_WRITES) #define VERBOSE (LOG_ALL) diff --git a/src/devices/machine/locomo.h b/src/devices/machine/locomo.h index 7f870b8f778..ac240959d9f 100644 --- a/src/devices/machine/locomo.h +++ b/src/devices/machine/locomo.h @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Sharp LoCoMo peripheral chip emulation skeleton + Sharp LoCoMo peripheral chip emulation skeleton ***************************************************************************/ diff --git a/src/devices/machine/sa1110.cpp b/src/devices/machine/sa1110.cpp index 7d13102c86a..8b9047dcc48 100644 --- a/src/devices/machine/sa1110.cpp +++ b/src/devices/machine/sa1110.cpp @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Intel XScale SA1110 peripheral emulation + Intel XScale SA1110 peripheral emulation ***************************************************************************/ @@ -11,16 +11,16 @@ #define LOG_UNKNOWN (1 << 1) #define LOG_UART (1 << 2) -#define LOG_UART_HF (1 << 3) -#define LOG_MCP (1 << 4) -#define LOG_SSP (1 << 5) -#define LOG_OSTIMER (1 << 6) -#define LOG_OSTIMER_HF (1 << 7) -#define LOG_RTC (1 << 8) +#define LOG_UART_HF (1 << 3) +#define LOG_MCP (1 << 4) +#define LOG_SSP (1 << 5) +#define LOG_OSTIMER (1 << 6) +#define LOG_OSTIMER_HF (1 << 7) +#define LOG_RTC (1 << 8) #define LOG_POWER (1 << 9) #define LOG_RESET (1 << 10) -#define LOG_GPIO (1 << 11) -#define LOG_GPIO_HF (1 << 12) +#define LOG_GPIO (1 << 11) +#define LOG_GPIO_HF (1 << 12) #define LOG_INTC (1 << 13) #define LOG_ALL (LOG_UNKNOWN | LOG_UART | LOG_MCP | LOG_SSP | LOG_OSTIMER | LOG_RTC | LOG_POWER | LOG_RESET | LOG_GPIO | LOG_INTC) diff --git a/src/devices/machine/sa1110.h b/src/devices/machine/sa1110.h index 167d7f47862..3069e7006ab 100644 --- a/src/devices/machine/sa1110.h +++ b/src/devices/machine/sa1110.h @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Intel XScale SA1110 peripheral emulation + Intel XScale SA1110 peripheral emulation ***************************************************************************/ @@ -137,20 +137,20 @@ protected: REG_UTSR0 = (0x0000001c >> 2), REG_UTSR1 = (0x00000020 >> 2), - MCP_BASE_ADDR = 0x80060000, + MCP_BASE_ADDR = 0x80060000, REG_MCCR0 = (0x00000000 >> 2), REG_MCDR0 = (0x00000008 >> 2), REG_MCDR1 = (0x0000000c >> 2), REG_MCDR2 = (0x00000010 >> 2), REG_MCSR = (0x00000018 >> 2), - SSP_BASE_ADDR = 0x80070000, - REG_SSCR0 = (0x00000060 >> 2), - REG_SSCR1 = (0x00000064 >> 2), - REG_SSDR = (0x0000006c >> 2), - REG_SSSR = (0x00000074 >> 2), + SSP_BASE_ADDR = 0x80070000, + REG_SSCR0 = (0x00000060 >> 2), + REG_SSCR1 = (0x00000064 >> 2), + REG_SSDR = (0x0000006c >> 2), + REG_SSSR = (0x00000074 >> 2), - OSTMR_BASE_ADDR = 0x90000000, + OSTMR_BASE_ADDR = 0x90000000, REG_OSMR0 = (0x00000000 >> 2), REG_OSMR1 = (0x00000004 >> 2), REG_OSMR2 = (0x00000008 >> 2), @@ -160,7 +160,7 @@ protected: REG_OWER = (0x00000018 >> 2), REG_OIER = (0x0000001c >> 2), - RTC_BASE_ADDR = 0x90010000, + RTC_BASE_ADDR = 0x90010000, REG_RTAR = (0x00000000 >> 2), REG_RCNR = (0x00000004 >> 2), REG_RTTR = (0x00000008 >> 2), @@ -176,19 +176,19 @@ protected: REG_PGSR = (0x00000018 >> 2), REG_POSR = (0x0000001c >> 2), - RESET_BASE_ADDR = 0x90030000, - REG_RSRR = (0x00000000 >> 2), - REG_RCSR = (0x00000004 >> 2), + RESET_BASE_ADDR = 0x90030000, + REG_RSRR = (0x00000000 >> 2), + REG_RCSR = (0x00000004 >> 2), - GPIO_BASE_ADDR = 0x90040000, - REG_GPLR = (0x00000000 >> 2), - REG_GPDR = (0x00000004 >> 2), - REG_GPSR = (0x00000008 >> 2), - REG_GPCR = (0x0000000c >> 2), - REG_GRER = (0x00000010 >> 2), - REG_GFER = (0x00000014 >> 2), - REG_GEDR = (0x00000018 >> 2), - REG_GAFR = (0x0000001c >> 2), + GPIO_BASE_ADDR = 0x90040000, + REG_GPLR = (0x00000000 >> 2), + REG_GPDR = (0x00000004 >> 2), + REG_GPSR = (0x00000008 >> 2), + REG_GPCR = (0x0000000c >> 2), + REG_GRER = (0x00000010 >> 2), + REG_GFER = (0x00000014 >> 2), + REG_GEDR = (0x00000018 >> 2), + REG_GAFR = (0x0000001c >> 2), INTC_BASE_ADDR = 0x90050000, REG_ICIP = (0x00000000 >> 2), @@ -202,159 +202,159 @@ protected: // register contents enum : uint32_t { - UART3_FIFO_PRE = 8, - UART3_FIFO_FRE = 9, - UART3_FIFO_ROR = 10, - - UTCR3_RXE_BIT = 0, - UTCR3_TXE_BIT = 1, - UTCR3_BRK_BIT = 2, - UTCR3_RIE_BIT = 3, - UTCR3_TIE_BIT = 4, - UTCR3_LBM_BIT = 5, - - UTSR0_TFS_BIT = 0, - UTSR0_RFS_BIT = 1, - UTSR0_RID_BIT = 2, - UTSR0_RBB_BIT = 3, - UTSR0_REB_BIT = 4, - UTSR0_EIF_BIT = 5, - - UTSR1_TBY_BIT = 0, - UTSR1_RNE_BIT = 1, - UTSR1_TNF_BIT = 2, - UTSR1_PRE_BIT = 3, - UTSR1_FRE_BIT = 4, - UTSR1_ROR_BIT = 5, - - MCCR0_ASD_BIT = 0, - MCCR0_ASD_MASK = 0x0000007f, - MCCR0_TSD_BIT = 8, - MCCR0_TSD_MASK = 0x00007f00, - MCCR0_MCE_BIT = 16, - MCCR0_ECS_BIT = 17, - MCCR0_ADM_BIT = 18, - MCCR0_TTE_BIT = 19, - MCCR0_TRE_BIT = 20, - MCCR0_ATE_BIT = 21, - MCCR0_ARE_BIT = 22, - MCCR0_LBM_BIT = 23, - MCCR0_ECP_BIT = 24, - MCCR0_ECP_MASK = 0x03000000, - - MCCR1_CFS_BIT = 20, - - MCDR2_RW_BIT = 16, - MCDR2_ADDR_BIT = 17, - MCDR2_ADDR_MASK = 0x001e0000, - - MCSR_ATS_BIT = 0, - MCSR_ARS_BIT = 1, - MCSR_TTS_BIT = 2, - MCSR_TRS_BIT = 3, - MCSR_ATU_BIT = 4, - MCSR_ARO_BIT = 5, - MCSR_TTU_BIT = 6, - MCSR_TRO_BIT = 7, - MCSR_ANF_BIT = 8, - MCSR_ANE_BIT = 9, - MCSR_TNF_BIT = 10, - MCSR_TNE_BIT = 11, - MCSR_CWC_BIT = 12, - MCSR_CRC_BIT = 13, - MCSR_ACE_BIT = 14, - MCSR_TCE_BIT = 15, - - SSCR0_DSS_BIT = 0, - SSCR0_DSS_MASK = 0x0000000f, - SSCR0_FRF_BIT = 4, - SSCR0_FRF_MASK = 0x00000030, - SSCR0_SSE_BIT = 7, - SSCR0_SCR_BIT = 8, - SSCR0_SCR_MASK = 0x0000ff00, - - SSCR1_RIE_BIT = 0, - SSCR1_TIE_BIT = 1, - SSCR1_LBM_BIT = 2, - SSCR1_SPO_BIT = 3, - SSCR1_SPH_BIT = 4, - SSCR1_ECS_BIT = 5, - - SSSR_TNF_BIT = 1, - SSSR_RNE_BIT = 2, - SSSR_BSY_BIT = 3, - SSSR_TFS_BIT = 4, - SSSR_RFS_BIT = 5, - SSSR_ROR_BIT = 6, - - RTSR_AL_BIT = 0, - RTSR_AL_MASK = (1 << RTSR_AL_BIT), - RTSR_HZ_BIT = 1, - RTSR_HZ_MASK = (1 << RTSR_HZ_BIT), - RTSR_ALE_BIT = 2, - RTSR_ALE_MASK = (1 << RTSR_ALE_BIT), - RTSR_HZE_BIT = 3, - RTSR_HZE_MASK = (1 << RTSR_HZE_BIT) + UART3_FIFO_PRE = 8, + UART3_FIFO_FRE = 9, + UART3_FIFO_ROR = 10, + + UTCR3_RXE_BIT = 0, + UTCR3_TXE_BIT = 1, + UTCR3_BRK_BIT = 2, + UTCR3_RIE_BIT = 3, + UTCR3_TIE_BIT = 4, + UTCR3_LBM_BIT = 5, + + UTSR0_TFS_BIT = 0, + UTSR0_RFS_BIT = 1, + UTSR0_RID_BIT = 2, + UTSR0_RBB_BIT = 3, + UTSR0_REB_BIT = 4, + UTSR0_EIF_BIT = 5, + + UTSR1_TBY_BIT = 0, + UTSR1_RNE_BIT = 1, + UTSR1_TNF_BIT = 2, + UTSR1_PRE_BIT = 3, + UTSR1_FRE_BIT = 4, + UTSR1_ROR_BIT = 5, + + MCCR0_ASD_BIT = 0, + MCCR0_ASD_MASK = 0x0000007f, + MCCR0_TSD_BIT = 8, + MCCR0_TSD_MASK = 0x00007f00, + MCCR0_MCE_BIT = 16, + MCCR0_ECS_BIT = 17, + MCCR0_ADM_BIT = 18, + MCCR0_TTE_BIT = 19, + MCCR0_TRE_BIT = 20, + MCCR0_ATE_BIT = 21, + MCCR0_ARE_BIT = 22, + MCCR0_LBM_BIT = 23, + MCCR0_ECP_BIT = 24, + MCCR0_ECP_MASK = 0x03000000, + + MCCR1_CFS_BIT = 20, + + MCDR2_RW_BIT = 16, + MCDR2_ADDR_BIT = 17, + MCDR2_ADDR_MASK = 0x001e0000, + + MCSR_ATS_BIT = 0, + MCSR_ARS_BIT = 1, + MCSR_TTS_BIT = 2, + MCSR_TRS_BIT = 3, + MCSR_ATU_BIT = 4, + MCSR_ARO_BIT = 5, + MCSR_TTU_BIT = 6, + MCSR_TRO_BIT = 7, + MCSR_ANF_BIT = 8, + MCSR_ANE_BIT = 9, + MCSR_TNF_BIT = 10, + MCSR_TNE_BIT = 11, + MCSR_CWC_BIT = 12, + MCSR_CRC_BIT = 13, + MCSR_ACE_BIT = 14, + MCSR_TCE_BIT = 15, + + SSCR0_DSS_BIT = 0, + SSCR0_DSS_MASK = 0x0000000f, + SSCR0_FRF_BIT = 4, + SSCR0_FRF_MASK = 0x00000030, + SSCR0_SSE_BIT = 7, + SSCR0_SCR_BIT = 8, + SSCR0_SCR_MASK = 0x0000ff00, + + SSCR1_RIE_BIT = 0, + SSCR1_TIE_BIT = 1, + SSCR1_LBM_BIT = 2, + SSCR1_SPO_BIT = 3, + SSCR1_SPH_BIT = 4, + SSCR1_ECS_BIT = 5, + + SSSR_TNF_BIT = 1, + SSSR_RNE_BIT = 2, + SSSR_BSY_BIT = 3, + SSSR_TFS_BIT = 4, + SSSR_RFS_BIT = 5, + SSSR_ROR_BIT = 6, + + RTSR_AL_BIT = 0, + RTSR_AL_MASK = (1 << RTSR_AL_BIT), + RTSR_HZ_BIT = 1, + RTSR_HZ_MASK = (1 << RTSR_HZ_BIT), + RTSR_ALE_BIT = 2, + RTSR_ALE_MASK = (1 << RTSR_ALE_BIT), + RTSR_HZE_BIT = 3, + RTSR_HZE_MASK = (1 << RTSR_HZE_BIT) }; // interrupt bits enum : uint32_t { - INT_GPIO0 = 0, - INT_GPIO1 = 1, - INT_GPIO2 = 2, - INT_GPIO3 = 3, - INT_GPIO4 = 4, - INT_GPIO5 = 5, - INT_GPIO6 = 6, - INT_GPIO7 = 7, - INT_GPIO8 = 8, - INT_GPIO9 = 9, - INT_GPIO10 = 10, - INT_GPIOHI = 11, - INT_LCD = 12, - INT_UDC = 13, - INT_UART1 = 15, - INT_UART2 = 16, - INT_UART3 = 17, - INT_MCP = 18, - INT_SSP = 19, - INT_DMA0 = 20, - INT_DMA1 = 21, - INT_DMA2 = 22, - INT_DMA3 = 23, - INT_DMA4 = 24, - INT_DMA5 = 25, - INT_OSTIMER0 = 26, - INT_OSTIMER1 = 27, - INT_OSTIMER2 = 28, - INT_OSTIMER3 = 29, - INT_RTC_TICK = 30, - INT_RTC_ALARM = 31 + INT_GPIO0 = 0, + INT_GPIO1 = 1, + INT_GPIO2 = 2, + INT_GPIO3 = 3, + INT_GPIO4 = 4, + INT_GPIO5 = 5, + INT_GPIO6 = 6, + INT_GPIO7 = 7, + INT_GPIO8 = 8, + INT_GPIO9 = 9, + INT_GPIO10 = 10, + INT_GPIOHI = 11, + INT_LCD = 12, + INT_UDC = 13, + INT_UART1 = 15, + INT_UART2 = 16, + INT_UART3 = 17, + INT_MCP = 18, + INT_SSP = 19, + INT_DMA0 = 20, + INT_DMA1 = 21, + INT_DMA2 = 22, + INT_DMA3 = 23, + INT_DMA4 = 24, + INT_DMA5 = 25, + INT_OSTIMER0 = 26, + INT_OSTIMER1 = 27, + INT_OSTIMER2 = 28, + INT_OSTIMER3 = 29, + INT_RTC_TICK = 30, + INT_RTC_ALARM = 31 }; // UART3 interrupt sources enum : unsigned { - UART3_TFS = 0, - UART3_RFS = 1, - UART3_RID = 2, - UART3_RBB = 3, - UART3_REB = 4, - UART3_EIF = 5, + UART3_TFS = 0, + UART3_RFS = 1, + UART3_RID = 2, + UART3_RBB = 3, + UART3_REB = 4, + UART3_EIF = 5, }; // MCP interrupt sources enum : unsigned { - MCP_AUDIO_TX = 0, - MCP_AUDIO_RX = 1, - MCP_TELECOM_TX = 2, - MCP_TELECOM_RX = 3, - MCP_AUDIO_UNDERRUN = 4, - MCP_AUDIO_OVERRUN = 5, - MCP_TELECOM_UNDERRUN = 6, - MCP_TELECOM_OVERRUN = 7 + MCP_AUDIO_TX = 0, + MCP_AUDIO_RX = 1, + MCP_TELECOM_TX = 2, + MCP_TELECOM_RX = 3, + MCP_AUDIO_UNDERRUN = 4, + MCP_AUDIO_OVERRUN = 5, + MCP_TELECOM_UNDERRUN = 6, + MCP_TELECOM_OVERRUN = 7 }; struct uart_regs @@ -373,7 +373,7 @@ protected: int tx_fifo_write_idx; int tx_fifo_count; - bool rx_break_interlock; + bool rx_break_interlock; }; struct mcp_regs @@ -486,15 +486,15 @@ protected: uint32_t icpr; }; - uart_regs m_uart_regs; - mcp_regs m_mcp_regs; - ssp_regs m_ssp_regs; - ostimer_regs m_ostmr_regs; - rtc_regs m_rtc_regs; - power_regs m_power_regs; - uint32_t m_rcsr; - gpio_regs m_gpio_regs; - intc_regs m_intc_regs; + uart_regs m_uart_regs; + mcp_regs m_mcp_regs; + ssp_regs m_ssp_regs; + ostimer_regs m_ostmr_regs; + rtc_regs m_rtc_regs; + power_regs m_power_regs; + uint32_t m_rcsr; + gpio_regs m_gpio_regs; + intc_regs m_intc_regs; required_device m_maincpu; required_device m_uart3_irqs; diff --git a/src/devices/machine/sa1111.cpp b/src/devices/machine/sa1111.cpp index 3569349be14..2871576e701 100644 --- a/src/devices/machine/sa1111.cpp +++ b/src/devices/machine/sa1111.cpp @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Intel SA1111 Microprocessor Companion Chip skeleton + Intel SA1111 Microprocessor Companion Chip skeleton ***************************************************************************/ @@ -10,17 +10,17 @@ #include "sa1111.h" #define LOG_UNKNOWN (1 << 1) -#define LOG_SBI (1 << 2) -#define LOG_SK (1 << 3) -#define LOG_USB (1 << 4) -#define LOG_AUDIO (1 << 5) -#define LOG_SSP (1 << 6) -#define LOG_SSP_HF (1 << 7) -#define LOG_TRACK (1 << 8) -#define LOG_MOUSE (1 << 9) -#define LOG_GPIO (1 << 10) -#define LOG_INTC (1 << 11) -#define LOG_CARD (1 << 12) +#define LOG_SBI (1 << 2) +#define LOG_SK (1 << 3) +#define LOG_USB (1 << 4) +#define LOG_AUDIO (1 << 5) +#define LOG_SSP (1 << 6) +#define LOG_SSP_HF (1 << 7) +#define LOG_TRACK (1 << 8) +#define LOG_MOUSE (1 << 9) +#define LOG_GPIO (1 << 10) +#define LOG_INTC (1 << 11) +#define LOG_CARD (1 << 12) #define LOG_ALL (LOG_UNKNOWN | LOG_SBI | LOG_SK | LOG_USB | LOG_AUDIO | LOG_SSP | LOG_TRACK | LOG_MOUSE | LOG_GPIO | LOG_INTC | LOG_CARD) #define VERBOSE (0) // (LOG_ALL) diff --git a/src/devices/machine/sa1111.h b/src/devices/machine/sa1111.h index dc3d04d760a..03bebf06c1d 100644 --- a/src/devices/machine/sa1111.h +++ b/src/devices/machine/sa1111.h @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Intel SA1111 Microprocessor Companion Chip skeleton + Intel SA1111 Microprocessor Companion Chip skeleton ***************************************************************************/ @@ -201,248 +201,248 @@ protected: // register contents enum : uint32_t { - SKCR_PLLB_BIT = 0, - SKCR_RCLK_BIT = 1, - SKCR_SLEEP_BIT = 2, - SKCR_DOZE_BIT = 3, - SKCR_VCO_BIT = 4, - SKCR_SCANTST_BIT = 5, - SKCR_CLKTST_BIT = 6, - SKCR_RDY_BIT = 7, - SKCR_SLAC_BIT = 8, - SKCR_OPPC_BIT = 9, - SKCR_PII_BIT = 10, - SKCR_UIOTEN_BIT = 11, - SKCR_OEEN_BIT = 12, - - SMCR_DTIM_BIT = 0, - SMCR_MBGE_BIT = 1, - SMCR_DRAC_BIT = 2, - SMCR_DRAC_MASK = 0x0000001c, - SMCR_CLAT_BIT = 5, - - SKPCR_UCLKE_BIT = 0, - SKPCR_ACCLKE_BIT = 1, - SKPCR_ISCLKE_BIT = 2, - SKPCR_L3CLKE_BIT = 3, - SKPCR_SCLKE_BIT = 4, - SKPCR_PMCLKE_BIT = 5, - SKPCR_PTCLKE_BIT = 6, - SKPCR_DCLKE_BIT = 7, - SKPCR_PWMCLKE_BIT = 8, - - SKCDR_FBD_BIT = 0, - SKCDR_FBD_MASK = 0x0000007f, - SKCDR_IPD_BIT = 7, - SKCDR_IPD_MASK = 0x00000f80, - SKCDR_OPD_BIT = 12, - SKCDR_OPD_MASK = 0x00003000, - SKCDR_OPS_BIT = 14, - - SKAUD_ACD_BIT = 0, - SKAUD_ACD_MASK = 0x0000007f, - - SKPMC_PMCD_BIT = 0, - SKPMC_PMCD_MASK = 0x000000ff, - - SKPTC_PTCD_BIT = 0, - SKPTC_PTCD_MASK = 0x000000ff, - - SKPEN0_PWM0EN_BIT = 0, - - SKPWM0_PWM0CK_BIT = 0, - SKPWM0_PWM0CK_MASK = 0x000000ff, - - SKPEN1_PWM1EN_BIT = 0, - - SKPWM1_PWM1CK_BIT = 0, - SKPWM1_PWM1CK_MASK = 0x000000ff, - - USBSTAT_IHRW_BIT = 7, - USBSTAT_IHBA_BIT = 8, - USBSTAT_NHT_BIT = 9, - USBSTAT_NHFCT_BIT = 10, - USBSTAT_UPRT_BIT = 11, - - USBRST_FIR_BIT = 0, - USBRST_FHR_BIT = 1, - USBRST_CGR_BIT = 2, - USBRST_SSDC_BIT = 3, - USBRST_UIT_BIT = 4, - USBRST_SSE_BIT = 5, - USBRST_PSPL_BIT = 6, - USBRST_PCPL_BIT = 7, - - USBINT_IHRWT_BIT = 7, - USBINT_IHBAT_BIT = 8, - USBINT_NHT_BIT = 9, - USBINT_NHFCT_BIT = 10, - USBINT_UPRT_BIT = 11, - - SACR0_ENB_BIT = 0, - SACR0_BCKD_BIT = 2, - SACR0_RST_BIT = 3, - SACR0_TFTH_BIT = 8, - SACR0_TFTH_MASK = 0x00000f00, - SACR0_RFTH_BIT = 12, - SACR0_RFTH_MASK = 0x0000f000, - - SACR1_AMSL_BIT = 0, - SACR1_L3EN_BIT = 1, - SACR1_L3MB_BIT = 2, - SACR1_DREC_BIT = 3, - SACR1_DRPL_BIT = 4, - SACR1_ENLBF_BIT = 5, - - SACR2_TS3V_BIT = 0, - SACR2_TS4V_BIT = 1, - SACR2_WKUP_BIT = 2, - SACR2_DREC_BIT = 3, - SACR2_DRPL_BIT = 4, - SACR2_ENLBF_BIT = 5, - SACR2_RESET_BIT = 6, - - SASCR_TUR_BIT = 5, - SASCR_ROR_BIT = 6, - SASCR_DTS_BIT = 16, - SASCR_RDD_BIT = 17, - SASCR_STO_BIT = 18, - - SASR0_TNF_BIT = 0, - SASR0_RNE_BIT = 1, - SASR0_BSY_BIT = 2, - SASR0_TFS_BIT = 3, - SASR0_RFS_BIT = 4, - SASR0_TUR_BIT = 5, - SASR0_ROR_BIT = 6, - SASR0_TFL_BIT = 7, - SASR0_TFL_MASK = 0x00000f00, - SASR0_RFL_BIT = 12, - SASR0_RFL_MASK = 0x0000f000, - SASR0_L3WD_BIT = 16, - SASR0_L3RD_BIT = 17, - - SASR1_TNF_BIT = 0, - SASR1_RNE_BIT = 1, - SASR1_BSY_BIT = 2, - SASR1_TFS_BIT = 3, - SASR1_RFS_BIT = 4, - SASR1_TUR_BIT = 5, - SASR1_ROR_BIT = 6, - SASR1_TFL_BIT = 8, - SASR1_TFL_MASK = 0x00000f00, - SASR1_RFL_BIT = 12, - SASR1_RFL_MASK = 0x0000f000, - SASR1_CADT_BIT = 16, - SASR1_SADR_BIT = 17, - SASR1_RSTO_BIT = 18, - SASR1_CLPM_BIT = 19, - SASR1_CRDY_BIT = 20, - SASR1_RS3V_BIT = 21, - SASR1_RS4V_BIT = 22, - - SADTCS_TDEN_BIT = 0, - SADTCS_TDBDA_BIT = 3, - SADTCS_TDSTA_BIT = 4, - SADTCS_TDBDB_BIT = 5, - SADTCS_TDSTB_BIT = 6, - - SADRCS_RDEN_BIT = 0, - SADRCS_RDBDA_BIT = 3, - SADRCS_RDSTA_BIT = 4, - SADRCS_RDBDB_BIT = 5, - SADRCS_RDSTB_BIT = 6, - - SAITR_TFS_BIT = 0, - SAITR_RFS_BIT = 1, - SAITR_TUR_BIT = 2, - SAITR_ROR_BIT = 3, - SAITR_CADT_BIT = 4, - SAITR_SADR_BIT = 5, - SAITR_RSTO_BIT = 6, - SAITR_TDBDA_BIT = 8, - SAITR_TDBDB_BIT = 9, - SAITR_RDBDA_BIT = 10, - SAITR_RDBDB_BIT = 11, - - SSPCR0_DSS_BIT = 0, - SSPCR0_DSS_MASK = 0x0000000f, - SSPCR0_FRF_BIT = 4, - SSPCR0_FRF_MASK = 0x00000030, - SSPCR0_FRF_SPI = 0, - SSPCR0_FRF_SSP = 1, - SSPCR0_FRF_MWIRE = 2, - SSPCR0_FRF_RESV = 3, - SSPCR0_SSPEN_BIT = 7, - SSPCR0_SCR_BIT = 8, - SSPCR0_SCR_MASK = 0x0000ff00, - - SSPCR1_LBM_BIT = 2, - SSPCR1_SPO_BIT = 3, - SSPCR1_SPH_BIT = 4, - SSPCR1_TFT_BIT = 7, - SSPCR1_TFT_MASK = 0x00000780, - SSPCR1_RFT_BIT = 11, - SSPCR1_RFT_MASK = 0x00007800, - - SSPSR_TNF_BIT = 2, - SSPSR_RNE_BIT = 3, - SSPSR_BSY_BIT = 4, - SSPSR_TFS_BIT = 5, - SSPSR_RFS_BIT = 6, - SSPSR_ROR_BIT = 7, - SSPSR_TFL_BIT = 8, - SSPSR_TFL_MASK = 0x00000f00, - SSPSR_RFL_BIT = 12, - SSPSR_RFL_MASK = 0x0000f000, - - SSPITR_TFS_BIT = 2, - SSPITR_RFS_BIT = 3, - SSPITR_ROR_BIT = 4, - - KBDCR_FKC_BIT = 0, - KBDCR_FKD_BIT = 1, - KBDCR_ENA_BIT = 3, - - KBDSTAT_KBC_BIT = 0, - KBDSTAT_KBD_BIT = 1, - KBDSTAT_RXP_BIT = 2, - KBDSTAT_ENA_BIT = 3, - KBDSTAT_RXB_BIT = 4, - KBDSTAT_RXF_BIT = 5, - KBDSTAT_TXB_BIT = 6, - KBDSTAT_TXE_BIT = 7, - KBDSTAT_STP_BIT = 8, - - KBDCLKDIV_DV_BIT = 0, - KBDCLKDIV_DV_MASK = 0x00000003, - - PCSR_S0R_BIT = 0, - PCSR_S1R_BIT = 1, - PCSR_S0CD_BIT = 2, - PCSR_S1CD_BIT = 3, - PCSR_S0VS1_BIT = 4, - PCSR_S0VS2_BIT = 5, - PCSR_S1VS1_BIT = 6, - PCSR_S1VS2_BIT = 7, - PCSR_S0WP_BIT = 8, - PCSR_S1WP_BIT = 9, - PCSR_S0BVD1_BIT = 10, - PCSR_S0BVD2_BIT = 11, - PCSR_S1BVD1_BIT = 12, - PCSR_S1BVD2_BIT = 13, - - PCCR_S0RST_BIT = 0, - PCCR_S1RST_BIT = 1, - PCCR_S0FLT_BIT = 2, - PCCR_S1FLT_BIT = 3, - PCCR_S0PWEN_BIT = 4, - PCCR_S1PWEN_BIT = 5, - PCCR_S0PSE_BIT = 6, - PCCR_S1PSE_BIT = 7, - - PCSSR_S0SLP_BIT = 0, - PCSSR_S1SLP_BIT = 1 + SKCR_PLLB_BIT = 0, + SKCR_RCLK_BIT = 1, + SKCR_SLEEP_BIT = 2, + SKCR_DOZE_BIT = 3, + SKCR_VCO_BIT = 4, + SKCR_SCANTST_BIT = 5, + SKCR_CLKTST_BIT = 6, + SKCR_RDY_BIT = 7, + SKCR_SLAC_BIT = 8, + SKCR_OPPC_BIT = 9, + SKCR_PII_BIT = 10, + SKCR_UIOTEN_BIT = 11, + SKCR_OEEN_BIT = 12, + + SMCR_DTIM_BIT = 0, + SMCR_MBGE_BIT = 1, + SMCR_DRAC_BIT = 2, + SMCR_DRAC_MASK = 0x0000001c, + SMCR_CLAT_BIT = 5, + + SKPCR_UCLKE_BIT = 0, + SKPCR_ACCLKE_BIT = 1, + SKPCR_ISCLKE_BIT = 2, + SKPCR_L3CLKE_BIT = 3, + SKPCR_SCLKE_BIT = 4, + SKPCR_PMCLKE_BIT = 5, + SKPCR_PTCLKE_BIT = 6, + SKPCR_DCLKE_BIT = 7, + SKPCR_PWMCLKE_BIT = 8, + + SKCDR_FBD_BIT = 0, + SKCDR_FBD_MASK = 0x0000007f, + SKCDR_IPD_BIT = 7, + SKCDR_IPD_MASK = 0x00000f80, + SKCDR_OPD_BIT = 12, + SKCDR_OPD_MASK = 0x00003000, + SKCDR_OPS_BIT = 14, + + SKAUD_ACD_BIT = 0, + SKAUD_ACD_MASK = 0x0000007f, + + SKPMC_PMCD_BIT = 0, + SKPMC_PMCD_MASK = 0x000000ff, + + SKPTC_PTCD_BIT = 0, + SKPTC_PTCD_MASK = 0x000000ff, + + SKPEN0_PWM0EN_BIT = 0, + + SKPWM0_PWM0CK_BIT = 0, + SKPWM0_PWM0CK_MASK = 0x000000ff, + + SKPEN1_PWM1EN_BIT = 0, + + SKPWM1_PWM1CK_BIT = 0, + SKPWM1_PWM1CK_MASK = 0x000000ff, + + USBSTAT_IHRW_BIT = 7, + USBSTAT_IHBA_BIT = 8, + USBSTAT_NHT_BIT = 9, + USBSTAT_NHFCT_BIT = 10, + USBSTAT_UPRT_BIT = 11, + + USBRST_FIR_BIT = 0, + USBRST_FHR_BIT = 1, + USBRST_CGR_BIT = 2, + USBRST_SSDC_BIT = 3, + USBRST_UIT_BIT = 4, + USBRST_SSE_BIT = 5, + USBRST_PSPL_BIT = 6, + USBRST_PCPL_BIT = 7, + + USBINT_IHRWT_BIT = 7, + USBINT_IHBAT_BIT = 8, + USBINT_NHT_BIT = 9, + USBINT_NHFCT_BIT = 10, + USBINT_UPRT_BIT = 11, + + SACR0_ENB_BIT = 0, + SACR0_BCKD_BIT = 2, + SACR0_RST_BIT = 3, + SACR0_TFTH_BIT = 8, + SACR0_TFTH_MASK = 0x00000f00, + SACR0_RFTH_BIT = 12, + SACR0_RFTH_MASK = 0x0000f000, + + SACR1_AMSL_BIT = 0, + SACR1_L3EN_BIT = 1, + SACR1_L3MB_BIT = 2, + SACR1_DREC_BIT = 3, + SACR1_DRPL_BIT = 4, + SACR1_ENLBF_BIT = 5, + + SACR2_TS3V_BIT = 0, + SACR2_TS4V_BIT = 1, + SACR2_WKUP_BIT = 2, + SACR2_DREC_BIT = 3, + SACR2_DRPL_BIT = 4, + SACR2_ENLBF_BIT = 5, + SACR2_RESET_BIT = 6, + + SASCR_TUR_BIT = 5, + SASCR_ROR_BIT = 6, + SASCR_DTS_BIT = 16, + SASCR_RDD_BIT = 17, + SASCR_STO_BIT = 18, + + SASR0_TNF_BIT = 0, + SASR0_RNE_BIT = 1, + SASR0_BSY_BIT = 2, + SASR0_TFS_BIT = 3, + SASR0_RFS_BIT = 4, + SASR0_TUR_BIT = 5, + SASR0_ROR_BIT = 6, + SASR0_TFL_BIT = 7, + SASR0_TFL_MASK = 0x00000f00, + SASR0_RFL_BIT = 12, + SASR0_RFL_MASK = 0x0000f000, + SASR0_L3WD_BIT = 16, + SASR0_L3RD_BIT = 17, + + SASR1_TNF_BIT = 0, + SASR1_RNE_BIT = 1, + SASR1_BSY_BIT = 2, + SASR1_TFS_BIT = 3, + SASR1_RFS_BIT = 4, + SASR1_TUR_BIT = 5, + SASR1_ROR_BIT = 6, + SASR1_TFL_BIT = 8, + SASR1_TFL_MASK = 0x00000f00, + SASR1_RFL_BIT = 12, + SASR1_RFL_MASK = 0x0000f000, + SASR1_CADT_BIT = 16, + SASR1_SADR_BIT = 17, + SASR1_RSTO_BIT = 18, + SASR1_CLPM_BIT = 19, + SASR1_CRDY_BIT = 20, + SASR1_RS3V_BIT = 21, + SASR1_RS4V_BIT = 22, + + SADTCS_TDEN_BIT = 0, + SADTCS_TDBDA_BIT = 3, + SADTCS_TDSTA_BIT = 4, + SADTCS_TDBDB_BIT = 5, + SADTCS_TDSTB_BIT = 6, + + SADRCS_RDEN_BIT = 0, + SADRCS_RDBDA_BIT = 3, + SADRCS_RDSTA_BIT = 4, + SADRCS_RDBDB_BIT = 5, + SADRCS_RDSTB_BIT = 6, + + SAITR_TFS_BIT = 0, + SAITR_RFS_BIT = 1, + SAITR_TUR_BIT = 2, + SAITR_ROR_BIT = 3, + SAITR_CADT_BIT = 4, + SAITR_SADR_BIT = 5, + SAITR_RSTO_BIT = 6, + SAITR_TDBDA_BIT = 8, + SAITR_TDBDB_BIT = 9, + SAITR_RDBDA_BIT = 10, + SAITR_RDBDB_BIT = 11, + + SSPCR0_DSS_BIT = 0, + SSPCR0_DSS_MASK = 0x0000000f, + SSPCR0_FRF_BIT = 4, + SSPCR0_FRF_MASK = 0x00000030, + SSPCR0_FRF_SPI = 0, + SSPCR0_FRF_SSP = 1, + SSPCR0_FRF_MWIRE = 2, + SSPCR0_FRF_RESV = 3, + SSPCR0_SSPEN_BIT = 7, + SSPCR0_SCR_BIT = 8, + SSPCR0_SCR_MASK = 0x0000ff00, + + SSPCR1_LBM_BIT = 2, + SSPCR1_SPO_BIT = 3, + SSPCR1_SPH_BIT = 4, + SSPCR1_TFT_BIT = 7, + SSPCR1_TFT_MASK = 0x00000780, + SSPCR1_RFT_BIT = 11, + SSPCR1_RFT_MASK = 0x00007800, + + SSPSR_TNF_BIT = 2, + SSPSR_RNE_BIT = 3, + SSPSR_BSY_BIT = 4, + SSPSR_TFS_BIT = 5, + SSPSR_RFS_BIT = 6, + SSPSR_ROR_BIT = 7, + SSPSR_TFL_BIT = 8, + SSPSR_TFL_MASK = 0x00000f00, + SSPSR_RFL_BIT = 12, + SSPSR_RFL_MASK = 0x0000f000, + + SSPITR_TFS_BIT = 2, + SSPITR_RFS_BIT = 3, + SSPITR_ROR_BIT = 4, + + KBDCR_FKC_BIT = 0, + KBDCR_FKD_BIT = 1, + KBDCR_ENA_BIT = 3, + + KBDSTAT_KBC_BIT = 0, + KBDSTAT_KBD_BIT = 1, + KBDSTAT_RXP_BIT = 2, + KBDSTAT_ENA_BIT = 3, + KBDSTAT_RXB_BIT = 4, + KBDSTAT_RXF_BIT = 5, + KBDSTAT_TXB_BIT = 6, + KBDSTAT_TXE_BIT = 7, + KBDSTAT_STP_BIT = 8, + + KBDCLKDIV_DV_BIT = 0, + KBDCLKDIV_DV_MASK = 0x00000003, + + PCSR_S0R_BIT = 0, + PCSR_S1R_BIT = 1, + PCSR_S0CD_BIT = 2, + PCSR_S1CD_BIT = 3, + PCSR_S0VS1_BIT = 4, + PCSR_S0VS2_BIT = 5, + PCSR_S1VS1_BIT = 6, + PCSR_S1VS2_BIT = 7, + PCSR_S0WP_BIT = 8, + PCSR_S1WP_BIT = 9, + PCSR_S0BVD1_BIT = 10, + PCSR_S0BVD2_BIT = 11, + PCSR_S1BVD1_BIT = 12, + PCSR_S1BVD2_BIT = 13, + + PCCR_S0RST_BIT = 0, + PCCR_S1RST_BIT = 1, + PCCR_S0FLT_BIT = 2, + PCCR_S1FLT_BIT = 3, + PCCR_S0PWEN_BIT = 4, + PCCR_S1PWEN_BIT = 5, + PCCR_S0PSE_BIT = 6, + PCCR_S1PSE_BIT = 7, + + PCSSR_S0SLP_BIT = 0, + PCSSR_S1SLP_BIT = 1 }; struct sbi_regs diff --git a/src/devices/machine/scoop.cpp b/src/devices/machine/scoop.cpp index ace4ee78b81..1a254169f93 100644 --- a/src/devices/machine/scoop.cpp +++ b/src/devices/machine/scoop.cpp @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Sharp Scoop peripheral chip emulation skeleton + Sharp Scoop peripheral chip emulation skeleton ***************************************************************************/ @@ -10,8 +10,8 @@ #include "scoop.h" #define LOG_UNKNOWN (1 << 1) -#define LOG_READS (1 << 2) -#define LOG_WRITES (1 << 3) +#define LOG_READS (1 << 2) +#define LOG_WRITES (1 << 3) #define LOG_ALL (LOG_UNKNOWN | LOG_READS | LOG_WRITES) #define VERBOSE (LOG_ALL) diff --git a/src/devices/machine/scoop.h b/src/devices/machine/scoop.h index 48aae34361d..1fb0edaae66 100644 --- a/src/devices/machine/scoop.h +++ b/src/devices/machine/scoop.h @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Sharp Scoop peripheral chip emulation skeleton + Sharp Scoop peripheral chip emulation skeleton ***************************************************************************/ diff --git a/src/devices/machine/ucb1200.cpp b/src/devices/machine/ucb1200.cpp index ae88612f23b..54e68321523 100644 --- a/src/devices/machine/ucb1200.cpp +++ b/src/devices/machine/ucb1200.cpp @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Philips UCB1200 Advanced modem/audio analog front-end skeleton + Philips UCB1200 Advanced modem/audio analog front-end skeleton ***************************************************************************/ @@ -10,8 +10,8 @@ #include "ucb1200.h" #define LOG_UNKNOWN (1 << 1) -#define LOG_READS (1 << 2) -#define LOG_WRITES (1 << 3) +#define LOG_READS (1 << 2) +#define LOG_WRITES (1 << 3) #define LOG_ALL (LOG_UNKNOWN | LOG_READS | LOG_WRITES) #define VERBOSE (LOG_ALL) diff --git a/src/devices/machine/ucb1200.h b/src/devices/machine/ucb1200.h index a17104e4e96..19cf474917b 100644 --- a/src/devices/machine/ucb1200.h +++ b/src/devices/machine/ucb1200.h @@ -2,7 +2,7 @@ // copyright-holders:Ryan Holtz /*************************************************************************** - Philips UCB1200 Advanced modem/audio analog front-end skeleton + Philips UCB1200 Advanced modem/audio analog front-end skeleton ***************************************************************************/ @@ -42,81 +42,81 @@ protected: // register contents enum : uint16_t { - SIB_ZERO_BIT = 15, - - IO_INT0_BIT = 0, - ADC_INT_BIT = 11, - TSPX_INT_BIT = 12, - TSMX_INT_BIT = 13, - TCLIP_INT_BIT = 14, - ACLIP_INT_BIT = 15, - - TEL_DIV_BIT = 0, - TEL_DIV_MASK = 0x007f, - TEL_LOOP_BIT = 7, - - TEL_VOICE_ENA_BIT = 3, - TEL_CLIP_BIT = 4, - TEL_ATT_BIT = 6, - TEL_SIDE_ENA_BIT = 11, - TEL_MUTE_BIT = 13, - TEL_IN_ENA_BIT = 14, - TEL_OUT_ENA_BIT = 15, - - AUD_DIV_BIT = 0, - AUD_DIV_MASK = 0x007f, - AUD_GAIN_BIT = 7, - AUD_GAIN_MASK = 0x0f80, - - AUD_ATT_BIT = 0, - AUD_ATT_MASK = 0x001f, - AUD_CLIP_BIT = 6, - AUD_LOOP_BIT = 8, - AUD_MUTE_BIT = 13, - AUD_IN_ENA_BIT = 14, - AUD_OUT_ENA_BIT = 15, - - TSMX_POW_BIT = 0, - TSPX_POW_BIT = 1, - TSMY_POW_BIT = 2, - TSPY_POW_BIT = 3, - TSMX_GND_BIT = 4, - TSPX_GND_BIT = 5, - TSMY_GND_BIT = 6, - TSPY_GND_BIT = 7, - TSC_MODE_BIT = 8, - TSC_MODE_MASK = 0x0300, - TSC_BIAS_ENA_BIT = 11, - TSPX_LOW_BIT = 12, - TSMX_LOW_BIT = 13, - TOUCH_WRITE_MASK = 0x0fff, - - ADC_SYNC_ENA_BIT = 0, - VREFBYP_CON_BIT = 1, - ADC_INPUT_BIT = 2, - ADC_INPUT_MASK = 0x001c, - ADC_INPUT_TSPX = 0, - ADC_INPUT_TSMX = 1, - ADC_INPUT_TSPY = 2, - ADC_INPUT_TSMY = 3, - ADC_INPUT_AD0 = 4, - ADC_INPUT_AD1 = 5, - ADC_INPUT_AD2 = 6, - ADC_INPUT_AD3 = 7, - EXT_REF_ENA_BIT = 5, - ADC_START_BIT = 7, - ADC_ENA_BIT = 15, - - ADC_DATA_BIT = 5, - ADC_DATA_MASK = 0x7fe0, - ADC_DAT_VAL_BIT = 15, - - AUD_TEST_BIT = 0, - TEL_TEST_BIT = 1, - PROD_TEST_MODE_BIT = 2, - PROD_TEST_MODE_MASK = 0x003c, - DYN_VFLAG_ENA_BIT = 12, - AUD_OFF_CAN_BIT = 13 + SIB_ZERO_BIT = 15, + + IO_INT0_BIT = 0, + ADC_INT_BIT = 11, + TSPX_INT_BIT = 12, + TSMX_INT_BIT = 13, + TCLIP_INT_BIT = 14, + ACLIP_INT_BIT = 15, + + TEL_DIV_BIT = 0, + TEL_DIV_MASK = 0x007f, + TEL_LOOP_BIT = 7, + + TEL_VOICE_ENA_BIT = 3, + TEL_CLIP_BIT = 4, + TEL_ATT_BIT = 6, + TEL_SIDE_ENA_BIT = 11, + TEL_MUTE_BIT = 13, + TEL_IN_ENA_BIT = 14, + TEL_OUT_ENA_BIT = 15, + + AUD_DIV_BIT = 0, + AUD_DIV_MASK = 0x007f, + AUD_GAIN_BIT = 7, + AUD_GAIN_MASK = 0x0f80, + + AUD_ATT_BIT = 0, + AUD_ATT_MASK = 0x001f, + AUD_CLIP_BIT = 6, + AUD_LOOP_BIT = 8, + AUD_MUTE_BIT = 13, + AUD_IN_ENA_BIT = 14, + AUD_OUT_ENA_BIT = 15, + + TSMX_POW_BIT = 0, + TSPX_POW_BIT = 1, + TSMY_POW_BIT = 2, + TSPY_POW_BIT = 3, + TSMX_GND_BIT = 4, + TSPX_GND_BIT = 5, + TSMY_GND_BIT = 6, + TSPY_GND_BIT = 7, + TSC_MODE_BIT = 8, + TSC_MODE_MASK = 0x0300, + TSC_BIAS_ENA_BIT = 11, + TSPX_LOW_BIT = 12, + TSMX_LOW_BIT = 13, + TOUCH_WRITE_MASK = 0x0fff, + + ADC_SYNC_ENA_BIT = 0, + VREFBYP_CON_BIT = 1, + ADC_INPUT_BIT = 2, + ADC_INPUT_MASK = 0x001c, + ADC_INPUT_TSPX = 0, + ADC_INPUT_TSMX = 1, + ADC_INPUT_TSPY = 2, + ADC_INPUT_TSMY = 3, + ADC_INPUT_AD0 = 4, + ADC_INPUT_AD1 = 5, + ADC_INPUT_AD2 = 6, + ADC_INPUT_AD3 = 7, + EXT_REF_ENA_BIT = 5, + ADC_START_BIT = 7, + ADC_ENA_BIT = 15, + + ADC_DATA_BIT = 5, + ADC_DATA_MASK = 0x7fe0, + ADC_DAT_VAL_BIT = 15, + + AUD_TEST_BIT = 0, + TEL_TEST_BIT = 1, + PROD_TEST_MODE_BIT = 2, + PROD_TEST_MODE_MASK = 0x003c, + DYN_VFLAG_ENA_BIT = 12, + AUD_OFF_CAN_BIT = 13 }; uint16_t m_gpio_out_latch; diff --git a/src/devices/sound/ks0164.cpp b/src/devices/sound/ks0164.cpp index c52c154be2c..8fdcbf026ba 100644 --- a/src/devices/sound/ks0164.cpp +++ b/src/devices/sound/ks0164.cpp @@ -355,7 +355,7 @@ void ks0164_device::irqen_76_w(u8 data) m_cpu->set_input_line(14, CLEAR_LINE); } - // logerror("irqen_76 = %02x (%04x)\n", m_irqen_76, m_cpu->pc()); + // logerror("irqen_76 = %02x (%04x)\n", m_irqen_76, m_cpu->pc()); } u8 ks0164_device::irqen_77_r() diff --git a/src/devices/sound/multipcm.cpp b/src/devices/sound/multipcm.cpp index 3fa168f4c8b..1f3b86d83b5 100644 --- a/src/devices/sound/multipcm.cpp +++ b/src/devices/sound/multipcm.cpp @@ -690,7 +690,7 @@ void multipcm_device::sound_stream_update(sound_stream &stream, std::vector> 2) * 6; switch (spos & 3) diff --git a/src/devices/video/lc7985.cpp b/src/devices/video/lc7985.cpp index 4fe06f2f086..40c7089385b 100644 --- a/src/devices/video/lc7985.cpp +++ b/src/devices/video/lc7985.cpp @@ -136,12 +136,12 @@ void lc7985_device::ir_w(u8 data) // Set CGRAM address m_cgac = data & 0x3f; m_access_ddram = false; - busy(attotime::from_usec(40)); + busy(attotime::from_usec(40)); } else if(data & 0x20) { // Set Function m_function = data; - busy(attotime::from_usec(40)); + busy(attotime::from_usec(40)); } else if(data & 0x10) { // Cursor/Display Shift @@ -153,24 +153,24 @@ void lc7985_device::ir_w(u8 data) case 3: shift_right(); break; } - busy(attotime::from_usec(40)); + busy(attotime::from_usec(40)); } else if(data & 0x08) { // Display On/Off m_display = data; - busy(attotime::from_usec(40)); + busy(attotime::from_usec(40)); } else if(data & 0x04) { // Set Entry Mode m_entry = data; - busy(attotime::from_usec(40)); + busy(attotime::from_usec(40)); } else if(data & 0x02) { // Cursor home m_ddac = 0; m_shift = 0; m_access_ddram = true; - busy(attotime::from_usec(16400)); + busy(attotime::from_usec(16400)); } else if(data & 0x01) { // Display clear diff --git a/src/devices/video/lc7985.h b/src/devices/video/lc7985.h index 14e2005dcd9..c528646852f 100644 --- a/src/devices/video/lc7985.h +++ b/src/devices/video/lc7985.h @@ -20,7 +20,7 @@ public: u8 status_r(); void dr_w(u8 data); u8 dr_r(); - + // 5 bits used per byte, blocks of 16 lines, 80 blocks const u8 *render(); @@ -53,7 +53,7 @@ private: void shift_left(); void shift_right(); - void busy(attotime tm); + void busy(attotime tm); }; DECLARE_DEVICE_TYPE(LC7985, lc7985_device) diff --git a/src/devices/video/saa5240.cpp b/src/devices/video/saa5240.cpp index 8602b374ab0..a9336398a5a 100644 --- a/src/devices/video/saa5240.cpp +++ b/src/devices/video/saa5240.cpp @@ -240,8 +240,8 @@ WRITE_LINE_MEMBER(saa5240_device::write_scl) // active chapter - clear memory //if (BIT(m_register[8], 3)) //{ - // for (int i = 0; i < 0x3ff; i++) - // m_videoram->write_byte((m_register[8] & 0x07) * 0x400 + i, 0x20); + // for (int i = 0; i < 0x3ff; i++) + // m_videoram->write_byte((m_register[8] & 0x07) * 0x400 + i, 0x20); //} [[fallthrough]]; case 9: case 10: diff --git a/src/devices/video/sed1356.cpp b/src/devices/video/sed1356.cpp index a5c8c2bdc03..bc5b83aaf0f 100644 --- a/src/devices/video/sed1356.cpp +++ b/src/devices/video/sed1356.cpp @@ -15,21 +15,21 @@ #include "sed1356.h" #include "screen.h" -#define LOG_MISC_RD (1 << 1) -#define LOG_MISC_WR (1 << 2) -#define LOG_LCD_RD (1 << 3) -#define LOG_LCD_WR (1 << 4) -#define LOG_CRT_RD (1 << 5) -#define LOG_CRT_WR (1 << 6) -#define LOG_BITBLT_RD (1 << 7) -#define LOG_BITBLT_WR (1 << 8) -#define LOG_LUT_RD (1 << 9) -#define LOG_LUT_WR (1 << 10) -#define LOG_MPLUG_RD (1 << 11) -#define LOG_MPLUG_WR (1 << 12) -#define LOG_ALL (LOG_MISC_RD | LOG_MISC_WR | LOG_LCD_RD | LOG_LCD_WR | LOG_CRT_RD | LOG_CRT_WR | LOG_BITBLT_RD | LOG_BITBLT_WR | LOG_LUT_RD | LOG_LUT_WR | LOG_MPLUG_RD | LOG_MPLUG_WR) - -#define VERBOSE (0) // (LOG_ALL) +#define LOG_MISC_RD (1 << 1) +#define LOG_MISC_WR (1 << 2) +#define LOG_LCD_RD (1 << 3) +#define LOG_LCD_WR (1 << 4) +#define LOG_CRT_RD (1 << 5) +#define LOG_CRT_WR (1 << 6) +#define LOG_BITBLT_RD (1 << 7) +#define LOG_BITBLT_WR (1 << 8) +#define LOG_LUT_RD (1 << 9) +#define LOG_LUT_WR (1 << 10) +#define LOG_MPLUG_RD (1 << 11) +#define LOG_MPLUG_WR (1 << 12) +#define LOG_ALL (LOG_MISC_RD | LOG_MISC_WR | LOG_LCD_RD | LOG_LCD_WR | LOG_CRT_RD | LOG_CRT_WR | LOG_BITBLT_RD | LOG_BITBLT_WR | LOG_LUT_RD | LOG_LUT_WR | LOG_MPLUG_RD | LOG_MPLUG_WR) + +#define VERBOSE (0) // (LOG_ALL) #include "logmacro.h" DEFINE_DEVICE_TYPE(SED1356, sed1356_device, "sed1356", "Epson SED1356") diff --git a/src/devices/video/sed1356.h b/src/devices/video/sed1356.h index 4bd06b94fca..dc5f00ec1af 100644 --- a/src/devices/video/sed1356.h +++ b/src/devices/video/sed1356.h @@ -226,222 +226,222 @@ protected: enum { - MISC_RMS_BIT = 7, - MISC_MASK = 0x80, + MISC_RMS_BIT = 7, + MISC_MASK = 0x80, - GPCFG_GPIO1_BIT = 1, - GPCFG_GPIO2_BIT = 2, - GPCFG_GPIO3_BIT = 3, - GPCFG_MASK = 0x0e, + GPCFG_GPIO1_BIT = 1, + GPCFG_GPIO2_BIT = 2, + GPCFG_GPIO3_BIT = 3, + GPCFG_MASK = 0x0e, - GPCTRL_GPIO1_BIT = 1, - GPCTRL_GPIO2_BIT = 2, - GPCTRL_GPIO3_BIT = 3, - GPCTRL_MASK = 0x0e, + GPCTRL_GPIO1_BIT = 1, + GPCTRL_GPIO2_BIT = 2, + GPCTRL_GPIO3_BIT = 3, + GPCTRL_MASK = 0x0e, - MEMCLK_SRC_BIT = 0, - MEMCLK_DIV_BIT = 4, - MEMCLK_MASK = 0x11, + MEMCLK_SRC_BIT = 0, + MEMCLK_DIV_BIT = 4, + MEMCLK_MASK = 0x11, - LCDCLK_SRC_BIT = 0, - LCDCLK_SRC_MASK = 0x03, - LCDCLK_DIV_BIT = 4, - LCDCLK_DIV_MASK = 0x30, - LCDCLK_MASK = 0x33, + LCDCLK_SRC_BIT = 0, + LCDCLK_SRC_MASK = 0x03, + LCDCLK_DIV_BIT = 4, + LCDCLK_DIV_MASK = 0x30, + LCDCLK_MASK = 0x33, - CRTCLK_SRC_BIT = 0, - CRTCLK_SRC_MASK = 0x03, - CRTCLK_DIV_BIT = 4, - CRTCLK_DIV_MASK = 0x30, - CRTCLK_2X_BIT = 7, - CRTCLK_MASK = 0xb3, + CRTCLK_SRC_BIT = 0, + CRTCLK_SRC_MASK = 0x03, + CRTCLK_DIV_BIT = 4, + CRTCLK_DIV_MASK = 0x30, + CRTCLK_2X_BIT = 7, + CRTCLK_MASK = 0xb3, - PLUGCLK_SRC_BIT = 0, - PLUGCLK_SRC_MASK = 0x03, - PLUGCLK_DIV_BIT = 4, - PLUGCLK_DIV_MASK = 0x30, - PLUGCLK_MASK = 0x33, + PLUGCLK_SRC_BIT = 0, + PLUGCLK_SRC_MASK = 0x03, + PLUGCLK_DIV_BIT = 4, + PLUGCLK_DIV_MASK = 0x30, + PLUGCLK_MASK = 0x33, - CPUWAIT_SEL_BIT = 0, - CPUWAIT_SEL_MASK = 0x03, - CPUWAIT_MASK = 0x03, + CPUWAIT_SEL_BIT = 0, + CPUWAIT_SEL_MASK = 0x03, + CPUWAIT_MASK = 0x03, - MEMCFG_TYPE_BIT = 0, - MEMCFG_TYPE_MASK = 0x03, - MEMCFG_MASK = 0x03, + MEMCFG_TYPE_BIT = 0, + MEMCFG_TYPE_MASK = 0x03, + MEMCFG_MASK = 0x03, - MEMRFSH_RATE_BIT = 0, - MEMRFSH_RATE_MASK = 0x07, - MEMRFSH_SEL_BIT = 6, - MEMRFSH_SEL_MASK = 0xc0, - MEMRFSH_MASK = 0xc7, + MEMRFSH_RATE_BIT = 0, + MEMRFSH_RATE_MASK = 0x07, + MEMRFSH_SEL_BIT = 6, + MEMRFSH_SEL_MASK = 0xc0, + MEMRFSH_MASK = 0xc7, - DRAMTIME1_MASK = 0x03, + DRAMTIME1_MASK = 0x03, - PTYPE_TFT_PASS_BIT = 0, - PTYPE_COUNT_BIT = 1, - PTYPE_COLOR_BIT = 2, - PTYPE_FORMAT_BIT = 3, - PTYPE_WIDTH_BIT = 4, - PTYPE_WIDTH_MASK = 0x30, - PTYPE_EL_BIT = 7, - PTYPE_MASK = 0xbf, + PTYPE_TFT_PASS_BIT = 0, + PTYPE_COUNT_BIT = 1, + PTYPE_COLOR_BIT = 2, + PTYPE_FORMAT_BIT = 3, + PTYPE_WIDTH_BIT = 4, + PTYPE_WIDTH_MASK = 0x30, + PTYPE_EL_BIT = 7, + PTYPE_MASK = 0xbf, - MODRATE_MASK = 0x3f, + MODRATE_MASK = 0x3f, - LCDW_MASK = 0x7f, + LCDW_MASK = 0x7f, - LCDHBL_MASK = 0x1f, + LCDHBL_MASK = 0x1f, - TFTFPLS_MASK = 0x1f, + TFTFPLS_MASK = 0x1f, - TFTFPLW_WIDTH_BIT = 0, - TFTFPLW_WIDTH_MASK = 0x0f, - TFTFPLW_POL_BIT = 7, - TFTFPLW_MASK = 0x8f, + TFTFPLW_WIDTH_BIT = 0, + TFTFPLW_WIDTH_MASK = 0x0f, + TFTFPLW_POL_BIT = 7, + TFTFPLW_MASK = 0x8f, - LCDH_MASK = 0x03ff, + LCDH_MASK = 0x03ff, - LCDVBL_VALUE_BIT = 0, - LCDVBL_VALUE_MASK = 0x3f, - LCDVBL_STATUS_BIT = 7, - LCDVBL_MASK = 0x3f, + LCDVBL_VALUE_BIT = 0, + LCDVBL_VALUE_MASK = 0x3f, + LCDVBL_STATUS_BIT = 7, + LCDVBL_MASK = 0x3f, - TFTFPFS_MASK = 0x3f, + TFTFPFS_MASK = 0x3f, - TFTFPFW_WIDTH_BIT = 0, - TFTFPFW_WIDTH_MASK = 0x07, - TFTFPFW_POL_BIT = 7, - TFTFPFW_MASK = 0x87, + TFTFPFW_WIDTH_BIT = 0, + TFTFPFW_WIDTH_MASK = 0x07, + TFTFPFW_POL_BIT = 7, + TFTFPFW_MASK = 0x87, - LCDMODE_BPP_BIT = 0, - LCDMODE_BPP_MASK = 0x07, - LCDMODE_SWIVEN1_BIT = 4, - LCDMODE_BLANK_BIT = 7, - LCDMODE_MASK = 0x97, + LCDMODE_BPP_BIT = 0, + LCDMODE_BPP_MASK = 0x07, + LCDMODE_SWIVEN1_BIT = 4, + LCDMODE_BLANK_BIT = 7, + LCDMODE_MASK = 0x97, - LCDMISC_DPDIS_BIT = 0, - LCDMISC_DITHDIS_BIT = 1, - LCDMISC_MASK = 0x03, + LCDMISC_DPDIS_BIT = 0, + LCDMISC_DITHDIS_BIT = 1, + LCDMISC_MASK = 0x03, - LCDDS_MASK = 0x000fffff, + LCDDS_MASK = 0x000fffff, - LCDMOFS_MASK = 0x07ff, + LCDMOFS_MASK = 0x07ff, - LCDPAN_PAN_BIT = 0, - LCDPAN_PAN_MASK = 0x03, - LCDPAN_MASK = 0x03, + LCDPAN_PAN_BIT = 0, + LCDPAN_PAN_MASK = 0x03, + LCDPAN_MASK = 0x03, - LCDFIFO_MASK = 0x3f, + LCDFIFO_MASK = 0x3f, - CRTW_MASK = 0x7f, + CRTW_MASK = 0x7f, - CRTHBL_MASK = 0x3f, + CRTHBL_MASK = 0x3f, - CRTHRTS_MASK = 0x3f, + CRTHRTS_MASK = 0x3f, - CRTHRTW_WIDTH_BIT = 0, - CRTHRTW_WIDTH_MASK = 0x0f, - CRTHRTW_POL_BIT = 7, - CRTHRTW_MASK = 0x8f, + CRTHRTW_WIDTH_BIT = 0, + CRTHRTW_WIDTH_MASK = 0x0f, + CRTHRTW_POL_BIT = 7, + CRTHRTW_MASK = 0x8f, - CRTH_MASK = 0x03ff, + CRTH_MASK = 0x03ff, - CRTVBL_VALUE_BIT = 0, - CRTVBL_VALUE_MASK = 0x7f, - CRTVBL_STATUS_BIT = 7, - CRTVBL_MASK = 0xff, + CRTVBL_VALUE_BIT = 0, + CRTVBL_VALUE_MASK = 0x7f, + CRTVBL_STATUS_BIT = 7, + CRTVBL_MASK = 0xff, - CRTVRTS_MASK = 0x7f, + CRTVRTS_MASK = 0x7f, - CRTVRTW_WIDTH_BIT = 0, - CRTVRTW_WIDTH_MASK = 0x07, - CRTVRTW_POL_BIT = 7, - CRTVRTW_MASK = 0x87, + CRTVRTW_WIDTH_BIT = 0, + CRTVRTW_WIDTH_MASK = 0x07, + CRTVRTW_POL_BIT = 7, + CRTVRTW_MASK = 0x87, - CRTCTRL_PAL_BIT = 0, - CRTCTRL_SVID_BIT = 1, - CRTCTRL_DACLVL_BIT = 3, - CRTCTRL_LUMF_BIT = 4, - CRTCTRL_CHRF_BIT = 5, - CRTCTRL_MASK = 0x3b, + CRTCTRL_PAL_BIT = 0, + CRTCTRL_SVID_BIT = 1, + CRTCTRL_DACLVL_BIT = 3, + CRTCTRL_LUMF_BIT = 4, + CRTCTRL_CHRF_BIT = 5, + CRTCTRL_MASK = 0x3b, - CRTMODE_BPP_BIT = 0, - CRTMODE_BPP_MASK = 0x07, - CRTMODE_BLANK_BIT = 7, - CRTMODE_MASK = 0x87, + CRTMODE_BPP_BIT = 0, + CRTMODE_BPP_MASK = 0x07, + CRTMODE_BLANK_BIT = 7, + CRTMODE_MASK = 0x87, - CRTDS_MASK = 0x000fffff, + CRTDS_MASK = 0x000fffff, - CRTMOFS_MASK = 0x07ff, + CRTMOFS_MASK = 0x07ff, - CRTPAN_PAN_BIT = 0, - CRTPAN_PAN_MASK = 0x03, - CRTPAN_MASK = 0x03, + CRTPAN_PAN_BIT = 0, + CRTPAN_PAN_MASK = 0x03, + CRTPAN_MASK = 0x03, - CRTFIFO_MASK = 0x3f, + CRTFIFO_MASK = 0x3f, - CURCTRL_MODE_BIT = 0, - CURCTRL_MODE_MASK = 0x03, - CURCTRL_MASK = 0x03, + CURCTRL_MODE_BIT = 0, + CURCTRL_MODE_MASK = 0x03, + CURCTRL_MASK = 0x03, - CURX_SIGN_BIT = 15, - CURX_MASK = 0x83ff, + CURX_SIGN_BIT = 15, + CURX_MASK = 0x83ff, - CURY_SIGN_BIT = 15, - CURY_MASK = 0x83ff, + CURY_SIGN_BIT = 15, + CURY_MASK = 0x83ff, - CURB_MASK = 0x1f, - CURG_MASK = 0x3f, - CURR_MASK = 0x1f, + CURB_MASK = 0x1f, + CURG_MASK = 0x3f, + CURR_MASK = 0x1f, - CUR_FIFO_MASK = 0x0f, + CUR_FIFO_MASK = 0x0f, - BBCTRL0_SRCLIN_BIT = 0, - BBCTRL0_DSTLIN_BIT = 1, - BBCTRL0_FULL_BIT = 4, - BBCTRL0_HALF_BIT = 5, - BBCTRL0_ANY_BIT = 6, - BBCTRL0_ACTIVE_BIT = 7, - BBCTRL0_WR_MASK = 0x03, + BBCTRL0_SRCLIN_BIT = 0, + BBCTRL0_DSTLIN_BIT = 1, + BBCTRL0_FULL_BIT = 4, + BBCTRL0_HALF_BIT = 5, + BBCTRL0_ANY_BIT = 6, + BBCTRL0_ACTIVE_BIT = 7, + BBCTRL0_WR_MASK = 0x03, - BBCTRL1_COLFMT_BIT = 0, - BBCTRL1_FIFO_DEPTH_BIT = 4, - BBCTRL1_WR_MASK = 0x11, + BBCTRL1_COLFMT_BIT = 0, + BBCTRL1_FIFO_DEPTH_BIT = 4, + BBCTRL1_WR_MASK = 0x11, - BBCODE_MASK = 0x0f, + BBCODE_MASK = 0x0f, - BBOP_MASK = 0x0f, + BBOP_MASK = 0x0f, - BBSRC_MASK = 0x001fffff, - BBDST_MASK = 0x001fffff, + BBSRC_MASK = 0x001fffff, + BBDST_MASK = 0x001fffff, - BBMADR_MASK = 0x07ff, + BBMADR_MASK = 0x07ff, - BBWIDTH_MASK = 0x03ff, + BBWIDTH_MASK = 0x03ff, - BBHEIGHT_MASK = 0x03ff, + BBHEIGHT_MASK = 0x03ff, - LUTMODE_MODE_BIT = 0, - LUTMODE_MODE_MASK = 0x03, - LUTMODE_MASK = 0x03, + LUTMODE_MODE_BIT = 0, + LUTMODE_MODE_MASK = 0x03, + LUTMODE_MASK = 0x03, - LUTDATA_BIT = 4, - LUTDATA_MASK = 0xf0, + LUTDATA_BIT = 4, + LUTDATA_MASK = 0xf0, - PWRCFG_ENABLE_BIT = 0, - PWRCFG_MASK = 0x01, + PWRCFG_ENABLE_BIT = 0, + PWRCFG_MASK = 0x01, - PWRSTAT_MCPSS_BIT = 0, - PWRSTAT_LCDPSS_BIT = 1, - PWRSTAT_MASK = 0x03, + PWRSTAT_MCPSS_BIT = 0, + PWRSTAT_LCDPSS_BIT = 1, + PWRSTAT_MASK = 0x03, - WATCHDOG_MASK = 0x3f, + WATCHDOG_MASK = 0x3f, - DISPMODE_MODE_BIT = 0, - DISPMODE_MODE_MASK = 0x07, - DISPMODE_SWIVEN0_BIT = 6, - DISPMODE_MASK = 0x47 + DISPMODE_MODE_BIT = 0, + DISPMODE_MODE_MASK = 0x07, + DISPMODE_SWIVEN0_BIT = 6, + DISPMODE_MASK = 0x47 }; uint8_t m_misc; diff --git a/src/lib/util/chdcd.cpp b/src/lib/util/chdcd.cpp index 605b629c623..92958105500 100644 --- a/src/lib/util/chdcd.cpp +++ b/src/lib/util/chdcd.cpp @@ -1147,7 +1147,7 @@ chd_error chdcd_parse_cue(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i ----------------------------------------------------------------------------------------*/ /** - * Dreamcast GDI has two images on one disc, SINGLE-DENSITY and HIGH-DENSITY. + * Dreamcast GDI has two images on one disc, SINGLE-DENSITY and HIGH-DENSITY. * * Redump stores both images in a single .cue with a REM comment separating the images. * This multi-cue format replaces the old flawed .gdi format. @@ -1158,7 +1158,7 @@ chd_error chdcd_parse_cue(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i * indicating the Redump multi-cue format and therefore a Dreamcast GDI disc. */ -bool chdcd_is_gdicue(const char *tocfname) +bool chdcd_is_gdicue(const char *tocfname) { FILE *infile; bool has_rem_singledensity = false; @@ -1214,7 +1214,7 @@ bool chdcd_is_gdicue(const char *tocfname) * Pattern III - (SD) DATA + AUDIO, (HD) DATA + ... + DATA * * TOSEC layout is preferred and this code adjusts the TOC and INFO generated by a Redump .cue to match the - * layout from a TOSEC .gdi. + * layout from a TOSEC .gdi. */ chd_error chdcd_parse_gdicue(const char *tocfname, cdrom_toc &outtoc, chdcd_track_input_info &outinfo) @@ -1340,7 +1340,7 @@ chd_error chdcd_parse_gdicue(const char *tocfname, cdrom_toc &outtoc, chdcd_trac outinfo.track[trknum].fname.assign(lastfname); // default filename to the last one #if 0 - printf("trk %d: fname %s offset %d area %d\n", trknum, outinfo.track[trknum].fname.c_str(), outinfo.track[trknum].offset, outtoc.tracks[trknum].multicuearea); + printf("trk %d: fname %s offset %d area %d\n", trknum, outinfo.track[trknum].fname.c_str(), outinfo.track[trknum].offset, outtoc.tracks[trknum].multicuearea); #endif cdrom_convert_type_string_to_track_info(token, &outtoc.tracks[trknum]); @@ -1676,7 +1676,7 @@ chd_error chdcd_parse_toc(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i if (strstr(tocftemp,".cue")) { - if (chdcd_is_gdicue(tocfname)) + if (chdcd_is_gdicue(tocfname)) return chdcd_parse_gdicue(tocfname, outtoc, outinfo); else return chdcd_parse_cue(tocfname, outtoc, outinfo); diff --git a/src/mame/drivers/altair.cpp b/src/mame/drivers/altair.cpp index d61d7979bce..785b6ef3301 100644 --- a/src/mame/drivers/altair.cpp +++ b/src/mame/drivers/altair.cpp @@ -129,7 +129,7 @@ void altair_state::altair(machine_config &config) rs232.rxd_handler().set("acia", FUNC(acia6850_device::write_rxd)); rs232.dcd_handler().set("acia", FUNC(acia6850_device::write_dcd)); rs232.cts_handler().set("acia", FUNC(acia6850_device::write_cts)); - rs232.txc_handler().set("brg", FUNC(f4702_device::im_w)); // molex pin 7 to be connected to cable pin 15 + rs232.txc_handler().set("brg", FUNC(f4702_device::im_w)); // molex pin 7 to be connected to cable pin 15 f4702_device &brg(F4702(config, "brg", 2.4576_MHz_XTAL)); brg.s_callback().set_ioport("BAUD"); diff --git a/src/mame/drivers/apple2.cpp b/src/mame/drivers/apple2.cpp index 6de9310a98f..0a18f7ca088 100644 --- a/src/mame/drivers/apple2.cpp +++ b/src/mame/drivers/apple2.cpp @@ -1330,7 +1330,7 @@ static void apple2_cards(device_slot_interface &device) // device.option_add("magicmusician", A2BUS_MAGICMUSICIAN); /* Magic Musician Card */ device.option_add("byte8251", A2BUS_BYTE8251); /* BYTE Magazine 8251 serial card */ device.option_add("suprterm", A2BUS_SUPRTERMINAL); /* M&R Enterprises SUP'R'TERMINAL 80-column card */ - device.option_add("uniprint", A2BUS_UNIPRINT); /* Videx Uniprint parallel printer card */ + device.option_add("uniprint", A2BUS_UNIPRINT); /* Videx Uniprint parallel printer card */ device.option_add("ccs7710", A2BUS_CCS7710); /* California Computer Systems Model 7710 Asynchronous Serial Interface */ } diff --git a/src/mame/drivers/asteroid.cpp b/src/mame/drivers/asteroid.cpp index 4441e09e965..e77acc57dc5 100644 --- a/src/mame/drivers/asteroid.cpp +++ b/src/mame/drivers/asteroid.cpp @@ -347,7 +347,7 @@ void asteroid_state::astdelux_map(address_map &map) map(0x0300, 0x03ff).bankrw("ram2"); map(0x2000, 0x2007).r(FUNC(asteroid_state::asteroid_IN0_r)).nopw(); // IN0 map(0x2400, 0x2407).r(FUNC(asteroid_state::asteroid_IN1_r)).nopw(); // IN1 - map(0x2800, 0x2803).r(FUNC(asteroid_state::asteroid_DSW1_r)); // DSW1 + map(0x2800, 0x2803).r(FUNC(asteroid_state::asteroid_DSW1_r)); // DSW1 map(0x2c00, 0x2c0f).rw("pokey", FUNC(pokey_device::read), FUNC(pokey_device::write)); map(0x2c40, 0x2c7f).r(FUNC(asteroid_state::earom_read)); map(0x3000, 0x3000).w(m_dvg, FUNC(dvg_device::go_w)); diff --git a/src/mame/drivers/atarig1.cpp b/src/mame/drivers/atarig1.cpp index e0e0abd1212..cd5854db8b0 100644 --- a/src/mame/drivers/atarig1.cpp +++ b/src/mame/drivers/atarig1.cpp @@ -1335,7 +1335,7 @@ void atarig1_state::init_pitfightb() m_maincpu->space(AS_PROGRAM).install_readwrite_tap(0x38000, 0x3ffff, 0, "slapstic", [this](offs_t offset, u16 &data, u16 mem_mask) { pitfightb_cheap_slapstic_tweak(offset >> 1); }, [this](offs_t offset, u16 &data, u16 mem_mask) { pitfightb_cheap_slapstic_tweak(offset >> 1); }); - + /* not primed by default */ m_bslapstic_primed = false; diff --git a/src/mame/drivers/blit.cpp b/src/mame/drivers/blit.cpp index f80bb32b90c..91004ab15a1 100644 --- a/src/mame/drivers/blit.cpp +++ b/src/mame/drivers/blit.cpp @@ -105,21 +105,21 @@ void blit_state::blit_mem(address_map &map) map(0x000000, 0x03ffff).ram().share("p_ram"); map(0x040000, 0x045fff).rom().region(M68K_TAG, 0); // octal 0000, 0002 - 16-bit -// map(0x060000, 0x060003).r(FUNC(blit_state::mouse_xy)); +// map(0x060000, 0x060003).r(FUNC(blit_state::mouse_xy)); // octal 0011, 0013 - 8-bit - host map(0x060008, 0x060009).rw(m_acia0, FUNC(acia6850_device::status_r), FUNC(acia6850_device::control_w)); map(0x06000a, 0x06000b).rw(m_acia0, FUNC(acia6850_device::data_r), FUNC(acia6850_device::data_w)); // octal 0021 - 8-bit -// map(0x060010, 0x060011).r(FUNC(blit_state::mouse_buttons)).mask(0x00ff); +// map(0x060010, 0x060011).r(FUNC(blit_state::mouse_buttons)).mask(0x00ff); // octal 0025 - mirror -// map(0x060014, 0x060015).r(FUNC(blit_state::mouse_buttons)).mask(0x00ff); +// map(0x060014, 0x060015).r(FUNC(blit_state::mouse_buttons)).mask(0x00ff); // octal 0027 - ??? // octal 0030 - 16-bit map(0x060018, 0x060019).w(FUNC(blit_state::start_write)); // octal 0040 - 16-bit map(0x060020, 0x060029).ram().share("misccr"); // octal 0050 - 16-bit -// map(0x060028, 0x060029).w(FUNC(blit_state::init_write)); +// map(0x060028, 0x060029).w(FUNC(blit_state::init_write)); // octal 0060, 0062 - 8-bit - keyboard map(0x060030, 0x060031).rw(m_acia1, FUNC(acia6850_device::status_r), FUNC(acia6850_device::control_w)); map(0x060032, 0x060033).rw(m_acia1, FUNC(acia6850_device::data_r), FUNC(acia6850_device::data_w)); diff --git a/src/mame/drivers/bnstars.cpp b/src/mame/drivers/bnstars.cpp index 9b8a082eedf..fdbcfea3228 100644 --- a/src/mame/drivers/bnstars.cpp +++ b/src/mame/drivers/bnstars.cpp @@ -132,7 +132,7 @@ private: // TODO: subclass this device for dual screen config required_device m_sysctrl; - + required_device_array m_screen; required_device_array m_gfxdecode; @@ -177,9 +177,9 @@ private: template u32 screen_update_dual(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void bnstars_map(address_map &map); void bnstars_sound_map(address_map &map); - + void bnstars1_mahjong_select_w(u32 data); - + required_device_array m_ymf; }; @@ -241,7 +241,7 @@ template void ms32_bnstars_state::object_vram_w(offs_t offset, u16 da template TILE_GET_INFO_MEMBER(ms32_bnstars_state::get_ascii_tile_info) { int tileno, colour; -// const int gfx_region[2] = {2, 5}; +// const int gfx_region[2] = {2, 5}; tileno = m_ascii_vram[chip][tile_index *2+0] & 0x0000ffff; colour = m_ascii_vram[chip][tile_index *2+1] & 0x0000000f; @@ -252,7 +252,7 @@ template TILE_GET_INFO_MEMBER(ms32_bnstars_state::get_ascii_tile_info template TILE_GET_INFO_MEMBER(ms32_bnstars_state::get_scroll_tile_info) { int tileno, colour; -// const int gfx_region[2] = {1, 4}; +// const int gfx_region[2] = {1, 4}; tileno = m_scroll_vram[chip][tile_index *2+0] & 0x0000ffff; colour = m_scroll_vram[chip][tile_index *2+1] & 0x0000000f; @@ -263,7 +263,7 @@ template TILE_GET_INFO_MEMBER(ms32_bnstars_state::get_scroll_tile_inf template TILE_GET_INFO_MEMBER(ms32_bnstars_state::get_rotate_tile_info) { int tileno, colour; -// const int gfx_region[2] = {0, 3}; +// const int gfx_region[2] = {0, 3}; tileno = m_rotate_vram[chip][tile_index *2+0] & 0x0000ffff; colour = m_rotate_vram[chip][tile_index *2+1] & 0x0000000f; @@ -345,16 +345,16 @@ template void ms32_bnstars_state::draw_sprites(screen_device &screen, // there are surely also shadows (see gametngk) but how they're enabled we don't know -/* if (m_flipscreen) - { - int yscale = 0x1000000/yzoom; - int xscale = 0x1000000/xzoom; +/* if (m_flipscreen) + { + int yscale = 0x1000000/yzoom; + int xscale = 0x1000000/xzoom; - sx = 320 - ((xsize*xscale)>>16) - sx; - sy = 224 - ((ysize*yscale)>>16) - sy; - flipx = !flipx; - flipy = !flipy; - }*/ + sx = 320 - ((xsize*xscale)>>16) - sx; + sy = 224 - ((ysize*yscale)>>16) - sy; + flipx = !flipx; + flipy = !flipy; + }*/ pri >>= 4; if (pri == 0x0) @@ -445,7 +445,7 @@ CUSTOM_INPUT_MEMBER(ms32_bnstars_state::mahjong_ctrl_r) void ms32_bnstars_state::bnstars1_mahjong_select_w(u32 data) { m_bnstars1_mahjong_select = data; -// logerror("%08x\n",m_bnstars1_mahjong_select); +// logerror("%08x\n",m_bnstars1_mahjong_select); } void ms32_bnstars_state::bnstars_map(address_map &map) @@ -461,8 +461,8 @@ void ms32_bnstars_state::bnstars_map(address_map &map) map(0xfce00000, 0xfce0005f).m(m_sysctrl, FUNC(jaleco_ms32_sysctrl_device::amap)).umask32(0x0000ffff); map(0xfce00200, 0xfce0027f).ram().share("sprite_ctrl"); -// map(0xfce00280, 0xfce0028f) // left screen brightness control -// map(0xfce00300, 0xfce0030f) // right screen brightness control +// map(0xfce00280, 0xfce0028f) // left screen brightness control +// map(0xfce00300, 0xfce0030f) // right screen brightness control map(0xfce00400, 0xfce0045f).writeonly().share("rotate_ctrl.0"); map(0xfce00700, 0xfce0075f).writeonly().share("rotate_ctrl.1"); // guess map(0xfce00a00, 0xfce00a17).writeonly().share("ascii_ctrl.0"); @@ -480,7 +480,7 @@ void ms32_bnstars_state::bnstars_map(address_map &map) // for some reason ***38*** isn't accessed by these two map(0xfd200000, 0xfd23ffff).rw(FUNC(ms32_bnstars_state::palette_ram_r<1>), FUNC(ms32_bnstars_state::palette_ram_w<1>)).umask32(0x0000ffff); map(0xfd400000, 0xfd43ffff).rw(FUNC(ms32_bnstars_state::palette_ram_r<0>), FUNC(ms32_bnstars_state::palette_ram_w<0>)).umask32(0x0000ffff); - + map(0xfe000000, 0xfe01ffff).rw(FUNC(ms32_bnstars_state::rotate_vram_r<1>), FUNC(ms32_bnstars_state::rotate_vram_w<1>)).umask32(0x0000ffff); map(0xfe400000, 0xfe41ffff).rw(FUNC(ms32_bnstars_state::rotate_vram_r<0>), FUNC(ms32_bnstars_state::rotate_vram_w<0>)).umask32(0x0000ffff); @@ -675,17 +675,17 @@ void ms32_bnstars_state::bnstars(machine_config &config) m_audiocpu->set_addrmap(AS_PROGRAM, &ms32_bnstars_state::bnstars_sound_map); config.set_maximum_quantum(attotime::from_hz(60000)); - + config.set_default_layout(layout_dualhsxs); for (unsigned i=0; i < 2; i++) { PALETTE(config, m_palette[i]).set_entries(0x8000); - + SCREEN(config, m_screen[i], SCREEN_TYPE_RASTER); m_screen[i]->set_raw(XTAL(48'000'000)/8, 384, 0, 320, 263, 0, 224); // default CRTC setup m_screen[i]->set_palette(m_palette[i]); - + JALECO_MEGASYSTEM32_SPRITE(config, m_sprite[i], XTAL(48'000'000)); // 48MHz for video? m_sprite[i]->set_palette(m_palette[i]); m_sprite[i]->set_color_base(0); @@ -704,9 +704,9 @@ void ms32_bnstars_state::bnstars(machine_config &config) m_sysctrl->prg_timer_cb().set(FUNC(ms32_bnstars_state::timer_irq_w)); m_sysctrl->sound_ack_cb().set(FUNC(ms32_bnstars_state::sound_ack_w)); m_sysctrl->sound_reset_cb().set(FUNC(ms32_bnstars_state::sound_reset_line_w)); -// TODO: runs better with this on but eventually game crashes during match presentation -// (may be due of the field irq positioning) -// m_sysctrl->set_invert_vblank_lines(true); +// TODO: runs better with this on but eventually game crashes during match presentation +// (may be due of the field irq positioning) +// m_sysctrl->set_invert_vblank_lines(true); /* sound hardware */ SPEAKER(config, "lspeaker").front_left(); @@ -719,7 +719,7 @@ void ms32_bnstars_state::bnstars(machine_config &config) m_ymf[0]->add_route(0, "lspeaker", 1.0); m_ymf[0]->add_route(1, "rspeaker", 1.0); // Output 2/3 not used? -// m_ymf[0]->add_route(2, "lspeaker", 1.0); +// m_ymf[0]->add_route(2, "lspeaker", 1.0); // m_ymf[0]->add_route(3, "rspeaker", 1.0); YMF271(config, m_ymf[1], XTAL(16'934'400)); // 16.9344MHz diff --git a/src/mame/drivers/cninja.cpp b/src/mame/drivers/cninja.cpp index c203b6da185..abdbb6d596b 100644 --- a/src/mame/drivers/cninja.cpp +++ b/src/mame/drivers/cninja.cpp @@ -151,7 +151,7 @@ void cninja_state::cninjabl2_map(address_map &map) map(0x180000, 0x18ffff).ram(); map(0x1b4000, 0x1b4001).r(FUNC(cninja_state::cninjabl2_sprite_dma_r)); -} +} uint16_t cninja_state::edrandy_protection_region_8_146_r(offs_t offset) { diff --git a/src/mame/drivers/coleco.cpp b/src/mame/drivers/coleco.cpp index 20c6b063f43..325a27836e9 100644 --- a/src/mame/drivers/coleco.cpp +++ b/src/mame/drivers/coleco.cpp @@ -100,7 +100,7 @@ void coleco_state::paddle_on_w(uint8_t data) void bit90_state::init() { auto pgm = &m_maincpu->space(AS_PROGRAM); - + if(m_ram->size() == 32768) return; else if(m_ram->size() == 16384) @@ -709,7 +709,7 @@ ROM_END Circuit board is labelled: BIT90C-PAL-90002 or BIT90C-PAL-90003 BIT90C-PAL-90002 has 2K Internal RAM (<1K Usable from BASIC) - Extra RAM can only be accessed via expansion port + Extra RAM can only be accessed via expansion port BIT90C-PAL-90003 has sockets for additional internal 16K or 32K internal RAM diff --git a/src/mame/drivers/dccons.cpp b/src/mame/drivers/dccons.cpp index 4ed77856882..cb4e1219630 100644 --- a/src/mame/drivers/dccons.cpp +++ b/src/mame/drivers/dccons.cpp @@ -750,9 +750,9 @@ struct factory_sector char total_number[16]; uint8_t sum; // byte sum of above struct { - uint8_t sum_inv; // ~(UID byte sum) - uint8_t sum; // UID byte sum - uint8_t id[6]; // UID + uint8_t sum_inv; // ~(UID byte sum) + uint8_t sum; // UID byte sum + uint8_t id[6]; // UID } machine_id; uint8_t machine_type; // FF - Dreamcast uint8_t machine_version;// FF - VA0, FE - VA1, FD - VA2, NOTE: present in 1st factory record only, in 2nd always FF diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp index 9750b38a139..4500e2a05db 100644 --- a/src/mame/drivers/dec0.cpp +++ b/src/mame/drivers/dec0.cpp @@ -464,7 +464,7 @@ void dec0_state::ffantasybl_map(address_map &map) map(0x00242024, 0x00242025).r(FUNC(dec0_state::ffantasybl_242024_r)); map(0x00ff87ee, 0x00ff87ef).portr("VBLANK"); } - + void dec0_state::dec0_tb_map(address_map &map) { dec0_map(map); diff --git a/src/mame/drivers/design.cpp b/src/mame/drivers/design.cpp index 8ff32f91abb..44dacff6803 100644 --- a/src/mame/drivers/design.cpp +++ b/src/mame/drivers/design.cpp @@ -6,16 +6,16 @@ Tobacco vending machines - Hardware: - - Intel P8051 - - 27C256 EPROM - - NEC D446C-2 SRAM - - OKI M62X428 RTC - - Rockwell 10937P-50 A8201-17 display controller + Hardware: + - Intel P8051 + - 27C256 EPROM + - NEC D446C-2 SRAM + - OKI M62X428 RTC + - Rockwell 10937P-50 A8201-17 display controller TODO: - - The coin mech isn't emulated. It's an Azkoyen L66S coin selector, - which uses a PIC16C76/PIC16F76 (undumped). + - The coin mech isn't emulated. It's an Azkoyen L66S coin selector, + which uses a PIC16C76/PIC16F76 (undumped). ***************************************************************************/ @@ -85,7 +85,7 @@ void design6_state::io_map(address_map &map) void design6_state::iobanked_map(address_map &map) { map(0x00000, 0x00000).portr("in0"); -// map(0x00000, 0x00007).w // coin return motor +// map(0x00000, 0x00007).w // coin return motor map(0x00010, 0x00010).portr("in1"); map(0x00015, 0x00015).lw8(NAME([this] (uint8_t data) { m_vfd->data(BIT(data, 0)); })); map(0x00016, 0x00016).lw8(NAME([this] (uint8_t data) { m_vfd->sclk(BIT(data, 0)); })); diff --git a/src/mame/drivers/easy_karaoke.cpp b/src/mame/drivers/easy_karaoke.cpp index f7c363d340e..b38b85c2550 100644 --- a/src/mame/drivers/easy_karaoke.cpp +++ b/src/mame/drivers/easy_karaoke.cpp @@ -2,54 +2,54 @@ // copyright-holders:David Haywood /****************************************************************************** - Easy Karaoke (c)IVL Technologies + Easy Karaoke (c)IVL Technologies - A version of this was also released in France by Lexibook, with French songs + A version of this was also released in France by Lexibook, with French songs - This uses + This uses - Clarity 4.3 ARM - SVI1186 - NV0165 0317 - Sound Vision Inc. + Clarity 4.3 ARM + SVI1186 + NV0165 0317 + Sound Vision Inc. - an overview for 4.1 and 4.2 can be found at - http://web.archive.org/web/20031212120255fw_/http://www.soundvisioninc.com/OEMProducts/C4datasheet072401.pdf - Amusingly this datasheet advertises 'MAME Game emulation' as one of the capabilities despite the chip - clocking in at only 72Mhz + an overview for 4.1 and 4.2 can be found at + http://web.archive.org/web/20031212120255fw_/http://www.soundvisioninc.com/OEMProducts/C4datasheet072401.pdf + Amusingly this datasheet advertises 'MAME Game emulation' as one of the capabilities despite the chip + clocking in at only 72Mhz - Support chip is + Support chip is - IVL - Technologies - ICS0253R1.0 - UA1068ABK-RD - 0327 A01491F + IVL + Technologies + ICS0253R1.0 + UA1068ABK-RD + 0327 A01491F - RAM chip is + RAM chip is - IC42S16400-7T + IC42S16400-7T - ROM is + ROM is - IVL - Technologies - ICS0303-B - (c)1985-1986 - 3415BAI THAI + IVL + Technologies + ICS0303-B + (c)1985-1986 + 3415BAI THAI - -------------- + -------------- - Cartridges contain: + Cartridges contain: - 1x MX 29LV040TC-90 (Flash ROM) + 1x MX 29LV040TC-90 (Flash ROM) - 1x HC573A + 1x HC573A - 1x ICSI IC89LV52A-24PQ (80C52 MCU with 8KBytes Flash memory, can be read protected) + 1x ICSI IC89LV52A-24PQ (80C52 MCU with 8KBytes Flash memory, can be read protected) - presumably manages a serial protocol to send data to the main unit + presumably manages a serial protocol to send data to the main unit *******************************************************************************/ @@ -172,7 +172,7 @@ void easy_karaoke_state::easy_karaoke(machine_config &config) ROM_START( easykara ) ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD( "ics0303-b.bin", 0x000000, 0x400000, CRC(43d86ae8) SHA1(219dcbf72b92d1b7e00f78f237194ab47dc08f1b) ) + ROM_LOAD( "ics0303-b.bin", 0x000000, 0x400000, CRC(43d86ae8) SHA1(219dcbf72b92d1b7e00f78f237194ab47dc08f1b) ) ROM_END CONS( 2004, easykara, 0, 0, easy_karaoke, easy_karaoke, easy_karaoke_state, empty_init, "IVL Technologies", "Easy Karaoke Groove Station", MACHINE_IS_SKELETON ) diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp index 5827fd22c39..4474e9c7f21 100644 --- a/src/mame/drivers/galaxian.cpp +++ b/src/mame/drivers/galaxian.cpp @@ -7116,7 +7116,7 @@ void galaxian_state::bongo(machine_config &config) // alternate memory map m_maincpu->set_addrmap(AS_PROGRAM, &galaxian_state::bongo_map); m_maincpu->set_addrmap(AS_IO, &galaxian_state::bongo_io_map); - + // sound hardware AY8910(config, m_ay8910[0], GALAXIAN_PIXEL_CLOCK/3/4); m_ay8910[0]->port_a_read_callback().set_ioport("DSW"); diff --git a/src/mame/drivers/galpani2.cpp b/src/mame/drivers/galpani2.cpp index 21a45493426..ccc14aa33b1 100644 --- a/src/mame/drivers/galpani2.cpp +++ b/src/mame/drivers/galpani2.cpp @@ -225,7 +225,7 @@ void galpani2_state::galpani2_mcu_nmi1() } break; } - + //case 0x10: //? Clear gal? //case 0x14: //? Display gal? //until diff --git a/src/mame/drivers/generalplus_gpl16250_spi_direct.cpp b/src/mame/drivers/generalplus_gpl16250_spi_direct.cpp index 702330fc9f8..e3228b07856 100644 --- a/src/mame/drivers/generalplus_gpl16250_spi_direct.cpp +++ b/src/mame/drivers/generalplus_gpl16250_spi_direct.cpp @@ -1,9 +1,9 @@ // license:BSD-3-Clause // copyright-holders:David Haywood /* - These seem to be GPL16250 related based on video register use - however the SPI ROM maps directly into CPU space, where you'd - expect internal ROM to be?! + These seem to be GPL16250 related based on video register use + however the SPI ROM maps directly into CPU space, where you'd + expect internal ROM to be?! */ #include "emu.h" diff --git a/src/mame/drivers/hp3478a.cpp b/src/mame/drivers/hp3478a.cpp index 9e76b665cda..0b60f490a15 100644 --- a/src/mame/drivers/hp3478a.cpp +++ b/src/mame/drivers/hp3478a.cpp @@ -181,7 +181,7 @@ protected: uint8_t m_lcd_chrbuf[12]; //raw digits (not ASCII) uint8_t m_lcd_text[13]; //mapped to ASCII, only for debug output uint32_t m_lcd_segdata[12]; - bool m_lcd_annuns[12]; //local copy of annunciators + bool m_lcd_annuns[12]; //local copy of annunciators /////////////////////////// diff --git a/src/mame/drivers/innotv_innotabmax.cpp b/src/mame/drivers/innotv_innotabmax.cpp index 7eaac55cc5a..38ebc52d5f4 100644 --- a/src/mame/drivers/innotv_innotabmax.cpp +++ b/src/mame/drivers/innotv_innotabmax.cpp @@ -30,30 +30,30 @@ The following pinout was used for the InnoTV / InnoTab MAX cartridges - +---------------------+ - | |--+ - | |--| I/O8 - | |--| I/O7 - | +---------------+ |--| I/O6 - | ||||||||||||||||| |--| I/O5 - | | | |--| ? - | | NAND | |--| I/O1 - | | | |--| I/O2 - | | | |--| I/O3 - | | | |--| I/O4 - | |TC58NVG1S3HTA00| |--| GND - | | | |--| GND - | | | |--| CLE - | | | |--| ALE - | | | |--| WE - | | | |--| WP - | | | |--| VCC - | ||||||||||||||||| |--| VCC - | +---------------+ |--| CE - | |--| RE - | |--| RY/BY - | |--+ - +---------------------+ + +---------------------+ + | |--+ + | |--| I/O8 + | |--| I/O7 + | +---------------+ |--| I/O6 + | ||||||||||||||||| |--| I/O5 + | | | |--| ? + | | NAND | |--| I/O1 + | | | |--| I/O2 + | | | |--| I/O3 + | | | |--| I/O4 + | |TC58NVG1S3HTA00| |--| GND + | | | |--| GND + | | | |--| CLE + | | | |--| ALE + | | | |--| WE + | | | |--| WP + | | | |--| VCC + | ||||||||||||||||| |--| VCC + | +---------------+ |--| CE + | |--| RE + | |--| RY/BY + | |--+ + +---------------------+ *******************************************************************************/ diff --git a/src/mame/drivers/itech8.cpp b/src/mame/drivers/itech8.cpp index 51eb1960679..276963c6077 100644 --- a/src/mame/drivers/itech8.cpp +++ b/src/mame/drivers/itech8.cpp @@ -1953,7 +1953,7 @@ void itech8_state::ninclown(machine_config &config) itech8_core_devices(config); itech8_sound_ym3812_external(config); - // m_nvram->set_custom_handler([this](nvram_device &, void *p, size_t s) { memcpy(p, memregion("maincpu")->base(), s); }, "vectors"); + // m_nvram->set_custom_handler([this](nvram_device &, void *p, size_t s) { memcpy(p, memregion("maincpu")->base(), s); }, "vectors"); M68000(config, m_maincpu, CLOCK_12MHz); m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::ninclown_map); diff --git a/src/mame/drivers/jornada.cpp b/src/mame/drivers/jornada.cpp index 8d063e27bbf..903a6b642ce 100644 --- a/src/mame/drivers/jornada.cpp +++ b/src/mame/drivers/jornada.cpp @@ -18,10 +18,10 @@ #include "screen.h" #include "emupal.h" -#define LOG_MCU (1 << 1) -#define LOG_ALL (LOG_MCU) +#define LOG_MCU (1 << 1) +#define LOG_ALL (LOG_MCU) -#define VERBOSE (LOG_ALL) +#define VERBOSE (LOG_ALL) #include "logmacro.h" #define SA1110_CLOCK 206000000 @@ -230,14 +230,14 @@ INPUT_CHANGED_MEMBER(jornada_state::key_changed) uint8_t scan_code = 0; switch (param) { - case KEY_ON_OFF: scan_code = 0x7f; break; - case KEY_S: scan_code = 0x32; break; - case KEY_K: scan_code = 0x38; break; - case KEY_1: scan_code = 0x11; break; - case KEY_2: scan_code = 0x12; break; - case KEY_3: scan_code = 0x13; break; - case KEY_4: scan_code = 0x14; break; - case KEY_9: scan_code = 0x19; break; + case KEY_ON_OFF: scan_code = 0x7f; break; + case KEY_S: scan_code = 0x32; break; + case KEY_K: scan_code = 0x38; break; + case KEY_1: scan_code = 0x11; break; + case KEY_2: scan_code = 0x12; break; + case KEY_3: scan_code = 0x13; break; + case KEY_4: scan_code = 0x14; break; + case KEY_9: scan_code = 0x19; break; default: return; } diff --git a/src/mame/drivers/kpython.cpp b/src/mame/drivers/kpython.cpp index ee33dae6350..f56d48bcf58 100644 --- a/src/mame/drivers/kpython.cpp +++ b/src/mame/drivers/kpython.cpp @@ -257,7 +257,7 @@ ROM_START( dogstdx ) ROM_REGION(0x28, "ds2430", ROMREGION_ERASE00) // Not dumped - ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00) + ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00) // Not dumped DISK_REGION( "ide:0:hdd:image" ) diff --git a/src/mame/drivers/lbpc.cpp b/src/mame/drivers/lbpc.cpp index af2bcd54528..464d94d88e7 100644 --- a/src/mame/drivers/lbpc.cpp +++ b/src/mame/drivers/lbpc.cpp @@ -56,7 +56,7 @@ public: } void lbpc(machine_config &config); - + DECLARE_READ_LINE_MEMBER(hsi_r); protected: diff --git a/src/mame/drivers/leapfrog_iquest.cpp b/src/mame/drivers/leapfrog_iquest.cpp index 081c4d61c14..6e42c27a6ea 100644 --- a/src/mame/drivers/leapfrog_iquest.cpp +++ b/src/mame/drivers/leapfrog_iquest.cpp @@ -431,7 +431,7 @@ void leapfrog_iquest_state::ext_map(address_map &map) map(0xc260, 0xc52f).ram(); // = clears 0x2d0 bytes (90*64 / 8) display buffer? map(0xc530, 0xc7ff).ram(); // = clears 0x2d0 bytes (90*64 / 8) display buffer? - + //map(0xf001, 0xf056).ram(); // written as a block map(0xf000, 0xf5ff).ram(); // ? 0xf400 - 0xf427 written as a block, other areas uncertain, might be more registers in here as there are reads too @@ -439,7 +439,7 @@ void leapfrog_iquest_state::ext_map(address_map &map) map(0xfc01, 0xfc04).r(FUNC(leapfrog_iquest_state::unk_fc01_r)); map(0xfc06, 0xfc07).rw(FUNC(leapfrog_iquest_state::lowerbank_r), FUNC(leapfrog_iquest_state::lowerbank_w)); // ROM / RAM window in main space at 0000-7fff - map(0xfc08, 0xfc09).rw(FUNC(leapfrog_iquest_state::upperbank_r), FUNC(leapfrog_iquest_state::upperbank_w)); // ROM / RAM window in main space at 8000-ffff + map(0xfc08, 0xfc09).rw(FUNC(leapfrog_iquest_state::upperbank_r), FUNC(leapfrog_iquest_state::upperbank_w)); // ROM / RAM window in main space at 8000-ffff map(0xfc0a, 0xfc0b).rw(FUNC(leapfrog_iquest_state::iobank_r), FUNC(leapfrog_iquest_state::iobank_w)); // ROM / RAM window in ext space at 0000-7fff map(0xfc22, 0xfc22).w(FUNC(leapfrog_iquest_state::unk_fc22_w)); @@ -455,7 +455,7 @@ void leapfrog_iquest_state::ext_map(address_map &map) // strings to transmit over the serial. // however, mapping this area as RAM instead results in the program stalling much earlier, waiting for $24.3 to // be cleared. - // 017658: 20 23 fd jb $24.3,$17658 + // 017658: 20 23 fd jb $24.3,$17658 // //The only realistic place for this to be cleared is deep in the interrupt handler for // Serial Receive/Transmit diff --git a/src/mame/drivers/mcr.cpp b/src/mame/drivers/mcr.cpp index 05211988fb1..0a270d828a8 100644 --- a/src/mame/drivers/mcr.cpp +++ b/src/mame/drivers/mcr.cpp @@ -718,7 +718,7 @@ void mcr_state::cpu_90009_portmap(address_map &map) void mcr_state::cpu_90009_dp_map(address_map &map) { cpu_90009_map(map); - map(0x8000, 0x81ff).ram(); // meter ram, is it battery backed? + map(0x8000, 0x81ff).ram(); // meter ram, is it battery backed? } void mcr_state::cpu_90009_dp_portmap(address_map &map) diff --git a/src/mame/drivers/megadriv.cpp b/src/mame/drivers/megadriv.cpp index ae434fc0ded..54134a63f9b 100644 --- a/src/mame/drivers/megadriv.cpp +++ b/src/mame/drivers/megadriv.cpp @@ -304,7 +304,7 @@ void md_cons_state::install_cartslot() m_maincpu->space(AS_PROGRAM).install_write_handler(0x000000, 0x7fffff, write16s_delegate(*m_cart, FUNC(base_md_cart_slot_device::write))); m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa13000, 0xa130ff, read16sm_delegate(*m_cart, FUNC(base_md_cart_slot_device::read_a13)), write16sm_delegate(*m_cart, FUNC(base_md_cart_slot_device::write_a13))); m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa15000, 0xa150ff, read16sm_delegate(*m_cart, FUNC(base_md_cart_slot_device::read_a15)), write16sm_delegate(*m_cart, FUNC(base_md_cart_slot_device::write_a15))); -// m_maincpu->space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16sm_delegate(*m_cart, FUNC(base_md_cart_slot_device::write_tmss_bank))); +// m_maincpu->space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16sm_delegate(*m_cart, FUNC(base_md_cart_slot_device::write_tmss_bank))); } } diff --git a/src/mame/drivers/megadriv_rad.cpp b/src/mame/drivers/megadriv_rad.cpp index 66e65d765a6..6d56d1812c1 100644 --- a/src/mame/drivers/megadriv_rad.cpp +++ b/src/mame/drivers/megadriv_rad.cpp @@ -113,7 +113,7 @@ void megadriv_ra145_state::write_a1630a(offs_t offset, uint16_t data, uint16_t m case 0x21: m_bank = 0x1640000; break;// = Altered Beast 21 case 0x22: m_bank = 0x16c0000; break;// = Captain Planet 22 case 0x23: m_bank = 0x1740000; break;// = Bimimi Run 23 - case 0x24: m_bank = 0x17c0000; break;// = Osomatsu 24 + case 0x24: m_bank = 0x17c0000; break;// = Osomatsu 24 case 0x25: m_bank = 0x1840000; break;// = Castle of Illusion 25 case 0x26: m_bank = 0x18c0000; break;// = Crackdown 26 case 0x27: m_bank = 0x1940000; break;// = Crossfire 27 @@ -532,7 +532,7 @@ ROM_START( ra145 ) The unit also includes a duplicate copy of Thunder Force II instead of Revenge of Shinobi, this however is not a dump issue, nor is Wacky Worlds being swapped with Fun and Games in the menu - */ + */ ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASE00 ) ROM_LOAD16_WORD_SWAP( "ra145.bin", 0x000000, 0x8000000, BAD_DUMP CRC(30583950) SHA1(855eae232e3830a505f9bc1a26edb3a7d15ce4d1) ) @@ -564,7 +564,7 @@ void megadriv_dgunl_state::init_dgunl3227() size_t len = memregion("rom")->bytes(); std::vector buffer(len); - + for (int i = 0; i < len; i++) buffer[i] = rom[i ^ 3]; diff --git a/src/mame/drivers/megadriv_sunplus_hybrid.cpp b/src/mame/drivers/megadriv_sunplus_hybrid.cpp index af27f279d46..1d188bb7de4 100644 --- a/src/mame/drivers/megadriv_sunplus_hybrid.cpp +++ b/src/mame/drivers/megadriv_sunplus_hybrid.cpp @@ -2,14 +2,14 @@ // copyright-holders:David Haywood /* - This is an enhanced 'Mega Drive / Genesis on a Chip' combined with a SunPlus SPG2xx system for the 'Bonus Games' menu + This is an enhanced 'Mega Drive / Genesis on a Chip' combined with a SunPlus SPG2xx system for the 'Bonus Games' menu - It can take MegaDrive cartridges + It can take MegaDrive cartridges - The MD side of things doesn't work as it needs enhanced chipset emulation? + The MD side of things doesn't work as it needs enhanced chipset emulation? - TODO: - hook up the SunPlus side again (see spg2xx_zone.cpp for hookup) + TODO: + hook up the SunPlus side again (see spg2xx_zone.cpp for hookup) */ @@ -138,8 +138,8 @@ void megadriv_sunplus_state::megadriv_sunplus_pal(machine_config &config) md_pal(config); m_maincpu->set_addrmap(AS_PROGRAM, &megadriv_sunplus_state::megadriv_sunplus_map); - m_screen->set_screen_update(FUNC(megadriv_sunplus_state::screen_update_hybrid)); - m_screen->screen_vblank().set(FUNC(megadriv_sunplus_state::screen_vblank_hybrid)); + m_screen->set_screen_update(FUNC(megadriv_sunplus_state::screen_update_hybrid)); + m_screen->screen_vblank().set(FUNC(megadriv_sunplus_state::screen_vblank_hybrid)); } diff --git a/src/mame/drivers/megadriv_vt_hybrid.cpp b/src/mame/drivers/megadriv_vt_hybrid.cpp index 78a9bcd2479..a31f4a15280 100644 --- a/src/mame/drivers/megadriv_vt_hybrid.cpp +++ b/src/mame/drivers/megadriv_vt_hybrid.cpp @@ -2,13 +2,13 @@ // copyright-holders:David Haywood /* - This is an enhanced 'Mega Drive / Genesis on a Chip' combined with a VT02/VT03 system for the 'Bonus Games' menu + This is an enhanced 'Mega Drive / Genesis on a Chip' combined with a VT02/VT03 system for the 'Bonus Games' menu - The menu for the MD side of things doesn't work as it needs enhanced chipset emulation? - at the moment it just boots the game in the lowest ROM bank (Flicky) + The menu for the MD side of things doesn't work as it needs enhanced chipset emulation? + at the moment it just boots the game in the lowest ROM bank (Flicky) - TODO: - hook up the VT side again + TODO: + hook up the VT side again */ @@ -135,7 +135,7 @@ void megadriv_vt0203_state::megadriv_vt0203_pal(machine_config &config) md_pal(config); m_maincpu->set_addrmap(AS_PROGRAM, &megadriv_vt0203_state::megadriv_vt0203_map); - m_screen->set_screen_update(FUNC(megadriv_vt0203_state::screen_update_hybrid)); + m_screen->set_screen_update(FUNC(megadriv_vt0203_state::screen_update_hybrid)); m_screen->screen_vblank().set(FUNC(megadriv_vt0203_state::screen_vblank_hybrid)); // TODO: add the VT part, this might require refactoring of the VT stuff as the SoC currently contains the screen diff --git a/src/mame/drivers/miuchiz.cpp b/src/mame/drivers/miuchiz.cpp index 9661dd3c18e..f1c10e58888 100644 --- a/src/mame/drivers/miuchiz.cpp +++ b/src/mame/drivers/miuchiz.cpp @@ -2,17 +2,17 @@ // copyright-holders:Jonathan Gevaryahu // thanks-to: ChrisMiuchiz /* - Driver for the Miuchiz handhelds - CPU: ST2205U; - XTAL: Y1 16MHz - XTAL: Y2 32.768KHz - LCDC: ST7626 (https://www.crystalfontz.com/controllers/Sitronix/ST7626/) - the ST7626 is embedded into a epoxy part just below the screen glass with the flex cable attached to iter_swap - it has internal 98x68x16bit ram - - Extremely preliminary - The inputs are mapped in an input array, but aren't actually hooked anywhere yet. - The screen is a dummy and just displays nothing for now. + Driver for the Miuchiz handhelds + CPU: ST2205U; + XTAL: Y1 16MHz + XTAL: Y2 32.768KHz + LCDC: ST7626 (https://www.crystalfontz.com/controllers/Sitronix/ST7626/) + the ST7626 is embedded into a epoxy part just below the screen glass with the flex cable attached to iter_swap + it has internal 98x68x16bit ram + + Extremely preliminary + The inputs are mapped in an input array, but aren't actually hooked anywhere yet. + The screen is a dummy and just displays nothing for now. */ /* Core includes */ @@ -64,27 +64,27 @@ void miuchiz_state::mem_map(address_map &map) } // flash map? -// map(0x01000000, 0x011fffff).rom().region("flash", 0); +// map(0x01000000, 0x011fffff).rom().region("flash", 0); // input ports static INPUT_PORTS_START( miuchiz ) - PORT_START("INPUTS") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_NAME("Up") - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Down") - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_NAME("Left") - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_NAME("Right") - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Power") - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Menu") - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Upside-up") - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Upside-down") - PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Screen-up-left") - PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Screen-up-right") - PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Screen-low-left") - PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Screen-low-right") - PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Action") - PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Mute/Pause") - PORT_BIT( 0xc000, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("INPUTS") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_NAME("Up") + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Down") + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_NAME("Left") + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_NAME("Right") + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Power") + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Menu") + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Upside-up") + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Upside-down") + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Screen-up-left") + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Screen-up-right") + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Screen-low-left") + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Screen-low-right") + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Action") + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Mute/Pause") + PORT_BIT( 0xc000, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END // machine specific functions diff --git a/src/mame/drivers/ms32.cpp b/src/mame/drivers/ms32.cpp index 90c0e63f650..e680a1dfffc 100644 --- a/src/mame/drivers/ms32.cpp +++ b/src/mame/drivers/ms32.cpp @@ -628,72 +628,72 @@ void ms32_state::coin_counter_w(u32 data) void ms32_state::ms32_map(address_map &map) { /* RAM areas verified by testing on real hw - usually accessed at the 0xfc000000 + mirror */ -// 0xfc000000 NVRAM (8-bits wide, 0x2000 in size) +// 0xfc000000 NVRAM (8-bits wide, 0x2000 in size) map(0xc0000000, 0xc0007fff).rw(FUNC(ms32_state::ms32_nvram_r8), FUNC(ms32_state::ms32_nvram_w8)).umask32(0x000000ff).mirror(0x3c1f8000); // map(0xc0008000, 0xc01fffff) // mirrors of nvramram, handled above -// 0xfd180000 Priority RAM (8-bits wide, 0x2000 in size) +// 0xfd180000 Priority RAM (8-bits wide, 0x2000 in size) map(0xc1180000, 0xc1187fff).rw(FUNC(ms32_state::ms32_priram_r8), FUNC(ms32_state::ms32_priram_w8)).umask32(0x000000ff).mirror(0x3c038000); // map(0xc1188000, 0xc11bffff) // mirrors of priram, handled above -// 0xfd200000 palette related, unknown -// 0xfd400000 paletteram (16-bits wide, 0x20000 in size) -// 0xfd400000 object palette -// 0xfd408000 Background palette -// 0xfd410000 ROZ1 palette -// 0xfd420000 ROZ0 palette? -// 0xfd430000 ASCII palette +// 0xfd200000 palette related, unknown +// 0xfd400000 paletteram (16-bits wide, 0x20000 in size) +// 0xfd400000 object palette +// 0xfd408000 Background palette +// 0xfd410000 ROZ1 palette +// 0xfd420000 ROZ0 palette? +// 0xfd430000 ASCII palette map(0xc1400000, 0xc143ffff).rw(FUNC(ms32_state::ms32_palram_r16), FUNC(ms32_state::ms32_palram_w16)).umask32(0x0000ffff).mirror(0x3c1c0000); // map(0xc1440000, 0xc145ffff) // mirrors of palram, handled above -// 0xfe000000 ROZ1 VRAM (16-bits wide, 0x10000 in size) +// 0xfe000000 ROZ1 VRAM (16-bits wide, 0x10000 in size) map(0xc2000000, 0xc201ffff).rw(FUNC(ms32_state::ms32_rozram_r16), FUNC(ms32_state::ms32_rozram_w16)).umask32(0x0000ffff).mirror(0x3c1e0000); -// map(0xc2020000, 0xc21fffff) // mirrors of rozram, handled above +// map(0xc2020000, 0xc21fffff) // mirrors of rozram, handled above -// 0xfe200000 ROZ1 line RAM (16-bits wide, 0x1000 in size) +// 0xfe200000 ROZ1 line RAM (16-bits wide, 0x1000 in size) map(0xc2200000, 0xc2201fff).rw(FUNC(ms32_state::ms32_lineram_r16), FUNC(ms32_state::ms32_lineram_w16)).umask32(0x0000ffff).mirror(0x3c1fe000); // map(0xc2202000, 0xc23fffff) // mirrors of lineram, handled above -// 0xfe400000 ROZ0 VRAM? -// 0xfe600000 ROZ0 line RAM? -// 0xfe800000 object layer VRAM (16-bits wide, 0x10000 in size) +// 0xfe400000 ROZ0 VRAM? +// 0xfe600000 ROZ0 line RAM? +// 0xfe800000 object layer VRAM (16-bits wide, 0x10000 in size) map(0xc2800000, 0xc281ffff).rw(FUNC(ms32_state::ms32_sprram_r16), FUNC(ms32_state::ms32_sprram_w16)).umask32(0x0000ffff).mirror(0x3c1e0000); // map(0xc2820000, 0xc29fffff) // mirrors of sprram, handled above -// 0xfec00000 ASCII layer VRAM (16-bits wide, 0x4000 in size) +// 0xfec00000 ASCII layer VRAM (16-bits wide, 0x4000 in size) map(0xc2c00000, 0xc2c07fff).rw(FUNC(ms32_state::ms32_txram_r16), FUNC(ms32_state::ms32_txram_w16)).umask32(0x0000ffff).mirror(0x3c1f0000); -// 0xfec08000 Background layer VRAM (16-bits wide, 0x4000 in size) +// 0xfec08000 Background layer VRAM (16-bits wide, 0x4000 in size) map(0xc2c08000, 0xc2c0ffff).rw(FUNC(ms32_state::ms32_bgram_r16), FUNC(ms32_state::ms32_bgram_w16)).umask32(0x0000ffff).mirror(0x3c1f0000); // map(0xc2c10000, 0xc2dfffff) // mirrors of txram / bg, handled above -// 0xfee00000 Scratch RAM (32-bit wide, 0x20000 in size) +// 0xfee00000 Scratch RAM (32-bit wide, 0x20000 in size) map(0xc2e00000, 0xc2e1ffff).ram().mirror(0x3c0e0000); -// 0xffc00000 ROM (32-bit wide, 0x200000 in size) +// 0xffc00000 ROM (32-bit wide, 0x200000 in size) map(0xc3e00000, 0xc3ffffff).rom().region("maincpu", 0).mirror(0x3c000000); // I/O section // TODO: mirrors like above? - map(0xfc800000, 0xfc800003).nopr().w(FUNC(ms32_state::sound_command_w)); // open bus on read? -// map(0xfcc00000, 0xfcc0001f) // input + map(0xfc800000, 0xfc800003).nopr().w(FUNC(ms32_state::sound_command_w)); // open bus on read? +// map(0xfcc00000, 0xfcc0001f) // input map(0xfcc00004, 0xfcc00007).portr("INPUTS"); map(0xfcc00010, 0xfcc00013).portr("DSW"); // System Registers map(0xfce00000, 0xfce0005f).m(m_sysctrl, FUNC(jaleco_ms32_sysctrl_device::amap)).umask32(0x0000ffff); map(0xfce00200, 0xfce0027f).ram().share("sprite_ctrl"); - map(0xfce00280, 0xfce0028f).w(FUNC(ms32_state::ms32_brightness_w)); // global brightness control -// map(0xfce00400, 0xfce0045f) // ROZ0 control registers -/**/map(0xfce00600, 0xfce0065f).ram().share("roz_ctrl"); // ROZ1 control registers -/**/map(0xfce00a00, 0xfce00a17).ram().share("tx_scroll"); // ASCII layer scroll -/**/map(0xfce00a20, 0xfce00a37).ram().share("bg_scroll"); // Background layer scroll + map(0xfce00280, 0xfce0028f).w(FUNC(ms32_state::ms32_brightness_w)); // global brightness control +// map(0xfce00400, 0xfce0045f) // ROZ0 control registers +/**/map(0xfce00600, 0xfce0065f).ram().share("roz_ctrl"); // ROZ1 control registers +/**/map(0xfce00a00, 0xfce00a17).ram().share("tx_scroll"); // ASCII layer scroll +/**/map(0xfce00a20, 0xfce00a37).ram().share("bg_scroll"); // Background layer scroll map(0xfce00a7c, 0xfce00a7f).w(FUNC(ms32_state::bgmode_w)); -// map(0xfce00c00, 0xfce00c1f) // ??? - map(0xfce00e00, 0xfce00e03).w(FUNC(ms32_state::coin_counter_w)); // coin counters + something else +// map(0xfce00c00, 0xfce00c1f) // ??? + map(0xfce00e00, 0xfce00e03).w(FUNC(ms32_state::coin_counter_w)); // coin counters + something else map(0xfd000000, 0xfd000003).r(FUNC(ms32_state::sound_result_r)); - // Extended I/O -// map(0xfd040000, 0xfd040003) -// map(0xfd080000, 0xfd080003) -// map(0xfd0c0000, 0xfd0c0003) + // Extended I/O +// map(0xfd040000, 0xfd040003) +// map(0xfd080000, 0xfd080003) +// map(0xfd0c0000, 0xfd0c0003) map(0xfd1c0000, 0xfd1c0003).writeonly().share("mahjong_select"); } @@ -748,15 +748,15 @@ void ms32_f1superbattle_state::f1superb_map(address_map &map) /* these two are almost certainly wrong, they just let you see what happens if you generate the FPU ints without breaking other games */ -// map(0xfce00e00, 0xfce00e03).w(FUNC(ms32_f1superbattle_state::ms32_irq5_guess_w)); +// map(0xfce00e00, 0xfce00e03).w(FUNC(ms32_f1superbattle_state::ms32_irq5_guess_w)); // bit 1: steering shock // bit 0: seat motor -// map(0xfd0f0000, 0xfd0f0003).w(FUNC(ms32_f1superbattle_state::ms32_irq2_guess_w)); +// map(0xfd0f0000, 0xfd0f0003).w(FUNC(ms32_f1superbattle_state::ms32_irq2_guess_w)); // Note: it is unknown how COPRO irqs actually acks, // most likely candidate is a 0x06 ping at both $fd1024c8 / $fd1424c8 // irq_2: 0xffe00878 (really unused) - // irq_5: 0xffe008ac + // irq_5: 0xffe008ac // irq_7: 0xffe008ea (basically identical to irq_5) // COPRO 1 map(0xfd100000, 0xfd103fff).ram(); // used when you start enabling fpu ints @@ -769,7 +769,7 @@ void ms32_f1superbattle_state::f1superb_map(address_map &map) map(0xfdc00000, 0xfdc1ffff).rw(FUNC(ms32_f1superbattle_state::road_vram_r16), FUNC(ms32_f1superbattle_state::road_vram_w16)).umask32(0x0000ffff); map(0xfde00000, 0xfde1ffff).ram(); // scroll info for lineram? -// map(0xfe202000, 0xfe2fffff).ram(); // vram? +// map(0xfe202000, 0xfe2fffff).ram(); // vram? } /* F1 Super Battle speculation from nuapete @@ -1639,7 +1639,7 @@ void ms32_base_state::irq_init() } void ms32_base_state::irq_raise(int level, bool state) -{ +{ if (state == true) m_irqreq |= (1<set_info(gfx_f1superb); -// MCFG_VIDEO_START_OVERRIDE(ms32_state,f1superb) +// MCFG_VIDEO_START_OVERRIDE(ms32_state,f1superb) } diff --git a/src/mame/drivers/nes_vt369_vtunknown.cpp b/src/mame/drivers/nes_vt369_vtunknown.cpp index dfae6df96a3..1be6d6b7f1a 100644 --- a/src/mame/drivers/nes_vt369_vtunknown.cpp +++ b/src/mame/drivers/nes_vt369_vtunknown.cpp @@ -742,7 +742,7 @@ ROM_START( lpgm240 ) ROM_LOAD( "w25q64jv.u1", 0x00000, 0x800000, CRC(b973e65b) SHA1(36ff137068ea56b4679c2db386ac0067de0a9eaf) ) ROM_REGION( 0x1000, "internal", 0 ) // maps at 1000-1fff on main CPU, and it boots using vectors in 1ffx area - ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(57c9cea9) SHA1(4f338e5ef87a66601014ad726cfefefbc20dc4be) ) + ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(57c9cea9) SHA1(4f338e5ef87a66601014ad726cfefefbc20dc4be) ) ROM_END ROM_START( tup240 ) @@ -750,7 +750,7 @@ ROM_START( tup240 ) ROM_LOAD( "mini_arcade240.bin", 0x00000, 0x800000, CRC(d4b4bf6c) SHA1(9cf4557e27bc8659079c62abdd22a311e1843047) ) ROM_REGION( 0x1000, "internal", 0 ) // maps at 1000-1fff on main CPU, and it boots using vectors in 1ffx area - ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(57c9cea9) SHA1(4f338e5ef87a66601014ad726cfefefbc20dc4be) ) + ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(57c9cea9) SHA1(4f338e5ef87a66601014ad726cfefefbc20dc4be) ) ROM_END ROM_START( sy889 ) @@ -804,7 +804,7 @@ ROM_START( myarccn ) ROM_LOAD( "my_arcade_caveman_ninja.bin", 0x00000, 0x100000, CRC(dcc5590c) SHA1(a734cb9c81e58346ff5fa934347d7cb24a32cb39) ) ROM_REGION( 0x1000, "internal", 0 ) // maps at 1000-1fff on main CPU, and it boots using vectors in 1ffx area - ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(da5850f0) SHA1(39d674d965818922aad5993e9499170d3ebc43bf) ) + ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(da5850f0) SHA1(39d674d965818922aad5993e9499170d3ebc43bf) ) ROM_END ROM_START( hkb502 ) @@ -812,7 +812,7 @@ ROM_START( hkb502 ) ROM_LOAD( "red console.bin", 0x00000, 0x400000, CRC(e4766383) SHA1(64b0c20592f38928b3a639fa42b468ff09664808) ) ROM_REGION( 0x1000, "internal", 0 ) // maps at 1000-1fff on main CPU, and it boots using vectors in 1ffx area - ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(da5850f0) SHA1(39d674d965818922aad5993e9499170d3ebc43bf) ) + ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(da5850f0) SHA1(39d674d965818922aad5993e9499170d3ebc43bf) ) ROM_END ROM_START( hkb502a ) @@ -820,7 +820,7 @@ ROM_START( hkb502a ) ROM_LOAD( "hkb-502.bin", 0x00000, 0x400000, CRC(970f54d2) SHA1(b45df00d85a2e29fe9418563927584a048db94b3) ) ROM_REGION( 0x1000, "internal", 0 ) // maps at 1000-1fff on main CPU, and it boots using vectors in 1ffx area - ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(da5850f0) SHA1(39d674d965818922aad5993e9499170d3ebc43bf) ) + ROM_LOAD( "internal.bin", 0x0000, 0x1000, CRC(da5850f0) SHA1(39d674d965818922aad5993e9499170d3ebc43bf) ) ROM_END ROM_START( lxcap ) diff --git a/src/mame/drivers/pc1500.cpp b/src/mame/drivers/pc1500.cpp index 75fb6e01fdf..01f20aaba2e 100644 --- a/src/mame/drivers/pc1500.cpp +++ b/src/mame/drivers/pc1500.cpp @@ -96,12 +96,12 @@ private: void pc1500_state::pc1500_mem(address_map &map) { map.unmap_value_high(); - // map(0x0000, 0x3fff).rom(); //module ROM/RAM + // map(0x0000, 0x3fff).rom(); //module ROM/RAM map(0x4000, 0x47ff).ram(); //user RAM map(0x4800, 0x6fff).ram(); //expansion RAM map(0x7000, 0x71ff).ram().mirror(0x0600).share("lcd_data"); map(0x7800, 0x7bff).ram().mirror(0x0400); - // map(0xa000, 0xbfff).rom(); //expansion ROM + // map(0xa000, 0xbfff).rom(); //expansion ROM map(0xc000, 0xffff).rom().region("maincpu", 0); //system ROM } diff --git a/src/mame/drivers/pcat_nit.cpp b/src/mame/drivers/pcat_nit.cpp index beece42b34e..51d0bc47f70 100644 --- a/src/mame/drivers/pcat_nit.cpp +++ b/src/mame/drivers/pcat_nit.cpp @@ -98,10 +98,10 @@ public: : pcat_base_state(mconfig, type, tag), m_uart(*this, "ns16450_0"), m_microtouch(*this, "microtouch"), - m_bios_region(*this, "bios"), - m_disk_bios_region(*this, "disk_bios"), - m_bios_share(*this, "bios"), - m_disk_bios_share(*this, "disk_bios") + m_bios_region(*this, "bios"), + m_disk_bios_region(*this, "disk_bios"), + m_bios_share(*this, "bios"), + m_disk_bios_share(*this, "disk_bios") { } void bonanza(machine_config &config); diff --git a/src/mame/drivers/pingpong.cpp b/src/mame/drivers/pingpong.cpp index 79595d9cc74..fda0ec3c6d6 100644 --- a/src/mame/drivers/pingpong.cpp +++ b/src/mame/drivers/pingpong.cpp @@ -142,7 +142,7 @@ void pingpong_state::cashquiz_map(address_map &map) map(0x5400, 0x54ff).bankr("bank5"); map(0x5500, 0x55ff).bankr("bank6"); map(0x5600, 0x56ff).bankr("bank7"); - map(0x5700, 0x57ff).bankr("bank8"); + map(0x5700, 0x57ff).bankr("bank8"); } diff --git a/src/mame/drivers/pipedrm.cpp b/src/mame/drivers/pipedrm.cpp index b595e36505a..e629ada8c2b 100644 --- a/src/mame/drivers/pipedrm.cpp +++ b/src/mame/drivers/pipedrm.cpp @@ -285,7 +285,7 @@ uint8_t hatris_state::pending_command_r() * Video * *************************************/ - + void pipedrm_state::video_start() { VIDEO_START_CALL_MEMBER(fromance); diff --git a/src/mame/drivers/replicator.cpp b/src/mame/drivers/replicator.cpp index bf6484edf69..d6d6128985f 100644 --- a/src/mame/drivers/replicator.cpp +++ b/src/mame/drivers/replicator.cpp @@ -32,21 +32,21 @@ #include "screen.h" #include "speaker.h" -#define LOG_PORT_A (1 << 1) -#define LOG_PORT_B (1 << 2) -#define LOG_PORT_C (1 << 3) -#define LOG_PORT_D (1 << 4) -#define LOG_PORT_E (1 << 5) -#define LOG_PORT_F (1 << 6) -#define LOG_PORT_G (1 << 7) -#define LOG_PORT_H (1 << 8) -#define LOG_PORT_J (1 << 9) -#define LOG_PORT_K (1 << 10) -#define LOG_PORT_L (1 << 11) -#define LOG_LCD_CLK (1 << 12) -#define LOG_LCD_SHIFT (1 << 13) - -#define VERBOSE (0) +#define LOG_PORT_A (1 << 1) +#define LOG_PORT_B (1 << 2) +#define LOG_PORT_C (1 << 3) +#define LOG_PORT_D (1 << 4) +#define LOG_PORT_E (1 << 5) +#define LOG_PORT_F (1 << 6) +#define LOG_PORT_G (1 << 7) +#define LOG_PORT_H (1 << 8) +#define LOG_PORT_J (1 << 9) +#define LOG_PORT_K (1 << 10) +#define LOG_PORT_L (1 << 11) +#define LOG_LCD_CLK (1 << 12) +#define LOG_LCD_SHIFT (1 << 13) + +#define VERBOSE (0) #include "logmacro.h" #define MASTER_CLOCK 16000000 diff --git a/src/mame/drivers/rf51w14cg.cpp b/src/mame/drivers/rf51w14cg.cpp index 37da20cacf3..6994bda8c6a 100644 --- a/src/mame/drivers/rf51w14cg.cpp +++ b/src/mame/drivers/rf51w14cg.cpp @@ -6,7 +6,7 @@ "RF51W14-CG" is the legal registry name, the game commercial name is unknown. TODO: - - Everything + - Everything ________________________________________________________________ | ___J16_____ ___J17____ __J18__ _______________________ | diff --git a/src/mame/drivers/sauro.cpp b/src/mame/drivers/sauro.cpp index 472e6cd48dc..f7700e8bf17 100644 --- a/src/mame/drivers/sauro.cpp +++ b/src/mame/drivers/sauro.cpp @@ -82,14 +82,14 @@ Stephh's notes (based on the games Z80 code and some tests) : (colors, Dip Switches, Inputs) - When "Freeze" Dip Switch is ON, press START1 to freeze and START2 to unfreeze. This setting (as well as others) must be defined before resetting the games. - - On 'sauroa', "Test mode" crashes when trying to display "Difficult" ("Hard") + - On 'sauroa', "Test mode" crashes when trying to display "Difficult" ("Hard") because the full string is 15 bytes long while other string are 14, so the 15th - "char" is NOT 0x00 : + "char" is NOT 0x00 : * 0xd49f : mask (0x30) * 0xd4a0-0xd4a7 : offset of settings to display (4 x 2 bytes, LSB first) : 0xd58e, 0xd5a5, 0xd5bc, 0xd5d4 - On 'sauro' (the parent set), the "Test mode" works fine and displays the - "Difficult" string. + On 'sauro' (the parent set), the "Test mode" works fine and displays the + "Difficult" string. - Player 2 uses player 2 inputs only when "Cabinet" Dip Switch is set to "Cocktail" (code at 0x2e40 : start reading inputs). diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp index 36e399d59af..d11de338ae5 100644 --- a/src/mame/drivers/segas16b.cpp +++ b/src/mame/drivers/segas16b.cpp @@ -8990,7 +8990,7 @@ ROM_START( tturf ) ROM_LOAD( "epr-12328.a10", 0x00000, 0x08000, CRC(13a346de) SHA1(4e8cb12b7936c4c5d8ebc9ba563099ac2056ee60) ) ROM_LOAD( "opr-12329.a11", 0x10000, 0x10000, CRC(ed9a686d) SHA1(da433033d501ee871429ee676b3972b14179df9f) ) // speech // note: it needs this hole otherwise voice samples won't playback - ROM_LOAD( "opr-12330.a12", 0x30000, 0x10000, CRC(fb762bca) SHA1(ff9191c5ec38c711ebb7c2ad043f62b6d7e2203c) ) + ROM_LOAD( "opr-12330.a12", 0x30000, 0x10000, CRC(fb762bca) SHA1(ff9191c5ec38c711ebb7c2ad043f62b6d7e2203c) ) ROM_REGION( 0x1000, "mcu", 0 ) // Intel i8751 protection MCU ROM_LOAD( "317-0104.c2", 0x00000, 0x1000, NO_DUMP ) diff --git a/src/mame/drivers/spc1500.cpp b/src/mame/drivers/spc1500.cpp index 45240d8625c..85b25f91993 100644 --- a/src/mame/drivers/spc1500.cpp +++ b/src/mame/drivers/spc1500.cpp @@ -941,7 +941,7 @@ ROM_END } // Anonymous namespace - + /* Driver */ // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS diff --git a/src/mame/drivers/spg2xx_shredmjr.cpp b/src/mame/drivers/spg2xx_shredmjr.cpp index 1ffdcb3f7bd..8b303d6788c 100644 --- a/src/mame/drivers/spg2xx_shredmjr.cpp +++ b/src/mame/drivers/spg2xx_shredmjr.cpp @@ -243,7 +243,7 @@ CONS( 2007, shredmjr, 0, 0, shredmjr, taikeegr, shredmjr_ga // doesn't have a Senario logo ingame, but does on box. unique song selection CONS( 200?, guitarst, 0, 0, taikeegr, taikeegr, shredmjr_game_state, init_taikeegr, "Senario", "Guitar Star (US, Senario, NTSC)", MACHINE_IMPERFECT_TIMING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // ^ -// This one has the same songs as 'rockstar' but different game style / presentation. +// This one has the same songs as 'rockstar' but different game style / presentation. // Unit found in Ireland "imported by Cathay Product Sourcing Ltd." on the box, with address in Ireland // ITEM #01109 on instruction sheet, no manufacturer named on either box or instructions CONS( 200?, guitarstp, 0, 0, taikeegrp, guitarstp,shredmjr_game_state, init_taikeegr, "", "Guitar Star (Europe, PAL)", MACHINE_IMPERFECT_TIMING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // ^ diff --git a/src/mame/drivers/st2302u_bbl_rom.cpp b/src/mame/drivers/st2302u_bbl_rom.cpp index 01cda0ce9e8..53eb7ad5b53 100644 --- a/src/mame/drivers/st2302u_bbl_rom.cpp +++ b/src/mame/drivers/st2302u_bbl_rom.cpp @@ -18,7 +18,7 @@ public: , m_portb(0xff) { } - + void st22xx_bbl338(machine_config &config); void st22xx_dphh8213(machine_config &config); @@ -119,7 +119,7 @@ u8 st22xx_bbl338_sim_state::sim152_r() u8 param3 = mainspace.read_byte(0x103); logerror("command 0x28 (draw text direct) using params Xpos: %02x Ypos: %02x char '%c' unk %02x\n", param0, param1, param2, param3); - + break; } @@ -131,7 +131,7 @@ u8 st22xx_bbl338_sim_state::sim152_r() } //if (command == 0x00) - // return 0x60; + // return 0x60; } return m_152_dat; } @@ -157,12 +157,12 @@ void st22xx_bbl338_sim_state::machine_reset() 0xa4, 0x32, // 000153: ldy $32 | 0x5a, // 000155: phy / 0x64, 0x32, // 000156: stz $32 | - Zero Bank (manually optimized compared to the dphh8213 implementation to reduce code size so call to 0x0164 is correct) - 0x64, 0x33, // 000158: stz $33 / + 0x64, 0x33, // 000158: stz $33 / //0x20, 0x3d, 0x41, // 000152: jsr $xxxx -- this needs to go to a jump table to process the command stored in X 0xea, 0xea, 0xea, // NOP above out for now as it isn't clear where to jump to 0x7a, // 00015d: ply |- restore previous bank 0x84, 0x32, // 00015e: sty $32 | - 0x7a, // 000160: ply | + 0x7a, // 000160: ply | 0x84, 0x33, // 000161: sty $33 / 0x60, // 000163: rts @@ -265,7 +265,7 @@ static INPUT_PORTS_START(dphh8213) PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_NAME("P1 A") PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT) PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN2") @@ -273,7 +273,7 @@ static INPUT_PORTS_START(dphh8213) PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) // bbl338 - must be IP_ACTIVE_HIGH to avoid system hanging with 'wai' opcode after code turns on port interrupt if not in test mode (power off?) PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN3") @@ -312,7 +312,7 @@ void st22xx_bbl338_state::st22xx_dphh8213(machine_config &config) SCREEN(config, m_screen, SCREEN_TYPE_LCD); m_screen->set_refresh_hz(60); m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); - m_screen->set_size(160, 128); + m_screen->set_size(160, 128); m_screen->set_visarea(0, 160 - 1, 0, 128 - 1); m_screen->set_screen_update(FUNC(st22xx_bbl338_state::screen_update)); @@ -331,7 +331,7 @@ void st22xx_bbl338_state::st22xx_bbl338(machine_config &config) SCREEN(config, m_screen, SCREEN_TYPE_LCD); m_screen->set_refresh_hz(60); m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); - m_screen->set_size(160, 128); + m_screen->set_size(160, 128); m_screen->set_visarea(0, 160 - 1, 0, 128 - 1); m_screen->set_screen_update(FUNC(st22xx_bbl338_state::screen_update)); diff --git a/src/mame/drivers/taito_b.cpp b/src/mame/drivers/taito_b.cpp index 11d6a3cbe81..08b8b68e058 100644 --- a/src/mame/drivers/taito_b.cpp +++ b/src/mame/drivers/taito_b.cpp @@ -1524,10 +1524,10 @@ static INPUT_PORTS_START( ryujin ) PORT_START("IN3") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) - + PORT_START("IN4") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) - + PORT_START("IN5") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END diff --git a/src/mame/drivers/tetrisp2.cpp b/src/mame/drivers/tetrisp2.cpp index 0f2068397f4..0255a9931c4 100644 --- a/src/mame/drivers/tetrisp2.cpp +++ b/src/mame/drivers/tetrisp2.cpp @@ -1684,7 +1684,7 @@ void tetrisp2_state::nndmseal(machine_config &config) // but they replaced the xtal to a OSC1(42.9545MHz), I guess they compensated to not go out of ~60 Hz constexpr XTAL pixel_clock = XTAL(42'954'545)/6; SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(pixel_clock, 455, 0, 384, 262, 0, 240); + m_screen->set_raw(pixel_clock, 455, 0, 384, 262, 0, 240); m_screen->set_screen_update(FUNC(tetrisp2_state::screen_update_tetrisp2)); m_screen->set_palette(m_palette); @@ -1716,7 +1716,7 @@ void tetrisp2_state::rockn(machine_config &config) /* video hardware */ constexpr XTAL pixel_clock = XTAL(48'000'000)/8; SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(pixel_clock, 384, 0, 320, 263, 0, 224); + m_screen->set_raw(pixel_clock, 384, 0, 320, 263, 0, 224); m_screen->set_screen_update(FUNC(tetrisp2_state::screen_update_rockntread)); m_screen->set_palette(m_palette); @@ -1751,7 +1751,7 @@ void tetrisp2_state::rockn2(machine_config &config) /* video hardware */ constexpr XTAL pixel_clock = XTAL(48'000'000)/8; SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(pixel_clock, 384, 0, 320, 263, 0, 224); + m_screen->set_raw(pixel_clock, 384, 0, 320, 263, 0, 224); m_screen->set_screen_update(FUNC(tetrisp2_state::screen_update_rockntread)); m_screen->set_palette(m_palette); @@ -1808,7 +1808,7 @@ void rocknms_state::rocknms(machine_config &config) /* video hardware */ config.set_default_layout(layout_rocknms); - + constexpr XTAL pixel_clock = XTAL(48'000'000)/8; SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_orientation(ROT0); @@ -1835,7 +1835,7 @@ void rocknms_state::rocknms(machine_config &config) m_rocknms_sub_sprite->set_zoom(false); setup_main_sysctrl(config, XTAL(48'000'000)); - + JALECO_MS32_SYSCTRL(config, m_sub_sysctrl, XTAL(48'000'000), m_sub_screen); m_sub_sysctrl->flip_screen_cb().set(FUNC(rocknms_state::sub_flipscreen_w)); m_sub_sysctrl->vblank_cb().set(FUNC(rocknms_state::sub_vblank_irq_w)); @@ -1844,7 +1844,7 @@ void rocknms_state::rocknms(machine_config &config) m_sub_sysctrl->sound_reset_cb().set(FUNC(rocknms_state::sub_sound_reset_line_w)); MCFG_VIDEO_START_OVERRIDE(rocknms_state,rocknms) - + /* sound hardware */ SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -1874,7 +1874,7 @@ void stepstag_state::stepstag(machine_config &config) M68000(config, m_maincpu, XTAL(12'000'000)); // unknown m_maincpu->set_addrmap(AS_PROGRAM, &stepstag_state::stepstag_map); - constexpr XTAL subxtal = XTAL(42'954'545); // unknown + constexpr XTAL subxtal = XTAL(42'954'545); // unknown constexpr XTAL sub_pixel_clock = subxtal/6; M68000(config, m_subcpu, subxtal/3); @@ -1888,8 +1888,8 @@ void stepstag_state::stepstag(machine_config &config) // video hardware // this screen arrangement is weird: - // it writes a regular 320x224 screen setup to the CRTC but none of these matches a 352 width, - // we are either missing a bit from the config regs or those writes are null and + // it writes a regular 320x224 screen setup to the CRTC but none of these matches a 352 width, + // we are either missing a bit from the config regs or those writes are null and // these screens are driven by something else. // Also note: main 68k tilemap/sprite/palette aren't even displayed with this arrangement, // even tho usage is minimal (POST/test mode), maybe just a left-over ... @@ -1970,7 +1970,7 @@ void stepstag_state::vjdash(machine_config &config) // 4 Screens constexpr XTAL subxtal = XTAL(42'954'545); // unknown constexpr XTAL main_pixel_clock = XTAL(48'000'000)/8; constexpr XTAL sub_pixel_clock = subxtal/6; - + M68000(config, m_subcpu, subxtal/3); m_subcpu->set_addrmap(AS_PROGRAM, &stepstag_state::stepstag_sub_map); TIMER(config, "field_timer").configure_periodic(FUNC(stepstag_state::field_cb), attotime::from_hz(30)); @@ -1982,7 +1982,7 @@ void stepstag_state::vjdash(machine_config &config) // 4 Screens // video hardware // same as stepstag, we assume that this screen is effectively connected to the system CRTC SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(main_pixel_clock, 384, 0, 320, 263, 0, 224); + m_screen->set_raw(main_pixel_clock, 384, 0, 320, 263, 0, 224); m_screen->set_screen_update(FUNC(stepstag_state::screen_update_stepstag_main)); m_screen->set_palette(m_palette); diff --git a/src/mame/drivers/twinbskt.cpp b/src/mame/drivers/twinbskt.cpp index 52b52d56b4a..4d50354e3c1 100644 --- a/src/mame/drivers/twinbskt.cpp +++ b/src/mame/drivers/twinbskt.cpp @@ -5,9 +5,9 @@ Skeleton driver for "Twin Basket", by Automatics Pasqual TODO: - - Implement ST6225 microcontroller handling based on existing - ST6228 core - - Everything else (peripherals, artwork, etc.) + - Implement ST6225 microcontroller handling based on existing + ST6228 core + - Everything else (peripherals, artwork, etc.) ___________________________________________________________________________________ | _______ _______ _______ ________ _____ ___________ ____________ | @@ -26,7 +26,7 @@ || | _______ ______ ______ ______ M74HC244B1 4DIPS|_|| ||_|<-LEFT 74LS47N 74LS47N 74LS138 74LS138 XTAL ___________ __ | |__ DIGITS 8.000MHz |ST62T25B6 | | || - || | |__________| | || + || | |__________| | || || |<-RIGHT SW1->|_|| ||_| DIGITS 8DIPS | |__ __ | diff --git a/src/mame/drivers/vg5k.cpp b/src/mame/drivers/vg5k.cpp index 3ed9d8168ac..34383bda6f7 100644 --- a/src/mame/drivers/vg5k.cpp +++ b/src/mame/drivers/vg5k.cpp @@ -354,15 +354,15 @@ INPUT_CHANGED_MEMBER(vg5k_state::delta_button) void vg5k_state::machine_start() { save_item(NAME(m_ef9345_offset)); - save_item(NAME(m_printer_latch)); - save_item(NAME(m_printer_signal)); + save_item(NAME(m_printer_latch)); + save_item(NAME(m_printer_signal)); } void vg5k_state::machine_reset() { - m_ef9345_offset = 0; - m_printer_latch = 0; - m_printer_signal = 0; + m_ef9345_offset = 0; + m_printer_latch = 0; + m_printer_signal = 0; } diff --git a/src/mame/drivers/vtech1.cpp b/src/mame/drivers/vtech1.cpp index 190d6cfaf5c..5d0d2b19207 100644 --- a/src/mame/drivers/vtech1.cpp +++ b/src/mame/drivers/vtech1.cpp @@ -534,7 +534,7 @@ void vtech1_state::laser310(machine_config &config) void laser310h_state::laser310h(machine_config &config) { vtech1(config); - + m_maincpu->set_clock(VZ300_XTAL1_CLK / 5); /* 3.546894 MHz */ m_maincpu->set_addrmap(AS_PROGRAM, &laser310h_state::vtech1_shrg_mem); m_maincpu->set_addrmap(AS_IO, &laser310h_state::vtech1_shrg_io); diff --git a/src/mame/drivers/wizard.cpp b/src/mame/drivers/wizard.cpp index a2d08909623..81b9f5a5a81 100644 --- a/src/mame/drivers/wizard.cpp +++ b/src/mame/drivers/wizard.cpp @@ -39,7 +39,7 @@ ____________________________________ | | ↑ ↓ |___________________________________| ← → -IQ-8100M, IQ-8200, IQ-8300M and IQ-8500M models use a 240x64 screen (40 cols x 8 lines with +IQ-8100M, IQ-8200, IQ-8300M and IQ-8500M models use a 240x64 screen (40 cols x 8 lines with 6x8 chars or 30 cols x 4 lines with 8x16 chars). IQ-8900G, IQ-8920G and OZ-9520 WIZARD models use a 240x160 screen. IQ-9000G and IQ-9200G models use a 320x240 screen. diff --git a/src/mame/drivers/ymmu5.cpp b/src/mame/drivers/ymmu5.cpp index 94265c2d08b..f75a8f38697 100644 --- a/src/mame/drivers/ymmu5.cpp +++ b/src/mame/drivers/ymmu5.cpp @@ -218,7 +218,7 @@ INPUT_PORTS_END void mu5_state::mu5(machine_config &config) { /* basic machine hardware */ - H83002(config, m_maincpu, 10_MHz_XTAL); // clock verified by schematics + H83002(config, m_maincpu, 10_MHz_XTAL); // clock verified by schematics m_maincpu->set_addrmap(AS_PROGRAM, &mu5_state::mu5_map); m_maincpu->set_addrmap(AS_IO, &mu5_state::mu5_io_map); diff --git a/src/mame/includes/coleco.h b/src/mame/includes/coleco.h index ce0be553be2..186fe97cf1b 100644 --- a/src/mame/includes/coleco.h +++ b/src/mame/includes/coleco.h @@ -123,7 +123,7 @@ public: void u32_w(uint8_t data); void init(); - + protected: required_memory_bank m_bank; required_device m_ram; diff --git a/src/mame/includes/fm7.h b/src/mame/includes/fm7.h index f07fdebaa66..0326462f593 100644 --- a/src/mame/includes/fm7.h +++ b/src/mame/includes/fm7.h @@ -136,7 +136,7 @@ protected: uint16_t y1; uint8_t busy; }; - + virtual void machine_reset() override; virtual void video_start() override; diff --git a/src/mame/includes/ms32.h b/src/mame/includes/ms32.h index a07769cdfce..3371fb54705 100644 --- a/src/mame/includes/ms32.h +++ b/src/mame/includes/ms32.h @@ -25,7 +25,7 @@ public: , m_z80bank(*this, "z80bank%u", 1) , m_sprite_ctrl(*this, "sprite_ctrl") { } - + protected: required_device m_maincpu; required_device m_audiocpu; @@ -180,7 +180,7 @@ public: , m_road_vram(*this, "road_vram", 0x10000, ENDIANNESS_LITTLE) // TODO: COPROs {} - + void f1superb(machine_config &config); void init_f1superb(); @@ -191,16 +191,16 @@ private: void ms32_irq2_guess_w(u32 data); void ms32_irq5_guess_w(u32 data); - + memory_share_creator m_road_vram; void f1superb_map(address_map &map); void road_vram_w16(offs_t offset, u16 data, u16 mem_mask = ~0); u16 road_vram_r16(offs_t offset); - + u32 analog_r(); - + tilemap_t* m_extra_tilemap; }; diff --git a/src/mame/includes/tetrisp2.h b/src/mame/includes/tetrisp2.h index 88ddeab064f..c5afba264e4 100644 --- a/src/mame/includes/tetrisp2.h +++ b/src/mame/includes/tetrisp2.h @@ -53,7 +53,7 @@ protected: DECLARE_WRITE_LINE_MEMBER(vblank_irq_w); DECLARE_WRITE_LINE_MEMBER(field_irq_w); DECLARE_WRITE_LINE_MEMBER(sound_reset_line_w); - + u16 rockn_adpcmbank_r(); void rockn_adpcmbank_w(u16 data); void rockn2_adpcmbank_w(u16 data); @@ -127,7 +127,7 @@ protected: class rocknms_state : public tetrisp2_state { public: - rocknms_state(const machine_config &mconfig, device_type type, const char *tag) + rocknms_state(const machine_config &mconfig, device_type type, const char *tag) : tetrisp2_state(mconfig, type, tag) , m_subcpu(*this, "sub") , m_sub_sysctrl(*this, "sub_sysctrl") @@ -143,7 +143,7 @@ public: , m_sub_palette(*this, "sub_palette") , m_sub_paletteram(*this, "sub_paletteram") { } - + void rocknms(machine_config &config); void init_rocknms(); DECLARE_CUSTOM_INPUT_MEMBER(rocknms_main2sub_status_r); @@ -177,7 +177,7 @@ private: void rocknms_sub_vram_fg_w(offs_t offset, u16 data, u16 mem_mask = ~0); void rocknms_sub_vram_rot_w(offs_t offset, u16 data, u16 mem_mask = ~0); DECLARE_VIDEO_START(rocknms); - + TILE_GET_INFO_MEMBER(get_tile_info_rocknms_sub_bg); TILE_GET_INFO_MEMBER(get_tile_info_rocknms_sub_fg); TILE_GET_INFO_MEMBER(get_tile_info_rocknms_sub_rot); diff --git a/src/mame/machine/agatkeyb.cpp b/src/mame/machine/agatkeyb.cpp index 5f7b9b5f25f..f0a6c2e34fe 100644 --- a/src/mame/machine/agatkeyb.cpp +++ b/src/mame/machine/agatkeyb.cpp @@ -250,7 +250,7 @@ bool agat_keyboard_device::translate(u8 code, u16 &translated) const { translated = (code < 0x20) ? code : (ctrl ? (code & 0x1f) : code); } -// logerror("code %02x c %d s %d m %d -> %02x\n", code, ctrl, shift, m_meta, translated); +// logerror("code %02x c %d s %d m %d -> %02x\n", code, ctrl, shift, m_meta, translated); return true; } diff --git a/src/mame/machine/agatkeyb.h b/src/mame/machine/agatkeyb.h index 47054d54a52..10693e0fcd7 100644 --- a/src/mame/machine/agatkeyb.h +++ b/src/mame/machine/agatkeyb.h @@ -60,7 +60,7 @@ private: attotime typematic_delay() const; attotime typematic_period() const; - bool m_meta; + bool m_meta; u16 m_last_modifiers; devcb_write8 m_keyboard_cb; devcb_write_line m_out_meta_cb; diff --git a/src/mame/machine/jaleco_ms32_sysctrl.cpp b/src/mame/machine/jaleco_ms32_sysctrl.cpp index 4d05d40329d..f16fae58d76 100644 --- a/src/mame/machine/jaleco_ms32_sysctrl.cpp +++ b/src/mame/machine/jaleco_ms32_sysctrl.cpp @@ -2,38 +2,38 @@ // copyright-holders:Angelo Salese, Alex Marshall /****************************************************************************** - Jaleco MS32 System Control Unit - - A simple system controller for late 90s Jaleco HWs - - Known features: - - CRTC & screen(s?) control; - - dot clock control; - - irq/reset controller; - - programmable timer; - - watchdog; - - First use in MS32, then their later (?) 68k revision. - - TODO: - - pinpoint exact timing generation for programmable irq - (free counter or based on host screen beams) - - interface with multiple screens is a mystery, - cfr. dual screen bnstars, stepping stage HW. - Most likely former effectively controls both screens in demux while - latter has no way to set the other screen(s)? - - watchdog timing; - - upper address line seems unconnected by 68k, - and is it a mystery how watchdog is supposed to route here and assuming - it is and not actually disabled by pin. - - network/COPROs irq connections, specifically for f1superb; - - actual chip name; - - BTANBs: - - in p47aces v1.0 (p47acesa) code messes up the prg irq timer setup, - causing SFX overloads by using Spitfire ship with 30 Hz autofire - and shooting at point blank range over walls/enemies. - This has been fixed in v1.1 + Jaleco MS32 System Control Unit + + A simple system controller for late 90s Jaleco HWs + + Known features: + - CRTC & screen(s?) control; + - dot clock control; + - irq/reset controller; + - programmable timer; + - watchdog; + + First use in MS32, then their later (?) 68k revision. + + TODO: + - pinpoint exact timing generation for programmable irq + (free counter or based on host screen beams) + - interface with multiple screens is a mystery, + cfr. dual screen bnstars, stepping stage HW. + Most likely former effectively controls both screens in demux while + latter has no way to set the other screen(s)? + - watchdog timing; + - upper address line seems unconnected by 68k, + and is it a mystery how watchdog is supposed to route here and assuming + it is and not actually disabled by pin. + - network/COPROs irq connections, specifically for f1superb; + - actual chip name; + + BTANBs: + - in p47aces v1.0 (p47acesa) code messes up the prg irq timer setup, + causing SFX overloads by using Spitfire ship with 30 Hz autofire + and shooting at point blank range over walls/enemies. + This has been fixed in v1.1 *******************************************************************************/ @@ -71,7 +71,7 @@ jaleco_ms32_sysctrl_device::jaleco_ms32_sysctrl_device(const machine_config &mco void jaleco_ms32_sysctrl_device::amap(address_map& map) { -// 0xba0000 in 68k, 0xfce00000 in MS32 mapped at lower 16-bits mask +// 0xba0000 in 68k, 0xfce00000 in MS32 mapped at lower 16-bits mask map(0x00, 0x01).w(FUNC(jaleco_ms32_sysctrl_device::control_w)); map(0x02, 0x03).w(FUNC(jaleco_ms32_sysctrl_device::hblank_w)); map(0x04, 0x05).w(FUNC(jaleco_ms32_sysctrl_device::hdisplay_w)); @@ -85,7 +85,7 @@ void jaleco_ms32_sysctrl_device::amap(address_map& map) map(0x1a, 0x1b).w(FUNC(jaleco_ms32_sysctrl_device::timer_ack_w)); map(0x1c, 0x1d).w(FUNC(jaleco_ms32_sysctrl_device::sound_reset_w)); map(0x1e, 0x1f).w(FUNC(jaleco_ms32_sysctrl_device::irq_ack_w)); -// map(0x24, 0x27).w // sound comms bidirectional acks? +// map(0x24, 0x27).w // sound comms bidirectional acks? map(0x26, 0x27).w(FUNC(jaleco_ms32_sysctrl_device::sound_ack_w)); map(0x28, 0x29).nopw(); // watchdog on MS32 map(0x2c, 0x2d).w(FUNC(jaleco_ms32_sysctrl_device::field_ack_w)); @@ -99,7 +99,7 @@ void jaleco_ms32_sysctrl_device::amap(address_map& map) void jaleco_ms32_sysctrl_device::device_add_mconfig(machine_config &config) { -// TIMER(config, "scantimer").configure_scanline(FUNC(jaleco_ms32_sysctrl_device::scanline_cb), m_screen, 0, 1); +// TIMER(config, "scantimer").configure_scanline(FUNC(jaleco_ms32_sysctrl_device::scanline_cb), m_screen, 0, 1); // TODO: watchdog } @@ -128,7 +128,7 @@ void jaleco_ms32_sysctrl_device::device_start() save_item(NAME(m_crtc.vert_display)); save_item(NAME(m_flip_screen_state)); save_item(NAME(m_timer.irq_enable)); - + m_timer.prg_irq = timer_alloc(PRG_TIMER); m_timer_scanline = timer_alloc(SCANLINE_TIMER); } @@ -152,7 +152,7 @@ void jaleco_ms32_sysctrl_device::device_reset() // we currently compensate by basically giving one frame of time, // ofc on the real thing the first vblank is really when screen sync occurs. flush_scanline_timer(m_crtc.vert_display-1); -// m_timer_scanline->adjust(attotime::never); +// m_timer_scanline->adjust(attotime::never); // put flipping in a default state m_flip_screen_state = false; m_flip_screen_cb(0); @@ -179,8 +179,8 @@ void jaleco_ms32_sysctrl_device::flush_prg_timer() void jaleco_ms32_sysctrl_device::flush_scanline_timer(int current_scanline) { // in typical Jaleco fashion (cfr. mega system 1), both irqs are somehow configurable (a pin?). - // Examples are tp2ms32 and wpksocv2, wanting vblank as vector 9 and field as 10 otherwise they runs - // at half speed, but then their config can't possibly work with p47aces (i.e. wants 10 and 9 respectively), + // Examples are tp2ms32 and wpksocv2, wanting vblank as vector 9 and field as 10 otherwise they runs + // at half speed, but then their config can't possibly work with p47aces (i.e. wants 10 and 9 respectively), // plus bnstars that locks up off the bat if the wrong irq runs at 60 Hz. // We currently hardwire via an init time setter here, making the irq acks to trigger properly as well. @@ -191,7 +191,7 @@ void jaleco_ms32_sysctrl_device::flush_scanline_timer(int current_scanline) // TODO: unknown mechanics where this happens, is it even tied to scanline? if (current_scanline == 0 && m_screen->frame_number() & 1) m_invert_vblank_lines ? m_vblank_cb(1) : m_field_cb(1); - + uint32_t next_scanline = (current_scanline + 1) % crtc_vtotal(); m_timer_scanline->adjust(m_screen->time_until_pos(next_scanline), next_scanline); } @@ -251,7 +251,7 @@ inline void jaleco_ms32_sysctrl_device::crtc_refresh_screen_params() void jaleco_ms32_sysctrl_device::control_w(u16 data) { - /* + /* * ---- x--- programmable irq timer enable * ---- -x-- used by f1superb, stepstag, bnstars * ---- --x- flip screen @@ -262,7 +262,7 @@ void jaleco_ms32_sysctrl_device::control_w(u16 data) m_dotclock_setting = BIT(data, 0); crtc_refresh_screen_params(); } - + const bool current_flip = bool(BIT(data, 1)); if (current_flip != m_flip_screen_state) { @@ -271,7 +271,7 @@ void jaleco_ms32_sysctrl_device::control_w(u16 data) } if (data & 0xf4) logerror("%s: enabled unknown bit in control_w %02x\n", this->tag(), data & 0xf4); - + m_timer.irq_enable = bool(BIT(data, 3)); flush_prg_timer(); } @@ -290,12 +290,12 @@ void jaleco_ms32_sysctrl_device::hdisplay_w(u16 data) void jaleco_ms32_sysctrl_device::hbp_w(u16 data) { - logerror("%s: HSYNC back porch %d\n", this->tag(), 0x1000 - data); + logerror("%s: HSYNC back porch %d\n", this->tag(), 0x1000 - data); } void jaleco_ms32_sysctrl_device::hfp_w(u16 data) { - logerror("%s: HSYNC front porch %d\n", this->tag(), 0x1000 - data); + logerror("%s: HSYNC front porch %d\n", this->tag(), 0x1000 - data); } void jaleco_ms32_sysctrl_device::vblank_w(u16 data) @@ -362,8 +362,8 @@ void jaleco_ms32_sysctrl_device::sound_ack_w(u16 data) void jaleco_ms32_sysctrl_device::irq_ack_w(u16 data) { - // guess: 68k games calls this in vblank routine instead of - // the designated line, maybe it's a 68k version difference + // guess: 68k games calls this in vblank routine instead of + // the designated line, maybe it's a 68k version difference // or maybe this is right m_vblank_cb(0); m_field_cb(0); diff --git a/src/mame/machine/jaleco_ms32_sysctrl.h b/src/mame/machine/jaleco_ms32_sysctrl.h index a521d724f14..d765965d633 100644 --- a/src/mame/machine/jaleco_ms32_sysctrl.h +++ b/src/mame/machine/jaleco_ms32_sysctrl.h @@ -42,7 +42,7 @@ public: auto sound_ack_cb() { return m_sound_ack_cb.bind(); } auto sound_reset_cb() { return m_sound_reset_cb.bind(); } void set_invert_vblank_lines(bool enable) { m_invert_vblank_lines = enable; } -// template void set_screen(T &&screen_tag) { m_screen.set_tag(std::forward(screen_tag)); printf("xxx"); } +// template void set_screen(T &&screen_tag) { m_screen.set_tag(std::forward(screen_tag)); printf("xxx"); } protected: // device-level overrides @@ -92,7 +92,7 @@ private: u16 interval; emu_timer *prg_irq; }m_timer; - + emu_timer *m_timer_scanline; enum timer_id { @@ -102,7 +102,7 @@ private: inline void flush_prg_timer(); inline void flush_scanline_timer(int current_scanline); - + bool m_invert_vblank_lines; }; diff --git a/src/mame/machine/mcr68.cpp b/src/mame/machine/mcr68.cpp index 819508e7ae5..9523ebe169f 100644 --- a/src/mame/machine/mcr68.cpp +++ b/src/mame/machine/mcr68.cpp @@ -21,7 +21,7 @@ *************************************/ void mcr68_state::machine_reset() -{ /* for the most part all MCR/68k games are the same */ +{ /* for the most part all MCR/68k games are the same */ m_v493_callback = timer_expired_delegate(FUNC(mcr68_state::mcr68_493_callback),this); } diff --git a/src/mame/machine/nes_vt369_vtunknown_soc.cpp b/src/mame/machine/nes_vt369_vtunknown_soc.cpp index ab646b2056b..709e625b87c 100644 --- a/src/mame/machine/nes_vt369_vtunknown_soc.cpp +++ b/src/mame/machine/nes_vt369_vtunknown_soc.cpp @@ -145,7 +145,7 @@ void nes_vt369_soc_device::nes_vt369_map(address_map &map) map(0x41b0, 0x41bf).r(FUNC(nes_vt369_soc_device::vt369_41bx_r)).w(FUNC(nes_vt369_soc_device::vt369_41bx_w)); -// map(0x48a0, 0x48af).r(FUNC(nes_vt369_soc_device::vt369_48ax_r)).w(FUNC(nes_vt369_soc_device::vt369_48ax_w)); +// map(0x48a0, 0x48af).r(FUNC(nes_vt369_soc_device::vt369_48ax_r)).w(FUNC(nes_vt369_soc_device::vt369_48ax_w)); map(0x4800, 0x4fff).ram().share("soundram"); // sound program for 2nd CPU is uploaded here, but some sets aren't uploading anything, do they rely on an internal ROM? other DMA? possibility to map ROM? map(0x6000, 0x7fff).r(FUNC(nes_vt369_soc_device::vt369_6000_r)).w(FUNC(nes_vt369_soc_device::vt369_6000_w)); diff --git a/src/mame/machine/slapstic.cpp b/src/mame/machine/slapstic.cpp index 4a8281de496..fe55dc4cd7e 100644 --- a/src/mame/machine/slapstic.cpp +++ b/src/mame/machine/slapstic.cpp @@ -178,7 +178,7 @@ - on 101 and 102, the 2nd alt access must be done outside of the bank region - on 103 to 108, the 1st alt access can be done anywhere - - on 110 to 118, the 1st and 3rd alt access can be done anywhere + - on 110 to 118, the 1st and 3rd alt access can be done anywhere These out-of-range accesses pose technical difficulties we're not fully handling yet. Similarly, accesses that must be done in sequence get @@ -275,8 +275,8 @@ static const struct slapstic_data slapstic101 = /* alternate banking */ // Real values, to be worked on later -// { 0x1f00,0x1e00 }, /* 1st mask/value in sequence */ -// { 0x1fff,0x1fff }, /* 2nd mask/value in sequence, *outside* of the range */ +// { 0x1f00,0x1e00 }, /* 1st mask/value in sequence */ +// { 0x1fff,0x1fff }, /* 2nd mask/value in sequence, *outside* of the range */ { 0x1fff,0x1dfe }, /* 1st mask/value in sequence */ { 0x1fff,0x1dff }, /* 2nd mask/value in sequence */ @@ -306,8 +306,8 @@ static const struct slapstic_data slapstic103 = /* alternate banking */ // Real values, to be worked on later -// { 0x3e00,0x3a00 }, /* 1st mask/value in sequence */ -// { 0x3ffe,0x3ffe }, /* 2nd mask/value in sequence, *outside* of the range */ +// { 0x3e00,0x3a00 }, /* 1st mask/value in sequence */ +// { 0x3ffe,0x3ffe }, /* 2nd mask/value in sequence, *outside* of the range */ { 0x007f,0x002d }, /* 1st mask/value in sequence */ { 0x3fff,0x3d14 }, /* 2nd mask/value in sequence */ { 0x3ffc,0x3d24 }, /* 3rd mask/value in sequence */ diff --git a/src/mame/video/drgnmst.cpp b/src/mame/video/drgnmst.cpp index 4dd30da87cf..5ed9b304079 100644 --- a/src/mame/video/drgnmst.cpp +++ b/src/mame/video/drgnmst.cpp @@ -213,10 +213,10 @@ uint32_t drgnmst_base_state::screen_update(screen_device &screen, bitmap_ind16 & m_bg_tilemap->set_scrollx(0, m_vidregs[0xa] - 18); // verify // this reg seems to be more closely related to md_tilemap again? is it some kind of split pos? - //int bgys = m_vidregs[0xb] & 0x1ff; + //int bgys = m_vidregs[0xb] & 0x1ff; int bgys = m_vidregs[0x10]; // skyscraper lift stage confirms this reg? - m_bg_tilemap->set_scrolly(0, bgys); + m_bg_tilemap->set_scrolly(0, bgys); } // TODO: figure out which bits relate to the order, like cps1? @@ -240,7 +240,7 @@ uint32_t drgnmst_base_state::screen_update(screen_device &screen, bitmap_ind16 & // but explicitly changes from 2cc0 to display scores, which indicates there is maybe a difference) m_bg_tilemap->draw(screen, bitmap, cliprect, TILEMAP_DRAW_OPAQUE, 0); m_md_tilemap->draw(screen, bitmap, cliprect, 0, 0); - m_fg_tilemap->draw(screen, bitmap, cliprect, 0, 0); + m_fg_tilemap->draw(screen, bitmap, cliprect, 0, 0); break; case 0x2780: // mastfury skyscraper lift stage all ok case 0x279a: // mastfury continue screen all ok diff --git a/src/mame/video/ms32.cpp b/src/mame/video/ms32.cpp index 19e4dbda41a..609ecde5120 100644 --- a/src/mame/video/ms32.cpp +++ b/src/mame/video/ms32.cpp @@ -122,7 +122,7 @@ void ms32_state::update_color(int color) // bnstars gameplay: 0x0000 0x0000 0x8080 0x0080 // desertwr ranking: 0x8080 0xff80 0x0000 0x0000 // gametngk: sets upper words of first two regs as 0x0100xxxx (discarded?) - // gameplay:0x0000 0x0000 0x2020 0x0020 + // gameplay:0x0000 0x0000 0x2020 0x0020 // continue:0x5050 0x0050 0x2020 0x0020 // hayaosi3 title: 0x7070 0x0070 0x0000 0x0000 // p47aces: bomb on stage clear fade out (untested, tbd) @@ -154,7 +154,7 @@ void ms32_state::ms32_brightness_w(offs_t offset, u32 data, u32 mem_mask) int oldword = m_brt[offset]; COMBINE_DATA(&m_brt[offset]); - + if (m_brt[offset] != oldword) { // TODO: bank "1" is for sprite colors @@ -180,7 +180,7 @@ void ms32_state::draw_sprites(bitmap_ind16 &bitmap, bitmap_ind8 &bitmap_pri, con const size_t sprite_tail = m_objectram_size - 8; //(0x20000 - 0x10) / 2; u16 *source = sprram_top; u16 *finish = sprram_top + sprite_tail; - // TODO: sprite control 0x10 also uses bits 0-11 for sprite start address? + // TODO: sprite control 0x10 also uses bits 0-11 for sprite start address? // akiss uses it for double buffer animations, flips between 0 and 0x800 (and is ugly for latter) const bool reverseorder = (m_sprite_ctrl[0x10/4] & 0x8000) == 0x0000; @@ -200,7 +200,7 @@ void ms32_state::draw_sprites(bitmap_ind16 &bitmap, bitmap_ind8 &bitmap_pri, con u16 xsize, ysize; s32 sx, sy; u16 xzoom, yzoom; - + m_sprite->extract_parameters(source, disable, pri, flipx, flipy, code, color, tx, ty, xsize, ysize, sx, sy, xzoom, yzoom); if (disable || !xzoom || !yzoom) @@ -222,21 +222,21 @@ void ms32_state::draw_sprites(bitmap_ind16 &bitmap, bitmap_ind8 &bitmap_pri, con void ms32_state::draw_roz(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect,int priority) { // TODO: registers 0x40 / 0x44 and 0x50 / 0x54 are used, unknown meaning - // Given how this works out it is most likely that 0x*0 controls X axis while 0x*4 Y, - // nothing is known to diverge between settings so far (i.e. bbbxing sets 0xffff to 0x4* and 0x0000 to 0x5*). - // 0x4* 0x5* ROZ should wrap? - // bbbxing: 0xffff 0x0000 0 (match presentation) - // gratia: 0x0000 0x0000 1 (sky in stage 2) - // p47aces: 0xffff 0x0651 0 (title screen) - // desertwr: 0xffff 0x0651 1 (any stage) - // f1superb: 0xffff 0x0000 ? - // suchie2: 0x0000 0x0000 0? - // bnstars: 0x0000 0x0000 ? - // hayaosi3: 0x0000 0x0000 ? - // akiss: 0xffff 0x0000 0 (gal riichi, cfr. attract mode) - // Maybe wrapping is done by limit boundaries rather than individual bits, so that bbbxing and p47aces abuses of this behaviour? - // Are we missing a ROZ plane size as well? - + // Given how this works out it is most likely that 0x*0 controls X axis while 0x*4 Y, + // nothing is known to diverge between settings so far (i.e. bbbxing sets 0xffff to 0x4* and 0x0000 to 0x5*). + // 0x4* 0x5* ROZ should wrap? + // bbbxing: 0xffff 0x0000 0 (match presentation) + // gratia: 0x0000 0x0000 1 (sky in stage 2) + // p47aces: 0xffff 0x0651 0 (title screen) + // desertwr: 0xffff 0x0651 1 (any stage) + // f1superb: 0xffff 0x0000 ? + // suchie2: 0x0000 0x0000 0? + // bnstars: 0x0000 0x0000 ? + // hayaosi3: 0x0000 0x0000 ? + // akiss: 0xffff 0x0000 0 (gal riichi, cfr. attract mode) + // Maybe wrapping is done by limit boundaries rather than individual bits, so that bbbxing and p47aces abuses of this behaviour? + // Are we missing a ROZ plane size as well? + if (m_roz_ctrl[0x5c/4] & 1) /* "super" mode */ { rectangle my_clip; @@ -323,28 +323,28 @@ u32 ms32_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const int rot_pri; /* - sprite control regs - 0x1c 0x20 0x40 - akiss 0 0 0 0 - bbbxing 0 0 0 0 - bnstars 1 0 0 1 - bnstars1 ? ? ? 1 - desertwr 1 0 0 0 - f1superb 0 0 0 0 - gametngk 0 0140 0 0 - gratia 0 0 0 0 - hayaosi2 0 0 0 0 - hayaosi3 0 0140 0 1 - kirarast 0 0 0 1 - p47aces 1 0 0 0 - suchie2 0 0 0 1 - tetrisp 0 0 0 0 - tp2m32 0 0140 0 1 - wpksocv2 0 0140 0 1 + sprite control regs + 0x1c 0x20 0x40 + akiss 0 0 0 0 + bbbxing 0 0 0 0 + bnstars 1 0 0 1 + bnstars1 ? ? ? 1 + desertwr 1 0 0 0 + f1superb 0 0 0 0 + gametngk 0 0140 0 0 + gratia 0 0 0 0 + hayaosi2 0 0 0 0 + hayaosi3 0 0140 0 1 + kirarast 0 0 0 1 + p47aces 1 0 0 0 + suchie2 0 0 0 1 + tetrisp 0 0 0 0 + tp2m32 0 0140 0 1 + wpksocv2 0 0140 0 1 */ -// popmessage("%04x %04x %04x",m_sprite_ctrl[0x1c/4], m_sprite_ctrl[0x20/4], m_sprite_ctrl[0x40/4]); -// popmessage("%04x %04x %04x %04x|%04x %04x %04x",m_sprite_ctrl[0x00/4],m_sprite_ctrl[0x04/4],m_sprite_ctrl[0x08/4],m_sprite_ctrl[0x0c/4] -// ,m_sprite_ctrl[0x10/4],m_sprite_ctrl[0x14/4],m_sprite_ctrl[0x18/4]); +// popmessage("%04x %04x %04x",m_sprite_ctrl[0x1c/4], m_sprite_ctrl[0x20/4], m_sprite_ctrl[0x40/4]); +// popmessage("%04x %04x %04x %04x|%04x %04x %04x",m_sprite_ctrl[0x00/4],m_sprite_ctrl[0x04/4],m_sprite_ctrl[0x08/4],m_sprite_ctrl[0x0c/4] +// ,m_sprite_ctrl[0x10/4],m_sprite_ctrl[0x14/4],m_sprite_ctrl[0x18/4]); /* TODO: registers 0x04/4 and 0x10/4 are used too; the most interesting case is gametngk, where they are *usually*, but not always, copies of 0x00/4 and 0x0c/4 (used for scrolling). @@ -432,13 +432,13 @@ u32 ms32_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const // TODO: spaghetti code // TODO: complete guesswork and missing many spots // TODO: move to a reusable function - /* it should be using ALL the data in the priority ram, probably for - per-pixel / pen mixing, or more levels than are supported here.. + /* it should be using ALL the data in the priority ram, probably for + per-pixel / pen mixing, or more levels than are supported here.. I don't know, it will need hw tests I think */ { pen_t const *const paldata = m_palette->pens(); bitmap.fill(0, cliprect); - + for (int yy = cliprect.min_y; yy <= cliprect.max_y; yy++) { u16 const *const srcptr_tile = &m_temp_bitmap_tilemaps.pix(yy); @@ -446,7 +446,7 @@ u32 ms32_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const u16 const *const srcptr_spri = &m_temp_bitmap_sprites.pix(yy); //u8 const *const srcptr_spripri = &m_temp_bitmap_sprites_pri.pix(yy); u32 *const dstptr_bitmap = &bitmap.pix(yy); - + for (int xx = cliprect.min_x; xx <= cliprect.max_x; xx++) { u16 src_tile = srcptr_tile[xx]; diff --git a/src/mame/video/ms32_sprite.cpp b/src/mame/video/ms32_sprite.cpp index 12fffc0139b..2884c764e5e 100644 --- a/src/mame/video/ms32_sprite.cpp +++ b/src/mame/video/ms32_sprite.cpp @@ -5,7 +5,7 @@ TODO: - verify hardware configuration; - - suchie2: on attract gals background display is cut off on the right side; + - suchie2: on attract gals background display is cut off on the right side; used by: ms32.cpp diff --git a/src/mame/video/osi.cpp b/src/mame/video/osi.cpp index f540b477f35..8e2c1cd3016 100644 --- a/src/mame/video/osi.cpp +++ b/src/mame/video/osi.cpp @@ -36,7 +36,7 @@ void sb2m600_state::video_start() for (uint16_t addr = 0; addr < OSI630_COLORRAM_SIZE; addr++) m_color_ram[addr] = machine().rand() & 0x0f; - m_32 = 0; + m_32 = 0; m_coloren = 0; } diff --git a/src/mame/video/seta001.cpp b/src/mame/video/seta001.cpp index 4651c4c83cd..583020c9389 100644 --- a/src/mame/video/seta001.cpp +++ b/src/mame/video/seta001.cpp @@ -30,8 +30,8 @@ appear to have 0x800 bytes of RAM that isn't connected to the sprite chip between the banks. - This should implement device_video_interface, since it generates the vertical - and horizontal blanking and sync signals from a master clock. + This should implement device_video_interface, since it generates the vertical + and horizontal blanking and sync signals from a master clock. */ #include "emu.h" diff --git a/src/mame/video/simpsons.cpp b/src/mame/video/simpsons.cpp index 1c43114823d..bd7c5776ad6 100644 --- a/src/mame/video/simpsons.cpp +++ b/src/mame/video/simpsons.cpp @@ -80,7 +80,7 @@ void simpsons_state::simpsons_video_banking( int bank ) if(bank & 1) m_palette_view.select(0); else - m_palette_view.disable(); + m_palette_view.disable(); m_video_view.select((bank >> 1) & 1); } diff --git a/src/mame/video/tunhunt.cpp b/src/mame/video/tunhunt.cpp index 89cd6a2d2d2..a9fbcc8e7c5 100644 --- a/src/mame/video/tunhunt.cpp +++ b/src/mame/video/tunhunt.cpp @@ -365,7 +365,7 @@ uint32_t tunhunt_state::screen_update(screen_device &screen, bitmap_ind16 &bitma m_shl1st, /* vstretch */ m_control&0x10 ); /* hstretch */ - rectangle cr = cliprect; + rectangle cr = cliprect; if( cr.min_x < 192 ) cr.min_x = 192; diff --git a/src/mame/video/undrfire.cpp b/src/mame/video/undrfire.cpp index 1c6db5e3379..6a1e451df63 100644 --- a/src/mame/video/undrfire.cpp +++ b/src/mame/video/undrfire.cpp @@ -465,27 +465,27 @@ u32 undrfire_state::screen_update_undrfire(screen_device &screen, bitmap_ind16 & /* - TC0360PRI Priority format for chase bombers - - Offset Bits Description - 7654 3210 - 00 0001 1100 Unknown - 01 0000 1111 Unknown - 04 xxxx ---- TC0480SCP Layer 3 Priority - ---- xxxx TC0480SCP Layer 2 Priority - 05 xxxx ---- TC0480SCP Layer 1 Priority - ---- xxxx TC0480SCP Layer 0 Priority - 06 xxxx ---- TC0480SCP Text Layer Priority - ---- 0000 Unknown - 07 xxxx ---- TC0620SCC Layer 0 Priority - ---- xxxx TC0620SCC Layer 1 Priority - 08 xxxx ---- Sprite Priority Bank 1 - ---- xxxx Sprite Priority Bank 0 - 09 xxxx ---- Sprite Priority Bank 3 - ---- xxxx Sprite Priority Bank 2 - - Values are 0 (Bottommost) ... f (Topmost) - Other registers are unknown/unused + TC0360PRI Priority format for chase bombers + + Offset Bits Description + 7654 3210 + 00 0001 1100 Unknown + 01 0000 1111 Unknown + 04 xxxx ---- TC0480SCP Layer 3 Priority + ---- xxxx TC0480SCP Layer 2 Priority + 05 xxxx ---- TC0480SCP Layer 1 Priority + ---- xxxx TC0480SCP Layer 0 Priority + 06 xxxx ---- TC0480SCP Text Layer Priority + ---- 0000 Unknown + 07 xxxx ---- TC0620SCC Layer 0 Priority + ---- xxxx TC0620SCC Layer 1 Priority + 08 xxxx ---- Sprite Priority Bank 1 + ---- xxxx Sprite Priority Bank 0 + 09 xxxx ---- Sprite Priority Bank 3 + ---- xxxx Sprite Priority Bank 2 + + Values are 0 (Bottommost) ... f (Topmost) + Other registers are unknown/unused */ u32 undrfire_state::screen_update_cbombers(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -- cgit v1.2.3