From 39b11f89d81f374145409a901a127e340d234427 Mon Sep 17 00:00:00 2001 From: arbee Date: Fri, 28 Feb 2020 22:26:04 -0500 Subject: wxstar4k: add lots of documentation (nw) --- src/mame/drivers/wxstar4000.cpp | 100 +++++++++++++++++++++++++++++++++++----- 1 file changed, 89 insertions(+), 11 deletions(-) diff --git a/src/mame/drivers/wxstar4000.cpp b/src/mame/drivers/wxstar4000.cpp index 46433f7ec6d..b5fc364b108 100644 --- a/src/mame/drivers/wxstar4000.cpp +++ b/src/mame/drivers/wxstar4000.cpp @@ -20,9 +20,39 @@ - Data/Audio board contains an Intel P8344AH, which is an MCU containing an i8051 and an SDLC decoder. The "audio" is a TTL circuit to create an alert tone for severe weather conditions. - - I/O board contains an i8051 CPU, an i8251A UART and serial port for a modem, + - I/O board contains an i8031 CPU, an i8251A UART and serial port for a modem, and an AT-style keyboard interface and DIN connector. + CPU board 68010 IRQs: + IRQ1 = Internal Real Time Clock, Autovectored. Or, Can be used externally but requires manual vectoring. + IRQ2 = I/O Card Incoming interrupt Request. Triggered when I/O card needs us to handle something. + IRQ3 = Secondary Graphics Card Incoming interrupt request. Not used in single-card systems. + IRQ4 = Primary Graphics Card Incoming interrupt request. + IRQ5 = Data Card incoming interrupt request. Triggers when the Data card has something for us to do or handle. + IRQ6 = Unused. + IRQ7 = AC Fail, Battery Backup Input. Once triggered, Unrecoverable. Requires System Reset. + + Graphics board 68010 IRQs: + IRQ5 = Vertical Blanking Interrupt. Autovectored. Used for timing graphics acceleration instructions. + IRQ6 = Incoming request from the CPU Card. Used to signal us to go do something. + IRQ7 = AC Fail, Battery Backup Input. Once triggered, Unrecoverable. Requires System Reset. + + Graphics board 8051 GPIO pins: + P1.0(T2) = FIFO Empty Flag + P1.1(T2EX) = Switch to Sat Video. (Active Low)(Drive high to shutdown genlock) + P1.2 = Switch To Local Video. (Active High) + P1.3 = Flag to 68K CPU (Control CPU Ready for Command, Active High) + P1.4 = Sat Video Present/Odd-Even Frame Indicator + P1.5 = Frame/Sync Control Register (Or Timer prescaler) + P1.6 = Frame/Sync Control Register (Or Timer prescaler) + P1.7 = Frame/Sync Control Register (Or Timer prescaler), Watchdog timer. + P3.0 = RX from FPGA + P3.1 = TX to FPGA + P3.2(INT0) = Vertical Drive Interrupt + P3.3(INT1) = Odd/Even Frame Sync Interrupt + P3.4(T0) = Input from Frame/Sync Control Register + P3.5(T1) = Input from Frame/Sync Control Register + ***************************************************************************/ #include "emu.h" @@ -46,7 +76,9 @@ public: m_gfxsubcpu(*this, "gfxsubcpu"), m_datacpu(*this, "datacpu"), m_iocpu(*this, "iocpu"), - m_mainram(*this, "mainram") + m_mainram(*this, "extram"), + m_extram(*this, "extram"), + m_vram(*this, "vram") { } void wxstar4k(machine_config &config); @@ -67,9 +99,9 @@ private: virtual void machine_reset() override; virtual void video_start() override; - required_device m_maincpu, m_gfxcpu; - required_device m_gfxsubcpu, m_datacpu, m_iocpu; - required_shared_ptr m_mainram; + optional_device m_maincpu, m_gfxcpu; + optional_device m_gfxsubcpu, m_datacpu, m_iocpu; + optional_shared_ptr m_mainram, m_extram, m_vram; DECLARE_READ16_MEMBER(buserr_r) { @@ -91,17 +123,37 @@ uint32_t wxstar4k_state::screen_update(screen_device &screen, bitmap_ind16 &bitm void wxstar4k_state::cpubd_main(address_map &map) { // 4x M5M44400A fast-page DRAMs (1M x 4) - map(0x000000, 0x1fffff).ram().share("mainram"); - map(0x100000, 0x100003).r(FUNC(wxstar4k_state::buserr_r)); + map(0x000000, 0x1fffff).ram().share("mainram"); // private RAM + map(0x200000, 0x3fffff).ram().share("extram"); // RAM accessible by other cards + map(0x400000, 0x400003).r(FUNC(wxstar4k_state::buserr_r)); + // C00000 - I/O card control register + // C00001-C001FF - I/O card UART buffer + // C04000-C041FF - I/O card modem buffer + // C0A000 - data card FIFO + // C0A200 - write byte to data card CPU + // C0A400 - read byte from data card CPU + // C0A600 - write byte to audio control latch 1 + // C0A800 - write byte to audio control latch 2 + map(0xfd0000, 0xfd3fff).rom().region("eeprom", 0); // we'll make this writable later + // FDF000 - cause IRQ 6 on graphics card + // FDF004 - cause IRQ 6 on graphics card 2 (not used) + // FDF008 - reset watchdog + // FDFFC0-FDFFE2 - ICM7170 RTC, registers every 2 bytes map(0xfe0000, 0xffffff).rom().region("maincpu", 0); } void wxstar4k_state::vidbd_main(address_map &map) { map(0x000000, 0x00ffff).rom().region("gfxcpu", 0); - map(0x100000, 0x10ffff).ram(); // shared with main? - map(0x200002, 0x200003).nopr(); // probably resets the watchdog - map(0x400000, 0x45ffff).ram(); // framebuffer? + map(0x100000, 0x10ffff).ram(); + // 200000 - read bit 0=i8051 FIFO full, bit1=i8051 ready for command. write: top 7 bits of VME address. + map(0x200002, 0x200003).nopr(); // read: watchdog reset + bit0=Sat video present, bit1=local video present + // write: interrupt vector when causing a main CPU interrupt + // 200004 - write i8051 FIFO + // 200006 - cause IRQ4 on main CPU + // 300000-300003 - graphics control registers + map(0x400000, 0x5fffff).ram().share("vram"); // framebuffer (16x M5M44256 = 16Mbit) + // E00000-E1FFFF - lower 16 address bits of VME access } void wxstar4k_state::vidbd_sub(address_map &map) @@ -112,6 +164,17 @@ void wxstar4k_state::vidbd_sub(address_map &map) void wxstar4k_state::vidbd_sub_io(address_map &map) { map(0x0000, 0x07ff).ram(); + // 1000-17FF - VRAM counter low byte + // 1800-1FFF - VRAM counter high byte + // 2000-27FF - read FIFO from 68010 + // 2800-7FFF - undecoded + // 8000 - Bt471 palette address write (also at C000) + // 8800 - Bt471 palette RAM (also C800) + // 9000 - Bt471 pixel mask read (also D000) + // 9800 - Bt471 palette address read (also D800) + // A000 - Bt471 overlay write address (also E000) + // A800 - Bt471 overlay register (also E800) + // B800 - Bt471 overlay read address (also F800) } void wxstar4k_state::databd_main(address_map &map) @@ -121,6 +184,21 @@ void wxstar4k_state::databd_main(address_map &map) void wxstar4k_state::databd_main_io(address_map &map) { + map(0x0000, 0x01ff).ram(); + // 0200 - UART data + // 0201 - UART command + // 8000 - PIO1 Command/Status register + // 8001 - PIO1 Port A - VME address/data AD1-AD8 + // 8002 - PIO1 Port B - rear external switches + // 8003 - PIO1 Port C + // 8004 - PIO1 transfer count low + // 8005 - PIO1 transfer count high + // 8100 - PIO2 Command/Status register + // 8101 - PIO2 Port A - indicator LEDs + // 8102 - PIO2 Port B - DTMF dialer codes + 1 LED + // 8103 - PIO2 Port C - bus clear, charging indicator + // 8104 - PIO2 transfer count low + // 8105 - PIO2 transfer count high } void wxstar4k_state::iobd_main(address_map &map) @@ -163,7 +241,7 @@ void wxstar4k_state::wxstar4k(machine_config &config) m_datacpu->set_addrmap(AS_PROGRAM, &wxstar4k_state::databd_main); m_datacpu->set_addrmap(AS_IO, &wxstar4k_state::databd_main_io); - I8051(config, m_iocpu, XTAL(11'059'200)); // 11.0592 MHz crystal connected directly to the CPU + I8031(config, m_iocpu, XTAL(11'059'200)); // 11.0592 MHz crystal connected directly to the CPU m_iocpu->set_addrmap(AS_PROGRAM, &wxstar4k_state::iobd_main); m_iocpu->set_addrmap(AS_IO, &wxstar4k_state::iobd_main_io); -- cgit v1.2.3