From 3603b85686b833a3ea4e6ce977c9b6b86dfd2c71 Mon Sep 17 00:00:00 2001 From: AJR Date: Fri, 29 Sep 2017 17:49:39 -0400 Subject: bublbobl.cpp: Fix for sets with no MCU (nw) --- src/mame/drivers/bublbobl.cpp | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/src/mame/drivers/bublbobl.cpp b/src/mame/drivers/bublbobl.cpp index 51b82bdcdff..516e058f9e2 100644 --- a/src/mame/drivers/bublbobl.cpp +++ b/src/mame/drivers/bublbobl.cpp @@ -947,12 +947,11 @@ MACHINE_RESET_MEMBER(bublbobl_state,bublbobl) m_port4_out = 0; } -static MACHINE_CONFIG_START( bublbobl ) +static MACHINE_CONFIG_START( bublbobl_nomcu ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", Z80, MAIN_XTAL/4) // 6 MHz MCFG_CPU_PROGRAM_MAP(bublbobl_maincpu_map) - // IRQs are triggered by the MCU MCFG_CPU_ADD("subcpu", Z80, MAIN_XTAL/4) // 6 MHz MCFG_CPU_PROGRAM_MAP(subcpu_map) @@ -961,9 +960,6 @@ static MACHINE_CONFIG_START( bublbobl ) MCFG_CPU_ADD("audiocpu", Z80, MAIN_XTAL/8) // 3 MHz MCFG_CPU_PROGRAM_MAP(sound_map) // IRQs are triggered by the YM2203 - MCFG_CPU_ADD("mcu", M6801, XTAL_4MHz) // actually 6801U4 - xtal is 4MHz, divided by 4 internally - MCFG_CPU_PROGRAM_MAP(mcu_map) - MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // 100 CPU slices per frame - a high value to ensure proper synchronization of the CPUs MCFG_WATCHDOG_ADD("watchdog") @@ -977,7 +973,6 @@ static MACHINE_CONFIG_START( bublbobl ) MCFG_SCREEN_RAW_PARAMS(MAIN_XTAL/4, 384, 0, 256, 264, 16, 240) MCFG_SCREEN_UPDATE_DRIVER(bublbobl_state, screen_update_bublbobl) MCFG_SCREEN_PALETTE("palette") - MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("mcu", M6801_IRQ_LINE)) // same clock latches the INT pin on the second Z80 MCFG_GFXDECODE_ADD("gfxdecode", "palette", bublbobl) MCFG_PALETTE_ADD("palette", 256) @@ -1007,6 +1002,14 @@ static MACHINE_CONFIG_START( bublbobl ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( bublbobl, bublbobl_nomcu ) + MCFG_CPU_ADD("mcu", M6801, XTAL_4MHz) // actually 6801U4 - xtal is 4MHz, divided by 4 internally + MCFG_CPU_PROGRAM_MAP(mcu_map) + + MCFG_SCREEN_MODIFY("screen") + MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("mcu", M6801_IRQ_LINE)) // same clock latches the INT pin on the second Z80 +MACHINE_CONFIG_END + MACHINE_START_MEMBER(bublbobl_state,boblbobl) { MACHINE_START_CALL_MEMBER(common); @@ -1024,7 +1027,7 @@ MACHINE_RESET_MEMBER(bublbobl_state,boblbobl) m_ic43_b = 0; } -static MACHINE_CONFIG_DERIVED( boblbobl, bublbobl ) +static MACHINE_CONFIG_DERIVED( boblbobl, bublbobl_nomcu ) /* basic machine hardware */ MCFG_CPU_MODIFY("maincpu") @@ -1033,8 +1036,6 @@ static MACHINE_CONFIG_DERIVED( boblbobl, bublbobl ) MCFG_MACHINE_START_OVERRIDE(bublbobl_state, boblbobl) MCFG_MACHINE_RESET_OVERRIDE(bublbobl_state, boblbobl) - - MCFG_DEVICE_REMOVE("mcu") MACHINE_CONFIG_END @@ -1060,11 +1061,9 @@ MACHINE_RESET_MEMBER(bub68705_state, bub68705) m_latch = 0; } -static MACHINE_CONFIG_DERIVED( bub68705, bublbobl ) +static MACHINE_CONFIG_DERIVED( bub68705, bublbobl_nomcu ) /* basic machine hardware */ - MCFG_DEVICE_REMOVE("mcu") - MCFG_CPU_ADD("mcu", M68705P3, XTAL_4MHz) // xtal is 4MHz, divided by 4 internally MCFG_M68705_PORTC_R_CB(IOPORT("IN0")) MCFG_M68705_PORTA_W_CB(WRITE8(bub68705_state, port_a_w)) -- cgit v1.2.3