From 3377cb0ccd69089b940341eb8901eb530eee3e64 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 21 Dec 2022 21:03:39 +0000 Subject: dataeast/decocass.cpp: Cleaned up BIOS macros, fixed bit error in cnebula tape image and added bootlegs. (#10681) * Reworked BIOS macros - added missing 'older' types, sorted new to old * Added support for a different aftermarket multi-game kit. New working machines ------------------- DECO Cassette System ROM Multigame (Darksoft, v17) [David Haywood] New working clones ------------------- DECO Cassette System ROM Multigame (Darksoft, v16) [David Haywood] DECO Cassette System ROM Multigame (Darksoft, v15) [David Haywood] --- src/mame/dataeast/decocass.cpp | 197 ++++++++++++++++++++------------------- src/mame/dataeast/decocass.h | 22 +++++ src/mame/dataeast/decocass_m.cpp | 148 +++++++++++++++++++++-------- src/mame/mame.lst | 3 + 4 files changed, 232 insertions(+), 138 deletions(-) diff --git a/src/mame/dataeast/decocass.cpp b/src/mame/dataeast/decocass.cpp index 4ad531b5e5f..ed3d089208e 100644 --- a/src/mame/dataeast/decocass.cpp +++ b/src/mame/dataeast/decocass.cpp @@ -1350,114 +1350,77 @@ void decocass_type3_state::cfghtice(machine_config &config) /************ Version A bios roms *************/ -/* v0a.7e, New boardset bios, country code A */ -#define DECOCASS_BIOS_A_MAINCPU \ - ROM_SYSTEM_BIOS( 0, "a", "Bios A (Japan)" ) \ - ROM_LOAD_BIOS( 0, "v0a-.7e", 0xf000, 0x1000, CRC(3d33ac34) SHA1(909d59e7a993affd10224402b4370e82a5f5545c) ) /* from RMS-8 board: 2732 EPROM @7E w/'V0A-' label (has HDRA01HDR string inside it), bios code */ -#define DECOCASS_BIOS_A_AUDIOCPU \ - ROM_LOAD_BIOS( 0, "v1-.5a", 0xf800, 0x0800, CRC(b66b2c2a) SHA1(0097f38beb4872e735e560148052e258a26b08fd) ) /* from RMS-8 board: 2716 eprom @5A w/V1- label, contains audio cpu code */ -#define DECOCASS_BIOS_A_PROMS \ - ROM_LOAD_BIOS( 0, "v2.3m", 0x0000, 0x0020, CRC(238fdb40) SHA1(b88e8fabb82092105c3828154608ea067acbf2e5) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3M w/'V2' stamp, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ - ROM_LOAD_BIOS( 0, "v4.10d", 0x0020, 0x0020, CRC(3b5836b4) SHA1(b630bb277d9ec09d46ef26b944014dd6165b35d8) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @10D w/'V4' stamp, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ - ROM_LOAD_BIOS( 0, "v3.3j", 0x0040, 0x0020, CRC(51eef657) SHA1(eaedce5caf55624ad6ae706aedf82c5717c60f1f) ) /* from RMS-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3J w/'V3' stamp, handles DRAM banking and timing */ - -/* Old boardset bios, country code A (for Japan), 2x 2716 EPROM, MD labbeled as RMS-3D and MT as RMS-3T, region code (letter) is (not always) inserted after "-" */ \ -#define DECOCASS_BIOS_A0_MAINCPU \ - ROM_SYSTEM_BIOS( 1, "a0", "Bios A (Japan, older)" ) \ - ROM_LOAD_BIOS( 1, "dsp-3_p0-a.m9", 0xf000, 0x0800, CRC(2541e34b) SHA1(4f983513dbae1350c83a433dea77a4465748b9c6) ) \ - ROM_LOAD_BIOS( 1, "dsp-3_p1-.l9", 0xf800, 0x0800, CRC(3bfff5f3) SHA1(4e9437cb1b76d64da6b37f01bd6e879fb399e8ce) ) -#define DECOCASS_BIOS_A0_AUDIOCPU \ - ROM_LOAD_BIOS( 1, "rms-3_p2-.c9", 0xfc00, 0x0400, CRC(6c4a891f) SHA1(5c00cf8b1accfdbb1d61e9b3f6db1594dfbc608b) ) /* 2708 EPROM, contains audio cpu code */ -#define DECOCASS_BIOS_A0_PROMS \ - ROM_LOAD_BIOS( 1, "dsp-3_p3-.e5", 0x0000, 0x0020, CRC(539a5a64) SHA1(7b7d3cc58ac6f95242240c97046e770d2fd20c96) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ - ROM_LOAD_BIOS( 1, "rms-3_p4-.f6", 0x0020, 0x0020, CRC(9014c0fd) SHA1(7405d39a5f4fcad821448ddaf6bd4e27c0c9e145) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ - ROM_LOAD_BIOS( 1, "dsp-3_p5-.m4", 0x0040, 0x0020, CRC(e52089a0) SHA1(d85c17809b089c6977ee9571f976af6f107fd4d3) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, handles DRAM banking and timing */ \ - -/************ Version B bios roms *************/ - -/* rms8.7e, New boardset bios, country code B */ \ -#define DECOCASS_BIOS_B_MAINCPU \ - ROM_SYSTEM_BIOS( 2, "b", "Bios B (USA)" ) \ - ROM_LOAD_BIOS( 2, "v0b-.7e", 0xf000, 0x1000, CRC(23d929b7) SHA1(063f83020ba3d6f43ab8471f95ca919767b93aa4) ) /* from RMS-8 board: 2732 EPROM @7E w/'V0B-' label (has HDRB01HDR string inside it), bios code */ -#define DECOCASS_BIOS_B_AUDIOCPU \ - ROM_LOAD_BIOS( 2, "v1-.5a", 0xf800, 0x0800, CRC(b66b2c2a) SHA1(0097f38beb4872e735e560148052e258a26b08fd) ) /* from RMS-8 board: 2716 eprom @5A w/V1- label, contains audio cpu code */ -#define DECOCASS_BIOS_B_PROMS \ - ROM_LOAD_BIOS( 2, "v2.3m", 0x0000, 0x0020, CRC(238fdb40) SHA1(b88e8fabb82092105c3828154608ea067acbf2e5) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3M w/'V2' stamp, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ - ROM_LOAD_BIOS( 2, "v4.10d", 0x0020, 0x0020, CRC(3b5836b4) SHA1(b630bb277d9ec09d46ef26b944014dd6165b35d8) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @10D w/'V4' stamp, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ - ROM_LOAD_BIOS( 2, "v3.3j", 0x0040, 0x0020, CRC(51eef657) SHA1(eaedce5caf55624ad6ae706aedf82c5717c60f1f) ) /* from RMS-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3J w/'V3' stamp, handles DRAM banking and timing */ - -/* Old boardset bios, version B for USA, 2x 2716 EPROM, MD labbeled as RMS-3D and MT as RMS-3T, region code (letter) is (not always) inserted after "-" */ \ -/* dsp3.p0b/p1b, Old boardset bios, country code B?; from DSP-3 board? has HDRB01x string in it, 2x 2716 EPROM? */ \ -#define DECOCASS_BIOS_B0_MAINCPU \ - ROM_SYSTEM_BIOS( 3, "b0", "Bios B (USA, older)" ) \ - ROM_LOAD_BIOS( 3, "dsp-3_p0-b.m9", 0xf000, 0x0800, CRC(b67a91d9) SHA1(681c040be0f0ed1ba0a50161b36d0ad8e1c8c5cb) ) \ - ROM_LOAD_BIOS( 3, "dsp-3_p1-.l9", 0xf800, 0x0800, CRC(3bfff5f3) SHA1(4e9437cb1b76d64da6b37f01bd6e879fb399e8ce) ) -#define DECOCASS_BIOS_B0_AUDIOCPU \ - ROM_LOAD_BIOS( 3, "rms-3_p2-.c9", 0xfc00, 0x0400, CRC(6c4a891f) SHA1(5c00cf8b1accfdbb1d61e9b3f6db1594dfbc608b) ) /* 2708 EPROM, contains audio cpu code */ -#define DECOCASS_BIOS_B0_PROMS \ - ROM_LOAD_BIOS( 3, "dsp-3_p3-.e5", 0x0000, 0x0020, CRC(539a5a64) SHA1(7b7d3cc58ac6f95242240c97046e770d2fd20c96) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ - ROM_LOAD_BIOS( 3, "rms-3_p4-.f6", 0x0020, 0x0020, CRC(9014c0fd) SHA1(7405d39a5f4fcad821448ddaf6bd4e27c0c9e145) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ - ROM_LOAD_BIOS( 3, "dsp-3_p5-.m4", 0x0040, 0x0020, CRC(e52089a0) SHA1(d85c17809b089c6977ee9571f976af6f107fd4d3) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, handles DRAM banking and timing */ \ - -/* New boardset bios, country code C - UK */ -#define DECOCASS_BIOS_C_MAINCPU \ - ROM_SYSTEM_BIOS( 4, "c", "Bios C (UK)" ) \ - ROM_LOAD_BIOS( 4, "v0c-.7e", 0xf000, 0x1000, CRC(9f505709) SHA1(a9c661ba5a0d3fa5e935fb9c10fa63e2d9809981) ) /* handcrafted (single byte changed) because cnebula requires region C */ -#define DECOCASS_BIOS_C_AUDIOCPU \ - ROM_LOAD_BIOS( 4, "v1-.5a", 0xf800, 0x0800, CRC(b66b2c2a) SHA1(0097f38beb4872e735e560148052e258a26b08fd) ) /* from RMS-8 board: 2716 eprom @5A w/V1- label, contains audio cpu code */ -#define DECOCASS_BIOS_C_PROMS \ - ROM_LOAD_BIOS( 4, "v2.3m", 0x0000, 0x0020, CRC(238fdb40) SHA1(b88e8fabb82092105c3828154608ea067acbf2e5) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3M w/'V2' stamp, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ - ROM_LOAD_BIOS( 4, "v4.10d", 0x0020, 0x0020, CRC(3b5836b4) SHA1(b630bb277d9ec09d46ef26b944014dd6165b35d8) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @10D w/'V4' stamp, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ - ROM_LOAD_BIOS( 4, "v3.3j", 0x0040, 0x0020, CRC(51eef657) SHA1(eaedce5caf55624ad6ae706aedf82c5717c60f1f) ) /* from RMS-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3J w/'V3' stamp, handles DRAM banking and timing */ - -/* rms8.7e, New boardset bios, country code D - Europe */ \ -#define DECOCASS_BIOS_D_MAINCPU \ - ROM_SYSTEM_BIOS( 5, "d", "Bios D (Europe)" ) \ - ROM_LOAD_BIOS( 5, "v0d-.7e", 0xf000, 0x1000, CRC(1e0c22b1) SHA1(5fec8fef500bbebc13d0173406afc55235d3affb) ) /* handcrafted (single byte changed) because ctisland3 requires region D */ -#define DECOCASS_BIOS_D_AUDIOCPU \ - ROM_LOAD_BIOS( 5, "v1-.5a", 0xf800, 0x0800, CRC(b66b2c2a) SHA1(0097f38beb4872e735e560148052e258a26b08fd) ) /* from RMS-8 board: 2716 eprom @5A w/V1- label, contains audio cpu code */ -#define DECOCASS_BIOS_D_PROMS \ - ROM_LOAD_BIOS( 5, "v2.3m", 0x0000, 0x0020, CRC(238fdb40) SHA1(b88e8fabb82092105c3828154608ea067acbf2e5) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3M w/'V2' stamp, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ - ROM_LOAD_BIOS( 5, "v4.10d", 0x0020, 0x0020, CRC(3b5836b4) SHA1(b630bb277d9ec09d46ef26b944014dd6165b35d8) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @10D w/'V4' stamp, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ - ROM_LOAD_BIOS( 5, "v3.3j", 0x0040, 0x0020, CRC(51eef657) SHA1(eaedce5caf55624ad6ae706aedf82c5717c60f1f) ) /* from RMS-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3J w/'V3' stamp, handles DRAM banking and timing */ - +#define DECOCASS_BIOS_AUDIOCPU(biosindex) \ + ROM_LOAD_BIOS( biosindex, "v1-.5a", 0xf800, 0x0800, CRC(b66b2c2a) SHA1(0097f38beb4872e735e560148052e258a26b08fd) ) /* from RMS-8 board: 2716 eprom @5A w/V1- label, contains audio cpu code */ +#define DECOCASS_BIOS_PROMS(biosindex) \ + ROM_LOAD_BIOS( biosindex, "v2.3m", 0x0000, 0x0020, CRC(238fdb40) SHA1(b88e8fabb82092105c3828154608ea067acbf2e5) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3M w/'V2' stamp, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ + ROM_LOAD_BIOS( biosindex, "v4.10d", 0x0020, 0x0020, CRC(3b5836b4) SHA1(b630bb277d9ec09d46ef26b944014dd6165b35d8) ) /* from DSP-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @10D w/'V4' stamp, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ + ROM_LOAD_BIOS( biosindex, "v3.3j", 0x0040, 0x0020, CRC(51eef657) SHA1(eaedce5caf55624ad6ae706aedf82c5717c60f1f) ) /* from RMS-8 board: M3-7603-5 (82s123 equiv, 32x8 TS) PROM @3J w/'V3' stamp, handles DRAM banking and timing */ +#define DECOCASS_BIOS_AUDIOCPU_OLD(biosindex) \ + ROM_LOAD_BIOS( biosindex, "rms-3_p2-.c9", 0xfc00, 0x0400, CRC(6c4a891f) SHA1(5c00cf8b1accfdbb1d61e9b3f6db1594dfbc608b) ) /* 2708 EPROM, contains audio cpu code */ +#define DECOCASS_BIOS_PROMS_OLD(biosindex) \ + ROM_LOAD_BIOS( biosindex, "dsp-3_p3-.e5", 0x0000, 0x0020, CRC(539a5a64) SHA1(7b7d3cc58ac6f95242240c97046e770d2fd20c96) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, unknown purpose (gfx related: row/interrupt/vblank related? vertical counter related) */ \ + ROM_LOAD_BIOS( biosindex, "rms-3_p4-.f6", 0x0020, 0x0020, CRC(9014c0fd) SHA1(7405d39a5f4fcad821448ddaf6bd4e27c0c9e145) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, unknown purpose (gfx related: tile banking? horizontal counter related) */ \ + ROM_LOAD_BIOS( biosindex, "dsp-3_p5-.m4", 0x0040, 0x0020, CRC(e52089a0) SHA1(d85c17809b089c6977ee9571f976af6f107fd4d3) ) /* M3-7603-5 (82s123 equiv, 32x8 TS) PROM, handles DRAM banking and timing */ /************ Common MCU bios rom *************/ #define DECOCASS_BIOS_MCU \ ROM_LOAD( "cassmcu.1c", 0x0000, 0x0400, CRC(a6df18fd) SHA1(1f9ea47e372d31767c936c15852b43df2b0ee8ff) ) /* from B10-B board: "NEC // JAPAN // X1202D-108 // D8041C 535" 8041 MCU @1C, handles cassette and other stuff; This info needs additional verification, as the d8041-535 mcu has not been dumped yet to prove code is the same. */ - - #define DECOCASS_BIOS_MAIN \ + ROM_SYSTEM_BIOS( 0, "a", "Bios A (Japan)" ) \ + ROM_SYSTEM_BIOS( 1, "b", "Bios B (USA)" ) \ + ROM_SYSTEM_BIOS( 2, "c", "Bios C (UK)" ) \ + ROM_SYSTEM_BIOS( 3, "d", "Bios D (Europe)" ) \ + ROM_SYSTEM_BIOS( 4, "a0", "Bios A (Japan, older PCB)" ) \ + ROM_SYSTEM_BIOS( 5, "b0", "Bios B (USA, older PCB)" ) \ + ROM_SYSTEM_BIOS( 6, "c0", "Bios C (UK, older PCB)" ) \ + ROM_SYSTEM_BIOS( 7, "d0", "Bios D (Europe, older PCB)" ) \ + \ ROM_REGION( 0x10000, "maincpu", 0 ) \ - DECOCASS_BIOS_A_MAINCPU \ - DECOCASS_BIOS_A0_MAINCPU \ - DECOCASS_BIOS_B_MAINCPU \ - DECOCASS_BIOS_B0_MAINCPU \ - DECOCASS_BIOS_C_MAINCPU \ - DECOCASS_BIOS_D_MAINCPU \ + /* New boardset BIOS */ \ + ROM_LOAD_BIOS( 0, "v0a-.7e", 0xf000, 0x1000, CRC(3d33ac34) SHA1(909d59e7a993affd10224402b4370e82a5f5545c) ) /* from RMS-8 board: 2732 EPROM @7E w/'V0A-' label (has HDRA01HDR string inside it), bios code */ \ + ROM_LOAD_BIOS( 1, "v0b-.7e", 0xf000, 0x1000, CRC(23d929b7) SHA1(063f83020ba3d6f43ab8471f95ca919767b93aa4) ) /* from RMS-8 board: 2732 EPROM @7E w/'V0B-' label (has HDRB01HDR string inside it), bios code */ \ + ROM_LOAD_BIOS( 2, "v0c-.7e", 0xf000, 0x1000, CRC(9f505709) SHA1(a9c661ba5a0d3fa5e935fb9c10fa63e2d9809981) ) /* handcrafted (single byte changed) because cnebula requires region C */ \ + ROM_LOAD_BIOS( 3, "v0d-.7e", 0xf000, 0x1000, CRC(1e0c22b1) SHA1(5fec8fef500bbebc13d0173406afc55235d3affb) ) /* handcrafted (single byte changed) because ctisland3 requires region D */ \ + \ + /* Old boardset BIOS, 2x 2716 EPROM, MD labbeled as RMS-3D and MT as RMS-3T, region code (letter) is (not always) inserted after "-" */ \ + ROM_LOAD_BIOS( 4, "dsp-3_p0-a.m9", 0xf000, 0x0800, CRC(2541e34b) SHA1(4f983513dbae1350c83a433dea77a4465748b9c6) ) \ + ROM_LOAD_BIOS( 4, "dsp-3_p1-.l9", 0xf800, 0x0800, CRC(3bfff5f3) SHA1(4e9437cb1b76d64da6b37f01bd6e879fb399e8ce) ) \ + ROM_LOAD_BIOS( 5, "dsp-3_p0-b.m9", 0xf000, 0x0800, CRC(b67a91d9) SHA1(681c040be0f0ed1ba0a50161b36d0ad8e1c8c5cb) ) \ + ROM_LOAD_BIOS( 5, "dsp-3_p1-.l9", 0xf800, 0x0800, CRC(3bfff5f3) SHA1(4e9437cb1b76d64da6b37f01bd6e879fb399e8ce) ) \ + ROM_LOAD_BIOS( 6, "dsp-3_p0-c.m9", 0xf000, 0x0800, CRC(c76c4057) SHA1(4093d4ac44feff595e34f361ed1ed84113c9225e) ) \ + ROM_LOAD_BIOS( 6, "dsp-3_p1-.l9", 0xf800, 0x0800, CRC(3bfff5f3) SHA1(4e9437cb1b76d64da6b37f01bd6e879fb399e8ce) ) \ + ROM_LOAD_BIOS( 7, "dsp-3_p0-d.m9", 0xf000, 0x0800, CRC(4b7d72bc) SHA1(a70c5ba88404dafee2cc717071c4a249f67ab645) ) \ + ROM_LOAD_BIOS( 7, "dsp-3_p1-.l9", 0xf800, 0x0800, CRC(3bfff5f3) SHA1(4e9437cb1b76d64da6b37f01bd6e879fb399e8ce) ) \ + \ ROM_REGION( 0x10000, "audiocpu", 0 ) \ - DECOCASS_BIOS_A_AUDIOCPU \ - DECOCASS_BIOS_A0_AUDIOCPU \ - DECOCASS_BIOS_B_AUDIOCPU \ - DECOCASS_BIOS_B0_AUDIOCPU \ - DECOCASS_BIOS_C_AUDIOCPU \ - DECOCASS_BIOS_D_AUDIOCPU \ + DECOCASS_BIOS_AUDIOCPU(0) \ + DECOCASS_BIOS_AUDIOCPU(1) \ + DECOCASS_BIOS_AUDIOCPU(2) \ + DECOCASS_BIOS_AUDIOCPU(3) \ + DECOCASS_BIOS_AUDIOCPU_OLD(4) \ + DECOCASS_BIOS_AUDIOCPU_OLD(5) \ + DECOCASS_BIOS_AUDIOCPU_OLD(6) \ + DECOCASS_BIOS_AUDIOCPU_OLD(7) \ + \ ROM_REGION( 0x00060, "proms", 0 ) \ - DECOCASS_BIOS_A_PROMS \ - DECOCASS_BIOS_A0_PROMS \ - DECOCASS_BIOS_B_PROMS \ - DECOCASS_BIOS_B0_PROMS \ - DECOCASS_BIOS_C_PROMS \ - DECOCASS_BIOS_D_PROMS \ + DECOCASS_BIOS_PROMS(0) \ + DECOCASS_BIOS_PROMS(1) \ + DECOCASS_BIOS_PROMS(2) \ + DECOCASS_BIOS_PROMS(3) \ + DECOCASS_BIOS_PROMS_OLD(4) \ + DECOCASS_BIOS_PROMS_OLD(5) \ + DECOCASS_BIOS_PROMS_OLD(6) \ + DECOCASS_BIOS_PROMS_OLD(7) \ + \ ROM_REGION( 0x10000, "mcu", 0 ) /* 4k for the 8041 MCU (actually 1K ROM + 64 bytes RAM @ 0x800) */ \ DECOCASS_BIOS_MCU - #define DECOCASS_BIOS_B_ROMS \ DECOCASS_BIOS_MAIN \ ROM_DEFAULT_BIOS( "b" ) @@ -1542,7 +1505,7 @@ ROM_START( cnebula ) ROM_LOAD( "nebula2.pro", 0x0000, 0x0020, CRC(75cae001) SHA1(59b2b47b91945857e6f40dd4baa0e92242fc3519) ) ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ - ROM_LOAD( "nebula2.cas", 0x000000, 0x005c00, CRC(ef05ce36) SHA1(824de511387eba1bd99c3c7935702d794eb46446) ) + ROM_LOAD( "nebula2.cas", 0x000000, 0x005c00, CRC(aaac39e6) SHA1(890a5439825bef9eb26ca22562e3cc30860415b0) ) ROM_END /* 07 Astro Fantasia */ @@ -2170,7 +2133,40 @@ ROM_START( decomult ) ROM_LOAD( "v3.3j", 0x0040, 0x0020, CRC(51eef657) SHA1(eaedce5caf55624ad6ae706aedf82c5717c60f1f) ) ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "cassmcu.1c", 0x0000, 0x0400, CRC(a6df18fd) SHA1(1f9ea47e372d31767c936c15852b43df2b0ee8ff) ) + DECOCASS_BIOS_MCU +ROM_END + +#define DECO_DARK_BIOS \ + ROM_REGION( 0x10000, "maincpu", 0 ) \ + ROM_LOAD( "darksoft.7e", 0xf000, 0x1000, CRC(ce3dd5a3) SHA1(456ffa744676c8f6e8662512d3d3ff92b6c49b2f) ) \ + ROM_REGION( 0x10000, "audiocpu", 0 ) \ + ROM_LOAD( "v1-.5a", 0xf800, 0x0800, CRC(b66b2c2a) SHA1(0097f38beb4872e735e560148052e258a26b08fd) ) \ + ROM_REGION( 0x00060, "proms", 0 ) \ + ROM_LOAD( "v2.3m", 0x0000, 0x0020, CRC(238fdb40) SHA1(b88e8fabb82092105c3828154608ea067acbf2e5) ) \ + ROM_LOAD( "v4.10d", 0x0020, 0x0020, CRC(3b5836b4) SHA1(b630bb277d9ec09d46ef26b944014dd6165b35d8) ) \ + ROM_LOAD( "v3.3j", 0x0040, 0x0020, CRC(51eef657) SHA1(eaedce5caf55624ad6ae706aedf82c5717c60f1f) ) \ + ROM_REGION( 0x10000, "mcu", 0 ) \ + DECOCASS_BIOS_MCU + +ROM_START( decodark ) + DECO_DARK_BIOS + + ROM_REGION( 0x100000, "dongle", ROMREGION_ERASEFF ) + ROM_LOAD( "20221213_v17_dongl_27c800.bin", 0x00000, 0x100000, CRC(69553e2b) SHA1(3c7cb985611df06c771bc842d4125dc9220cdda9) ) +ROM_END + +ROM_START( decodark16 ) + DECO_DARK_BIOS + + ROM_REGION( 0x100000, "dongle", ROMREGION_ERASEFF ) + ROM_LOAD( "20221212_v16_dongl_27c800.bin", 0x00000, 0x100000, CRC(199707bd) SHA1(da936dae54b0f98f03328c8a23494fe323874983) ) +ROM_END + +ROM_START( decodark15 ) + DECO_DARK_BIOS + + ROM_REGION( 0x100000, "dongle", ROMREGION_ERASEFF ) + ROM_LOAD( "20220726_v15_dongl_27c800.bin", 0x00000, 0x100000, CRC(0e973470) SHA1(3d276dc8facc4f7611dcebacec04e2252779d300) ) ROM_END @@ -2281,8 +2277,8 @@ void decocass_state::init_cdsteljn() /* 33 */ GAME( 1983, cpsoccer, decocass, cpsoccer, cpsoccer, decocass_type3_state, init_decocass, ROT270, "Data East Corporation", "Pro Soccer (DECO Cassette) (US)", 0 ) /* */ GAME( 1983, cpsoccerj, cpsoccer, cpsoccer, cpsoccer, decocass_type3_state, init_decocass, ROT270, "Data East Corporation", "Pro Soccer (DECO Cassette) (Japan)", 0 ) /* 34 */ GAME( 1983, csdtenis, decocass, csdtenis, csdtenis, decocass_type3_state, init_decocass, ROT270, "Data East Corporation", "Super Doubles Tennis (DECO Cassette) (Japan)", 0 ) -/* 35 */ GAME( 1985, cflyball, decocass, decocass, cflyball, decocass_nodong_state, init_decocass, ROT270, "Data East Corporation", "Flying Ball (DECO Cassette) (US)", 0 ) -/* 36 */ // 1984.04 Genesis/Boomer Rang'r +/* 35 */ // unknown game, was Flying Ball, but that is 43 +/* 36 */ // unknown game /* 37 */ GAME( 1983, czeroize, decocass, czeroize, czeroize, decocass_type3_state, init_decocass, ROT270, "Data East Corporation", "Zeroize (DECO Cassette) (US)", 0 ) /* 38 */ GAME( 1984, cscrtry, decocass, decocass, cscrtry, decocass_type4_state, init_decocass, ROT270, "Data East Corporation", "Scrum Try (DECO Cassette) (US) (set 1)", 0 ) /* */ GAME( 1984, cscrtry2, cscrtry, decocass, cscrtry, decocass_type4_state, init_decocass, ROT270, "Data East Corporation", "Scrum Try (DECO Cassette) (US) (set 2)", 0 ) @@ -2291,11 +2287,16 @@ void decocass_state::init_cdsteljn() /* 40 */ GAME( 1984, cfghtice, decocass, cfghtice, cfghtice, decocass_type3_state, init_decocass, ROT270, "Data East Corporation", "Fighting Ice Hockey (DECO Cassette) (US)", 0 ) /* 41 */ GAME( 1984, coozumou, decocass, decocass, cscrtry, decocass_type4_state, init_decocass, ROT270, "Data East Corporation", "Oozumou - The Grand Sumo (DECO Cassette) (Japan)", 0 ) /* 42 */ // 1984.08 Hellow Gateball // not a typo, this is official spelling -/* 43 */ // 1984.08 Yellow Cab +/* 43 */ GAME( 1985, cflyball, decocass, decocass, cflyball, decocass_nodong_state, init_decocass, ROT270, "Data East Corporation", "Flying Ball (DECO Cassette) (US)", 0 ) /* 44 */ GAME( 1985, cbdash, decocass, decocass, cbdash, decocass_type5_state, init_decocass, ROT270, "Data East Corporation", "Boulder Dash (DECO Cassette) (US)", 0 ) /* UX7 */ // 1984.12 Tokyo MIE Clinic/Tokyo MIE Shinryoujo /* UX8 */ // 1985.01 Tokyo MIE Clinic/Tokyo MIE Shinryoujo Part 2 /* UX9 */ // 1985.05 Geinoujin Shikaku Shiken -/* xx */ GAME( 2008, decomult, decocass, decocass, decocass, decocass_widel_state, init_decocass, ROT270, "bootleg (David Widel)", "Deco Cassette System Multigame (ROM based)", 0 ) +GAME( 2008, decomult, decocass, decocass, decocass, decocass_widel_state, init_decocass, ROT270, "bootleg (David Widel)", "DECO Cassette System ROM Multigame (David Widel)", 0 ) + +GAME( 2022, decodark, decocass, decocass, decocass, decocass_darksoft_state, init_decocass, ROT270, "bootleg (Darksoft)", "DECO Cassette System ROM Multigame (Darksoft, v17)", 0 ) // fixed an issue with skater +GAME( 2022, decodark16,decodark, decocass, decocass, decocass_darksoft_state, init_decocass, ROT270, "bootleg (Darksoft)", "DECO Cassette System ROM Multigame (Darksoft, v16)", 0 ) // added nebula +GAME( 2022, decodark15,decodark, decocass, decocass, decocass_darksoft_state, init_decocass, ROT270, "bootleg (Darksoft)", "DECO Cassette System ROM Multigame (Darksoft, v15)", 0 ) +// earlier revisions of this kit were released as early as 2017 diff --git a/src/mame/dataeast/decocass.h b/src/mame/dataeast/decocass.h index 22e0f79356e..dfa26ce111a 100644 --- a/src/mame/dataeast/decocass.h +++ b/src/mame/dataeast/decocass.h @@ -35,6 +35,7 @@ public: , m_mcu(*this, "mcu") , m_dongle_r(*this) , m_dongle_w(*this) + , m_donglerom(*this, "dongle") , m_audiocpu(*this, "audiocpu") , m_watchdog(*this, "watchdog") , m_cassette(*this, "cassette") @@ -71,6 +72,8 @@ protected: read8sm_delegate m_dongle_r; // TODO: why isn't this a virtual method? write8sm_delegate m_dongle_w; // TODO: why isn't this a virtual method? + optional_region_ptr m_donglerom; + virtual void machine_start() override; virtual void machine_reset() override; @@ -450,4 +453,23 @@ private: int32_t m_widel_latch = 0; /* latched enable PROM (1100xxxx written to E5x1) */ }; +class decocass_darksoft_state : public decocass_state +{ +public: + decocass_darksoft_state(const machine_config &mconfig, device_type type, const char *tag) + : decocass_state(mconfig, type, tag) + { + } + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + uint8_t decocass_darksoft_r(offs_t offset); + void decocass_darksoft_w(offs_t offset, uint8_t data); + + uint32_t m_address; +}; + #endif // MAME_INCLUDES_DECOCASS_H diff --git a/src/mame/dataeast/decocass_m.cpp b/src/mame/dataeast/decocass_m.cpp index 41ea59dd859..6476ab6fcbb 100644 --- a/src/mame/dataeast/decocass_m.cpp +++ b/src/mame/dataeast/decocass_m.cpp @@ -88,9 +88,12 @@ void decocass_state::decocass_sound_data_w(uint8_t data) uint8_t decocass_state::decocass_sound_command_r() { uint8_t data = m_soundlatch->read(); - LOG(4,("CPU %s sound command <- $%02x\n", m_audiocpu->tag(), data)); - m_audiocpu->set_input_line(M6502_IRQ_LINE, CLEAR_LINE); - m_sound_ack &= ~0x80; + if (!machine().side_effects_disabled()) + { + LOG(4,("CPU %s sound command <- $%02x\n", m_audiocpu->tag(), data)); + m_audiocpu->set_input_line(M6502_IRQ_LINE, CLEAR_LINE); + m_sound_ack &= ~0x80; + } return data; } @@ -109,16 +112,22 @@ void decocass_state::decocass_sound_nmi_enable_w(uint8_t data) uint8_t decocass_state::decocass_sound_nmi_enable_r() { - m_audio_nmi_enabled = 1; - m_audiocpu->set_input_line(INPUT_LINE_NMI, (m_audio_nmi_enabled && m_audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); + if (!machine().side_effects_disabled()) + { + m_audio_nmi_enabled = 1; + m_audiocpu->set_input_line(INPUT_LINE_NMI, (m_audio_nmi_enabled && m_audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); + } return 0xff; } uint8_t decocass_state::decocass_sound_data_ack_reset_r() { uint8_t data = 0xff; - LOG(2,("CPU %s sound ack rst <- $%02x\n", m_audiocpu->tag(), data)); - m_sound_ack &= ~0x40; + if (!machine().side_effects_disabled()) + { + LOG(2,("CPU %s sound ack rst <- $%02x\n", m_audiocpu->tag(), data)); + m_sound_ack &= ~0x40; + } return data; } @@ -246,7 +255,7 @@ uint8_t decocass_type1_state::decocass_type1_r(offs_t offset) if (!m_type1_map) return 0x00; - uint8_t data; + uint8_t data = 0x00; if (1 == (offset & 1)) { @@ -261,11 +270,10 @@ uint8_t decocass_type1_state::decocass_type1_r(offs_t offset) (data & 1) ? "OBF" : "-", (data & 2) ? "IBF" : "-")); } - else + else if (!machine().side_effects_disabled()) { offs_t promaddr; uint8_t save; - uint8_t *prom = machine().root_device().memregion("dongle")->base(); if (m_firsttime) { @@ -274,7 +282,7 @@ uint8_t decocass_type1_state::decocass_type1_r(offs_t offset) { if (promaddr % 8 == 0) LOG(3,(" %02x:", promaddr)); - LOG(3,(" %02x%s", prom[promaddr], (promaddr % 8) == 7 ? "\n" : "")); + LOG(3,(" %02x%s", m_donglerom[promaddr], (promaddr % 8) == 7 ? "\n" : "")); } m_firsttime = 0; m_latch1 = 0; /* reset latch (??) */ @@ -301,12 +309,12 @@ uint8_t decocass_type1_state::decocass_type1_r(offs_t offset) data = 0; promshift = 0; - for (int i=0;i<8;i++) + for (int i=0; i<8; i++) { - if (m_type1_map[i] == T1PROM) { data |= (((prom[promaddr] >> promshift) & 1) << T1MAP(i,m_type1_outmap)); promshift++; } + if (m_type1_map[i] == T1PROM) { data |= (((m_donglerom[promaddr] >> promshift) & 1) << T1MAP(i,m_type1_outmap)); promshift++; } if (m_type1_map[i] == T1LATCHINV) { data |= ((1 - ((m_latch1 >> T1MAP(i,m_type1_inmap)) & 1)) << T1MAP(i,m_type1_outmap)); } - if (m_type1_map[i] == T1LATCH) { data |= (((m_latch1 >> T1MAP(i,m_type1_inmap)) & 1) << T1MAP(i,m_type1_outmap)); } - if (m_type1_map[i] == T1DIRECT) { data |= (((save >> T1MAP(i,m_type1_inmap)) & 1) << T1MAP(i,m_type1_outmap)); } + if (m_type1_map[i] == T1LATCH) { data |= (((m_latch1 >> T1MAP(i,m_type1_inmap)) & 1) << T1MAP(i,m_type1_outmap)); } + if (m_type1_map[i] == T1DIRECT) { data |= (((save >> T1MAP(i,m_type1_inmap)) & 1) << T1MAP(i,m_type1_outmap)); } } LOG(3,("%10s 6502-PC: %04x decocass_type1_r(%02x): $%02x\n", @@ -525,8 +533,7 @@ uint8_t decocass_type2_state::decocass_type2_r(offs_t offset) { if (1 == (offset & 1)) { - uint8_t *prom = memregion("dongle")->base(); - data = prom[256 * m_type2_d2_latch + m_type2_promaddr]; + data = m_donglerom[256 * m_type2_d2_latch + m_type2_promaddr]; LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, 256 * m_type2_d2_latch + m_type2_promaddr)); } else @@ -565,16 +572,16 @@ void decocass_type2_state::decocass_type2_w(offs_t offset, uint8_t data) { LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA")); } - if (1 == (offset & 1)) + if (!machine().side_effects_disabled()) { - if (0xc0 == (data & 0xf0)) + if ((1 == (offset & 1)) && (0xc0 == (data & 0xf0))) { m_type2_xx_latch = 1; m_type2_d2_latch = (data & 0x04) ? 1 : 0; LOG(3,("PROM:%s D2:%d", m_type2_xx_latch ? "on" : "off", m_type2_d2_latch)); } + m_mcu->upi41_master_w(offset & 1, data); } - m_mcu->upi41_master_w(offset & 1, data); #ifdef MAME_DEBUG decocass_fno(offset, data); @@ -607,11 +614,11 @@ uint8_t decocass_type3_state::decocass_type3_r(offs_t offset) { if (1 == m_type3_pal_19) { - uint8_t *prom = memregion("dongle")->base(); - data = prom[m_type3_ctrs]; + data = m_donglerom[m_type3_ctrs]; LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, m_type3_ctrs)); - if (++m_type3_ctrs == 4096) - m_type3_ctrs = 0; + if (!machine().side_effects_disabled()) + if (++m_type3_ctrs == 4096) + m_type3_ctrs = 0; } else { @@ -773,8 +780,11 @@ uint8_t decocass_type3_state::decocass_type3_r(offs_t offset) (BIT(save, 6) << 6) | (BIT(save, 7) << 7); } - m_type3_d0_latch = save & 1; - LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.')); + if (!machine().side_effects_disabled()) + { + m_type3_d0_latch = save & 1; + LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.')); + } } else { @@ -788,8 +798,11 @@ uint8_t decocass_type3_state::decocass_type3_r(offs_t offset) (BIT(save, 5) << 5) | (BIT(save, 6) << 7) | (BIT(save, 7) << 6); - LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.')); - m_type3_d0_latch = save & 1; + if (!machine().side_effects_disabled()) + { + LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.')); + m_type3_d0_latch = save & 1; + } } } } @@ -858,11 +871,12 @@ uint8_t decocass_type4_state::decocass_type4_r(offs_t offset) { if (m_type4_latch) { - uint8_t *prom = machine().root_device().memregion("dongle")->base(); - - data = prom[m_type4_ctrs]; - LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.', m_type4_ctrs)); - m_type4_ctrs = (m_type4_ctrs + 1) & 0x7fff; + data = m_donglerom[m_type4_ctrs]; + if (!machine().side_effects_disabled()) + { + LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.', m_type4_ctrs)); + m_type4_ctrs = (m_type4_ctrs + 1) & 0x7fff; + } } else { @@ -1061,9 +1075,7 @@ uint8_t decocass_widel_state::decocass_widel_r(offs_t offset) { if (m_widel_latch) { - uint8_t *prom = machine().root_device().memregion("dongle")->base(); - - data = prom[m_widel_ctrs]; + data = m_donglerom[m_widel_ctrs]; LOG(3,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x '%c' <- PROM[%04x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.', m_widel_ctrs)); if (!machine().side_effects_disabled()) @@ -1120,6 +1132,47 @@ void decocass_widel_state::decocass_widel_w(offs_t offset, uint8_t data) m_mcu->upi41_master_w(offset, data); } +/*************************************************************************** + * + * Darksoft Multigame Aftermarket modification + * - provides access to a large ROM + * - doesn't support games requiring dongle for proper game data, only + * loading, so games like Treausre Island don't work with this kit + * + ***************************************************************************/ + +uint8_t decocass_darksoft_state::decocass_darksoft_r(offs_t offset) +{ + uint8_t data; + + if (offset == 0) + { + data = m_donglerom[m_address & 0xfffff]; + if (!machine().side_effects_disabled()) + m_address++; + } + else if (offset == 1) + { + data = m_donglerom[m_address & 0xfffff]; + if (!machine().side_effects_disabled()) + m_address += 0x100; + } + else + { + data = 0xff; + } + + return data; +} + +void decocass_darksoft_state::decocass_darksoft_w(offs_t offset, uint8_t data) +{ + if ((offset & E5XX_MASK) == 0) + { + m_address = data; + } +} + /*************************************************************************** * * Main dongle and 8041 interface @@ -1591,7 +1644,6 @@ MACHINE_RESET_MEMBER(decocass_type3_state,csdtenis) MACHINE_RESET_MEMBER(decocass_type3_state,czeroize) { - uint8_t *mem = memregion("dongle")->base(); machine_reset(); LOG(0,("dongle type #3 (PAL)\n")); m_type3_swap = TYPE3_SWAP_23_56; @@ -1605,9 +1657,9 @@ MACHINE_RESET_MEMBER(decocass_type3_state,czeroize) * This hack seems to be sufficient to get around * the missing dongle ROM contents and play the game. */ - memset(mem, 0x00, 0x1000); - mem[0x08a0] = 0x18; - mem[0x08a1] = 0xf7; + memset(m_donglerom, 0x00, 0x1000); + m_donglerom[0x08a0] = 0x18; + m_donglerom[0x08a1] = 0xf7; } MACHINE_RESET_MEMBER(decocass_type3_state,cppicf) @@ -1647,6 +1699,22 @@ void decocass_widel_state::machine_reset() } +void decocass_darksoft_state::machine_start() +{ + decocass_state::machine_start(); + save_item(NAME(m_address)); +} + +void decocass_darksoft_state::machine_reset() +{ + decocass_state::machine_reset(); + m_dongle_r = read8sm_delegate(*this, FUNC(decocass_darksoft_state::decocass_darksoft_r)); + m_dongle_w = write8sm_delegate(*this, FUNC(decocass_darksoft_state::decocass_darksoft_w)); + + m_address = 0; +} + + /*************************************************************************** * * 8041 port handlers diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 127c57e26e2..27e39d8f346 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -12460,6 +12460,9 @@ ctower // 1981.03 The Tower ctsttape // ? czeroize // 37 1983.10 Zeroize decocass // +decodark // +decodark16 // +decodark15 // decomult // @source:dec/decstation.cpp -- cgit v1.2.3