From 334c801c55e6c1d620b07fddee32c37d31a7d690 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 25 Nov 2020 03:44:37 +0000 Subject: Plug and Play bits (working and not working machines) (#7509) * replaced dgun2869 dump with good one [Sean Riddle] * also did some work on the dreamGear unit, works now * an innotab2 driver entry was also added to hold the software list, but the ROM isn't dumped yet machines promoted to WORKING ------ My Arcade Retro Micro Controller - 220 Built-In Video Games (DGUN-2869) [Zup, Team Europe, Sean Riddle] new WORKING machines ------ Code Lyoko (25-in-1 handheld) [KaruzoHikari, Team Europe, David Haywood] My Arcade Pac-Man Pocket Player (DGUNL-3227) [Sean Riddle] new NOT WORKING machines ------ Palace Arcade [Sean Riddle, Kamaal Brown] new NOT WORKING Software List entries ------ vtech_innotab_cart.xml : Mickey Mouse Clubhouse (UK) [Team Europe] --- hash/vtech_innotab_cart.xml | 25 + scripts/target/mame/mess.lua | 2 +- src/mame/drivers/generalplus_gpl_unknown.cpp | 26 +- src/mame/drivers/megadriv_rad.cpp | 144 +++- src/mame/drivers/nes_vt02_vt03.cpp | 10 +- src/mame/drivers/spg2xx_lexibook.cpp | 4 + src/mame/drivers/spg2xx_senca.cpp | 1078 ++++++++++++++++++++++++++ src/mame/drivers/spg2xx_zone.cpp | 3 +- src/mame/drivers/spg2xx_zone_32bit.cpp | 1049 ------------------------- src/mame/drivers/storio.cpp | 23 +- src/mame/includes/megadriv_rad.h | 25 + src/mame/mame.lst | 30 +- src/mame/mess.flt | 2 +- 13 files changed, 1341 insertions(+), 1080 deletions(-) create mode 100644 hash/vtech_innotab_cart.xml create mode 100644 src/mame/drivers/spg2xx_senca.cpp delete mode 100644 src/mame/drivers/spg2xx_zone_32bit.cpp diff --git a/hash/vtech_innotab_cart.xml b/hash/vtech_innotab_cart.xml new file mode 100644 index 00000000000..9a0523fe5d5 --- /dev/null +++ b/hash/vtech_innotab_cart.xml @@ -0,0 +1,25 @@ + + + + + + + + + + + + + Mickey Mouse Clubhouse (UK) + 2011 + VTech + + + + + + + + diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index 630a414bd0d..bfe2b6b3982 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -4036,7 +4036,7 @@ files { MAME_DIR .. "src/mame/drivers/spg2xx_jakks_sharp.cpp", MAME_DIR .. "src/mame/drivers/spg2xx_jakks_tvtouch.cpp", MAME_DIR .. "src/mame/drivers/spg2xx_zone.cpp", - MAME_DIR .. "src/mame/drivers/spg2xx_zone_32bit.cpp", + MAME_DIR .. "src/mame/drivers/spg2xx_senca.cpp", MAME_DIR .. "src/mame/drivers/spg2xx_senario.cpp", MAME_DIR .. "src/mame/drivers/spg2xx_senario_poker.cpp", MAME_DIR .. "src/mame/drivers/spg2xx_mysprtch.cpp", diff --git a/src/mame/drivers/generalplus_gpl_unknown.cpp b/src/mame/drivers/generalplus_gpl_unknown.cpp index e5dda7f1b8c..72ac56a67d4 100644 --- a/src/mame/drivers/generalplus_gpl_unknown.cpp +++ b/src/mame/drivers/generalplus_gpl_unknown.cpp @@ -56,9 +56,9 @@ INPUT_PORTS_END void generalplus_gpl_unknown_state::map(address_map &map) { - map(0x000000, 0x00ffff).ram(); // unknown, RAM/ROM? there are jumps to this region, doesn't seem the usual unSP 8000-ffff ROM mapping + map(0x000000, 0x00bfff).ram(); // unknown, RAM? + map(0x00c000, 0x00ffff).ram(); // unknown, ROM? there are jumps to this region, doesn't seem the usual unSP 8000-ffff ROM mapping - // there are calls to 0x0f000 (internal ROM?) map(0x200000, 0x3fffff).ram(); // almost certainly RAM where the SPI ROM gets copied } @@ -97,22 +97,34 @@ void generalplus_gpl_unknown_state::generalplus_gpl_unknown(machine_config &conf PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 0x8000); } +// exact size of internal ROM is unknown, but it appears to occupy at least 0xc000 - 0xffff (word addresses) in unSP space + ROM_START( mapacman ) - //ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF ) - //ROM_LOAD16_WORD_SWAP( "internal.rom", 0x000000, 0x2000, NO_DUMP ) // exact size unknown + ROM_REGION( 0x8000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_WORD_SWAP( "internal.rom", 0x000000, 0x8000, NO_DUMP ) ROM_REGION( 0x800000, "spi", ROMREGION_ERASEFF ) ROM_LOAD( "fm25q16a.bin", 0x000000, 0x200000, CRC(aeb472ac) SHA1(500c24b725f6d3308ef8cbdf4259f5be556c7c92) ) ROM_END ROM_START( taspinv ) - //ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF ) - //ROM_LOAD16_WORD_SWAP( "internal.rom", 0x000000, 0x2000, NO_DUMP ) // exact size unknown + ROM_REGION( 0x8000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_WORD_SWAP( "internal.rom", 0x000000, 0x8000, NO_DUMP ) ROM_REGION( 0x800000, "spi", ROMREGION_ERASEFF ) ROM_LOAD( "tinyarcade_spaceinvaders.bin", 0x000000, 0x200000, CRC(11ac4c77) SHA1(398d5eff83a4e94487ed810819085a0e44582908) ) ROM_END +ROM_START( parcade ) + ROM_REGION( 0x8000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_WORD_SWAP( "internal.rom", 0x000000, 0x8000, NO_DUMP ) + + ROM_REGION( 0x800000, "spi", ROMREGION_ERASEFF ) + ROM_LOAD( "palacearcade_gpr25l3203_c22016.bin", 0x000000, 0x400000, CRC(98fbd2a1) SHA1(ffc19aadd53ead1f9f3472475606941055ca09f9) ) +ROM_END + +// for correctly offset disassembly use +// unidasm palacearcade_gpr25l3203_c22016.bin -arch unsp12 -xchbytes -basepc 200000 >palace.txt // first 0x2000 bytes in ROM are blank, ROM data maps fully in RAM at 200000, but there are calls to lower regions // is it possible the SunPlus here is only handling sound / graphics, not gameplay? @@ -121,3 +133,5 @@ CONS( 2017, mapacman, 0, 0, generalplus_gpl_unknown, generalpl // multiple different units appear to share the same ROM with a jumper to select game, it should be verified in each case that the external ROM was not changed. CONS( 2017, taspinv, 0, 0, generalplus_gpl_unknown, generalplus_gpl_unknown, generalplus_gpl_unknown_state, empty_init, "Super Impulse", "Space Invaders (Tiny Arcade)", MACHINE_IS_SKELETON ) + +CONS( 2017, parcade, 0, 0, generalplus_gpl_unknown, generalplus_gpl_unknown, generalplus_gpl_unknown_state, empty_init, "Hasbro", "Palace Arcade", MACHINE_IS_SKELETON ) diff --git a/src/mame/drivers/megadriv_rad.cpp b/src/mame/drivers/megadriv_rad.cpp index 6350c9bfcf8..a87be5691ec 100644 --- a/src/mame/drivers/megadriv_rad.cpp +++ b/src/mame/drivers/megadriv_rad.cpp @@ -24,7 +24,7 @@ #include "includes/megadriv_rad.h" // todo, use actual MD map, easier once maps are part of base class. -void megadriv_radica_state::megadriv_radica_map(address_map &map) +void megadriv_radica_state::megadriv_base_map(address_map &map) { map(0x000000, 0x3fffff).r(FUNC(megadriv_radica_state::read)); /* Cartridge Program Rom */ map(0xa00000, 0xa01fff).rw(FUNC(megadriv_radica_state::megadriv_68k_read_z80_ram), FUNC(megadriv_radica_state::megadriv_68k_write_z80_ram)); @@ -34,11 +34,42 @@ void megadriv_radica_state::megadriv_radica_map(address_map &map) map(0xa10000, 0xa1001f).rw(FUNC(megadriv_radica_state::megadriv_68k_io_read), FUNC(megadriv_radica_state::megadriv_68k_io_write)); map(0xa11100, 0xa11101).rw(FUNC(megadriv_radica_state::megadriv_68k_check_z80_bus), FUNC(megadriv_radica_state::megadriv_68k_req_z80_bus)); map(0xa11200, 0xa11201).w(FUNC(megadriv_radica_state::megadriv_68k_req_z80_reset)); - map(0xa13000, 0xa130ff).r(FUNC(megadriv_radica_state::read_a13)); map(0xc00000, 0xc0001f).rw(m_vdp, FUNC(sega315_5313_device::vdp_r), FUNC(sega315_5313_device::vdp_w)); map(0xe00000, 0xe0ffff).ram().mirror(0x1f0000).share("megadrive_ram"); } +void megadriv_radica_state::megadriv_radica_map(address_map &map) +{ + megadriv_base_map(map); + map(0xa13000, 0xa130ff).r(FUNC(megadriv_radica_state::read_a13)); +} + +uint16_t megadriv_dgunl_state::read_a16300(offs_t offset, uint16_t mem_mask) +{ + return 0x5a5a; +} + +uint16_t megadriv_dgunl_state::read_a16302(offs_t offset, uint16_t mem_mask) +{ + return m_a1630a; +} + +void megadriv_dgunl_state::write_a1630a(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + m_a1630a = data; + m_bank = (data & 0x07) * 8; +} + +void megadriv_dgunl_state::megadriv_dgunl_map(address_map &map) +{ + megadriv_base_map(map); + + map(0xa16300, 0xa16301).r(FUNC(megadriv_dgunl_state::read_a16300)); + map(0xa16302, 0xa16303).r(FUNC(megadriv_dgunl_state::read_a16302)); + + map(0xa1630a, 0xa1630b).w(FUNC(megadriv_dgunl_state::write_a1630a)); +} + uint16_t megadriv_radica_state::read(offs_t offset) { return m_rom[(((m_bank * 0x10000) + (offset << 1)) & (0x400000 - 1))/2]; @@ -120,6 +151,17 @@ static INPUT_PORTS_START( megadriv_msi_6button ) PORT_START("UNK") INPUT_PORTS_END +static INPUT_PORTS_START( megadriv_dgunl_1player ) + PORT_INCLUDE( megadriv_radica_3button ) + + PORT_MODIFY("PAD1") // the unit only has 2 buttons, A and C, strings are changed to remove references to C, even if behavior in Pac-Mania still exists and differs between them + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED ) // disable 'C' + //PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED ) // disable 'A' + + PORT_MODIFY("PAD2") + PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + void megadriv_radica_6button_state::machine_start() { md_base_state::machine_start(); @@ -144,6 +186,14 @@ void megadriv_radica_3button_state::machine_start() save_item(NAME(m_bank)); } + +void megadriv_dgunl_state::machine_start() +{ + megadriv_radica_3button_state::machine_start(); + m_a1630a = 0; + save_item(NAME(m_a1630a)); +} + void megadriv_radica_3button_state::machine_reset() { m_bank = 0; @@ -174,6 +224,11 @@ void megadriv_radica_6button_state::megadriv_radica_6button_ntsc(machine_config m_maincpu->set_addrmap(AS_PROGRAM, &megadriv_radica_state::megadriv_radica_map); } +void megadriv_dgunl_state::megadriv_dgunl_ntsc(machine_config &config) +{ + md_ntsc(config); + m_maincpu->set_addrmap(AS_PROGRAM, &megadriv_dgunl_state::megadriv_dgunl_map); +} ROM_START( rad_sf2 ) ROM_REGION( 0x400000, "maincpu", 0 ) @@ -233,7 +288,15 @@ ROM_START( msi_sf2 ) // and is probably leftover from one of the multigame systems, hacked to only launch one game. We should emulate it... // .. but the game ROM starts at 0xc8000 so we can cheat for now ROM_LOAD16_WORD_SWAP( "29lv320.bin", 0x000000, 0xc8000, CRC(465b12f0) SHA1(7a058f6feb4f08f56ae0f7369c2ca9a9fe2ed40e) ) - ROM_CONTINUE(0x00000,0x338000) + ROM_CONTINUE(0x00000,0x338000) +ROM_END + +ROM_START( dgunl3227 ) + ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASE00 ) + // populated in init function + + ROM_REGION( 0x400000, "rom", 0 ) + ROM_LOAD16_WORD_SWAP( "myarcadepacman_s99jl032hbt1_9991227e_as_s29jl032h55tai01.bin", 0x000000, 0x400000, CRC(ecead966) SHA1(971e8da6eb720f670f4148c7e07922e4f24eb609) ) ROM_END @@ -253,6 +316,76 @@ void megadriv_radica_6button_state::init_megadriv_radica_6button_ntsc() m_megadrive_io_write_data_port_ptr = write16sm_delegate(*this, FUNC(md_base_state::megadrive_io_write_data_port_6button)); } +void megadriv_dgunl_state::init_dgunl3227() +{ + uint8_t* rom = memregion("rom")->base(); + uint8_t* dst = memregion("maincpu")->base(); + + int baseaddr, size, dstaddr; + //baseaddr = 0x200000; size = 0x40000; // unknown data (unused menu data maybe?) + //baseaddr = 0x240000; size = 0x20000; // 'sample' program with UWOL header later too (lower part of menu program) + //baseaddr = 0x260000; size = 0x20000; // pirate version of Columns with Sega text removed + //baseaddr = 0x280000; size = 0x20000; // Fatal Labyrinth + //baseaddr = 0x2a0000; size = 0x20000; // pirate version of Block Out with EA logo and text removed + //baseaddr = 0x2c0000; size = 0x20000; // Flicky + //baseaddr = 0x2e0000; size = 0x20000; // Shove It + //baseaddr = 0x300000; size = 0x40000; // pirate version of Space Invaders 90 with Taito logos and copyright removed (also upper part of menu program - has extra header + bits of code for '202 in 1' menu which has been hacked to run the 3-in-1 menu) + + // the following 3 games are available to select from the menu on this system + //baseaddr = 0x340000; size = 0x40000; // Pac-Attack / Pac-Panic (used by this unit) + //baseaddr = 0x380000; size = 0x40000; // Pac-Mania (used by this unit) + //baseaddr = 0x3c0000; size = 0x40000; // Pac-Man (used by this unit) (2nd copy of header about halfway through?) + + // copy 1st part of menu code + baseaddr = 0x240000; + size = 0x020000; + dstaddr = 0x000000; + for (int i = 0; i < size; i++) + { + dst[(i ^ 3) + dstaddr] = rom[baseaddr + i]; + } + + // copy 2nd part of menu code + baseaddr = 0x300000; + size = 0x040000; + dstaddr = 0x0c0000; + for (int i = 0; i < size; i++) + { + dst[(i ^ 3) + dstaddr] = rom[baseaddr + i]; + } + + // copy pac-panic to first bank + baseaddr = 0x340000; + size = 0x040000; + dstaddr = 0x100000; + for (int i = 0; i < size; i++) + { + dst[(i ^ 3) + dstaddr] = rom[baseaddr + i]; + } + + // copy pac-mania to 2nd bank + baseaddr = 0x380000; + size = 0x040000; + dstaddr = 0x180000; + for (int i = 0; i < size; i++) + { + dst[(i ^ 3) + dstaddr] = rom[baseaddr + i]; + } + + // copy pac-man to 3nd bank + baseaddr = 0x3c0000; + size = 0x040000; + dstaddr = 0x200000; + for (int i = 0; i < size; i++) + { + dst[(i ^ 3) + dstaddr] = rom[baseaddr + i]; + } + + // other data isn't copied because it's never referenced, therefore we don't know how it gets accessed + + init_megadriv(); +} + // US versions show 'Genesis' on the menu, show a www.radicagames.com splash screen, and use NTSC versions of the ROMs, sometimes region locked // EU versions show 'Mega Drive' on the menu, show a www.radicagames.com splash screen, and use PAL versions of the ROMs, sometimes region locked // UK versions show "Mega Drive' on the menu, show a www.radicauk.com splash screen, and use PAL versions of the ROMs, sometimes region locked @@ -285,3 +418,8 @@ CONS( 2004, rad_orun, 0, 0, megadriv_radica_3button_pal, megadriv_radic // From a European unit but NTSC? - code is hacked from original USA Genesis game with region check still intact? (does the clone hardware always identify as such? or does the bypassed boot code skip the check?) // TODO: move out of here eventually once the enhanced MD part is emulated rather than bypassed (it's probably the same as the 145-in-1 multigame unit, but modified to only include this single game) CONS( 2018, msi_sf2, 0, 0, megadriv_radica_6button_ntsc, megadriv_msi_6button, megadriv_radica_6button_state, init_megadriv_radica_6button_ntsc, "MSI / Capcom / Sega", "Street Fighter II: Special Champion Edition (MSI Plug & Play) (Europe)", 0) + +// this seems to have been hacked down from a larger multi-game unit, there are also a bunch of (unused?) pirate versions of MegaDrive / Genesis games in the ROM +// this is the only 'Pocket Player' unit to use Genesis on a Chip tech, the others are NES on a chip. +// some versions of this unit have an additional "Add Credits with 'A' or 'B'" screen after you select Pac-Man, this version does not. +CONS( 2018, dgunl3227, 0, 0, megadriv_dgunl_ntsc, megadriv_dgunl_1player, megadriv_dgunl_state, init_dgunl3227, "dreamGEAR", "My Arcade Pac-Man Pocket Player (DGUNL-3227)", 0 ) diff --git a/src/mame/drivers/nes_vt02_vt03.cpp b/src/mame/drivers/nes_vt02_vt03.cpp index 908471c80bf..2ef858c9be6 100644 --- a/src/mame/drivers/nes_vt02_vt03.cpp +++ b/src/mame/drivers/nes_vt02_vt03.cpp @@ -1274,13 +1274,14 @@ ROM_START( ppgc200g ) ROM_LOAD( "m29dw641.u2", 0x00000, 0x800000, CRC(b16dc677) SHA1(c1984fde4caf9345d41d127db946d1c21ec43ae0) ) ROM_END -ROM_START( dgun2869 ) +ROM_START( dgun2869 ) ROM_REGION( 0x1000000, "mainrom", 0 ) - // 80000-bffff would not read consistently, but also appears to be missing some data entirely - ROM_LOAD( "dgun2869.bin", 0x00000, 0x1000000, BAD_DUMP CRC(00ab846e) SHA1(721a6edf69d2eb75ee815eb3567c07d4d163d65f) ) // 29GL128 + ROM_LOAD( "myarcaderetromicro_s29gl128p11tfiv1_0001227e.bin", 0x00000, 0x1000000, CRC(5e7fded2) SHA1(cf55ae7a128e3254a22933150caf94e269303ffb) ) // 29GL128 + ROM_IGNORE(0x100) ROM_END + void nes_vt_state::init_protpp() { // this gets the tiles correct @@ -1457,5 +1458,4 @@ CONS( 200?, dgun2500, 0, 0, nes_vt_16mb, nes_vt, nes_vt_state, empty_init, "d CONS( 201?, ppgc200g, 0, 0, nes_vt_pal_8mb, nes_vt, nes_vt_state, empty_init, "Fizz Creations", "Plug & Play Game Controller with 200 Games (Supreme 200)", MACHINE_IMPERFECT_GRAPHICS ) // unknown tech level, it's most likely a vt09 or vt369 but isn't using any of the extended features -// NOT WORKING for now due to Flash ROM being faulty, giving inconsistent reads for some game areas (eg. Fishing) and seemingly having data entirely missing for Crystal Ball -CONS( 201?, dgun2869, 0, 0, nes_vt_16mb, nes_vt, nes_vt_state, empty_init, "dreamGEAR", "My Arcade Retro Micro Controller - 220 Built-In Video Games (DGUN-2869)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +CONS( 201?, dgun2869, 0, 0, nes_vt_16mb, nes_vt, nes_vt_state, empty_init, "dreamGEAR", "My Arcade Retro Micro Controller - 220 Built-In Video Games (DGUN-2869)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/drivers/spg2xx_lexibook.cpp b/src/mame/drivers/spg2xx_lexibook.cpp index fb7a216b119..ada0488c068 100644 --- a/src/mame/drivers/spg2xx_lexibook.cpp +++ b/src/mame/drivers/spg2xx_lexibook.cpp @@ -1,6 +1,10 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz, David Haywood +// JungleTac developed systems sold by Performance Designed Products, Lexibook etc. +// these are mostly handhelds with built in screens, and seem to be newer(?) revisions of the software +// of note, the way the audio is stored for Tiger Rescue has been updated and the core does not handle it properly at the moment + #include "emu.h" #include "includes/spg2xx.h" diff --git a/src/mame/drivers/spg2xx_senca.cpp b/src/mame/drivers/spg2xx_senca.cpp new file mode 100644 index 00000000000..fb2caec6ed8 --- /dev/null +++ b/src/mame/drivers/spg2xx_senca.cpp @@ -0,0 +1,1078 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz, David Haywood + +/* Shenzhen Senca Technology Co., Ltd developed "Family Sport" systems - sold by various manufacturers */ + +#include "emu.h" +#include "includes/spg2xx.h" + + +class zon32bit_state : public spg2xx_game_state +{ +public: + zon32bit_state(const machine_config& mconfig, device_type type, const char* tag) : + spg2xx_game_state(mconfig, type, tag), + m_romregion(*this, "maincpu") + { } + + void zon32bit(machine_config& config); + void zon32bit_bat(machine_config& config); + + void mem_map_zon32bit(address_map &map); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void device_post_load() override; + + uint16_t z32_rom_r(offs_t offset); + + required_region_ptr m_romregion; + + virtual uint16_t porta_r(); + virtual uint16_t portb_r(); + virtual uint16_t portc_r(); + + virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; + virtual void portb_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; + virtual void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; + + uint16_t an3_r(); + + int m_porta_dat; + int m_portb_dat; + int m_portc_dat; + int m_porta_mask; + + int m_upperbank; + + int m_basebank; +}; + +class mywicogt_state : public zon32bit_state +{ +public: + mywicogt_state(const machine_config& mconfig, device_type type, const char* tag) : + zon32bit_state(mconfig, type, tag) + { } + +protected: + virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; +}; + + +class mywicodx_state : public zon32bit_state +{ +public: + mywicodx_state(const machine_config& mconfig, device_type type, const char* tag) : + zon32bit_state(mconfig, type, tag) + { } + +protected: + virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; + + virtual void machine_reset() override; +}; + +class oplayer_100in1_state : public mywicodx_state +{ +public: + oplayer_100in1_state(const machine_config& mconfig, device_type type, const char* tag) : + mywicodx_state(mconfig, type, tag) + { } + + void init_oplayer(); + void init_m505neo(); + void init_cdlyoko(); + +protected: + virtual uint16_t porta_r() override; + virtual uint16_t portb_r() override; + virtual uint16_t portc_r() override; +}; + +class denver_200in1_state : public mywicodx_state +{ +public: + denver_200in1_state(const machine_config& mconfig, device_type type, const char* tag) : + mywicodx_state(mconfig, type, tag) + { } + + void init_denver(); + void init_m521neo(); + +protected: + virtual void machine_reset() override; + + virtual uint16_t porta_r() override; + virtual uint16_t portb_r() override; + virtual uint16_t portc_r() override; + + virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; +}; + +uint16_t zon32bit_state::an3_r() +{ + int status = ioport("BATT")->read(); + if (status) + return 0xfff; + else + return 0x000; +} + +void zon32bit_state::device_post_load() +{ + // load state can change the bank, so we must invalide cache + m_maincpu->invalidate_cache(); +} + +uint16_t zon32bit_state::porta_r() +{ + return m_porta_dat; +} + + +void zon32bit_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (0) + logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, + (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', + (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', + (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', + (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', + (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', + (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', + (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', + (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', + (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', + (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', + (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', + (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', + (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', + (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', + (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', + (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); + + m_porta_dat = data; + + // The banking on zon32bit doesn't seem the same as mywicodx. + // The same values get written here both in the case of switching to upper bank and switching to lower bank, so presumably it must be some kind of toggle + if (data == 0x0e01) + { + m_basebank ^= 1; + logerror("bank is now %d\n", m_basebank); + m_maincpu->invalidate_cache(); + } +} + + +void mywicogt_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (1) + logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, + (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', + (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', + (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', + (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', + (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', + (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', + (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', + (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', + (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', + (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', + (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', + (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', + (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', + (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', + (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', + (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); + +//[:] ':maincpu' (000508): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x +//[:] ':maincpu' (000510): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x +//[:] ':maincpu' (000518): porta_w 0f00 (0f00) x x x x | 1 1 1 1 | x x x x | x x x x + + if (m_maincpu->pc() < 0x1000) + { + if (data == 0x0f00) + { + m_basebank = 1; + m_maincpu->invalidate_cache(); + logerror("changing to bank 1\n"); + + } + else if (data == 0x0b00) + { + m_basebank = 0; + m_maincpu->invalidate_cache(); + logerror("changing to bank 0\n"); + } + } + + m_porta_dat = data; +} + + +void mywicodx_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (0) + logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, + (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', + (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', + (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', + (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', + (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', + (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', + (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', + (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', + (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', + (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', + (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', + (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', + (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', + (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', + (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', + (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); + + + m_porta_dat = data; + + int oldbank = m_basebank; + + if (mem_mask & 0x0400) + { + if (data & 0x0400) + m_basebank |= 1; + else + m_basebank &= ~1; + } + + if (mem_mask & 0x0800) + { + if (data & 0x0800) + m_basebank |= 2; + else + m_basebank &= ~2; + } + + if (oldbank != m_basebank) + m_maincpu->invalidate_cache(); + + +} + + +void denver_200in1_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (0) + { + if (m_maincpu->pc() < 0x10000) + { + logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, + (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', + (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', + (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', + (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', + (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', + (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', + (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', + (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', + (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', + (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', + (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', + (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', + (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', + (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', + (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', + (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); + } + } + + if (m_maincpu->pc() < 0x10000) + { + int oldbank = m_basebank; + + if (mem_mask & 0x0200) + { + if (data & 0x0200) + { + m_basebank |= 4; + } + else + { + m_basebank &= ~4; + } + } + + if (mem_mask & 0x0400) + { + if (data & 0x0400) + { + m_basebank |= 1; + } + else + { + m_basebank &= ~1; + } + } + + if (mem_mask & 0x0800) + { + if (data & 0x0800) + { + m_basebank |= 2; + } + else + { + m_basebank &= ~2; + } + } + + if (oldbank != m_basebank) + m_maincpu->invalidate_cache(); + } +} + + +uint16_t zon32bit_state::portc_r() +{ + // 0x03ff seem to be inputs for buttons (and some kind of output?) + // 0xfc00 gets masked for other reasons (including banking?) + + // returning same value written for 0x0400 means controls don't respond (some kind of direction flag?) + + uint16_t dat = m_io_p3->read() & ~0xf800; + + dat |= (m_portc_dat & 0xf800); + + return dat; +} + + +uint16_t zon32bit_state::portb_r() +{ + return m_portb_dat; +} + +void zon32bit_state::portb_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (data != 0x0001) + logerror("%s: portb_w %04x (%04x)\n", machine().describe_context(), data, mem_mask); + + m_portb_dat = data; +} + +void zon32bit_state::portc_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + // very noisy + // is the code actually sending the sound to the remotes? + if (0) + logerror("%s: portc_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c\n", machine().describe_context(), data, mem_mask, + (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', + (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', + (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', + (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', + (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', + (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', + (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', + (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', + (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', + (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', + (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', + (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', + (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', + (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', + (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', + (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); + + int oldbank = m_upperbank; + + if (mem_mask & 0x1000) + { + if (data & 0x1000) + m_upperbank |= 0x1000; + else + m_upperbank &= ~0x1000; + } + + if (mem_mask & 0x0800) + { + if (data & 0x0800) + m_upperbank |= 0x0800; + else + m_upperbank &= ~0x0800; + } + + if (oldbank != m_basebank) + m_maincpu->invalidate_cache(); + + m_portc_dat = data; +} + + +uint16_t oplayer_100in1_state::portc_r() +{ + return m_io_p3->read(); +} + +uint16_t oplayer_100in1_state::portb_r() +{ + return m_io_p2->read(); +} + +uint16_t oplayer_100in1_state::porta_r() +{ + return 0x0ff8 | (machine().rand()&1); +} + +void zon32bit_state::mem_map_zon32bit(address_map &map) +{ + map(0x000000, 0x3fffff).r(FUNC(zon32bit_state::z32_rom_r)); +} + +uint16_t zon32bit_state::z32_rom_r(offs_t offset) +{ + /* + This has upper and lower bank, which can be changed independently. + Banking hookup is currently very hacky as bank values are written + to ports then erased at the moment, maybe they latch somehow? + */ + + int base = 0x0000000; + + if (m_basebank & 4) base |= 0x4000000; + if (m_basebank & 2) base |= 0x2000000; + if (m_basebank & 1) base |= 0x1000000; + + if (offset < 0x200000) + { + return m_romregion[offset + (base / 2)]; + } + else + { + offset &= 0x1fffff; + + if (m_upperbank & 0x1000) base |= 0x0400000; + if (m_upperbank & 0x0800) base |= 0x0800000; + + return m_romregion[offset + (base / 2)]; + } + + return 0x0000;// m_romregion[offset]; +} + +uint16_t denver_200in1_state::portc_r() +{ + return m_io_p3->read(); +} + +uint16_t denver_200in1_state::portb_r() +{ + return m_io_p2->read(); +} + +uint16_t denver_200in1_state::porta_r() +{ + return 0x0ff8 | (machine().rand()&1); +} + + +void zon32bit_state::machine_start() +{ + spg2xx_game_state::machine_start(); + + m_basebank = 0; + + save_item(NAME(m_porta_dat)); + save_item(NAME(m_portb_dat)); + save_item(NAME(m_portc_dat)); + save_item(NAME(m_porta_mask)); + save_item(NAME(m_upperbank)); + save_item(NAME(m_basebank)); +} + + +void zon32bit_state::machine_reset() +{ + spg2xx_game_state::machine_reset(); + + m_porta_dat = 0xffff; + m_portb_dat = 0x0000; + + m_basebank = 0; + m_maincpu->invalidate_cache(); +} + +void mywicodx_state::machine_reset() +{ + zon32bit_state::machine_reset(); + m_basebank = 3; + m_maincpu->invalidate_cache(); +} + +void denver_200in1_state::machine_reset() +{ + zon32bit_state::machine_reset(); + m_basebank = 6; + m_maincpu->invalidate_cache(); +} + + + +static INPUT_PORTS_START( zon32bit ) + PORT_START("P1") + PORT_DIPNAME( 0x0001, 0x0001, "P1" ) + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("P2") + PORT_DIPNAME( 0x0001, 0x0001, "P2" ) + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("P3") + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_NAME("Up (vertical) Left (horizontal)") + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_NAME("Down (vertical) Right (horizontal)") + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_NAME("Left (vertical) Down (horizontal)") + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_NAME("Right (vertical) Up (horizontal)") + PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) + PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON4 ) + PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON3 ) + PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("B") + PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Pause / Menu") + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) +INPUT_PORTS_END + +static INPUT_PORTS_START( mywicogt ) + PORT_START("P1") + PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("P2") + PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("P3") + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Green / Left") + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Red / Right") + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Yellow") + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Blue") + PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Orange") + PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Start / Pause / Menu") + PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Back") + PORT_BIT( 0xfe00, IP_ACTIVE_HIGH, IPT_UNUSED ) +INPUT_PORTS_END + + +static INPUT_PORTS_START( oplayer ) + PORT_START("P1") + PORT_DIPNAME( 0x0001, 0x0001, "P1" ) + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("P2") + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) + PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) + PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON2 ) + PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON3 ) + PORT_BIT( 0xff80, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("P3") + PORT_DIPNAME( 0x0001, 0x0001, "P3" ) + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("BATT") + PORT_CONFNAME( 0x0001, 0x0001, "Battery Status" ) + PORT_CONFSETTING( 0x0000, "Low" ) + PORT_CONFSETTING( 0x0001, "High" ) +INPUT_PORTS_END + + +void zon32bit_state::zon32bit(machine_config &config) +{ + SPG24X(config, m_maincpu, XTAL(27'000'000), m_screen); + m_maincpu->set_addrmap(AS_PROGRAM, &zon32bit_state::mem_map_zon32bit); + + spg2xx_base(config); + + m_maincpu->porta_in().set(FUNC(zon32bit_state::porta_r)); + m_maincpu->portb_in().set(FUNC(zon32bit_state::portb_r)); + m_maincpu->portc_in().set(FUNC(zon32bit_state::portc_r)); + + m_maincpu->porta_out().set(FUNC(zon32bit_state::porta_w)); + m_maincpu->portb_out().set(FUNC(zon32bit_state::portb_w)); + m_maincpu->portc_out().set(FUNC(zon32bit_state::portc_w)); +} + +void zon32bit_state::zon32bit_bat(machine_config& config) +{ + zon32bit(config); + m_maincpu->adc_in<3>().set(FUNC(zon32bit_state::an3_r)); +} + +ROM_START( mywicodx ) + ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASE00 ) + // the first bank contains the Mi Guitar game, the 2nd half of the ROM is where the Menu starts + ROM_LOAD16_WORD_SWAP( "mywicodx.u2", 0x0000000, 0x4000000, CRC(ec7c5d2f) SHA1(330fb839c485713f7bec5bf9d2d42841612c5b45)) +ROM_END + + +ROM_START( zon32bit ) + ROM_REGION( 0x2000000, "maincpu", ROMREGION_ERASE00 ) // probably should just swap upper 2 line of ROM, as pinout was unknown + ROM_LOAD16_WORD_SWAP( "41sports.bin", 0x0000000, 0x0800000, CRC(86eee6e0) SHA1(3f6cab6649aebf596de5a8af21658bb1a27edb10) ) + ROM_CONTINUE(0x1000000, 0x0800000) + ROM_CONTINUE(0x0800000, 0x0800000) + ROM_CONTINUE(0x1800000, 0x0800000) +ROM_END + +ROM_START( mywicogt ) + ROM_REGION( 0x2000000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD16_WORD_SWAP( "mywicoguitar.bin", 0x0000000, 0x0800000, CRC(3c037c50) SHA1(3b9a28fb643c9f90563d653be0f38eba09c26f26) ) + ROM_CONTINUE(0x1000000, 0x0800000) + ROM_CONTINUE(0x0800000, 0x0800000) + ROM_CONTINUE(0x1800000, 0x0800000) +ROM_END + + +/* + Following pinout was used for dumping + + +------------------+ + VCC -|01 70|- VCC + A23 -|02 69|- A21 + VCC -|03 68|- A22 + A18 -|04 67|- A08 + A24 -|05 66|- A09 + A07 -|06 65|- A10 + A06 -|07 64|- A11 + A05 -|08 63|- A12 + A04 -|09 62|- A13 + A03 -|10 61|- A14 + A02 -|11 60|- A15 + A01 -|12 59|- A16 + A00 -|13 58|- A17 + NC -|14 57|- A20 + NC -|15 56|- A19 + /CE -|16 55|- VCC (/BYTE) + NC -|17 54|- NC + GND -|18 55LV512 53|- GND + NC -|19 52|- NC + NC -|20 51|- NC + NC -|21 50|- NC + NC -|22 49|- NC + NC -|23 48|- NC + /OE -|24 47|- NC + NC -|25 46|- NC + D08 -|26 45|- NC + D09 -|27 44|- D00 + D10 -|28 43|- D01 + D11 -|29 42|- D02 + NC -|30 41|- D03 + D12 -|31 40|- D04 + D13 -|32 39|- D05 + D14 -|33 38|- D06 + D15 -|34 37|- D07 + GND -|35 36|- VCC + +------------------+ +*/ + +// Sunplus QL8041C die +ROM_START( oplayer ) + ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD16_WORD_SWAP( "oplayer.bin", 0x0000000, 0x4000000, CRC(aa09c358) SHA1(df2855cdfdf2b693636cace8768e579b9d5bc657) ) +ROM_END + +ROM_START( cdlyoko ) // P1-25IN1-MAIN-V11 2011.05.09 on PCB + ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD16_WORD_SWAP( "clg001z.u2", 0x0000000, 0x1000000, CRC(1e73b910) SHA1(6f6cece054fcf91ff78962358804471794c58615) ) + ROM_RELOAD(0x1000000,0x1000000) + ROM_RELOAD(0x2000000,0x1000000) + ROM_RELOAD(0x3000000,0x1000000) +ROM_END + +ROM_START( dnv200fs ) + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD16_WORD_SWAP( "famsport200in1.u2", 0x0000000, 0x8000000, CRC(f59221e2) SHA1(d532cf5a80ffe9d527efcccbf380a7a860f0fbd9) ) +ROM_END + +ROM_START( m505neo ) + ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASE00 ) + // 1st and 2nd half are identical apart from one bit. Likely used double capacity ROM and only wired up half of it because ROM had a problem? + // the data segment in question is identical to one in oplayer and suggests the first half of the ROM here is correct with the bit being set + // incorrectly in the 2nd half of the ROM. + ROM_LOAD16_WORD_SWAP( "m505arcadeneo.u2", 0x0000000, 0x4000000, CRC(b72bdbe1) SHA1(263b60148980ac1f82546e2449b1dd938b7b827c) ) + ROM_IGNORE(0x4000000) +ROM_END + +ROM_START( m521neo ) + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASE00 ) // was this dumped with some address lines swapped? + ROM_LOAD16_WORD_SWAP( "6gu-1cd-a.u2", 0x0000000, 0x800000, CRC(7cb31b4c) SHA1(8de44756747a292c5d39bd491048d6fac4219953) ) + ROM_CONTINUE(0x01000000, 0x800000) + ROM_CONTINUE(0x00800000, 0x800000) + ROM_CONTINUE(0x01800000, 0x800000) + + ROM_CONTINUE(0x02000000, 0x800000) + ROM_CONTINUE(0x03000000, 0x800000) + ROM_CONTINUE(0x02800000, 0x800000) + ROM_CONTINUE(0x03800000, 0x800000) + + ROM_CONTINUE(0x04000000, 0x800000) + ROM_CONTINUE(0x05000000, 0x800000) + ROM_CONTINUE(0x04800000, 0x800000) + ROM_CONTINUE(0x05800000, 0x800000) + + ROM_CONTINUE(0x06000000, 0x800000) + ROM_CONTINUE(0x07000000, 0x800000) + ROM_CONTINUE(0x06800000, 0x800000) + ROM_CONTINUE(0x07800000, 0x800000) +ROM_END + + +void oplayer_100in1_state::init_oplayer() +{ + // TODO: remove these hacks + uint16_t* rom = (uint16_t*)memregion("maincpu")->base(); + // port a checks when starting a game in any given bank / starting the system + rom[0x0f851 + (0x0000000 / 2)] = 0xf165; + rom[0xaad1e + (0x1000000 / 2)] = 0xf165; + rom[0x47d2d + (0x2000000 / 2)] = 0xf165; + rom[0x1fb00 + (0x3000000 / 2)] = 0xf165; + // port a checks when exiting a game in any given bank + rom[0x7a506 + (0x0000000 / 2)] = 0xf165; + rom[0xad051 + (0x1000000 / 2)] = 0xf165; + rom[0xc351e + (0x3000000 / 2)] = 0xf165; +} + +/* + +oplayer m505 +--------------- +0001 | 0001 0 +0002 | 0100 8 +0004 | 0002 1 +0008 | 0200 9 +0010 | 0004 2 +0020 | 0400 10 +0040 | 0008 3 +0080 | 0800 11 + + +0100 | 8000 15 +0200 | 0080 7 +0400 | 4000 14 +0800 | 0040 6 +1000 | 2000 13 +2000 | 0020 5 +4000 | 1000 12 +8000 | 0010 4 + +*/ + +void oplayer_100in1_state::init_m505neo() +{ + uint16_t *ROM = (uint16_t*)memregion("maincpu")->base(); + int size = memregion("maincpu")->bytes(); + + for (int i = 0; i < size / 2; i++) + { + ROM[i] = bitswap<16>(ROM[i], + 11, 3, 10, 2, + 9, 1, 8, 0, + + 4, 12, 5, 13, + 6, 14, 7, 15 + ); + + } + + // TODO: remove these hacks + // port a checks when starting the system + ROM[0x43c30 + (0x2000000 / 2)] = 0xf165; // boot main bank +} + +void oplayer_100in1_state::init_cdlyoko() +{ + uint16_t* rom16 = (uint16_t*)memregion("maincpu")->base(); + int size = memregion("maincpu")->bytes(); + + std::vector buffer(size / 2); + + for (int i = 0; i < size / 2; i++) + { + buffer[bitswap<25>(i, 0x18, 0x17, 0x16, 0x15, 0x13, 0x8, 0x12, 0x11, 0x14, 0x10, 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9, 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1, 0x0)] = rom16[i]; + } + + std::copy(buffer.begin(), buffer.end(), &rom16[0]); + + // patch a startup check, like oplayer + for (int i = 0; i < 4; i++) + rom16[0x493ed + ((0x1000000 * i) / 2)] = 0xf165; +} + + +void denver_200in1_state::init_denver() +{ + // TODO: remove these hacks + + // patch checks when booting each bank, similar to oplayer + uint16_t* rom = (uint16_t*)memregion("maincpu")->base(); + //rom[0x175f7 + (0x0000000 / 2)] = 0xf165; + //rom[0x18f47 + (0x1000000 / 2)] = 0xf165; + //rom[0x33488 + (0x2000000 / 2)] = 0xf165; + //rom[0x87f81 + (0x3000000 / 2)] = 0xf165; + //rom[0x764d9 + (0x4000000 / 2)] = 0xf165; + //rom[0xb454e + (0x5000000 / 2)] = 0xf165; + rom[0x43c30 + (0x6000000 / 2)] = 0xf165; // boot main bank + //rom[0x1fb00 + (0x7000000 / 2)] = 0xf165; +} + +void denver_200in1_state::init_m521neo() +{ + uint16_t* rom = (uint16_t*)memregion("maincpu")->base(); + rom[0x43c30 + (0x6000000 / 2)] = 0xf165; // boot main bank +} + + + +// Box advertises this as '40 Games Included' but the cartridge, which was glued directly to the PCB, not removable, is a 41-in-1. Maybe some versions exist with a 40 game selection. +CONS( 200?, zon32bit, 0, 0, zon32bit, zon32bit, zon32bit_state, empty_init, "Ultimate Products (HK) Ltd / Senca", "Zone 32-bit Gaming Console System (Family Sport 41-in-1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +// My Wico Deluxe was also available under the MiWi brand (exact model unknown, but it was a cart there instead of built in) +// Box claimed 53 Arcade Games + 8 Sports games + 24 Music games, although it's unclear where 24 Music Games comes from, there are 3, which are identical aside from the title screen. +// The Mi Guitar menu contains 24 games, but they're dupes, and just counting those would exclude the other Mi Fit and Mi Papacon menus (which also contain dupes) +CONS( 200?, mywicodx, 0, 0, zon32bit, zon32bit, mywicodx_state, empty_init, " / Senca", "My Wico Deluxe (Family Sport 85-in-1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) + +// Shows Mi Guitar 2 in the menu, it seems likely that there was an earlier version on VT1682 hardware as there is a very similar Guitar game (with the same song selection) in those multigames +CONS( 200?, mywicogt, 0, 0, zon32bit, mywicogt, mywicogt_state, empty_init, " / Senca", "My Wico Guitar", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) + +CONS( 200?, oplayer, 0, 0, zon32bit_bat, oplayer, oplayer_100in1_state, init_oplayer, "OPlayer / Senca", "OPlayer Mobile Game Console (MGS03-white) (Family Sport 100-in-1)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) + +CONS( 2012, m505neo, 0, 0, zon32bit_bat, oplayer, oplayer_100in1_state, init_m505neo, "Millennium 2000 GmbH / Senca", "Millennium M505 Arcade Neo Portable Spielkonsole (Family Sport 100-in-1)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) + +CONS( 2011, cdlyoko, 0, 0, zon32bit_bat, oplayer, oplayer_100in1_state, init_cdlyoko, "Ingo Devices SL / Senca", "Code Lyoko (25-in-1 handheld)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) + +// a version of this exists with the 'newer' style title screen seen in m505neo +CONS( 2012, m521neo, 0, 0, zon32bit_bat, oplayer, denver_200in1_state, init_m521neo, "Millennium 2000 GmbH / Senca", "Millennium M521 Arcade Neo 2.0 (Family Sport 220-in-1) ", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) + +/* +DENVER(r) + +PO:9075 +Model: GMP-270CMK2 +OPERATED BY 3 X AAA-BATTERIES (NOT INCL) +OR MINI-USB POWER SOURCE +Power consumption:0.6W/hour +Standby consumption:0.25mW/hour +Imported by: +DENVER ELECTRONICS A/S +Stavneagervej 22 +DK-8250 EGAA +DENMARK + +*/ + +CONS( 200?, dnv200fs, 0, 0, zon32bit_bat, oplayer, denver_200in1_state, init_denver, "Denver / Senca", "Denver (GMP-270CMK2) (Family Sport 200-in-1)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) + + diff --git a/src/mame/drivers/spg2xx_zone.cpp b/src/mame/drivers/spg2xx_zone.cpp index be592a5e1f2..f1a14e3d134 100644 --- a/src/mame/drivers/spg2xx_zone.cpp +++ b/src/mame/drivers/spg2xx_zone.cpp @@ -1,7 +1,8 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz, David Haywood -/* 'Zone' systems */ +// JungleTac developed systems sold by under the 'Zone' and 'Wireless' brands these are mostly higer capacity (60+ game) units +// also Waixing developed systems for the lower capacity (~40 game) units #include "emu.h" #include "includes/spg2xx.h" diff --git a/src/mame/drivers/spg2xx_zone_32bit.cpp b/src/mame/drivers/spg2xx_zone_32bit.cpp deleted file mode 100644 index 7bf7ba3ca7a..00000000000 --- a/src/mame/drivers/spg2xx_zone_32bit.cpp +++ /dev/null @@ -1,1049 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz, David Haywood - -/* Shenzhen Senca Technology Co., Ltd developed "Family Sport" systems - sold by various manufacturers */ - -#include "emu.h" -#include "includes/spg2xx.h" - - -class zon32bit_state : public spg2xx_game_state -{ -public: - zon32bit_state(const machine_config& mconfig, device_type type, const char* tag) : - spg2xx_game_state(mconfig, type, tag), - m_romregion(*this, "maincpu") - { } - - void zon32bit(machine_config& config); - void zon32bit_bat(machine_config& config); - - void mem_map_zon32bit(address_map &map); - -protected: - virtual void machine_start() override; - virtual void machine_reset() override; - virtual void device_post_load() override; - - uint16_t z32_rom_r(offs_t offset); - - required_region_ptr m_romregion; - - virtual uint16_t porta_r(); - virtual uint16_t portb_r(); - virtual uint16_t portc_r(); - - virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; - virtual void portb_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; - virtual void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; - - uint16_t an3_r(); - - int m_porta_dat; - int m_portb_dat; - int m_portc_dat; - int m_porta_mask; - - int m_upperbank; - - int m_basebank; -}; - -class mywicogt_state : public zon32bit_state -{ -public: - mywicogt_state(const machine_config& mconfig, device_type type, const char* tag) : - zon32bit_state(mconfig, type, tag) - { } - -protected: - virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; -}; - - -class mywicodx_state : public zon32bit_state -{ -public: - mywicodx_state(const machine_config& mconfig, device_type type, const char* tag) : - zon32bit_state(mconfig, type, tag) - { } - -protected: - virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; - - virtual void machine_reset() override; -}; - -class oplayer_100in1_state : public mywicodx_state -{ -public: - oplayer_100in1_state(const machine_config& mconfig, device_type type, const char* tag) : - mywicodx_state(mconfig, type, tag) - { } - - void init_oplayer(); - void init_m505neo(); - -protected: - virtual uint16_t porta_r() override; - virtual uint16_t portb_r() override; - virtual uint16_t portc_r() override; -}; - -class denver_200in1_state : public mywicodx_state -{ -public: - denver_200in1_state(const machine_config& mconfig, device_type type, const char* tag) : - mywicodx_state(mconfig, type, tag) - { } - - void init_denver(); - void init_m521neo(); - -protected: - virtual void machine_reset() override; - - virtual uint16_t porta_r() override; - virtual uint16_t portb_r() override; - virtual uint16_t portc_r() override; - - virtual void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; -}; - -uint16_t zon32bit_state::an3_r() -{ - int status = ioport("BATT")->read(); - if (status) - return 0xfff; - else - return 0x000; -} - -void zon32bit_state::device_post_load() -{ - // load state can change the bank, so we must invalide cache - m_maincpu->invalidate_cache(); -} - -uint16_t zon32bit_state::porta_r() -{ - return m_porta_dat; -} - - -void zon32bit_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - if (0) - logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, - (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', - (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', - (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', - (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', - (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', - (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', - (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', - (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', - (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', - (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', - (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', - (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', - (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', - (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', - (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', - (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); - - m_porta_dat = data; - - // The banking on zon32bit doesn't seem the same as mywicodx. - // The same values get written here both in the case of switching to upper bank and switching to lower bank, so presumably it must be some kind of toggle - if (data == 0x0e01) - { - m_basebank ^= 1; - logerror("bank is now %d\n", m_basebank); - m_maincpu->invalidate_cache(); - } -} - - -void mywicogt_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - if (1) - logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, - (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', - (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', - (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', - (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', - (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', - (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', - (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', - (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', - (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', - (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', - (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', - (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', - (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', - (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', - (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', - (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); - -//[:] ':maincpu' (000508): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x -//[:] ':maincpu' (000510): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x -//[:] ':maincpu' (000518): porta_w 0f00 (0f00) x x x x | 1 1 1 1 | x x x x | x x x x - - if (m_maincpu->pc() < 0x1000) - { - if (data == 0x0f00) - { - m_basebank = 1; - m_maincpu->invalidate_cache(); - logerror("changing to bank 1\n"); - - } - else if (data == 0x0b00) - { - m_basebank = 0; - m_maincpu->invalidate_cache(); - logerror("changing to bank 0\n"); - } - } - - m_porta_dat = data; -} - - -void mywicodx_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - if (0) - logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, - (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', - (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', - (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', - (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', - (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', - (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', - (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', - (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', - (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', - (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', - (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', - (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', - (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', - (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', - (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', - (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); - - - m_porta_dat = data; - - int oldbank = m_basebank; - - if (mem_mask & 0x0400) - { - if (data & 0x0400) - m_basebank |= 1; - else - m_basebank &= ~1; - } - - if (mem_mask & 0x0800) - { - if (data & 0x0800) - m_basebank |= 2; - else - m_basebank &= ~2; - } - - if (oldbank != m_basebank) - m_maincpu->invalidate_cache(); - - -} - - -void denver_200in1_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - if (0) - { - if (m_maincpu->pc() < 0x10000) - { - logerror("%s: porta_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c \n", machine().describe_context(), data, mem_mask, - (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', - (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', - (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', - (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', - (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', - (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', - (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', - (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', - (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', - (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', - (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', - (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', - (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', - (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', - (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', - (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); - } - } - - if (m_maincpu->pc() < 0x10000) - { - int oldbank = m_basebank; - - if (mem_mask & 0x0200) - { - if (data & 0x0200) - { - m_basebank |= 4; - } - else - { - m_basebank &= ~4; - } - } - - if (mem_mask & 0x0400) - { - if (data & 0x0400) - { - m_basebank |= 1; - } - else - { - m_basebank &= ~1; - } - } - - if (mem_mask & 0x0800) - { - if (data & 0x0800) - { - m_basebank |= 2; - } - else - { - m_basebank &= ~2; - } - } - - if (oldbank != m_basebank) - m_maincpu->invalidate_cache(); - } -} - - -uint16_t zon32bit_state::portc_r() -{ - // 0x03ff seem to be inputs for buttons (and some kind of output?) - // 0xfc00 gets masked for other reasons (including banking?) - - // returning same value written for 0x0400 means controls don't respond (some kind of direction flag?) - - uint16_t dat = m_io_p3->read() & ~0xf800; - - dat |= (m_portc_dat & 0xf800); - - return dat; -} - - -uint16_t zon32bit_state::portb_r() -{ - return m_portb_dat; -} - -void zon32bit_state::portb_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - if (data != 0x0001) - logerror("%s: portb_w %04x (%04x)\n", machine().describe_context(), data, mem_mask); - - m_portb_dat = data; -} - -void zon32bit_state::portc_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - // very noisy - // is the code actually sending the sound to the remotes? - if (0) - logerror("%s: portc_w %04x (%04x) %c %c %c %c | %c %c %c %c | %c %c %c %c | %c %c %c %c\n", machine().describe_context(), data, mem_mask, - (mem_mask & 0x8000) ? ((data & 0x8000) ? '1' : '0') : 'x', - (mem_mask & 0x4000) ? ((data & 0x4000) ? '1' : '0') : 'x', - (mem_mask & 0x2000) ? ((data & 0x2000) ? '1' : '0') : 'x', - (mem_mask & 0x1000) ? ((data & 0x1000) ? '1' : '0') : 'x', - (mem_mask & 0x0800) ? ((data & 0x0800) ? '1' : '0') : 'x', - (mem_mask & 0x0400) ? ((data & 0x0400) ? '1' : '0') : 'x', - (mem_mask & 0x0200) ? ((data & 0x0200) ? '1' : '0') : 'x', - (mem_mask & 0x0100) ? ((data & 0x0100) ? '1' : '0') : 'x', - (mem_mask & 0x0080) ? ((data & 0x0080) ? '1' : '0') : 'x', - (mem_mask & 0x0040) ? ((data & 0x0040) ? '1' : '0') : 'x', - (mem_mask & 0x0020) ? ((data & 0x0020) ? '1' : '0') : 'x', - (mem_mask & 0x0010) ? ((data & 0x0010) ? '1' : '0') : 'x', - (mem_mask & 0x0008) ? ((data & 0x0008) ? '1' : '0') : 'x', - (mem_mask & 0x0004) ? ((data & 0x0004) ? '1' : '0') : 'x', - (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', - (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); - - int oldbank = m_upperbank; - - if (mem_mask & 0x1000) - { - if (data & 0x1000) - m_upperbank |= 0x1000; - else - m_upperbank &= ~0x1000; - } - - if (mem_mask & 0x0800) - { - if (data & 0x0800) - m_upperbank |= 0x0800; - else - m_upperbank &= ~0x0800; - } - - if (oldbank != m_basebank) - m_maincpu->invalidate_cache(); - - m_portc_dat = data; -} - - -uint16_t oplayer_100in1_state::portc_r() -{ - return m_io_p3->read(); -} - -uint16_t oplayer_100in1_state::portb_r() -{ - return m_io_p2->read(); -} - -uint16_t oplayer_100in1_state::porta_r() -{ - return 0x0ff8 | (machine().rand()&1); -} - -void zon32bit_state::mem_map_zon32bit(address_map &map) -{ - map(0x000000, 0x3fffff).r(FUNC(zon32bit_state::z32_rom_r)); -} - -uint16_t zon32bit_state::z32_rom_r(offs_t offset) -{ - /* - This has upper and lower bank, which can be changed independently. - Banking hookup is currently very hacky as bank values are written - to ports then erased at the moment, maybe they latch somehow? - */ - - int base = 0x0000000; - - if (m_basebank & 4) base |= 0x4000000; - if (m_basebank & 2) base |= 0x2000000; - if (m_basebank & 1) base |= 0x1000000; - - if (offset < 0x200000) - { - return m_romregion[offset + (base / 2)]; - } - else - { - offset &= 0x1fffff; - - if (m_upperbank & 0x1000) base |= 0x0400000; - if (m_upperbank & 0x0800) base |= 0x0800000; - - return m_romregion[offset + (base / 2)]; - } - - return 0x0000;// m_romregion[offset]; -} - -uint16_t denver_200in1_state::portc_r() -{ - return m_io_p3->read(); -} - -uint16_t denver_200in1_state::portb_r() -{ - return m_io_p2->read(); -} - -uint16_t denver_200in1_state::porta_r() -{ - return 0x0ff8 | (machine().rand()&1); -} - - -void zon32bit_state::machine_start() -{ - spg2xx_game_state::machine_start(); - - m_basebank = 0; - - save_item(NAME(m_porta_dat)); - save_item(NAME(m_portb_dat)); - save_item(NAME(m_portc_dat)); - save_item(NAME(m_porta_mask)); - save_item(NAME(m_upperbank)); - save_item(NAME(m_basebank)); -} - - -void zon32bit_state::machine_reset() -{ - spg2xx_game_state::machine_reset(); - - m_porta_dat = 0xffff; - m_portb_dat = 0x0000; - - m_basebank = 0; - m_maincpu->invalidate_cache(); -} - -void mywicodx_state::machine_reset() -{ - zon32bit_state::machine_reset(); - m_basebank = 3; - m_maincpu->invalidate_cache(); -} - -void denver_200in1_state::machine_reset() -{ - zon32bit_state::machine_reset(); - m_basebank = 6; - m_maincpu->invalidate_cache(); -} - - - -static INPUT_PORTS_START( zon32bit ) - PORT_START("P1") - PORT_DIPNAME( 0x0001, 0x0001, "P1" ) - PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - - PORT_START("P2") - PORT_DIPNAME( 0x0001, 0x0001, "P2" ) - PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - - PORT_START("P3") - PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_NAME("Up (vertical) Left (horizontal)") - PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_NAME("Down (vertical) Right (horizontal)") - PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_NAME("Left (vertical) Down (horizontal)") - PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_NAME("Right (vertical) Up (horizontal)") - PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) - PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON4 ) - PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON3 ) - PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("B") - PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Pause / Menu") - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) -INPUT_PORTS_END - -static INPUT_PORTS_START( mywicogt ) - PORT_START("P1") - PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("P2") - PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("P3") - PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Green / Left") - PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Red / Right") - PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Yellow") - PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Blue") - PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Orange") - PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) - PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) - PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Start / Pause / Menu") - PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Back") - PORT_BIT( 0xfe00, IP_ACTIVE_HIGH, IPT_UNUSED ) -INPUT_PORTS_END - - -static INPUT_PORTS_START( oplayer ) - PORT_START("P1") - PORT_DIPNAME( 0x0001, 0x0001, "P1" ) - PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - - PORT_START("P2") - PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) - PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) - PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) - PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) - PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) - PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON2 ) - PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON3 ) - PORT_BIT( 0xff80, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("P3") - PORT_DIPNAME( 0x0001, 0x0001, "P3" ) - PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - - PORT_START("BATT") - PORT_CONFNAME( 0x0001, 0x0001, "Battery Status" ) - PORT_CONFSETTING( 0x0000, "Low" ) - PORT_CONFSETTING( 0x0001, "High" ) -INPUT_PORTS_END - - -void zon32bit_state::zon32bit(machine_config &config) -{ - SPG24X(config, m_maincpu, XTAL(27'000'000), m_screen); - m_maincpu->set_addrmap(AS_PROGRAM, &zon32bit_state::mem_map_zon32bit); - - spg2xx_base(config); - - m_maincpu->porta_in().set(FUNC(zon32bit_state::porta_r)); - m_maincpu->portb_in().set(FUNC(zon32bit_state::portb_r)); - m_maincpu->portc_in().set(FUNC(zon32bit_state::portc_r)); - - m_maincpu->porta_out().set(FUNC(zon32bit_state::porta_w)); - m_maincpu->portb_out().set(FUNC(zon32bit_state::portb_w)); - m_maincpu->portc_out().set(FUNC(zon32bit_state::portc_w)); -} - -void zon32bit_state::zon32bit_bat(machine_config& config) -{ - zon32bit(config); - m_maincpu->adc_in<3>().set(FUNC(zon32bit_state::an3_r)); -} - -ROM_START( mywicodx ) - ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASE00 ) - // the first bank contains the Mi Guitar game, the 2nd half of the ROM is where the Menu starts - ROM_LOAD16_WORD_SWAP( "mywicodx.u2", 0x0000000, 0x4000000, CRC(ec7c5d2f) SHA1(330fb839c485713f7bec5bf9d2d42841612c5b45)) -ROM_END - - -ROM_START( zon32bit ) - ROM_REGION( 0x2000000, "maincpu", ROMREGION_ERASE00 ) // probably should just swap upper 2 line of ROM, as pinout was unknown - ROM_LOAD16_WORD_SWAP( "41sports.bin", 0x0000000, 0x0800000, CRC(86eee6e0) SHA1(3f6cab6649aebf596de5a8af21658bb1a27edb10) ) - ROM_CONTINUE(0x1000000, 0x0800000) - ROM_CONTINUE(0x0800000, 0x0800000) - ROM_CONTINUE(0x1800000, 0x0800000) -ROM_END - -ROM_START( mywicogt ) - ROM_REGION( 0x2000000, "maincpu", ROMREGION_ERASE00 ) - ROM_LOAD16_WORD_SWAP( "mywicoguitar.bin", 0x0000000, 0x0800000, CRC(3c037c50) SHA1(3b9a28fb643c9f90563d653be0f38eba09c26f26) ) - ROM_CONTINUE(0x1000000, 0x0800000) - ROM_CONTINUE(0x0800000, 0x0800000) - ROM_CONTINUE(0x1800000, 0x0800000) -ROM_END - - -/* - Following pinout was used for dumping - - +------------------+ - VCC -|01 70|- VCC - A23 -|02 69|- A21 - VCC -|03 68|- A22 - A18 -|04 67|- A08 - A24 -|05 66|- A09 - A07 -|06 65|- A10 - A06 -|07 64|- A11 - A05 -|08 63|- A12 - A04 -|09 62|- A13 - A03 -|10 61|- A14 - A02 -|11 60|- A15 - A01 -|12 59|- A16 - A00 -|13 58|- A17 - NC -|14 57|- A20 - NC -|15 56|- A19 - /CE -|16 55|- VCC (/BYTE) - NC -|17 54|- NC - GND -|18 55LV512 53|- GND - NC -|19 52|- NC - NC -|20 51|- NC - NC -|21 50|- NC - NC -|22 49|- NC - NC -|23 48|- NC - /OE -|24 47|- NC - NC -|25 46|- NC - D08 -|26 45|- NC - D09 -|27 44|- D00 - D10 -|28 43|- D01 - D11 -|29 42|- D02 - NC -|30 41|- D03 - D12 -|31 40|- D04 - D13 -|32 39|- D05 - D14 -|33 38|- D06 - D15 -|34 37|- D07 - GND -|35 36|- VCC - +------------------+ -*/ - -// Sunplus QL8041C die -ROM_START( oplayer ) - ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASE00 ) - ROM_LOAD16_WORD_SWAP( "oplayer.bin", 0x0000000, 0x4000000, CRC(aa09c358) SHA1(df2855cdfdf2b693636cace8768e579b9d5bc657) ) -ROM_END - -ROM_START( dnv200fs ) - ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASE00 ) - ROM_LOAD16_WORD_SWAP( "famsport200in1.u2", 0x0000000, 0x8000000, CRC(f59221e2) SHA1(d532cf5a80ffe9d527efcccbf380a7a860f0fbd9) ) -ROM_END - -ROM_START( m505neo ) - ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASE00 ) - // 1st and 2nd half are identical apart from one bit. Likely used double capacity ROM and only wired up half of it because ROM had a problem? - // the data segment in question is identical to one in oplayer and suggests the first half of the ROM here is correct with the bit being set - // incorrectly in the 2nd half of the ROM. - ROM_LOAD16_WORD_SWAP( "m505arcadeneo.u2", 0x0000000, 0x4000000, CRC(b72bdbe1) SHA1(263b60148980ac1f82546e2449b1dd938b7b827c) ) - ROM_IGNORE(0x4000000) -ROM_END - -ROM_START( m521neo ) - ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASE00 ) // was this dumped with some address lines swapped? - ROM_LOAD16_WORD_SWAP( "6gu-1cd-a.u2", 0x0000000, 0x800000, CRC(7cb31b4c) SHA1(8de44756747a292c5d39bd491048d6fac4219953) ) - ROM_CONTINUE(0x01000000, 0x800000) - ROM_CONTINUE(0x00800000, 0x800000) - ROM_CONTINUE(0x01800000, 0x800000) - - ROM_CONTINUE(0x02000000, 0x800000) - ROM_CONTINUE(0x03000000, 0x800000) - ROM_CONTINUE(0x02800000, 0x800000) - ROM_CONTINUE(0x03800000, 0x800000) - - ROM_CONTINUE(0x04000000, 0x800000) - ROM_CONTINUE(0x05000000, 0x800000) - ROM_CONTINUE(0x04800000, 0x800000) - ROM_CONTINUE(0x05800000, 0x800000) - - ROM_CONTINUE(0x06000000, 0x800000) - ROM_CONTINUE(0x07000000, 0x800000) - ROM_CONTINUE(0x06800000, 0x800000) - ROM_CONTINUE(0x07800000, 0x800000) -ROM_END - - -void oplayer_100in1_state::init_oplayer() -{ - // TODO: remove these hacks - uint16_t* rom = (uint16_t*)memregion("maincpu")->base(); - // port a checks when starting a game in any given bank / starting the system - rom[0x0f851 + (0x0000000 / 2)] = 0xf165; - rom[0xaad1e + (0x1000000 / 2)] = 0xf165; - rom[0x47d2d + (0x2000000 / 2)] = 0xf165; - rom[0x1fb00 + (0x3000000 / 2)] = 0xf165; - // port a checks when exiting a game in any given bank - rom[0x7a506 + (0x0000000 / 2)] = 0xf165; - rom[0xad051 + (0x1000000 / 2)] = 0xf165; - rom[0xc351e + (0x3000000 / 2)] = 0xf165; -} - -/* - -oplayer m505 ---------------- -0001 | 0001 0 -0002 | 0100 8 -0004 | 0002 1 -0008 | 0200 9 -0010 | 0004 2 -0020 | 0400 10 -0040 | 0008 3 -0080 | 0800 11 - - -0100 | 8000 15 -0200 | 0080 7 -0400 | 4000 14 -0800 | 0040 6 -1000 | 2000 13 -2000 | 0020 5 -4000 | 1000 12 -8000 | 0010 4 - -*/ - -void oplayer_100in1_state::init_m505neo() -{ - uint16_t *ROM = (uint16_t*)memregion("maincpu")->base(); - int size = memregion("maincpu")->bytes(); - - for (int i = 0; i < size / 2; i++) - { - ROM[i] = bitswap<16>(ROM[i], - 11, 3, 10, 2, - 9, 1, 8, 0, - - 4, 12, 5, 13, - 6, 14, 7, 15 - ); - - } - - // TODO: remove these hacks - // port a checks when starting the system - ROM[0x43c30 + (0x2000000 / 2)] = 0xf165; // boot main bank -} - - -void denver_200in1_state::init_denver() -{ - // TODO: remove these hacks - - // patch checks when booting each bank, similar to oplayer - uint16_t* rom = (uint16_t*)memregion("maincpu")->base(); - //rom[0x175f7 + (0x0000000 / 2)] = 0xf165; - //rom[0x18f47 + (0x1000000 / 2)] = 0xf165; - //rom[0x33488 + (0x2000000 / 2)] = 0xf165; - //rom[0x87f81 + (0x3000000 / 2)] = 0xf165; - //rom[0x764d9 + (0x4000000 / 2)] = 0xf165; - //rom[0xb454e + (0x5000000 / 2)] = 0xf165; - rom[0x43c30 + (0x6000000 / 2)] = 0xf165; // boot main bank - //rom[0x1fb00 + (0x7000000 / 2)] = 0xf165; -} - -void denver_200in1_state::init_m521neo() -{ - uint16_t* rom = (uint16_t*)memregion("maincpu")->base(); - rom[0x43c30 + (0x6000000 / 2)] = 0xf165; // boot main bank -} - - - -// Box advertises this as '40 Games Included' but the cartridge, which was glued directly to the PCB, not removable, is a 41-in-1. Maybe some versions exist with a 40 game selection. -CONS( 200?, zon32bit, 0, 0, zon32bit, zon32bit, zon32bit_state, empty_init, "Ultimate Products (HK) Ltd / Senca", "Zone 32-bit Gaming Console System (Family Sport 41-in-1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -// My Wico Deluxe was also available under the MiWi brand (exact model unknown, but it was a cart there instead of built in) -// Box claimed 53 Arcade Games + 8 Sports games + 24 Music games, although it's unclear where 24 Music Games comes from, there are 3, which are identical aside from the title screen. -// The Mi Guitar menu contains 24 games, but they're dupes, and just counting those would exclude the other Mi Fit and Mi Papacon menus (which also contain dupes) -CONS( 200?, mywicodx, 0, 0, zon32bit, zon32bit, mywicodx_state, empty_init, " / Senca", "My Wico Deluxe (Family Sport 85-in-1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - -// Shows Mi Guitar 2 in the menu, it seems likely that there was an earlier version on VT1682 hardware as there is a very similar Guitar game (with the same song selection) in those multigames -CONS( 200?, mywicogt, 0, 0, zon32bit, mywicogt, mywicogt_state, empty_init, " / Senca", "My Wico Guitar", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - -// issues with 'low battery' always showing, but otherwise functional -CONS( 200?, oplayer, 0, 0, zon32bit_bat, oplayer, oplayer_100in1_state, init_oplayer, "OPlayer / Senca", "OPlayer Mobile Game Console (MGS03-white) (Family Sport 100-in-1)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - -CONS( 2012, m505neo, 0, 0, zon32bit_bat, oplayer, oplayer_100in1_state, init_m505neo, "Millennium 2000 GmbH / Senca", "Millennium M505 Arcade Neo Portable Spielkonsole (Family Sport 100-in-1)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - -// a version of this exists with the 'newer' style title screen seen in m505neo -CONS( 2012, m521neo, 0, 0, zon32bit_bat, oplayer, denver_200in1_state, init_m521neo, "Millennium 2000 GmbH / Senca", "Millennium M521 Arcade Neo 2.0 (Family Sport 220-in-1) ", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - -/* -DENVER(r) - -PO:9075 -Model: GMP-270CMK2 -OPERATED BY 3 X AAA-BATTERIES (NOT INCL) -OR MINI-USB POWER SOURCE -Power consumption:0.6W/hour -Standby consumption:0.25mW/hour -Imported by: -DENVER ELECTRONICS A/S -Stavneagervej 22 -DK-8250 EGAA -DENMARK - -*/ - -CONS( 200?, dnv200fs, 0, 0, zon32bit_bat, oplayer, denver_200in1_state, init_denver, "Denver / Senca", "Denver (GMP-270CMK2) (Family Sport 200-in-1)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - - diff --git a/src/mame/drivers/storio.cpp b/src/mame/drivers/storio.cpp index b1733f21229..7e3b6560bd8 100644 --- a/src/mame/drivers/storio.cpp +++ b/src/mame/drivers/storio.cpp @@ -45,11 +45,14 @@ public: { } void vtech_storio(machine_config &config); + void vtech_innotab(machine_config &config); private: virtual void machine_start() override; virtual void machine_reset() override; + void vtech_storio_base(machine_config &config); + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); required_device m_maincpu; @@ -94,7 +97,7 @@ static INPUT_PORTS_START( vtech_storio ) INPUT_PORTS_END -void vtech_storio_state::vtech_storio(machine_config &config) +void vtech_storio_state::vtech_storio_base(machine_config &config) { ARM9(config, m_maincpu, 240000000); // ARM926EJ-S CPU core (probably 240MHz, but not sure) @@ -111,9 +114,20 @@ void vtech_storio_state::vtech_storio(machine_config &config) m_cart->set_width(GENERIC_ROM16_WIDTH); m_cart->set_device_load(FUNC(vtech_storio_state::cart_load)); +} + +void vtech_storio_state::vtech_storio(machine_config &config) +{ + vtech_storio_base(config); SOFTWARE_LIST(config, "cart_list").set_original("vtech_storio_cart"); } +void vtech_storio_state::vtech_innotab(machine_config &config) +{ + vtech_storio_base(config); + SOFTWARE_LIST(config, "cart_list").set_original("vtech_innotab_cart"); +} + // BIOS is 1 GBIT (128M × 8 BIT) CMOS NAND EEPROM (Toshiba TC58NVG0S3ETA00) // ROM image from VTech, not padded to the real ROM size @@ -171,6 +185,11 @@ ROM_START( storionl ) ROM_LOAD( "nldut-pack_20111017.bin", 0x000000, 0x03af81c6, CRC(6cfac599) SHA1(d16b45fd287c9d823bde13b88eb6c8158ac2b475) ) ROM_END +ROM_START( innotab2 ) + ROM_REGION( 0x08400000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD( "innotab2.bin", 0x000000, 0x08400000, NO_DUMP ) +ROM_END + // year, name, parent, compat, machine, input, class, init, company, fullname, flags CONS( 2011, vreader, 0, 0, vtech_storio, vtech_storio, vtech_storio_state, empty_init, "VTech", "V.Reader (US, English, 2011-10-17)", MACHINE_IS_SKELETON ) CONS( 2011, vreadercaen, vreader, 0, vtech_storio, vtech_storio, vtech_storio_state, empty_init, "VTech", "V.Reader (CA, English, 2011-10-17)", MACHINE_IS_SKELETON ) @@ -181,3 +200,5 @@ CONS( 2011, storioes, vreader, 0, vtech_storio, vtech_storio, vtech_sto CONS( 2011, storioesa, vreader, 0, vtech_storio, vtech_storio, vtech_storio_state, empty_init, "VTech", "Storio (ES, Spanish, 2011-06-17?)", MACHINE_IS_SKELETON ) CONS( 2011, storiofr, vreader, 0, vtech_storio, vtech_storio, vtech_storio_state, empty_init, "VTech", "Storio (FR, French, 2011-10-17)", MACHINE_IS_SKELETON ) CONS( 2011, storionl, vreader, 0, vtech_storio, vtech_storio, vtech_storio_state, empty_init, "VTech", "Storio (NL, Dutch, 2011-10-17)", MACHINE_IS_SKELETON ) +// the InnoTAB 1/2/3 seem closely related? +CONS( 2011, innotab2, 0, 0, vtech_innotab, vtech_storio, vtech_storio_state, empty_init, "VTech", "InnoTAB 2 (UK)", MACHINE_IS_SKELETON ) diff --git a/src/mame/includes/megadriv_rad.h b/src/mame/includes/megadriv_rad.h index f931faea31b..e590467610b 100644 --- a/src/mame/includes/megadriv_rad.h +++ b/src/mame/includes/megadriv_rad.h @@ -20,6 +20,7 @@ public: void megadriv_radica_map(address_map &map); protected: + void megadriv_base_map(address_map &map); int m_bank; private: @@ -57,5 +58,29 @@ public: virtual void machine_start() override; }; +class megadriv_dgunl_state : public megadriv_radica_3button_state +{ +public: + megadriv_dgunl_state(const machine_config& mconfig, device_type type, const char* tag) + : megadriv_radica_3button_state(mconfig, type, tag) + {} +public: + void megadriv_dgunl_ntsc(machine_config &config); + + void init_dgunl3227(); + +protected: + virtual void machine_start() override; + +private: + uint16_t read_a16300(offs_t offset, uint16_t mem_mask); + uint16_t read_a16302(offs_t offset, uint16_t mem_mask); + void write_a1630a(offs_t offset, uint16_t data, uint16_t mem_mask); + + void megadriv_dgunl_map(address_map &map); + uint16_t m_a1630a; +}; + + #endif // MAME_INCLUDES_MEGADRIV_RAD_H diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 9840bf69485..92c561abfef 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14854,6 +14854,7 @@ rp200 @source:generalplus_gpl_unknown.cpp mapacman taspinv +parcade @source:generalplus_gpl162xx_lcdtype.cpp pcp8718 @@ -22310,6 +22311,7 @@ rad_sonic rad_sonicp rad_orun msi_sf2 +dgunl3227 @source:megadriv_sunplus_hybrid.cpp reactmd @@ -38107,15 +38109,16 @@ sorcererb // Sorcerer with Digitrio fdc sorcererd // Sorcerer with Micropolis fdc @source:storio.cpp -vreader // (c) 2011 V.Tech -vreadercaen // (c) 2011 V.Tech -vreadercafr // (c) 2011 V.Tech +innotab2 // (c) 2011 V.Tech storio // (c) 2011 V.Tech storiode // (c) 2011 V.Tech storioes // (c) 2011 V.Tech storioesa // (c) 2011 V.Tech storiofr // (c) 2011 V.Tech storionl // (c) 2011 V.Tech +vreader // (c) 2011 V.Tech +vreadercaen // (c) 2011 V.Tech +vreadercafr // (c) 2011 V.Tech @source:sothello.cpp sothello // (c) 1986 Success / Fujiwara. @@ -38392,6 +38395,16 @@ sentx6p // sentx6puk sentx6pd +@source:spg2xx_senca.cpp +cdlyoko +dnv200fs +m505neo +m521neo +mywicodx +mywicogt +oplayer +zon32bit + @source:spg2xx_shredmjr.cpp taikeegr // rockstar @@ -38430,16 +38443,7 @@ zone100 // lx_jg7415 // lx_jg7410 zonemini -react - -@source:spg2xx_zone_32bit.cpp -mywicodx // -mywicogt -zon32bit // Zone 32-bit -oplayer -dnv200fs -m505neo -m521neo +react @source:spiders.cpp spiders // (c) 1981 Sigma Ent. Inc. diff --git a/src/mame/mess.flt b/src/mame/mess.flt index e86a44c8b6a..8cb6226d8c9 100644 --- a/src/mame/mess.flt +++ b/src/mame/mess.flt @@ -934,6 +934,7 @@ spg2xx_pdc.cpp spg2xx_playvision.cpp spg2xx_senario.cpp spg2xx_senario_poker.cpp +spg2xx_senca.cpp spg2xx_shredmjr.cpp spg2xx_skannerztv.cpp spg2xx_smarttv.cpp @@ -942,7 +943,6 @@ spg2xx_tvgogo.cpp spg2xx_vii.cpp spg2xx_wiwi.cpp spg2xx_zone.cpp -spg2xx_zone_32bit.cpp squale.cpp ssem.cpp st17xx.cpp -- cgit v1.2.3